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Commit | Line | Data |
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6c009ab8 LW |
1 | /* |
2 | * drivers/mtd/nand/fsmc_nand.c | |
3 | * | |
4 | * ST Microelectronics | |
5 | * Flexible Static Memory Controller (FSMC) | |
6 | * Driver for NAND portions | |
7 | * | |
8 | * Copyright © 2010 ST Microelectronics | |
9 | * Vipin Kumar <vipin.kumar@st.com> | |
10 | * Ashish Priyadarshi | |
11 | * | |
12 | * Based on drivers/mtd/nand/nomadik_nand.c | |
13 | * | |
14 | * This file is licensed under the terms of the GNU General Public | |
15 | * License version 2. This program is licensed "as is" without any | |
16 | * warranty of any kind, whether express or implied. | |
17 | */ | |
18 | ||
19 | #include <linux/clk.h> | |
20 | #include <linux/err.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/resource.h> | |
24 | #include <linux/sched.h> | |
25 | #include <linux/types.h> | |
26 | #include <linux/mtd/mtd.h> | |
27 | #include <linux/mtd/nand.h> | |
28 | #include <linux/mtd/nand_ecc.h> | |
29 | #include <linux/platform_device.h> | |
30 | #include <linux/mtd/partitions.h> | |
31 | #include <linux/io.h> | |
32 | #include <linux/slab.h> | |
33 | #include <linux/mtd/fsmc.h> | |
593cd871 | 34 | #include <linux/amba/bus.h> |
6c009ab8 LW |
35 | #include <mtd/mtd-abi.h> |
36 | ||
e29ee57b | 37 | static struct nand_ecclayout fsmc_ecc1_128_layout = { |
6c009ab8 LW |
38 | .eccbytes = 24, |
39 | .eccpos = {2, 3, 4, 18, 19, 20, 34, 35, 36, 50, 51, 52, | |
40 | 66, 67, 68, 82, 83, 84, 98, 99, 100, 114, 115, 116}, | |
41 | .oobfree = { | |
42 | {.offset = 8, .length = 8}, | |
43 | {.offset = 24, .length = 8}, | |
44 | {.offset = 40, .length = 8}, | |
45 | {.offset = 56, .length = 8}, | |
46 | {.offset = 72, .length = 8}, | |
47 | {.offset = 88, .length = 8}, | |
48 | {.offset = 104, .length = 8}, | |
49 | {.offset = 120, .length = 8} | |
50 | } | |
51 | }; | |
52 | ||
e29ee57b BY |
53 | static struct nand_ecclayout fsmc_ecc1_64_layout = { |
54 | .eccbytes = 12, | |
55 | .eccpos = {2, 3, 4, 18, 19, 20, 34, 35, 36, 50, 51, 52}, | |
56 | .oobfree = { | |
57 | {.offset = 8, .length = 8}, | |
58 | {.offset = 24, .length = 8}, | |
59 | {.offset = 40, .length = 8}, | |
60 | {.offset = 56, .length = 8}, | |
61 | } | |
62 | }; | |
63 | ||
64 | static struct nand_ecclayout fsmc_ecc1_16_layout = { | |
65 | .eccbytes = 3, | |
66 | .eccpos = {2, 3, 4}, | |
67 | .oobfree = { | |
68 | {.offset = 8, .length = 8}, | |
69 | } | |
70 | }; | |
71 | ||
72 | /* | |
73 | * ECC4 layout for NAND of pagesize 8192 bytes & OOBsize 256 bytes. 13*16 bytes | |
74 | * of OB size is reserved for ECC, Byte no. 0 & 1 reserved for bad block and 46 | |
75 | * bytes are free for use. | |
76 | */ | |
77 | static struct nand_ecclayout fsmc_ecc4_256_layout = { | |
78 | .eccbytes = 208, | |
79 | .eccpos = { 2, 3, 4, 5, 6, 7, 8, | |
80 | 9, 10, 11, 12, 13, 14, | |
81 | 18, 19, 20, 21, 22, 23, 24, | |
82 | 25, 26, 27, 28, 29, 30, | |
83 | 34, 35, 36, 37, 38, 39, 40, | |
84 | 41, 42, 43, 44, 45, 46, | |
85 | 50, 51, 52, 53, 54, 55, 56, | |
86 | 57, 58, 59, 60, 61, 62, | |
87 | 66, 67, 68, 69, 70, 71, 72, | |
88 | 73, 74, 75, 76, 77, 78, | |
89 | 82, 83, 84, 85, 86, 87, 88, | |
90 | 89, 90, 91, 92, 93, 94, | |
91 | 98, 99, 100, 101, 102, 103, 104, | |
92 | 105, 106, 107, 108, 109, 110, | |
93 | 114, 115, 116, 117, 118, 119, 120, | |
94 | 121, 122, 123, 124, 125, 126, | |
95 | 130, 131, 132, 133, 134, 135, 136, | |
96 | 137, 138, 139, 140, 141, 142, | |
97 | 146, 147, 148, 149, 150, 151, 152, | |
98 | 153, 154, 155, 156, 157, 158, | |
99 | 162, 163, 164, 165, 166, 167, 168, | |
100 | 169, 170, 171, 172, 173, 174, | |
101 | 178, 179, 180, 181, 182, 183, 184, | |
102 | 185, 186, 187, 188, 189, 190, | |
103 | 194, 195, 196, 197, 198, 199, 200, | |
104 | 201, 202, 203, 204, 205, 206, | |
105 | 210, 211, 212, 213, 214, 215, 216, | |
106 | 217, 218, 219, 220, 221, 222, | |
107 | 226, 227, 228, 229, 230, 231, 232, | |
108 | 233, 234, 235, 236, 237, 238, | |
109 | 242, 243, 244, 245, 246, 247, 248, | |
110 | 249, 250, 251, 252, 253, 254 | |
111 | }, | |
112 | .oobfree = { | |
113 | {.offset = 15, .length = 3}, | |
114 | {.offset = 31, .length = 3}, | |
115 | {.offset = 47, .length = 3}, | |
116 | {.offset = 63, .length = 3}, | |
117 | {.offset = 79, .length = 3}, | |
118 | {.offset = 95, .length = 3}, | |
119 | {.offset = 111, .length = 3}, | |
120 | {.offset = 127, .length = 3}, | |
121 | {.offset = 143, .length = 3}, | |
122 | {.offset = 159, .length = 3}, | |
123 | {.offset = 175, .length = 3}, | |
124 | {.offset = 191, .length = 3}, | |
125 | {.offset = 207, .length = 3}, | |
126 | {.offset = 223, .length = 3}, | |
127 | {.offset = 239, .length = 3}, | |
128 | {.offset = 255, .length = 1} | |
129 | } | |
130 | }; | |
131 | ||
0c78e93b AV |
132 | /* |
133 | * ECC4 layout for NAND of pagesize 4096 bytes & OOBsize 224 bytes. 13*8 bytes | |
134 | * of OOB size is reserved for ECC, Byte no. 0 & 1 reserved for bad block & 118 | |
135 | * bytes are free for use. | |
136 | */ | |
137 | static struct nand_ecclayout fsmc_ecc4_224_layout = { | |
138 | .eccbytes = 104, | |
139 | .eccpos = { 2, 3, 4, 5, 6, 7, 8, | |
140 | 9, 10, 11, 12, 13, 14, | |
141 | 18, 19, 20, 21, 22, 23, 24, | |
142 | 25, 26, 27, 28, 29, 30, | |
143 | 34, 35, 36, 37, 38, 39, 40, | |
144 | 41, 42, 43, 44, 45, 46, | |
145 | 50, 51, 52, 53, 54, 55, 56, | |
146 | 57, 58, 59, 60, 61, 62, | |
147 | 66, 67, 68, 69, 70, 71, 72, | |
148 | 73, 74, 75, 76, 77, 78, | |
149 | 82, 83, 84, 85, 86, 87, 88, | |
150 | 89, 90, 91, 92, 93, 94, | |
151 | 98, 99, 100, 101, 102, 103, 104, | |
152 | 105, 106, 107, 108, 109, 110, | |
153 | 114, 115, 116, 117, 118, 119, 120, | |
154 | 121, 122, 123, 124, 125, 126 | |
155 | }, | |
156 | .oobfree = { | |
157 | {.offset = 15, .length = 3}, | |
158 | {.offset = 31, .length = 3}, | |
159 | {.offset = 47, .length = 3}, | |
160 | {.offset = 63, .length = 3}, | |
161 | {.offset = 79, .length = 3}, | |
162 | {.offset = 95, .length = 3}, | |
163 | {.offset = 111, .length = 3}, | |
164 | {.offset = 127, .length = 97} | |
165 | } | |
166 | }; | |
167 | ||
e29ee57b BY |
168 | /* |
169 | * ECC4 layout for NAND of pagesize 4096 bytes & OOBsize 128 bytes. 13*8 bytes | |
170 | * of OOB size is reserved for ECC, Byte no. 0 & 1 reserved for bad block & 22 | |
171 | * bytes are free for use. | |
172 | */ | |
173 | static struct nand_ecclayout fsmc_ecc4_128_layout = { | |
6c009ab8 LW |
174 | .eccbytes = 104, |
175 | .eccpos = { 2, 3, 4, 5, 6, 7, 8, | |
176 | 9, 10, 11, 12, 13, 14, | |
177 | 18, 19, 20, 21, 22, 23, 24, | |
178 | 25, 26, 27, 28, 29, 30, | |
179 | 34, 35, 36, 37, 38, 39, 40, | |
180 | 41, 42, 43, 44, 45, 46, | |
181 | 50, 51, 52, 53, 54, 55, 56, | |
182 | 57, 58, 59, 60, 61, 62, | |
183 | 66, 67, 68, 69, 70, 71, 72, | |
184 | 73, 74, 75, 76, 77, 78, | |
185 | 82, 83, 84, 85, 86, 87, 88, | |
186 | 89, 90, 91, 92, 93, 94, | |
187 | 98, 99, 100, 101, 102, 103, 104, | |
188 | 105, 106, 107, 108, 109, 110, | |
189 | 114, 115, 116, 117, 118, 119, 120, | |
190 | 121, 122, 123, 124, 125, 126 | |
191 | }, | |
192 | .oobfree = { | |
193 | {.offset = 15, .length = 3}, | |
194 | {.offset = 31, .length = 3}, | |
195 | {.offset = 47, .length = 3}, | |
196 | {.offset = 63, .length = 3}, | |
197 | {.offset = 79, .length = 3}, | |
198 | {.offset = 95, .length = 3}, | |
199 | {.offset = 111, .length = 3}, | |
200 | {.offset = 127, .length = 1} | |
201 | } | |
202 | }; | |
203 | ||
e29ee57b BY |
204 | /* |
205 | * ECC4 layout for NAND of pagesize 2048 bytes & OOBsize 64 bytes. 13*4 bytes of | |
206 | * OOB size is reserved for ECC, Byte no. 0 & 1 reserved for bad block and 10 | |
207 | * bytes are free for use. | |
208 | */ | |
209 | static struct nand_ecclayout fsmc_ecc4_64_layout = { | |
210 | .eccbytes = 52, | |
211 | .eccpos = { 2, 3, 4, 5, 6, 7, 8, | |
212 | 9, 10, 11, 12, 13, 14, | |
213 | 18, 19, 20, 21, 22, 23, 24, | |
214 | 25, 26, 27, 28, 29, 30, | |
215 | 34, 35, 36, 37, 38, 39, 40, | |
216 | 41, 42, 43, 44, 45, 46, | |
217 | 50, 51, 52, 53, 54, 55, 56, | |
218 | 57, 58, 59, 60, 61, 62, | |
219 | }, | |
220 | .oobfree = { | |
221 | {.offset = 15, .length = 3}, | |
222 | {.offset = 31, .length = 3}, | |
223 | {.offset = 47, .length = 3}, | |
224 | {.offset = 63, .length = 1}, | |
225 | } | |
226 | }; | |
227 | ||
228 | /* | |
229 | * ECC4 layout for NAND of pagesize 512 bytes & OOBsize 16 bytes. 13 bytes of | |
230 | * OOB size is reserved for ECC, Byte no. 4 & 5 reserved for bad block and One | |
231 | * byte is free for use. | |
232 | */ | |
233 | static struct nand_ecclayout fsmc_ecc4_16_layout = { | |
234 | .eccbytes = 13, | |
235 | .eccpos = { 0, 1, 2, 3, 6, 7, 8, | |
236 | 9, 10, 11, 12, 13, 14 | |
237 | }, | |
238 | .oobfree = { | |
239 | {.offset = 15, .length = 1}, | |
240 | } | |
241 | }; | |
242 | ||
6c009ab8 LW |
243 | /* |
244 | * ECC placement definitions in oobfree type format. | |
245 | * There are 13 bytes of ecc for every 512 byte block and it has to be read | |
246 | * consecutively and immediately after the 512 byte data block for hardware to | |
247 | * generate the error bit offsets in 512 byte data. | |
248 | * Managing the ecc bytes in the following way makes it easier for software to | |
249 | * read ecc bytes consecutive to data bytes. This way is similar to | |
250 | * oobfree structure maintained already in generic nand driver | |
251 | */ | |
252 | static struct fsmc_eccplace fsmc_ecc4_lp_place = { | |
253 | .eccplace = { | |
254 | {.offset = 2, .length = 13}, | |
255 | {.offset = 18, .length = 13}, | |
256 | {.offset = 34, .length = 13}, | |
257 | {.offset = 50, .length = 13}, | |
258 | {.offset = 66, .length = 13}, | |
259 | {.offset = 82, .length = 13}, | |
260 | {.offset = 98, .length = 13}, | |
261 | {.offset = 114, .length = 13} | |
262 | } | |
263 | }; | |
264 | ||
6c009ab8 LW |
265 | static struct fsmc_eccplace fsmc_ecc4_sp_place = { |
266 | .eccplace = { | |
267 | {.offset = 0, .length = 4}, | |
268 | {.offset = 6, .length = 9} | |
269 | } | |
270 | }; | |
271 | ||
6c009ab8 | 272 | /** |
593cd871 | 273 | * struct fsmc_nand_data - structure for FSMC NAND device state |
6c009ab8 | 274 | * |
593cd871 | 275 | * @pid: Part ID on the AMBA PrimeCell format |
6c009ab8 LW |
276 | * @mtd: MTD info for a NAND flash. |
277 | * @nand: Chip related info for a NAND flash. | |
71470324 VK |
278 | * @partitions: Partition info for a NAND Flash. |
279 | * @nr_partitions: Total number of partition of a NAND flash. | |
6c009ab8 LW |
280 | * |
281 | * @ecc_place: ECC placing locations in oobfree type format. | |
282 | * @bank: Bank number for probed device. | |
283 | * @clk: Clock structure for FSMC. | |
284 | * | |
285 | * @data_va: NAND port for Data. | |
286 | * @cmd_va: NAND port for Command. | |
287 | * @addr_va: NAND port for Address. | |
288 | * @regs_va: FSMC regs base address. | |
289 | */ | |
290 | struct fsmc_nand_data { | |
593cd871 | 291 | u32 pid; |
6c009ab8 LW |
292 | struct mtd_info mtd; |
293 | struct nand_chip nand; | |
71470324 VK |
294 | struct mtd_partition *partitions; |
295 | unsigned int nr_partitions; | |
6c009ab8 LW |
296 | |
297 | struct fsmc_eccplace *ecc_place; | |
298 | unsigned int bank; | |
299 | struct clk *clk; | |
300 | ||
301 | struct resource *resregs; | |
302 | struct resource *rescmd; | |
303 | struct resource *resaddr; | |
304 | struct resource *resdata; | |
305 | ||
306 | void __iomem *data_va; | |
307 | void __iomem *cmd_va; | |
308 | void __iomem *addr_va; | |
309 | void __iomem *regs_va; | |
310 | ||
311 | void (*select_chip)(uint32_t bank, uint32_t busw); | |
312 | }; | |
313 | ||
314 | /* Assert CS signal based on chipnr */ | |
315 | static void fsmc_select_chip(struct mtd_info *mtd, int chipnr) | |
316 | { | |
317 | struct nand_chip *chip = mtd->priv; | |
318 | struct fsmc_nand_data *host; | |
319 | ||
320 | host = container_of(mtd, struct fsmc_nand_data, mtd); | |
321 | ||
322 | switch (chipnr) { | |
323 | case -1: | |
324 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); | |
325 | break; | |
326 | case 0: | |
327 | case 1: | |
328 | case 2: | |
329 | case 3: | |
330 | if (host->select_chip) | |
331 | host->select_chip(chipnr, | |
332 | chip->options & NAND_BUSWIDTH_16); | |
333 | break; | |
334 | ||
335 | default: | |
336 | BUG(); | |
337 | } | |
338 | } | |
339 | ||
340 | /* | |
341 | * fsmc_cmd_ctrl - For facilitaing Hardware access | |
342 | * This routine allows hardware specific access to control-lines(ALE,CLE) | |
343 | */ | |
344 | static void fsmc_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) | |
345 | { | |
346 | struct nand_chip *this = mtd->priv; | |
347 | struct fsmc_nand_data *host = container_of(mtd, | |
348 | struct fsmc_nand_data, mtd); | |
349 | struct fsmc_regs *regs = host->regs_va; | |
350 | unsigned int bank = host->bank; | |
351 | ||
352 | if (ctrl & NAND_CTRL_CHANGE) { | |
353 | if (ctrl & NAND_CLE) { | |
354 | this->IO_ADDR_R = (void __iomem *)host->cmd_va; | |
355 | this->IO_ADDR_W = (void __iomem *)host->cmd_va; | |
356 | } else if (ctrl & NAND_ALE) { | |
357 | this->IO_ADDR_R = (void __iomem *)host->addr_va; | |
358 | this->IO_ADDR_W = (void __iomem *)host->addr_va; | |
359 | } else { | |
360 | this->IO_ADDR_R = (void __iomem *)host->data_va; | |
361 | this->IO_ADDR_W = (void __iomem *)host->data_va; | |
362 | } | |
363 | ||
364 | if (ctrl & NAND_NCE) { | |
365 | writel(readl(®s->bank_regs[bank].pc) | FSMC_ENABLE, | |
366 | ®s->bank_regs[bank].pc); | |
367 | } else { | |
368 | writel(readl(®s->bank_regs[bank].pc) & ~FSMC_ENABLE, | |
369 | ®s->bank_regs[bank].pc); | |
370 | } | |
371 | } | |
372 | ||
373 | mb(); | |
374 | ||
375 | if (cmd != NAND_CMD_NONE) | |
376 | writeb(cmd, this->IO_ADDR_W); | |
377 | } | |
378 | ||
379 | /* | |
380 | * fsmc_nand_setup - FSMC (Flexible Static Memory Controller) init routine | |
381 | * | |
382 | * This routine initializes timing parameters related to NAND memory access in | |
383 | * FSMC registers | |
384 | */ | |
385 | static void __init fsmc_nand_setup(struct fsmc_regs *regs, uint32_t bank, | |
386 | uint32_t busw) | |
387 | { | |
388 | uint32_t value = FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON; | |
389 | ||
390 | if (busw) | |
391 | writel(value | FSMC_DEVWID_16, ®s->bank_regs[bank].pc); | |
392 | else | |
393 | writel(value | FSMC_DEVWID_8, ®s->bank_regs[bank].pc); | |
394 | ||
395 | writel(readl(®s->bank_regs[bank].pc) | FSMC_TCLR_1 | FSMC_TAR_1, | |
396 | ®s->bank_regs[bank].pc); | |
397 | writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, | |
398 | ®s->bank_regs[bank].comm); | |
399 | writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, | |
400 | ®s->bank_regs[bank].attrib); | |
401 | } | |
402 | ||
403 | /* | |
404 | * fsmc_enable_hwecc - Enables Hardware ECC through FSMC registers | |
405 | */ | |
406 | static void fsmc_enable_hwecc(struct mtd_info *mtd, int mode) | |
407 | { | |
408 | struct fsmc_nand_data *host = container_of(mtd, | |
409 | struct fsmc_nand_data, mtd); | |
410 | struct fsmc_regs *regs = host->regs_va; | |
411 | uint32_t bank = host->bank; | |
412 | ||
413 | writel(readl(®s->bank_regs[bank].pc) & ~FSMC_ECCPLEN_256, | |
414 | ®s->bank_regs[bank].pc); | |
415 | writel(readl(®s->bank_regs[bank].pc) & ~FSMC_ECCEN, | |
416 | ®s->bank_regs[bank].pc); | |
417 | writel(readl(®s->bank_regs[bank].pc) | FSMC_ECCEN, | |
418 | ®s->bank_regs[bank].pc); | |
419 | } | |
420 | ||
421 | /* | |
422 | * fsmc_read_hwecc_ecc4 - Hardware ECC calculator for ecc4 option supported by | |
25985edc | 423 | * FSMC. ECC is 13 bytes for 512 bytes of data (supports error correction up to |
6c009ab8 LW |
424 | * max of 8-bits) |
425 | */ | |
426 | static int fsmc_read_hwecc_ecc4(struct mtd_info *mtd, const uint8_t *data, | |
427 | uint8_t *ecc) | |
428 | { | |
429 | struct fsmc_nand_data *host = container_of(mtd, | |
430 | struct fsmc_nand_data, mtd); | |
431 | struct fsmc_regs *regs = host->regs_va; | |
432 | uint32_t bank = host->bank; | |
433 | uint32_t ecc_tmp; | |
434 | unsigned long deadline = jiffies + FSMC_BUSY_WAIT_TIMEOUT; | |
435 | ||
436 | do { | |
437 | if (readl(®s->bank_regs[bank].sts) & FSMC_CODE_RDY) | |
438 | break; | |
439 | else | |
440 | cond_resched(); | |
441 | } while (!time_after_eq(jiffies, deadline)); | |
442 | ||
443 | ecc_tmp = readl(®s->bank_regs[bank].ecc1); | |
444 | ecc[0] = (uint8_t) (ecc_tmp >> 0); | |
445 | ecc[1] = (uint8_t) (ecc_tmp >> 8); | |
446 | ecc[2] = (uint8_t) (ecc_tmp >> 16); | |
447 | ecc[3] = (uint8_t) (ecc_tmp >> 24); | |
448 | ||
449 | ecc_tmp = readl(®s->bank_regs[bank].ecc2); | |
450 | ecc[4] = (uint8_t) (ecc_tmp >> 0); | |
451 | ecc[5] = (uint8_t) (ecc_tmp >> 8); | |
452 | ecc[6] = (uint8_t) (ecc_tmp >> 16); | |
453 | ecc[7] = (uint8_t) (ecc_tmp >> 24); | |
454 | ||
455 | ecc_tmp = readl(®s->bank_regs[bank].ecc3); | |
456 | ecc[8] = (uint8_t) (ecc_tmp >> 0); | |
457 | ecc[9] = (uint8_t) (ecc_tmp >> 8); | |
458 | ecc[10] = (uint8_t) (ecc_tmp >> 16); | |
459 | ecc[11] = (uint8_t) (ecc_tmp >> 24); | |
460 | ||
461 | ecc_tmp = readl(®s->bank_regs[bank].sts); | |
462 | ecc[12] = (uint8_t) (ecc_tmp >> 16); | |
463 | ||
464 | return 0; | |
465 | } | |
466 | ||
467 | /* | |
468 | * fsmc_read_hwecc_ecc1 - Hardware ECC calculator for ecc1 option supported by | |
25985edc | 469 | * FSMC. ECC is 3 bytes for 512 bytes of data (supports error correction up to |
6c009ab8 LW |
470 | * max of 1-bit) |
471 | */ | |
472 | static int fsmc_read_hwecc_ecc1(struct mtd_info *mtd, const uint8_t *data, | |
473 | uint8_t *ecc) | |
474 | { | |
475 | struct fsmc_nand_data *host = container_of(mtd, | |
476 | struct fsmc_nand_data, mtd); | |
477 | struct fsmc_regs *regs = host->regs_va; | |
478 | uint32_t bank = host->bank; | |
479 | uint32_t ecc_tmp; | |
480 | ||
481 | ecc_tmp = readl(®s->bank_regs[bank].ecc1); | |
482 | ecc[0] = (uint8_t) (ecc_tmp >> 0); | |
483 | ecc[1] = (uint8_t) (ecc_tmp >> 8); | |
484 | ecc[2] = (uint8_t) (ecc_tmp >> 16); | |
485 | ||
486 | return 0; | |
487 | } | |
488 | ||
519300cf VK |
489 | /* Count the number of 0's in buff upto a max of max_bits */ |
490 | static int count_written_bits(uint8_t *buff, int size, int max_bits) | |
491 | { | |
492 | int k, written_bits = 0; | |
493 | ||
494 | for (k = 0; k < size; k++) { | |
495 | written_bits += hweight8(~buff[k]); | |
496 | if (written_bits > max_bits) | |
497 | break; | |
498 | } | |
499 | ||
500 | return written_bits; | |
501 | } | |
502 | ||
6c009ab8 LW |
503 | /* |
504 | * fsmc_read_page_hwecc | |
505 | * @mtd: mtd info structure | |
506 | * @chip: nand chip info structure | |
507 | * @buf: buffer to store read data | |
508 | * @page: page number to read | |
509 | * | |
25985edc | 510 | * This routine is needed for fsmc version 8 as reading from NAND chip has to be |
6c009ab8 LW |
511 | * performed in a strict sequence as follows: |
512 | * data(512 byte) -> ecc(13 byte) | |
25985edc | 513 | * After this read, fsmc hardware generates and reports error data bits(up to a |
6c009ab8 LW |
514 | * max of 8 bits) |
515 | */ | |
516 | static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, | |
517 | uint8_t *buf, int page) | |
518 | { | |
519 | struct fsmc_nand_data *host = container_of(mtd, | |
520 | struct fsmc_nand_data, mtd); | |
521 | struct fsmc_eccplace *ecc_place = host->ecc_place; | |
522 | int i, j, s, stat, eccsize = chip->ecc.size; | |
523 | int eccbytes = chip->ecc.bytes; | |
524 | int eccsteps = chip->ecc.steps; | |
525 | uint8_t *p = buf; | |
526 | uint8_t *ecc_calc = chip->buffers->ecccalc; | |
527 | uint8_t *ecc_code = chip->buffers->ecccode; | |
528 | int off, len, group = 0; | |
529 | /* | |
530 | * ecc_oob is intentionally taken as uint16_t. In 16bit devices, we | |
531 | * end up reading 14 bytes (7 words) from oob. The local array is | |
532 | * to maintain word alignment | |
533 | */ | |
534 | uint16_t ecc_oob[7]; | |
535 | uint8_t *oob = (uint8_t *)&ecc_oob[0]; | |
536 | ||
537 | for (i = 0, s = 0; s < eccsteps; s++, i += eccbytes, p += eccsize) { | |
6c009ab8 LW |
538 | chip->cmdfunc(mtd, NAND_CMD_READ0, s * eccsize, page); |
539 | chip->ecc.hwctl(mtd, NAND_ECC_READ); | |
540 | chip->read_buf(mtd, p, eccsize); | |
541 | ||
542 | for (j = 0; j < eccbytes;) { | |
543 | off = ecc_place->eccplace[group].offset; | |
544 | len = ecc_place->eccplace[group].length; | |
545 | group++; | |
546 | ||
547 | /* | |
548 | * length is intentionally kept a higher multiple of 2 | |
549 | * to read at least 13 bytes even in case of 16 bit NAND | |
550 | * devices | |
551 | */ | |
552 | len = roundup(len, 2); | |
553 | chip->cmdfunc(mtd, NAND_CMD_READOOB, off, page); | |
554 | chip->read_buf(mtd, oob + j, len); | |
555 | j += len; | |
556 | } | |
557 | ||
519300cf | 558 | memcpy(&ecc_code[i], oob, chip->ecc.bytes); |
6c009ab8 LW |
559 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
560 | ||
561 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); | |
562 | if (stat < 0) | |
563 | mtd->ecc_stats.failed++; | |
564 | else | |
565 | mtd->ecc_stats.corrected += stat; | |
566 | } | |
567 | ||
568 | return 0; | |
569 | } | |
570 | ||
571 | /* | |
753e0139 | 572 | * fsmc_bch8_correct_data |
6c009ab8 LW |
573 | * @mtd: mtd info structure |
574 | * @dat: buffer of read data | |
575 | * @read_ecc: ecc read from device spare area | |
576 | * @calc_ecc: ecc calculated from read data | |
577 | * | |
578 | * calc_ecc is a 104 bit information containing maximum of 8 error | |
579 | * offset informations of 13 bits each in 512 bytes of read data. | |
580 | */ | |
753e0139 | 581 | static int fsmc_bch8_correct_data(struct mtd_info *mtd, uint8_t *dat, |
6c009ab8 LW |
582 | uint8_t *read_ecc, uint8_t *calc_ecc) |
583 | { | |
584 | struct fsmc_nand_data *host = container_of(mtd, | |
585 | struct fsmc_nand_data, mtd); | |
519300cf | 586 | struct nand_chip *chip = mtd->priv; |
6c009ab8 LW |
587 | struct fsmc_regs *regs = host->regs_va; |
588 | unsigned int bank = host->bank; | |
a612c2ae | 589 | uint32_t err_idx[8]; |
6c009ab8 | 590 | uint32_t num_err, i; |
753e0139 | 591 | uint32_t ecc1, ecc2, ecc3, ecc4; |
6c009ab8 | 592 | |
519300cf VK |
593 | num_err = (readl(®s->bank_regs[bank].sts) >> 10) & 0xF; |
594 | ||
595 | /* no bit flipping */ | |
596 | if (likely(num_err == 0)) | |
597 | return 0; | |
598 | ||
599 | /* too many errors */ | |
600 | if (unlikely(num_err > 8)) { | |
601 | /* | |
602 | * This is a temporary erase check. A newly erased page read | |
603 | * would result in an ecc error because the oob data is also | |
604 | * erased to FF and the calculated ecc for an FF data is not | |
605 | * FF..FF. | |
606 | * This is a workaround to skip performing correction in case | |
607 | * data is FF..FF | |
608 | * | |
609 | * Logic: | |
610 | * For every page, each bit written as 0 is counted until these | |
611 | * number of bits are greater than 8 (the maximum correction | |
612 | * capability of FSMC for each 512 + 13 bytes) | |
613 | */ | |
614 | ||
615 | int bits_ecc = count_written_bits(read_ecc, chip->ecc.bytes, 8); | |
616 | int bits_data = count_written_bits(dat, chip->ecc.size, 8); | |
617 | ||
618 | if ((bits_ecc + bits_data) <= 8) { | |
619 | if (bits_data) | |
620 | memset(dat, 0xff, chip->ecc.size); | |
621 | return bits_data; | |
622 | } | |
623 | ||
624 | return -EBADMSG; | |
625 | } | |
626 | ||
6c009ab8 LW |
627 | /* |
628 | * ------------------- calc_ecc[] bit wise -----------|--13 bits--| | |
629 | * |---idx[7]--|--.....-----|---idx[2]--||---idx[1]--||---idx[0]--| | |
630 | * | |
631 | * calc_ecc is a 104 bit information containing maximum of 8 error | |
632 | * offset informations of 13 bits each. calc_ecc is copied into a | |
633 | * uint64_t array and error offset indexes are populated in err_idx | |
634 | * array | |
635 | */ | |
753e0139 AV |
636 | ecc1 = readl(®s->bank_regs[bank].ecc1); |
637 | ecc2 = readl(®s->bank_regs[bank].ecc2); | |
638 | ecc3 = readl(®s->bank_regs[bank].ecc3); | |
639 | ecc4 = readl(®s->bank_regs[bank].sts); | |
640 | ||
641 | err_idx[0] = (ecc1 >> 0) & 0x1FFF; | |
642 | err_idx[1] = (ecc1 >> 13) & 0x1FFF; | |
643 | err_idx[2] = (((ecc2 >> 0) & 0x7F) << 6) | ((ecc1 >> 26) & 0x3F); | |
644 | err_idx[3] = (ecc2 >> 7) & 0x1FFF; | |
645 | err_idx[4] = (((ecc3 >> 0) & 0x1) << 12) | ((ecc2 >> 20) & 0xFFF); | |
646 | err_idx[5] = (ecc3 >> 1) & 0x1FFF; | |
647 | err_idx[6] = (ecc3 >> 14) & 0x1FFF; | |
648 | err_idx[7] = (((ecc4 >> 16) & 0xFF) << 5) | ((ecc3 >> 27) & 0x1F); | |
6c009ab8 LW |
649 | |
650 | i = 0; | |
651 | while (num_err--) { | |
652 | change_bit(0, (unsigned long *)&err_idx[i]); | |
653 | change_bit(1, (unsigned long *)&err_idx[i]); | |
654 | ||
519300cf | 655 | if (err_idx[i] <= chip->ecc.size * 8) { |
6c009ab8 LW |
656 | change_bit(err_idx[i], (unsigned long *)dat); |
657 | i++; | |
658 | } | |
659 | } | |
660 | return i; | |
661 | } | |
662 | ||
663 | /* | |
664 | * fsmc_nand_probe - Probe function | |
665 | * @pdev: platform device structure | |
666 | */ | |
667 | static int __init fsmc_nand_probe(struct platform_device *pdev) | |
668 | { | |
669 | struct fsmc_nand_platform_data *pdata = dev_get_platdata(&pdev->dev); | |
670 | struct fsmc_nand_data *host; | |
671 | struct mtd_info *mtd; | |
672 | struct nand_chip *nand; | |
673 | struct fsmc_regs *regs; | |
674 | struct resource *res; | |
4ad916bc | 675 | int ret = 0; |
593cd871 LW |
676 | u32 pid; |
677 | int i; | |
6c009ab8 LW |
678 | |
679 | if (!pdata) { | |
680 | dev_err(&pdev->dev, "platform data is NULL\n"); | |
681 | return -EINVAL; | |
682 | } | |
683 | ||
684 | /* Allocate memory for the device structure (and zero it) */ | |
685 | host = kzalloc(sizeof(*host), GFP_KERNEL); | |
686 | if (!host) { | |
687 | dev_err(&pdev->dev, "failed to allocate device structure\n"); | |
688 | return -ENOMEM; | |
689 | } | |
690 | ||
691 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_data"); | |
692 | if (!res) { | |
693 | ret = -EIO; | |
694 | goto err_probe1; | |
695 | } | |
696 | ||
697 | host->resdata = request_mem_region(res->start, resource_size(res), | |
698 | pdev->name); | |
699 | if (!host->resdata) { | |
700 | ret = -EIO; | |
701 | goto err_probe1; | |
702 | } | |
703 | ||
704 | host->data_va = ioremap(res->start, resource_size(res)); | |
705 | if (!host->data_va) { | |
706 | ret = -EIO; | |
707 | goto err_probe1; | |
708 | } | |
709 | ||
b2acc92e | 710 | host->resaddr = request_mem_region(res->start + pdata->ale_off, |
6c009ab8 LW |
711 | resource_size(res), pdev->name); |
712 | if (!host->resaddr) { | |
713 | ret = -EIO; | |
714 | goto err_probe1; | |
715 | } | |
716 | ||
b2acc92e SH |
717 | host->addr_va = ioremap(res->start + pdata->ale_off, |
718 | resource_size(res)); | |
6c009ab8 LW |
719 | if (!host->addr_va) { |
720 | ret = -EIO; | |
721 | goto err_probe1; | |
722 | } | |
723 | ||
b2acc92e | 724 | host->rescmd = request_mem_region(res->start + pdata->cle_off, |
6c009ab8 LW |
725 | resource_size(res), pdev->name); |
726 | if (!host->rescmd) { | |
727 | ret = -EIO; | |
728 | goto err_probe1; | |
729 | } | |
730 | ||
b2acc92e | 731 | host->cmd_va = ioremap(res->start + pdata->cle_off, resource_size(res)); |
6c009ab8 LW |
732 | if (!host->cmd_va) { |
733 | ret = -EIO; | |
734 | goto err_probe1; | |
735 | } | |
736 | ||
737 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fsmc_regs"); | |
738 | if (!res) { | |
739 | ret = -EIO; | |
740 | goto err_probe1; | |
741 | } | |
742 | ||
743 | host->resregs = request_mem_region(res->start, resource_size(res), | |
744 | pdev->name); | |
745 | if (!host->resregs) { | |
746 | ret = -EIO; | |
747 | goto err_probe1; | |
748 | } | |
749 | ||
750 | host->regs_va = ioremap(res->start, resource_size(res)); | |
751 | if (!host->regs_va) { | |
752 | ret = -EIO; | |
753 | goto err_probe1; | |
754 | } | |
755 | ||
756 | host->clk = clk_get(&pdev->dev, NULL); | |
757 | if (IS_ERR(host->clk)) { | |
758 | dev_err(&pdev->dev, "failed to fetch block clock\n"); | |
759 | ret = PTR_ERR(host->clk); | |
760 | host->clk = NULL; | |
761 | goto err_probe1; | |
762 | } | |
763 | ||
764 | ret = clk_enable(host->clk); | |
765 | if (ret) | |
766 | goto err_probe1; | |
767 | ||
593cd871 LW |
768 | /* |
769 | * This device ID is actually a common AMBA ID as used on the | |
770 | * AMBA PrimeCell bus. However it is not a PrimeCell. | |
771 | */ | |
772 | for (pid = 0, i = 0; i < 4; i++) | |
773 | pid |= (readl(host->regs_va + resource_size(res) - 0x20 + 4 * i) & 255) << (i * 8); | |
774 | host->pid = pid; | |
775 | dev_info(&pdev->dev, "FSMC device partno %03x, manufacturer %02x, " | |
776 | "revision %02x, config %02x\n", | |
777 | AMBA_PART_BITS(pid), AMBA_MANF_BITS(pid), | |
778 | AMBA_REV_BITS(pid), AMBA_CONFIG_BITS(pid)); | |
779 | ||
6c009ab8 LW |
780 | host->bank = pdata->bank; |
781 | host->select_chip = pdata->select_bank; | |
71470324 VK |
782 | host->partitions = pdata->partitions; |
783 | host->nr_partitions = pdata->nr_partitions; | |
6c009ab8 LW |
784 | regs = host->regs_va; |
785 | ||
786 | /* Link all private pointers */ | |
787 | mtd = &host->mtd; | |
788 | nand = &host->nand; | |
789 | mtd->priv = nand; | |
790 | nand->priv = host; | |
791 | ||
792 | host->mtd.owner = THIS_MODULE; | |
793 | nand->IO_ADDR_R = host->data_va; | |
794 | nand->IO_ADDR_W = host->data_va; | |
795 | nand->cmd_ctrl = fsmc_cmd_ctrl; | |
796 | nand->chip_delay = 30; | |
797 | ||
798 | nand->ecc.mode = NAND_ECC_HW; | |
799 | nand->ecc.hwctl = fsmc_enable_hwecc; | |
800 | nand->ecc.size = 512; | |
801 | nand->options = pdata->options; | |
802 | nand->select_chip = fsmc_select_chip; | |
803 | ||
804 | if (pdata->width == FSMC_NAND_BW16) | |
805 | nand->options |= NAND_BUSWIDTH_16; | |
806 | ||
807 | fsmc_nand_setup(regs, host->bank, nand->options & NAND_BUSWIDTH_16); | |
808 | ||
593cd871 | 809 | if (AMBA_REV_BITS(host->pid) >= 8) { |
6c009ab8 LW |
810 | nand->ecc.read_page = fsmc_read_page_hwecc; |
811 | nand->ecc.calculate = fsmc_read_hwecc_ecc4; | |
753e0139 | 812 | nand->ecc.correct = fsmc_bch8_correct_data; |
6c009ab8 | 813 | nand->ecc.bytes = 13; |
6a918bad | 814 | nand->ecc.strength = 8; |
6c009ab8 LW |
815 | } else { |
816 | nand->ecc.calculate = fsmc_read_hwecc_ecc1; | |
817 | nand->ecc.correct = nand_correct_data; | |
818 | nand->ecc.bytes = 3; | |
6a918bad | 819 | nand->ecc.strength = 1; |
6c009ab8 LW |
820 | } |
821 | ||
822 | /* | |
25985edc | 823 | * Scan to find existence of the device |
6c009ab8 LW |
824 | */ |
825 | if (nand_scan_ident(&host->mtd, 1, NULL)) { | |
826 | ret = -ENXIO; | |
827 | dev_err(&pdev->dev, "No NAND Device found!\n"); | |
828 | goto err_probe; | |
829 | } | |
830 | ||
593cd871 | 831 | if (AMBA_REV_BITS(host->pid) >= 8) { |
e29ee57b BY |
832 | switch (host->mtd.oobsize) { |
833 | case 16: | |
834 | nand->ecc.layout = &fsmc_ecc4_16_layout; | |
6c009ab8 | 835 | host->ecc_place = &fsmc_ecc4_sp_place; |
e29ee57b BY |
836 | break; |
837 | case 64: | |
838 | nand->ecc.layout = &fsmc_ecc4_64_layout; | |
839 | host->ecc_place = &fsmc_ecc4_lp_place; | |
840 | break; | |
841 | case 128: | |
842 | nand->ecc.layout = &fsmc_ecc4_128_layout; | |
843 | host->ecc_place = &fsmc_ecc4_lp_place; | |
844 | break; | |
0c78e93b AV |
845 | case 224: |
846 | nand->ecc.layout = &fsmc_ecc4_224_layout; | |
847 | host->ecc_place = &fsmc_ecc4_lp_place; | |
848 | break; | |
e29ee57b BY |
849 | case 256: |
850 | nand->ecc.layout = &fsmc_ecc4_256_layout; | |
6c009ab8 | 851 | host->ecc_place = &fsmc_ecc4_lp_place; |
e29ee57b BY |
852 | break; |
853 | default: | |
854 | printk(KERN_WARNING "No oob scheme defined for " | |
855 | "oobsize %d\n", mtd->oobsize); | |
856 | BUG(); | |
6c009ab8 LW |
857 | } |
858 | } else { | |
e29ee57b BY |
859 | switch (host->mtd.oobsize) { |
860 | case 16: | |
861 | nand->ecc.layout = &fsmc_ecc1_16_layout; | |
862 | break; | |
863 | case 64: | |
864 | nand->ecc.layout = &fsmc_ecc1_64_layout; | |
865 | break; | |
866 | case 128: | |
867 | nand->ecc.layout = &fsmc_ecc1_128_layout; | |
868 | break; | |
869 | default: | |
870 | printk(KERN_WARNING "No oob scheme defined for " | |
871 | "oobsize %d\n", mtd->oobsize); | |
872 | BUG(); | |
873 | } | |
6c009ab8 LW |
874 | } |
875 | ||
876 | /* Second stage of scan to fill MTD data-structures */ | |
877 | if (nand_scan_tail(&host->mtd)) { | |
878 | ret = -ENXIO; | |
879 | goto err_probe; | |
880 | } | |
881 | ||
882 | /* | |
883 | * The partition information can is accessed by (in the same precedence) | |
884 | * | |
885 | * command line through Bootloader, | |
886 | * platform data, | |
887 | * default partition information present in driver. | |
888 | */ | |
6c009ab8 | 889 | /* |
8d3f8bb8 | 890 | * Check for partition info passed |
6c009ab8 LW |
891 | */ |
892 | host->mtd.name = "nand"; | |
42d7fbe2 | 893 | ret = mtd_device_parse_register(&host->mtd, NULL, NULL, |
71470324 | 894 | host->partitions, host->nr_partitions); |
99335d00 | 895 | if (ret) |
6c009ab8 | 896 | goto err_probe; |
6c009ab8 LW |
897 | |
898 | platform_set_drvdata(pdev, host); | |
899 | dev_info(&pdev->dev, "FSMC NAND driver registration successful\n"); | |
900 | return 0; | |
901 | ||
902 | err_probe: | |
903 | clk_disable(host->clk); | |
904 | err_probe1: | |
905 | if (host->clk) | |
906 | clk_put(host->clk); | |
907 | if (host->regs_va) | |
908 | iounmap(host->regs_va); | |
909 | if (host->resregs) | |
910 | release_mem_region(host->resregs->start, | |
911 | resource_size(host->resregs)); | |
912 | if (host->cmd_va) | |
913 | iounmap(host->cmd_va); | |
914 | if (host->rescmd) | |
915 | release_mem_region(host->rescmd->start, | |
916 | resource_size(host->rescmd)); | |
917 | if (host->addr_va) | |
918 | iounmap(host->addr_va); | |
919 | if (host->resaddr) | |
920 | release_mem_region(host->resaddr->start, | |
921 | resource_size(host->resaddr)); | |
922 | if (host->data_va) | |
923 | iounmap(host->data_va); | |
924 | if (host->resdata) | |
925 | release_mem_region(host->resdata->start, | |
926 | resource_size(host->resdata)); | |
927 | ||
928 | kfree(host); | |
929 | return ret; | |
930 | } | |
931 | ||
932 | /* | |
933 | * Clean up routine | |
934 | */ | |
935 | static int fsmc_nand_remove(struct platform_device *pdev) | |
936 | { | |
937 | struct fsmc_nand_data *host = platform_get_drvdata(pdev); | |
938 | ||
939 | platform_set_drvdata(pdev, NULL); | |
940 | ||
941 | if (host) { | |
82e023ab | 942 | nand_release(&host->mtd); |
6c009ab8 LW |
943 | clk_disable(host->clk); |
944 | clk_put(host->clk); | |
945 | ||
946 | iounmap(host->regs_va); | |
947 | release_mem_region(host->resregs->start, | |
948 | resource_size(host->resregs)); | |
949 | iounmap(host->cmd_va); | |
950 | release_mem_region(host->rescmd->start, | |
951 | resource_size(host->rescmd)); | |
952 | iounmap(host->addr_va); | |
953 | release_mem_region(host->resaddr->start, | |
954 | resource_size(host->resaddr)); | |
955 | iounmap(host->data_va); | |
956 | release_mem_region(host->resdata->start, | |
957 | resource_size(host->resdata)); | |
958 | ||
959 | kfree(host); | |
960 | } | |
961 | return 0; | |
962 | } | |
963 | ||
964 | #ifdef CONFIG_PM | |
965 | static int fsmc_nand_suspend(struct device *dev) | |
966 | { | |
967 | struct fsmc_nand_data *host = dev_get_drvdata(dev); | |
968 | if (host) | |
969 | clk_disable(host->clk); | |
970 | return 0; | |
971 | } | |
972 | ||
973 | static int fsmc_nand_resume(struct device *dev) | |
974 | { | |
975 | struct fsmc_nand_data *host = dev_get_drvdata(dev); | |
976 | if (host) | |
977 | clk_enable(host->clk); | |
978 | return 0; | |
979 | } | |
980 | ||
981 | static const struct dev_pm_ops fsmc_nand_pm_ops = { | |
982 | .suspend = fsmc_nand_suspend, | |
983 | .resume = fsmc_nand_resume, | |
984 | }; | |
985 | #endif | |
986 | ||
987 | static struct platform_driver fsmc_nand_driver = { | |
988 | .remove = fsmc_nand_remove, | |
989 | .driver = { | |
990 | .owner = THIS_MODULE, | |
991 | .name = "fsmc-nand", | |
992 | #ifdef CONFIG_PM | |
993 | .pm = &fsmc_nand_pm_ops, | |
994 | #endif | |
995 | }, | |
996 | }; | |
997 | ||
998 | static int __init fsmc_nand_init(void) | |
999 | { | |
1000 | return platform_driver_probe(&fsmc_nand_driver, | |
1001 | fsmc_nand_probe); | |
1002 | } | |
1003 | module_init(fsmc_nand_init); | |
1004 | ||
1005 | static void __exit fsmc_nand_exit(void) | |
1006 | { | |
1007 | platform_driver_unregister(&fsmc_nand_driver); | |
1008 | } | |
1009 | module_exit(fsmc_nand_exit); | |
1010 | ||
1011 | MODULE_LICENSE("GPL"); | |
1012 | MODULE_AUTHOR("Vipin Kumar <vipin.kumar@st.com>, Ashish Priyadarshi"); | |
1013 | MODULE_DESCRIPTION("NAND driver for SPEAr Platforms"); |