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Commit | Line | Data |
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6c009ab8 LW |
1 | /* |
2 | * drivers/mtd/nand/fsmc_nand.c | |
3 | * | |
4 | * ST Microelectronics | |
5 | * Flexible Static Memory Controller (FSMC) | |
6 | * Driver for NAND portions | |
7 | * | |
8 | * Copyright © 2010 ST Microelectronics | |
9 | * Vipin Kumar <vipin.kumar@st.com> | |
10 | * Ashish Priyadarshi | |
11 | * | |
12 | * Based on drivers/mtd/nand/nomadik_nand.c | |
13 | * | |
14 | * This file is licensed under the terms of the GNU General Public | |
15 | * License version 2. This program is licensed "as is" without any | |
16 | * warranty of any kind, whether express or implied. | |
17 | */ | |
18 | ||
19 | #include <linux/clk.h> | |
20 | #include <linux/err.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/resource.h> | |
24 | #include <linux/sched.h> | |
25 | #include <linux/types.h> | |
26 | #include <linux/mtd/mtd.h> | |
27 | #include <linux/mtd/nand.h> | |
28 | #include <linux/mtd/nand_ecc.h> | |
29 | #include <linux/platform_device.h> | |
30 | #include <linux/mtd/partitions.h> | |
31 | #include <linux/io.h> | |
32 | #include <linux/slab.h> | |
33 | #include <linux/mtd/fsmc.h> | |
593cd871 | 34 | #include <linux/amba/bus.h> |
6c009ab8 LW |
35 | #include <mtd/mtd-abi.h> |
36 | ||
37 | static struct nand_ecclayout fsmc_ecc1_layout = { | |
38 | .eccbytes = 24, | |
39 | .eccpos = {2, 3, 4, 18, 19, 20, 34, 35, 36, 50, 51, 52, | |
40 | 66, 67, 68, 82, 83, 84, 98, 99, 100, 114, 115, 116}, | |
41 | .oobfree = { | |
42 | {.offset = 8, .length = 8}, | |
43 | {.offset = 24, .length = 8}, | |
44 | {.offset = 40, .length = 8}, | |
45 | {.offset = 56, .length = 8}, | |
46 | {.offset = 72, .length = 8}, | |
47 | {.offset = 88, .length = 8}, | |
48 | {.offset = 104, .length = 8}, | |
49 | {.offset = 120, .length = 8} | |
50 | } | |
51 | }; | |
52 | ||
53 | static struct nand_ecclayout fsmc_ecc4_lp_layout = { | |
54 | .eccbytes = 104, | |
55 | .eccpos = { 2, 3, 4, 5, 6, 7, 8, | |
56 | 9, 10, 11, 12, 13, 14, | |
57 | 18, 19, 20, 21, 22, 23, 24, | |
58 | 25, 26, 27, 28, 29, 30, | |
59 | 34, 35, 36, 37, 38, 39, 40, | |
60 | 41, 42, 43, 44, 45, 46, | |
61 | 50, 51, 52, 53, 54, 55, 56, | |
62 | 57, 58, 59, 60, 61, 62, | |
63 | 66, 67, 68, 69, 70, 71, 72, | |
64 | 73, 74, 75, 76, 77, 78, | |
65 | 82, 83, 84, 85, 86, 87, 88, | |
66 | 89, 90, 91, 92, 93, 94, | |
67 | 98, 99, 100, 101, 102, 103, 104, | |
68 | 105, 106, 107, 108, 109, 110, | |
69 | 114, 115, 116, 117, 118, 119, 120, | |
70 | 121, 122, 123, 124, 125, 126 | |
71 | }, | |
72 | .oobfree = { | |
73 | {.offset = 15, .length = 3}, | |
74 | {.offset = 31, .length = 3}, | |
75 | {.offset = 47, .length = 3}, | |
76 | {.offset = 63, .length = 3}, | |
77 | {.offset = 79, .length = 3}, | |
78 | {.offset = 95, .length = 3}, | |
79 | {.offset = 111, .length = 3}, | |
80 | {.offset = 127, .length = 1} | |
81 | } | |
82 | }; | |
83 | ||
84 | /* | |
85 | * ECC placement definitions in oobfree type format. | |
86 | * There are 13 bytes of ecc for every 512 byte block and it has to be read | |
87 | * consecutively and immediately after the 512 byte data block for hardware to | |
88 | * generate the error bit offsets in 512 byte data. | |
89 | * Managing the ecc bytes in the following way makes it easier for software to | |
90 | * read ecc bytes consecutive to data bytes. This way is similar to | |
91 | * oobfree structure maintained already in generic nand driver | |
92 | */ | |
93 | static struct fsmc_eccplace fsmc_ecc4_lp_place = { | |
94 | .eccplace = { | |
95 | {.offset = 2, .length = 13}, | |
96 | {.offset = 18, .length = 13}, | |
97 | {.offset = 34, .length = 13}, | |
98 | {.offset = 50, .length = 13}, | |
99 | {.offset = 66, .length = 13}, | |
100 | {.offset = 82, .length = 13}, | |
101 | {.offset = 98, .length = 13}, | |
102 | {.offset = 114, .length = 13} | |
103 | } | |
104 | }; | |
105 | ||
106 | static struct nand_ecclayout fsmc_ecc4_sp_layout = { | |
107 | .eccbytes = 13, | |
108 | .eccpos = { 0, 1, 2, 3, 6, 7, 8, | |
109 | 9, 10, 11, 12, 13, 14 | |
110 | }, | |
111 | .oobfree = { | |
112 | {.offset = 15, .length = 1}, | |
113 | } | |
114 | }; | |
115 | ||
116 | static struct fsmc_eccplace fsmc_ecc4_sp_place = { | |
117 | .eccplace = { | |
118 | {.offset = 0, .length = 4}, | |
119 | {.offset = 6, .length = 9} | |
120 | } | |
121 | }; | |
122 | ||
6c009ab8 | 123 | /* |
4ad916bc LW |
124 | * Default partition tables to be used if the partition information not |
125 | * provided through platform data. | |
126 | * | |
6c009ab8 LW |
127 | * Default partition layout for small page(= 512 bytes) devices |
128 | * Size for "Root file system" is updated in driver based on actual device size | |
129 | */ | |
130 | static struct mtd_partition partition_info_16KB_blk[] = { | |
4ad916bc LW |
131 | { |
132 | .name = "X-loader", | |
133 | .offset = 0, | |
134 | .size = 4*0x4000, | |
135 | }, | |
136 | { | |
137 | .name = "U-Boot", | |
138 | .offset = 0x10000, | |
139 | .size = 20*0x4000, | |
140 | }, | |
141 | { | |
142 | .name = "Kernel", | |
143 | .offset = 0x60000, | |
144 | .size = 256*0x4000, | |
145 | }, | |
146 | { | |
147 | .name = "Root File System", | |
148 | .offset = 0x460000, | |
149 | .size = 0, | |
150 | }, | |
6c009ab8 LW |
151 | }; |
152 | ||
153 | /* | |
154 | * Default partition layout for large page(> 512 bytes) devices | |
155 | * Size for "Root file system" is updated in driver based on actual device size | |
156 | */ | |
157 | static struct mtd_partition partition_info_128KB_blk[] = { | |
4ad916bc LW |
158 | { |
159 | .name = "X-loader", | |
160 | .offset = 0, | |
161 | .size = 4*0x20000, | |
162 | }, | |
163 | { | |
164 | .name = "U-Boot", | |
165 | .offset = 0x80000, | |
166 | .size = 12*0x20000, | |
167 | }, | |
168 | { | |
169 | .name = "Kernel", | |
170 | .offset = 0x200000, | |
171 | .size = 48*0x20000, | |
172 | }, | |
173 | { | |
174 | .name = "Root File System", | |
175 | .offset = 0x800000, | |
176 | .size = 0, | |
177 | }, | |
6c009ab8 LW |
178 | }; |
179 | ||
180 | #ifdef CONFIG_MTD_CMDLINE_PARTS | |
181 | const char *part_probes[] = { "cmdlinepart", NULL }; | |
182 | #endif | |
183 | ||
184 | /** | |
593cd871 | 185 | * struct fsmc_nand_data - structure for FSMC NAND device state |
6c009ab8 | 186 | * |
593cd871 | 187 | * @pid: Part ID on the AMBA PrimeCell format |
6c009ab8 LW |
188 | * @mtd: MTD info for a NAND flash. |
189 | * @nand: Chip related info for a NAND flash. | |
190 | * @partitions: Partition info for a NAND Flash. | |
191 | * @nr_partitions: Total number of partition of a NAND flash. | |
192 | * | |
193 | * @ecc_place: ECC placing locations in oobfree type format. | |
194 | * @bank: Bank number for probed device. | |
195 | * @clk: Clock structure for FSMC. | |
196 | * | |
197 | * @data_va: NAND port for Data. | |
198 | * @cmd_va: NAND port for Command. | |
199 | * @addr_va: NAND port for Address. | |
200 | * @regs_va: FSMC regs base address. | |
201 | */ | |
202 | struct fsmc_nand_data { | |
593cd871 | 203 | u32 pid; |
6c009ab8 LW |
204 | struct mtd_info mtd; |
205 | struct nand_chip nand; | |
206 | struct mtd_partition *partitions; | |
207 | unsigned int nr_partitions; | |
208 | ||
209 | struct fsmc_eccplace *ecc_place; | |
210 | unsigned int bank; | |
211 | struct clk *clk; | |
212 | ||
213 | struct resource *resregs; | |
214 | struct resource *rescmd; | |
215 | struct resource *resaddr; | |
216 | struct resource *resdata; | |
217 | ||
218 | void __iomem *data_va; | |
219 | void __iomem *cmd_va; | |
220 | void __iomem *addr_va; | |
221 | void __iomem *regs_va; | |
222 | ||
223 | void (*select_chip)(uint32_t bank, uint32_t busw); | |
224 | }; | |
225 | ||
226 | /* Assert CS signal based on chipnr */ | |
227 | static void fsmc_select_chip(struct mtd_info *mtd, int chipnr) | |
228 | { | |
229 | struct nand_chip *chip = mtd->priv; | |
230 | struct fsmc_nand_data *host; | |
231 | ||
232 | host = container_of(mtd, struct fsmc_nand_data, mtd); | |
233 | ||
234 | switch (chipnr) { | |
235 | case -1: | |
236 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); | |
237 | break; | |
238 | case 0: | |
239 | case 1: | |
240 | case 2: | |
241 | case 3: | |
242 | if (host->select_chip) | |
243 | host->select_chip(chipnr, | |
244 | chip->options & NAND_BUSWIDTH_16); | |
245 | break; | |
246 | ||
247 | default: | |
248 | BUG(); | |
249 | } | |
250 | } | |
251 | ||
252 | /* | |
253 | * fsmc_cmd_ctrl - For facilitaing Hardware access | |
254 | * This routine allows hardware specific access to control-lines(ALE,CLE) | |
255 | */ | |
256 | static void fsmc_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) | |
257 | { | |
258 | struct nand_chip *this = mtd->priv; | |
259 | struct fsmc_nand_data *host = container_of(mtd, | |
260 | struct fsmc_nand_data, mtd); | |
261 | struct fsmc_regs *regs = host->regs_va; | |
262 | unsigned int bank = host->bank; | |
263 | ||
264 | if (ctrl & NAND_CTRL_CHANGE) { | |
265 | if (ctrl & NAND_CLE) { | |
266 | this->IO_ADDR_R = (void __iomem *)host->cmd_va; | |
267 | this->IO_ADDR_W = (void __iomem *)host->cmd_va; | |
268 | } else if (ctrl & NAND_ALE) { | |
269 | this->IO_ADDR_R = (void __iomem *)host->addr_va; | |
270 | this->IO_ADDR_W = (void __iomem *)host->addr_va; | |
271 | } else { | |
272 | this->IO_ADDR_R = (void __iomem *)host->data_va; | |
273 | this->IO_ADDR_W = (void __iomem *)host->data_va; | |
274 | } | |
275 | ||
276 | if (ctrl & NAND_NCE) { | |
277 | writel(readl(®s->bank_regs[bank].pc) | FSMC_ENABLE, | |
278 | ®s->bank_regs[bank].pc); | |
279 | } else { | |
280 | writel(readl(®s->bank_regs[bank].pc) & ~FSMC_ENABLE, | |
281 | ®s->bank_regs[bank].pc); | |
282 | } | |
283 | } | |
284 | ||
285 | mb(); | |
286 | ||
287 | if (cmd != NAND_CMD_NONE) | |
288 | writeb(cmd, this->IO_ADDR_W); | |
289 | } | |
290 | ||
291 | /* | |
292 | * fsmc_nand_setup - FSMC (Flexible Static Memory Controller) init routine | |
293 | * | |
294 | * This routine initializes timing parameters related to NAND memory access in | |
295 | * FSMC registers | |
296 | */ | |
297 | static void __init fsmc_nand_setup(struct fsmc_regs *regs, uint32_t bank, | |
298 | uint32_t busw) | |
299 | { | |
300 | uint32_t value = FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON; | |
301 | ||
302 | if (busw) | |
303 | writel(value | FSMC_DEVWID_16, ®s->bank_regs[bank].pc); | |
304 | else | |
305 | writel(value | FSMC_DEVWID_8, ®s->bank_regs[bank].pc); | |
306 | ||
307 | writel(readl(®s->bank_regs[bank].pc) | FSMC_TCLR_1 | FSMC_TAR_1, | |
308 | ®s->bank_regs[bank].pc); | |
309 | writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, | |
310 | ®s->bank_regs[bank].comm); | |
311 | writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, | |
312 | ®s->bank_regs[bank].attrib); | |
313 | } | |
314 | ||
315 | /* | |
316 | * fsmc_enable_hwecc - Enables Hardware ECC through FSMC registers | |
317 | */ | |
318 | static void fsmc_enable_hwecc(struct mtd_info *mtd, int mode) | |
319 | { | |
320 | struct fsmc_nand_data *host = container_of(mtd, | |
321 | struct fsmc_nand_data, mtd); | |
322 | struct fsmc_regs *regs = host->regs_va; | |
323 | uint32_t bank = host->bank; | |
324 | ||
325 | writel(readl(®s->bank_regs[bank].pc) & ~FSMC_ECCPLEN_256, | |
326 | ®s->bank_regs[bank].pc); | |
327 | writel(readl(®s->bank_regs[bank].pc) & ~FSMC_ECCEN, | |
328 | ®s->bank_regs[bank].pc); | |
329 | writel(readl(®s->bank_regs[bank].pc) | FSMC_ECCEN, | |
330 | ®s->bank_regs[bank].pc); | |
331 | } | |
332 | ||
333 | /* | |
334 | * fsmc_read_hwecc_ecc4 - Hardware ECC calculator for ecc4 option supported by | |
25985edc | 335 | * FSMC. ECC is 13 bytes for 512 bytes of data (supports error correction up to |
6c009ab8 LW |
336 | * max of 8-bits) |
337 | */ | |
338 | static int fsmc_read_hwecc_ecc4(struct mtd_info *mtd, const uint8_t *data, | |
339 | uint8_t *ecc) | |
340 | { | |
341 | struct fsmc_nand_data *host = container_of(mtd, | |
342 | struct fsmc_nand_data, mtd); | |
343 | struct fsmc_regs *regs = host->regs_va; | |
344 | uint32_t bank = host->bank; | |
345 | uint32_t ecc_tmp; | |
346 | unsigned long deadline = jiffies + FSMC_BUSY_WAIT_TIMEOUT; | |
347 | ||
348 | do { | |
349 | if (readl(®s->bank_regs[bank].sts) & FSMC_CODE_RDY) | |
350 | break; | |
351 | else | |
352 | cond_resched(); | |
353 | } while (!time_after_eq(jiffies, deadline)); | |
354 | ||
355 | ecc_tmp = readl(®s->bank_regs[bank].ecc1); | |
356 | ecc[0] = (uint8_t) (ecc_tmp >> 0); | |
357 | ecc[1] = (uint8_t) (ecc_tmp >> 8); | |
358 | ecc[2] = (uint8_t) (ecc_tmp >> 16); | |
359 | ecc[3] = (uint8_t) (ecc_tmp >> 24); | |
360 | ||
361 | ecc_tmp = readl(®s->bank_regs[bank].ecc2); | |
362 | ecc[4] = (uint8_t) (ecc_tmp >> 0); | |
363 | ecc[5] = (uint8_t) (ecc_tmp >> 8); | |
364 | ecc[6] = (uint8_t) (ecc_tmp >> 16); | |
365 | ecc[7] = (uint8_t) (ecc_tmp >> 24); | |
366 | ||
367 | ecc_tmp = readl(®s->bank_regs[bank].ecc3); | |
368 | ecc[8] = (uint8_t) (ecc_tmp >> 0); | |
369 | ecc[9] = (uint8_t) (ecc_tmp >> 8); | |
370 | ecc[10] = (uint8_t) (ecc_tmp >> 16); | |
371 | ecc[11] = (uint8_t) (ecc_tmp >> 24); | |
372 | ||
373 | ecc_tmp = readl(®s->bank_regs[bank].sts); | |
374 | ecc[12] = (uint8_t) (ecc_tmp >> 16); | |
375 | ||
376 | return 0; | |
377 | } | |
378 | ||
379 | /* | |
380 | * fsmc_read_hwecc_ecc1 - Hardware ECC calculator for ecc1 option supported by | |
25985edc | 381 | * FSMC. ECC is 3 bytes for 512 bytes of data (supports error correction up to |
6c009ab8 LW |
382 | * max of 1-bit) |
383 | */ | |
384 | static int fsmc_read_hwecc_ecc1(struct mtd_info *mtd, const uint8_t *data, | |
385 | uint8_t *ecc) | |
386 | { | |
387 | struct fsmc_nand_data *host = container_of(mtd, | |
388 | struct fsmc_nand_data, mtd); | |
389 | struct fsmc_regs *regs = host->regs_va; | |
390 | uint32_t bank = host->bank; | |
391 | uint32_t ecc_tmp; | |
392 | ||
393 | ecc_tmp = readl(®s->bank_regs[bank].ecc1); | |
394 | ecc[0] = (uint8_t) (ecc_tmp >> 0); | |
395 | ecc[1] = (uint8_t) (ecc_tmp >> 8); | |
396 | ecc[2] = (uint8_t) (ecc_tmp >> 16); | |
397 | ||
398 | return 0; | |
399 | } | |
400 | ||
401 | /* | |
402 | * fsmc_read_page_hwecc | |
403 | * @mtd: mtd info structure | |
404 | * @chip: nand chip info structure | |
405 | * @buf: buffer to store read data | |
406 | * @page: page number to read | |
407 | * | |
25985edc | 408 | * This routine is needed for fsmc version 8 as reading from NAND chip has to be |
6c009ab8 LW |
409 | * performed in a strict sequence as follows: |
410 | * data(512 byte) -> ecc(13 byte) | |
25985edc | 411 | * After this read, fsmc hardware generates and reports error data bits(up to a |
6c009ab8 LW |
412 | * max of 8 bits) |
413 | */ | |
414 | static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, | |
415 | uint8_t *buf, int page) | |
416 | { | |
417 | struct fsmc_nand_data *host = container_of(mtd, | |
418 | struct fsmc_nand_data, mtd); | |
419 | struct fsmc_eccplace *ecc_place = host->ecc_place; | |
420 | int i, j, s, stat, eccsize = chip->ecc.size; | |
421 | int eccbytes = chip->ecc.bytes; | |
422 | int eccsteps = chip->ecc.steps; | |
423 | uint8_t *p = buf; | |
424 | uint8_t *ecc_calc = chip->buffers->ecccalc; | |
425 | uint8_t *ecc_code = chip->buffers->ecccode; | |
426 | int off, len, group = 0; | |
427 | /* | |
428 | * ecc_oob is intentionally taken as uint16_t. In 16bit devices, we | |
429 | * end up reading 14 bytes (7 words) from oob. The local array is | |
430 | * to maintain word alignment | |
431 | */ | |
432 | uint16_t ecc_oob[7]; | |
433 | uint8_t *oob = (uint8_t *)&ecc_oob[0]; | |
434 | ||
435 | for (i = 0, s = 0; s < eccsteps; s++, i += eccbytes, p += eccsize) { | |
436 | ||
437 | chip->cmdfunc(mtd, NAND_CMD_READ0, s * eccsize, page); | |
438 | chip->ecc.hwctl(mtd, NAND_ECC_READ); | |
439 | chip->read_buf(mtd, p, eccsize); | |
440 | ||
441 | for (j = 0; j < eccbytes;) { | |
442 | off = ecc_place->eccplace[group].offset; | |
443 | len = ecc_place->eccplace[group].length; | |
444 | group++; | |
445 | ||
446 | /* | |
447 | * length is intentionally kept a higher multiple of 2 | |
448 | * to read at least 13 bytes even in case of 16 bit NAND | |
449 | * devices | |
450 | */ | |
451 | len = roundup(len, 2); | |
452 | chip->cmdfunc(mtd, NAND_CMD_READOOB, off, page); | |
453 | chip->read_buf(mtd, oob + j, len); | |
454 | j += len; | |
455 | } | |
456 | ||
457 | memcpy(&ecc_code[i], oob, 13); | |
458 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); | |
459 | ||
460 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); | |
461 | if (stat < 0) | |
462 | mtd->ecc_stats.failed++; | |
463 | else | |
464 | mtd->ecc_stats.corrected += stat; | |
465 | } | |
466 | ||
467 | return 0; | |
468 | } | |
469 | ||
470 | /* | |
471 | * fsmc_correct_data | |
472 | * @mtd: mtd info structure | |
473 | * @dat: buffer of read data | |
474 | * @read_ecc: ecc read from device spare area | |
475 | * @calc_ecc: ecc calculated from read data | |
476 | * | |
477 | * calc_ecc is a 104 bit information containing maximum of 8 error | |
478 | * offset informations of 13 bits each in 512 bytes of read data. | |
479 | */ | |
480 | static int fsmc_correct_data(struct mtd_info *mtd, uint8_t *dat, | |
481 | uint8_t *read_ecc, uint8_t *calc_ecc) | |
482 | { | |
483 | struct fsmc_nand_data *host = container_of(mtd, | |
484 | struct fsmc_nand_data, mtd); | |
485 | struct fsmc_regs *regs = host->regs_va; | |
486 | unsigned int bank = host->bank; | |
487 | uint16_t err_idx[8]; | |
488 | uint64_t ecc_data[2]; | |
489 | uint32_t num_err, i; | |
490 | ||
491 | /* The calculated ecc is actually the correction index in data */ | |
492 | memcpy(ecc_data, calc_ecc, 13); | |
493 | ||
494 | /* | |
495 | * ------------------- calc_ecc[] bit wise -----------|--13 bits--| | |
496 | * |---idx[7]--|--.....-----|---idx[2]--||---idx[1]--||---idx[0]--| | |
497 | * | |
498 | * calc_ecc is a 104 bit information containing maximum of 8 error | |
499 | * offset informations of 13 bits each. calc_ecc is copied into a | |
500 | * uint64_t array and error offset indexes are populated in err_idx | |
501 | * array | |
502 | */ | |
503 | for (i = 0; i < 8; i++) { | |
504 | if (i == 4) { | |
505 | err_idx[4] = ((ecc_data[1] & 0x1) << 12) | ecc_data[0]; | |
506 | ecc_data[1] >>= 1; | |
507 | continue; | |
508 | } | |
509 | err_idx[i] = (ecc_data[i/4] & 0x1FFF); | |
510 | ecc_data[i/4] >>= 13; | |
511 | } | |
512 | ||
513 | num_err = (readl(®s->bank_regs[bank].sts) >> 10) & 0xF; | |
514 | ||
515 | if (num_err == 0xF) | |
516 | return -EBADMSG; | |
517 | ||
518 | i = 0; | |
519 | while (num_err--) { | |
520 | change_bit(0, (unsigned long *)&err_idx[i]); | |
521 | change_bit(1, (unsigned long *)&err_idx[i]); | |
522 | ||
523 | if (err_idx[i] <= 512 * 8) { | |
524 | change_bit(err_idx[i], (unsigned long *)dat); | |
525 | i++; | |
526 | } | |
527 | } | |
528 | return i; | |
529 | } | |
530 | ||
531 | /* | |
532 | * fsmc_nand_probe - Probe function | |
533 | * @pdev: platform device structure | |
534 | */ | |
535 | static int __init fsmc_nand_probe(struct platform_device *pdev) | |
536 | { | |
537 | struct fsmc_nand_platform_data *pdata = dev_get_platdata(&pdev->dev); | |
538 | struct fsmc_nand_data *host; | |
539 | struct mtd_info *mtd; | |
540 | struct nand_chip *nand; | |
541 | struct fsmc_regs *regs; | |
542 | struct resource *res; | |
4ad916bc | 543 | int ret = 0; |
593cd871 LW |
544 | u32 pid; |
545 | int i; | |
6c009ab8 LW |
546 | |
547 | if (!pdata) { | |
548 | dev_err(&pdev->dev, "platform data is NULL\n"); | |
549 | return -EINVAL; | |
550 | } | |
551 | ||
552 | /* Allocate memory for the device structure (and zero it) */ | |
553 | host = kzalloc(sizeof(*host), GFP_KERNEL); | |
554 | if (!host) { | |
555 | dev_err(&pdev->dev, "failed to allocate device structure\n"); | |
556 | return -ENOMEM; | |
557 | } | |
558 | ||
559 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_data"); | |
560 | if (!res) { | |
561 | ret = -EIO; | |
562 | goto err_probe1; | |
563 | } | |
564 | ||
565 | host->resdata = request_mem_region(res->start, resource_size(res), | |
566 | pdev->name); | |
567 | if (!host->resdata) { | |
568 | ret = -EIO; | |
569 | goto err_probe1; | |
570 | } | |
571 | ||
572 | host->data_va = ioremap(res->start, resource_size(res)); | |
573 | if (!host->data_va) { | |
574 | ret = -EIO; | |
575 | goto err_probe1; | |
576 | } | |
577 | ||
578 | host->resaddr = request_mem_region(res->start + PLAT_NAND_ALE, | |
579 | resource_size(res), pdev->name); | |
580 | if (!host->resaddr) { | |
581 | ret = -EIO; | |
582 | goto err_probe1; | |
583 | } | |
584 | ||
585 | host->addr_va = ioremap(res->start + PLAT_NAND_ALE, resource_size(res)); | |
586 | if (!host->addr_va) { | |
587 | ret = -EIO; | |
588 | goto err_probe1; | |
589 | } | |
590 | ||
591 | host->rescmd = request_mem_region(res->start + PLAT_NAND_CLE, | |
592 | resource_size(res), pdev->name); | |
593 | if (!host->rescmd) { | |
594 | ret = -EIO; | |
595 | goto err_probe1; | |
596 | } | |
597 | ||
598 | host->cmd_va = ioremap(res->start + PLAT_NAND_CLE, resource_size(res)); | |
599 | if (!host->cmd_va) { | |
600 | ret = -EIO; | |
601 | goto err_probe1; | |
602 | } | |
603 | ||
604 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fsmc_regs"); | |
605 | if (!res) { | |
606 | ret = -EIO; | |
607 | goto err_probe1; | |
608 | } | |
609 | ||
610 | host->resregs = request_mem_region(res->start, resource_size(res), | |
611 | pdev->name); | |
612 | if (!host->resregs) { | |
613 | ret = -EIO; | |
614 | goto err_probe1; | |
615 | } | |
616 | ||
617 | host->regs_va = ioremap(res->start, resource_size(res)); | |
618 | if (!host->regs_va) { | |
619 | ret = -EIO; | |
620 | goto err_probe1; | |
621 | } | |
622 | ||
623 | host->clk = clk_get(&pdev->dev, NULL); | |
624 | if (IS_ERR(host->clk)) { | |
625 | dev_err(&pdev->dev, "failed to fetch block clock\n"); | |
626 | ret = PTR_ERR(host->clk); | |
627 | host->clk = NULL; | |
628 | goto err_probe1; | |
629 | } | |
630 | ||
631 | ret = clk_enable(host->clk); | |
632 | if (ret) | |
633 | goto err_probe1; | |
634 | ||
593cd871 LW |
635 | /* |
636 | * This device ID is actually a common AMBA ID as used on the | |
637 | * AMBA PrimeCell bus. However it is not a PrimeCell. | |
638 | */ | |
639 | for (pid = 0, i = 0; i < 4; i++) | |
640 | pid |= (readl(host->regs_va + resource_size(res) - 0x20 + 4 * i) & 255) << (i * 8); | |
641 | host->pid = pid; | |
642 | dev_info(&pdev->dev, "FSMC device partno %03x, manufacturer %02x, " | |
643 | "revision %02x, config %02x\n", | |
644 | AMBA_PART_BITS(pid), AMBA_MANF_BITS(pid), | |
645 | AMBA_REV_BITS(pid), AMBA_CONFIG_BITS(pid)); | |
646 | ||
6c009ab8 LW |
647 | host->bank = pdata->bank; |
648 | host->select_chip = pdata->select_bank; | |
649 | regs = host->regs_va; | |
650 | ||
651 | /* Link all private pointers */ | |
652 | mtd = &host->mtd; | |
653 | nand = &host->nand; | |
654 | mtd->priv = nand; | |
655 | nand->priv = host; | |
656 | ||
657 | host->mtd.owner = THIS_MODULE; | |
658 | nand->IO_ADDR_R = host->data_va; | |
659 | nand->IO_ADDR_W = host->data_va; | |
660 | nand->cmd_ctrl = fsmc_cmd_ctrl; | |
661 | nand->chip_delay = 30; | |
662 | ||
663 | nand->ecc.mode = NAND_ECC_HW; | |
664 | nand->ecc.hwctl = fsmc_enable_hwecc; | |
665 | nand->ecc.size = 512; | |
666 | nand->options = pdata->options; | |
667 | nand->select_chip = fsmc_select_chip; | |
668 | ||
669 | if (pdata->width == FSMC_NAND_BW16) | |
670 | nand->options |= NAND_BUSWIDTH_16; | |
671 | ||
672 | fsmc_nand_setup(regs, host->bank, nand->options & NAND_BUSWIDTH_16); | |
673 | ||
593cd871 | 674 | if (AMBA_REV_BITS(host->pid) >= 8) { |
6c009ab8 LW |
675 | nand->ecc.read_page = fsmc_read_page_hwecc; |
676 | nand->ecc.calculate = fsmc_read_hwecc_ecc4; | |
677 | nand->ecc.correct = fsmc_correct_data; | |
678 | nand->ecc.bytes = 13; | |
679 | } else { | |
680 | nand->ecc.calculate = fsmc_read_hwecc_ecc1; | |
681 | nand->ecc.correct = nand_correct_data; | |
682 | nand->ecc.bytes = 3; | |
683 | } | |
684 | ||
685 | /* | |
25985edc | 686 | * Scan to find existence of the device |
6c009ab8 LW |
687 | */ |
688 | if (nand_scan_ident(&host->mtd, 1, NULL)) { | |
689 | ret = -ENXIO; | |
690 | dev_err(&pdev->dev, "No NAND Device found!\n"); | |
691 | goto err_probe; | |
692 | } | |
693 | ||
593cd871 | 694 | if (AMBA_REV_BITS(host->pid) >= 8) { |
6c009ab8 LW |
695 | if (host->mtd.writesize == 512) { |
696 | nand->ecc.layout = &fsmc_ecc4_sp_layout; | |
697 | host->ecc_place = &fsmc_ecc4_sp_place; | |
698 | } else { | |
699 | nand->ecc.layout = &fsmc_ecc4_lp_layout; | |
700 | host->ecc_place = &fsmc_ecc4_lp_place; | |
701 | } | |
702 | } else { | |
703 | nand->ecc.layout = &fsmc_ecc1_layout; | |
704 | } | |
705 | ||
706 | /* Second stage of scan to fill MTD data-structures */ | |
707 | if (nand_scan_tail(&host->mtd)) { | |
708 | ret = -ENXIO; | |
709 | goto err_probe; | |
710 | } | |
711 | ||
712 | /* | |
713 | * The partition information can is accessed by (in the same precedence) | |
714 | * | |
715 | * command line through Bootloader, | |
716 | * platform data, | |
717 | * default partition information present in driver. | |
718 | */ | |
6c009ab8 LW |
719 | #ifdef CONFIG_MTD_CMDLINE_PARTS |
720 | /* | |
721 | * Check if partition info passed via command line | |
722 | */ | |
723 | host->mtd.name = "nand"; | |
4ad916bc | 724 | host->nr_partitions = parse_mtd_partitions(&host->mtd, part_probes, |
6c009ab8 | 725 | &host->partitions, 0); |
4ad916bc | 726 | if (host->nr_partitions <= 0) { |
6c009ab8 LW |
727 | #endif |
728 | /* | |
729 | * Check if partition info passed via command line | |
730 | */ | |
731 | if (pdata->partitions) { | |
732 | host->partitions = pdata->partitions; | |
733 | host->nr_partitions = pdata->nr_partitions; | |
734 | } else { | |
735 | struct mtd_partition *partition; | |
736 | int i; | |
737 | ||
738 | /* Select the default partitions info */ | |
739 | switch (host->mtd.size) { | |
740 | case 0x01000000: | |
741 | case 0x02000000: | |
742 | case 0x04000000: | |
743 | host->partitions = partition_info_16KB_blk; | |
744 | host->nr_partitions = | |
745 | sizeof(partition_info_16KB_blk) / | |
746 | sizeof(struct mtd_partition); | |
747 | break; | |
748 | case 0x08000000: | |
749 | case 0x10000000: | |
750 | case 0x20000000: | |
751 | case 0x40000000: | |
752 | host->partitions = partition_info_128KB_blk; | |
753 | host->nr_partitions = | |
754 | sizeof(partition_info_128KB_blk) / | |
755 | sizeof(struct mtd_partition); | |
756 | break; | |
757 | default: | |
758 | ret = -ENXIO; | |
759 | pr_err("Unsupported NAND size\n"); | |
760 | goto err_probe; | |
761 | } | |
762 | ||
763 | partition = host->partitions; | |
764 | for (i = 0; i < host->nr_partitions; i++, partition++) { | |
765 | if (partition->size == 0) { | |
766 | partition->size = host->mtd.size - | |
767 | partition->offset; | |
768 | break; | |
769 | } | |
770 | } | |
771 | } | |
772 | #ifdef CONFIG_MTD_CMDLINE_PARTS | |
773 | } | |
774 | #endif | |
775 | ||
99335d00 JI |
776 | ret = mtd_device_register(&host->mtd, host->partitions, |
777 | host->nr_partitions); | |
778 | if (ret) | |
6c009ab8 | 779 | goto err_probe; |
6c009ab8 LW |
780 | |
781 | platform_set_drvdata(pdev, host); | |
782 | dev_info(&pdev->dev, "FSMC NAND driver registration successful\n"); | |
783 | return 0; | |
784 | ||
785 | err_probe: | |
786 | clk_disable(host->clk); | |
787 | err_probe1: | |
788 | if (host->clk) | |
789 | clk_put(host->clk); | |
790 | if (host->regs_va) | |
791 | iounmap(host->regs_va); | |
792 | if (host->resregs) | |
793 | release_mem_region(host->resregs->start, | |
794 | resource_size(host->resregs)); | |
795 | if (host->cmd_va) | |
796 | iounmap(host->cmd_va); | |
797 | if (host->rescmd) | |
798 | release_mem_region(host->rescmd->start, | |
799 | resource_size(host->rescmd)); | |
800 | if (host->addr_va) | |
801 | iounmap(host->addr_va); | |
802 | if (host->resaddr) | |
803 | release_mem_region(host->resaddr->start, | |
804 | resource_size(host->resaddr)); | |
805 | if (host->data_va) | |
806 | iounmap(host->data_va); | |
807 | if (host->resdata) | |
808 | release_mem_region(host->resdata->start, | |
809 | resource_size(host->resdata)); | |
810 | ||
811 | kfree(host); | |
812 | return ret; | |
813 | } | |
814 | ||
815 | /* | |
816 | * Clean up routine | |
817 | */ | |
818 | static int fsmc_nand_remove(struct platform_device *pdev) | |
819 | { | |
820 | struct fsmc_nand_data *host = platform_get_drvdata(pdev); | |
821 | ||
822 | platform_set_drvdata(pdev, NULL); | |
823 | ||
824 | if (host) { | |
82e023ab | 825 | nand_release(&host->mtd); |
6c009ab8 LW |
826 | clk_disable(host->clk); |
827 | clk_put(host->clk); | |
828 | ||
829 | iounmap(host->regs_va); | |
830 | release_mem_region(host->resregs->start, | |
831 | resource_size(host->resregs)); | |
832 | iounmap(host->cmd_va); | |
833 | release_mem_region(host->rescmd->start, | |
834 | resource_size(host->rescmd)); | |
835 | iounmap(host->addr_va); | |
836 | release_mem_region(host->resaddr->start, | |
837 | resource_size(host->resaddr)); | |
838 | iounmap(host->data_va); | |
839 | release_mem_region(host->resdata->start, | |
840 | resource_size(host->resdata)); | |
841 | ||
842 | kfree(host); | |
843 | } | |
844 | return 0; | |
845 | } | |
846 | ||
847 | #ifdef CONFIG_PM | |
848 | static int fsmc_nand_suspend(struct device *dev) | |
849 | { | |
850 | struct fsmc_nand_data *host = dev_get_drvdata(dev); | |
851 | if (host) | |
852 | clk_disable(host->clk); | |
853 | return 0; | |
854 | } | |
855 | ||
856 | static int fsmc_nand_resume(struct device *dev) | |
857 | { | |
858 | struct fsmc_nand_data *host = dev_get_drvdata(dev); | |
859 | if (host) | |
860 | clk_enable(host->clk); | |
861 | return 0; | |
862 | } | |
863 | ||
864 | static const struct dev_pm_ops fsmc_nand_pm_ops = { | |
865 | .suspend = fsmc_nand_suspend, | |
866 | .resume = fsmc_nand_resume, | |
867 | }; | |
868 | #endif | |
869 | ||
870 | static struct platform_driver fsmc_nand_driver = { | |
871 | .remove = fsmc_nand_remove, | |
872 | .driver = { | |
873 | .owner = THIS_MODULE, | |
874 | .name = "fsmc-nand", | |
875 | #ifdef CONFIG_PM | |
876 | .pm = &fsmc_nand_pm_ops, | |
877 | #endif | |
878 | }, | |
879 | }; | |
880 | ||
881 | static int __init fsmc_nand_init(void) | |
882 | { | |
883 | return platform_driver_probe(&fsmc_nand_driver, | |
884 | fsmc_nand_probe); | |
885 | } | |
886 | module_init(fsmc_nand_init); | |
887 | ||
888 | static void __exit fsmc_nand_exit(void) | |
889 | { | |
890 | platform_driver_unregister(&fsmc_nand_driver); | |
891 | } | |
892 | module_exit(fsmc_nand_exit); | |
893 | ||
894 | MODULE_LICENSE("GPL"); | |
895 | MODULE_AUTHOR("Vipin Kumar <vipin.kumar@st.com>, Ashish Priyadarshi"); | |
896 | MODULE_DESCRIPTION("NAND driver for SPEAr Platforms"); |