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10a2bcae HS |
1 | /* |
2 | * Freescale GPMI NAND Flash Driver | |
3 | * | |
4 | * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. | |
5 | * Copyright (C) 2008 Embedded Alley Solutions, Inc. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along | |
18 | * with this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | |
20 | */ | |
21 | #include <linux/clk.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/interrupt.h> | |
df16c86a | 24 | #include <linux/module.h> |
10a2bcae | 25 | #include <linux/mtd/partitions.h> |
e10db1f0 HS |
26 | #include <linux/of.h> |
27 | #include <linux/of_device.h> | |
c50c6940 | 28 | #include <linux/of_mtd.h> |
10a2bcae HS |
29 | #include "gpmi-nand.h" |
30 | ||
5de0b52e HS |
31 | /* Resource names for the GPMI NAND driver. */ |
32 | #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand" | |
33 | #define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch" | |
34 | #define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch" | |
5de0b52e | 35 | |
10a2bcae HS |
36 | /* add our owner bbt descriptor */ |
37 | static uint8_t scan_ff_pattern[] = { 0xff }; | |
38 | static struct nand_bbt_descr gpmi_bbt_descr = { | |
39 | .options = 0, | |
40 | .offs = 0, | |
41 | .len = 1, | |
42 | .pattern = scan_ff_pattern | |
43 | }; | |
44 | ||
7a2b89ac HS |
45 | /* |
46 | * We may change the layout if we can get the ECC info from the datasheet, | |
47 | * else we will use all the (page + OOB). | |
48 | */ | |
10a2bcae HS |
49 | static struct nand_ecclayout gpmi_hw_ecclayout = { |
50 | .eccbytes = 0, | |
51 | .eccpos = { 0, }, | |
52 | .oobfree = { {.offset = 0, .length = 0} } | |
53 | }; | |
54 | ||
55 | static irqreturn_t bch_irq(int irq, void *cookie) | |
56 | { | |
57 | struct gpmi_nand_data *this = cookie; | |
58 | ||
59 | gpmi_clear_bch(this); | |
60 | complete(&this->bch_done); | |
61 | return IRQ_HANDLED; | |
62 | } | |
63 | ||
64 | /* | |
65 | * Calculate the ECC strength by hand: | |
66 | * E : The ECC strength. | |
67 | * G : the length of Galois Field. | |
68 | * N : The chunk count of per page. | |
69 | * O : the oobsize of the NAND chip. | |
70 | * M : the metasize of per page. | |
71 | * | |
72 | * The formula is : | |
73 | * E * G * N | |
74 | * ------------ <= (O - M) | |
75 | * 8 | |
76 | * | |
77 | * So, we get E by: | |
78 | * (O - M) * 8 | |
79 | * E <= ------------- | |
80 | * G * N | |
81 | */ | |
82 | static inline int get_ecc_strength(struct gpmi_nand_data *this) | |
83 | { | |
84 | struct bch_geometry *geo = &this->bch_geometry; | |
85 | struct mtd_info *mtd = &this->mtd; | |
86 | int ecc_strength; | |
87 | ||
88 | ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8) | |
89 | / (geo->gf_len * geo->ecc_chunk_count); | |
90 | ||
91 | /* We need the minor even number. */ | |
92 | return round_down(ecc_strength, 2); | |
93 | } | |
94 | ||
92d0e09a HS |
95 | static inline bool gpmi_check_ecc(struct gpmi_nand_data *this) |
96 | { | |
97 | struct bch_geometry *geo = &this->bch_geometry; | |
98 | ||
99 | /* Do the sanity check. */ | |
100 | if (GPMI_IS_MX23(this) || GPMI_IS_MX28(this)) { | |
101 | /* The mx23/mx28 only support the GF13. */ | |
102 | if (geo->gf_len == 14) | |
103 | return false; | |
104 | ||
105 | if (geo->ecc_strength > MXS_ECC_STRENGTH_MAX) | |
106 | return false; | |
107 | } else if (GPMI_IS_MX6Q(this)) { | |
108 | if (geo->ecc_strength > MX6_ECC_STRENGTH_MAX) | |
109 | return false; | |
110 | } | |
111 | return true; | |
112 | } | |
113 | ||
2febcdf8 HS |
114 | /* |
115 | * If we can get the ECC information from the nand chip, we do not | |
116 | * need to calculate them ourselves. | |
117 | * | |
118 | * We may have available oob space in this case. | |
119 | */ | |
120 | static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) | |
121 | { | |
122 | struct bch_geometry *geo = &this->bch_geometry; | |
123 | struct mtd_info *mtd = &this->mtd; | |
124 | struct nand_chip *chip = mtd->priv; | |
125 | struct nand_oobfree *of = gpmi_hw_ecclayout.oobfree; | |
126 | unsigned int block_mark_bit_offset; | |
127 | ||
128 | if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) | |
129 | return false; | |
130 | ||
131 | switch (chip->ecc_step_ds) { | |
132 | case SZ_512: | |
133 | geo->gf_len = 13; | |
134 | break; | |
135 | case SZ_1K: | |
136 | geo->gf_len = 14; | |
137 | break; | |
138 | default: | |
139 | dev_err(this->dev, | |
140 | "unsupported nand chip. ecc bits : %d, ecc size : %d\n", | |
141 | chip->ecc_strength_ds, chip->ecc_step_ds); | |
142 | return false; | |
143 | } | |
144 | geo->ecc_chunk_size = chip->ecc_step_ds; | |
145 | geo->ecc_strength = round_up(chip->ecc_strength_ds, 2); | |
146 | if (!gpmi_check_ecc(this)) | |
147 | return false; | |
148 | ||
149 | /* Keep the C >= O */ | |
150 | if (geo->ecc_chunk_size < mtd->oobsize) { | |
151 | dev_err(this->dev, | |
152 | "unsupported nand chip. ecc size: %d, oob size : %d\n", | |
153 | chip->ecc_step_ds, mtd->oobsize); | |
154 | return false; | |
155 | } | |
156 | ||
157 | /* The default value, see comment in the legacy_set_geometry(). */ | |
158 | geo->metadata_size = 10; | |
159 | ||
160 | geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; | |
161 | ||
162 | /* | |
163 | * Now, the NAND chip with 2K page(data chunk is 512byte) shows below: | |
164 | * | |
165 | * | P | | |
166 | * |<----------------------------------------------------->| | |
167 | * | | | |
168 | * | (Block Mark) | | |
169 | * | P' | | | | | |
170 | * |<-------------------------------------------->| D | | O' | | |
171 | * | |<---->| |<--->| | |
172 | * V V V V V | |
173 | * +---+----------+-+----------+-+----------+-+----------+-+-----+ | |
174 | * | M | data |E| data |E| data |E| data |E| | | |
175 | * +---+----------+-+----------+-+----------+-+----------+-+-----+ | |
176 | * ^ ^ | |
177 | * | O | | |
178 | * |<------------>| | |
179 | * | | | |
180 | * | |
181 | * P : the page size for BCH module. | |
182 | * E : The ECC strength. | |
183 | * G : the length of Galois Field. | |
184 | * N : The chunk count of per page. | |
185 | * M : the metasize of per page. | |
186 | * C : the ecc chunk size, aka the "data" above. | |
187 | * P': the nand chip's page size. | |
188 | * O : the nand chip's oob size. | |
189 | * O': the free oob. | |
190 | * | |
191 | * The formula for P is : | |
192 | * | |
193 | * E * G * N | |
194 | * P = ------------ + P' + M | |
195 | * 8 | |
196 | * | |
197 | * The position of block mark moves forward in the ECC-based view | |
198 | * of page, and the delta is: | |
199 | * | |
200 | * E * G * (N - 1) | |
201 | * D = (---------------- + M) | |
202 | * 8 | |
203 | * | |
204 | * Please see the comment in legacy_set_geometry(). | |
205 | * With the condition C >= O , we still can get same result. | |
206 | * So the bit position of the physical block mark within the ECC-based | |
207 | * view of the page is : | |
208 | * (P' - D) * 8 | |
209 | */ | |
210 | geo->page_size = mtd->writesize + geo->metadata_size + | |
211 | (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; | |
212 | ||
213 | /* The available oob size we have. */ | |
214 | if (geo->page_size < mtd->writesize + mtd->oobsize) { | |
215 | of->offset = geo->page_size - mtd->writesize; | |
216 | of->length = mtd->oobsize - of->offset; | |
2febcdf8 HS |
217 | } |
218 | ||
219 | geo->payload_size = mtd->writesize; | |
220 | ||
221 | geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); | |
222 | geo->auxiliary_size = ALIGN(geo->metadata_size, 4) | |
223 | + ALIGN(geo->ecc_chunk_count, 4); | |
224 | ||
225 | if (!this->swap_block_mark) | |
226 | return true; | |
227 | ||
228 | /* For bit swap. */ | |
229 | block_mark_bit_offset = mtd->writesize * 8 - | |
230 | (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) | |
231 | + geo->metadata_size * 8); | |
232 | ||
233 | geo->block_mark_byte_offset = block_mark_bit_offset / 8; | |
234 | geo->block_mark_bit_offset = block_mark_bit_offset % 8; | |
235 | return true; | |
236 | } | |
237 | ||
238 | static int legacy_set_geometry(struct gpmi_nand_data *this) | |
10a2bcae HS |
239 | { |
240 | struct bch_geometry *geo = &this->bch_geometry; | |
241 | struct mtd_info *mtd = &this->mtd; | |
242 | unsigned int metadata_size; | |
243 | unsigned int status_size; | |
244 | unsigned int block_mark_bit_offset; | |
245 | ||
246 | /* | |
247 | * The size of the metadata can be changed, though we set it to 10 | |
248 | * bytes now. But it can't be too large, because we have to save | |
249 | * enough space for BCH. | |
250 | */ | |
251 | geo->metadata_size = 10; | |
252 | ||
253 | /* The default for the length of Galois Field. */ | |
254 | geo->gf_len = 13; | |
255 | ||
9ff16f08 | 256 | /* The default for chunk size. */ |
10a2bcae | 257 | geo->ecc_chunk_size = 512; |
9ff16f08 | 258 | while (geo->ecc_chunk_size < mtd->oobsize) { |
10a2bcae | 259 | geo->ecc_chunk_size *= 2; /* keep C >= O */ |
9ff16f08 HS |
260 | geo->gf_len = 14; |
261 | } | |
10a2bcae HS |
262 | |
263 | geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; | |
264 | ||
265 | /* We use the same ECC strength for all chunks. */ | |
266 | geo->ecc_strength = get_ecc_strength(this); | |
92d0e09a HS |
267 | if (!gpmi_check_ecc(this)) { |
268 | dev_err(this->dev, | |
269 | "We can not support this nand chip." | |
270 | " Its required ecc strength(%d) is beyond our" | |
271 | " capability(%d).\n", geo->ecc_strength, | |
272 | (GPMI_IS_MX6Q(this) ? MX6_ECC_STRENGTH_MAX | |
273 | : MXS_ECC_STRENGTH_MAX)); | |
10a2bcae HS |
274 | return -EINVAL; |
275 | } | |
276 | ||
277 | geo->page_size = mtd->writesize + mtd->oobsize; | |
278 | geo->payload_size = mtd->writesize; | |
279 | ||
280 | /* | |
281 | * The auxiliary buffer contains the metadata and the ECC status. The | |
282 | * metadata is padded to the nearest 32-bit boundary. The ECC status | |
283 | * contains one byte for every ECC chunk, and is also padded to the | |
284 | * nearest 32-bit boundary. | |
285 | */ | |
286 | metadata_size = ALIGN(geo->metadata_size, 4); | |
287 | status_size = ALIGN(geo->ecc_chunk_count, 4); | |
288 | ||
289 | geo->auxiliary_size = metadata_size + status_size; | |
290 | geo->auxiliary_status_offset = metadata_size; | |
291 | ||
292 | if (!this->swap_block_mark) | |
293 | return 0; | |
294 | ||
295 | /* | |
296 | * We need to compute the byte and bit offsets of | |
297 | * the physical block mark within the ECC-based view of the page. | |
298 | * | |
299 | * NAND chip with 2K page shows below: | |
300 | * (Block Mark) | |
301 | * | | | |
302 | * | D | | |
303 | * |<---->| | |
304 | * V V | |
305 | * +---+----------+-+----------+-+----------+-+----------+-+ | |
306 | * | M | data |E| data |E| data |E| data |E| | |
307 | * +---+----------+-+----------+-+----------+-+----------+-+ | |
308 | * | |
309 | * The position of block mark moves forward in the ECC-based view | |
310 | * of page, and the delta is: | |
311 | * | |
312 | * E * G * (N - 1) | |
313 | * D = (---------------- + M) | |
314 | * 8 | |
315 | * | |
316 | * With the formula to compute the ECC strength, and the condition | |
317 | * : C >= O (C is the ecc chunk size) | |
318 | * | |
319 | * It's easy to deduce to the following result: | |
320 | * | |
321 | * E * G (O - M) C - M C - M | |
322 | * ----------- <= ------- <= -------- < --------- | |
323 | * 8 N N (N - 1) | |
324 | * | |
325 | * So, we get: | |
326 | * | |
327 | * E * G * (N - 1) | |
328 | * D = (---------------- + M) < C | |
329 | * 8 | |
330 | * | |
331 | * The above inequality means the position of block mark | |
332 | * within the ECC-based view of the page is still in the data chunk, | |
333 | * and it's NOT in the ECC bits of the chunk. | |
334 | * | |
335 | * Use the following to compute the bit position of the | |
336 | * physical block mark within the ECC-based view of the page: | |
337 | * (page_size - D) * 8 | |
338 | * | |
339 | * --Huang Shijie | |
340 | */ | |
341 | block_mark_bit_offset = mtd->writesize * 8 - | |
342 | (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) | |
343 | + geo->metadata_size * 8); | |
344 | ||
345 | geo->block_mark_byte_offset = block_mark_bit_offset / 8; | |
346 | geo->block_mark_bit_offset = block_mark_bit_offset % 8; | |
347 | return 0; | |
348 | } | |
349 | ||
2febcdf8 HS |
350 | int common_nfc_set_geometry(struct gpmi_nand_data *this) |
351 | { | |
89b59e6c HS |
352 | if (of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc") |
353 | && set_geometry_by_ecc_info(this)) | |
354 | return 0; | |
031e2777 | 355 | return legacy_set_geometry(this); |
2febcdf8 HS |
356 | } |
357 | ||
10a2bcae HS |
358 | struct dma_chan *get_dma_chan(struct gpmi_nand_data *this) |
359 | { | |
a7c12d01 HS |
360 | /* We use the DMA channel 0 to access all the nand chips. */ |
361 | return this->dma_chans[0]; | |
10a2bcae HS |
362 | } |
363 | ||
364 | /* Can we use the upper's buffer directly for DMA? */ | |
365 | void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr) | |
366 | { | |
367 | struct scatterlist *sgl = &this->data_sgl; | |
368 | int ret; | |
369 | ||
370 | this->direct_dma_map_ok = true; | |
371 | ||
372 | /* first try to map the upper buffer directly */ | |
373 | sg_init_one(sgl, this->upper_buf, this->upper_len); | |
374 | ret = dma_map_sg(this->dev, sgl, 1, dr); | |
375 | if (ret == 0) { | |
376 | /* We have to use our own DMA buffer. */ | |
377 | sg_init_one(sgl, this->data_buffer_dma, PAGE_SIZE); | |
378 | ||
379 | if (dr == DMA_TO_DEVICE) | |
380 | memcpy(this->data_buffer_dma, this->upper_buf, | |
381 | this->upper_len); | |
382 | ||
383 | ret = dma_map_sg(this->dev, sgl, 1, dr); | |
384 | if (ret == 0) | |
da40c16a | 385 | dev_err(this->dev, "DMA mapping failed.\n"); |
10a2bcae HS |
386 | |
387 | this->direct_dma_map_ok = false; | |
388 | } | |
389 | } | |
390 | ||
391 | /* This will be called after the DMA operation is finished. */ | |
392 | static void dma_irq_callback(void *param) | |
393 | { | |
394 | struct gpmi_nand_data *this = param; | |
395 | struct completion *dma_c = &this->dma_done; | |
396 | ||
10a2bcae HS |
397 | switch (this->dma_type) { |
398 | case DMA_FOR_COMMAND: | |
399 | dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE); | |
400 | break; | |
401 | ||
402 | case DMA_FOR_READ_DATA: | |
403 | dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE); | |
404 | if (this->direct_dma_map_ok == false) | |
405 | memcpy(this->upper_buf, this->data_buffer_dma, | |
406 | this->upper_len); | |
407 | break; | |
408 | ||
409 | case DMA_FOR_WRITE_DATA: | |
410 | dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE); | |
411 | break; | |
412 | ||
413 | case DMA_FOR_READ_ECC_PAGE: | |
414 | case DMA_FOR_WRITE_ECC_PAGE: | |
415 | /* We have to wait the BCH interrupt to finish. */ | |
416 | break; | |
417 | ||
418 | default: | |
da40c16a | 419 | dev_err(this->dev, "in wrong DMA operation.\n"); |
10a2bcae | 420 | } |
7b3d2fb9 HS |
421 | |
422 | complete(dma_c); | |
10a2bcae HS |
423 | } |
424 | ||
425 | int start_dma_without_bch_irq(struct gpmi_nand_data *this, | |
426 | struct dma_async_tx_descriptor *desc) | |
427 | { | |
428 | struct completion *dma_c = &this->dma_done; | |
429 | int err; | |
430 | ||
431 | init_completion(dma_c); | |
432 | ||
433 | desc->callback = dma_irq_callback; | |
434 | desc->callback_param = this; | |
435 | dmaengine_submit(desc); | |
d04525ed | 436 | dma_async_issue_pending(get_dma_chan(this)); |
10a2bcae HS |
437 | |
438 | /* Wait for the interrupt from the DMA block. */ | |
439 | err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000)); | |
440 | if (!err) { | |
da40c16a HS |
441 | dev_err(this->dev, "DMA timeout, last DMA :%d\n", |
442 | this->last_dma_type); | |
10a2bcae HS |
443 | gpmi_dump_info(this); |
444 | return -ETIMEDOUT; | |
445 | } | |
446 | return 0; | |
447 | } | |
448 | ||
449 | /* | |
450 | * This function is used in BCH reading or BCH writing pages. | |
451 | * It will wait for the BCH interrupt as long as ONE second. | |
452 | * Actually, we must wait for two interrupts : | |
453 | * [1] firstly the DMA interrupt and | |
454 | * [2] secondly the BCH interrupt. | |
455 | */ | |
456 | int start_dma_with_bch_irq(struct gpmi_nand_data *this, | |
457 | struct dma_async_tx_descriptor *desc) | |
458 | { | |
459 | struct completion *bch_c = &this->bch_done; | |
460 | int err; | |
461 | ||
462 | /* Prepare to receive an interrupt from the BCH block. */ | |
463 | init_completion(bch_c); | |
464 | ||
465 | /* start the DMA */ | |
466 | start_dma_without_bch_irq(this, desc); | |
467 | ||
468 | /* Wait for the interrupt from the BCH block. */ | |
469 | err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000)); | |
470 | if (!err) { | |
da40c16a HS |
471 | dev_err(this->dev, "BCH timeout, last DMA :%d\n", |
472 | this->last_dma_type); | |
10a2bcae HS |
473 | gpmi_dump_info(this); |
474 | return -ETIMEDOUT; | |
475 | } | |
476 | return 0; | |
477 | } | |
478 | ||
d8929942 GKH |
479 | static int acquire_register_block(struct gpmi_nand_data *this, |
480 | const char *res_name) | |
10a2bcae HS |
481 | { |
482 | struct platform_device *pdev = this->pdev; | |
483 | struct resources *res = &this->resources; | |
484 | struct resource *r; | |
513d57e1 | 485 | void __iomem *p; |
10a2bcae HS |
486 | |
487 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); | |
87a9d698 HS |
488 | p = devm_ioremap_resource(&pdev->dev, r); |
489 | if (IS_ERR(p)) | |
490 | return PTR_ERR(p); | |
10a2bcae HS |
491 | |
492 | if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME)) | |
493 | res->gpmi_regs = p; | |
494 | else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME)) | |
495 | res->bch_regs = p; | |
496 | else | |
da40c16a | 497 | dev_err(this->dev, "unknown resource name : %s\n", res_name); |
10a2bcae HS |
498 | |
499 | return 0; | |
500 | } | |
501 | ||
d8929942 | 502 | static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h) |
10a2bcae HS |
503 | { |
504 | struct platform_device *pdev = this->pdev; | |
10a2bcae HS |
505 | const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME; |
506 | struct resource *r; | |
507 | int err; | |
508 | ||
509 | r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); | |
510 | if (!r) { | |
da40c16a | 511 | dev_err(this->dev, "Can't get resource for %s\n", res_name); |
52a073bd | 512 | return -ENODEV; |
10a2bcae HS |
513 | } |
514 | ||
3cb2c1ed HS |
515 | err = devm_request_irq(this->dev, r->start, irq_h, 0, res_name, this); |
516 | if (err) | |
517 | dev_err(this->dev, "error requesting BCH IRQ\n"); | |
10a2bcae | 518 | |
3cb2c1ed | 519 | return err; |
10a2bcae HS |
520 | } |
521 | ||
10a2bcae HS |
522 | static void release_dma_channels(struct gpmi_nand_data *this) |
523 | { | |
524 | unsigned int i; | |
525 | for (i = 0; i < DMA_CHANS; i++) | |
526 | if (this->dma_chans[i]) { | |
527 | dma_release_channel(this->dma_chans[i]); | |
528 | this->dma_chans[i] = NULL; | |
529 | } | |
530 | } | |
531 | ||
06f25510 | 532 | static int acquire_dma_channels(struct gpmi_nand_data *this) |
10a2bcae HS |
533 | { |
534 | struct platform_device *pdev = this->pdev; | |
e10db1f0 | 535 | struct dma_chan *dma_chan; |
10a2bcae | 536 | |
e10db1f0 | 537 | /* request dma channel */ |
5fac0e18 | 538 | dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx"); |
e10db1f0 | 539 | if (!dma_chan) { |
da40c16a | 540 | dev_err(this->dev, "Failed to request DMA channel.\n"); |
e10db1f0 | 541 | goto acquire_err; |
10a2bcae HS |
542 | } |
543 | ||
e10db1f0 | 544 | this->dma_chans[0] = dma_chan; |
10a2bcae HS |
545 | return 0; |
546 | ||
547 | acquire_err: | |
10a2bcae HS |
548 | release_dma_channels(this); |
549 | return -EINVAL; | |
550 | } | |
551 | ||
ff506172 HS |
552 | static char *extra_clks_for_mx6q[GPMI_CLK_MAX] = { |
553 | "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch", | |
554 | }; | |
555 | ||
06f25510 | 556 | static int gpmi_get_clks(struct gpmi_nand_data *this) |
ff506172 HS |
557 | { |
558 | struct resources *r = &this->resources; | |
559 | char **extra_clks = NULL; | |
560 | struct clk *clk; | |
d1cb556c | 561 | int err, i; |
ff506172 HS |
562 | |
563 | /* The main clock is stored in the first. */ | |
554cbc50 | 564 | r->clock[0] = devm_clk_get(this->dev, "gpmi_io"); |
d1cb556c MM |
565 | if (IS_ERR(r->clock[0])) { |
566 | err = PTR_ERR(r->clock[0]); | |
ff506172 | 567 | goto err_clock; |
d1cb556c | 568 | } |
ff506172 HS |
569 | |
570 | /* Get extra clocks */ | |
571 | if (GPMI_IS_MX6Q(this)) | |
572 | extra_clks = extra_clks_for_mx6q; | |
573 | if (!extra_clks) | |
574 | return 0; | |
575 | ||
576 | for (i = 1; i < GPMI_CLK_MAX; i++) { | |
577 | if (extra_clks[i - 1] == NULL) | |
578 | break; | |
579 | ||
554cbc50 | 580 | clk = devm_clk_get(this->dev, extra_clks[i - 1]); |
d1cb556c MM |
581 | if (IS_ERR(clk)) { |
582 | err = PTR_ERR(clk); | |
ff506172 | 583 | goto err_clock; |
d1cb556c | 584 | } |
ff506172 HS |
585 | |
586 | r->clock[i] = clk; | |
587 | } | |
588 | ||
e1ca95e3 | 589 | if (GPMI_IS_MX6Q(this)) |
ff506172 | 590 | /* |
e1ca95e3 | 591 | * Set the default value for the gpmi clock in mx6q: |
ff506172 | 592 | * |
e1ca95e3 HS |
593 | * If you want to use the ONFI nand which is in the |
594 | * Synchronous Mode, you should change the clock as you need. | |
ff506172 HS |
595 | */ |
596 | clk_set_rate(r->clock[0], 22000000); | |
e1ca95e3 | 597 | |
ff506172 HS |
598 | return 0; |
599 | ||
600 | err_clock: | |
601 | dev_dbg(this->dev, "failed in finding the clocks.\n"); | |
d1cb556c | 602 | return err; |
ff506172 HS |
603 | } |
604 | ||
06f25510 | 605 | static int acquire_resources(struct gpmi_nand_data *this) |
10a2bcae | 606 | { |
10a2bcae HS |
607 | int ret; |
608 | ||
609 | ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME); | |
610 | if (ret) | |
611 | goto exit_regs; | |
612 | ||
613 | ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME); | |
614 | if (ret) | |
615 | goto exit_regs; | |
616 | ||
617 | ret = acquire_bch_irq(this, bch_irq); | |
618 | if (ret) | |
619 | goto exit_regs; | |
620 | ||
621 | ret = acquire_dma_channels(this); | |
622 | if (ret) | |
3cb2c1ed | 623 | goto exit_regs; |
10a2bcae | 624 | |
ff506172 HS |
625 | ret = gpmi_get_clks(this); |
626 | if (ret) | |
10a2bcae | 627 | goto exit_clock; |
10a2bcae HS |
628 | return 0; |
629 | ||
630 | exit_clock: | |
631 | release_dma_channels(this); | |
10a2bcae | 632 | exit_regs: |
10a2bcae HS |
633 | return ret; |
634 | } | |
635 | ||
636 | static void release_resources(struct gpmi_nand_data *this) | |
637 | { | |
10a2bcae HS |
638 | release_dma_channels(this); |
639 | } | |
640 | ||
06f25510 | 641 | static int init_hardware(struct gpmi_nand_data *this) |
10a2bcae HS |
642 | { |
643 | int ret; | |
644 | ||
645 | /* | |
646 | * This structure contains the "safe" GPMI timing that should succeed | |
647 | * with any NAND Flash device | |
648 | * (although, with less-than-optimal performance). | |
649 | */ | |
650 | struct nand_timing safe_timing = { | |
651 | .data_setup_in_ns = 80, | |
652 | .data_hold_in_ns = 60, | |
653 | .address_setup_in_ns = 25, | |
654 | .gpmi_sample_delay_in_ns = 6, | |
655 | .tREA_in_ns = -1, | |
656 | .tRLOH_in_ns = -1, | |
657 | .tRHOH_in_ns = -1, | |
658 | }; | |
659 | ||
660 | /* Initialize the hardwares. */ | |
661 | ret = gpmi_init(this); | |
662 | if (ret) | |
663 | return ret; | |
664 | ||
665 | this->timing = safe_timing; | |
666 | return 0; | |
667 | } | |
668 | ||
669 | static int read_page_prepare(struct gpmi_nand_data *this, | |
670 | void *destination, unsigned length, | |
671 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
672 | void **use_virt, dma_addr_t *use_phys) | |
673 | { | |
674 | struct device *dev = this->dev; | |
675 | ||
676 | if (virt_addr_valid(destination)) { | |
677 | dma_addr_t dest_phys; | |
678 | ||
679 | dest_phys = dma_map_single(dev, destination, | |
680 | length, DMA_FROM_DEVICE); | |
681 | if (dma_mapping_error(dev, dest_phys)) { | |
682 | if (alt_size < length) { | |
da40c16a | 683 | dev_err(dev, "Alternate buffer is too small\n"); |
10a2bcae HS |
684 | return -ENOMEM; |
685 | } | |
686 | goto map_failed; | |
687 | } | |
688 | *use_virt = destination; | |
689 | *use_phys = dest_phys; | |
690 | this->direct_dma_map_ok = true; | |
691 | return 0; | |
692 | } | |
693 | ||
694 | map_failed: | |
695 | *use_virt = alt_virt; | |
696 | *use_phys = alt_phys; | |
697 | this->direct_dma_map_ok = false; | |
698 | return 0; | |
699 | } | |
700 | ||
701 | static inline void read_page_end(struct gpmi_nand_data *this, | |
702 | void *destination, unsigned length, | |
703 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
704 | void *used_virt, dma_addr_t used_phys) | |
705 | { | |
706 | if (this->direct_dma_map_ok) | |
707 | dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE); | |
708 | } | |
709 | ||
710 | static inline void read_page_swap_end(struct gpmi_nand_data *this, | |
711 | void *destination, unsigned length, | |
712 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
713 | void *used_virt, dma_addr_t used_phys) | |
714 | { | |
715 | if (!this->direct_dma_map_ok) | |
716 | memcpy(destination, alt_virt, length); | |
717 | } | |
718 | ||
719 | static int send_page_prepare(struct gpmi_nand_data *this, | |
720 | const void *source, unsigned length, | |
721 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
722 | const void **use_virt, dma_addr_t *use_phys) | |
723 | { | |
724 | struct device *dev = this->dev; | |
725 | ||
726 | if (virt_addr_valid(source)) { | |
727 | dma_addr_t source_phys; | |
728 | ||
729 | source_phys = dma_map_single(dev, (void *)source, length, | |
730 | DMA_TO_DEVICE); | |
731 | if (dma_mapping_error(dev, source_phys)) { | |
732 | if (alt_size < length) { | |
da40c16a | 733 | dev_err(dev, "Alternate buffer is too small\n"); |
10a2bcae HS |
734 | return -ENOMEM; |
735 | } | |
736 | goto map_failed; | |
737 | } | |
738 | *use_virt = source; | |
739 | *use_phys = source_phys; | |
740 | return 0; | |
741 | } | |
742 | map_failed: | |
743 | /* | |
744 | * Copy the content of the source buffer into the alternate | |
745 | * buffer and set up the return values accordingly. | |
746 | */ | |
747 | memcpy(alt_virt, source, length); | |
748 | ||
749 | *use_virt = alt_virt; | |
750 | *use_phys = alt_phys; | |
751 | return 0; | |
752 | } | |
753 | ||
754 | static void send_page_end(struct gpmi_nand_data *this, | |
755 | const void *source, unsigned length, | |
756 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
757 | const void *used_virt, dma_addr_t used_phys) | |
758 | { | |
759 | struct device *dev = this->dev; | |
760 | if (used_virt == source) | |
761 | dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE); | |
762 | } | |
763 | ||
764 | static void gpmi_free_dma_buffer(struct gpmi_nand_data *this) | |
765 | { | |
766 | struct device *dev = this->dev; | |
767 | ||
768 | if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt)) | |
769 | dma_free_coherent(dev, this->page_buffer_size, | |
770 | this->page_buffer_virt, | |
771 | this->page_buffer_phys); | |
772 | kfree(this->cmd_buffer); | |
773 | kfree(this->data_buffer_dma); | |
774 | ||
775 | this->cmd_buffer = NULL; | |
776 | this->data_buffer_dma = NULL; | |
777 | this->page_buffer_virt = NULL; | |
778 | this->page_buffer_size = 0; | |
779 | } | |
780 | ||
781 | /* Allocate the DMA buffers */ | |
782 | static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this) | |
783 | { | |
784 | struct bch_geometry *geo = &this->bch_geometry; | |
785 | struct device *dev = this->dev; | |
06f216c8 | 786 | struct mtd_info *mtd = &this->mtd; |
10a2bcae HS |
787 | |
788 | /* [1] Allocate a command buffer. PAGE_SIZE is enough. */ | |
513d57e1 | 789 | this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL); |
10a2bcae HS |
790 | if (this->cmd_buffer == NULL) |
791 | goto error_alloc; | |
792 | ||
06f216c8 HS |
793 | /* |
794 | * [2] Allocate a read/write data buffer. | |
795 | * The gpmi_alloc_dma_buffer can be called twice. | |
796 | * We allocate a PAGE_SIZE length buffer if gpmi_alloc_dma_buffer | |
797 | * is called before the nand_scan_ident; and we allocate a buffer | |
798 | * of the real NAND page size when the gpmi_alloc_dma_buffer is | |
799 | * called after the nand_scan_ident. | |
800 | */ | |
801 | this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE, | |
802 | GFP_DMA | GFP_KERNEL); | |
10a2bcae HS |
803 | if (this->data_buffer_dma == NULL) |
804 | goto error_alloc; | |
805 | ||
806 | /* | |
807 | * [3] Allocate the page buffer. | |
808 | * | |
809 | * Both the payload buffer and the auxiliary buffer must appear on | |
810 | * 32-bit boundaries. We presume the size of the payload buffer is a | |
811 | * power of two and is much larger than four, which guarantees the | |
812 | * auxiliary buffer will appear on a 32-bit boundary. | |
813 | */ | |
814 | this->page_buffer_size = geo->payload_size + geo->auxiliary_size; | |
815 | this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size, | |
816 | &this->page_buffer_phys, GFP_DMA); | |
817 | if (!this->page_buffer_virt) | |
818 | goto error_alloc; | |
819 | ||
820 | ||
821 | /* Slice up the page buffer. */ | |
822 | this->payload_virt = this->page_buffer_virt; | |
823 | this->payload_phys = this->page_buffer_phys; | |
824 | this->auxiliary_virt = this->payload_virt + geo->payload_size; | |
825 | this->auxiliary_phys = this->payload_phys + geo->payload_size; | |
826 | return 0; | |
827 | ||
828 | error_alloc: | |
829 | gpmi_free_dma_buffer(this); | |
10a2bcae HS |
830 | return -ENOMEM; |
831 | } | |
832 | ||
833 | static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl) | |
834 | { | |
835 | struct nand_chip *chip = mtd->priv; | |
836 | struct gpmi_nand_data *this = chip->priv; | |
837 | int ret; | |
838 | ||
839 | /* | |
840 | * Every operation begins with a command byte and a series of zero or | |
841 | * more address bytes. These are distinguished by either the Address | |
842 | * Latch Enable (ALE) or Command Latch Enable (CLE) signals being | |
843 | * asserted. When MTD is ready to execute the command, it will deassert | |
844 | * both latch enables. | |
845 | * | |
846 | * Rather than run a separate DMA operation for every single byte, we | |
847 | * queue them up and run a single DMA operation for the entire series | |
848 | * of command and data bytes. NAND_CMD_NONE means the END of the queue. | |
849 | */ | |
850 | if ((ctrl & (NAND_ALE | NAND_CLE))) { | |
851 | if (data != NAND_CMD_NONE) | |
852 | this->cmd_buffer[this->command_length++] = data; | |
853 | return; | |
854 | } | |
855 | ||
856 | if (!this->command_length) | |
857 | return; | |
858 | ||
859 | ret = gpmi_send_command(this); | |
860 | if (ret) | |
da40c16a HS |
861 | dev_err(this->dev, "Chip: %u, Error %d\n", |
862 | this->current_chip, ret); | |
10a2bcae HS |
863 | |
864 | this->command_length = 0; | |
865 | } | |
866 | ||
867 | static int gpmi_dev_ready(struct mtd_info *mtd) | |
868 | { | |
869 | struct nand_chip *chip = mtd->priv; | |
870 | struct gpmi_nand_data *this = chip->priv; | |
871 | ||
872 | return gpmi_is_ready(this, this->current_chip); | |
873 | } | |
874 | ||
875 | static void gpmi_select_chip(struct mtd_info *mtd, int chipnr) | |
876 | { | |
877 | struct nand_chip *chip = mtd->priv; | |
878 | struct gpmi_nand_data *this = chip->priv; | |
879 | ||
880 | if ((this->current_chip < 0) && (chipnr >= 0)) | |
881 | gpmi_begin(this); | |
882 | else if ((this->current_chip >= 0) && (chipnr < 0)) | |
883 | gpmi_end(this); | |
884 | ||
885 | this->current_chip = chipnr; | |
886 | } | |
887 | ||
888 | static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) | |
889 | { | |
890 | struct nand_chip *chip = mtd->priv; | |
891 | struct gpmi_nand_data *this = chip->priv; | |
892 | ||
c2325962 | 893 | dev_dbg(this->dev, "len is %d\n", len); |
10a2bcae HS |
894 | this->upper_buf = buf; |
895 | this->upper_len = len; | |
896 | ||
897 | gpmi_read_data(this); | |
898 | } | |
899 | ||
900 | static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) | |
901 | { | |
902 | struct nand_chip *chip = mtd->priv; | |
903 | struct gpmi_nand_data *this = chip->priv; | |
904 | ||
c2325962 | 905 | dev_dbg(this->dev, "len is %d\n", len); |
10a2bcae HS |
906 | this->upper_buf = (uint8_t *)buf; |
907 | this->upper_len = len; | |
908 | ||
909 | gpmi_send_data(this); | |
910 | } | |
911 | ||
912 | static uint8_t gpmi_read_byte(struct mtd_info *mtd) | |
913 | { | |
914 | struct nand_chip *chip = mtd->priv; | |
915 | struct gpmi_nand_data *this = chip->priv; | |
916 | uint8_t *buf = this->data_buffer_dma; | |
917 | ||
918 | gpmi_read_buf(mtd, buf, 1); | |
919 | return buf[0]; | |
920 | } | |
921 | ||
922 | /* | |
923 | * Handles block mark swapping. | |
924 | * It can be called in swapping the block mark, or swapping it back, | |
925 | * because the the operations are the same. | |
926 | */ | |
927 | static void block_mark_swapping(struct gpmi_nand_data *this, | |
928 | void *payload, void *auxiliary) | |
929 | { | |
930 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
931 | unsigned char *p; | |
932 | unsigned char *a; | |
933 | unsigned int bit; | |
934 | unsigned char mask; | |
935 | unsigned char from_data; | |
936 | unsigned char from_oob; | |
937 | ||
938 | if (!this->swap_block_mark) | |
939 | return; | |
940 | ||
941 | /* | |
942 | * If control arrives here, we're swapping. Make some convenience | |
943 | * variables. | |
944 | */ | |
945 | bit = nfc_geo->block_mark_bit_offset; | |
946 | p = payload + nfc_geo->block_mark_byte_offset; | |
947 | a = auxiliary; | |
948 | ||
949 | /* | |
950 | * Get the byte from the data area that overlays the block mark. Since | |
951 | * the ECC engine applies its own view to the bits in the page, the | |
952 | * physical block mark won't (in general) appear on a byte boundary in | |
953 | * the data. | |
954 | */ | |
955 | from_data = (p[0] >> bit) | (p[1] << (8 - bit)); | |
956 | ||
957 | /* Get the byte from the OOB. */ | |
958 | from_oob = a[0]; | |
959 | ||
960 | /* Swap them. */ | |
961 | a[0] = from_data; | |
962 | ||
963 | mask = (0x1 << bit) - 1; | |
964 | p[0] = (p[0] & mask) | (from_oob << bit); | |
965 | ||
966 | mask = ~0 << bit; | |
967 | p[1] = (p[1] & mask) | (from_oob >> (8 - bit)); | |
968 | } | |
969 | ||
970 | static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip, | |
1fbb938d | 971 | uint8_t *buf, int oob_required, int page) |
10a2bcae HS |
972 | { |
973 | struct gpmi_nand_data *this = chip->priv; | |
974 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
975 | void *payload_virt; | |
976 | dma_addr_t payload_phys; | |
977 | void *auxiliary_virt; | |
978 | dma_addr_t auxiliary_phys; | |
979 | unsigned int i; | |
980 | unsigned char *status; | |
b23b746c | 981 | unsigned int max_bitflips = 0; |
10a2bcae HS |
982 | int ret; |
983 | ||
c2325962 | 984 | dev_dbg(this->dev, "page number is : %d\n", page); |
10a2bcae HS |
985 | ret = read_page_prepare(this, buf, mtd->writesize, |
986 | this->payload_virt, this->payload_phys, | |
987 | nfc_geo->payload_size, | |
988 | &payload_virt, &payload_phys); | |
989 | if (ret) { | |
da40c16a | 990 | dev_err(this->dev, "Inadequate DMA buffer\n"); |
10a2bcae HS |
991 | ret = -ENOMEM; |
992 | return ret; | |
993 | } | |
994 | auxiliary_virt = this->auxiliary_virt; | |
995 | auxiliary_phys = this->auxiliary_phys; | |
996 | ||
997 | /* go! */ | |
998 | ret = gpmi_read_page(this, payload_phys, auxiliary_phys); | |
999 | read_page_end(this, buf, mtd->writesize, | |
1000 | this->payload_virt, this->payload_phys, | |
1001 | nfc_geo->payload_size, | |
1002 | payload_virt, payload_phys); | |
1003 | if (ret) { | |
da40c16a | 1004 | dev_err(this->dev, "Error in ECC-based read: %d\n", ret); |
b23b746c | 1005 | return ret; |
10a2bcae HS |
1006 | } |
1007 | ||
1008 | /* handle the block mark swapping */ | |
1009 | block_mark_swapping(this, payload_virt, auxiliary_virt); | |
1010 | ||
1011 | /* Loop over status bytes, accumulating ECC status. */ | |
b23b746c | 1012 | status = auxiliary_virt + nfc_geo->auxiliary_status_offset; |
10a2bcae HS |
1013 | |
1014 | for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) { | |
1015 | if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED)) | |
1016 | continue; | |
1017 | ||
1018 | if (*status == STATUS_UNCORRECTABLE) { | |
b23b746c | 1019 | mtd->ecc_stats.failed++; |
10a2bcae HS |
1020 | continue; |
1021 | } | |
b23b746c ZS |
1022 | mtd->ecc_stats.corrected += *status; |
1023 | max_bitflips = max_t(unsigned int, max_bitflips, *status); | |
10a2bcae HS |
1024 | } |
1025 | ||
7725cc85 BN |
1026 | if (oob_required) { |
1027 | /* | |
1028 | * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() | |
1029 | * for details about our policy for delivering the OOB. | |
1030 | * | |
1031 | * We fill the caller's buffer with set bits, and then copy the | |
1032 | * block mark to th caller's buffer. Note that, if block mark | |
1033 | * swapping was necessary, it has already been done, so we can | |
1034 | * rely on the first byte of the auxiliary buffer to contain | |
1035 | * the block mark. | |
1036 | */ | |
1037 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
1038 | chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0]; | |
7725cc85 | 1039 | } |
6023813a SH |
1040 | |
1041 | read_page_swap_end(this, buf, mtd->writesize, | |
1042 | this->payload_virt, this->payload_phys, | |
1043 | nfc_geo->payload_size, | |
1044 | payload_virt, payload_phys); | |
b23b746c ZS |
1045 | |
1046 | return max_bitflips; | |
10a2bcae HS |
1047 | } |
1048 | ||
fdbad98d | 1049 | static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
1fbb938d | 1050 | const uint8_t *buf, int oob_required) |
10a2bcae HS |
1051 | { |
1052 | struct gpmi_nand_data *this = chip->priv; | |
1053 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
1054 | const void *payload_virt; | |
1055 | dma_addr_t payload_phys; | |
1056 | const void *auxiliary_virt; | |
1057 | dma_addr_t auxiliary_phys; | |
1058 | int ret; | |
1059 | ||
c2325962 | 1060 | dev_dbg(this->dev, "ecc write page.\n"); |
10a2bcae HS |
1061 | if (this->swap_block_mark) { |
1062 | /* | |
1063 | * If control arrives here, we're doing block mark swapping. | |
1064 | * Since we can't modify the caller's buffers, we must copy them | |
1065 | * into our own. | |
1066 | */ | |
1067 | memcpy(this->payload_virt, buf, mtd->writesize); | |
1068 | payload_virt = this->payload_virt; | |
1069 | payload_phys = this->payload_phys; | |
1070 | ||
1071 | memcpy(this->auxiliary_virt, chip->oob_poi, | |
1072 | nfc_geo->auxiliary_size); | |
1073 | auxiliary_virt = this->auxiliary_virt; | |
1074 | auxiliary_phys = this->auxiliary_phys; | |
1075 | ||
1076 | /* Handle block mark swapping. */ | |
1077 | block_mark_swapping(this, | |
1078 | (void *) payload_virt, (void *) auxiliary_virt); | |
1079 | } else { | |
1080 | /* | |
1081 | * If control arrives here, we're not doing block mark swapping, | |
1082 | * so we can to try and use the caller's buffers. | |
1083 | */ | |
1084 | ret = send_page_prepare(this, | |
1085 | buf, mtd->writesize, | |
1086 | this->payload_virt, this->payload_phys, | |
1087 | nfc_geo->payload_size, | |
1088 | &payload_virt, &payload_phys); | |
1089 | if (ret) { | |
da40c16a | 1090 | dev_err(this->dev, "Inadequate payload DMA buffer\n"); |
fdbad98d | 1091 | return 0; |
10a2bcae HS |
1092 | } |
1093 | ||
1094 | ret = send_page_prepare(this, | |
1095 | chip->oob_poi, mtd->oobsize, | |
1096 | this->auxiliary_virt, this->auxiliary_phys, | |
1097 | nfc_geo->auxiliary_size, | |
1098 | &auxiliary_virt, &auxiliary_phys); | |
1099 | if (ret) { | |
da40c16a | 1100 | dev_err(this->dev, "Inadequate auxiliary DMA buffer\n"); |
10a2bcae HS |
1101 | goto exit_auxiliary; |
1102 | } | |
1103 | } | |
1104 | ||
1105 | /* Ask the NFC. */ | |
1106 | ret = gpmi_send_page(this, payload_phys, auxiliary_phys); | |
1107 | if (ret) | |
da40c16a | 1108 | dev_err(this->dev, "Error in ECC-based write: %d\n", ret); |
10a2bcae HS |
1109 | |
1110 | if (!this->swap_block_mark) { | |
1111 | send_page_end(this, chip->oob_poi, mtd->oobsize, | |
1112 | this->auxiliary_virt, this->auxiliary_phys, | |
1113 | nfc_geo->auxiliary_size, | |
1114 | auxiliary_virt, auxiliary_phys); | |
1115 | exit_auxiliary: | |
1116 | send_page_end(this, buf, mtd->writesize, | |
1117 | this->payload_virt, this->payload_phys, | |
1118 | nfc_geo->payload_size, | |
1119 | payload_virt, payload_phys); | |
1120 | } | |
fdbad98d JW |
1121 | |
1122 | return 0; | |
10a2bcae HS |
1123 | } |
1124 | ||
1125 | /* | |
1126 | * There are several places in this driver where we have to handle the OOB and | |
1127 | * block marks. This is the function where things are the most complicated, so | |
1128 | * this is where we try to explain it all. All the other places refer back to | |
1129 | * here. | |
1130 | * | |
1131 | * These are the rules, in order of decreasing importance: | |
1132 | * | |
1133 | * 1) Nothing the caller does can be allowed to imperil the block mark. | |
1134 | * | |
1135 | * 2) In read operations, the first byte of the OOB we return must reflect the | |
1136 | * true state of the block mark, no matter where that block mark appears in | |
1137 | * the physical page. | |
1138 | * | |
1139 | * 3) ECC-based read operations return an OOB full of set bits (since we never | |
1140 | * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads | |
1141 | * return). | |
1142 | * | |
1143 | * 4) "Raw" read operations return a direct view of the physical bytes in the | |
1144 | * page, using the conventional definition of which bytes are data and which | |
1145 | * are OOB. This gives the caller a way to see the actual, physical bytes | |
1146 | * in the page, without the distortions applied by our ECC engine. | |
1147 | * | |
1148 | * | |
1149 | * What we do for this specific read operation depends on two questions: | |
1150 | * | |
1151 | * 1) Are we doing a "raw" read, or an ECC-based read? | |
1152 | * | |
1153 | * 2) Are we using block mark swapping or transcription? | |
1154 | * | |
1155 | * There are four cases, illustrated by the following Karnaugh map: | |
1156 | * | |
1157 | * | Raw | ECC-based | | |
1158 | * -------------+-------------------------+-------------------------+ | |
1159 | * | Read the conventional | | | |
1160 | * | OOB at the end of the | | | |
1161 | * Swapping | page and return it. It | | | |
1162 | * | contains exactly what | | | |
1163 | * | we want. | Read the block mark and | | |
1164 | * -------------+-------------------------+ return it in a buffer | | |
1165 | * | Read the conventional | full of set bits. | | |
1166 | * | OOB at the end of the | | | |
1167 | * | page and also the block | | | |
1168 | * Transcribing | mark in the metadata. | | | |
1169 | * | Copy the block mark | | | |
1170 | * | into the first byte of | | | |
1171 | * | the OOB. | | | |
1172 | * -------------+-------------------------+-------------------------+ | |
1173 | * | |
1174 | * Note that we break rule #4 in the Transcribing/Raw case because we're not | |
1175 | * giving an accurate view of the actual, physical bytes in the page (we're | |
1176 | * overwriting the block mark). That's OK because it's more important to follow | |
1177 | * rule #2. | |
1178 | * | |
1179 | * It turns out that knowing whether we want an "ECC-based" or "raw" read is not | |
1180 | * easy. When reading a page, for example, the NAND Flash MTD code calls our | |
1181 | * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an | |
1182 | * ECC-based or raw view of the page is implicit in which function it calls | |
1183 | * (there is a similar pair of ECC-based/raw functions for writing). | |
1184 | * | |
271b874b BN |
1185 | * FIXME: The following paragraph is incorrect, now that there exist |
1186 | * ecc.read_oob_raw and ecc.write_oob_raw functions. | |
1187 | * | |
10a2bcae HS |
1188 | * Since MTD assumes the OOB is not covered by ECC, there is no pair of |
1189 | * ECC-based/raw functions for reading or or writing the OOB. The fact that the | |
1190 | * caller wants an ECC-based or raw view of the page is not propagated down to | |
1191 | * this driver. | |
1192 | */ | |
1193 | static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip, | |
5c2ffb11 | 1194 | int page) |
10a2bcae HS |
1195 | { |
1196 | struct gpmi_nand_data *this = chip->priv; | |
1197 | ||
c2325962 | 1198 | dev_dbg(this->dev, "page number is %d\n", page); |
10a2bcae HS |
1199 | /* clear the OOB buffer */ |
1200 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
1201 | ||
1202 | /* Read out the conventional OOB. */ | |
1203 | chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); | |
1204 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); | |
1205 | ||
1206 | /* | |
1207 | * Now, we want to make sure the block mark is correct. In the | |
1208 | * Swapping/Raw case, we already have it. Otherwise, we need to | |
1209 | * explicitly read it. | |
1210 | */ | |
1211 | if (!this->swap_block_mark) { | |
1212 | /* Read the block mark into the first byte of the OOB buffer. */ | |
1213 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); | |
1214 | chip->oob_poi[0] = chip->read_byte(mtd); | |
1215 | } | |
1216 | ||
5c2ffb11 | 1217 | return 0; |
10a2bcae HS |
1218 | } |
1219 | ||
1220 | static int | |
1221 | gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page) | |
1222 | { | |
7a2b89ac HS |
1223 | struct nand_oobfree *of = mtd->ecclayout->oobfree; |
1224 | int status = 0; | |
1225 | ||
1226 | /* Do we have available oob area? */ | |
1227 | if (!of->length) | |
1228 | return -EPERM; | |
1229 | ||
1230 | if (!nand_is_slc(chip)) | |
1231 | return -EPERM; | |
1232 | ||
1233 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + of->offset, page); | |
1234 | chip->write_buf(mtd, chip->oob_poi + of->offset, of->length); | |
1235 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); | |
1236 | ||
1237 | status = chip->waitfunc(mtd, chip); | |
1238 | return status & NAND_STATUS_FAIL ? -EIO : 0; | |
10a2bcae HS |
1239 | } |
1240 | ||
1241 | static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
1242 | { | |
1243 | struct nand_chip *chip = mtd->priv; | |
1244 | struct gpmi_nand_data *this = chip->priv; | |
5a0edb25 | 1245 | int ret = 0; |
10a2bcae HS |
1246 | uint8_t *block_mark; |
1247 | int column, page, status, chipnr; | |
1248 | ||
5a0edb25 BN |
1249 | chipnr = (int)(ofs >> chip->chip_shift); |
1250 | chip->select_chip(mtd, chipnr); | |
10a2bcae | 1251 | |
5a0edb25 | 1252 | column = this->swap_block_mark ? mtd->writesize : 0; |
10a2bcae | 1253 | |
5a0edb25 BN |
1254 | /* Write the block mark. */ |
1255 | block_mark = this->data_buffer_dma; | |
1256 | block_mark[0] = 0; /* bad block marker */ | |
10a2bcae | 1257 | |
5a0edb25 BN |
1258 | /* Shift to get page */ |
1259 | page = (int)(ofs >> chip->page_shift); | |
10a2bcae | 1260 | |
5a0edb25 BN |
1261 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page); |
1262 | chip->write_buf(mtd, block_mark, 1); | |
1263 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); | |
10a2bcae | 1264 | |
5a0edb25 BN |
1265 | status = chip->waitfunc(mtd, chip); |
1266 | if (status & NAND_STATUS_FAIL) | |
1267 | ret = -EIO; | |
10a2bcae | 1268 | |
5a0edb25 | 1269 | chip->select_chip(mtd, -1); |
10a2bcae HS |
1270 | |
1271 | return ret; | |
1272 | } | |
1273 | ||
a78da287 | 1274 | static int nand_boot_set_geometry(struct gpmi_nand_data *this) |
10a2bcae HS |
1275 | { |
1276 | struct boot_rom_geometry *geometry = &this->rom_geometry; | |
1277 | ||
1278 | /* | |
1279 | * Set the boot block stride size. | |
1280 | * | |
1281 | * In principle, we should be reading this from the OTP bits, since | |
1282 | * that's where the ROM is going to get it. In fact, we don't have any | |
1283 | * way to read the OTP bits, so we go with the default and hope for the | |
1284 | * best. | |
1285 | */ | |
1286 | geometry->stride_size_in_pages = 64; | |
1287 | ||
1288 | /* | |
1289 | * Set the search area stride exponent. | |
1290 | * | |
1291 | * In principle, we should be reading this from the OTP bits, since | |
1292 | * that's where the ROM is going to get it. In fact, we don't have any | |
1293 | * way to read the OTP bits, so we go with the default and hope for the | |
1294 | * best. | |
1295 | */ | |
1296 | geometry->search_area_stride_exponent = 2; | |
1297 | return 0; | |
1298 | } | |
1299 | ||
1300 | static const char *fingerprint = "STMP"; | |
a78da287 | 1301 | static int mx23_check_transcription_stamp(struct gpmi_nand_data *this) |
10a2bcae HS |
1302 | { |
1303 | struct boot_rom_geometry *rom_geo = &this->rom_geometry; | |
1304 | struct device *dev = this->dev; | |
1305 | struct mtd_info *mtd = &this->mtd; | |
1306 | struct nand_chip *chip = &this->nand; | |
1307 | unsigned int search_area_size_in_strides; | |
1308 | unsigned int stride; | |
1309 | unsigned int page; | |
10a2bcae HS |
1310 | uint8_t *buffer = chip->buffers->databuf; |
1311 | int saved_chip_number; | |
1312 | int found_an_ncb_fingerprint = false; | |
1313 | ||
1314 | /* Compute the number of strides in a search area. */ | |
1315 | search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; | |
1316 | ||
1317 | saved_chip_number = this->current_chip; | |
1318 | chip->select_chip(mtd, 0); | |
1319 | ||
1320 | /* | |
1321 | * Loop through the first search area, looking for the NCB fingerprint. | |
1322 | */ | |
1323 | dev_dbg(dev, "Scanning for an NCB fingerprint...\n"); | |
1324 | ||
1325 | for (stride = 0; stride < search_area_size_in_strides; stride++) { | |
513d57e1 | 1326 | /* Compute the page addresses. */ |
10a2bcae | 1327 | page = stride * rom_geo->stride_size_in_pages; |
10a2bcae HS |
1328 | |
1329 | dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page); | |
1330 | ||
1331 | /* | |
1332 | * Read the NCB fingerprint. The fingerprint is four bytes long | |
1333 | * and starts in the 12th byte of the page. | |
1334 | */ | |
1335 | chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page); | |
1336 | chip->read_buf(mtd, buffer, strlen(fingerprint)); | |
1337 | ||
1338 | /* Look for the fingerprint. */ | |
1339 | if (!memcmp(buffer, fingerprint, strlen(fingerprint))) { | |
1340 | found_an_ncb_fingerprint = true; | |
1341 | break; | |
1342 | } | |
1343 | ||
1344 | } | |
1345 | ||
1346 | chip->select_chip(mtd, saved_chip_number); | |
1347 | ||
1348 | if (found_an_ncb_fingerprint) | |
1349 | dev_dbg(dev, "\tFound a fingerprint\n"); | |
1350 | else | |
1351 | dev_dbg(dev, "\tNo fingerprint found\n"); | |
1352 | return found_an_ncb_fingerprint; | |
1353 | } | |
1354 | ||
1355 | /* Writes a transcription stamp. */ | |
a78da287 | 1356 | static int mx23_write_transcription_stamp(struct gpmi_nand_data *this) |
10a2bcae HS |
1357 | { |
1358 | struct device *dev = this->dev; | |
1359 | struct boot_rom_geometry *rom_geo = &this->rom_geometry; | |
1360 | struct mtd_info *mtd = &this->mtd; | |
1361 | struct nand_chip *chip = &this->nand; | |
1362 | unsigned int block_size_in_pages; | |
1363 | unsigned int search_area_size_in_strides; | |
1364 | unsigned int search_area_size_in_pages; | |
1365 | unsigned int search_area_size_in_blocks; | |
1366 | unsigned int block; | |
1367 | unsigned int stride; | |
1368 | unsigned int page; | |
10a2bcae HS |
1369 | uint8_t *buffer = chip->buffers->databuf; |
1370 | int saved_chip_number; | |
1371 | int status; | |
1372 | ||
1373 | /* Compute the search area geometry. */ | |
1374 | block_size_in_pages = mtd->erasesize / mtd->writesize; | |
1375 | search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; | |
1376 | search_area_size_in_pages = search_area_size_in_strides * | |
1377 | rom_geo->stride_size_in_pages; | |
1378 | search_area_size_in_blocks = | |
1379 | (search_area_size_in_pages + (block_size_in_pages - 1)) / | |
1380 | block_size_in_pages; | |
1381 | ||
1382 | dev_dbg(dev, "Search Area Geometry :\n"); | |
1383 | dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks); | |
1384 | dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides); | |
1385 | dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages); | |
1386 | ||
1387 | /* Select chip 0. */ | |
1388 | saved_chip_number = this->current_chip; | |
1389 | chip->select_chip(mtd, 0); | |
1390 | ||
1391 | /* Loop over blocks in the first search area, erasing them. */ | |
1392 | dev_dbg(dev, "Erasing the search area...\n"); | |
1393 | ||
1394 | for (block = 0; block < search_area_size_in_blocks; block++) { | |
1395 | /* Compute the page address. */ | |
1396 | page = block * block_size_in_pages; | |
1397 | ||
1398 | /* Erase this block. */ | |
1399 | dev_dbg(dev, "\tErasing block 0x%x\n", block); | |
1400 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); | |
1401 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); | |
1402 | ||
1403 | /* Wait for the erase to finish. */ | |
1404 | status = chip->waitfunc(mtd, chip); | |
1405 | if (status & NAND_STATUS_FAIL) | |
1406 | dev_err(dev, "[%s] Erase failed.\n", __func__); | |
1407 | } | |
1408 | ||
1409 | /* Write the NCB fingerprint into the page buffer. */ | |
1410 | memset(buffer, ~0, mtd->writesize); | |
10a2bcae HS |
1411 | memcpy(buffer + 12, fingerprint, strlen(fingerprint)); |
1412 | ||
1413 | /* Loop through the first search area, writing NCB fingerprints. */ | |
1414 | dev_dbg(dev, "Writing NCB fingerprints...\n"); | |
1415 | for (stride = 0; stride < search_area_size_in_strides; stride++) { | |
513d57e1 | 1416 | /* Compute the page addresses. */ |
10a2bcae | 1417 | page = stride * rom_geo->stride_size_in_pages; |
10a2bcae HS |
1418 | |
1419 | /* Write the first page of the current stride. */ | |
1420 | dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page); | |
1421 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); | |
1fbb938d | 1422 | chip->ecc.write_page_raw(mtd, chip, buffer, 0); |
10a2bcae HS |
1423 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
1424 | ||
1425 | /* Wait for the write to finish. */ | |
1426 | status = chip->waitfunc(mtd, chip); | |
1427 | if (status & NAND_STATUS_FAIL) | |
1428 | dev_err(dev, "[%s] Write failed.\n", __func__); | |
1429 | } | |
1430 | ||
1431 | /* Deselect chip 0. */ | |
1432 | chip->select_chip(mtd, saved_chip_number); | |
1433 | return 0; | |
1434 | } | |
1435 | ||
a78da287 | 1436 | static int mx23_boot_init(struct gpmi_nand_data *this) |
10a2bcae HS |
1437 | { |
1438 | struct device *dev = this->dev; | |
1439 | struct nand_chip *chip = &this->nand; | |
1440 | struct mtd_info *mtd = &this->mtd; | |
1441 | unsigned int block_count; | |
1442 | unsigned int block; | |
1443 | int chipnr; | |
1444 | int page; | |
1445 | loff_t byte; | |
1446 | uint8_t block_mark; | |
1447 | int ret = 0; | |
1448 | ||
1449 | /* | |
1450 | * If control arrives here, we can't use block mark swapping, which | |
1451 | * means we're forced to use transcription. First, scan for the | |
1452 | * transcription stamp. If we find it, then we don't have to do | |
1453 | * anything -- the block marks are already transcribed. | |
1454 | */ | |
1455 | if (mx23_check_transcription_stamp(this)) | |
1456 | return 0; | |
1457 | ||
1458 | /* | |
1459 | * If control arrives here, we couldn't find a transcription stamp, so | |
1460 | * so we presume the block marks are in the conventional location. | |
1461 | */ | |
1462 | dev_dbg(dev, "Transcribing bad block marks...\n"); | |
1463 | ||
1464 | /* Compute the number of blocks in the entire medium. */ | |
1465 | block_count = chip->chipsize >> chip->phys_erase_shift; | |
1466 | ||
1467 | /* | |
1468 | * Loop over all the blocks in the medium, transcribing block marks as | |
1469 | * we go. | |
1470 | */ | |
1471 | for (block = 0; block < block_count; block++) { | |
1472 | /* | |
1473 | * Compute the chip, page and byte addresses for this block's | |
1474 | * conventional mark. | |
1475 | */ | |
1476 | chipnr = block >> (chip->chip_shift - chip->phys_erase_shift); | |
1477 | page = block << (chip->phys_erase_shift - chip->page_shift); | |
1478 | byte = block << chip->phys_erase_shift; | |
1479 | ||
1480 | /* Send the command to read the conventional block mark. */ | |
1481 | chip->select_chip(mtd, chipnr); | |
1482 | chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); | |
1483 | block_mark = chip->read_byte(mtd); | |
1484 | chip->select_chip(mtd, -1); | |
1485 | ||
1486 | /* | |
1487 | * Check if the block is marked bad. If so, we need to mark it | |
1488 | * again, but this time the result will be a mark in the | |
1489 | * location where we transcribe block marks. | |
1490 | */ | |
1491 | if (block_mark != 0xff) { | |
1492 | dev_dbg(dev, "Transcribing mark in block %u\n", block); | |
1493 | ret = chip->block_markbad(mtd, byte); | |
1494 | if (ret) | |
1495 | dev_err(dev, "Failed to mark block bad with " | |
1496 | "ret %d\n", ret); | |
1497 | } | |
1498 | } | |
1499 | ||
1500 | /* Write the stamp that indicates we've transcribed the block marks. */ | |
1501 | mx23_write_transcription_stamp(this); | |
1502 | return 0; | |
1503 | } | |
1504 | ||
a78da287 | 1505 | static int nand_boot_init(struct gpmi_nand_data *this) |
10a2bcae HS |
1506 | { |
1507 | nand_boot_set_geometry(this); | |
1508 | ||
1509 | /* This is ROM arch-specific initilization before the BBT scanning. */ | |
1510 | if (GPMI_IS_MX23(this)) | |
1511 | return mx23_boot_init(this); | |
1512 | return 0; | |
1513 | } | |
1514 | ||
a78da287 | 1515 | static int gpmi_set_geometry(struct gpmi_nand_data *this) |
10a2bcae HS |
1516 | { |
1517 | int ret; | |
1518 | ||
1519 | /* Free the temporary DMA memory for reading ID. */ | |
1520 | gpmi_free_dma_buffer(this); | |
1521 | ||
1522 | /* Set up the NFC geometry which is used by BCH. */ | |
1523 | ret = bch_set_geometry(this); | |
1524 | if (ret) { | |
da40c16a | 1525 | dev_err(this->dev, "Error setting BCH geometry : %d\n", ret); |
10a2bcae HS |
1526 | return ret; |
1527 | } | |
1528 | ||
1529 | /* Alloc the new DMA buffers according to the pagesize and oobsize */ | |
1530 | return gpmi_alloc_dma_buffer(this); | |
1531 | } | |
1532 | ||
ccce4177 | 1533 | static void gpmi_nand_exit(struct gpmi_nand_data *this) |
f720e7ce HS |
1534 | { |
1535 | nand_release(&this->mtd); | |
1536 | gpmi_free_dma_buffer(this); | |
1537 | } | |
1538 | ||
1539 | static int gpmi_init_last(struct gpmi_nand_data *this) | |
10a2bcae | 1540 | { |
f720e7ce | 1541 | struct mtd_info *mtd = &this->mtd; |
10a2bcae | 1542 | struct nand_chip *chip = mtd->priv; |
f720e7ce HS |
1543 | struct nand_ecc_ctrl *ecc = &chip->ecc; |
1544 | struct bch_geometry *bch_geo = &this->bch_geometry; | |
10a2bcae HS |
1545 | int ret; |
1546 | ||
d7364a27 HS |
1547 | /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */ |
1548 | this->swap_block_mark = !GPMI_IS_MX23(this); | |
1549 | ||
1550 | /* Set up the medium geometry */ | |
1551 | ret = gpmi_set_geometry(this); | |
10a2bcae HS |
1552 | if (ret) |
1553 | return ret; | |
1554 | ||
f720e7ce HS |
1555 | /* Init the nand_ecc_ctrl{} */ |
1556 | ecc->read_page = gpmi_ecc_read_page; | |
1557 | ecc->write_page = gpmi_ecc_write_page; | |
1558 | ecc->read_oob = gpmi_ecc_read_oob; | |
1559 | ecc->write_oob = gpmi_ecc_write_oob; | |
1560 | ecc->mode = NAND_ECC_HW; | |
1561 | ecc->size = bch_geo->ecc_chunk_size; | |
1562 | ecc->strength = bch_geo->ecc_strength; | |
1563 | ecc->layout = &gpmi_hw_ecclayout; | |
1564 | ||
995fbbf5 HS |
1565 | /* |
1566 | * Can we enable the extra features? such as EDO or Sync mode. | |
1567 | * | |
1568 | * We do not check the return value now. That's means if we fail in | |
1569 | * enable the extra features, we still can run in the normal way. | |
1570 | */ | |
1571 | gpmi_extra_init(this); | |
1572 | ||
f720e7ce | 1573 | return 0; |
10a2bcae HS |
1574 | } |
1575 | ||
ccce4177 | 1576 | static int gpmi_nand_init(struct gpmi_nand_data *this) |
10a2bcae | 1577 | { |
10a2bcae HS |
1578 | struct mtd_info *mtd = &this->mtd; |
1579 | struct nand_chip *chip = &this->nand; | |
e10db1f0 | 1580 | struct mtd_part_parser_data ppdata = {}; |
10a2bcae HS |
1581 | int ret; |
1582 | ||
1583 | /* init current chip */ | |
1584 | this->current_chip = -1; | |
1585 | ||
1586 | /* init the MTD data structures */ | |
1587 | mtd->priv = chip; | |
1588 | mtd->name = "gpmi-nand"; | |
1589 | mtd->owner = THIS_MODULE; | |
1590 | ||
1591 | /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */ | |
1592 | chip->priv = this; | |
1593 | chip->select_chip = gpmi_select_chip; | |
1594 | chip->cmd_ctrl = gpmi_cmd_ctrl; | |
1595 | chip->dev_ready = gpmi_dev_ready; | |
1596 | chip->read_byte = gpmi_read_byte; | |
1597 | chip->read_buf = gpmi_read_buf; | |
1598 | chip->write_buf = gpmi_write_buf; | |
10a2bcae HS |
1599 | chip->badblock_pattern = &gpmi_bbt_descr; |
1600 | chip->block_markbad = gpmi_block_markbad; | |
1601 | chip->options |= NAND_NO_SUBPAGE_WRITE; | |
c50c6940 HS |
1602 | if (of_get_nand_on_flash_bbt(this->dev->of_node)) |
1603 | chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; | |
10a2bcae | 1604 | |
f720e7ce HS |
1605 | /* |
1606 | * Allocate a temporary DMA buffer for reading ID in the | |
1607 | * nand_scan_ident(). | |
1608 | */ | |
10a2bcae HS |
1609 | this->bch_geometry.payload_size = 1024; |
1610 | this->bch_geometry.auxiliary_size = 128; | |
1611 | ret = gpmi_alloc_dma_buffer(this); | |
1612 | if (ret) | |
1613 | goto err_out; | |
1614 | ||
80bd33ac | 1615 | ret = nand_scan_ident(mtd, GPMI_IS_MX6Q(this) ? 2 : 1, NULL); |
f720e7ce HS |
1616 | if (ret) |
1617 | goto err_out; | |
1618 | ||
1619 | ret = gpmi_init_last(this); | |
1620 | if (ret) | |
1621 | goto err_out; | |
1622 | ||
885d71e5 | 1623 | chip->options |= NAND_SKIP_BBTSCAN; |
f720e7ce HS |
1624 | ret = nand_scan_tail(mtd); |
1625 | if (ret) | |
10a2bcae | 1626 | goto err_out; |
10a2bcae | 1627 | |
885d71e5 HS |
1628 | ret = nand_boot_init(this); |
1629 | if (ret) | |
1630 | goto err_out; | |
1631 | chip->scan_bbt(mtd); | |
1632 | ||
e10db1f0 HS |
1633 | ppdata.of_node = this->pdev->dev.of_node; |
1634 | ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0); | |
10a2bcae HS |
1635 | if (ret) |
1636 | goto err_out; | |
1637 | return 0; | |
1638 | ||
1639 | err_out: | |
ccce4177 | 1640 | gpmi_nand_exit(this); |
10a2bcae HS |
1641 | return ret; |
1642 | } | |
1643 | ||
e10db1f0 HS |
1644 | static const struct platform_device_id gpmi_ids[] = { |
1645 | { .name = "imx23-gpmi-nand", .driver_data = IS_MX23, }, | |
1646 | { .name = "imx28-gpmi-nand", .driver_data = IS_MX28, }, | |
9013bb40 | 1647 | { .name = "imx6q-gpmi-nand", .driver_data = IS_MX6Q, }, |
d41f950e | 1648 | {} |
e10db1f0 HS |
1649 | }; |
1650 | ||
1651 | static const struct of_device_id gpmi_nand_id_table[] = { | |
1652 | { | |
1653 | .compatible = "fsl,imx23-gpmi-nand", | |
d41f950e | 1654 | .data = (void *)&gpmi_ids[IS_MX23], |
e10db1f0 HS |
1655 | }, { |
1656 | .compatible = "fsl,imx28-gpmi-nand", | |
d41f950e | 1657 | .data = (void *)&gpmi_ids[IS_MX28], |
9013bb40 HS |
1658 | }, { |
1659 | .compatible = "fsl,imx6q-gpmi-nand", | |
d41f950e | 1660 | .data = (void *)&gpmi_ids[IS_MX6Q], |
e10db1f0 HS |
1661 | }, {} |
1662 | }; | |
1663 | MODULE_DEVICE_TABLE(of, gpmi_nand_id_table); | |
1664 | ||
06f25510 | 1665 | static int gpmi_nand_probe(struct platform_device *pdev) |
10a2bcae | 1666 | { |
10a2bcae | 1667 | struct gpmi_nand_data *this; |
e10db1f0 | 1668 | const struct of_device_id *of_id; |
10a2bcae HS |
1669 | int ret; |
1670 | ||
e10db1f0 HS |
1671 | of_id = of_match_device(gpmi_nand_id_table, &pdev->dev); |
1672 | if (of_id) { | |
1673 | pdev->id_entry = of_id->data; | |
1674 | } else { | |
da40c16a | 1675 | dev_err(&pdev->dev, "Failed to find the right device id.\n"); |
52a073bd | 1676 | return -ENODEV; |
e10db1f0 HS |
1677 | } |
1678 | ||
edaf4d4a | 1679 | this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL); |
da40c16a | 1680 | if (!this) |
10a2bcae | 1681 | return -ENOMEM; |
10a2bcae HS |
1682 | |
1683 | platform_set_drvdata(pdev, this); | |
1684 | this->pdev = pdev; | |
1685 | this->dev = &pdev->dev; | |
10a2bcae HS |
1686 | |
1687 | ret = acquire_resources(this); | |
1688 | if (ret) | |
1689 | goto exit_acquire_resources; | |
1690 | ||
1691 | ret = init_hardware(this); | |
1692 | if (ret) | |
1693 | goto exit_nfc_init; | |
1694 | ||
ccce4177 | 1695 | ret = gpmi_nand_init(this); |
10a2bcae HS |
1696 | if (ret) |
1697 | goto exit_nfc_init; | |
1698 | ||
490e280a FE |
1699 | dev_info(this->dev, "driver registered.\n"); |
1700 | ||
10a2bcae HS |
1701 | return 0; |
1702 | ||
1703 | exit_nfc_init: | |
1704 | release_resources(this); | |
10a2bcae | 1705 | exit_acquire_resources: |
490e280a FE |
1706 | dev_err(this->dev, "driver registration failed: %d\n", ret); |
1707 | ||
10a2bcae HS |
1708 | return ret; |
1709 | } | |
1710 | ||
810b7e06 | 1711 | static int gpmi_nand_remove(struct platform_device *pdev) |
10a2bcae HS |
1712 | { |
1713 | struct gpmi_nand_data *this = platform_get_drvdata(pdev); | |
1714 | ||
ccce4177 | 1715 | gpmi_nand_exit(this); |
10a2bcae | 1716 | release_resources(this); |
10a2bcae HS |
1717 | return 0; |
1718 | } | |
1719 | ||
10a2bcae HS |
1720 | static struct platform_driver gpmi_nand_driver = { |
1721 | .driver = { | |
1722 | .name = "gpmi-nand", | |
e10db1f0 | 1723 | .of_match_table = gpmi_nand_id_table, |
10a2bcae HS |
1724 | }, |
1725 | .probe = gpmi_nand_probe, | |
5153b88c | 1726 | .remove = gpmi_nand_remove, |
10a2bcae HS |
1727 | .id_table = gpmi_ids, |
1728 | }; | |
490e280a | 1729 | module_platform_driver(gpmi_nand_driver); |
10a2bcae HS |
1730 | |
1731 | MODULE_AUTHOR("Freescale Semiconductor, Inc."); | |
1732 | MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver"); | |
1733 | MODULE_LICENSE("GPL"); |