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10a2bcae HS |
1 | /* |
2 | * Freescale GPMI NAND Flash Driver | |
3 | * | |
4 | * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. | |
5 | * Copyright (C) 2008 Embedded Alley Solutions, Inc. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along | |
18 | * with this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | |
20 | */ | |
3d10095a FE |
21 | |
22 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
23 | ||
10a2bcae HS |
24 | #include <linux/clk.h> |
25 | #include <linux/slab.h> | |
26 | #include <linux/interrupt.h> | |
df16c86a | 27 | #include <linux/module.h> |
10a2bcae | 28 | #include <linux/mtd/partitions.h> |
e10db1f0 HS |
29 | #include <linux/of.h> |
30 | #include <linux/of_device.h> | |
c50c6940 | 31 | #include <linux/of_mtd.h> |
10a2bcae HS |
32 | #include "gpmi-nand.h" |
33 | ||
5de0b52e HS |
34 | /* Resource names for the GPMI NAND driver. */ |
35 | #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand" | |
36 | #define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch" | |
37 | #define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch" | |
5de0b52e | 38 | |
10a2bcae HS |
39 | /* add our owner bbt descriptor */ |
40 | static uint8_t scan_ff_pattern[] = { 0xff }; | |
41 | static struct nand_bbt_descr gpmi_bbt_descr = { | |
42 | .options = 0, | |
43 | .offs = 0, | |
44 | .len = 1, | |
45 | .pattern = scan_ff_pattern | |
46 | }; | |
47 | ||
48 | /* We will use all the (page + OOB). */ | |
49 | static struct nand_ecclayout gpmi_hw_ecclayout = { | |
50 | .eccbytes = 0, | |
51 | .eccpos = { 0, }, | |
52 | .oobfree = { {.offset = 0, .length = 0} } | |
53 | }; | |
54 | ||
55 | static irqreturn_t bch_irq(int irq, void *cookie) | |
56 | { | |
57 | struct gpmi_nand_data *this = cookie; | |
58 | ||
59 | gpmi_clear_bch(this); | |
60 | complete(&this->bch_done); | |
61 | return IRQ_HANDLED; | |
62 | } | |
63 | ||
64 | /* | |
65 | * Calculate the ECC strength by hand: | |
66 | * E : The ECC strength. | |
67 | * G : the length of Galois Field. | |
68 | * N : The chunk count of per page. | |
69 | * O : the oobsize of the NAND chip. | |
70 | * M : the metasize of per page. | |
71 | * | |
72 | * The formula is : | |
73 | * E * G * N | |
74 | * ------------ <= (O - M) | |
75 | * 8 | |
76 | * | |
77 | * So, we get E by: | |
78 | * (O - M) * 8 | |
79 | * E <= ------------- | |
80 | * G * N | |
81 | */ | |
82 | static inline int get_ecc_strength(struct gpmi_nand_data *this) | |
83 | { | |
84 | struct bch_geometry *geo = &this->bch_geometry; | |
85 | struct mtd_info *mtd = &this->mtd; | |
86 | int ecc_strength; | |
87 | ||
88 | ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8) | |
89 | / (geo->gf_len * geo->ecc_chunk_count); | |
90 | ||
91 | /* We need the minor even number. */ | |
92 | return round_down(ecc_strength, 2); | |
93 | } | |
94 | ||
92d0e09a HS |
95 | static inline bool gpmi_check_ecc(struct gpmi_nand_data *this) |
96 | { | |
97 | struct bch_geometry *geo = &this->bch_geometry; | |
98 | ||
99 | /* Do the sanity check. */ | |
100 | if (GPMI_IS_MX23(this) || GPMI_IS_MX28(this)) { | |
101 | /* The mx23/mx28 only support the GF13. */ | |
102 | if (geo->gf_len == 14) | |
103 | return false; | |
104 | ||
105 | if (geo->ecc_strength > MXS_ECC_STRENGTH_MAX) | |
106 | return false; | |
107 | } else if (GPMI_IS_MX6Q(this)) { | |
108 | if (geo->ecc_strength > MX6_ECC_STRENGTH_MAX) | |
109 | return false; | |
110 | } | |
111 | return true; | |
112 | } | |
113 | ||
2febcdf8 HS |
114 | /* |
115 | * If we can get the ECC information from the nand chip, we do not | |
116 | * need to calculate them ourselves. | |
117 | * | |
118 | * We may have available oob space in this case. | |
119 | */ | |
120 | static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) | |
121 | { | |
122 | struct bch_geometry *geo = &this->bch_geometry; | |
123 | struct mtd_info *mtd = &this->mtd; | |
124 | struct nand_chip *chip = mtd->priv; | |
125 | struct nand_oobfree *of = gpmi_hw_ecclayout.oobfree; | |
126 | unsigned int block_mark_bit_offset; | |
127 | ||
128 | if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) | |
129 | return false; | |
130 | ||
131 | switch (chip->ecc_step_ds) { | |
132 | case SZ_512: | |
133 | geo->gf_len = 13; | |
134 | break; | |
135 | case SZ_1K: | |
136 | geo->gf_len = 14; | |
137 | break; | |
138 | default: | |
139 | dev_err(this->dev, | |
140 | "unsupported nand chip. ecc bits : %d, ecc size : %d\n", | |
141 | chip->ecc_strength_ds, chip->ecc_step_ds); | |
142 | return false; | |
143 | } | |
144 | geo->ecc_chunk_size = chip->ecc_step_ds; | |
145 | geo->ecc_strength = round_up(chip->ecc_strength_ds, 2); | |
146 | if (!gpmi_check_ecc(this)) | |
147 | return false; | |
148 | ||
149 | /* Keep the C >= O */ | |
150 | if (geo->ecc_chunk_size < mtd->oobsize) { | |
151 | dev_err(this->dev, | |
152 | "unsupported nand chip. ecc size: %d, oob size : %d\n", | |
153 | chip->ecc_step_ds, mtd->oobsize); | |
154 | return false; | |
155 | } | |
156 | ||
157 | /* The default value, see comment in the legacy_set_geometry(). */ | |
158 | geo->metadata_size = 10; | |
159 | ||
160 | geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; | |
161 | ||
162 | /* | |
163 | * Now, the NAND chip with 2K page(data chunk is 512byte) shows below: | |
164 | * | |
165 | * | P | | |
166 | * |<----------------------------------------------------->| | |
167 | * | | | |
168 | * | (Block Mark) | | |
169 | * | P' | | | | | |
170 | * |<-------------------------------------------->| D | | O' | | |
171 | * | |<---->| |<--->| | |
172 | * V V V V V | |
173 | * +---+----------+-+----------+-+----------+-+----------+-+-----+ | |
174 | * | M | data |E| data |E| data |E| data |E| | | |
175 | * +---+----------+-+----------+-+----------+-+----------+-+-----+ | |
176 | * ^ ^ | |
177 | * | O | | |
178 | * |<------------>| | |
179 | * | | | |
180 | * | |
181 | * P : the page size for BCH module. | |
182 | * E : The ECC strength. | |
183 | * G : the length of Galois Field. | |
184 | * N : The chunk count of per page. | |
185 | * M : the metasize of per page. | |
186 | * C : the ecc chunk size, aka the "data" above. | |
187 | * P': the nand chip's page size. | |
188 | * O : the nand chip's oob size. | |
189 | * O': the free oob. | |
190 | * | |
191 | * The formula for P is : | |
192 | * | |
193 | * E * G * N | |
194 | * P = ------------ + P' + M | |
195 | * 8 | |
196 | * | |
197 | * The position of block mark moves forward in the ECC-based view | |
198 | * of page, and the delta is: | |
199 | * | |
200 | * E * G * (N - 1) | |
201 | * D = (---------------- + M) | |
202 | * 8 | |
203 | * | |
204 | * Please see the comment in legacy_set_geometry(). | |
205 | * With the condition C >= O , we still can get same result. | |
206 | * So the bit position of the physical block mark within the ECC-based | |
207 | * view of the page is : | |
208 | * (P' - D) * 8 | |
209 | */ | |
210 | geo->page_size = mtd->writesize + geo->metadata_size + | |
211 | (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; | |
212 | ||
213 | /* The available oob size we have. */ | |
214 | if (geo->page_size < mtd->writesize + mtd->oobsize) { | |
215 | of->offset = geo->page_size - mtd->writesize; | |
216 | of->length = mtd->oobsize - of->offset; | |
2febcdf8 HS |
217 | } |
218 | ||
219 | geo->payload_size = mtd->writesize; | |
220 | ||
221 | geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); | |
222 | geo->auxiliary_size = ALIGN(geo->metadata_size, 4) | |
223 | + ALIGN(geo->ecc_chunk_count, 4); | |
224 | ||
225 | if (!this->swap_block_mark) | |
226 | return true; | |
227 | ||
228 | /* For bit swap. */ | |
229 | block_mark_bit_offset = mtd->writesize * 8 - | |
230 | (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) | |
231 | + geo->metadata_size * 8); | |
232 | ||
233 | geo->block_mark_byte_offset = block_mark_bit_offset / 8; | |
234 | geo->block_mark_bit_offset = block_mark_bit_offset % 8; | |
235 | return true; | |
236 | } | |
237 | ||
238 | static int legacy_set_geometry(struct gpmi_nand_data *this) | |
10a2bcae HS |
239 | { |
240 | struct bch_geometry *geo = &this->bch_geometry; | |
241 | struct mtd_info *mtd = &this->mtd; | |
242 | unsigned int metadata_size; | |
243 | unsigned int status_size; | |
244 | unsigned int block_mark_bit_offset; | |
245 | ||
246 | /* | |
247 | * The size of the metadata can be changed, though we set it to 10 | |
248 | * bytes now. But it can't be too large, because we have to save | |
249 | * enough space for BCH. | |
250 | */ | |
251 | geo->metadata_size = 10; | |
252 | ||
253 | /* The default for the length of Galois Field. */ | |
254 | geo->gf_len = 13; | |
255 | ||
9ff16f08 | 256 | /* The default for chunk size. */ |
10a2bcae | 257 | geo->ecc_chunk_size = 512; |
9ff16f08 | 258 | while (geo->ecc_chunk_size < mtd->oobsize) { |
10a2bcae | 259 | geo->ecc_chunk_size *= 2; /* keep C >= O */ |
9ff16f08 HS |
260 | geo->gf_len = 14; |
261 | } | |
10a2bcae HS |
262 | |
263 | geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; | |
264 | ||
265 | /* We use the same ECC strength for all chunks. */ | |
266 | geo->ecc_strength = get_ecc_strength(this); | |
92d0e09a HS |
267 | if (!gpmi_check_ecc(this)) { |
268 | dev_err(this->dev, | |
269 | "We can not support this nand chip." | |
270 | " Its required ecc strength(%d) is beyond our" | |
271 | " capability(%d).\n", geo->ecc_strength, | |
272 | (GPMI_IS_MX6Q(this) ? MX6_ECC_STRENGTH_MAX | |
273 | : MXS_ECC_STRENGTH_MAX)); | |
10a2bcae HS |
274 | return -EINVAL; |
275 | } | |
276 | ||
277 | geo->page_size = mtd->writesize + mtd->oobsize; | |
278 | geo->payload_size = mtd->writesize; | |
279 | ||
280 | /* | |
281 | * The auxiliary buffer contains the metadata and the ECC status. The | |
282 | * metadata is padded to the nearest 32-bit boundary. The ECC status | |
283 | * contains one byte for every ECC chunk, and is also padded to the | |
284 | * nearest 32-bit boundary. | |
285 | */ | |
286 | metadata_size = ALIGN(geo->metadata_size, 4); | |
287 | status_size = ALIGN(geo->ecc_chunk_count, 4); | |
288 | ||
289 | geo->auxiliary_size = metadata_size + status_size; | |
290 | geo->auxiliary_status_offset = metadata_size; | |
291 | ||
292 | if (!this->swap_block_mark) | |
293 | return 0; | |
294 | ||
295 | /* | |
296 | * We need to compute the byte and bit offsets of | |
297 | * the physical block mark within the ECC-based view of the page. | |
298 | * | |
299 | * NAND chip with 2K page shows below: | |
300 | * (Block Mark) | |
301 | * | | | |
302 | * | D | | |
303 | * |<---->| | |
304 | * V V | |
305 | * +---+----------+-+----------+-+----------+-+----------+-+ | |
306 | * | M | data |E| data |E| data |E| data |E| | |
307 | * +---+----------+-+----------+-+----------+-+----------+-+ | |
308 | * | |
309 | * The position of block mark moves forward in the ECC-based view | |
310 | * of page, and the delta is: | |
311 | * | |
312 | * E * G * (N - 1) | |
313 | * D = (---------------- + M) | |
314 | * 8 | |
315 | * | |
316 | * With the formula to compute the ECC strength, and the condition | |
317 | * : C >= O (C is the ecc chunk size) | |
318 | * | |
319 | * It's easy to deduce to the following result: | |
320 | * | |
321 | * E * G (O - M) C - M C - M | |
322 | * ----------- <= ------- <= -------- < --------- | |
323 | * 8 N N (N - 1) | |
324 | * | |
325 | * So, we get: | |
326 | * | |
327 | * E * G * (N - 1) | |
328 | * D = (---------------- + M) < C | |
329 | * 8 | |
330 | * | |
331 | * The above inequality means the position of block mark | |
332 | * within the ECC-based view of the page is still in the data chunk, | |
333 | * and it's NOT in the ECC bits of the chunk. | |
334 | * | |
335 | * Use the following to compute the bit position of the | |
336 | * physical block mark within the ECC-based view of the page: | |
337 | * (page_size - D) * 8 | |
338 | * | |
339 | * --Huang Shijie | |
340 | */ | |
341 | block_mark_bit_offset = mtd->writesize * 8 - | |
342 | (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) | |
343 | + geo->metadata_size * 8); | |
344 | ||
345 | geo->block_mark_byte_offset = block_mark_bit_offset / 8; | |
346 | geo->block_mark_bit_offset = block_mark_bit_offset % 8; | |
347 | return 0; | |
348 | } | |
349 | ||
2febcdf8 HS |
350 | int common_nfc_set_geometry(struct gpmi_nand_data *this) |
351 | { | |
352 | return set_geometry_by_ecc_info(this) ? 0 : legacy_set_geometry(this); | |
353 | } | |
354 | ||
10a2bcae HS |
355 | struct dma_chan *get_dma_chan(struct gpmi_nand_data *this) |
356 | { | |
357 | int chipnr = this->current_chip; | |
358 | ||
359 | return this->dma_chans[chipnr]; | |
360 | } | |
361 | ||
362 | /* Can we use the upper's buffer directly for DMA? */ | |
363 | void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr) | |
364 | { | |
365 | struct scatterlist *sgl = &this->data_sgl; | |
366 | int ret; | |
367 | ||
368 | this->direct_dma_map_ok = true; | |
369 | ||
370 | /* first try to map the upper buffer directly */ | |
371 | sg_init_one(sgl, this->upper_buf, this->upper_len); | |
372 | ret = dma_map_sg(this->dev, sgl, 1, dr); | |
373 | if (ret == 0) { | |
374 | /* We have to use our own DMA buffer. */ | |
375 | sg_init_one(sgl, this->data_buffer_dma, PAGE_SIZE); | |
376 | ||
377 | if (dr == DMA_TO_DEVICE) | |
378 | memcpy(this->data_buffer_dma, this->upper_buf, | |
379 | this->upper_len); | |
380 | ||
381 | ret = dma_map_sg(this->dev, sgl, 1, dr); | |
382 | if (ret == 0) | |
2d350e5a | 383 | pr_err("DMA mapping failed.\n"); |
10a2bcae HS |
384 | |
385 | this->direct_dma_map_ok = false; | |
386 | } | |
387 | } | |
388 | ||
389 | /* This will be called after the DMA operation is finished. */ | |
390 | static void dma_irq_callback(void *param) | |
391 | { | |
392 | struct gpmi_nand_data *this = param; | |
393 | struct completion *dma_c = &this->dma_done; | |
394 | ||
395 | complete(dma_c); | |
396 | ||
397 | switch (this->dma_type) { | |
398 | case DMA_FOR_COMMAND: | |
399 | dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE); | |
400 | break; | |
401 | ||
402 | case DMA_FOR_READ_DATA: | |
403 | dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE); | |
404 | if (this->direct_dma_map_ok == false) | |
405 | memcpy(this->upper_buf, this->data_buffer_dma, | |
406 | this->upper_len); | |
407 | break; | |
408 | ||
409 | case DMA_FOR_WRITE_DATA: | |
410 | dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE); | |
411 | break; | |
412 | ||
413 | case DMA_FOR_READ_ECC_PAGE: | |
414 | case DMA_FOR_WRITE_ECC_PAGE: | |
415 | /* We have to wait the BCH interrupt to finish. */ | |
416 | break; | |
417 | ||
418 | default: | |
419 | pr_err("in wrong DMA operation.\n"); | |
420 | } | |
421 | } | |
422 | ||
423 | int start_dma_without_bch_irq(struct gpmi_nand_data *this, | |
424 | struct dma_async_tx_descriptor *desc) | |
425 | { | |
426 | struct completion *dma_c = &this->dma_done; | |
427 | int err; | |
428 | ||
429 | init_completion(dma_c); | |
430 | ||
431 | desc->callback = dma_irq_callback; | |
432 | desc->callback_param = this; | |
433 | dmaengine_submit(desc); | |
d04525ed | 434 | dma_async_issue_pending(get_dma_chan(this)); |
10a2bcae HS |
435 | |
436 | /* Wait for the interrupt from the DMA block. */ | |
437 | err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000)); | |
438 | if (!err) { | |
439 | pr_err("DMA timeout, last DMA :%d\n", this->last_dma_type); | |
440 | gpmi_dump_info(this); | |
441 | return -ETIMEDOUT; | |
442 | } | |
443 | return 0; | |
444 | } | |
445 | ||
446 | /* | |
447 | * This function is used in BCH reading or BCH writing pages. | |
448 | * It will wait for the BCH interrupt as long as ONE second. | |
449 | * Actually, we must wait for two interrupts : | |
450 | * [1] firstly the DMA interrupt and | |
451 | * [2] secondly the BCH interrupt. | |
452 | */ | |
453 | int start_dma_with_bch_irq(struct gpmi_nand_data *this, | |
454 | struct dma_async_tx_descriptor *desc) | |
455 | { | |
456 | struct completion *bch_c = &this->bch_done; | |
457 | int err; | |
458 | ||
459 | /* Prepare to receive an interrupt from the BCH block. */ | |
460 | init_completion(bch_c); | |
461 | ||
462 | /* start the DMA */ | |
463 | start_dma_without_bch_irq(this, desc); | |
464 | ||
465 | /* Wait for the interrupt from the BCH block. */ | |
466 | err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000)); | |
467 | if (!err) { | |
468 | pr_err("BCH timeout, last DMA :%d\n", this->last_dma_type); | |
469 | gpmi_dump_info(this); | |
470 | return -ETIMEDOUT; | |
471 | } | |
472 | return 0; | |
473 | } | |
474 | ||
d8929942 GKH |
475 | static int acquire_register_block(struct gpmi_nand_data *this, |
476 | const char *res_name) | |
10a2bcae HS |
477 | { |
478 | struct platform_device *pdev = this->pdev; | |
479 | struct resources *res = &this->resources; | |
480 | struct resource *r; | |
513d57e1 | 481 | void __iomem *p; |
10a2bcae HS |
482 | |
483 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); | |
484 | if (!r) { | |
485 | pr_err("Can't get resource for %s\n", res_name); | |
52a073bd | 486 | return -ENODEV; |
10a2bcae HS |
487 | } |
488 | ||
489 | p = ioremap(r->start, resource_size(r)); | |
490 | if (!p) { | |
491 | pr_err("Can't remap %s\n", res_name); | |
492 | return -ENOMEM; | |
493 | } | |
494 | ||
495 | if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME)) | |
496 | res->gpmi_regs = p; | |
497 | else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME)) | |
498 | res->bch_regs = p; | |
499 | else | |
500 | pr_err("unknown resource name : %s\n", res_name); | |
501 | ||
502 | return 0; | |
503 | } | |
504 | ||
505 | static void release_register_block(struct gpmi_nand_data *this) | |
506 | { | |
507 | struct resources *res = &this->resources; | |
508 | if (res->gpmi_regs) | |
509 | iounmap(res->gpmi_regs); | |
510 | if (res->bch_regs) | |
511 | iounmap(res->bch_regs); | |
512 | res->gpmi_regs = NULL; | |
513 | res->bch_regs = NULL; | |
514 | } | |
515 | ||
d8929942 | 516 | static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h) |
10a2bcae HS |
517 | { |
518 | struct platform_device *pdev = this->pdev; | |
519 | struct resources *res = &this->resources; | |
520 | const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME; | |
521 | struct resource *r; | |
522 | int err; | |
523 | ||
524 | r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); | |
525 | if (!r) { | |
526 | pr_err("Can't get resource for %s\n", res_name); | |
52a073bd | 527 | return -ENODEV; |
10a2bcae HS |
528 | } |
529 | ||
530 | err = request_irq(r->start, irq_h, 0, res_name, this); | |
531 | if (err) { | |
532 | pr_err("Can't own %s\n", res_name); | |
533 | return err; | |
534 | } | |
535 | ||
536 | res->bch_low_interrupt = r->start; | |
537 | res->bch_high_interrupt = r->end; | |
538 | return 0; | |
539 | } | |
540 | ||
541 | static void release_bch_irq(struct gpmi_nand_data *this) | |
542 | { | |
543 | struct resources *res = &this->resources; | |
544 | int i = res->bch_low_interrupt; | |
545 | ||
546 | for (; i <= res->bch_high_interrupt; i++) | |
547 | free_irq(i, this); | |
548 | } | |
549 | ||
10a2bcae HS |
550 | static void release_dma_channels(struct gpmi_nand_data *this) |
551 | { | |
552 | unsigned int i; | |
553 | for (i = 0; i < DMA_CHANS; i++) | |
554 | if (this->dma_chans[i]) { | |
555 | dma_release_channel(this->dma_chans[i]); | |
556 | this->dma_chans[i] = NULL; | |
557 | } | |
558 | } | |
559 | ||
06f25510 | 560 | static int acquire_dma_channels(struct gpmi_nand_data *this) |
10a2bcae HS |
561 | { |
562 | struct platform_device *pdev = this->pdev; | |
e10db1f0 | 563 | struct dma_chan *dma_chan; |
10a2bcae | 564 | |
e10db1f0 | 565 | /* request dma channel */ |
5fac0e18 | 566 | dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx"); |
e10db1f0 | 567 | if (!dma_chan) { |
2d350e5a | 568 | pr_err("Failed to request DMA channel.\n"); |
e10db1f0 | 569 | goto acquire_err; |
10a2bcae HS |
570 | } |
571 | ||
e10db1f0 | 572 | this->dma_chans[0] = dma_chan; |
10a2bcae HS |
573 | return 0; |
574 | ||
575 | acquire_err: | |
10a2bcae HS |
576 | release_dma_channels(this); |
577 | return -EINVAL; | |
578 | } | |
579 | ||
ff506172 HS |
580 | static void gpmi_put_clks(struct gpmi_nand_data *this) |
581 | { | |
582 | struct resources *r = &this->resources; | |
583 | struct clk *clk; | |
584 | int i; | |
585 | ||
586 | for (i = 0; i < GPMI_CLK_MAX; i++) { | |
587 | clk = r->clock[i]; | |
588 | if (clk) { | |
589 | clk_put(clk); | |
590 | r->clock[i] = NULL; | |
591 | } | |
592 | } | |
593 | } | |
594 | ||
595 | static char *extra_clks_for_mx6q[GPMI_CLK_MAX] = { | |
596 | "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch", | |
597 | }; | |
598 | ||
06f25510 | 599 | static int gpmi_get_clks(struct gpmi_nand_data *this) |
ff506172 HS |
600 | { |
601 | struct resources *r = &this->resources; | |
602 | char **extra_clks = NULL; | |
603 | struct clk *clk; | |
d1cb556c | 604 | int err, i; |
ff506172 HS |
605 | |
606 | /* The main clock is stored in the first. */ | |
607 | r->clock[0] = clk_get(this->dev, "gpmi_io"); | |
d1cb556c MM |
608 | if (IS_ERR(r->clock[0])) { |
609 | err = PTR_ERR(r->clock[0]); | |
ff506172 | 610 | goto err_clock; |
d1cb556c | 611 | } |
ff506172 HS |
612 | |
613 | /* Get extra clocks */ | |
614 | if (GPMI_IS_MX6Q(this)) | |
615 | extra_clks = extra_clks_for_mx6q; | |
616 | if (!extra_clks) | |
617 | return 0; | |
618 | ||
619 | for (i = 1; i < GPMI_CLK_MAX; i++) { | |
620 | if (extra_clks[i - 1] == NULL) | |
621 | break; | |
622 | ||
623 | clk = clk_get(this->dev, extra_clks[i - 1]); | |
d1cb556c MM |
624 | if (IS_ERR(clk)) { |
625 | err = PTR_ERR(clk); | |
ff506172 | 626 | goto err_clock; |
d1cb556c | 627 | } |
ff506172 HS |
628 | |
629 | r->clock[i] = clk; | |
630 | } | |
631 | ||
e1ca95e3 | 632 | if (GPMI_IS_MX6Q(this)) |
ff506172 | 633 | /* |
e1ca95e3 | 634 | * Set the default value for the gpmi clock in mx6q: |
ff506172 | 635 | * |
e1ca95e3 HS |
636 | * If you want to use the ONFI nand which is in the |
637 | * Synchronous Mode, you should change the clock as you need. | |
ff506172 HS |
638 | */ |
639 | clk_set_rate(r->clock[0], 22000000); | |
e1ca95e3 | 640 | |
ff506172 HS |
641 | return 0; |
642 | ||
643 | err_clock: | |
644 | dev_dbg(this->dev, "failed in finding the clocks.\n"); | |
645 | gpmi_put_clks(this); | |
d1cb556c | 646 | return err; |
ff506172 HS |
647 | } |
648 | ||
06f25510 | 649 | static int acquire_resources(struct gpmi_nand_data *this) |
10a2bcae | 650 | { |
10a2bcae HS |
651 | int ret; |
652 | ||
653 | ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME); | |
654 | if (ret) | |
655 | goto exit_regs; | |
656 | ||
657 | ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME); | |
658 | if (ret) | |
659 | goto exit_regs; | |
660 | ||
661 | ret = acquire_bch_irq(this, bch_irq); | |
662 | if (ret) | |
663 | goto exit_regs; | |
664 | ||
665 | ret = acquire_dma_channels(this); | |
666 | if (ret) | |
667 | goto exit_dma_channels; | |
668 | ||
ff506172 HS |
669 | ret = gpmi_get_clks(this); |
670 | if (ret) | |
10a2bcae | 671 | goto exit_clock; |
10a2bcae HS |
672 | return 0; |
673 | ||
674 | exit_clock: | |
675 | release_dma_channels(this); | |
676 | exit_dma_channels: | |
677 | release_bch_irq(this); | |
678 | exit_regs: | |
679 | release_register_block(this); | |
680 | return ret; | |
681 | } | |
682 | ||
683 | static void release_resources(struct gpmi_nand_data *this) | |
684 | { | |
ff506172 | 685 | gpmi_put_clks(this); |
10a2bcae HS |
686 | release_register_block(this); |
687 | release_bch_irq(this); | |
688 | release_dma_channels(this); | |
689 | } | |
690 | ||
06f25510 | 691 | static int init_hardware(struct gpmi_nand_data *this) |
10a2bcae HS |
692 | { |
693 | int ret; | |
694 | ||
695 | /* | |
696 | * This structure contains the "safe" GPMI timing that should succeed | |
697 | * with any NAND Flash device | |
698 | * (although, with less-than-optimal performance). | |
699 | */ | |
700 | struct nand_timing safe_timing = { | |
701 | .data_setup_in_ns = 80, | |
702 | .data_hold_in_ns = 60, | |
703 | .address_setup_in_ns = 25, | |
704 | .gpmi_sample_delay_in_ns = 6, | |
705 | .tREA_in_ns = -1, | |
706 | .tRLOH_in_ns = -1, | |
707 | .tRHOH_in_ns = -1, | |
708 | }; | |
709 | ||
710 | /* Initialize the hardwares. */ | |
711 | ret = gpmi_init(this); | |
712 | if (ret) | |
713 | return ret; | |
714 | ||
715 | this->timing = safe_timing; | |
716 | return 0; | |
717 | } | |
718 | ||
719 | static int read_page_prepare(struct gpmi_nand_data *this, | |
720 | void *destination, unsigned length, | |
721 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
722 | void **use_virt, dma_addr_t *use_phys) | |
723 | { | |
724 | struct device *dev = this->dev; | |
725 | ||
726 | if (virt_addr_valid(destination)) { | |
727 | dma_addr_t dest_phys; | |
728 | ||
729 | dest_phys = dma_map_single(dev, destination, | |
730 | length, DMA_FROM_DEVICE); | |
731 | if (dma_mapping_error(dev, dest_phys)) { | |
732 | if (alt_size < length) { | |
2d350e5a VN |
733 | pr_err("%s, Alternate buffer is too small\n", |
734 | __func__); | |
10a2bcae HS |
735 | return -ENOMEM; |
736 | } | |
737 | goto map_failed; | |
738 | } | |
739 | *use_virt = destination; | |
740 | *use_phys = dest_phys; | |
741 | this->direct_dma_map_ok = true; | |
742 | return 0; | |
743 | } | |
744 | ||
745 | map_failed: | |
746 | *use_virt = alt_virt; | |
747 | *use_phys = alt_phys; | |
748 | this->direct_dma_map_ok = false; | |
749 | return 0; | |
750 | } | |
751 | ||
752 | static inline void read_page_end(struct gpmi_nand_data *this, | |
753 | void *destination, unsigned length, | |
754 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
755 | void *used_virt, dma_addr_t used_phys) | |
756 | { | |
757 | if (this->direct_dma_map_ok) | |
758 | dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE); | |
759 | } | |
760 | ||
761 | static inline void read_page_swap_end(struct gpmi_nand_data *this, | |
762 | void *destination, unsigned length, | |
763 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
764 | void *used_virt, dma_addr_t used_phys) | |
765 | { | |
766 | if (!this->direct_dma_map_ok) | |
767 | memcpy(destination, alt_virt, length); | |
768 | } | |
769 | ||
770 | static int send_page_prepare(struct gpmi_nand_data *this, | |
771 | const void *source, unsigned length, | |
772 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
773 | const void **use_virt, dma_addr_t *use_phys) | |
774 | { | |
775 | struct device *dev = this->dev; | |
776 | ||
777 | if (virt_addr_valid(source)) { | |
778 | dma_addr_t source_phys; | |
779 | ||
780 | source_phys = dma_map_single(dev, (void *)source, length, | |
781 | DMA_TO_DEVICE); | |
782 | if (dma_mapping_error(dev, source_phys)) { | |
783 | if (alt_size < length) { | |
2d350e5a VN |
784 | pr_err("%s, Alternate buffer is too small\n", |
785 | __func__); | |
10a2bcae HS |
786 | return -ENOMEM; |
787 | } | |
788 | goto map_failed; | |
789 | } | |
790 | *use_virt = source; | |
791 | *use_phys = source_phys; | |
792 | return 0; | |
793 | } | |
794 | map_failed: | |
795 | /* | |
796 | * Copy the content of the source buffer into the alternate | |
797 | * buffer and set up the return values accordingly. | |
798 | */ | |
799 | memcpy(alt_virt, source, length); | |
800 | ||
801 | *use_virt = alt_virt; | |
802 | *use_phys = alt_phys; | |
803 | return 0; | |
804 | } | |
805 | ||
806 | static void send_page_end(struct gpmi_nand_data *this, | |
807 | const void *source, unsigned length, | |
808 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
809 | const void *used_virt, dma_addr_t used_phys) | |
810 | { | |
811 | struct device *dev = this->dev; | |
812 | if (used_virt == source) | |
813 | dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE); | |
814 | } | |
815 | ||
816 | static void gpmi_free_dma_buffer(struct gpmi_nand_data *this) | |
817 | { | |
818 | struct device *dev = this->dev; | |
819 | ||
820 | if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt)) | |
821 | dma_free_coherent(dev, this->page_buffer_size, | |
822 | this->page_buffer_virt, | |
823 | this->page_buffer_phys); | |
824 | kfree(this->cmd_buffer); | |
825 | kfree(this->data_buffer_dma); | |
826 | ||
827 | this->cmd_buffer = NULL; | |
828 | this->data_buffer_dma = NULL; | |
829 | this->page_buffer_virt = NULL; | |
830 | this->page_buffer_size = 0; | |
831 | } | |
832 | ||
833 | /* Allocate the DMA buffers */ | |
834 | static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this) | |
835 | { | |
836 | struct bch_geometry *geo = &this->bch_geometry; | |
837 | struct device *dev = this->dev; | |
838 | ||
839 | /* [1] Allocate a command buffer. PAGE_SIZE is enough. */ | |
513d57e1 | 840 | this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL); |
10a2bcae HS |
841 | if (this->cmd_buffer == NULL) |
842 | goto error_alloc; | |
843 | ||
844 | /* [2] Allocate a read/write data buffer. PAGE_SIZE is enough. */ | |
513d57e1 | 845 | this->data_buffer_dma = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL); |
10a2bcae HS |
846 | if (this->data_buffer_dma == NULL) |
847 | goto error_alloc; | |
848 | ||
849 | /* | |
850 | * [3] Allocate the page buffer. | |
851 | * | |
852 | * Both the payload buffer and the auxiliary buffer must appear on | |
853 | * 32-bit boundaries. We presume the size of the payload buffer is a | |
854 | * power of two and is much larger than four, which guarantees the | |
855 | * auxiliary buffer will appear on a 32-bit boundary. | |
856 | */ | |
857 | this->page_buffer_size = geo->payload_size + geo->auxiliary_size; | |
858 | this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size, | |
859 | &this->page_buffer_phys, GFP_DMA); | |
860 | if (!this->page_buffer_virt) | |
861 | goto error_alloc; | |
862 | ||
863 | ||
864 | /* Slice up the page buffer. */ | |
865 | this->payload_virt = this->page_buffer_virt; | |
866 | this->payload_phys = this->page_buffer_phys; | |
867 | this->auxiliary_virt = this->payload_virt + geo->payload_size; | |
868 | this->auxiliary_phys = this->payload_phys + geo->payload_size; | |
869 | return 0; | |
870 | ||
871 | error_alloc: | |
872 | gpmi_free_dma_buffer(this); | |
2d350e5a | 873 | pr_err("Error allocating DMA buffers!\n"); |
10a2bcae HS |
874 | return -ENOMEM; |
875 | } | |
876 | ||
877 | static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl) | |
878 | { | |
879 | struct nand_chip *chip = mtd->priv; | |
880 | struct gpmi_nand_data *this = chip->priv; | |
881 | int ret; | |
882 | ||
883 | /* | |
884 | * Every operation begins with a command byte and a series of zero or | |
885 | * more address bytes. These are distinguished by either the Address | |
886 | * Latch Enable (ALE) or Command Latch Enable (CLE) signals being | |
887 | * asserted. When MTD is ready to execute the command, it will deassert | |
888 | * both latch enables. | |
889 | * | |
890 | * Rather than run a separate DMA operation for every single byte, we | |
891 | * queue them up and run a single DMA operation for the entire series | |
892 | * of command and data bytes. NAND_CMD_NONE means the END of the queue. | |
893 | */ | |
894 | if ((ctrl & (NAND_ALE | NAND_CLE))) { | |
895 | if (data != NAND_CMD_NONE) | |
896 | this->cmd_buffer[this->command_length++] = data; | |
897 | return; | |
898 | } | |
899 | ||
900 | if (!this->command_length) | |
901 | return; | |
902 | ||
903 | ret = gpmi_send_command(this); | |
904 | if (ret) | |
905 | pr_err("Chip: %u, Error %d\n", this->current_chip, ret); | |
906 | ||
907 | this->command_length = 0; | |
908 | } | |
909 | ||
910 | static int gpmi_dev_ready(struct mtd_info *mtd) | |
911 | { | |
912 | struct nand_chip *chip = mtd->priv; | |
913 | struct gpmi_nand_data *this = chip->priv; | |
914 | ||
915 | return gpmi_is_ready(this, this->current_chip); | |
916 | } | |
917 | ||
918 | static void gpmi_select_chip(struct mtd_info *mtd, int chipnr) | |
919 | { | |
920 | struct nand_chip *chip = mtd->priv; | |
921 | struct gpmi_nand_data *this = chip->priv; | |
922 | ||
923 | if ((this->current_chip < 0) && (chipnr >= 0)) | |
924 | gpmi_begin(this); | |
925 | else if ((this->current_chip >= 0) && (chipnr < 0)) | |
926 | gpmi_end(this); | |
927 | ||
928 | this->current_chip = chipnr; | |
929 | } | |
930 | ||
931 | static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) | |
932 | { | |
933 | struct nand_chip *chip = mtd->priv; | |
934 | struct gpmi_nand_data *this = chip->priv; | |
935 | ||
936 | pr_debug("len is %d\n", len); | |
937 | this->upper_buf = buf; | |
938 | this->upper_len = len; | |
939 | ||
940 | gpmi_read_data(this); | |
941 | } | |
942 | ||
943 | static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) | |
944 | { | |
945 | struct nand_chip *chip = mtd->priv; | |
946 | struct gpmi_nand_data *this = chip->priv; | |
947 | ||
948 | pr_debug("len is %d\n", len); | |
949 | this->upper_buf = (uint8_t *)buf; | |
950 | this->upper_len = len; | |
951 | ||
952 | gpmi_send_data(this); | |
953 | } | |
954 | ||
955 | static uint8_t gpmi_read_byte(struct mtd_info *mtd) | |
956 | { | |
957 | struct nand_chip *chip = mtd->priv; | |
958 | struct gpmi_nand_data *this = chip->priv; | |
959 | uint8_t *buf = this->data_buffer_dma; | |
960 | ||
961 | gpmi_read_buf(mtd, buf, 1); | |
962 | return buf[0]; | |
963 | } | |
964 | ||
965 | /* | |
966 | * Handles block mark swapping. | |
967 | * It can be called in swapping the block mark, or swapping it back, | |
968 | * because the the operations are the same. | |
969 | */ | |
970 | static void block_mark_swapping(struct gpmi_nand_data *this, | |
971 | void *payload, void *auxiliary) | |
972 | { | |
973 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
974 | unsigned char *p; | |
975 | unsigned char *a; | |
976 | unsigned int bit; | |
977 | unsigned char mask; | |
978 | unsigned char from_data; | |
979 | unsigned char from_oob; | |
980 | ||
981 | if (!this->swap_block_mark) | |
982 | return; | |
983 | ||
984 | /* | |
985 | * If control arrives here, we're swapping. Make some convenience | |
986 | * variables. | |
987 | */ | |
988 | bit = nfc_geo->block_mark_bit_offset; | |
989 | p = payload + nfc_geo->block_mark_byte_offset; | |
990 | a = auxiliary; | |
991 | ||
992 | /* | |
993 | * Get the byte from the data area that overlays the block mark. Since | |
994 | * the ECC engine applies its own view to the bits in the page, the | |
995 | * physical block mark won't (in general) appear on a byte boundary in | |
996 | * the data. | |
997 | */ | |
998 | from_data = (p[0] >> bit) | (p[1] << (8 - bit)); | |
999 | ||
1000 | /* Get the byte from the OOB. */ | |
1001 | from_oob = a[0]; | |
1002 | ||
1003 | /* Swap them. */ | |
1004 | a[0] = from_data; | |
1005 | ||
1006 | mask = (0x1 << bit) - 1; | |
1007 | p[0] = (p[0] & mask) | (from_oob << bit); | |
1008 | ||
1009 | mask = ~0 << bit; | |
1010 | p[1] = (p[1] & mask) | (from_oob >> (8 - bit)); | |
1011 | } | |
1012 | ||
1013 | static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip, | |
1fbb938d | 1014 | uint8_t *buf, int oob_required, int page) |
10a2bcae HS |
1015 | { |
1016 | struct gpmi_nand_data *this = chip->priv; | |
1017 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
1018 | void *payload_virt; | |
1019 | dma_addr_t payload_phys; | |
1020 | void *auxiliary_virt; | |
1021 | dma_addr_t auxiliary_phys; | |
1022 | unsigned int i; | |
1023 | unsigned char *status; | |
b23b746c | 1024 | unsigned int max_bitflips = 0; |
10a2bcae HS |
1025 | int ret; |
1026 | ||
1027 | pr_debug("page number is : %d\n", page); | |
1028 | ret = read_page_prepare(this, buf, mtd->writesize, | |
1029 | this->payload_virt, this->payload_phys, | |
1030 | nfc_geo->payload_size, | |
1031 | &payload_virt, &payload_phys); | |
1032 | if (ret) { | |
1033 | pr_err("Inadequate DMA buffer\n"); | |
1034 | ret = -ENOMEM; | |
1035 | return ret; | |
1036 | } | |
1037 | auxiliary_virt = this->auxiliary_virt; | |
1038 | auxiliary_phys = this->auxiliary_phys; | |
1039 | ||
1040 | /* go! */ | |
1041 | ret = gpmi_read_page(this, payload_phys, auxiliary_phys); | |
1042 | read_page_end(this, buf, mtd->writesize, | |
1043 | this->payload_virt, this->payload_phys, | |
1044 | nfc_geo->payload_size, | |
1045 | payload_virt, payload_phys); | |
1046 | if (ret) { | |
1047 | pr_err("Error in ECC-based read: %d\n", ret); | |
b23b746c | 1048 | return ret; |
10a2bcae HS |
1049 | } |
1050 | ||
1051 | /* handle the block mark swapping */ | |
1052 | block_mark_swapping(this, payload_virt, auxiliary_virt); | |
1053 | ||
1054 | /* Loop over status bytes, accumulating ECC status. */ | |
b23b746c | 1055 | status = auxiliary_virt + nfc_geo->auxiliary_status_offset; |
10a2bcae HS |
1056 | |
1057 | for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) { | |
1058 | if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED)) | |
1059 | continue; | |
1060 | ||
1061 | if (*status == STATUS_UNCORRECTABLE) { | |
b23b746c | 1062 | mtd->ecc_stats.failed++; |
10a2bcae HS |
1063 | continue; |
1064 | } | |
b23b746c ZS |
1065 | mtd->ecc_stats.corrected += *status; |
1066 | max_bitflips = max_t(unsigned int, max_bitflips, *status); | |
10a2bcae HS |
1067 | } |
1068 | ||
7725cc85 BN |
1069 | if (oob_required) { |
1070 | /* | |
1071 | * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() | |
1072 | * for details about our policy for delivering the OOB. | |
1073 | * | |
1074 | * We fill the caller's buffer with set bits, and then copy the | |
1075 | * block mark to th caller's buffer. Note that, if block mark | |
1076 | * swapping was necessary, it has already been done, so we can | |
1077 | * rely on the first byte of the auxiliary buffer to contain | |
1078 | * the block mark. | |
1079 | */ | |
1080 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
1081 | chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0]; | |
7725cc85 | 1082 | } |
6023813a SH |
1083 | |
1084 | read_page_swap_end(this, buf, mtd->writesize, | |
1085 | this->payload_virt, this->payload_phys, | |
1086 | nfc_geo->payload_size, | |
1087 | payload_virt, payload_phys); | |
b23b746c ZS |
1088 | |
1089 | return max_bitflips; | |
10a2bcae HS |
1090 | } |
1091 | ||
fdbad98d | 1092 | static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
1fbb938d | 1093 | const uint8_t *buf, int oob_required) |
10a2bcae HS |
1094 | { |
1095 | struct gpmi_nand_data *this = chip->priv; | |
1096 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
1097 | const void *payload_virt; | |
1098 | dma_addr_t payload_phys; | |
1099 | const void *auxiliary_virt; | |
1100 | dma_addr_t auxiliary_phys; | |
1101 | int ret; | |
1102 | ||
1103 | pr_debug("ecc write page.\n"); | |
1104 | if (this->swap_block_mark) { | |
1105 | /* | |
1106 | * If control arrives here, we're doing block mark swapping. | |
1107 | * Since we can't modify the caller's buffers, we must copy them | |
1108 | * into our own. | |
1109 | */ | |
1110 | memcpy(this->payload_virt, buf, mtd->writesize); | |
1111 | payload_virt = this->payload_virt; | |
1112 | payload_phys = this->payload_phys; | |
1113 | ||
1114 | memcpy(this->auxiliary_virt, chip->oob_poi, | |
1115 | nfc_geo->auxiliary_size); | |
1116 | auxiliary_virt = this->auxiliary_virt; | |
1117 | auxiliary_phys = this->auxiliary_phys; | |
1118 | ||
1119 | /* Handle block mark swapping. */ | |
1120 | block_mark_swapping(this, | |
1121 | (void *) payload_virt, (void *) auxiliary_virt); | |
1122 | } else { | |
1123 | /* | |
1124 | * If control arrives here, we're not doing block mark swapping, | |
1125 | * so we can to try and use the caller's buffers. | |
1126 | */ | |
1127 | ret = send_page_prepare(this, | |
1128 | buf, mtd->writesize, | |
1129 | this->payload_virt, this->payload_phys, | |
1130 | nfc_geo->payload_size, | |
1131 | &payload_virt, &payload_phys); | |
1132 | if (ret) { | |
1133 | pr_err("Inadequate payload DMA buffer\n"); | |
fdbad98d | 1134 | return 0; |
10a2bcae HS |
1135 | } |
1136 | ||
1137 | ret = send_page_prepare(this, | |
1138 | chip->oob_poi, mtd->oobsize, | |
1139 | this->auxiliary_virt, this->auxiliary_phys, | |
1140 | nfc_geo->auxiliary_size, | |
1141 | &auxiliary_virt, &auxiliary_phys); | |
1142 | if (ret) { | |
1143 | pr_err("Inadequate auxiliary DMA buffer\n"); | |
1144 | goto exit_auxiliary; | |
1145 | } | |
1146 | } | |
1147 | ||
1148 | /* Ask the NFC. */ | |
1149 | ret = gpmi_send_page(this, payload_phys, auxiliary_phys); | |
1150 | if (ret) | |
1151 | pr_err("Error in ECC-based write: %d\n", ret); | |
1152 | ||
1153 | if (!this->swap_block_mark) { | |
1154 | send_page_end(this, chip->oob_poi, mtd->oobsize, | |
1155 | this->auxiliary_virt, this->auxiliary_phys, | |
1156 | nfc_geo->auxiliary_size, | |
1157 | auxiliary_virt, auxiliary_phys); | |
1158 | exit_auxiliary: | |
1159 | send_page_end(this, buf, mtd->writesize, | |
1160 | this->payload_virt, this->payload_phys, | |
1161 | nfc_geo->payload_size, | |
1162 | payload_virt, payload_phys); | |
1163 | } | |
fdbad98d JW |
1164 | |
1165 | return 0; | |
10a2bcae HS |
1166 | } |
1167 | ||
1168 | /* | |
1169 | * There are several places in this driver where we have to handle the OOB and | |
1170 | * block marks. This is the function where things are the most complicated, so | |
1171 | * this is where we try to explain it all. All the other places refer back to | |
1172 | * here. | |
1173 | * | |
1174 | * These are the rules, in order of decreasing importance: | |
1175 | * | |
1176 | * 1) Nothing the caller does can be allowed to imperil the block mark. | |
1177 | * | |
1178 | * 2) In read operations, the first byte of the OOB we return must reflect the | |
1179 | * true state of the block mark, no matter where that block mark appears in | |
1180 | * the physical page. | |
1181 | * | |
1182 | * 3) ECC-based read operations return an OOB full of set bits (since we never | |
1183 | * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads | |
1184 | * return). | |
1185 | * | |
1186 | * 4) "Raw" read operations return a direct view of the physical bytes in the | |
1187 | * page, using the conventional definition of which bytes are data and which | |
1188 | * are OOB. This gives the caller a way to see the actual, physical bytes | |
1189 | * in the page, without the distortions applied by our ECC engine. | |
1190 | * | |
1191 | * | |
1192 | * What we do for this specific read operation depends on two questions: | |
1193 | * | |
1194 | * 1) Are we doing a "raw" read, or an ECC-based read? | |
1195 | * | |
1196 | * 2) Are we using block mark swapping or transcription? | |
1197 | * | |
1198 | * There are four cases, illustrated by the following Karnaugh map: | |
1199 | * | |
1200 | * | Raw | ECC-based | | |
1201 | * -------------+-------------------------+-------------------------+ | |
1202 | * | Read the conventional | | | |
1203 | * | OOB at the end of the | | | |
1204 | * Swapping | page and return it. It | | | |
1205 | * | contains exactly what | | | |
1206 | * | we want. | Read the block mark and | | |
1207 | * -------------+-------------------------+ return it in a buffer | | |
1208 | * | Read the conventional | full of set bits. | | |
1209 | * | OOB at the end of the | | | |
1210 | * | page and also the block | | | |
1211 | * Transcribing | mark in the metadata. | | | |
1212 | * | Copy the block mark | | | |
1213 | * | into the first byte of | | | |
1214 | * | the OOB. | | | |
1215 | * -------------+-------------------------+-------------------------+ | |
1216 | * | |
1217 | * Note that we break rule #4 in the Transcribing/Raw case because we're not | |
1218 | * giving an accurate view of the actual, physical bytes in the page (we're | |
1219 | * overwriting the block mark). That's OK because it's more important to follow | |
1220 | * rule #2. | |
1221 | * | |
1222 | * It turns out that knowing whether we want an "ECC-based" or "raw" read is not | |
1223 | * easy. When reading a page, for example, the NAND Flash MTD code calls our | |
1224 | * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an | |
1225 | * ECC-based or raw view of the page is implicit in which function it calls | |
1226 | * (there is a similar pair of ECC-based/raw functions for writing). | |
1227 | * | |
271b874b BN |
1228 | * FIXME: The following paragraph is incorrect, now that there exist |
1229 | * ecc.read_oob_raw and ecc.write_oob_raw functions. | |
1230 | * | |
10a2bcae HS |
1231 | * Since MTD assumes the OOB is not covered by ECC, there is no pair of |
1232 | * ECC-based/raw functions for reading or or writing the OOB. The fact that the | |
1233 | * caller wants an ECC-based or raw view of the page is not propagated down to | |
1234 | * this driver. | |
1235 | */ | |
1236 | static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip, | |
5c2ffb11 | 1237 | int page) |
10a2bcae HS |
1238 | { |
1239 | struct gpmi_nand_data *this = chip->priv; | |
1240 | ||
1241 | pr_debug("page number is %d\n", page); | |
1242 | /* clear the OOB buffer */ | |
1243 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
1244 | ||
1245 | /* Read out the conventional OOB. */ | |
1246 | chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); | |
1247 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); | |
1248 | ||
1249 | /* | |
1250 | * Now, we want to make sure the block mark is correct. In the | |
1251 | * Swapping/Raw case, we already have it. Otherwise, we need to | |
1252 | * explicitly read it. | |
1253 | */ | |
1254 | if (!this->swap_block_mark) { | |
1255 | /* Read the block mark into the first byte of the OOB buffer. */ | |
1256 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); | |
1257 | chip->oob_poi[0] = chip->read_byte(mtd); | |
1258 | } | |
1259 | ||
5c2ffb11 | 1260 | return 0; |
10a2bcae HS |
1261 | } |
1262 | ||
1263 | static int | |
1264 | gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page) | |
1265 | { | |
1266 | /* | |
1267 | * The BCH will use all the (page + oob). | |
1268 | * Our gpmi_hw_ecclayout can only prohibit the JFFS2 to write the oob. | |
1269 | * But it can not stop some ioctls such MEMWRITEOOB which uses | |
0612b9dd | 1270 | * MTD_OPS_PLACE_OOB. So We have to implement this function to prohibit |
10a2bcae HS |
1271 | * these ioctls too. |
1272 | */ | |
1273 | return -EPERM; | |
1274 | } | |
1275 | ||
1276 | static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
1277 | { | |
1278 | struct nand_chip *chip = mtd->priv; | |
1279 | struct gpmi_nand_data *this = chip->priv; | |
5a0edb25 | 1280 | int ret = 0; |
10a2bcae HS |
1281 | uint8_t *block_mark; |
1282 | int column, page, status, chipnr; | |
1283 | ||
5a0edb25 BN |
1284 | chipnr = (int)(ofs >> chip->chip_shift); |
1285 | chip->select_chip(mtd, chipnr); | |
10a2bcae | 1286 | |
5a0edb25 | 1287 | column = this->swap_block_mark ? mtd->writesize : 0; |
10a2bcae | 1288 | |
5a0edb25 BN |
1289 | /* Write the block mark. */ |
1290 | block_mark = this->data_buffer_dma; | |
1291 | block_mark[0] = 0; /* bad block marker */ | |
10a2bcae | 1292 | |
5a0edb25 BN |
1293 | /* Shift to get page */ |
1294 | page = (int)(ofs >> chip->page_shift); | |
10a2bcae | 1295 | |
5a0edb25 BN |
1296 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page); |
1297 | chip->write_buf(mtd, block_mark, 1); | |
1298 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); | |
10a2bcae | 1299 | |
5a0edb25 BN |
1300 | status = chip->waitfunc(mtd, chip); |
1301 | if (status & NAND_STATUS_FAIL) | |
1302 | ret = -EIO; | |
10a2bcae | 1303 | |
5a0edb25 | 1304 | chip->select_chip(mtd, -1); |
10a2bcae HS |
1305 | |
1306 | return ret; | |
1307 | } | |
1308 | ||
a78da287 | 1309 | static int nand_boot_set_geometry(struct gpmi_nand_data *this) |
10a2bcae HS |
1310 | { |
1311 | struct boot_rom_geometry *geometry = &this->rom_geometry; | |
1312 | ||
1313 | /* | |
1314 | * Set the boot block stride size. | |
1315 | * | |
1316 | * In principle, we should be reading this from the OTP bits, since | |
1317 | * that's where the ROM is going to get it. In fact, we don't have any | |
1318 | * way to read the OTP bits, so we go with the default and hope for the | |
1319 | * best. | |
1320 | */ | |
1321 | geometry->stride_size_in_pages = 64; | |
1322 | ||
1323 | /* | |
1324 | * Set the search area stride exponent. | |
1325 | * | |
1326 | * In principle, we should be reading this from the OTP bits, since | |
1327 | * that's where the ROM is going to get it. In fact, we don't have any | |
1328 | * way to read the OTP bits, so we go with the default and hope for the | |
1329 | * best. | |
1330 | */ | |
1331 | geometry->search_area_stride_exponent = 2; | |
1332 | return 0; | |
1333 | } | |
1334 | ||
1335 | static const char *fingerprint = "STMP"; | |
a78da287 | 1336 | static int mx23_check_transcription_stamp(struct gpmi_nand_data *this) |
10a2bcae HS |
1337 | { |
1338 | struct boot_rom_geometry *rom_geo = &this->rom_geometry; | |
1339 | struct device *dev = this->dev; | |
1340 | struct mtd_info *mtd = &this->mtd; | |
1341 | struct nand_chip *chip = &this->nand; | |
1342 | unsigned int search_area_size_in_strides; | |
1343 | unsigned int stride; | |
1344 | unsigned int page; | |
10a2bcae HS |
1345 | uint8_t *buffer = chip->buffers->databuf; |
1346 | int saved_chip_number; | |
1347 | int found_an_ncb_fingerprint = false; | |
1348 | ||
1349 | /* Compute the number of strides in a search area. */ | |
1350 | search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; | |
1351 | ||
1352 | saved_chip_number = this->current_chip; | |
1353 | chip->select_chip(mtd, 0); | |
1354 | ||
1355 | /* | |
1356 | * Loop through the first search area, looking for the NCB fingerprint. | |
1357 | */ | |
1358 | dev_dbg(dev, "Scanning for an NCB fingerprint...\n"); | |
1359 | ||
1360 | for (stride = 0; stride < search_area_size_in_strides; stride++) { | |
513d57e1 | 1361 | /* Compute the page addresses. */ |
10a2bcae | 1362 | page = stride * rom_geo->stride_size_in_pages; |
10a2bcae HS |
1363 | |
1364 | dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page); | |
1365 | ||
1366 | /* | |
1367 | * Read the NCB fingerprint. The fingerprint is four bytes long | |
1368 | * and starts in the 12th byte of the page. | |
1369 | */ | |
1370 | chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page); | |
1371 | chip->read_buf(mtd, buffer, strlen(fingerprint)); | |
1372 | ||
1373 | /* Look for the fingerprint. */ | |
1374 | if (!memcmp(buffer, fingerprint, strlen(fingerprint))) { | |
1375 | found_an_ncb_fingerprint = true; | |
1376 | break; | |
1377 | } | |
1378 | ||
1379 | } | |
1380 | ||
1381 | chip->select_chip(mtd, saved_chip_number); | |
1382 | ||
1383 | if (found_an_ncb_fingerprint) | |
1384 | dev_dbg(dev, "\tFound a fingerprint\n"); | |
1385 | else | |
1386 | dev_dbg(dev, "\tNo fingerprint found\n"); | |
1387 | return found_an_ncb_fingerprint; | |
1388 | } | |
1389 | ||
1390 | /* Writes a transcription stamp. */ | |
a78da287 | 1391 | static int mx23_write_transcription_stamp(struct gpmi_nand_data *this) |
10a2bcae HS |
1392 | { |
1393 | struct device *dev = this->dev; | |
1394 | struct boot_rom_geometry *rom_geo = &this->rom_geometry; | |
1395 | struct mtd_info *mtd = &this->mtd; | |
1396 | struct nand_chip *chip = &this->nand; | |
1397 | unsigned int block_size_in_pages; | |
1398 | unsigned int search_area_size_in_strides; | |
1399 | unsigned int search_area_size_in_pages; | |
1400 | unsigned int search_area_size_in_blocks; | |
1401 | unsigned int block; | |
1402 | unsigned int stride; | |
1403 | unsigned int page; | |
10a2bcae HS |
1404 | uint8_t *buffer = chip->buffers->databuf; |
1405 | int saved_chip_number; | |
1406 | int status; | |
1407 | ||
1408 | /* Compute the search area geometry. */ | |
1409 | block_size_in_pages = mtd->erasesize / mtd->writesize; | |
1410 | search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; | |
1411 | search_area_size_in_pages = search_area_size_in_strides * | |
1412 | rom_geo->stride_size_in_pages; | |
1413 | search_area_size_in_blocks = | |
1414 | (search_area_size_in_pages + (block_size_in_pages - 1)) / | |
1415 | block_size_in_pages; | |
1416 | ||
1417 | dev_dbg(dev, "Search Area Geometry :\n"); | |
1418 | dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks); | |
1419 | dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides); | |
1420 | dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages); | |
1421 | ||
1422 | /* Select chip 0. */ | |
1423 | saved_chip_number = this->current_chip; | |
1424 | chip->select_chip(mtd, 0); | |
1425 | ||
1426 | /* Loop over blocks in the first search area, erasing them. */ | |
1427 | dev_dbg(dev, "Erasing the search area...\n"); | |
1428 | ||
1429 | for (block = 0; block < search_area_size_in_blocks; block++) { | |
1430 | /* Compute the page address. */ | |
1431 | page = block * block_size_in_pages; | |
1432 | ||
1433 | /* Erase this block. */ | |
1434 | dev_dbg(dev, "\tErasing block 0x%x\n", block); | |
1435 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); | |
1436 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); | |
1437 | ||
1438 | /* Wait for the erase to finish. */ | |
1439 | status = chip->waitfunc(mtd, chip); | |
1440 | if (status & NAND_STATUS_FAIL) | |
1441 | dev_err(dev, "[%s] Erase failed.\n", __func__); | |
1442 | } | |
1443 | ||
1444 | /* Write the NCB fingerprint into the page buffer. */ | |
1445 | memset(buffer, ~0, mtd->writesize); | |
1446 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
1447 | memcpy(buffer + 12, fingerprint, strlen(fingerprint)); | |
1448 | ||
1449 | /* Loop through the first search area, writing NCB fingerprints. */ | |
1450 | dev_dbg(dev, "Writing NCB fingerprints...\n"); | |
1451 | for (stride = 0; stride < search_area_size_in_strides; stride++) { | |
513d57e1 | 1452 | /* Compute the page addresses. */ |
10a2bcae | 1453 | page = stride * rom_geo->stride_size_in_pages; |
10a2bcae HS |
1454 | |
1455 | /* Write the first page of the current stride. */ | |
1456 | dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page); | |
1457 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); | |
1fbb938d | 1458 | chip->ecc.write_page_raw(mtd, chip, buffer, 0); |
10a2bcae HS |
1459 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
1460 | ||
1461 | /* Wait for the write to finish. */ | |
1462 | status = chip->waitfunc(mtd, chip); | |
1463 | if (status & NAND_STATUS_FAIL) | |
1464 | dev_err(dev, "[%s] Write failed.\n", __func__); | |
1465 | } | |
1466 | ||
1467 | /* Deselect chip 0. */ | |
1468 | chip->select_chip(mtd, saved_chip_number); | |
1469 | return 0; | |
1470 | } | |
1471 | ||
a78da287 | 1472 | static int mx23_boot_init(struct gpmi_nand_data *this) |
10a2bcae HS |
1473 | { |
1474 | struct device *dev = this->dev; | |
1475 | struct nand_chip *chip = &this->nand; | |
1476 | struct mtd_info *mtd = &this->mtd; | |
1477 | unsigned int block_count; | |
1478 | unsigned int block; | |
1479 | int chipnr; | |
1480 | int page; | |
1481 | loff_t byte; | |
1482 | uint8_t block_mark; | |
1483 | int ret = 0; | |
1484 | ||
1485 | /* | |
1486 | * If control arrives here, we can't use block mark swapping, which | |
1487 | * means we're forced to use transcription. First, scan for the | |
1488 | * transcription stamp. If we find it, then we don't have to do | |
1489 | * anything -- the block marks are already transcribed. | |
1490 | */ | |
1491 | if (mx23_check_transcription_stamp(this)) | |
1492 | return 0; | |
1493 | ||
1494 | /* | |
1495 | * If control arrives here, we couldn't find a transcription stamp, so | |
1496 | * so we presume the block marks are in the conventional location. | |
1497 | */ | |
1498 | dev_dbg(dev, "Transcribing bad block marks...\n"); | |
1499 | ||
1500 | /* Compute the number of blocks in the entire medium. */ | |
1501 | block_count = chip->chipsize >> chip->phys_erase_shift; | |
1502 | ||
1503 | /* | |
1504 | * Loop over all the blocks in the medium, transcribing block marks as | |
1505 | * we go. | |
1506 | */ | |
1507 | for (block = 0; block < block_count; block++) { | |
1508 | /* | |
1509 | * Compute the chip, page and byte addresses for this block's | |
1510 | * conventional mark. | |
1511 | */ | |
1512 | chipnr = block >> (chip->chip_shift - chip->phys_erase_shift); | |
1513 | page = block << (chip->phys_erase_shift - chip->page_shift); | |
1514 | byte = block << chip->phys_erase_shift; | |
1515 | ||
1516 | /* Send the command to read the conventional block mark. */ | |
1517 | chip->select_chip(mtd, chipnr); | |
1518 | chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); | |
1519 | block_mark = chip->read_byte(mtd); | |
1520 | chip->select_chip(mtd, -1); | |
1521 | ||
1522 | /* | |
1523 | * Check if the block is marked bad. If so, we need to mark it | |
1524 | * again, but this time the result will be a mark in the | |
1525 | * location where we transcribe block marks. | |
1526 | */ | |
1527 | if (block_mark != 0xff) { | |
1528 | dev_dbg(dev, "Transcribing mark in block %u\n", block); | |
1529 | ret = chip->block_markbad(mtd, byte); | |
1530 | if (ret) | |
1531 | dev_err(dev, "Failed to mark block bad with " | |
1532 | "ret %d\n", ret); | |
1533 | } | |
1534 | } | |
1535 | ||
1536 | /* Write the stamp that indicates we've transcribed the block marks. */ | |
1537 | mx23_write_transcription_stamp(this); | |
1538 | return 0; | |
1539 | } | |
1540 | ||
a78da287 | 1541 | static int nand_boot_init(struct gpmi_nand_data *this) |
10a2bcae HS |
1542 | { |
1543 | nand_boot_set_geometry(this); | |
1544 | ||
1545 | /* This is ROM arch-specific initilization before the BBT scanning. */ | |
1546 | if (GPMI_IS_MX23(this)) | |
1547 | return mx23_boot_init(this); | |
1548 | return 0; | |
1549 | } | |
1550 | ||
a78da287 | 1551 | static int gpmi_set_geometry(struct gpmi_nand_data *this) |
10a2bcae HS |
1552 | { |
1553 | int ret; | |
1554 | ||
1555 | /* Free the temporary DMA memory for reading ID. */ | |
1556 | gpmi_free_dma_buffer(this); | |
1557 | ||
1558 | /* Set up the NFC geometry which is used by BCH. */ | |
1559 | ret = bch_set_geometry(this); | |
1560 | if (ret) { | |
2d350e5a | 1561 | pr_err("Error setting BCH geometry : %d\n", ret); |
10a2bcae HS |
1562 | return ret; |
1563 | } | |
1564 | ||
1565 | /* Alloc the new DMA buffers according to the pagesize and oobsize */ | |
1566 | return gpmi_alloc_dma_buffer(this); | |
1567 | } | |
1568 | ||
1569 | static int gpmi_pre_bbt_scan(struct gpmi_nand_data *this) | |
1570 | { | |
1571 | int ret; | |
1572 | ||
1573 | /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */ | |
1574 | if (GPMI_IS_MX23(this)) | |
1575 | this->swap_block_mark = false; | |
1576 | else | |
1577 | this->swap_block_mark = true; | |
1578 | ||
1579 | /* Set up the medium geometry */ | |
1580 | ret = gpmi_set_geometry(this); | |
1581 | if (ret) | |
1582 | return ret; | |
1583 | ||
1584 | /* NAND boot init, depends on the gpmi_set_geometry(). */ | |
1585 | return nand_boot_init(this); | |
1586 | } | |
1587 | ||
f720e7ce HS |
1588 | static void gpmi_nfc_exit(struct gpmi_nand_data *this) |
1589 | { | |
1590 | nand_release(&this->mtd); | |
1591 | gpmi_free_dma_buffer(this); | |
1592 | } | |
1593 | ||
1594 | static int gpmi_init_last(struct gpmi_nand_data *this) | |
10a2bcae | 1595 | { |
f720e7ce | 1596 | struct mtd_info *mtd = &this->mtd; |
10a2bcae | 1597 | struct nand_chip *chip = mtd->priv; |
f720e7ce HS |
1598 | struct nand_ecc_ctrl *ecc = &chip->ecc; |
1599 | struct bch_geometry *bch_geo = &this->bch_geometry; | |
10a2bcae HS |
1600 | int ret; |
1601 | ||
1602 | /* Prepare for the BBT scan. */ | |
1603 | ret = gpmi_pre_bbt_scan(this); | |
1604 | if (ret) | |
1605 | return ret; | |
1606 | ||
f720e7ce HS |
1607 | /* Init the nand_ecc_ctrl{} */ |
1608 | ecc->read_page = gpmi_ecc_read_page; | |
1609 | ecc->write_page = gpmi_ecc_write_page; | |
1610 | ecc->read_oob = gpmi_ecc_read_oob; | |
1611 | ecc->write_oob = gpmi_ecc_write_oob; | |
1612 | ecc->mode = NAND_ECC_HW; | |
1613 | ecc->size = bch_geo->ecc_chunk_size; | |
1614 | ecc->strength = bch_geo->ecc_strength; | |
1615 | ecc->layout = &gpmi_hw_ecclayout; | |
1616 | ||
995fbbf5 HS |
1617 | /* |
1618 | * Can we enable the extra features? such as EDO or Sync mode. | |
1619 | * | |
1620 | * We do not check the return value now. That's means if we fail in | |
1621 | * enable the extra features, we still can run in the normal way. | |
1622 | */ | |
1623 | gpmi_extra_init(this); | |
1624 | ||
f720e7ce | 1625 | return 0; |
10a2bcae HS |
1626 | } |
1627 | ||
06f25510 | 1628 | static int gpmi_nfc_init(struct gpmi_nand_data *this) |
10a2bcae | 1629 | { |
10a2bcae HS |
1630 | struct mtd_info *mtd = &this->mtd; |
1631 | struct nand_chip *chip = &this->nand; | |
e10db1f0 | 1632 | struct mtd_part_parser_data ppdata = {}; |
10a2bcae HS |
1633 | int ret; |
1634 | ||
1635 | /* init current chip */ | |
1636 | this->current_chip = -1; | |
1637 | ||
1638 | /* init the MTD data structures */ | |
1639 | mtd->priv = chip; | |
1640 | mtd->name = "gpmi-nand"; | |
1641 | mtd->owner = THIS_MODULE; | |
1642 | ||
1643 | /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */ | |
1644 | chip->priv = this; | |
1645 | chip->select_chip = gpmi_select_chip; | |
1646 | chip->cmd_ctrl = gpmi_cmd_ctrl; | |
1647 | chip->dev_ready = gpmi_dev_ready; | |
1648 | chip->read_byte = gpmi_read_byte; | |
1649 | chip->read_buf = gpmi_read_buf; | |
1650 | chip->write_buf = gpmi_write_buf; | |
10a2bcae HS |
1651 | chip->badblock_pattern = &gpmi_bbt_descr; |
1652 | chip->block_markbad = gpmi_block_markbad; | |
1653 | chip->options |= NAND_NO_SUBPAGE_WRITE; | |
c50c6940 HS |
1654 | if (of_get_nand_on_flash_bbt(this->dev->of_node)) |
1655 | chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; | |
10a2bcae | 1656 | |
f720e7ce HS |
1657 | /* |
1658 | * Allocate a temporary DMA buffer for reading ID in the | |
1659 | * nand_scan_ident(). | |
1660 | */ | |
10a2bcae HS |
1661 | this->bch_geometry.payload_size = 1024; |
1662 | this->bch_geometry.auxiliary_size = 128; | |
1663 | ret = gpmi_alloc_dma_buffer(this); | |
1664 | if (ret) | |
1665 | goto err_out; | |
1666 | ||
f720e7ce HS |
1667 | ret = nand_scan_ident(mtd, 1, NULL); |
1668 | if (ret) | |
1669 | goto err_out; | |
1670 | ||
1671 | ret = gpmi_init_last(this); | |
1672 | if (ret) | |
1673 | goto err_out; | |
1674 | ||
1675 | ret = nand_scan_tail(mtd); | |
1676 | if (ret) | |
10a2bcae | 1677 | goto err_out; |
10a2bcae | 1678 | |
e10db1f0 HS |
1679 | ppdata.of_node = this->pdev->dev.of_node; |
1680 | ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0); | |
10a2bcae HS |
1681 | if (ret) |
1682 | goto err_out; | |
1683 | return 0; | |
1684 | ||
1685 | err_out: | |
1686 | gpmi_nfc_exit(this); | |
1687 | return ret; | |
1688 | } | |
1689 | ||
e10db1f0 HS |
1690 | static const struct platform_device_id gpmi_ids[] = { |
1691 | { .name = "imx23-gpmi-nand", .driver_data = IS_MX23, }, | |
1692 | { .name = "imx28-gpmi-nand", .driver_data = IS_MX28, }, | |
9013bb40 | 1693 | { .name = "imx6q-gpmi-nand", .driver_data = IS_MX6Q, }, |
e10db1f0 HS |
1694 | {}, |
1695 | }; | |
1696 | ||
1697 | static const struct of_device_id gpmi_nand_id_table[] = { | |
1698 | { | |
1699 | .compatible = "fsl,imx23-gpmi-nand", | |
1700 | .data = (void *)&gpmi_ids[IS_MX23] | |
1701 | }, { | |
1702 | .compatible = "fsl,imx28-gpmi-nand", | |
1703 | .data = (void *)&gpmi_ids[IS_MX28] | |
9013bb40 HS |
1704 | }, { |
1705 | .compatible = "fsl,imx6q-gpmi-nand", | |
1706 | .data = (void *)&gpmi_ids[IS_MX6Q] | |
e10db1f0 HS |
1707 | }, {} |
1708 | }; | |
1709 | MODULE_DEVICE_TABLE(of, gpmi_nand_id_table); | |
1710 | ||
06f25510 | 1711 | static int gpmi_nand_probe(struct platform_device *pdev) |
10a2bcae | 1712 | { |
10a2bcae | 1713 | struct gpmi_nand_data *this; |
e10db1f0 | 1714 | const struct of_device_id *of_id; |
10a2bcae HS |
1715 | int ret; |
1716 | ||
e10db1f0 HS |
1717 | of_id = of_match_device(gpmi_nand_id_table, &pdev->dev); |
1718 | if (of_id) { | |
1719 | pdev->id_entry = of_id->data; | |
1720 | } else { | |
1721 | pr_err("Failed to find the right device id.\n"); | |
52a073bd | 1722 | return -ENODEV; |
e10db1f0 HS |
1723 | } |
1724 | ||
10a2bcae HS |
1725 | this = kzalloc(sizeof(*this), GFP_KERNEL); |
1726 | if (!this) { | |
1727 | pr_err("Failed to allocate per-device memory\n"); | |
1728 | return -ENOMEM; | |
1729 | } | |
1730 | ||
1731 | platform_set_drvdata(pdev, this); | |
1732 | this->pdev = pdev; | |
1733 | this->dev = &pdev->dev; | |
10a2bcae HS |
1734 | |
1735 | ret = acquire_resources(this); | |
1736 | if (ret) | |
1737 | goto exit_acquire_resources; | |
1738 | ||
1739 | ret = init_hardware(this); | |
1740 | if (ret) | |
1741 | goto exit_nfc_init; | |
1742 | ||
1743 | ret = gpmi_nfc_init(this); | |
1744 | if (ret) | |
1745 | goto exit_nfc_init; | |
1746 | ||
490e280a FE |
1747 | dev_info(this->dev, "driver registered.\n"); |
1748 | ||
10a2bcae HS |
1749 | return 0; |
1750 | ||
1751 | exit_nfc_init: | |
1752 | release_resources(this); | |
10a2bcae | 1753 | exit_acquire_resources: |
490e280a | 1754 | dev_err(this->dev, "driver registration failed: %d\n", ret); |
26738ddb | 1755 | kfree(this); |
490e280a | 1756 | |
10a2bcae HS |
1757 | return ret; |
1758 | } | |
1759 | ||
810b7e06 | 1760 | static int gpmi_nand_remove(struct platform_device *pdev) |
10a2bcae HS |
1761 | { |
1762 | struct gpmi_nand_data *this = platform_get_drvdata(pdev); | |
1763 | ||
1764 | gpmi_nfc_exit(this); | |
1765 | release_resources(this); | |
10a2bcae HS |
1766 | kfree(this); |
1767 | return 0; | |
1768 | } | |
1769 | ||
10a2bcae HS |
1770 | static struct platform_driver gpmi_nand_driver = { |
1771 | .driver = { | |
1772 | .name = "gpmi-nand", | |
e10db1f0 | 1773 | .of_match_table = gpmi_nand_id_table, |
10a2bcae HS |
1774 | }, |
1775 | .probe = gpmi_nand_probe, | |
5153b88c | 1776 | .remove = gpmi_nand_remove, |
10a2bcae HS |
1777 | .id_table = gpmi_ids, |
1778 | }; | |
490e280a | 1779 | module_platform_driver(gpmi_nand_driver); |
10a2bcae HS |
1780 | |
1781 | MODULE_AUTHOR("Freescale Semiconductor, Inc."); | |
1782 | MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver"); | |
1783 | MODULE_LICENSE("GPL"); |