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10a2bcae HS |
1 | /* |
2 | * Freescale GPMI NAND Flash Driver | |
3 | * | |
4 | * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. | |
5 | * Copyright (C) 2008 Embedded Alley Solutions, Inc. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along | |
18 | * with this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | |
20 | */ | |
3d10095a FE |
21 | |
22 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
23 | ||
10a2bcae HS |
24 | #include <linux/clk.h> |
25 | #include <linux/slab.h> | |
26 | #include <linux/interrupt.h> | |
df16c86a | 27 | #include <linux/module.h> |
10a2bcae | 28 | #include <linux/mtd/partitions.h> |
e10db1f0 HS |
29 | #include <linux/of.h> |
30 | #include <linux/of_device.h> | |
c50c6940 | 31 | #include <linux/of_mtd.h> |
10a2bcae HS |
32 | #include "gpmi-nand.h" |
33 | ||
5de0b52e HS |
34 | /* Resource names for the GPMI NAND driver. */ |
35 | #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand" | |
36 | #define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch" | |
37 | #define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch" | |
5de0b52e | 38 | |
10a2bcae HS |
39 | /* add our owner bbt descriptor */ |
40 | static uint8_t scan_ff_pattern[] = { 0xff }; | |
41 | static struct nand_bbt_descr gpmi_bbt_descr = { | |
42 | .options = 0, | |
43 | .offs = 0, | |
44 | .len = 1, | |
45 | .pattern = scan_ff_pattern | |
46 | }; | |
47 | ||
7a2b89ac HS |
48 | /* |
49 | * We may change the layout if we can get the ECC info from the datasheet, | |
50 | * else we will use all the (page + OOB). | |
51 | */ | |
10a2bcae HS |
52 | static struct nand_ecclayout gpmi_hw_ecclayout = { |
53 | .eccbytes = 0, | |
54 | .eccpos = { 0, }, | |
55 | .oobfree = { {.offset = 0, .length = 0} } | |
56 | }; | |
57 | ||
58 | static irqreturn_t bch_irq(int irq, void *cookie) | |
59 | { | |
60 | struct gpmi_nand_data *this = cookie; | |
61 | ||
62 | gpmi_clear_bch(this); | |
63 | complete(&this->bch_done); | |
64 | return IRQ_HANDLED; | |
65 | } | |
66 | ||
67 | /* | |
68 | * Calculate the ECC strength by hand: | |
69 | * E : The ECC strength. | |
70 | * G : the length of Galois Field. | |
71 | * N : The chunk count of per page. | |
72 | * O : the oobsize of the NAND chip. | |
73 | * M : the metasize of per page. | |
74 | * | |
75 | * The formula is : | |
76 | * E * G * N | |
77 | * ------------ <= (O - M) | |
78 | * 8 | |
79 | * | |
80 | * So, we get E by: | |
81 | * (O - M) * 8 | |
82 | * E <= ------------- | |
83 | * G * N | |
84 | */ | |
85 | static inline int get_ecc_strength(struct gpmi_nand_data *this) | |
86 | { | |
87 | struct bch_geometry *geo = &this->bch_geometry; | |
88 | struct mtd_info *mtd = &this->mtd; | |
89 | int ecc_strength; | |
90 | ||
91 | ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8) | |
92 | / (geo->gf_len * geo->ecc_chunk_count); | |
93 | ||
94 | /* We need the minor even number. */ | |
95 | return round_down(ecc_strength, 2); | |
96 | } | |
97 | ||
92d0e09a HS |
98 | static inline bool gpmi_check_ecc(struct gpmi_nand_data *this) |
99 | { | |
100 | struct bch_geometry *geo = &this->bch_geometry; | |
101 | ||
102 | /* Do the sanity check. */ | |
103 | if (GPMI_IS_MX23(this) || GPMI_IS_MX28(this)) { | |
104 | /* The mx23/mx28 only support the GF13. */ | |
105 | if (geo->gf_len == 14) | |
106 | return false; | |
107 | ||
108 | if (geo->ecc_strength > MXS_ECC_STRENGTH_MAX) | |
109 | return false; | |
110 | } else if (GPMI_IS_MX6Q(this)) { | |
111 | if (geo->ecc_strength > MX6_ECC_STRENGTH_MAX) | |
112 | return false; | |
113 | } | |
114 | return true; | |
115 | } | |
116 | ||
2febcdf8 HS |
117 | /* |
118 | * If we can get the ECC information from the nand chip, we do not | |
119 | * need to calculate them ourselves. | |
120 | * | |
121 | * We may have available oob space in this case. | |
122 | */ | |
123 | static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this) | |
124 | { | |
125 | struct bch_geometry *geo = &this->bch_geometry; | |
126 | struct mtd_info *mtd = &this->mtd; | |
127 | struct nand_chip *chip = mtd->priv; | |
128 | struct nand_oobfree *of = gpmi_hw_ecclayout.oobfree; | |
129 | unsigned int block_mark_bit_offset; | |
130 | ||
131 | if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) | |
132 | return false; | |
133 | ||
134 | switch (chip->ecc_step_ds) { | |
135 | case SZ_512: | |
136 | geo->gf_len = 13; | |
137 | break; | |
138 | case SZ_1K: | |
139 | geo->gf_len = 14; | |
140 | break; | |
141 | default: | |
142 | dev_err(this->dev, | |
143 | "unsupported nand chip. ecc bits : %d, ecc size : %d\n", | |
144 | chip->ecc_strength_ds, chip->ecc_step_ds); | |
145 | return false; | |
146 | } | |
147 | geo->ecc_chunk_size = chip->ecc_step_ds; | |
148 | geo->ecc_strength = round_up(chip->ecc_strength_ds, 2); | |
149 | if (!gpmi_check_ecc(this)) | |
150 | return false; | |
151 | ||
152 | /* Keep the C >= O */ | |
153 | if (geo->ecc_chunk_size < mtd->oobsize) { | |
154 | dev_err(this->dev, | |
155 | "unsupported nand chip. ecc size: %d, oob size : %d\n", | |
156 | chip->ecc_step_ds, mtd->oobsize); | |
157 | return false; | |
158 | } | |
159 | ||
160 | /* The default value, see comment in the legacy_set_geometry(). */ | |
161 | geo->metadata_size = 10; | |
162 | ||
163 | geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; | |
164 | ||
165 | /* | |
166 | * Now, the NAND chip with 2K page(data chunk is 512byte) shows below: | |
167 | * | |
168 | * | P | | |
169 | * |<----------------------------------------------------->| | |
170 | * | | | |
171 | * | (Block Mark) | | |
172 | * | P' | | | | | |
173 | * |<-------------------------------------------->| D | | O' | | |
174 | * | |<---->| |<--->| | |
175 | * V V V V V | |
176 | * +---+----------+-+----------+-+----------+-+----------+-+-----+ | |
177 | * | M | data |E| data |E| data |E| data |E| | | |
178 | * +---+----------+-+----------+-+----------+-+----------+-+-----+ | |
179 | * ^ ^ | |
180 | * | O | | |
181 | * |<------------>| | |
182 | * | | | |
183 | * | |
184 | * P : the page size for BCH module. | |
185 | * E : The ECC strength. | |
186 | * G : the length of Galois Field. | |
187 | * N : The chunk count of per page. | |
188 | * M : the metasize of per page. | |
189 | * C : the ecc chunk size, aka the "data" above. | |
190 | * P': the nand chip's page size. | |
191 | * O : the nand chip's oob size. | |
192 | * O': the free oob. | |
193 | * | |
194 | * The formula for P is : | |
195 | * | |
196 | * E * G * N | |
197 | * P = ------------ + P' + M | |
198 | * 8 | |
199 | * | |
200 | * The position of block mark moves forward in the ECC-based view | |
201 | * of page, and the delta is: | |
202 | * | |
203 | * E * G * (N - 1) | |
204 | * D = (---------------- + M) | |
205 | * 8 | |
206 | * | |
207 | * Please see the comment in legacy_set_geometry(). | |
208 | * With the condition C >= O , we still can get same result. | |
209 | * So the bit position of the physical block mark within the ECC-based | |
210 | * view of the page is : | |
211 | * (P' - D) * 8 | |
212 | */ | |
213 | geo->page_size = mtd->writesize + geo->metadata_size + | |
214 | (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; | |
215 | ||
216 | /* The available oob size we have. */ | |
217 | if (geo->page_size < mtd->writesize + mtd->oobsize) { | |
218 | of->offset = geo->page_size - mtd->writesize; | |
219 | of->length = mtd->oobsize - of->offset; | |
2febcdf8 HS |
220 | } |
221 | ||
222 | geo->payload_size = mtd->writesize; | |
223 | ||
224 | geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); | |
225 | geo->auxiliary_size = ALIGN(geo->metadata_size, 4) | |
226 | + ALIGN(geo->ecc_chunk_count, 4); | |
227 | ||
228 | if (!this->swap_block_mark) | |
229 | return true; | |
230 | ||
231 | /* For bit swap. */ | |
232 | block_mark_bit_offset = mtd->writesize * 8 - | |
233 | (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) | |
234 | + geo->metadata_size * 8); | |
235 | ||
236 | geo->block_mark_byte_offset = block_mark_bit_offset / 8; | |
237 | geo->block_mark_bit_offset = block_mark_bit_offset % 8; | |
238 | return true; | |
239 | } | |
240 | ||
241 | static int legacy_set_geometry(struct gpmi_nand_data *this) | |
10a2bcae HS |
242 | { |
243 | struct bch_geometry *geo = &this->bch_geometry; | |
244 | struct mtd_info *mtd = &this->mtd; | |
245 | unsigned int metadata_size; | |
246 | unsigned int status_size; | |
247 | unsigned int block_mark_bit_offset; | |
248 | ||
249 | /* | |
250 | * The size of the metadata can be changed, though we set it to 10 | |
251 | * bytes now. But it can't be too large, because we have to save | |
252 | * enough space for BCH. | |
253 | */ | |
254 | geo->metadata_size = 10; | |
255 | ||
256 | /* The default for the length of Galois Field. */ | |
257 | geo->gf_len = 13; | |
258 | ||
9ff16f08 | 259 | /* The default for chunk size. */ |
10a2bcae | 260 | geo->ecc_chunk_size = 512; |
9ff16f08 | 261 | while (geo->ecc_chunk_size < mtd->oobsize) { |
10a2bcae | 262 | geo->ecc_chunk_size *= 2; /* keep C >= O */ |
9ff16f08 HS |
263 | geo->gf_len = 14; |
264 | } | |
10a2bcae HS |
265 | |
266 | geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; | |
267 | ||
268 | /* We use the same ECC strength for all chunks. */ | |
269 | geo->ecc_strength = get_ecc_strength(this); | |
92d0e09a HS |
270 | if (!gpmi_check_ecc(this)) { |
271 | dev_err(this->dev, | |
272 | "We can not support this nand chip." | |
273 | " Its required ecc strength(%d) is beyond our" | |
274 | " capability(%d).\n", geo->ecc_strength, | |
275 | (GPMI_IS_MX6Q(this) ? MX6_ECC_STRENGTH_MAX | |
276 | : MXS_ECC_STRENGTH_MAX)); | |
10a2bcae HS |
277 | return -EINVAL; |
278 | } | |
279 | ||
280 | geo->page_size = mtd->writesize + mtd->oobsize; | |
281 | geo->payload_size = mtd->writesize; | |
282 | ||
283 | /* | |
284 | * The auxiliary buffer contains the metadata and the ECC status. The | |
285 | * metadata is padded to the nearest 32-bit boundary. The ECC status | |
286 | * contains one byte for every ECC chunk, and is also padded to the | |
287 | * nearest 32-bit boundary. | |
288 | */ | |
289 | metadata_size = ALIGN(geo->metadata_size, 4); | |
290 | status_size = ALIGN(geo->ecc_chunk_count, 4); | |
291 | ||
292 | geo->auxiliary_size = metadata_size + status_size; | |
293 | geo->auxiliary_status_offset = metadata_size; | |
294 | ||
295 | if (!this->swap_block_mark) | |
296 | return 0; | |
297 | ||
298 | /* | |
299 | * We need to compute the byte and bit offsets of | |
300 | * the physical block mark within the ECC-based view of the page. | |
301 | * | |
302 | * NAND chip with 2K page shows below: | |
303 | * (Block Mark) | |
304 | * | | | |
305 | * | D | | |
306 | * |<---->| | |
307 | * V V | |
308 | * +---+----------+-+----------+-+----------+-+----------+-+ | |
309 | * | M | data |E| data |E| data |E| data |E| | |
310 | * +---+----------+-+----------+-+----------+-+----------+-+ | |
311 | * | |
312 | * The position of block mark moves forward in the ECC-based view | |
313 | * of page, and the delta is: | |
314 | * | |
315 | * E * G * (N - 1) | |
316 | * D = (---------------- + M) | |
317 | * 8 | |
318 | * | |
319 | * With the formula to compute the ECC strength, and the condition | |
320 | * : C >= O (C is the ecc chunk size) | |
321 | * | |
322 | * It's easy to deduce to the following result: | |
323 | * | |
324 | * E * G (O - M) C - M C - M | |
325 | * ----------- <= ------- <= -------- < --------- | |
326 | * 8 N N (N - 1) | |
327 | * | |
328 | * So, we get: | |
329 | * | |
330 | * E * G * (N - 1) | |
331 | * D = (---------------- + M) < C | |
332 | * 8 | |
333 | * | |
334 | * The above inequality means the position of block mark | |
335 | * within the ECC-based view of the page is still in the data chunk, | |
336 | * and it's NOT in the ECC bits of the chunk. | |
337 | * | |
338 | * Use the following to compute the bit position of the | |
339 | * physical block mark within the ECC-based view of the page: | |
340 | * (page_size - D) * 8 | |
341 | * | |
342 | * --Huang Shijie | |
343 | */ | |
344 | block_mark_bit_offset = mtd->writesize * 8 - | |
345 | (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) | |
346 | + geo->metadata_size * 8); | |
347 | ||
348 | geo->block_mark_byte_offset = block_mark_bit_offset / 8; | |
349 | geo->block_mark_bit_offset = block_mark_bit_offset % 8; | |
350 | return 0; | |
351 | } | |
352 | ||
2febcdf8 HS |
353 | int common_nfc_set_geometry(struct gpmi_nand_data *this) |
354 | { | |
031e2777 | 355 | return legacy_set_geometry(this); |
2febcdf8 HS |
356 | } |
357 | ||
10a2bcae HS |
358 | struct dma_chan *get_dma_chan(struct gpmi_nand_data *this) |
359 | { | |
a7c12d01 HS |
360 | /* We use the DMA channel 0 to access all the nand chips. */ |
361 | return this->dma_chans[0]; | |
10a2bcae HS |
362 | } |
363 | ||
364 | /* Can we use the upper's buffer directly for DMA? */ | |
365 | void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr) | |
366 | { | |
367 | struct scatterlist *sgl = &this->data_sgl; | |
368 | int ret; | |
369 | ||
370 | this->direct_dma_map_ok = true; | |
371 | ||
372 | /* first try to map the upper buffer directly */ | |
373 | sg_init_one(sgl, this->upper_buf, this->upper_len); | |
374 | ret = dma_map_sg(this->dev, sgl, 1, dr); | |
375 | if (ret == 0) { | |
376 | /* We have to use our own DMA buffer. */ | |
377 | sg_init_one(sgl, this->data_buffer_dma, PAGE_SIZE); | |
378 | ||
379 | if (dr == DMA_TO_DEVICE) | |
380 | memcpy(this->data_buffer_dma, this->upper_buf, | |
381 | this->upper_len); | |
382 | ||
383 | ret = dma_map_sg(this->dev, sgl, 1, dr); | |
384 | if (ret == 0) | |
2d350e5a | 385 | pr_err("DMA mapping failed.\n"); |
10a2bcae HS |
386 | |
387 | this->direct_dma_map_ok = false; | |
388 | } | |
389 | } | |
390 | ||
391 | /* This will be called after the DMA operation is finished. */ | |
392 | static void dma_irq_callback(void *param) | |
393 | { | |
394 | struct gpmi_nand_data *this = param; | |
395 | struct completion *dma_c = &this->dma_done; | |
396 | ||
10a2bcae HS |
397 | switch (this->dma_type) { |
398 | case DMA_FOR_COMMAND: | |
399 | dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE); | |
400 | break; | |
401 | ||
402 | case DMA_FOR_READ_DATA: | |
403 | dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE); | |
404 | if (this->direct_dma_map_ok == false) | |
405 | memcpy(this->upper_buf, this->data_buffer_dma, | |
406 | this->upper_len); | |
407 | break; | |
408 | ||
409 | case DMA_FOR_WRITE_DATA: | |
410 | dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE); | |
411 | break; | |
412 | ||
413 | case DMA_FOR_READ_ECC_PAGE: | |
414 | case DMA_FOR_WRITE_ECC_PAGE: | |
415 | /* We have to wait the BCH interrupt to finish. */ | |
416 | break; | |
417 | ||
418 | default: | |
419 | pr_err("in wrong DMA operation.\n"); | |
420 | } | |
7b3d2fb9 HS |
421 | |
422 | complete(dma_c); | |
10a2bcae HS |
423 | } |
424 | ||
425 | int start_dma_without_bch_irq(struct gpmi_nand_data *this, | |
426 | struct dma_async_tx_descriptor *desc) | |
427 | { | |
428 | struct completion *dma_c = &this->dma_done; | |
429 | int err; | |
430 | ||
431 | init_completion(dma_c); | |
432 | ||
433 | desc->callback = dma_irq_callback; | |
434 | desc->callback_param = this; | |
435 | dmaengine_submit(desc); | |
d04525ed | 436 | dma_async_issue_pending(get_dma_chan(this)); |
10a2bcae HS |
437 | |
438 | /* Wait for the interrupt from the DMA block. */ | |
439 | err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000)); | |
440 | if (!err) { | |
441 | pr_err("DMA timeout, last DMA :%d\n", this->last_dma_type); | |
442 | gpmi_dump_info(this); | |
443 | return -ETIMEDOUT; | |
444 | } | |
445 | return 0; | |
446 | } | |
447 | ||
448 | /* | |
449 | * This function is used in BCH reading or BCH writing pages. | |
450 | * It will wait for the BCH interrupt as long as ONE second. | |
451 | * Actually, we must wait for two interrupts : | |
452 | * [1] firstly the DMA interrupt and | |
453 | * [2] secondly the BCH interrupt. | |
454 | */ | |
455 | int start_dma_with_bch_irq(struct gpmi_nand_data *this, | |
456 | struct dma_async_tx_descriptor *desc) | |
457 | { | |
458 | struct completion *bch_c = &this->bch_done; | |
459 | int err; | |
460 | ||
461 | /* Prepare to receive an interrupt from the BCH block. */ | |
462 | init_completion(bch_c); | |
463 | ||
464 | /* start the DMA */ | |
465 | start_dma_without_bch_irq(this, desc); | |
466 | ||
467 | /* Wait for the interrupt from the BCH block. */ | |
468 | err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000)); | |
469 | if (!err) { | |
470 | pr_err("BCH timeout, last DMA :%d\n", this->last_dma_type); | |
471 | gpmi_dump_info(this); | |
472 | return -ETIMEDOUT; | |
473 | } | |
474 | return 0; | |
475 | } | |
476 | ||
d8929942 GKH |
477 | static int acquire_register_block(struct gpmi_nand_data *this, |
478 | const char *res_name) | |
10a2bcae HS |
479 | { |
480 | struct platform_device *pdev = this->pdev; | |
481 | struct resources *res = &this->resources; | |
482 | struct resource *r; | |
513d57e1 | 483 | void __iomem *p; |
10a2bcae HS |
484 | |
485 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); | |
486 | if (!r) { | |
487 | pr_err("Can't get resource for %s\n", res_name); | |
52a073bd | 488 | return -ENODEV; |
10a2bcae HS |
489 | } |
490 | ||
491 | p = ioremap(r->start, resource_size(r)); | |
492 | if (!p) { | |
493 | pr_err("Can't remap %s\n", res_name); | |
494 | return -ENOMEM; | |
495 | } | |
496 | ||
497 | if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME)) | |
498 | res->gpmi_regs = p; | |
499 | else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME)) | |
500 | res->bch_regs = p; | |
501 | else | |
502 | pr_err("unknown resource name : %s\n", res_name); | |
503 | ||
504 | return 0; | |
505 | } | |
506 | ||
507 | static void release_register_block(struct gpmi_nand_data *this) | |
508 | { | |
509 | struct resources *res = &this->resources; | |
510 | if (res->gpmi_regs) | |
511 | iounmap(res->gpmi_regs); | |
512 | if (res->bch_regs) | |
513 | iounmap(res->bch_regs); | |
514 | res->gpmi_regs = NULL; | |
515 | res->bch_regs = NULL; | |
516 | } | |
517 | ||
d8929942 | 518 | static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h) |
10a2bcae HS |
519 | { |
520 | struct platform_device *pdev = this->pdev; | |
521 | struct resources *res = &this->resources; | |
522 | const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME; | |
523 | struct resource *r; | |
524 | int err; | |
525 | ||
526 | r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); | |
527 | if (!r) { | |
528 | pr_err("Can't get resource for %s\n", res_name); | |
52a073bd | 529 | return -ENODEV; |
10a2bcae HS |
530 | } |
531 | ||
532 | err = request_irq(r->start, irq_h, 0, res_name, this); | |
533 | if (err) { | |
534 | pr_err("Can't own %s\n", res_name); | |
535 | return err; | |
536 | } | |
537 | ||
538 | res->bch_low_interrupt = r->start; | |
539 | res->bch_high_interrupt = r->end; | |
540 | return 0; | |
541 | } | |
542 | ||
543 | static void release_bch_irq(struct gpmi_nand_data *this) | |
544 | { | |
545 | struct resources *res = &this->resources; | |
546 | int i = res->bch_low_interrupt; | |
547 | ||
548 | for (; i <= res->bch_high_interrupt; i++) | |
549 | free_irq(i, this); | |
550 | } | |
551 | ||
10a2bcae HS |
552 | static void release_dma_channels(struct gpmi_nand_data *this) |
553 | { | |
554 | unsigned int i; | |
555 | for (i = 0; i < DMA_CHANS; i++) | |
556 | if (this->dma_chans[i]) { | |
557 | dma_release_channel(this->dma_chans[i]); | |
558 | this->dma_chans[i] = NULL; | |
559 | } | |
560 | } | |
561 | ||
06f25510 | 562 | static int acquire_dma_channels(struct gpmi_nand_data *this) |
10a2bcae HS |
563 | { |
564 | struct platform_device *pdev = this->pdev; | |
e10db1f0 | 565 | struct dma_chan *dma_chan; |
10a2bcae | 566 | |
e10db1f0 | 567 | /* request dma channel */ |
5fac0e18 | 568 | dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx"); |
e10db1f0 | 569 | if (!dma_chan) { |
2d350e5a | 570 | pr_err("Failed to request DMA channel.\n"); |
e10db1f0 | 571 | goto acquire_err; |
10a2bcae HS |
572 | } |
573 | ||
e10db1f0 | 574 | this->dma_chans[0] = dma_chan; |
10a2bcae HS |
575 | return 0; |
576 | ||
577 | acquire_err: | |
10a2bcae HS |
578 | release_dma_channels(this); |
579 | return -EINVAL; | |
580 | } | |
581 | ||
ff506172 HS |
582 | static void gpmi_put_clks(struct gpmi_nand_data *this) |
583 | { | |
584 | struct resources *r = &this->resources; | |
585 | struct clk *clk; | |
586 | int i; | |
587 | ||
588 | for (i = 0; i < GPMI_CLK_MAX; i++) { | |
589 | clk = r->clock[i]; | |
590 | if (clk) { | |
591 | clk_put(clk); | |
592 | r->clock[i] = NULL; | |
593 | } | |
594 | } | |
595 | } | |
596 | ||
597 | static char *extra_clks_for_mx6q[GPMI_CLK_MAX] = { | |
598 | "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch", | |
599 | }; | |
600 | ||
06f25510 | 601 | static int gpmi_get_clks(struct gpmi_nand_data *this) |
ff506172 HS |
602 | { |
603 | struct resources *r = &this->resources; | |
604 | char **extra_clks = NULL; | |
605 | struct clk *clk; | |
d1cb556c | 606 | int err, i; |
ff506172 HS |
607 | |
608 | /* The main clock is stored in the first. */ | |
609 | r->clock[0] = clk_get(this->dev, "gpmi_io"); | |
d1cb556c MM |
610 | if (IS_ERR(r->clock[0])) { |
611 | err = PTR_ERR(r->clock[0]); | |
ff506172 | 612 | goto err_clock; |
d1cb556c | 613 | } |
ff506172 HS |
614 | |
615 | /* Get extra clocks */ | |
616 | if (GPMI_IS_MX6Q(this)) | |
617 | extra_clks = extra_clks_for_mx6q; | |
618 | if (!extra_clks) | |
619 | return 0; | |
620 | ||
621 | for (i = 1; i < GPMI_CLK_MAX; i++) { | |
622 | if (extra_clks[i - 1] == NULL) | |
623 | break; | |
624 | ||
625 | clk = clk_get(this->dev, extra_clks[i - 1]); | |
d1cb556c MM |
626 | if (IS_ERR(clk)) { |
627 | err = PTR_ERR(clk); | |
ff506172 | 628 | goto err_clock; |
d1cb556c | 629 | } |
ff506172 HS |
630 | |
631 | r->clock[i] = clk; | |
632 | } | |
633 | ||
e1ca95e3 | 634 | if (GPMI_IS_MX6Q(this)) |
ff506172 | 635 | /* |
e1ca95e3 | 636 | * Set the default value for the gpmi clock in mx6q: |
ff506172 | 637 | * |
e1ca95e3 HS |
638 | * If you want to use the ONFI nand which is in the |
639 | * Synchronous Mode, you should change the clock as you need. | |
ff506172 HS |
640 | */ |
641 | clk_set_rate(r->clock[0], 22000000); | |
e1ca95e3 | 642 | |
ff506172 HS |
643 | return 0; |
644 | ||
645 | err_clock: | |
646 | dev_dbg(this->dev, "failed in finding the clocks.\n"); | |
647 | gpmi_put_clks(this); | |
d1cb556c | 648 | return err; |
ff506172 HS |
649 | } |
650 | ||
06f25510 | 651 | static int acquire_resources(struct gpmi_nand_data *this) |
10a2bcae | 652 | { |
10a2bcae HS |
653 | int ret; |
654 | ||
655 | ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME); | |
656 | if (ret) | |
657 | goto exit_regs; | |
658 | ||
659 | ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME); | |
660 | if (ret) | |
661 | goto exit_regs; | |
662 | ||
663 | ret = acquire_bch_irq(this, bch_irq); | |
664 | if (ret) | |
665 | goto exit_regs; | |
666 | ||
667 | ret = acquire_dma_channels(this); | |
668 | if (ret) | |
669 | goto exit_dma_channels; | |
670 | ||
ff506172 HS |
671 | ret = gpmi_get_clks(this); |
672 | if (ret) | |
10a2bcae | 673 | goto exit_clock; |
10a2bcae HS |
674 | return 0; |
675 | ||
676 | exit_clock: | |
677 | release_dma_channels(this); | |
678 | exit_dma_channels: | |
679 | release_bch_irq(this); | |
680 | exit_regs: | |
681 | release_register_block(this); | |
682 | return ret; | |
683 | } | |
684 | ||
685 | static void release_resources(struct gpmi_nand_data *this) | |
686 | { | |
ff506172 | 687 | gpmi_put_clks(this); |
10a2bcae HS |
688 | release_register_block(this); |
689 | release_bch_irq(this); | |
690 | release_dma_channels(this); | |
691 | } | |
692 | ||
06f25510 | 693 | static int init_hardware(struct gpmi_nand_data *this) |
10a2bcae HS |
694 | { |
695 | int ret; | |
696 | ||
697 | /* | |
698 | * This structure contains the "safe" GPMI timing that should succeed | |
699 | * with any NAND Flash device | |
700 | * (although, with less-than-optimal performance). | |
701 | */ | |
702 | struct nand_timing safe_timing = { | |
703 | .data_setup_in_ns = 80, | |
704 | .data_hold_in_ns = 60, | |
705 | .address_setup_in_ns = 25, | |
706 | .gpmi_sample_delay_in_ns = 6, | |
707 | .tREA_in_ns = -1, | |
708 | .tRLOH_in_ns = -1, | |
709 | .tRHOH_in_ns = -1, | |
710 | }; | |
711 | ||
712 | /* Initialize the hardwares. */ | |
713 | ret = gpmi_init(this); | |
714 | if (ret) | |
715 | return ret; | |
716 | ||
717 | this->timing = safe_timing; | |
718 | return 0; | |
719 | } | |
720 | ||
721 | static int read_page_prepare(struct gpmi_nand_data *this, | |
722 | void *destination, unsigned length, | |
723 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
724 | void **use_virt, dma_addr_t *use_phys) | |
725 | { | |
726 | struct device *dev = this->dev; | |
727 | ||
728 | if (virt_addr_valid(destination)) { | |
729 | dma_addr_t dest_phys; | |
730 | ||
731 | dest_phys = dma_map_single(dev, destination, | |
732 | length, DMA_FROM_DEVICE); | |
733 | if (dma_mapping_error(dev, dest_phys)) { | |
734 | if (alt_size < length) { | |
2d350e5a VN |
735 | pr_err("%s, Alternate buffer is too small\n", |
736 | __func__); | |
10a2bcae HS |
737 | return -ENOMEM; |
738 | } | |
739 | goto map_failed; | |
740 | } | |
741 | *use_virt = destination; | |
742 | *use_phys = dest_phys; | |
743 | this->direct_dma_map_ok = true; | |
744 | return 0; | |
745 | } | |
746 | ||
747 | map_failed: | |
748 | *use_virt = alt_virt; | |
749 | *use_phys = alt_phys; | |
750 | this->direct_dma_map_ok = false; | |
751 | return 0; | |
752 | } | |
753 | ||
754 | static inline void read_page_end(struct gpmi_nand_data *this, | |
755 | void *destination, unsigned length, | |
756 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
757 | void *used_virt, dma_addr_t used_phys) | |
758 | { | |
759 | if (this->direct_dma_map_ok) | |
760 | dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE); | |
761 | } | |
762 | ||
763 | static inline void read_page_swap_end(struct gpmi_nand_data *this, | |
764 | void *destination, unsigned length, | |
765 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
766 | void *used_virt, dma_addr_t used_phys) | |
767 | { | |
768 | if (!this->direct_dma_map_ok) | |
769 | memcpy(destination, alt_virt, length); | |
770 | } | |
771 | ||
772 | static int send_page_prepare(struct gpmi_nand_data *this, | |
773 | const void *source, unsigned length, | |
774 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
775 | const void **use_virt, dma_addr_t *use_phys) | |
776 | { | |
777 | struct device *dev = this->dev; | |
778 | ||
779 | if (virt_addr_valid(source)) { | |
780 | dma_addr_t source_phys; | |
781 | ||
782 | source_phys = dma_map_single(dev, (void *)source, length, | |
783 | DMA_TO_DEVICE); | |
784 | if (dma_mapping_error(dev, source_phys)) { | |
785 | if (alt_size < length) { | |
2d350e5a VN |
786 | pr_err("%s, Alternate buffer is too small\n", |
787 | __func__); | |
10a2bcae HS |
788 | return -ENOMEM; |
789 | } | |
790 | goto map_failed; | |
791 | } | |
792 | *use_virt = source; | |
793 | *use_phys = source_phys; | |
794 | return 0; | |
795 | } | |
796 | map_failed: | |
797 | /* | |
798 | * Copy the content of the source buffer into the alternate | |
799 | * buffer and set up the return values accordingly. | |
800 | */ | |
801 | memcpy(alt_virt, source, length); | |
802 | ||
803 | *use_virt = alt_virt; | |
804 | *use_phys = alt_phys; | |
805 | return 0; | |
806 | } | |
807 | ||
808 | static void send_page_end(struct gpmi_nand_data *this, | |
809 | const void *source, unsigned length, | |
810 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
811 | const void *used_virt, dma_addr_t used_phys) | |
812 | { | |
813 | struct device *dev = this->dev; | |
814 | if (used_virt == source) | |
815 | dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE); | |
816 | } | |
817 | ||
818 | static void gpmi_free_dma_buffer(struct gpmi_nand_data *this) | |
819 | { | |
820 | struct device *dev = this->dev; | |
821 | ||
822 | if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt)) | |
823 | dma_free_coherent(dev, this->page_buffer_size, | |
824 | this->page_buffer_virt, | |
825 | this->page_buffer_phys); | |
826 | kfree(this->cmd_buffer); | |
827 | kfree(this->data_buffer_dma); | |
828 | ||
829 | this->cmd_buffer = NULL; | |
830 | this->data_buffer_dma = NULL; | |
831 | this->page_buffer_virt = NULL; | |
832 | this->page_buffer_size = 0; | |
833 | } | |
834 | ||
835 | /* Allocate the DMA buffers */ | |
836 | static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this) | |
837 | { | |
838 | struct bch_geometry *geo = &this->bch_geometry; | |
839 | struct device *dev = this->dev; | |
840 | ||
841 | /* [1] Allocate a command buffer. PAGE_SIZE is enough. */ | |
513d57e1 | 842 | this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL); |
10a2bcae HS |
843 | if (this->cmd_buffer == NULL) |
844 | goto error_alloc; | |
845 | ||
846 | /* [2] Allocate a read/write data buffer. PAGE_SIZE is enough. */ | |
513d57e1 | 847 | this->data_buffer_dma = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL); |
10a2bcae HS |
848 | if (this->data_buffer_dma == NULL) |
849 | goto error_alloc; | |
850 | ||
851 | /* | |
852 | * [3] Allocate the page buffer. | |
853 | * | |
854 | * Both the payload buffer and the auxiliary buffer must appear on | |
855 | * 32-bit boundaries. We presume the size of the payload buffer is a | |
856 | * power of two and is much larger than four, which guarantees the | |
857 | * auxiliary buffer will appear on a 32-bit boundary. | |
858 | */ | |
859 | this->page_buffer_size = geo->payload_size + geo->auxiliary_size; | |
860 | this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size, | |
861 | &this->page_buffer_phys, GFP_DMA); | |
862 | if (!this->page_buffer_virt) | |
863 | goto error_alloc; | |
864 | ||
865 | ||
866 | /* Slice up the page buffer. */ | |
867 | this->payload_virt = this->page_buffer_virt; | |
868 | this->payload_phys = this->page_buffer_phys; | |
869 | this->auxiliary_virt = this->payload_virt + geo->payload_size; | |
870 | this->auxiliary_phys = this->payload_phys + geo->payload_size; | |
871 | return 0; | |
872 | ||
873 | error_alloc: | |
874 | gpmi_free_dma_buffer(this); | |
2d350e5a | 875 | pr_err("Error allocating DMA buffers!\n"); |
10a2bcae HS |
876 | return -ENOMEM; |
877 | } | |
878 | ||
879 | static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl) | |
880 | { | |
881 | struct nand_chip *chip = mtd->priv; | |
882 | struct gpmi_nand_data *this = chip->priv; | |
883 | int ret; | |
884 | ||
885 | /* | |
886 | * Every operation begins with a command byte and a series of zero or | |
887 | * more address bytes. These are distinguished by either the Address | |
888 | * Latch Enable (ALE) or Command Latch Enable (CLE) signals being | |
889 | * asserted. When MTD is ready to execute the command, it will deassert | |
890 | * both latch enables. | |
891 | * | |
892 | * Rather than run a separate DMA operation for every single byte, we | |
893 | * queue them up and run a single DMA operation for the entire series | |
894 | * of command and data bytes. NAND_CMD_NONE means the END of the queue. | |
895 | */ | |
896 | if ((ctrl & (NAND_ALE | NAND_CLE))) { | |
897 | if (data != NAND_CMD_NONE) | |
898 | this->cmd_buffer[this->command_length++] = data; | |
899 | return; | |
900 | } | |
901 | ||
902 | if (!this->command_length) | |
903 | return; | |
904 | ||
905 | ret = gpmi_send_command(this); | |
906 | if (ret) | |
907 | pr_err("Chip: %u, Error %d\n", this->current_chip, ret); | |
908 | ||
909 | this->command_length = 0; | |
910 | } | |
911 | ||
912 | static int gpmi_dev_ready(struct mtd_info *mtd) | |
913 | { | |
914 | struct nand_chip *chip = mtd->priv; | |
915 | struct gpmi_nand_data *this = chip->priv; | |
916 | ||
917 | return gpmi_is_ready(this, this->current_chip); | |
918 | } | |
919 | ||
920 | static void gpmi_select_chip(struct mtd_info *mtd, int chipnr) | |
921 | { | |
922 | struct nand_chip *chip = mtd->priv; | |
923 | struct gpmi_nand_data *this = chip->priv; | |
924 | ||
925 | if ((this->current_chip < 0) && (chipnr >= 0)) | |
926 | gpmi_begin(this); | |
927 | else if ((this->current_chip >= 0) && (chipnr < 0)) | |
928 | gpmi_end(this); | |
929 | ||
930 | this->current_chip = chipnr; | |
931 | } | |
932 | ||
933 | static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) | |
934 | { | |
935 | struct nand_chip *chip = mtd->priv; | |
936 | struct gpmi_nand_data *this = chip->priv; | |
937 | ||
938 | pr_debug("len is %d\n", len); | |
939 | this->upper_buf = buf; | |
940 | this->upper_len = len; | |
941 | ||
942 | gpmi_read_data(this); | |
943 | } | |
944 | ||
945 | static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) | |
946 | { | |
947 | struct nand_chip *chip = mtd->priv; | |
948 | struct gpmi_nand_data *this = chip->priv; | |
949 | ||
950 | pr_debug("len is %d\n", len); | |
951 | this->upper_buf = (uint8_t *)buf; | |
952 | this->upper_len = len; | |
953 | ||
954 | gpmi_send_data(this); | |
955 | } | |
956 | ||
957 | static uint8_t gpmi_read_byte(struct mtd_info *mtd) | |
958 | { | |
959 | struct nand_chip *chip = mtd->priv; | |
960 | struct gpmi_nand_data *this = chip->priv; | |
961 | uint8_t *buf = this->data_buffer_dma; | |
962 | ||
963 | gpmi_read_buf(mtd, buf, 1); | |
964 | return buf[0]; | |
965 | } | |
966 | ||
967 | /* | |
968 | * Handles block mark swapping. | |
969 | * It can be called in swapping the block mark, or swapping it back, | |
970 | * because the the operations are the same. | |
971 | */ | |
972 | static void block_mark_swapping(struct gpmi_nand_data *this, | |
973 | void *payload, void *auxiliary) | |
974 | { | |
975 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
976 | unsigned char *p; | |
977 | unsigned char *a; | |
978 | unsigned int bit; | |
979 | unsigned char mask; | |
980 | unsigned char from_data; | |
981 | unsigned char from_oob; | |
982 | ||
983 | if (!this->swap_block_mark) | |
984 | return; | |
985 | ||
986 | /* | |
987 | * If control arrives here, we're swapping. Make some convenience | |
988 | * variables. | |
989 | */ | |
990 | bit = nfc_geo->block_mark_bit_offset; | |
991 | p = payload + nfc_geo->block_mark_byte_offset; | |
992 | a = auxiliary; | |
993 | ||
994 | /* | |
995 | * Get the byte from the data area that overlays the block mark. Since | |
996 | * the ECC engine applies its own view to the bits in the page, the | |
997 | * physical block mark won't (in general) appear on a byte boundary in | |
998 | * the data. | |
999 | */ | |
1000 | from_data = (p[0] >> bit) | (p[1] << (8 - bit)); | |
1001 | ||
1002 | /* Get the byte from the OOB. */ | |
1003 | from_oob = a[0]; | |
1004 | ||
1005 | /* Swap them. */ | |
1006 | a[0] = from_data; | |
1007 | ||
1008 | mask = (0x1 << bit) - 1; | |
1009 | p[0] = (p[0] & mask) | (from_oob << bit); | |
1010 | ||
1011 | mask = ~0 << bit; | |
1012 | p[1] = (p[1] & mask) | (from_oob >> (8 - bit)); | |
1013 | } | |
1014 | ||
1015 | static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip, | |
1fbb938d | 1016 | uint8_t *buf, int oob_required, int page) |
10a2bcae HS |
1017 | { |
1018 | struct gpmi_nand_data *this = chip->priv; | |
1019 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
1020 | void *payload_virt; | |
1021 | dma_addr_t payload_phys; | |
1022 | void *auxiliary_virt; | |
1023 | dma_addr_t auxiliary_phys; | |
1024 | unsigned int i; | |
1025 | unsigned char *status; | |
b23b746c | 1026 | unsigned int max_bitflips = 0; |
10a2bcae HS |
1027 | int ret; |
1028 | ||
1029 | pr_debug("page number is : %d\n", page); | |
1030 | ret = read_page_prepare(this, buf, mtd->writesize, | |
1031 | this->payload_virt, this->payload_phys, | |
1032 | nfc_geo->payload_size, | |
1033 | &payload_virt, &payload_phys); | |
1034 | if (ret) { | |
1035 | pr_err("Inadequate DMA buffer\n"); | |
1036 | ret = -ENOMEM; | |
1037 | return ret; | |
1038 | } | |
1039 | auxiliary_virt = this->auxiliary_virt; | |
1040 | auxiliary_phys = this->auxiliary_phys; | |
1041 | ||
1042 | /* go! */ | |
1043 | ret = gpmi_read_page(this, payload_phys, auxiliary_phys); | |
1044 | read_page_end(this, buf, mtd->writesize, | |
1045 | this->payload_virt, this->payload_phys, | |
1046 | nfc_geo->payload_size, | |
1047 | payload_virt, payload_phys); | |
1048 | if (ret) { | |
1049 | pr_err("Error in ECC-based read: %d\n", ret); | |
b23b746c | 1050 | return ret; |
10a2bcae HS |
1051 | } |
1052 | ||
1053 | /* handle the block mark swapping */ | |
1054 | block_mark_swapping(this, payload_virt, auxiliary_virt); | |
1055 | ||
1056 | /* Loop over status bytes, accumulating ECC status. */ | |
b23b746c | 1057 | status = auxiliary_virt + nfc_geo->auxiliary_status_offset; |
10a2bcae HS |
1058 | |
1059 | for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) { | |
1060 | if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED)) | |
1061 | continue; | |
1062 | ||
1063 | if (*status == STATUS_UNCORRECTABLE) { | |
b23b746c | 1064 | mtd->ecc_stats.failed++; |
10a2bcae HS |
1065 | continue; |
1066 | } | |
b23b746c ZS |
1067 | mtd->ecc_stats.corrected += *status; |
1068 | max_bitflips = max_t(unsigned int, max_bitflips, *status); | |
10a2bcae HS |
1069 | } |
1070 | ||
7725cc85 BN |
1071 | if (oob_required) { |
1072 | /* | |
1073 | * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() | |
1074 | * for details about our policy for delivering the OOB. | |
1075 | * | |
1076 | * We fill the caller's buffer with set bits, and then copy the | |
1077 | * block mark to th caller's buffer. Note that, if block mark | |
1078 | * swapping was necessary, it has already been done, so we can | |
1079 | * rely on the first byte of the auxiliary buffer to contain | |
1080 | * the block mark. | |
1081 | */ | |
1082 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
1083 | chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0]; | |
7725cc85 | 1084 | } |
6023813a SH |
1085 | |
1086 | read_page_swap_end(this, buf, mtd->writesize, | |
1087 | this->payload_virt, this->payload_phys, | |
1088 | nfc_geo->payload_size, | |
1089 | payload_virt, payload_phys); | |
b23b746c ZS |
1090 | |
1091 | return max_bitflips; | |
10a2bcae HS |
1092 | } |
1093 | ||
fdbad98d | 1094 | static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
1fbb938d | 1095 | const uint8_t *buf, int oob_required) |
10a2bcae HS |
1096 | { |
1097 | struct gpmi_nand_data *this = chip->priv; | |
1098 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
1099 | const void *payload_virt; | |
1100 | dma_addr_t payload_phys; | |
1101 | const void *auxiliary_virt; | |
1102 | dma_addr_t auxiliary_phys; | |
1103 | int ret; | |
1104 | ||
1105 | pr_debug("ecc write page.\n"); | |
1106 | if (this->swap_block_mark) { | |
1107 | /* | |
1108 | * If control arrives here, we're doing block mark swapping. | |
1109 | * Since we can't modify the caller's buffers, we must copy them | |
1110 | * into our own. | |
1111 | */ | |
1112 | memcpy(this->payload_virt, buf, mtd->writesize); | |
1113 | payload_virt = this->payload_virt; | |
1114 | payload_phys = this->payload_phys; | |
1115 | ||
1116 | memcpy(this->auxiliary_virt, chip->oob_poi, | |
1117 | nfc_geo->auxiliary_size); | |
1118 | auxiliary_virt = this->auxiliary_virt; | |
1119 | auxiliary_phys = this->auxiliary_phys; | |
1120 | ||
1121 | /* Handle block mark swapping. */ | |
1122 | block_mark_swapping(this, | |
1123 | (void *) payload_virt, (void *) auxiliary_virt); | |
1124 | } else { | |
1125 | /* | |
1126 | * If control arrives here, we're not doing block mark swapping, | |
1127 | * so we can to try and use the caller's buffers. | |
1128 | */ | |
1129 | ret = send_page_prepare(this, | |
1130 | buf, mtd->writesize, | |
1131 | this->payload_virt, this->payload_phys, | |
1132 | nfc_geo->payload_size, | |
1133 | &payload_virt, &payload_phys); | |
1134 | if (ret) { | |
1135 | pr_err("Inadequate payload DMA buffer\n"); | |
fdbad98d | 1136 | return 0; |
10a2bcae HS |
1137 | } |
1138 | ||
1139 | ret = send_page_prepare(this, | |
1140 | chip->oob_poi, mtd->oobsize, | |
1141 | this->auxiliary_virt, this->auxiliary_phys, | |
1142 | nfc_geo->auxiliary_size, | |
1143 | &auxiliary_virt, &auxiliary_phys); | |
1144 | if (ret) { | |
1145 | pr_err("Inadequate auxiliary DMA buffer\n"); | |
1146 | goto exit_auxiliary; | |
1147 | } | |
1148 | } | |
1149 | ||
1150 | /* Ask the NFC. */ | |
1151 | ret = gpmi_send_page(this, payload_phys, auxiliary_phys); | |
1152 | if (ret) | |
1153 | pr_err("Error in ECC-based write: %d\n", ret); | |
1154 | ||
1155 | if (!this->swap_block_mark) { | |
1156 | send_page_end(this, chip->oob_poi, mtd->oobsize, | |
1157 | this->auxiliary_virt, this->auxiliary_phys, | |
1158 | nfc_geo->auxiliary_size, | |
1159 | auxiliary_virt, auxiliary_phys); | |
1160 | exit_auxiliary: | |
1161 | send_page_end(this, buf, mtd->writesize, | |
1162 | this->payload_virt, this->payload_phys, | |
1163 | nfc_geo->payload_size, | |
1164 | payload_virt, payload_phys); | |
1165 | } | |
fdbad98d JW |
1166 | |
1167 | return 0; | |
10a2bcae HS |
1168 | } |
1169 | ||
1170 | /* | |
1171 | * There are several places in this driver where we have to handle the OOB and | |
1172 | * block marks. This is the function where things are the most complicated, so | |
1173 | * this is where we try to explain it all. All the other places refer back to | |
1174 | * here. | |
1175 | * | |
1176 | * These are the rules, in order of decreasing importance: | |
1177 | * | |
1178 | * 1) Nothing the caller does can be allowed to imperil the block mark. | |
1179 | * | |
1180 | * 2) In read operations, the first byte of the OOB we return must reflect the | |
1181 | * true state of the block mark, no matter where that block mark appears in | |
1182 | * the physical page. | |
1183 | * | |
1184 | * 3) ECC-based read operations return an OOB full of set bits (since we never | |
1185 | * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads | |
1186 | * return). | |
1187 | * | |
1188 | * 4) "Raw" read operations return a direct view of the physical bytes in the | |
1189 | * page, using the conventional definition of which bytes are data and which | |
1190 | * are OOB. This gives the caller a way to see the actual, physical bytes | |
1191 | * in the page, without the distortions applied by our ECC engine. | |
1192 | * | |
1193 | * | |
1194 | * What we do for this specific read operation depends on two questions: | |
1195 | * | |
1196 | * 1) Are we doing a "raw" read, or an ECC-based read? | |
1197 | * | |
1198 | * 2) Are we using block mark swapping or transcription? | |
1199 | * | |
1200 | * There are four cases, illustrated by the following Karnaugh map: | |
1201 | * | |
1202 | * | Raw | ECC-based | | |
1203 | * -------------+-------------------------+-------------------------+ | |
1204 | * | Read the conventional | | | |
1205 | * | OOB at the end of the | | | |
1206 | * Swapping | page and return it. It | | | |
1207 | * | contains exactly what | | | |
1208 | * | we want. | Read the block mark and | | |
1209 | * -------------+-------------------------+ return it in a buffer | | |
1210 | * | Read the conventional | full of set bits. | | |
1211 | * | OOB at the end of the | | | |
1212 | * | page and also the block | | | |
1213 | * Transcribing | mark in the metadata. | | | |
1214 | * | Copy the block mark | | | |
1215 | * | into the first byte of | | | |
1216 | * | the OOB. | | | |
1217 | * -------------+-------------------------+-------------------------+ | |
1218 | * | |
1219 | * Note that we break rule #4 in the Transcribing/Raw case because we're not | |
1220 | * giving an accurate view of the actual, physical bytes in the page (we're | |
1221 | * overwriting the block mark). That's OK because it's more important to follow | |
1222 | * rule #2. | |
1223 | * | |
1224 | * It turns out that knowing whether we want an "ECC-based" or "raw" read is not | |
1225 | * easy. When reading a page, for example, the NAND Flash MTD code calls our | |
1226 | * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an | |
1227 | * ECC-based or raw view of the page is implicit in which function it calls | |
1228 | * (there is a similar pair of ECC-based/raw functions for writing). | |
1229 | * | |
271b874b BN |
1230 | * FIXME: The following paragraph is incorrect, now that there exist |
1231 | * ecc.read_oob_raw and ecc.write_oob_raw functions. | |
1232 | * | |
10a2bcae HS |
1233 | * Since MTD assumes the OOB is not covered by ECC, there is no pair of |
1234 | * ECC-based/raw functions for reading or or writing the OOB. The fact that the | |
1235 | * caller wants an ECC-based or raw view of the page is not propagated down to | |
1236 | * this driver. | |
1237 | */ | |
1238 | static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip, | |
5c2ffb11 | 1239 | int page) |
10a2bcae HS |
1240 | { |
1241 | struct gpmi_nand_data *this = chip->priv; | |
1242 | ||
1243 | pr_debug("page number is %d\n", page); | |
1244 | /* clear the OOB buffer */ | |
1245 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
1246 | ||
1247 | /* Read out the conventional OOB. */ | |
1248 | chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); | |
1249 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); | |
1250 | ||
1251 | /* | |
1252 | * Now, we want to make sure the block mark is correct. In the | |
1253 | * Swapping/Raw case, we already have it. Otherwise, we need to | |
1254 | * explicitly read it. | |
1255 | */ | |
1256 | if (!this->swap_block_mark) { | |
1257 | /* Read the block mark into the first byte of the OOB buffer. */ | |
1258 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); | |
1259 | chip->oob_poi[0] = chip->read_byte(mtd); | |
1260 | } | |
1261 | ||
5c2ffb11 | 1262 | return 0; |
10a2bcae HS |
1263 | } |
1264 | ||
1265 | static int | |
1266 | gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page) | |
1267 | { | |
7a2b89ac HS |
1268 | struct nand_oobfree *of = mtd->ecclayout->oobfree; |
1269 | int status = 0; | |
1270 | ||
1271 | /* Do we have available oob area? */ | |
1272 | if (!of->length) | |
1273 | return -EPERM; | |
1274 | ||
1275 | if (!nand_is_slc(chip)) | |
1276 | return -EPERM; | |
1277 | ||
1278 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + of->offset, page); | |
1279 | chip->write_buf(mtd, chip->oob_poi + of->offset, of->length); | |
1280 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); | |
1281 | ||
1282 | status = chip->waitfunc(mtd, chip); | |
1283 | return status & NAND_STATUS_FAIL ? -EIO : 0; | |
10a2bcae HS |
1284 | } |
1285 | ||
1286 | static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
1287 | { | |
1288 | struct nand_chip *chip = mtd->priv; | |
1289 | struct gpmi_nand_data *this = chip->priv; | |
5a0edb25 | 1290 | int ret = 0; |
10a2bcae HS |
1291 | uint8_t *block_mark; |
1292 | int column, page, status, chipnr; | |
1293 | ||
5a0edb25 BN |
1294 | chipnr = (int)(ofs >> chip->chip_shift); |
1295 | chip->select_chip(mtd, chipnr); | |
10a2bcae | 1296 | |
5a0edb25 | 1297 | column = this->swap_block_mark ? mtd->writesize : 0; |
10a2bcae | 1298 | |
5a0edb25 BN |
1299 | /* Write the block mark. */ |
1300 | block_mark = this->data_buffer_dma; | |
1301 | block_mark[0] = 0; /* bad block marker */ | |
10a2bcae | 1302 | |
5a0edb25 BN |
1303 | /* Shift to get page */ |
1304 | page = (int)(ofs >> chip->page_shift); | |
10a2bcae | 1305 | |
5a0edb25 BN |
1306 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page); |
1307 | chip->write_buf(mtd, block_mark, 1); | |
1308 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); | |
10a2bcae | 1309 | |
5a0edb25 BN |
1310 | status = chip->waitfunc(mtd, chip); |
1311 | if (status & NAND_STATUS_FAIL) | |
1312 | ret = -EIO; | |
10a2bcae | 1313 | |
5a0edb25 | 1314 | chip->select_chip(mtd, -1); |
10a2bcae HS |
1315 | |
1316 | return ret; | |
1317 | } | |
1318 | ||
a78da287 | 1319 | static int nand_boot_set_geometry(struct gpmi_nand_data *this) |
10a2bcae HS |
1320 | { |
1321 | struct boot_rom_geometry *geometry = &this->rom_geometry; | |
1322 | ||
1323 | /* | |
1324 | * Set the boot block stride size. | |
1325 | * | |
1326 | * In principle, we should be reading this from the OTP bits, since | |
1327 | * that's where the ROM is going to get it. In fact, we don't have any | |
1328 | * way to read the OTP bits, so we go with the default and hope for the | |
1329 | * best. | |
1330 | */ | |
1331 | geometry->stride_size_in_pages = 64; | |
1332 | ||
1333 | /* | |
1334 | * Set the search area stride exponent. | |
1335 | * | |
1336 | * In principle, we should be reading this from the OTP bits, since | |
1337 | * that's where the ROM is going to get it. In fact, we don't have any | |
1338 | * way to read the OTP bits, so we go with the default and hope for the | |
1339 | * best. | |
1340 | */ | |
1341 | geometry->search_area_stride_exponent = 2; | |
1342 | return 0; | |
1343 | } | |
1344 | ||
1345 | static const char *fingerprint = "STMP"; | |
a78da287 | 1346 | static int mx23_check_transcription_stamp(struct gpmi_nand_data *this) |
10a2bcae HS |
1347 | { |
1348 | struct boot_rom_geometry *rom_geo = &this->rom_geometry; | |
1349 | struct device *dev = this->dev; | |
1350 | struct mtd_info *mtd = &this->mtd; | |
1351 | struct nand_chip *chip = &this->nand; | |
1352 | unsigned int search_area_size_in_strides; | |
1353 | unsigned int stride; | |
1354 | unsigned int page; | |
10a2bcae HS |
1355 | uint8_t *buffer = chip->buffers->databuf; |
1356 | int saved_chip_number; | |
1357 | int found_an_ncb_fingerprint = false; | |
1358 | ||
1359 | /* Compute the number of strides in a search area. */ | |
1360 | search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; | |
1361 | ||
1362 | saved_chip_number = this->current_chip; | |
1363 | chip->select_chip(mtd, 0); | |
1364 | ||
1365 | /* | |
1366 | * Loop through the first search area, looking for the NCB fingerprint. | |
1367 | */ | |
1368 | dev_dbg(dev, "Scanning for an NCB fingerprint...\n"); | |
1369 | ||
1370 | for (stride = 0; stride < search_area_size_in_strides; stride++) { | |
513d57e1 | 1371 | /* Compute the page addresses. */ |
10a2bcae | 1372 | page = stride * rom_geo->stride_size_in_pages; |
10a2bcae HS |
1373 | |
1374 | dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page); | |
1375 | ||
1376 | /* | |
1377 | * Read the NCB fingerprint. The fingerprint is four bytes long | |
1378 | * and starts in the 12th byte of the page. | |
1379 | */ | |
1380 | chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page); | |
1381 | chip->read_buf(mtd, buffer, strlen(fingerprint)); | |
1382 | ||
1383 | /* Look for the fingerprint. */ | |
1384 | if (!memcmp(buffer, fingerprint, strlen(fingerprint))) { | |
1385 | found_an_ncb_fingerprint = true; | |
1386 | break; | |
1387 | } | |
1388 | ||
1389 | } | |
1390 | ||
1391 | chip->select_chip(mtd, saved_chip_number); | |
1392 | ||
1393 | if (found_an_ncb_fingerprint) | |
1394 | dev_dbg(dev, "\tFound a fingerprint\n"); | |
1395 | else | |
1396 | dev_dbg(dev, "\tNo fingerprint found\n"); | |
1397 | return found_an_ncb_fingerprint; | |
1398 | } | |
1399 | ||
1400 | /* Writes a transcription stamp. */ | |
a78da287 | 1401 | static int mx23_write_transcription_stamp(struct gpmi_nand_data *this) |
10a2bcae HS |
1402 | { |
1403 | struct device *dev = this->dev; | |
1404 | struct boot_rom_geometry *rom_geo = &this->rom_geometry; | |
1405 | struct mtd_info *mtd = &this->mtd; | |
1406 | struct nand_chip *chip = &this->nand; | |
1407 | unsigned int block_size_in_pages; | |
1408 | unsigned int search_area_size_in_strides; | |
1409 | unsigned int search_area_size_in_pages; | |
1410 | unsigned int search_area_size_in_blocks; | |
1411 | unsigned int block; | |
1412 | unsigned int stride; | |
1413 | unsigned int page; | |
10a2bcae HS |
1414 | uint8_t *buffer = chip->buffers->databuf; |
1415 | int saved_chip_number; | |
1416 | int status; | |
1417 | ||
1418 | /* Compute the search area geometry. */ | |
1419 | block_size_in_pages = mtd->erasesize / mtd->writesize; | |
1420 | search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; | |
1421 | search_area_size_in_pages = search_area_size_in_strides * | |
1422 | rom_geo->stride_size_in_pages; | |
1423 | search_area_size_in_blocks = | |
1424 | (search_area_size_in_pages + (block_size_in_pages - 1)) / | |
1425 | block_size_in_pages; | |
1426 | ||
1427 | dev_dbg(dev, "Search Area Geometry :\n"); | |
1428 | dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks); | |
1429 | dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides); | |
1430 | dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages); | |
1431 | ||
1432 | /* Select chip 0. */ | |
1433 | saved_chip_number = this->current_chip; | |
1434 | chip->select_chip(mtd, 0); | |
1435 | ||
1436 | /* Loop over blocks in the first search area, erasing them. */ | |
1437 | dev_dbg(dev, "Erasing the search area...\n"); | |
1438 | ||
1439 | for (block = 0; block < search_area_size_in_blocks; block++) { | |
1440 | /* Compute the page address. */ | |
1441 | page = block * block_size_in_pages; | |
1442 | ||
1443 | /* Erase this block. */ | |
1444 | dev_dbg(dev, "\tErasing block 0x%x\n", block); | |
1445 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); | |
1446 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); | |
1447 | ||
1448 | /* Wait for the erase to finish. */ | |
1449 | status = chip->waitfunc(mtd, chip); | |
1450 | if (status & NAND_STATUS_FAIL) | |
1451 | dev_err(dev, "[%s] Erase failed.\n", __func__); | |
1452 | } | |
1453 | ||
1454 | /* Write the NCB fingerprint into the page buffer. */ | |
1455 | memset(buffer, ~0, mtd->writesize); | |
1456 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
1457 | memcpy(buffer + 12, fingerprint, strlen(fingerprint)); | |
1458 | ||
1459 | /* Loop through the first search area, writing NCB fingerprints. */ | |
1460 | dev_dbg(dev, "Writing NCB fingerprints...\n"); | |
1461 | for (stride = 0; stride < search_area_size_in_strides; stride++) { | |
513d57e1 | 1462 | /* Compute the page addresses. */ |
10a2bcae | 1463 | page = stride * rom_geo->stride_size_in_pages; |
10a2bcae HS |
1464 | |
1465 | /* Write the first page of the current stride. */ | |
1466 | dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page); | |
1467 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); | |
1fbb938d | 1468 | chip->ecc.write_page_raw(mtd, chip, buffer, 0); |
10a2bcae HS |
1469 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
1470 | ||
1471 | /* Wait for the write to finish. */ | |
1472 | status = chip->waitfunc(mtd, chip); | |
1473 | if (status & NAND_STATUS_FAIL) | |
1474 | dev_err(dev, "[%s] Write failed.\n", __func__); | |
1475 | } | |
1476 | ||
1477 | /* Deselect chip 0. */ | |
1478 | chip->select_chip(mtd, saved_chip_number); | |
1479 | return 0; | |
1480 | } | |
1481 | ||
a78da287 | 1482 | static int mx23_boot_init(struct gpmi_nand_data *this) |
10a2bcae HS |
1483 | { |
1484 | struct device *dev = this->dev; | |
1485 | struct nand_chip *chip = &this->nand; | |
1486 | struct mtd_info *mtd = &this->mtd; | |
1487 | unsigned int block_count; | |
1488 | unsigned int block; | |
1489 | int chipnr; | |
1490 | int page; | |
1491 | loff_t byte; | |
1492 | uint8_t block_mark; | |
1493 | int ret = 0; | |
1494 | ||
1495 | /* | |
1496 | * If control arrives here, we can't use block mark swapping, which | |
1497 | * means we're forced to use transcription. First, scan for the | |
1498 | * transcription stamp. If we find it, then we don't have to do | |
1499 | * anything -- the block marks are already transcribed. | |
1500 | */ | |
1501 | if (mx23_check_transcription_stamp(this)) | |
1502 | return 0; | |
1503 | ||
1504 | /* | |
1505 | * If control arrives here, we couldn't find a transcription stamp, so | |
1506 | * so we presume the block marks are in the conventional location. | |
1507 | */ | |
1508 | dev_dbg(dev, "Transcribing bad block marks...\n"); | |
1509 | ||
1510 | /* Compute the number of blocks in the entire medium. */ | |
1511 | block_count = chip->chipsize >> chip->phys_erase_shift; | |
1512 | ||
1513 | /* | |
1514 | * Loop over all the blocks in the medium, transcribing block marks as | |
1515 | * we go. | |
1516 | */ | |
1517 | for (block = 0; block < block_count; block++) { | |
1518 | /* | |
1519 | * Compute the chip, page and byte addresses for this block's | |
1520 | * conventional mark. | |
1521 | */ | |
1522 | chipnr = block >> (chip->chip_shift - chip->phys_erase_shift); | |
1523 | page = block << (chip->phys_erase_shift - chip->page_shift); | |
1524 | byte = block << chip->phys_erase_shift; | |
1525 | ||
1526 | /* Send the command to read the conventional block mark. */ | |
1527 | chip->select_chip(mtd, chipnr); | |
1528 | chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); | |
1529 | block_mark = chip->read_byte(mtd); | |
1530 | chip->select_chip(mtd, -1); | |
1531 | ||
1532 | /* | |
1533 | * Check if the block is marked bad. If so, we need to mark it | |
1534 | * again, but this time the result will be a mark in the | |
1535 | * location where we transcribe block marks. | |
1536 | */ | |
1537 | if (block_mark != 0xff) { | |
1538 | dev_dbg(dev, "Transcribing mark in block %u\n", block); | |
1539 | ret = chip->block_markbad(mtd, byte); | |
1540 | if (ret) | |
1541 | dev_err(dev, "Failed to mark block bad with " | |
1542 | "ret %d\n", ret); | |
1543 | } | |
1544 | } | |
1545 | ||
1546 | /* Write the stamp that indicates we've transcribed the block marks. */ | |
1547 | mx23_write_transcription_stamp(this); | |
1548 | return 0; | |
1549 | } | |
1550 | ||
a78da287 | 1551 | static int nand_boot_init(struct gpmi_nand_data *this) |
10a2bcae HS |
1552 | { |
1553 | nand_boot_set_geometry(this); | |
1554 | ||
1555 | /* This is ROM arch-specific initilization before the BBT scanning. */ | |
1556 | if (GPMI_IS_MX23(this)) | |
1557 | return mx23_boot_init(this); | |
1558 | return 0; | |
1559 | } | |
1560 | ||
a78da287 | 1561 | static int gpmi_set_geometry(struct gpmi_nand_data *this) |
10a2bcae HS |
1562 | { |
1563 | int ret; | |
1564 | ||
1565 | /* Free the temporary DMA memory for reading ID. */ | |
1566 | gpmi_free_dma_buffer(this); | |
1567 | ||
1568 | /* Set up the NFC geometry which is used by BCH. */ | |
1569 | ret = bch_set_geometry(this); | |
1570 | if (ret) { | |
2d350e5a | 1571 | pr_err("Error setting BCH geometry : %d\n", ret); |
10a2bcae HS |
1572 | return ret; |
1573 | } | |
1574 | ||
1575 | /* Alloc the new DMA buffers according to the pagesize and oobsize */ | |
1576 | return gpmi_alloc_dma_buffer(this); | |
1577 | } | |
1578 | ||
1579 | static int gpmi_pre_bbt_scan(struct gpmi_nand_data *this) | |
1580 | { | |
10a2bcae HS |
1581 | /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */ |
1582 | if (GPMI_IS_MX23(this)) | |
1583 | this->swap_block_mark = false; | |
1584 | else | |
1585 | this->swap_block_mark = true; | |
1586 | ||
1587 | /* Set up the medium geometry */ | |
885d71e5 | 1588 | return gpmi_set_geometry(this); |
10a2bcae | 1589 | |
10a2bcae HS |
1590 | } |
1591 | ||
f720e7ce HS |
1592 | static void gpmi_nfc_exit(struct gpmi_nand_data *this) |
1593 | { | |
1594 | nand_release(&this->mtd); | |
1595 | gpmi_free_dma_buffer(this); | |
1596 | } | |
1597 | ||
1598 | static int gpmi_init_last(struct gpmi_nand_data *this) | |
10a2bcae | 1599 | { |
f720e7ce | 1600 | struct mtd_info *mtd = &this->mtd; |
10a2bcae | 1601 | struct nand_chip *chip = mtd->priv; |
f720e7ce HS |
1602 | struct nand_ecc_ctrl *ecc = &chip->ecc; |
1603 | struct bch_geometry *bch_geo = &this->bch_geometry; | |
10a2bcae HS |
1604 | int ret; |
1605 | ||
1606 | /* Prepare for the BBT scan. */ | |
1607 | ret = gpmi_pre_bbt_scan(this); | |
1608 | if (ret) | |
1609 | return ret; | |
1610 | ||
f720e7ce HS |
1611 | /* Init the nand_ecc_ctrl{} */ |
1612 | ecc->read_page = gpmi_ecc_read_page; | |
1613 | ecc->write_page = gpmi_ecc_write_page; | |
1614 | ecc->read_oob = gpmi_ecc_read_oob; | |
1615 | ecc->write_oob = gpmi_ecc_write_oob; | |
1616 | ecc->mode = NAND_ECC_HW; | |
1617 | ecc->size = bch_geo->ecc_chunk_size; | |
1618 | ecc->strength = bch_geo->ecc_strength; | |
1619 | ecc->layout = &gpmi_hw_ecclayout; | |
1620 | ||
995fbbf5 HS |
1621 | /* |
1622 | * Can we enable the extra features? such as EDO or Sync mode. | |
1623 | * | |
1624 | * We do not check the return value now. That's means if we fail in | |
1625 | * enable the extra features, we still can run in the normal way. | |
1626 | */ | |
1627 | gpmi_extra_init(this); | |
1628 | ||
f720e7ce | 1629 | return 0; |
10a2bcae HS |
1630 | } |
1631 | ||
06f25510 | 1632 | static int gpmi_nfc_init(struct gpmi_nand_data *this) |
10a2bcae | 1633 | { |
10a2bcae HS |
1634 | struct mtd_info *mtd = &this->mtd; |
1635 | struct nand_chip *chip = &this->nand; | |
e10db1f0 | 1636 | struct mtd_part_parser_data ppdata = {}; |
10a2bcae HS |
1637 | int ret; |
1638 | ||
1639 | /* init current chip */ | |
1640 | this->current_chip = -1; | |
1641 | ||
1642 | /* init the MTD data structures */ | |
1643 | mtd->priv = chip; | |
1644 | mtd->name = "gpmi-nand"; | |
1645 | mtd->owner = THIS_MODULE; | |
1646 | ||
1647 | /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */ | |
1648 | chip->priv = this; | |
1649 | chip->select_chip = gpmi_select_chip; | |
1650 | chip->cmd_ctrl = gpmi_cmd_ctrl; | |
1651 | chip->dev_ready = gpmi_dev_ready; | |
1652 | chip->read_byte = gpmi_read_byte; | |
1653 | chip->read_buf = gpmi_read_buf; | |
1654 | chip->write_buf = gpmi_write_buf; | |
10a2bcae HS |
1655 | chip->badblock_pattern = &gpmi_bbt_descr; |
1656 | chip->block_markbad = gpmi_block_markbad; | |
1657 | chip->options |= NAND_NO_SUBPAGE_WRITE; | |
c50c6940 HS |
1658 | if (of_get_nand_on_flash_bbt(this->dev->of_node)) |
1659 | chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; | |
10a2bcae | 1660 | |
f720e7ce HS |
1661 | /* |
1662 | * Allocate a temporary DMA buffer for reading ID in the | |
1663 | * nand_scan_ident(). | |
1664 | */ | |
10a2bcae HS |
1665 | this->bch_geometry.payload_size = 1024; |
1666 | this->bch_geometry.auxiliary_size = 128; | |
1667 | ret = gpmi_alloc_dma_buffer(this); | |
1668 | if (ret) | |
1669 | goto err_out; | |
1670 | ||
80bd33ac | 1671 | ret = nand_scan_ident(mtd, GPMI_IS_MX6Q(this) ? 2 : 1, NULL); |
f720e7ce HS |
1672 | if (ret) |
1673 | goto err_out; | |
1674 | ||
1675 | ret = gpmi_init_last(this); | |
1676 | if (ret) | |
1677 | goto err_out; | |
1678 | ||
885d71e5 | 1679 | chip->options |= NAND_SKIP_BBTSCAN; |
f720e7ce HS |
1680 | ret = nand_scan_tail(mtd); |
1681 | if (ret) | |
10a2bcae | 1682 | goto err_out; |
10a2bcae | 1683 | |
885d71e5 HS |
1684 | ret = nand_boot_init(this); |
1685 | if (ret) | |
1686 | goto err_out; | |
1687 | chip->scan_bbt(mtd); | |
1688 | ||
e10db1f0 HS |
1689 | ppdata.of_node = this->pdev->dev.of_node; |
1690 | ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0); | |
10a2bcae HS |
1691 | if (ret) |
1692 | goto err_out; | |
1693 | return 0; | |
1694 | ||
1695 | err_out: | |
1696 | gpmi_nfc_exit(this); | |
1697 | return ret; | |
1698 | } | |
1699 | ||
e10db1f0 HS |
1700 | static const struct platform_device_id gpmi_ids[] = { |
1701 | { .name = "imx23-gpmi-nand", .driver_data = IS_MX23, }, | |
1702 | { .name = "imx28-gpmi-nand", .driver_data = IS_MX28, }, | |
9013bb40 | 1703 | { .name = "imx6q-gpmi-nand", .driver_data = IS_MX6Q, }, |
d41f950e | 1704 | {} |
e10db1f0 HS |
1705 | }; |
1706 | ||
1707 | static const struct of_device_id gpmi_nand_id_table[] = { | |
1708 | { | |
1709 | .compatible = "fsl,imx23-gpmi-nand", | |
d41f950e | 1710 | .data = (void *)&gpmi_ids[IS_MX23], |
e10db1f0 HS |
1711 | }, { |
1712 | .compatible = "fsl,imx28-gpmi-nand", | |
d41f950e | 1713 | .data = (void *)&gpmi_ids[IS_MX28], |
9013bb40 HS |
1714 | }, { |
1715 | .compatible = "fsl,imx6q-gpmi-nand", | |
d41f950e | 1716 | .data = (void *)&gpmi_ids[IS_MX6Q], |
e10db1f0 HS |
1717 | }, {} |
1718 | }; | |
1719 | MODULE_DEVICE_TABLE(of, gpmi_nand_id_table); | |
1720 | ||
06f25510 | 1721 | static int gpmi_nand_probe(struct platform_device *pdev) |
10a2bcae | 1722 | { |
10a2bcae | 1723 | struct gpmi_nand_data *this; |
e10db1f0 | 1724 | const struct of_device_id *of_id; |
10a2bcae HS |
1725 | int ret; |
1726 | ||
e10db1f0 HS |
1727 | of_id = of_match_device(gpmi_nand_id_table, &pdev->dev); |
1728 | if (of_id) { | |
1729 | pdev->id_entry = of_id->data; | |
1730 | } else { | |
1731 | pr_err("Failed to find the right device id.\n"); | |
52a073bd | 1732 | return -ENODEV; |
e10db1f0 HS |
1733 | } |
1734 | ||
edaf4d4a | 1735 | this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL); |
10a2bcae HS |
1736 | if (!this) { |
1737 | pr_err("Failed to allocate per-device memory\n"); | |
1738 | return -ENOMEM; | |
1739 | } | |
1740 | ||
1741 | platform_set_drvdata(pdev, this); | |
1742 | this->pdev = pdev; | |
1743 | this->dev = &pdev->dev; | |
10a2bcae HS |
1744 | |
1745 | ret = acquire_resources(this); | |
1746 | if (ret) | |
1747 | goto exit_acquire_resources; | |
1748 | ||
1749 | ret = init_hardware(this); | |
1750 | if (ret) | |
1751 | goto exit_nfc_init; | |
1752 | ||
1753 | ret = gpmi_nfc_init(this); | |
1754 | if (ret) | |
1755 | goto exit_nfc_init; | |
1756 | ||
490e280a FE |
1757 | dev_info(this->dev, "driver registered.\n"); |
1758 | ||
10a2bcae HS |
1759 | return 0; |
1760 | ||
1761 | exit_nfc_init: | |
1762 | release_resources(this); | |
10a2bcae | 1763 | exit_acquire_resources: |
490e280a FE |
1764 | dev_err(this->dev, "driver registration failed: %d\n", ret); |
1765 | ||
10a2bcae HS |
1766 | return ret; |
1767 | } | |
1768 | ||
810b7e06 | 1769 | static int gpmi_nand_remove(struct platform_device *pdev) |
10a2bcae HS |
1770 | { |
1771 | struct gpmi_nand_data *this = platform_get_drvdata(pdev); | |
1772 | ||
1773 | gpmi_nfc_exit(this); | |
1774 | release_resources(this); | |
10a2bcae HS |
1775 | return 0; |
1776 | } | |
1777 | ||
10a2bcae HS |
1778 | static struct platform_driver gpmi_nand_driver = { |
1779 | .driver = { | |
1780 | .name = "gpmi-nand", | |
e10db1f0 | 1781 | .of_match_table = gpmi_nand_id_table, |
10a2bcae HS |
1782 | }, |
1783 | .probe = gpmi_nand_probe, | |
5153b88c | 1784 | .remove = gpmi_nand_remove, |
10a2bcae HS |
1785 | .id_table = gpmi_ids, |
1786 | }; | |
490e280a | 1787 | module_platform_driver(gpmi_nand_driver); |
10a2bcae HS |
1788 | |
1789 | MODULE_AUTHOR("Freescale Semiconductor, Inc."); | |
1790 | MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver"); | |
1791 | MODULE_LICENSE("GPL"); |