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mtd: gpmi: do not use the local array to do the DMA transfer
[mirror_ubuntu-artful-kernel.git] / drivers / mtd / nand / gpmi-nand / gpmi-nand.c
CommitLineData
10a2bcae
HS
1/*
2 * Freescale GPMI NAND Flash Driver
3 *
4 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * Copyright (C) 2008 Embedded Alley Solutions, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
3d10095a
FE
21
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
10a2bcae
HS
24#include <linux/clk.h>
25#include <linux/slab.h>
26#include <linux/interrupt.h>
df16c86a 27#include <linux/module.h>
10a2bcae 28#include <linux/mtd/partitions.h>
e10db1f0
HS
29#include <linux/of.h>
30#include <linux/of_device.h>
c50c6940 31#include <linux/of_mtd.h>
10a2bcae
HS
32#include "gpmi-nand.h"
33
5de0b52e
HS
34/* Resource names for the GPMI NAND driver. */
35#define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
36#define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch"
37#define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch"
5de0b52e 38
10a2bcae
HS
39/* add our owner bbt descriptor */
40static uint8_t scan_ff_pattern[] = { 0xff };
41static struct nand_bbt_descr gpmi_bbt_descr = {
42 .options = 0,
43 .offs = 0,
44 .len = 1,
45 .pattern = scan_ff_pattern
46};
47
7a2b89ac
HS
48/*
49 * We may change the layout if we can get the ECC info from the datasheet,
50 * else we will use all the (page + OOB).
51 */
10a2bcae
HS
52static struct nand_ecclayout gpmi_hw_ecclayout = {
53 .eccbytes = 0,
54 .eccpos = { 0, },
55 .oobfree = { {.offset = 0, .length = 0} }
56};
57
58static irqreturn_t bch_irq(int irq, void *cookie)
59{
60 struct gpmi_nand_data *this = cookie;
61
62 gpmi_clear_bch(this);
63 complete(&this->bch_done);
64 return IRQ_HANDLED;
65}
66
67/*
68 * Calculate the ECC strength by hand:
69 * E : The ECC strength.
70 * G : the length of Galois Field.
71 * N : The chunk count of per page.
72 * O : the oobsize of the NAND chip.
73 * M : the metasize of per page.
74 *
75 * The formula is :
76 * E * G * N
77 * ------------ <= (O - M)
78 * 8
79 *
80 * So, we get E by:
81 * (O - M) * 8
82 * E <= -------------
83 * G * N
84 */
85static inline int get_ecc_strength(struct gpmi_nand_data *this)
86{
87 struct bch_geometry *geo = &this->bch_geometry;
88 struct mtd_info *mtd = &this->mtd;
89 int ecc_strength;
90
91 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
92 / (geo->gf_len * geo->ecc_chunk_count);
93
94 /* We need the minor even number. */
95 return round_down(ecc_strength, 2);
96}
97
92d0e09a
HS
98static inline bool gpmi_check_ecc(struct gpmi_nand_data *this)
99{
100 struct bch_geometry *geo = &this->bch_geometry;
101
102 /* Do the sanity check. */
103 if (GPMI_IS_MX23(this) || GPMI_IS_MX28(this)) {
104 /* The mx23/mx28 only support the GF13. */
105 if (geo->gf_len == 14)
106 return false;
107
108 if (geo->ecc_strength > MXS_ECC_STRENGTH_MAX)
109 return false;
110 } else if (GPMI_IS_MX6Q(this)) {
111 if (geo->ecc_strength > MX6_ECC_STRENGTH_MAX)
112 return false;
113 }
114 return true;
115}
116
2febcdf8
HS
117/*
118 * If we can get the ECC information from the nand chip, we do not
119 * need to calculate them ourselves.
120 *
121 * We may have available oob space in this case.
122 */
123static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this)
124{
125 struct bch_geometry *geo = &this->bch_geometry;
126 struct mtd_info *mtd = &this->mtd;
127 struct nand_chip *chip = mtd->priv;
128 struct nand_oobfree *of = gpmi_hw_ecclayout.oobfree;
129 unsigned int block_mark_bit_offset;
130
131 if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
132 return false;
133
134 switch (chip->ecc_step_ds) {
135 case SZ_512:
136 geo->gf_len = 13;
137 break;
138 case SZ_1K:
139 geo->gf_len = 14;
140 break;
141 default:
142 dev_err(this->dev,
143 "unsupported nand chip. ecc bits : %d, ecc size : %d\n",
144 chip->ecc_strength_ds, chip->ecc_step_ds);
145 return false;
146 }
147 geo->ecc_chunk_size = chip->ecc_step_ds;
148 geo->ecc_strength = round_up(chip->ecc_strength_ds, 2);
149 if (!gpmi_check_ecc(this))
150 return false;
151
152 /* Keep the C >= O */
153 if (geo->ecc_chunk_size < mtd->oobsize) {
154 dev_err(this->dev,
155 "unsupported nand chip. ecc size: %d, oob size : %d\n",
156 chip->ecc_step_ds, mtd->oobsize);
157 return false;
158 }
159
160 /* The default value, see comment in the legacy_set_geometry(). */
161 geo->metadata_size = 10;
162
163 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
164
165 /*
166 * Now, the NAND chip with 2K page(data chunk is 512byte) shows below:
167 *
168 * | P |
169 * |<----------------------------------------------------->|
170 * | |
171 * | (Block Mark) |
172 * | P' | | | |
173 * |<-------------------------------------------->| D | | O' |
174 * | |<---->| |<--->|
175 * V V V V V
176 * +---+----------+-+----------+-+----------+-+----------+-+-----+
177 * | M | data |E| data |E| data |E| data |E| |
178 * +---+----------+-+----------+-+----------+-+----------+-+-----+
179 * ^ ^
180 * | O |
181 * |<------------>|
182 * | |
183 *
184 * P : the page size for BCH module.
185 * E : The ECC strength.
186 * G : the length of Galois Field.
187 * N : The chunk count of per page.
188 * M : the metasize of per page.
189 * C : the ecc chunk size, aka the "data" above.
190 * P': the nand chip's page size.
191 * O : the nand chip's oob size.
192 * O': the free oob.
193 *
194 * The formula for P is :
195 *
196 * E * G * N
197 * P = ------------ + P' + M
198 * 8
199 *
200 * The position of block mark moves forward in the ECC-based view
201 * of page, and the delta is:
202 *
203 * E * G * (N - 1)
204 * D = (---------------- + M)
205 * 8
206 *
207 * Please see the comment in legacy_set_geometry().
208 * With the condition C >= O , we still can get same result.
209 * So the bit position of the physical block mark within the ECC-based
210 * view of the page is :
211 * (P' - D) * 8
212 */
213 geo->page_size = mtd->writesize + geo->metadata_size +
214 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8;
215
216 /* The available oob size we have. */
217 if (geo->page_size < mtd->writesize + mtd->oobsize) {
218 of->offset = geo->page_size - mtd->writesize;
219 of->length = mtd->oobsize - of->offset;
2febcdf8
HS
220 }
221
222 geo->payload_size = mtd->writesize;
223
224 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4);
225 geo->auxiliary_size = ALIGN(geo->metadata_size, 4)
226 + ALIGN(geo->ecc_chunk_count, 4);
227
228 if (!this->swap_block_mark)
229 return true;
230
231 /* For bit swap. */
232 block_mark_bit_offset = mtd->writesize * 8 -
233 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
234 + geo->metadata_size * 8);
235
236 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
237 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
238 return true;
239}
240
241static int legacy_set_geometry(struct gpmi_nand_data *this)
10a2bcae
HS
242{
243 struct bch_geometry *geo = &this->bch_geometry;
244 struct mtd_info *mtd = &this->mtd;
245 unsigned int metadata_size;
246 unsigned int status_size;
247 unsigned int block_mark_bit_offset;
248
249 /*
250 * The size of the metadata can be changed, though we set it to 10
251 * bytes now. But it can't be too large, because we have to save
252 * enough space for BCH.
253 */
254 geo->metadata_size = 10;
255
256 /* The default for the length of Galois Field. */
257 geo->gf_len = 13;
258
9ff16f08 259 /* The default for chunk size. */
10a2bcae 260 geo->ecc_chunk_size = 512;
9ff16f08 261 while (geo->ecc_chunk_size < mtd->oobsize) {
10a2bcae 262 geo->ecc_chunk_size *= 2; /* keep C >= O */
9ff16f08
HS
263 geo->gf_len = 14;
264 }
10a2bcae
HS
265
266 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
267
268 /* We use the same ECC strength for all chunks. */
269 geo->ecc_strength = get_ecc_strength(this);
92d0e09a
HS
270 if (!gpmi_check_ecc(this)) {
271 dev_err(this->dev,
272 "We can not support this nand chip."
273 " Its required ecc strength(%d) is beyond our"
274 " capability(%d).\n", geo->ecc_strength,
275 (GPMI_IS_MX6Q(this) ? MX6_ECC_STRENGTH_MAX
276 : MXS_ECC_STRENGTH_MAX));
10a2bcae
HS
277 return -EINVAL;
278 }
279
280 geo->page_size = mtd->writesize + mtd->oobsize;
281 geo->payload_size = mtd->writesize;
282
283 /*
284 * The auxiliary buffer contains the metadata and the ECC status. The
285 * metadata is padded to the nearest 32-bit boundary. The ECC status
286 * contains one byte for every ECC chunk, and is also padded to the
287 * nearest 32-bit boundary.
288 */
289 metadata_size = ALIGN(geo->metadata_size, 4);
290 status_size = ALIGN(geo->ecc_chunk_count, 4);
291
292 geo->auxiliary_size = metadata_size + status_size;
293 geo->auxiliary_status_offset = metadata_size;
294
295 if (!this->swap_block_mark)
296 return 0;
297
298 /*
299 * We need to compute the byte and bit offsets of
300 * the physical block mark within the ECC-based view of the page.
301 *
302 * NAND chip with 2K page shows below:
303 * (Block Mark)
304 * | |
305 * | D |
306 * |<---->|
307 * V V
308 * +---+----------+-+----------+-+----------+-+----------+-+
309 * | M | data |E| data |E| data |E| data |E|
310 * +---+----------+-+----------+-+----------+-+----------+-+
311 *
312 * The position of block mark moves forward in the ECC-based view
313 * of page, and the delta is:
314 *
315 * E * G * (N - 1)
316 * D = (---------------- + M)
317 * 8
318 *
319 * With the formula to compute the ECC strength, and the condition
320 * : C >= O (C is the ecc chunk size)
321 *
322 * It's easy to deduce to the following result:
323 *
324 * E * G (O - M) C - M C - M
325 * ----------- <= ------- <= -------- < ---------
326 * 8 N N (N - 1)
327 *
328 * So, we get:
329 *
330 * E * G * (N - 1)
331 * D = (---------------- + M) < C
332 * 8
333 *
334 * The above inequality means the position of block mark
335 * within the ECC-based view of the page is still in the data chunk,
336 * and it's NOT in the ECC bits of the chunk.
337 *
338 * Use the following to compute the bit position of the
339 * physical block mark within the ECC-based view of the page:
340 * (page_size - D) * 8
341 *
342 * --Huang Shijie
343 */
344 block_mark_bit_offset = mtd->writesize * 8 -
345 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
346 + geo->metadata_size * 8);
347
348 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
349 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
350 return 0;
351}
352
2febcdf8
HS
353int common_nfc_set_geometry(struct gpmi_nand_data *this)
354{
89b59e6c
HS
355 if (of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")
356 && set_geometry_by_ecc_info(this))
357 return 0;
031e2777 358 return legacy_set_geometry(this);
2febcdf8
HS
359}
360
10a2bcae
HS
361struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
362{
a7c12d01
HS
363 /* We use the DMA channel 0 to access all the nand chips. */
364 return this->dma_chans[0];
10a2bcae
HS
365}
366
367/* Can we use the upper's buffer directly for DMA? */
368void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr)
369{
370 struct scatterlist *sgl = &this->data_sgl;
371 int ret;
372
373 this->direct_dma_map_ok = true;
374
375 /* first try to map the upper buffer directly */
376 sg_init_one(sgl, this->upper_buf, this->upper_len);
377 ret = dma_map_sg(this->dev, sgl, 1, dr);
378 if (ret == 0) {
379 /* We have to use our own DMA buffer. */
380 sg_init_one(sgl, this->data_buffer_dma, PAGE_SIZE);
381
382 if (dr == DMA_TO_DEVICE)
383 memcpy(this->data_buffer_dma, this->upper_buf,
384 this->upper_len);
385
386 ret = dma_map_sg(this->dev, sgl, 1, dr);
387 if (ret == 0)
2d350e5a 388 pr_err("DMA mapping failed.\n");
10a2bcae
HS
389
390 this->direct_dma_map_ok = false;
391 }
392}
393
394/* This will be called after the DMA operation is finished. */
395static void dma_irq_callback(void *param)
396{
397 struct gpmi_nand_data *this = param;
398 struct completion *dma_c = &this->dma_done;
399
10a2bcae
HS
400 switch (this->dma_type) {
401 case DMA_FOR_COMMAND:
402 dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE);
403 break;
404
405 case DMA_FOR_READ_DATA:
406 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE);
407 if (this->direct_dma_map_ok == false)
408 memcpy(this->upper_buf, this->data_buffer_dma,
409 this->upper_len);
410 break;
411
412 case DMA_FOR_WRITE_DATA:
413 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE);
414 break;
415
416 case DMA_FOR_READ_ECC_PAGE:
417 case DMA_FOR_WRITE_ECC_PAGE:
418 /* We have to wait the BCH interrupt to finish. */
419 break;
420
421 default:
422 pr_err("in wrong DMA operation.\n");
423 }
7b3d2fb9
HS
424
425 complete(dma_c);
10a2bcae
HS
426}
427
428int start_dma_without_bch_irq(struct gpmi_nand_data *this,
429 struct dma_async_tx_descriptor *desc)
430{
431 struct completion *dma_c = &this->dma_done;
432 int err;
433
434 init_completion(dma_c);
435
436 desc->callback = dma_irq_callback;
437 desc->callback_param = this;
438 dmaengine_submit(desc);
d04525ed 439 dma_async_issue_pending(get_dma_chan(this));
10a2bcae
HS
440
441 /* Wait for the interrupt from the DMA block. */
442 err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
443 if (!err) {
444 pr_err("DMA timeout, last DMA :%d\n", this->last_dma_type);
445 gpmi_dump_info(this);
446 return -ETIMEDOUT;
447 }
448 return 0;
449}
450
451/*
452 * This function is used in BCH reading or BCH writing pages.
453 * It will wait for the BCH interrupt as long as ONE second.
454 * Actually, we must wait for two interrupts :
455 * [1] firstly the DMA interrupt and
456 * [2] secondly the BCH interrupt.
457 */
458int start_dma_with_bch_irq(struct gpmi_nand_data *this,
459 struct dma_async_tx_descriptor *desc)
460{
461 struct completion *bch_c = &this->bch_done;
462 int err;
463
464 /* Prepare to receive an interrupt from the BCH block. */
465 init_completion(bch_c);
466
467 /* start the DMA */
468 start_dma_without_bch_irq(this, desc);
469
470 /* Wait for the interrupt from the BCH block. */
471 err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000));
472 if (!err) {
473 pr_err("BCH timeout, last DMA :%d\n", this->last_dma_type);
474 gpmi_dump_info(this);
475 return -ETIMEDOUT;
476 }
477 return 0;
478}
479
d8929942
GKH
480static int acquire_register_block(struct gpmi_nand_data *this,
481 const char *res_name)
10a2bcae
HS
482{
483 struct platform_device *pdev = this->pdev;
484 struct resources *res = &this->resources;
485 struct resource *r;
513d57e1 486 void __iomem *p;
10a2bcae
HS
487
488 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
489 if (!r) {
490 pr_err("Can't get resource for %s\n", res_name);
52a073bd 491 return -ENODEV;
10a2bcae
HS
492 }
493
494 p = ioremap(r->start, resource_size(r));
495 if (!p) {
496 pr_err("Can't remap %s\n", res_name);
497 return -ENOMEM;
498 }
499
500 if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME))
501 res->gpmi_regs = p;
502 else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME))
503 res->bch_regs = p;
504 else
505 pr_err("unknown resource name : %s\n", res_name);
506
507 return 0;
508}
509
510static void release_register_block(struct gpmi_nand_data *this)
511{
512 struct resources *res = &this->resources;
513 if (res->gpmi_regs)
514 iounmap(res->gpmi_regs);
515 if (res->bch_regs)
516 iounmap(res->bch_regs);
517 res->gpmi_regs = NULL;
518 res->bch_regs = NULL;
519}
520
d8929942 521static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h)
10a2bcae
HS
522{
523 struct platform_device *pdev = this->pdev;
524 struct resources *res = &this->resources;
525 const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME;
526 struct resource *r;
527 int err;
528
529 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
530 if (!r) {
531 pr_err("Can't get resource for %s\n", res_name);
52a073bd 532 return -ENODEV;
10a2bcae
HS
533 }
534
535 err = request_irq(r->start, irq_h, 0, res_name, this);
536 if (err) {
537 pr_err("Can't own %s\n", res_name);
538 return err;
539 }
540
541 res->bch_low_interrupt = r->start;
542 res->bch_high_interrupt = r->end;
543 return 0;
544}
545
546static void release_bch_irq(struct gpmi_nand_data *this)
547{
548 struct resources *res = &this->resources;
549 int i = res->bch_low_interrupt;
550
551 for (; i <= res->bch_high_interrupt; i++)
552 free_irq(i, this);
553}
554
10a2bcae
HS
555static void release_dma_channels(struct gpmi_nand_data *this)
556{
557 unsigned int i;
558 for (i = 0; i < DMA_CHANS; i++)
559 if (this->dma_chans[i]) {
560 dma_release_channel(this->dma_chans[i]);
561 this->dma_chans[i] = NULL;
562 }
563}
564
06f25510 565static int acquire_dma_channels(struct gpmi_nand_data *this)
10a2bcae
HS
566{
567 struct platform_device *pdev = this->pdev;
e10db1f0 568 struct dma_chan *dma_chan;
10a2bcae 569
e10db1f0 570 /* request dma channel */
5fac0e18 571 dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx");
e10db1f0 572 if (!dma_chan) {
2d350e5a 573 pr_err("Failed to request DMA channel.\n");
e10db1f0 574 goto acquire_err;
10a2bcae
HS
575 }
576
e10db1f0 577 this->dma_chans[0] = dma_chan;
10a2bcae
HS
578 return 0;
579
580acquire_err:
10a2bcae
HS
581 release_dma_channels(this);
582 return -EINVAL;
583}
584
ff506172
HS
585static char *extra_clks_for_mx6q[GPMI_CLK_MAX] = {
586 "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch",
587};
588
06f25510 589static int gpmi_get_clks(struct gpmi_nand_data *this)
ff506172
HS
590{
591 struct resources *r = &this->resources;
592 char **extra_clks = NULL;
593 struct clk *clk;
d1cb556c 594 int err, i;
ff506172
HS
595
596 /* The main clock is stored in the first. */
554cbc50 597 r->clock[0] = devm_clk_get(this->dev, "gpmi_io");
d1cb556c
MM
598 if (IS_ERR(r->clock[0])) {
599 err = PTR_ERR(r->clock[0]);
ff506172 600 goto err_clock;
d1cb556c 601 }
ff506172
HS
602
603 /* Get extra clocks */
604 if (GPMI_IS_MX6Q(this))
605 extra_clks = extra_clks_for_mx6q;
606 if (!extra_clks)
607 return 0;
608
609 for (i = 1; i < GPMI_CLK_MAX; i++) {
610 if (extra_clks[i - 1] == NULL)
611 break;
612
554cbc50 613 clk = devm_clk_get(this->dev, extra_clks[i - 1]);
d1cb556c
MM
614 if (IS_ERR(clk)) {
615 err = PTR_ERR(clk);
ff506172 616 goto err_clock;
d1cb556c 617 }
ff506172
HS
618
619 r->clock[i] = clk;
620 }
621
e1ca95e3 622 if (GPMI_IS_MX6Q(this))
ff506172 623 /*
e1ca95e3 624 * Set the default value for the gpmi clock in mx6q:
ff506172 625 *
e1ca95e3
HS
626 * If you want to use the ONFI nand which is in the
627 * Synchronous Mode, you should change the clock as you need.
ff506172
HS
628 */
629 clk_set_rate(r->clock[0], 22000000);
e1ca95e3 630
ff506172
HS
631 return 0;
632
633err_clock:
634 dev_dbg(this->dev, "failed in finding the clocks.\n");
d1cb556c 635 return err;
ff506172
HS
636}
637
06f25510 638static int acquire_resources(struct gpmi_nand_data *this)
10a2bcae 639{
10a2bcae
HS
640 int ret;
641
642 ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);
643 if (ret)
644 goto exit_regs;
645
646 ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME);
647 if (ret)
648 goto exit_regs;
649
650 ret = acquire_bch_irq(this, bch_irq);
651 if (ret)
652 goto exit_regs;
653
654 ret = acquire_dma_channels(this);
655 if (ret)
656 goto exit_dma_channels;
657
ff506172
HS
658 ret = gpmi_get_clks(this);
659 if (ret)
10a2bcae 660 goto exit_clock;
10a2bcae
HS
661 return 0;
662
663exit_clock:
664 release_dma_channels(this);
665exit_dma_channels:
666 release_bch_irq(this);
667exit_regs:
668 release_register_block(this);
669 return ret;
670}
671
672static void release_resources(struct gpmi_nand_data *this)
673{
10a2bcae
HS
674 release_register_block(this);
675 release_bch_irq(this);
676 release_dma_channels(this);
677}
678
06f25510 679static int init_hardware(struct gpmi_nand_data *this)
10a2bcae
HS
680{
681 int ret;
682
683 /*
684 * This structure contains the "safe" GPMI timing that should succeed
685 * with any NAND Flash device
686 * (although, with less-than-optimal performance).
687 */
688 struct nand_timing safe_timing = {
689 .data_setup_in_ns = 80,
690 .data_hold_in_ns = 60,
691 .address_setup_in_ns = 25,
692 .gpmi_sample_delay_in_ns = 6,
693 .tREA_in_ns = -1,
694 .tRLOH_in_ns = -1,
695 .tRHOH_in_ns = -1,
696 };
697
698 /* Initialize the hardwares. */
699 ret = gpmi_init(this);
700 if (ret)
701 return ret;
702
703 this->timing = safe_timing;
704 return 0;
705}
706
707static int read_page_prepare(struct gpmi_nand_data *this,
708 void *destination, unsigned length,
709 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
710 void **use_virt, dma_addr_t *use_phys)
711{
712 struct device *dev = this->dev;
713
714 if (virt_addr_valid(destination)) {
715 dma_addr_t dest_phys;
716
717 dest_phys = dma_map_single(dev, destination,
718 length, DMA_FROM_DEVICE);
719 if (dma_mapping_error(dev, dest_phys)) {
720 if (alt_size < length) {
2d350e5a
VN
721 pr_err("%s, Alternate buffer is too small\n",
722 __func__);
10a2bcae
HS
723 return -ENOMEM;
724 }
725 goto map_failed;
726 }
727 *use_virt = destination;
728 *use_phys = dest_phys;
729 this->direct_dma_map_ok = true;
730 return 0;
731 }
732
733map_failed:
734 *use_virt = alt_virt;
735 *use_phys = alt_phys;
736 this->direct_dma_map_ok = false;
737 return 0;
738}
739
740static inline void read_page_end(struct gpmi_nand_data *this,
741 void *destination, unsigned length,
742 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
743 void *used_virt, dma_addr_t used_phys)
744{
745 if (this->direct_dma_map_ok)
746 dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
747}
748
749static inline void read_page_swap_end(struct gpmi_nand_data *this,
750 void *destination, unsigned length,
751 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
752 void *used_virt, dma_addr_t used_phys)
753{
754 if (!this->direct_dma_map_ok)
755 memcpy(destination, alt_virt, length);
756}
757
758static int send_page_prepare(struct gpmi_nand_data *this,
759 const void *source, unsigned length,
760 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
761 const void **use_virt, dma_addr_t *use_phys)
762{
763 struct device *dev = this->dev;
764
765 if (virt_addr_valid(source)) {
766 dma_addr_t source_phys;
767
768 source_phys = dma_map_single(dev, (void *)source, length,
769 DMA_TO_DEVICE);
770 if (dma_mapping_error(dev, source_phys)) {
771 if (alt_size < length) {
2d350e5a
VN
772 pr_err("%s, Alternate buffer is too small\n",
773 __func__);
10a2bcae
HS
774 return -ENOMEM;
775 }
776 goto map_failed;
777 }
778 *use_virt = source;
779 *use_phys = source_phys;
780 return 0;
781 }
782map_failed:
783 /*
784 * Copy the content of the source buffer into the alternate
785 * buffer and set up the return values accordingly.
786 */
787 memcpy(alt_virt, source, length);
788
789 *use_virt = alt_virt;
790 *use_phys = alt_phys;
791 return 0;
792}
793
794static void send_page_end(struct gpmi_nand_data *this,
795 const void *source, unsigned length,
796 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
797 const void *used_virt, dma_addr_t used_phys)
798{
799 struct device *dev = this->dev;
800 if (used_virt == source)
801 dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
802}
803
804static void gpmi_free_dma_buffer(struct gpmi_nand_data *this)
805{
806 struct device *dev = this->dev;
807
808 if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt))
809 dma_free_coherent(dev, this->page_buffer_size,
810 this->page_buffer_virt,
811 this->page_buffer_phys);
812 kfree(this->cmd_buffer);
813 kfree(this->data_buffer_dma);
814
815 this->cmd_buffer = NULL;
816 this->data_buffer_dma = NULL;
817 this->page_buffer_virt = NULL;
818 this->page_buffer_size = 0;
819}
820
821/* Allocate the DMA buffers */
822static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
823{
824 struct bch_geometry *geo = &this->bch_geometry;
825 struct device *dev = this->dev;
826
827 /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
513d57e1 828 this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL);
10a2bcae
HS
829 if (this->cmd_buffer == NULL)
830 goto error_alloc;
831
832 /* [2] Allocate a read/write data buffer. PAGE_SIZE is enough. */
513d57e1 833 this->data_buffer_dma = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL);
10a2bcae
HS
834 if (this->data_buffer_dma == NULL)
835 goto error_alloc;
836
837 /*
838 * [3] Allocate the page buffer.
839 *
840 * Both the payload buffer and the auxiliary buffer must appear on
841 * 32-bit boundaries. We presume the size of the payload buffer is a
842 * power of two and is much larger than four, which guarantees the
843 * auxiliary buffer will appear on a 32-bit boundary.
844 */
845 this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
846 this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
847 &this->page_buffer_phys, GFP_DMA);
848 if (!this->page_buffer_virt)
849 goto error_alloc;
850
851
852 /* Slice up the page buffer. */
853 this->payload_virt = this->page_buffer_virt;
854 this->payload_phys = this->page_buffer_phys;
855 this->auxiliary_virt = this->payload_virt + geo->payload_size;
856 this->auxiliary_phys = this->payload_phys + geo->payload_size;
857 return 0;
858
859error_alloc:
860 gpmi_free_dma_buffer(this);
2d350e5a 861 pr_err("Error allocating DMA buffers!\n");
10a2bcae
HS
862 return -ENOMEM;
863}
864
865static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
866{
867 struct nand_chip *chip = mtd->priv;
868 struct gpmi_nand_data *this = chip->priv;
869 int ret;
870
871 /*
872 * Every operation begins with a command byte and a series of zero or
873 * more address bytes. These are distinguished by either the Address
874 * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
875 * asserted. When MTD is ready to execute the command, it will deassert
876 * both latch enables.
877 *
878 * Rather than run a separate DMA operation for every single byte, we
879 * queue them up and run a single DMA operation for the entire series
880 * of command and data bytes. NAND_CMD_NONE means the END of the queue.
881 */
882 if ((ctrl & (NAND_ALE | NAND_CLE))) {
883 if (data != NAND_CMD_NONE)
884 this->cmd_buffer[this->command_length++] = data;
885 return;
886 }
887
888 if (!this->command_length)
889 return;
890
891 ret = gpmi_send_command(this);
892 if (ret)
893 pr_err("Chip: %u, Error %d\n", this->current_chip, ret);
894
895 this->command_length = 0;
896}
897
898static int gpmi_dev_ready(struct mtd_info *mtd)
899{
900 struct nand_chip *chip = mtd->priv;
901 struct gpmi_nand_data *this = chip->priv;
902
903 return gpmi_is_ready(this, this->current_chip);
904}
905
906static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
907{
908 struct nand_chip *chip = mtd->priv;
909 struct gpmi_nand_data *this = chip->priv;
910
911 if ((this->current_chip < 0) && (chipnr >= 0))
912 gpmi_begin(this);
913 else if ((this->current_chip >= 0) && (chipnr < 0))
914 gpmi_end(this);
915
916 this->current_chip = chipnr;
917}
918
919static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
920{
921 struct nand_chip *chip = mtd->priv;
922 struct gpmi_nand_data *this = chip->priv;
923
924 pr_debug("len is %d\n", len);
925 this->upper_buf = buf;
926 this->upper_len = len;
927
928 gpmi_read_data(this);
929}
930
931static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
932{
933 struct nand_chip *chip = mtd->priv;
934 struct gpmi_nand_data *this = chip->priv;
935
936 pr_debug("len is %d\n", len);
937 this->upper_buf = (uint8_t *)buf;
938 this->upper_len = len;
939
940 gpmi_send_data(this);
941}
942
943static uint8_t gpmi_read_byte(struct mtd_info *mtd)
944{
945 struct nand_chip *chip = mtd->priv;
946 struct gpmi_nand_data *this = chip->priv;
947 uint8_t *buf = this->data_buffer_dma;
948
949 gpmi_read_buf(mtd, buf, 1);
950 return buf[0];
951}
952
953/*
954 * Handles block mark swapping.
955 * It can be called in swapping the block mark, or swapping it back,
956 * because the the operations are the same.
957 */
958static void block_mark_swapping(struct gpmi_nand_data *this,
959 void *payload, void *auxiliary)
960{
961 struct bch_geometry *nfc_geo = &this->bch_geometry;
962 unsigned char *p;
963 unsigned char *a;
964 unsigned int bit;
965 unsigned char mask;
966 unsigned char from_data;
967 unsigned char from_oob;
968
969 if (!this->swap_block_mark)
970 return;
971
972 /*
973 * If control arrives here, we're swapping. Make some convenience
974 * variables.
975 */
976 bit = nfc_geo->block_mark_bit_offset;
977 p = payload + nfc_geo->block_mark_byte_offset;
978 a = auxiliary;
979
980 /*
981 * Get the byte from the data area that overlays the block mark. Since
982 * the ECC engine applies its own view to the bits in the page, the
983 * physical block mark won't (in general) appear on a byte boundary in
984 * the data.
985 */
986 from_data = (p[0] >> bit) | (p[1] << (8 - bit));
987
988 /* Get the byte from the OOB. */
989 from_oob = a[0];
990
991 /* Swap them. */
992 a[0] = from_data;
993
994 mask = (0x1 << bit) - 1;
995 p[0] = (p[0] & mask) | (from_oob << bit);
996
997 mask = ~0 << bit;
998 p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
999}
1000
1001static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
1fbb938d 1002 uint8_t *buf, int oob_required, int page)
10a2bcae
HS
1003{
1004 struct gpmi_nand_data *this = chip->priv;
1005 struct bch_geometry *nfc_geo = &this->bch_geometry;
1006 void *payload_virt;
1007 dma_addr_t payload_phys;
1008 void *auxiliary_virt;
1009 dma_addr_t auxiliary_phys;
1010 unsigned int i;
1011 unsigned char *status;
b23b746c 1012 unsigned int max_bitflips = 0;
10a2bcae
HS
1013 int ret;
1014
1015 pr_debug("page number is : %d\n", page);
1016 ret = read_page_prepare(this, buf, mtd->writesize,
1017 this->payload_virt, this->payload_phys,
1018 nfc_geo->payload_size,
1019 &payload_virt, &payload_phys);
1020 if (ret) {
1021 pr_err("Inadequate DMA buffer\n");
1022 ret = -ENOMEM;
1023 return ret;
1024 }
1025 auxiliary_virt = this->auxiliary_virt;
1026 auxiliary_phys = this->auxiliary_phys;
1027
1028 /* go! */
1029 ret = gpmi_read_page(this, payload_phys, auxiliary_phys);
1030 read_page_end(this, buf, mtd->writesize,
1031 this->payload_virt, this->payload_phys,
1032 nfc_geo->payload_size,
1033 payload_virt, payload_phys);
1034 if (ret) {
1035 pr_err("Error in ECC-based read: %d\n", ret);
b23b746c 1036 return ret;
10a2bcae
HS
1037 }
1038
1039 /* handle the block mark swapping */
1040 block_mark_swapping(this, payload_virt, auxiliary_virt);
1041
1042 /* Loop over status bytes, accumulating ECC status. */
b23b746c 1043 status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
10a2bcae
HS
1044
1045 for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
1046 if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
1047 continue;
1048
1049 if (*status == STATUS_UNCORRECTABLE) {
b23b746c 1050 mtd->ecc_stats.failed++;
10a2bcae
HS
1051 continue;
1052 }
b23b746c
ZS
1053 mtd->ecc_stats.corrected += *status;
1054 max_bitflips = max_t(unsigned int, max_bitflips, *status);
10a2bcae
HS
1055 }
1056
7725cc85
BN
1057 if (oob_required) {
1058 /*
1059 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob()
1060 * for details about our policy for delivering the OOB.
1061 *
1062 * We fill the caller's buffer with set bits, and then copy the
1063 * block mark to th caller's buffer. Note that, if block mark
1064 * swapping was necessary, it has already been done, so we can
1065 * rely on the first byte of the auxiliary buffer to contain
1066 * the block mark.
1067 */
1068 memset(chip->oob_poi, ~0, mtd->oobsize);
1069 chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
7725cc85 1070 }
6023813a
SH
1071
1072 read_page_swap_end(this, buf, mtd->writesize,
1073 this->payload_virt, this->payload_phys,
1074 nfc_geo->payload_size,
1075 payload_virt, payload_phys);
b23b746c
ZS
1076
1077 return max_bitflips;
10a2bcae
HS
1078}
1079
fdbad98d 1080static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
1fbb938d 1081 const uint8_t *buf, int oob_required)
10a2bcae
HS
1082{
1083 struct gpmi_nand_data *this = chip->priv;
1084 struct bch_geometry *nfc_geo = &this->bch_geometry;
1085 const void *payload_virt;
1086 dma_addr_t payload_phys;
1087 const void *auxiliary_virt;
1088 dma_addr_t auxiliary_phys;
1089 int ret;
1090
1091 pr_debug("ecc write page.\n");
1092 if (this->swap_block_mark) {
1093 /*
1094 * If control arrives here, we're doing block mark swapping.
1095 * Since we can't modify the caller's buffers, we must copy them
1096 * into our own.
1097 */
1098 memcpy(this->payload_virt, buf, mtd->writesize);
1099 payload_virt = this->payload_virt;
1100 payload_phys = this->payload_phys;
1101
1102 memcpy(this->auxiliary_virt, chip->oob_poi,
1103 nfc_geo->auxiliary_size);
1104 auxiliary_virt = this->auxiliary_virt;
1105 auxiliary_phys = this->auxiliary_phys;
1106
1107 /* Handle block mark swapping. */
1108 block_mark_swapping(this,
1109 (void *) payload_virt, (void *) auxiliary_virt);
1110 } else {
1111 /*
1112 * If control arrives here, we're not doing block mark swapping,
1113 * so we can to try and use the caller's buffers.
1114 */
1115 ret = send_page_prepare(this,
1116 buf, mtd->writesize,
1117 this->payload_virt, this->payload_phys,
1118 nfc_geo->payload_size,
1119 &payload_virt, &payload_phys);
1120 if (ret) {
1121 pr_err("Inadequate payload DMA buffer\n");
fdbad98d 1122 return 0;
10a2bcae
HS
1123 }
1124
1125 ret = send_page_prepare(this,
1126 chip->oob_poi, mtd->oobsize,
1127 this->auxiliary_virt, this->auxiliary_phys,
1128 nfc_geo->auxiliary_size,
1129 &auxiliary_virt, &auxiliary_phys);
1130 if (ret) {
1131 pr_err("Inadequate auxiliary DMA buffer\n");
1132 goto exit_auxiliary;
1133 }
1134 }
1135
1136 /* Ask the NFC. */
1137 ret = gpmi_send_page(this, payload_phys, auxiliary_phys);
1138 if (ret)
1139 pr_err("Error in ECC-based write: %d\n", ret);
1140
1141 if (!this->swap_block_mark) {
1142 send_page_end(this, chip->oob_poi, mtd->oobsize,
1143 this->auxiliary_virt, this->auxiliary_phys,
1144 nfc_geo->auxiliary_size,
1145 auxiliary_virt, auxiliary_phys);
1146exit_auxiliary:
1147 send_page_end(this, buf, mtd->writesize,
1148 this->payload_virt, this->payload_phys,
1149 nfc_geo->payload_size,
1150 payload_virt, payload_phys);
1151 }
fdbad98d
JW
1152
1153 return 0;
10a2bcae
HS
1154}
1155
1156/*
1157 * There are several places in this driver where we have to handle the OOB and
1158 * block marks. This is the function where things are the most complicated, so
1159 * this is where we try to explain it all. All the other places refer back to
1160 * here.
1161 *
1162 * These are the rules, in order of decreasing importance:
1163 *
1164 * 1) Nothing the caller does can be allowed to imperil the block mark.
1165 *
1166 * 2) In read operations, the first byte of the OOB we return must reflect the
1167 * true state of the block mark, no matter where that block mark appears in
1168 * the physical page.
1169 *
1170 * 3) ECC-based read operations return an OOB full of set bits (since we never
1171 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1172 * return).
1173 *
1174 * 4) "Raw" read operations return a direct view of the physical bytes in the
1175 * page, using the conventional definition of which bytes are data and which
1176 * are OOB. This gives the caller a way to see the actual, physical bytes
1177 * in the page, without the distortions applied by our ECC engine.
1178 *
1179 *
1180 * What we do for this specific read operation depends on two questions:
1181 *
1182 * 1) Are we doing a "raw" read, or an ECC-based read?
1183 *
1184 * 2) Are we using block mark swapping or transcription?
1185 *
1186 * There are four cases, illustrated by the following Karnaugh map:
1187 *
1188 * | Raw | ECC-based |
1189 * -------------+-------------------------+-------------------------+
1190 * | Read the conventional | |
1191 * | OOB at the end of the | |
1192 * Swapping | page and return it. It | |
1193 * | contains exactly what | |
1194 * | we want. | Read the block mark and |
1195 * -------------+-------------------------+ return it in a buffer |
1196 * | Read the conventional | full of set bits. |
1197 * | OOB at the end of the | |
1198 * | page and also the block | |
1199 * Transcribing | mark in the metadata. | |
1200 * | Copy the block mark | |
1201 * | into the first byte of | |
1202 * | the OOB. | |
1203 * -------------+-------------------------+-------------------------+
1204 *
1205 * Note that we break rule #4 in the Transcribing/Raw case because we're not
1206 * giving an accurate view of the actual, physical bytes in the page (we're
1207 * overwriting the block mark). That's OK because it's more important to follow
1208 * rule #2.
1209 *
1210 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1211 * easy. When reading a page, for example, the NAND Flash MTD code calls our
1212 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
1213 * ECC-based or raw view of the page is implicit in which function it calls
1214 * (there is a similar pair of ECC-based/raw functions for writing).
1215 *
271b874b
BN
1216 * FIXME: The following paragraph is incorrect, now that there exist
1217 * ecc.read_oob_raw and ecc.write_oob_raw functions.
1218 *
10a2bcae
HS
1219 * Since MTD assumes the OOB is not covered by ECC, there is no pair of
1220 * ECC-based/raw functions for reading or or writing the OOB. The fact that the
1221 * caller wants an ECC-based or raw view of the page is not propagated down to
1222 * this driver.
1223 */
1224static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
5c2ffb11 1225 int page)
10a2bcae
HS
1226{
1227 struct gpmi_nand_data *this = chip->priv;
1228
1229 pr_debug("page number is %d\n", page);
1230 /* clear the OOB buffer */
1231 memset(chip->oob_poi, ~0, mtd->oobsize);
1232
1233 /* Read out the conventional OOB. */
1234 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1235 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1236
1237 /*
1238 * Now, we want to make sure the block mark is correct. In the
1239 * Swapping/Raw case, we already have it. Otherwise, we need to
1240 * explicitly read it.
1241 */
1242 if (!this->swap_block_mark) {
1243 /* Read the block mark into the first byte of the OOB buffer. */
1244 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1245 chip->oob_poi[0] = chip->read_byte(mtd);
1246 }
1247
5c2ffb11 1248 return 0;
10a2bcae
HS
1249}
1250
1251static int
1252gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
1253{
7a2b89ac
HS
1254 struct nand_oobfree *of = mtd->ecclayout->oobfree;
1255 int status = 0;
1256
1257 /* Do we have available oob area? */
1258 if (!of->length)
1259 return -EPERM;
1260
1261 if (!nand_is_slc(chip))
1262 return -EPERM;
1263
1264 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + of->offset, page);
1265 chip->write_buf(mtd, chip->oob_poi + of->offset, of->length);
1266 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1267
1268 status = chip->waitfunc(mtd, chip);
1269 return status & NAND_STATUS_FAIL ? -EIO : 0;
10a2bcae
HS
1270}
1271
1272static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
1273{
1274 struct nand_chip *chip = mtd->priv;
1275 struct gpmi_nand_data *this = chip->priv;
5a0edb25 1276 int ret = 0;
10a2bcae
HS
1277 uint8_t *block_mark;
1278 int column, page, status, chipnr;
1279
5a0edb25
BN
1280 chipnr = (int)(ofs >> chip->chip_shift);
1281 chip->select_chip(mtd, chipnr);
10a2bcae 1282
5a0edb25 1283 column = this->swap_block_mark ? mtd->writesize : 0;
10a2bcae 1284
5a0edb25
BN
1285 /* Write the block mark. */
1286 block_mark = this->data_buffer_dma;
1287 block_mark[0] = 0; /* bad block marker */
10a2bcae 1288
5a0edb25
BN
1289 /* Shift to get page */
1290 page = (int)(ofs >> chip->page_shift);
10a2bcae 1291
5a0edb25
BN
1292 chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page);
1293 chip->write_buf(mtd, block_mark, 1);
1294 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
10a2bcae 1295
5a0edb25
BN
1296 status = chip->waitfunc(mtd, chip);
1297 if (status & NAND_STATUS_FAIL)
1298 ret = -EIO;
10a2bcae 1299
5a0edb25 1300 chip->select_chip(mtd, -1);
10a2bcae
HS
1301
1302 return ret;
1303}
1304
a78da287 1305static int nand_boot_set_geometry(struct gpmi_nand_data *this)
10a2bcae
HS
1306{
1307 struct boot_rom_geometry *geometry = &this->rom_geometry;
1308
1309 /*
1310 * Set the boot block stride size.
1311 *
1312 * In principle, we should be reading this from the OTP bits, since
1313 * that's where the ROM is going to get it. In fact, we don't have any
1314 * way to read the OTP bits, so we go with the default and hope for the
1315 * best.
1316 */
1317 geometry->stride_size_in_pages = 64;
1318
1319 /*
1320 * Set the search area stride exponent.
1321 *
1322 * In principle, we should be reading this from the OTP bits, since
1323 * that's where the ROM is going to get it. In fact, we don't have any
1324 * way to read the OTP bits, so we go with the default and hope for the
1325 * best.
1326 */
1327 geometry->search_area_stride_exponent = 2;
1328 return 0;
1329}
1330
1331static const char *fingerprint = "STMP";
a78da287 1332static int mx23_check_transcription_stamp(struct gpmi_nand_data *this)
10a2bcae
HS
1333{
1334 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1335 struct device *dev = this->dev;
1336 struct mtd_info *mtd = &this->mtd;
1337 struct nand_chip *chip = &this->nand;
1338 unsigned int search_area_size_in_strides;
1339 unsigned int stride;
1340 unsigned int page;
10a2bcae
HS
1341 uint8_t *buffer = chip->buffers->databuf;
1342 int saved_chip_number;
1343 int found_an_ncb_fingerprint = false;
1344
1345 /* Compute the number of strides in a search area. */
1346 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1347
1348 saved_chip_number = this->current_chip;
1349 chip->select_chip(mtd, 0);
1350
1351 /*
1352 * Loop through the first search area, looking for the NCB fingerprint.
1353 */
1354 dev_dbg(dev, "Scanning for an NCB fingerprint...\n");
1355
1356 for (stride = 0; stride < search_area_size_in_strides; stride++) {
513d57e1 1357 /* Compute the page addresses. */
10a2bcae 1358 page = stride * rom_geo->stride_size_in_pages;
10a2bcae
HS
1359
1360 dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page);
1361
1362 /*
1363 * Read the NCB fingerprint. The fingerprint is four bytes long
1364 * and starts in the 12th byte of the page.
1365 */
1366 chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page);
1367 chip->read_buf(mtd, buffer, strlen(fingerprint));
1368
1369 /* Look for the fingerprint. */
1370 if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
1371 found_an_ncb_fingerprint = true;
1372 break;
1373 }
1374
1375 }
1376
1377 chip->select_chip(mtd, saved_chip_number);
1378
1379 if (found_an_ncb_fingerprint)
1380 dev_dbg(dev, "\tFound a fingerprint\n");
1381 else
1382 dev_dbg(dev, "\tNo fingerprint found\n");
1383 return found_an_ncb_fingerprint;
1384}
1385
1386/* Writes a transcription stamp. */
a78da287 1387static int mx23_write_transcription_stamp(struct gpmi_nand_data *this)
10a2bcae
HS
1388{
1389 struct device *dev = this->dev;
1390 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1391 struct mtd_info *mtd = &this->mtd;
1392 struct nand_chip *chip = &this->nand;
1393 unsigned int block_size_in_pages;
1394 unsigned int search_area_size_in_strides;
1395 unsigned int search_area_size_in_pages;
1396 unsigned int search_area_size_in_blocks;
1397 unsigned int block;
1398 unsigned int stride;
1399 unsigned int page;
10a2bcae
HS
1400 uint8_t *buffer = chip->buffers->databuf;
1401 int saved_chip_number;
1402 int status;
1403
1404 /* Compute the search area geometry. */
1405 block_size_in_pages = mtd->erasesize / mtd->writesize;
1406 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1407 search_area_size_in_pages = search_area_size_in_strides *
1408 rom_geo->stride_size_in_pages;
1409 search_area_size_in_blocks =
1410 (search_area_size_in_pages + (block_size_in_pages - 1)) /
1411 block_size_in_pages;
1412
1413 dev_dbg(dev, "Search Area Geometry :\n");
1414 dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks);
1415 dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides);
1416 dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages);
1417
1418 /* Select chip 0. */
1419 saved_chip_number = this->current_chip;
1420 chip->select_chip(mtd, 0);
1421
1422 /* Loop over blocks in the first search area, erasing them. */
1423 dev_dbg(dev, "Erasing the search area...\n");
1424
1425 for (block = 0; block < search_area_size_in_blocks; block++) {
1426 /* Compute the page address. */
1427 page = block * block_size_in_pages;
1428
1429 /* Erase this block. */
1430 dev_dbg(dev, "\tErasing block 0x%x\n", block);
1431 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1432 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1433
1434 /* Wait for the erase to finish. */
1435 status = chip->waitfunc(mtd, chip);
1436 if (status & NAND_STATUS_FAIL)
1437 dev_err(dev, "[%s] Erase failed.\n", __func__);
1438 }
1439
1440 /* Write the NCB fingerprint into the page buffer. */
1441 memset(buffer, ~0, mtd->writesize);
1442 memset(chip->oob_poi, ~0, mtd->oobsize);
1443 memcpy(buffer + 12, fingerprint, strlen(fingerprint));
1444
1445 /* Loop through the first search area, writing NCB fingerprints. */
1446 dev_dbg(dev, "Writing NCB fingerprints...\n");
1447 for (stride = 0; stride < search_area_size_in_strides; stride++) {
513d57e1 1448 /* Compute the page addresses. */
10a2bcae 1449 page = stride * rom_geo->stride_size_in_pages;
10a2bcae
HS
1450
1451 /* Write the first page of the current stride. */
1452 dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);
1453 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
1fbb938d 1454 chip->ecc.write_page_raw(mtd, chip, buffer, 0);
10a2bcae
HS
1455 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1456
1457 /* Wait for the write to finish. */
1458 status = chip->waitfunc(mtd, chip);
1459 if (status & NAND_STATUS_FAIL)
1460 dev_err(dev, "[%s] Write failed.\n", __func__);
1461 }
1462
1463 /* Deselect chip 0. */
1464 chip->select_chip(mtd, saved_chip_number);
1465 return 0;
1466}
1467
a78da287 1468static int mx23_boot_init(struct gpmi_nand_data *this)
10a2bcae
HS
1469{
1470 struct device *dev = this->dev;
1471 struct nand_chip *chip = &this->nand;
1472 struct mtd_info *mtd = &this->mtd;
1473 unsigned int block_count;
1474 unsigned int block;
1475 int chipnr;
1476 int page;
1477 loff_t byte;
1478 uint8_t block_mark;
1479 int ret = 0;
1480
1481 /*
1482 * If control arrives here, we can't use block mark swapping, which
1483 * means we're forced to use transcription. First, scan for the
1484 * transcription stamp. If we find it, then we don't have to do
1485 * anything -- the block marks are already transcribed.
1486 */
1487 if (mx23_check_transcription_stamp(this))
1488 return 0;
1489
1490 /*
1491 * If control arrives here, we couldn't find a transcription stamp, so
1492 * so we presume the block marks are in the conventional location.
1493 */
1494 dev_dbg(dev, "Transcribing bad block marks...\n");
1495
1496 /* Compute the number of blocks in the entire medium. */
1497 block_count = chip->chipsize >> chip->phys_erase_shift;
1498
1499 /*
1500 * Loop over all the blocks in the medium, transcribing block marks as
1501 * we go.
1502 */
1503 for (block = 0; block < block_count; block++) {
1504 /*
1505 * Compute the chip, page and byte addresses for this block's
1506 * conventional mark.
1507 */
1508 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
1509 page = block << (chip->phys_erase_shift - chip->page_shift);
1510 byte = block << chip->phys_erase_shift;
1511
1512 /* Send the command to read the conventional block mark. */
1513 chip->select_chip(mtd, chipnr);
1514 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1515 block_mark = chip->read_byte(mtd);
1516 chip->select_chip(mtd, -1);
1517
1518 /*
1519 * Check if the block is marked bad. If so, we need to mark it
1520 * again, but this time the result will be a mark in the
1521 * location where we transcribe block marks.
1522 */
1523 if (block_mark != 0xff) {
1524 dev_dbg(dev, "Transcribing mark in block %u\n", block);
1525 ret = chip->block_markbad(mtd, byte);
1526 if (ret)
1527 dev_err(dev, "Failed to mark block bad with "
1528 "ret %d\n", ret);
1529 }
1530 }
1531
1532 /* Write the stamp that indicates we've transcribed the block marks. */
1533 mx23_write_transcription_stamp(this);
1534 return 0;
1535}
1536
a78da287 1537static int nand_boot_init(struct gpmi_nand_data *this)
10a2bcae
HS
1538{
1539 nand_boot_set_geometry(this);
1540
1541 /* This is ROM arch-specific initilization before the BBT scanning. */
1542 if (GPMI_IS_MX23(this))
1543 return mx23_boot_init(this);
1544 return 0;
1545}
1546
a78da287 1547static int gpmi_set_geometry(struct gpmi_nand_data *this)
10a2bcae
HS
1548{
1549 int ret;
1550
1551 /* Free the temporary DMA memory for reading ID. */
1552 gpmi_free_dma_buffer(this);
1553
1554 /* Set up the NFC geometry which is used by BCH. */
1555 ret = bch_set_geometry(this);
1556 if (ret) {
2d350e5a 1557 pr_err("Error setting BCH geometry : %d\n", ret);
10a2bcae
HS
1558 return ret;
1559 }
1560
1561 /* Alloc the new DMA buffers according to the pagesize and oobsize */
1562 return gpmi_alloc_dma_buffer(this);
1563}
1564
1565static int gpmi_pre_bbt_scan(struct gpmi_nand_data *this)
1566{
10a2bcae
HS
1567 /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */
1568 if (GPMI_IS_MX23(this))
1569 this->swap_block_mark = false;
1570 else
1571 this->swap_block_mark = true;
1572
1573 /* Set up the medium geometry */
885d71e5 1574 return gpmi_set_geometry(this);
10a2bcae 1575
10a2bcae
HS
1576}
1577
f720e7ce
HS
1578static void gpmi_nfc_exit(struct gpmi_nand_data *this)
1579{
1580 nand_release(&this->mtd);
1581 gpmi_free_dma_buffer(this);
1582}
1583
1584static int gpmi_init_last(struct gpmi_nand_data *this)
10a2bcae 1585{
f720e7ce 1586 struct mtd_info *mtd = &this->mtd;
10a2bcae 1587 struct nand_chip *chip = mtd->priv;
f720e7ce
HS
1588 struct nand_ecc_ctrl *ecc = &chip->ecc;
1589 struct bch_geometry *bch_geo = &this->bch_geometry;
10a2bcae
HS
1590 int ret;
1591
1592 /* Prepare for the BBT scan. */
1593 ret = gpmi_pre_bbt_scan(this);
1594 if (ret)
1595 return ret;
1596
f720e7ce
HS
1597 /* Init the nand_ecc_ctrl{} */
1598 ecc->read_page = gpmi_ecc_read_page;
1599 ecc->write_page = gpmi_ecc_write_page;
1600 ecc->read_oob = gpmi_ecc_read_oob;
1601 ecc->write_oob = gpmi_ecc_write_oob;
1602 ecc->mode = NAND_ECC_HW;
1603 ecc->size = bch_geo->ecc_chunk_size;
1604 ecc->strength = bch_geo->ecc_strength;
1605 ecc->layout = &gpmi_hw_ecclayout;
1606
995fbbf5
HS
1607 /*
1608 * Can we enable the extra features? such as EDO or Sync mode.
1609 *
1610 * We do not check the return value now. That's means if we fail in
1611 * enable the extra features, we still can run in the normal way.
1612 */
1613 gpmi_extra_init(this);
1614
f720e7ce 1615 return 0;
10a2bcae
HS
1616}
1617
06f25510 1618static int gpmi_nfc_init(struct gpmi_nand_data *this)
10a2bcae 1619{
10a2bcae
HS
1620 struct mtd_info *mtd = &this->mtd;
1621 struct nand_chip *chip = &this->nand;
e10db1f0 1622 struct mtd_part_parser_data ppdata = {};
10a2bcae
HS
1623 int ret;
1624
1625 /* init current chip */
1626 this->current_chip = -1;
1627
1628 /* init the MTD data structures */
1629 mtd->priv = chip;
1630 mtd->name = "gpmi-nand";
1631 mtd->owner = THIS_MODULE;
1632
1633 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
1634 chip->priv = this;
1635 chip->select_chip = gpmi_select_chip;
1636 chip->cmd_ctrl = gpmi_cmd_ctrl;
1637 chip->dev_ready = gpmi_dev_ready;
1638 chip->read_byte = gpmi_read_byte;
1639 chip->read_buf = gpmi_read_buf;
1640 chip->write_buf = gpmi_write_buf;
10a2bcae
HS
1641 chip->badblock_pattern = &gpmi_bbt_descr;
1642 chip->block_markbad = gpmi_block_markbad;
1643 chip->options |= NAND_NO_SUBPAGE_WRITE;
c50c6940
HS
1644 if (of_get_nand_on_flash_bbt(this->dev->of_node))
1645 chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
10a2bcae 1646
f720e7ce
HS
1647 /*
1648 * Allocate a temporary DMA buffer for reading ID in the
1649 * nand_scan_ident().
1650 */
10a2bcae
HS
1651 this->bch_geometry.payload_size = 1024;
1652 this->bch_geometry.auxiliary_size = 128;
1653 ret = gpmi_alloc_dma_buffer(this);
1654 if (ret)
1655 goto err_out;
1656
80bd33ac 1657 ret = nand_scan_ident(mtd, GPMI_IS_MX6Q(this) ? 2 : 1, NULL);
f720e7ce
HS
1658 if (ret)
1659 goto err_out;
1660
1661 ret = gpmi_init_last(this);
1662 if (ret)
1663 goto err_out;
1664
885d71e5 1665 chip->options |= NAND_SKIP_BBTSCAN;
f720e7ce
HS
1666 ret = nand_scan_tail(mtd);
1667 if (ret)
10a2bcae 1668 goto err_out;
10a2bcae 1669
885d71e5
HS
1670 ret = nand_boot_init(this);
1671 if (ret)
1672 goto err_out;
1673 chip->scan_bbt(mtd);
1674
e10db1f0
HS
1675 ppdata.of_node = this->pdev->dev.of_node;
1676 ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
10a2bcae
HS
1677 if (ret)
1678 goto err_out;
1679 return 0;
1680
1681err_out:
1682 gpmi_nfc_exit(this);
1683 return ret;
1684}
1685
e10db1f0
HS
1686static const struct platform_device_id gpmi_ids[] = {
1687 { .name = "imx23-gpmi-nand", .driver_data = IS_MX23, },
1688 { .name = "imx28-gpmi-nand", .driver_data = IS_MX28, },
9013bb40 1689 { .name = "imx6q-gpmi-nand", .driver_data = IS_MX6Q, },
d41f950e 1690 {}
e10db1f0
HS
1691};
1692
1693static const struct of_device_id gpmi_nand_id_table[] = {
1694 {
1695 .compatible = "fsl,imx23-gpmi-nand",
d41f950e 1696 .data = (void *)&gpmi_ids[IS_MX23],
e10db1f0
HS
1697 }, {
1698 .compatible = "fsl,imx28-gpmi-nand",
d41f950e 1699 .data = (void *)&gpmi_ids[IS_MX28],
9013bb40
HS
1700 }, {
1701 .compatible = "fsl,imx6q-gpmi-nand",
d41f950e 1702 .data = (void *)&gpmi_ids[IS_MX6Q],
e10db1f0
HS
1703 }, {}
1704};
1705MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
1706
06f25510 1707static int gpmi_nand_probe(struct platform_device *pdev)
10a2bcae 1708{
10a2bcae 1709 struct gpmi_nand_data *this;
e10db1f0 1710 const struct of_device_id *of_id;
10a2bcae
HS
1711 int ret;
1712
e10db1f0
HS
1713 of_id = of_match_device(gpmi_nand_id_table, &pdev->dev);
1714 if (of_id) {
1715 pdev->id_entry = of_id->data;
1716 } else {
1717 pr_err("Failed to find the right device id.\n");
52a073bd 1718 return -ENODEV;
e10db1f0
HS
1719 }
1720
edaf4d4a 1721 this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL);
10a2bcae
HS
1722 if (!this) {
1723 pr_err("Failed to allocate per-device memory\n");
1724 return -ENOMEM;
1725 }
1726
1727 platform_set_drvdata(pdev, this);
1728 this->pdev = pdev;
1729 this->dev = &pdev->dev;
10a2bcae
HS
1730
1731 ret = acquire_resources(this);
1732 if (ret)
1733 goto exit_acquire_resources;
1734
1735 ret = init_hardware(this);
1736 if (ret)
1737 goto exit_nfc_init;
1738
1739 ret = gpmi_nfc_init(this);
1740 if (ret)
1741 goto exit_nfc_init;
1742
490e280a
FE
1743 dev_info(this->dev, "driver registered.\n");
1744
10a2bcae
HS
1745 return 0;
1746
1747exit_nfc_init:
1748 release_resources(this);
10a2bcae 1749exit_acquire_resources:
490e280a
FE
1750 dev_err(this->dev, "driver registration failed: %d\n", ret);
1751
10a2bcae
HS
1752 return ret;
1753}
1754
810b7e06 1755static int gpmi_nand_remove(struct platform_device *pdev)
10a2bcae
HS
1756{
1757 struct gpmi_nand_data *this = platform_get_drvdata(pdev);
1758
1759 gpmi_nfc_exit(this);
1760 release_resources(this);
10a2bcae
HS
1761 return 0;
1762}
1763
10a2bcae
HS
1764static struct platform_driver gpmi_nand_driver = {
1765 .driver = {
1766 .name = "gpmi-nand",
e10db1f0 1767 .of_match_table = gpmi_nand_id_table,
10a2bcae
HS
1768 },
1769 .probe = gpmi_nand_probe,
5153b88c 1770 .remove = gpmi_nand_remove,
10a2bcae
HS
1771 .id_table = gpmi_ids,
1772};
490e280a 1773module_platform_driver(gpmi_nand_driver);
10a2bcae
HS
1774
1775MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1776MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
1777MODULE_LICENSE("GPL");