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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
ec98c681 | 2 | menuconfig MTD_ONENAND |
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3 | tristate "OneNAND Device Support" |
4 | depends on MTD | |
9310da0b | 5 | depends on HAS_IOMEM |
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6 | help |
7 | This enables support for accessing all type of OneNAND flash | |
f170c6fb | 8 | devices. |
cd5f6346 | 9 | |
ec98c681 JE |
10 | if MTD_ONENAND |
11 | ||
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12 | config MTD_ONENAND_VERIFY_WRITE |
13 | bool "Verify OneNAND page writes" | |
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14 | help |
15 | This adds an extra check when data is written to the flash. The | |
16 | OneNAND flash device internally checks only bits transitioning | |
17 | from 1 to 0. There is a rare possibility that even though the | |
18 | device thinks the write was successful, a bit could have been | |
09509603 | 19 | flipped accidentally due to device wear or something else. |
cd5f6346 | 20 | |
68ee4b1c | 21 | config MTD_ONENAND_GENERIC |
46d0d0fb | 22 | tristate "OneNAND Flash device via platform device driver" |
68ee4b1c | 23 | help |
46d0d0fb | 24 | Support for OneNAND flash via platform device driver. |
68ee4b1c | 25 | |
36cd4fb5 AH |
26 | config MTD_ONENAND_OMAP2 |
27 | tristate "OneNAND on OMAP2/OMAP3 support" | |
8c1a1158 | 28 | depends on ARCH_OMAP2 || ARCH_OMAP3 |
a758f50f | 29 | depends on OF || COMPILE_TEST |
36cd4fb5 | 30 | help |
a758f50f | 31 | Support for a OneNAND flash device connected to an OMAP2/OMAP3 SoC |
36cd4fb5 | 32 | via the GPMC memory controller. |
a758f50f | 33 | Enable dmaengine and gpiolib for better performance. |
36cd4fb5 | 34 | |
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35 | config MTD_ONENAND_SAMSUNG |
36 | tristate "OneNAND on Samsung SOC controller support" | |
e393bc09 | 37 | depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS4 |
46f3e88b | 38 | help |
861fae18 | 39 | Support for a OneNAND flash device connected to an Samsung SOC. |
e393bc09 | 40 | S3C64XX uses command mapping method. |
861fae18 | 41 | S5PC110/S5PC210 use generic OneNAND method. |
46f3e88b | 42 | |
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43 | config MTD_ONENAND_OTP |
44 | bool "OneNAND OTP Support" | |
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45 | help |
46 | One Block of the NAND Flash Array memory is reserved as | |
47 | a One-Time Programmable Block memory area. | |
48 | Also, 1st Block of NAND Flash Array can be used as OTP. | |
49 | ||
50 | The OTP block can be read, programmed and locked using the same | |
51 | operations as any other NAND Flash Array memory block. | |
52 | OTP block cannot be erased. | |
53 | ||
54 | OTP block is fully-guaranteed to be a valid block. | |
55 | ||
ee9745fc KP |
56 | config MTD_ONENAND_2X_PROGRAM |
57 | bool "OneNAND 2X program support" | |
58 | help | |
59 | The 2X Program is an extension of Program Operation. | |
60 | Since the device is equipped with two DataRAMs, and two-plane NAND | |
61 | Flash memory array, these two component enables simultaneous program | |
62 | of 4KiB. Plane1 has only even blocks such as block0, block2, block4 | |
63 | while Plane2 has only odd blocks such as block1, block3, block5. | |
64 | So MTD regards it as 4KiB page size and 256KiB block size | |
65 | ||
66 | Now the following chips support it. (KFXXX16Q2M) | |
67 | Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M, | |
68 | Mux: KFM2G16Q2M, KFN4G16Q2M, | |
69 | ||
70 | And more recent chips | |
71 | ||
ec98c681 | 72 | endif # MTD_ONENAND |