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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
9bb94643 | 2 | config MTD_NAND_ECC_SW_HAMMING |
93db446a BB |
3 | tristate |
4 | ||
9bb94643 | 5 | config MTD_NAND_ECC_SW_HAMMING_SMC |
93db446a | 6 | bool "NAND ECC Smart Media byte order" |
9bb94643 | 7 | depends on MTD_NAND_ECC_SW_HAMMING |
93db446a BB |
8 | default n |
9 | help | |
10 | Software ECC according to the Smart Media Specification. | |
11 | The original Linux implementation had byte 0 and 1 swapped. | |
12 | ||
72c5af00 | 13 | menuconfig MTD_RAW_NAND |
daf9a874 | 14 | tristate "Raw/Parallel NAND Device Support" |
93db446a | 15 | depends on MTD |
a7ab085d | 16 | select MTD_NAND_CORE |
9bb94643 | 17 | select MTD_NAND_ECC_SW_HAMMING |
93db446a | 18 | help |
daf9a874 MR |
19 | This enables support for accessing all type of raw/parallel |
20 | NAND flash devices. For further information see | |
93db446a BB |
21 | <http://www.linux-mtd.infradead.org/doc/nand.html>. |
22 | ||
72c5af00 | 23 | if MTD_RAW_NAND |
93db446a | 24 | |
714c0682 | 25 | config MTD_NAND_ECC_SW_BCH |
7019ac5d | 26 | bool "Support software BCH ECC" |
93db446a | 27 | select BCH |
93db446a BB |
28 | default n |
29 | help | |
30 | This enables support for software BCH error correction. Binary BCH | |
31 | codes are more powerful and cpu intensive than traditional Hamming | |
32 | ECC codes. They are used with NAND devices requiring more than 1 bit | |
33 | of error correction. | |
34 | ||
e787be1f | 35 | comment "Raw/parallel NAND flash controllers" |
93db446a BB |
36 | |
37 | config MTD_NAND_DENALI | |
38 | tristate | |
39 | ||
40 | config MTD_NAND_DENALI_PCI | |
e787be1f | 41 | tristate "Denali NAND controller on Intel Moorestown" |
93db446a | 42 | select MTD_NAND_DENALI |
7db782bc | 43 | depends on PCI |
d3691813 MR |
44 | help |
45 | Enable the driver for NAND flash on Intel Moorestown, using the | |
46 | Denali NAND controller core. | |
93db446a BB |
47 | |
48 | config MTD_NAND_DENALI_DT | |
e787be1f | 49 | tristate "Denali NAND controller as a DT device" |
93db446a BB |
50 | select MTD_NAND_DENALI |
51 | depends on HAS_DMA && HAVE_CLK && OF | |
52 | help | |
53 | Enable the driver for NAND flash on platforms using a Denali NAND | |
54 | controller as a DT device. | |
55 | ||
93db446a | 56 | config MTD_NAND_AMS_DELTA |
e787be1f | 57 | tristate "Amstrad E3 NAND controller" |
fbb080a1 | 58 | depends on MACH_AMS_DELTA || COMPILE_TEST |
93db446a BB |
59 | default y |
60 | help | |
61 | Support for NAND flash on Amstrad E3 (Delta). | |
62 | ||
63 | config MTD_NAND_OMAP2 | |
e787be1f | 64 | tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller" |
31ac1a53 BB |
65 | depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || COMPILE_TEST |
66 | depends on HAS_IOMEM | |
93db446a | 67 | help |
d3691813 | 68 | Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4 |
93db446a BB |
69 | and Keystone platforms. |
70 | ||
71 | config MTD_NAND_OMAP_BCH | |
72 | depends on MTD_NAND_OMAP2 | |
73 | bool "Support hardware based BCH error correction" | |
74 | default n | |
75 | select BCH | |
76 | help | |
77 | This config enables the ELM hardware engine, which can be used to | |
78 | locate and correct errors when using BCH ECC scheme. This offloads | |
79 | the cpu from doing ECC error searching and correction. However some | |
80 | legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine | |
81 | so this is optional for them. | |
82 | ||
83 | config MTD_NAND_OMAP_BCH_BUILD | |
84 | def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH | |
85 | ||
93db446a BB |
86 | config MTD_NAND_AU1550 |
87 | tristate "Au1550/1200 NAND support" | |
88 | depends on MIPS_ALCHEMY | |
89 | help | |
90 | This enables the driver for the NAND flash controller on the | |
91 | AMD/Alchemy 1550 SOC. | |
92 | ||
e787be1f MR |
93 | config MTD_NAND_NDFC |
94 | tristate "IBM/MCC 4xx NAND controller" | |
95 | depends on 4xx | |
96 | select MTD_NAND_ECC_SW_HAMMING_SMC | |
97 | help | |
98 | NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs | |
99 | ||
93db446a | 100 | config MTD_NAND_S3C2410 |
e787be1f | 101 | tristate "Samsung S3C NAND controller" |
93db446a BB |
102 | depends on ARCH_S3C24XX || ARCH_S3C64XX |
103 | help | |
104 | This enables the NAND flash controller on the S3C24xx and S3C64xx | |
105 | SoCs | |
106 | ||
107 | No board specific support is done by this driver, each board | |
108 | must advertise a platform_device for the driver to attach. | |
109 | ||
110 | config MTD_NAND_S3C2410_DEBUG | |
e787be1f | 111 | bool "Samsung S3C NAND controller debug" |
93db446a BB |
112 | depends on MTD_NAND_S3C2410 |
113 | help | |
114 | Enable debugging of the S3C NAND driver | |
115 | ||
93db446a BB |
116 | config MTD_NAND_S3C2410_CLKSTOP |
117 | bool "Samsung S3C NAND IDLE clock stop" | |
118 | depends on MTD_NAND_S3C2410 | |
119 | default n | |
120 | help | |
121 | Stop the clock to the NAND controller when there is no chip | |
122 | selected to save power. This will mean there is a small delay | |
123 | when the is NAND chip selected or released, but will save | |
124 | approximately 5mA of power when there is nothing happening. | |
125 | ||
126 | config MTD_NAND_TANGO | |
e787be1f | 127 | tristate "Tango NAND controller" |
93db446a | 128 | depends on ARCH_TANGO || COMPILE_TEST |
45e9f40f | 129 | depends on HAS_IOMEM |
93db446a BB |
130 | help |
131 | Enables the NAND Flash controller on Tango chips. | |
132 | ||
93db446a | 133 | config MTD_NAND_SHARPSL |
e787be1f | 134 | tristate "Sharp SL Series (C7xx + others) NAND controller" |
18331b98 BB |
135 | depends on ARCH_PXA || COMPILE_TEST |
136 | depends on HAS_IOMEM | |
93db446a BB |
137 | |
138 | config MTD_NAND_CAFE | |
e787be1f | 139 | tristate "OLPC CAFÉ NAND controller" |
93db446a BB |
140 | depends on PCI |
141 | select REED_SOLOMON | |
142 | select REED_SOLOMON_DEC16 | |
143 | help | |
144 | Use NAND flash attached to the CAFÉ chip designed for the OLPC | |
145 | laptop. | |
146 | ||
147 | config MTD_NAND_CS553X | |
e787be1f | 148 | tristate "CS5535/CS5536 (AMD Geode companion) NAND controller" |
93db446a BB |
149 | depends on X86_32 |
150 | depends on !UML && HAS_IOMEM | |
151 | help | |
152 | The CS553x companion chips for the AMD Geode processor | |
153 | include NAND flash controllers with built-in hardware ECC | |
154 | capabilities; enabling this option will allow you to use | |
155 | these. The driver will check the MSRs to verify that the | |
156 | controller is enabled for NAND, and currently requires that | |
157 | the controller be in MMIO mode. | |
158 | ||
159 | If you say "m", the module will be called cs553x_nand. | |
160 | ||
161 | config MTD_NAND_ATMEL | |
e787be1f | 162 | tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller" |
88a40e7d BB |
163 | depends on ARCH_AT91 || COMPILE_TEST |
164 | depends on HAS_IOMEM | |
9805d4bc | 165 | select GENERIC_ALLOCATOR |
93db446a BB |
166 | select MFD_ATMEL_SMC |
167 | help | |
168 | Enables support for NAND Flash / Smart Media Card interface | |
169 | on Atmel AT91 processors. | |
170 | ||
e787be1f MR |
171 | config MTD_NAND_ORION |
172 | tristate "Marvell Orion NAND controller" | |
173 | depends on PLAT_ORION | |
174 | help | |
175 | This enables the NAND flash controller on Orion machines. | |
176 | ||
177 | No board specific support is done by this driver, each board | |
178 | must advertise a platform_device for the driver to attach. | |
179 | ||
93db446a | 180 | config MTD_NAND_MARVELL |
e787be1f | 181 | tristate "Marvell EBU NAND controller" |
93db446a BB |
182 | depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \ |
183 | COMPILE_TEST | |
7db782bc | 184 | depends on HAS_IOMEM |
93db446a BB |
185 | help |
186 | This enables the NAND flash controller driver for Marvell boards, | |
187 | including: | |
188 | - PXA3xx processors (NFCv1) | |
189 | - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2) | |
190 | - 64-bit Aramda platforms (7k, 8k) (NFCv2) | |
191 | ||
192 | config MTD_NAND_SLC_LPC32XX | |
e787be1f | 193 | tristate "NXP LPC32xx SLC NAND controller" |
ee70e5e7 BB |
194 | depends on ARCH_LPC32XX || COMPILE_TEST |
195 | depends on HAS_IOMEM | |
93db446a BB |
196 | help |
197 | Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell | |
198 | chips) NAND controller. This is the default for the PHYTEC 3250 | |
199 | reference board which contains a NAND256R3A2CZA6 chip. | |
200 | ||
201 | Please check the actual NAND chip connected and its support | |
202 | by the SLC NAND controller. | |
203 | ||
204 | config MTD_NAND_MLC_LPC32XX | |
e787be1f | 205 | tristate "NXP LPC32xx MLC NAND controller" |
ee70e5e7 BB |
206 | depends on ARCH_LPC32XX || COMPILE_TEST |
207 | depends on HAS_IOMEM | |
93db446a BB |
208 | help |
209 | Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND | |
210 | controller. This is the default for the WORK92105 controller | |
211 | board. | |
212 | ||
213 | Please check the actual NAND chip connected and its support | |
214 | by the MLC NAND controller. | |
215 | ||
216 | config MTD_NAND_CM_X270 | |
e787be1f | 217 | tristate "CM-X270 modules NAND controller" |
93db446a BB |
218 | depends on MACH_ARMCORE |
219 | ||
220 | config MTD_NAND_PASEMI | |
e787be1f | 221 | tristate "PA Semi PWRficient NAND controller" |
93db446a BB |
222 | depends on PPC_PASEMI |
223 | help | |
224 | Enables support for NAND Flash interface on PA Semi PWRficient | |
225 | based boards | |
226 | ||
227 | config MTD_NAND_TMIO | |
e787be1f | 228 | tristate "Toshiba Mobile IO NAND controller" |
93db446a BB |
229 | depends on MFD_TMIO |
230 | help | |
231 | Support for NAND flash connected to a Toshiba Mobile IO | |
232 | Controller in some PDAs, including the Sharp SL6000x. | |
233 | ||
93db446a BB |
234 | config MTD_NAND_BRCMNAND |
235 | tristate "Broadcom STB NAND controller" | |
0beb4872 BB |
236 | depends on ARM || ARM64 || MIPS || COMPILE_TEST |
237 | depends on HAS_IOMEM | |
93db446a BB |
238 | help |
239 | Enables the Broadcom NAND controller driver. The controller was | |
240 | originally designed for Set-Top Box but is used on various BCM7xxx, | |
241 | BCM3xxx, BCM63xxx, iProc/Cygnus and more. | |
242 | ||
243 | config MTD_NAND_BCM47XXNFLASH | |
e787be1f | 244 | tristate "BCM4706 BCMA NAND controller" |
93db446a | 245 | depends on BCMA_NFLASH |
c2204734 | 246 | depends on BCMA |
93db446a BB |
247 | help |
248 | BCMA bus can have various flash memories attached, they are | |
249 | registered by bcma as platform devices. This enables driver for | |
250 | NAND flash memories. For now only BCM4706 is supported. | |
251 | ||
e787be1f MR |
252 | config MTD_NAND_OXNAS |
253 | tristate "Oxford Semiconductor NAND controller" | |
254 | depends on ARCH_OXNAS || COMPILE_TEST | |
93db446a BB |
255 | depends on HAS_IOMEM |
256 | help | |
e787be1f | 257 | This enables the NAND flash controller on Oxford Semiconductor SoCs. |
93db446a | 258 | |
e787be1f MR |
259 | config MTD_NAND_MPC5121_NFC |
260 | tristate "MPC5121 NAND controller" | |
261 | depends on PPC_MPC512x | |
93db446a | 262 | help |
e787be1f MR |
263 | This enables the driver for the NAND flash controller on the |
264 | MPC5121 SoC. | |
93db446a | 265 | |
e787be1f MR |
266 | config MTD_NAND_GPMI_NAND |
267 | tristate "Freescale GPMI NAND controller" | |
268 | depends on MXS_DMA | |
93db446a | 269 | help |
e787be1f MR |
270 | Enables NAND Flash support for IMX23, IMX28 or IMX6. |
271 | The GPMI controller is very powerful, with the help of BCH | |
272 | module, it can do the hardware ECC. The GPMI supports several | |
273 | NAND flashs at the same time. | |
93db446a BB |
274 | |
275 | config MTD_NAND_FSL_ELBC | |
e787be1f | 276 | tristate "Freescale eLBC NAND controller" |
93db446a BB |
277 | depends on FSL_SOC |
278 | select FSL_LBC | |
279 | help | |
280 | Various Freescale chips, including the 8313, include a NAND Flash | |
281 | Controller Module with built-in hardware ECC capabilities. | |
282 | Enabling this option will enable you to use this to control | |
283 | external NAND devices. | |
284 | ||
285 | config MTD_NAND_FSL_IFC | |
e787be1f | 286 | tristate "Freescale IFC NAND controller" |
a6be5051 BB |
287 | depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST |
288 | depends on HAS_IOMEM | |
93db446a BB |
289 | select FSL_IFC |
290 | select MEMORY | |
291 | help | |
292 | Various Freescale chips e.g P1010, include a NAND Flash machine | |
293 | with built-in hardware ECC capabilities. | |
294 | Enabling this option will enable you to use this to control | |
295 | external NAND devices. | |
296 | ||
297 | config MTD_NAND_FSL_UPM | |
e787be1f | 298 | tristate "Freescale UPM NAND controller" |
93db446a BB |
299 | depends on PPC_83xx || PPC_85xx |
300 | select FSL_LBC | |
301 | help | |
302 | Enables support for NAND Flash chips wired onto Freescale PowerPC | |
303 | processor localbus with User-Programmable Machine support. | |
304 | ||
93db446a | 305 | config MTD_NAND_VF610_NFC |
e787be1f | 306 | tristate "Freescale VF610/MPC5125 NAND controller" |
93db446a BB |
307 | depends on (SOC_VF610 || COMPILE_TEST) |
308 | depends on HAS_IOMEM | |
309 | help | |
310 | Enables support for NAND Flash Controller on some Freescale | |
311 | processors like the VF610, MPC5125, MCF54418 or Kinetis K70. | |
312 | The driver supports a maximum 2k page size. With 2k pages and | |
313 | 64 bytes or more of OOB, hardware ECC with up to 32-bit error | |
314 | correction is supported. Hardware ECC is only enabled through | |
315 | device tree. | |
316 | ||
317 | config MTD_NAND_MXC | |
e787be1f | 318 | tristate "Freescale MXC NAND controller" |
434bc2e1 BB |
319 | depends on ARCH_MXC || COMPILE_TEST |
320 | depends on HAS_IOMEM | |
93db446a BB |
321 | help |
322 | This enables the driver for the NAND flash controller on the | |
323 | MXC processors. | |
324 | ||
325 | config MTD_NAND_SH_FLCTL | |
e787be1f | 326 | tristate "Renesas SuperH FLCTL NAND controller" |
93db446a BB |
327 | depends on SUPERH || COMPILE_TEST |
328 | depends on HAS_IOMEM | |
93db446a BB |
329 | help |
330 | Several Renesas SuperH CPU has FLCTL. This option enables support | |
331 | for NAND Flash using FLCTL. | |
332 | ||
333 | config MTD_NAND_DAVINCI | |
e787be1f | 334 | tristate "DaVinci/Keystone NAND controller" |
b9221470 BB |
335 | depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) || COMPILE_TEST |
336 | depends on HAS_IOMEM | |
d3691813 | 337 | help |
93db446a BB |
338 | Enable the driver for NAND flash chips on Texas Instruments |
339 | DaVinci/Keystone processors. | |
340 | ||
341 | config MTD_NAND_TXX9NDFMC | |
e787be1f | 342 | tristate "TXx9 NAND controller" |
eaea2e73 BB |
343 | depends on SOC_TX4938 || SOC_TX4939 || COMPILE_TEST |
344 | depends on HAS_IOMEM | |
93db446a BB |
345 | help |
346 | This enables the NAND flash controller on the TXx9 SoCs. | |
347 | ||
348 | config MTD_NAND_SOCRATES | |
e787be1f | 349 | tristate "Socrates NAND controller" |
93db446a BB |
350 | depends on SOCRATES |
351 | help | |
352 | Enables support for NAND Flash chips wired onto Socrates board. | |
353 | ||
354 | config MTD_NAND_NUC900 | |
e787be1f | 355 | tristate "Nuvoton NUC9xx/w90p910 NAND controller" |
d4de09e5 BB |
356 | depends on ARCH_W90X900 || COMPILE_TEST |
357 | depends on HAS_IOMEM | |
93db446a BB |
358 | help |
359 | This enables the driver for the NAND Flash on evaluation board based | |
360 | on w90p910 / NUC9xx. | |
361 | ||
1838a7b3 | 362 | source "drivers/mtd/nand/raw/ingenic/Kconfig" |
93db446a BB |
363 | |
364 | config MTD_NAND_FSMC | |
e787be1f | 365 | tristate "ST Micros FSMC NAND controller" |
17c09ed7 BB |
366 | depends on OF && HAS_IOMEM |
367 | depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300 || \ | |
368 | COMPILE_TEST | |
93db446a BB |
369 | help |
370 | Enables support for NAND Flash chips on the ST Microelectronics | |
371 | Flexible Static Memory Controller (FSMC) | |
372 | ||
373 | config MTD_NAND_XWAY | |
e787be1f | 374 | bool "Lantiq XWAY NAND controller" |
93db446a BB |
375 | depends on LANTIQ && SOC_TYPE_XWAY |
376 | help | |
377 | Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached | |
378 | to the External Bus Unit (EBU). | |
379 | ||
380 | config MTD_NAND_SUNXI | |
e787be1f | 381 | tristate "Allwinner NAND controller" |
e37db6df BB |
382 | depends on ARCH_SUNXI || COMPILE_TEST |
383 | depends on HAS_IOMEM | |
93db446a BB |
384 | help |
385 | Enables support for NAND Flash chips on Allwinner SoCs. | |
386 | ||
387 | config MTD_NAND_HISI504 | |
e787be1f | 388 | tristate "Hisilicon Hip04 NAND controller" |
93db446a | 389 | depends on ARCH_HISI || COMPILE_TEST |
45e9f40f | 390 | depends on HAS_IOMEM |
93db446a BB |
391 | help |
392 | Enables support for NAND controller on Hisilicon SoC Hip04. | |
393 | ||
394 | config MTD_NAND_QCOM | |
e787be1f | 395 | tristate "QCOM NAND controller" |
b2d55fe2 BB |
396 | depends on ARCH_QCOM || COMPILE_TEST |
397 | depends on HAS_IOMEM | |
93db446a BB |
398 | help |
399 | Enables support for NAND flash chips on SoCs containing the EBI2 NAND | |
400 | controller. This controller is found on IPQ806x SoC. | |
401 | ||
402 | config MTD_NAND_MTK | |
e787be1f | 403 | tristate "MTK NAND controller" |
93db446a | 404 | depends on ARCH_MEDIATEK || COMPILE_TEST |
45e9f40f | 405 | depends on HAS_IOMEM |
93db446a BB |
406 | help |
407 | Enables support for NAND controller on MTK SoCs. | |
408 | This controller is found on mt27xx, mt81xx, mt65xx SoCs. | |
409 | ||
d7d9f8ec | 410 | config MTD_NAND_TEGRA |
e787be1f | 411 | tristate "NVIDIA Tegra NAND controller" |
d7d9f8ec | 412 | depends on ARCH_TEGRA || COMPILE_TEST |
45e9f40f | 413 | depends on HAS_IOMEM |
d7d9f8ec SA |
414 | help |
415 | Enables support for NAND flash controller on NVIDIA Tegra SoC. | |
416 | The driver has been developed and tested on a Tegra 2 SoC. DMA | |
417 | support, raw read/write page as well as HW ECC read/write page | |
418 | is supported. Extra OOB bytes when using HW ECC are currently | |
419 | not supported. | |
420 | ||
2cd457f3 CK |
421 | config MTD_NAND_STM32_FMC2 |
422 | tristate "Support for NAND controller on STM32MP SoCs" | |
423 | depends on MACH_STM32MP157 || COMPILE_TEST | |
424 | help | |
425 | Enables support for NAND Flash chips on SoCs containing the FMC2 | |
426 | NAND controller. This controller is found on STM32MP SoCs. | |
427 | The controller supports a maximum 8k page size and supports | |
428 | a maximum 8-bit correction error per sector of 512 bytes. | |
429 | ||
8fae856c LY |
430 | config MTD_NAND_MESON |
431 | tristate "Support for NAND controller on Amlogic's Meson SoCs" | |
432 | depends on ARCH_MESON || COMPILE_TEST | |
433 | select MFD_SYSCON | |
434 | help | |
435 | Enables support for NAND controller on Amlogic's Meson SoCs. | |
436 | This controller is found on Meson SoCs. | |
437 | ||
e787be1f MR |
438 | config MTD_NAND_GPIO |
439 | tristate "GPIO assisted NAND controller" | |
440 | depends on GPIOLIB || COMPILE_TEST | |
441 | depends on HAS_IOMEM | |
442 | help | |
443 | This enables a NAND flash driver where control signals are | |
444 | connected to GPIO pins, and commands and data are communicated | |
445 | via a memory mapped interface. | |
446 | ||
447 | config MTD_NAND_PLATFORM | |
448 | tristate "Generic NAND controller" | |
449 | depends on HAS_IOMEM | |
450 | help | |
451 | This implements a generic NAND driver for on-SOC platform | |
452 | devices. You will need to provide platform-specific functions | |
453 | via platform_data. | |
454 | ||
455 | comment "Misc" | |
456 | ||
457 | config MTD_SM_COMMON | |
458 | tristate | |
459 | default n | |
460 | ||
461 | config MTD_NAND_NANDSIM | |
462 | tristate "Support for NAND Flash Simulator" | |
463 | help | |
464 | The simulator may simulate various NAND flash chips for the | |
465 | MTD nand layer. | |
466 | ||
467 | config MTD_NAND_RICOH | |
468 | tristate "Ricoh xD card reader" | |
469 | default n | |
470 | depends on PCI | |
471 | select MTD_SM_COMMON | |
472 | help | |
473 | Enable support for Ricoh R5C852 xD card reader | |
474 | You also need to enable ether | |
475 | NAND SSFDC (SmartMedia) read only translation layer' or new | |
476 | expermental, readwrite | |
477 | 'SmartMedia/xD new translation layer' | |
478 | ||
479 | config MTD_NAND_DISKONCHIP | |
480 | tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)" | |
481 | depends on HAS_IOMEM | |
482 | select REED_SOLOMON | |
483 | select REED_SOLOMON_DEC16 | |
484 | help | |
485 | This is a reimplementation of M-Systems DiskOnChip 2000, | |
486 | Millennium and Millennium Plus as a standard NAND device driver, | |
487 | as opposed to the earlier self-contained MTD device drivers. | |
488 | This should enable, among other things, proper JFFS2 operation on | |
489 | these devices. | |
490 | ||
491 | config MTD_NAND_DISKONCHIP_PROBE_ADVANCED | |
492 | bool "Advanced detection options for DiskOnChip" | |
493 | depends on MTD_NAND_DISKONCHIP | |
494 | help | |
495 | This option allows you to specify nonstandard address at which to | |
496 | probe for a DiskOnChip, or to change the detection options. You | |
497 | are unlikely to need any of this unless you are using LinuxBIOS. | |
498 | Say 'N'. | |
499 | ||
500 | config MTD_NAND_DISKONCHIP_PROBE_ADDRESS | |
501 | hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED | |
502 | depends on MTD_NAND_DISKONCHIP | |
503 | default "0" | |
504 | help | |
505 | By default, the probe for DiskOnChip devices will look for a | |
506 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. | |
507 | This option allows you to specify a single address at which to probe | |
508 | for the device, which is useful if you have other devices in that | |
509 | range which get upset when they are probed. | |
510 | ||
511 | (Note that on PowerPC, the normal probe will only check at | |
512 | 0xE4000000.) | |
513 | ||
514 | Normally, you should leave this set to zero, to allow the probe at | |
515 | the normal addresses. | |
516 | ||
517 | config MTD_NAND_DISKONCHIP_PROBE_HIGH | |
518 | bool "Probe high addresses" | |
519 | depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED | |
520 | help | |
521 | By default, the probe for DiskOnChip devices will look for a | |
522 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. | |
523 | This option changes to make it probe between 0xFFFC8000 and | |
524 | 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be | |
525 | useful to you. Say 'N'. | |
526 | ||
527 | config MTD_NAND_DISKONCHIP_BBTWRITE | |
528 | bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP" | |
529 | depends on MTD_NAND_DISKONCHIP | |
530 | help | |
531 | On DiskOnChip devices shipped with the INFTL filesystem (Millennium | |
532 | and 2000 TSOP/Alon), Linux reserves some space at the end of the | |
533 | device for the Bad Block Table (BBT). If you have existing INFTL | |
534 | data on your device (created by non-Linux tools such as M-Systems' | |
535 | DOS drivers), your data might overlap the area Linux wants to use for | |
536 | the BBT. If this is a concern for you, leave this option disabled and | |
537 | Linux will not write BBT data into this area. | |
538 | The downside of leaving this option disabled is that if bad blocks | |
539 | are detected by Linux, they will not be recorded in the BBT, which | |
540 | could cause future problems. | |
541 | Once you enable this option, new filesystems (INFTL or others, created | |
542 | in Linux or other operating systems) will not use the reserved area. | |
543 | The only reason not to enable this option is to prevent damage to | |
544 | preexisting filesystems. | |
545 | Even if you leave this disabled, you can enable BBT writes at module | |
546 | load time (assuming you build diskonchip as a module) with the module | |
547 | parameter "inftl_bbt_write=1". | |
548 | ||
72c5af00 | 549 | endif # MTD_RAW_NAND |