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1/*
2 * linux/drivers/mtd/onenand/onenand_base.c
3 *
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4 * Copyright © 2005-2009 Samsung Electronics
5 * Copyright © 2007 Nokia Corporation
6 *
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7 * Kyungmin Park <kyungmin.park@samsung.com>
8 *
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9 * Credits:
10 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
11 * auto-placement support, read-while load support, various fixes
81280d58 12 *
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13 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
14 * Flex-OneNAND support
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15 * Amul Kumar Saha <amul.saha at samsung.com>
16 * OTP support
5988af23 17 *
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18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
c90173f0 25#include <linux/moduleparam.h>
5a0e3ad6 26#include <linux/slab.h>
015953d7 27#include <linux/sched.h>
6c77fd64 28#include <linux/delay.h>
2c22120f 29#include <linux/interrupt.h>
015953d7 30#include <linux/jiffies.h>
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31#include <linux/mtd/mtd.h>
32#include <linux/mtd/onenand.h>
33#include <linux/mtd/partitions.h>
34
35#include <asm/io.h>
36
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37/*
38 * Multiblock erase if number of blocks to erase is 2 or more.
39 * Maximum number of blocks for simultaneous erase is 64.
40 */
41#define MB_ERASE_MIN_BLK_COUNT 2
42#define MB_ERASE_MAX_BLK_COUNT 64
43
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44/* Default Flex-OneNAND boundary and lock respectively */
45static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
46
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47module_param_array(flex_bdry, int, NULL, 0400);
48MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
49 "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
50 "DIE_BDRY: SLC boundary of the die"
51 "LOCK: Locking information for SLC boundary"
52 " : 0->Set boundary in unlocked status"
53 " : 1->Set boundary in locked status");
54
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55/* Default OneNAND/Flex-OneNAND OTP options*/
56static int otp;
57
58module_param(otp, int, 0400);
59MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
60 "Syntax : otp=LOCK_TYPE"
61 "LOCK_TYPE : Keys issued, for specific OTP Lock type"
62 " : 0 -> Default (No Blocks Locked)"
63 " : 1 -> OTP Block lock"
64 " : 2 -> 1st Block lock"
65 " : 3 -> BOTH OTP Block and 1st Block lock");
66
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67/*
68 * flexonenand_oob_128 - oob info for Flex-Onenand with 4KB page
69 * For now, we expose only 64 out of 80 ecc bytes
5988af23 70 */
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71static int flexonenand_ooblayout_ecc(struct mtd_info *mtd, int section,
72 struct mtd_oob_region *oobregion)
73{
74 if (section > 7)
75 return -ERANGE;
76
77 oobregion->offset = (section * 16) + 6;
78 oobregion->length = 10;
79
80 return 0;
81}
82
83static int flexonenand_ooblayout_free(struct mtd_info *mtd, int section,
84 struct mtd_oob_region *oobregion)
85{
86 if (section > 7)
87 return -ERANGE;
88
89 oobregion->offset = (section * 16) + 2;
90 oobregion->length = 4;
91
92 return 0;
93}
94
95static const struct mtd_ooblayout_ops flexonenand_ooblayout_ops = {
96 .ecc = flexonenand_ooblayout_ecc,
97 .free = flexonenand_ooblayout_free,
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98};
99
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100/*
101 * onenand_oob_128 - oob info for OneNAND with 4KB page
102 *
103 * Based on specification:
104 * 4Gb M-die OneNAND Flash (KFM4G16Q4M, KFN8G16Q4M). Rev. 1.3, Apr. 2010
105 *
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106 */
107static int onenand_ooblayout_128_ecc(struct mtd_info *mtd, int section,
108 struct mtd_oob_region *oobregion)
109{
110 if (section > 7)
111 return -ERANGE;
112
113 oobregion->offset = (section * 16) + 7;
114 oobregion->length = 9;
115
116 return 0;
117}
118
119static int onenand_ooblayout_128_free(struct mtd_info *mtd, int section,
120 struct mtd_oob_region *oobregion)
121{
122 if (section >= 8)
123 return -ERANGE;
124
125 /*
126 * free bytes are using the spare area fields marked as
127 * "Managed by internal ECC logic for Logical Sector Number area"
128 */
129 oobregion->offset = (section * 16) + 2;
130 oobregion->length = 3;
131
132 return 0;
133}
134
135static const struct mtd_ooblayout_ops onenand_oob_128_ooblayout_ops = {
136 .ecc = onenand_ooblayout_128_ecc,
137 .free = onenand_ooblayout_128_free,
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138};
139
cd5f6346 140/**
a411679f 141 * onenand_oob_32_64 - oob info for large (2KB) page
cd5f6346 142 */
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143static int onenand_ooblayout_32_64_ecc(struct mtd_info *mtd, int section,
144 struct mtd_oob_region *oobregion)
145{
146 if (section > 3)
147 return -ERANGE;
148
149 oobregion->offset = (section * 16) + 8;
150 oobregion->length = 5;
151
152 return 0;
153}
154
155static int onenand_ooblayout_32_64_free(struct mtd_info *mtd, int section,
156 struct mtd_oob_region *oobregion)
157{
158 int sections = (mtd->oobsize / 32) * 2;
159
160 if (section >= sections)
161 return -ERANGE;
162
163 if (section & 1) {
164 oobregion->offset = ((section - 1) * 16) + 14;
165 oobregion->length = 2;
166 } else {
167 oobregion->offset = (section * 16) + 2;
168 oobregion->length = 3;
d9777f1c 169 }
cd5f6346 170
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171 return 0;
172}
173
174static const struct mtd_ooblayout_ops onenand_oob_32_64_ooblayout_ops = {
175 .ecc = onenand_ooblayout_32_64_ecc,
176 .free = onenand_ooblayout_32_64_free,
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177};
178
179static const unsigned char ffchars[] = {
180 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
181 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
182 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
183 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
184 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
185 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
186 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
187 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
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188 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
189 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
190 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
191 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
192 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
193 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
194 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
195 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
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196};
197
198/**
199 * onenand_readw - [OneNAND Interface] Read OneNAND register
200 * @param addr address to read
201 *
202 * Read OneNAND register
203 */
204static unsigned short onenand_readw(void __iomem *addr)
205{
206 return readw(addr);
207}
208
209/**
210 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
211 * @param value value to write
212 * @param addr address to write
213 *
214 * Write OneNAND register with value
215 */
216static void onenand_writew(unsigned short value, void __iomem *addr)
217{
218 writew(value, addr);
219}
220
221/**
222 * onenand_block_address - [DEFAULT] Get block address
83a36838 223 * @param this onenand chip data structure
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224 * @param block the block
225 * @return translated block address if DDP, otherwise same
226 *
227 * Setup Start Address 1 Register (F100h)
228 */
83a36838 229static int onenand_block_address(struct onenand_chip *this, int block)
cd5f6346 230{
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231 /* Device Flash Core select, NAND Flash Block Address */
232 if (block & this->density_mask)
233 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
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234
235 return block;
236}
237
238/**
239 * onenand_bufferram_address - [DEFAULT] Get bufferram address
83a36838 240 * @param this onenand chip data structure
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241 * @param block the block
242 * @return set DBS value if DDP, otherwise 0
243 *
244 * Setup Start Address 2 Register (F101h) for DDP
245 */
83a36838 246static int onenand_bufferram_address(struct onenand_chip *this, int block)
cd5f6346 247{
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248 /* Device BufferRAM Select */
249 if (block & this->density_mask)
250 return ONENAND_DDP_CHIP1;
cd5f6346 251
738d61f5 252 return ONENAND_DDP_CHIP0;
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253}
254
255/**
256 * onenand_page_address - [DEFAULT] Get page address
257 * @param page the page address
258 * @param sector the sector address
259 * @return combined page and sector address
260 *
261 * Setup Start Address 8 Register (F107h)
262 */
263static int onenand_page_address(int page, int sector)
264{
265 /* Flash Page Address, Flash Sector Address */
266 int fpa, fsa;
267
268 fpa = page & ONENAND_FPA_MASK;
269 fsa = sector & ONENAND_FSA_MASK;
270
271 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
272}
273
274/**
275 * onenand_buffer_address - [DEFAULT] Get buffer address
276 * @param dataram1 DataRAM index
277 * @param sectors the sector address
278 * @param count the number of sectors
279 * @return the start buffer value
280 *
281 * Setup Start Buffer Register (F200h)
282 */
283static int onenand_buffer_address(int dataram1, int sectors, int count)
284{
285 int bsa, bsc;
286
287 /* BufferRAM Sector Address */
288 bsa = sectors & ONENAND_BSA_MASK;
289
290 if (dataram1)
291 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
292 else
293 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
294
295 /* BufferRAM Sector Count */
296 bsc = count & ONENAND_BSC_MASK;
297
298 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
299}
300
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301/**
302 * flexonenand_block- For given address return block number
303 * @param this - OneNAND device structure
304 * @param addr - Address for which block number is needed
305 */
306static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
307{
308 unsigned boundary, blk, die = 0;
309
310 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
311 die = 1;
312 addr -= this->diesize[0];
313 }
314
315 boundary = this->boundary[die];
316
317 blk = addr >> (this->erase_shift - 1);
318 if (blk > boundary)
319 blk = (blk + boundary + 1) >> 1;
320
321 blk += die ? this->density_mask : 0;
322 return blk;
323}
324
325inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
326{
327 if (!FLEXONENAND(this))
328 return addr >> this->erase_shift;
329 return flexonenand_block(this, addr);
330}
331
332/**
333 * flexonenand_addr - Return address of the block
334 * @this: OneNAND device structure
335 * @block: Block number on Flex-OneNAND
336 *
337 * Return address of the block
338 */
339static loff_t flexonenand_addr(struct onenand_chip *this, int block)
340{
341 loff_t ofs = 0;
342 int die = 0, boundary;
343
344 if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
345 block -= this->density_mask;
346 die = 1;
347 ofs = this->diesize[0];
348 }
349
350 boundary = this->boundary[die];
351 ofs += (loff_t)block << (this->erase_shift - 1);
352 if (block > (boundary + 1))
353 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
354 return ofs;
355}
356
357loff_t onenand_addr(struct onenand_chip *this, int block)
358{
359 if (!FLEXONENAND(this))
360 return (loff_t)block << this->erase_shift;
361 return flexonenand_addr(this, block);
362}
363EXPORT_SYMBOL(onenand_addr);
364
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365/**
366 * onenand_get_density - [DEFAULT] Get OneNAND density
367 * @param dev_id OneNAND device ID
368 *
369 * Get OneNAND density from device ID
370 */
371static inline int onenand_get_density(int dev_id)
372{
373 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
374 return (density & ONENAND_DEVICE_DENSITY_MASK);
375}
376
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377/**
378 * flexonenand_region - [Flex-OneNAND] Return erase region of addr
379 * @param mtd MTD device structure
380 * @param addr address whose erase region needs to be identified
381 */
382int flexonenand_region(struct mtd_info *mtd, loff_t addr)
383{
384 int i;
385
386 for (i = 0; i < mtd->numeraseregions; i++)
387 if (addr < mtd->eraseregions[i].offset)
388 break;
389 return i - 1;
390}
391EXPORT_SYMBOL(flexonenand_region);
392
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393/**
394 * onenand_command - [DEFAULT] Send command to OneNAND device
395 * @param mtd MTD device structure
396 * @param cmd the command to be sent
397 * @param addr offset to read from or write to
398 * @param len number of bytes to read or write
399 *
400 * Send command to OneNAND device. This function is used for middle/large page
401 * devices (1KB/2KB Bytes per page)
402 */
403static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
404{
405 struct onenand_chip *this = mtd->priv;
b21b72cf 406 int value, block, page;
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407
408 /* Address translation */
409 switch (cmd) {
410 case ONENAND_CMD_UNLOCK:
411 case ONENAND_CMD_LOCK:
412 case ONENAND_CMD_LOCK_TIGHT:
28b79ff9 413 case ONENAND_CMD_UNLOCK_ALL:
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414 block = -1;
415 page = -1;
416 break;
417
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418 case FLEXONENAND_CMD_PI_ACCESS:
419 /* addr contains die index */
420 block = addr * this->density_mask;
421 page = -1;
422 break;
423
cd5f6346 424 case ONENAND_CMD_ERASE:
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425 case ONENAND_CMD_MULTIBLOCK_ERASE:
426 case ONENAND_CMD_ERASE_VERIFY:
cd5f6346 427 case ONENAND_CMD_BUFFERRAM:
493c6460 428 case ONENAND_CMD_OTP_ACCESS:
5988af23 429 block = onenand_block(this, addr);
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430 page = -1;
431 break;
432
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433 case FLEXONENAND_CMD_READ_PI:
434 cmd = ONENAND_CMD_READ;
435 block = addr * this->density_mask;
436 page = 0;
437 break;
438
cd5f6346 439 default:
5988af23 440 block = onenand_block(this, addr);
42b0aab1
RHS
441 if (FLEXONENAND(this))
442 page = (int) (addr - onenand_addr(this, block))>>\
443 this->page_shift;
444 else
445 page = (int) (addr >> this->page_shift);
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446 if (ONENAND_IS_2PLANE(this)) {
447 /* Make the even block number */
448 block &= ~1;
449 /* Is it the odd plane? */
450 if (addr & this->writesize)
451 block++;
452 page >>= 1;
453 }
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454 page &= this->page_mask;
455 break;
456 }
457
458 /* NOTE: The setting order of the registers is very important! */
459 if (cmd == ONENAND_CMD_BUFFERRAM) {
460 /* Select DataRAM for DDP */
83a36838 461 value = onenand_bufferram_address(this, block);
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462 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
463
8a8f632d 464 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this))
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465 /* It is always BufferRAM0 */
466 ONENAND_SET_BUFFERRAM0(this);
467 else
468 /* Switch to the next data buffer */
469 ONENAND_SET_NEXT_BUFFERRAM(this);
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470
471 return 0;
472 }
473
474 if (block != -1) {
475 /* Write 'DFS, FBA' of Flash */
83a36838 476 value = onenand_block_address(this, block);
cd5f6346 477 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
3cecf69e 478
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479 /* Select DataRAM for DDP */
480 value = onenand_bufferram_address(this, block);
481 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
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482 }
483
484 if (page != -1) {
60d84f97 485 /* Now we use page size operation */
5988af23 486 int sectors = 0, count = 0;
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487 int dataram;
488
489 switch (cmd) {
5988af23 490 case FLEXONENAND_CMD_RECOVER_LSB:
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491 case ONENAND_CMD_READ:
492 case ONENAND_CMD_READOOB:
8a8f632d 493 if (ONENAND_IS_4KB_PAGE(this))
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494 /* It is always BufferRAM0 */
495 dataram = ONENAND_SET_BUFFERRAM0(this);
496 else
497 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
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498 break;
499
500 default:
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501 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
502 cmd = ONENAND_CMD_2X_PROG;
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503 dataram = ONENAND_CURRENT_BUFFERRAM(this);
504 break;
505 }
506
507 /* Write 'FPA, FSA' of Flash */
508 value = onenand_page_address(page, sectors);
509 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
510
511 /* Write 'BSA, BSC' of DataRAM */
512 value = onenand_buffer_address(dataram, sectors, count);
513 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
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514 }
515
516 /* Interrupt clear */
517 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
518
519 /* Write command */
520 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
521
522 return 0;
523}
524
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525/**
526 * onenand_read_ecc - return ecc status
527 * @param this onenand chip structure
528 */
529static inline int onenand_read_ecc(struct onenand_chip *this)
530{
531 int ecc, i, result = 0;
532
6a88c47b 533 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
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534 return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
535
536 for (i = 0; i < 4; i++) {
6a88c47b 537 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2);
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538 if (likely(!ecc))
539 continue;
540 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
541 return ONENAND_ECC_2BIT_ALL;
542 else
543 result = ONENAND_ECC_1BIT_ALL;
544 }
545
546 return result;
547}
548
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549/**
550 * onenand_wait - [DEFAULT] wait until the command is done
551 * @param mtd MTD device structure
552 * @param state state to select the max. timeout value
553 *
554 * Wait for command done. This applies to all OneNAND command
555 * Read can take up to 30us, erase up to 2ms and program up to 350us
556 * according to general OneNAND specs
557 */
558static int onenand_wait(struct mtd_info *mtd, int state)
559{
560 struct onenand_chip * this = mtd->priv;
561 unsigned long timeout;
562 unsigned int flags = ONENAND_INT_MASTER;
563 unsigned int interrupt = 0;
2fd32d4a 564 unsigned int ctrl;
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565
566 /* The 20 msec is enough */
567 timeout = jiffies + msecs_to_jiffies(20);
568 while (time_before(jiffies, timeout)) {
569 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
570
571 if (interrupt & flags)
572 break;
573
72073027 574 if (state != FL_READING && state != FL_PREPARING_ERASE)
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575 cond_resched();
576 }
577 /* To get correct interrupt status in timeout case */
578 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
579
580 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
581
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582 /*
583 * In the Spec. it checks the controller status first
584 * However if you get the correct information in case of
585 * power off recovery (POR) test, it should read ECC status first
586 */
cd5f6346 587 if (interrupt & ONENAND_INT_READ) {
5988af23 588 int ecc = onenand_read_ecc(this);
f4f91ac3 589 if (ecc) {
b3c9f8bf 590 if (ecc & ONENAND_ECC_2BIT_ALL) {
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591 printk(KERN_ERR "%s: ECC error = 0x%04x\n",
592 __func__, ecc);
f4f91ac3 593 mtd->ecc_stats.failed++;
30a7eb29 594 return -EBADMSG;
49dc08ee 595 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
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596 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
597 __func__, ecc);
f4f91ac3 598 mtd->ecc_stats.corrected++;
49dc08ee 599 }
cd5f6346 600 }
9d032801 601 } else if (state == FL_READING) {
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602 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
603 __func__, ctrl, interrupt);
9d032801 604 return -EIO;
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605 }
606
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607 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
608 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
609 __func__, ctrl, interrupt);
610 return -EIO;
611 }
612
613 if (!(interrupt & ONENAND_INT_MASTER)) {
614 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
615 __func__, ctrl, interrupt);
616 return -EIO;
617 }
618
83973b87
KP
619 /* If there's controller error, it's a real error */
620 if (ctrl & ONENAND_CTRL_ERROR) {
297758f8
AKS
621 printk(KERN_ERR "%s: controller error = 0x%04x\n",
622 __func__, ctrl);
83973b87 623 if (ctrl & ONENAND_CTRL_LOCK)
297758f8 624 printk(KERN_ERR "%s: it's locked error.\n", __func__);
83973b87
KP
625 return -EIO;
626 }
627
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628 return 0;
629}
630
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631/*
632 * onenand_interrupt - [DEFAULT] onenand interrupt handler
633 * @param irq onenand interrupt number
634 * @param dev_id interrupt data
635 *
636 * complete the work
637 */
638static irqreturn_t onenand_interrupt(int irq, void *data)
639{
06efcad0 640 struct onenand_chip *this = data;
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KP
641
642 /* To handle shared interrupt */
643 if (!this->complete.done)
644 complete(&this->complete);
645
646 return IRQ_HANDLED;
647}
648
649/*
650 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
651 * @param mtd MTD device structure
652 * @param state state to select the max. timeout value
653 *
654 * Wait for command done.
655 */
656static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
657{
658 struct onenand_chip *this = mtd->priv;
659
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KP
660 wait_for_completion(&this->complete);
661
662 return onenand_wait(mtd, state);
663}
664
665/*
666 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
667 * @param mtd MTD device structure
668 * @param state state to select the max. timeout value
669 *
670 * Try interrupt based wait (It is used one-time)
671 */
672static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
673{
674 struct onenand_chip *this = mtd->priv;
675 unsigned long remain, timeout;
676
677 /* We use interrupt wait first */
678 this->wait = onenand_interrupt_wait;
679
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680 timeout = msecs_to_jiffies(100);
681 remain = wait_for_completion_timeout(&this->complete, timeout);
682 if (!remain) {
683 printk(KERN_INFO "OneNAND: There's no interrupt. "
684 "We use the normal wait\n");
685
686 /* Release the irq */
687 free_irq(this->irq, this);
c9ac5977 688
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KP
689 this->wait = onenand_wait;
690 }
691
692 return onenand_wait(mtd, state);
693}
694
695/*
696 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
697 * @param mtd MTD device structure
698 *
699 * There's two method to wait onenand work
700 * 1. polling - read interrupt status register
701 * 2. interrupt - use the kernel interrupt method
702 */
703static void onenand_setup_wait(struct mtd_info *mtd)
704{
705 struct onenand_chip *this = mtd->priv;
706 int syscfg;
707
708 init_completion(&this->complete);
709
710 if (this->irq <= 0) {
711 this->wait = onenand_wait;
712 return;
713 }
714
715 if (request_irq(this->irq, &onenand_interrupt,
716 IRQF_SHARED, "onenand", this)) {
717 /* If we can't get irq, use the normal wait */
718 this->wait = onenand_wait;
719 return;
720 }
721
722 /* Enable interrupt */
723 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
724 syscfg |= ONENAND_SYS_CFG1_IOBE;
725 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
726
727 this->wait = onenand_try_interrupt_wait;
728}
729
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730/**
731 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
732 * @param mtd MTD data structure
733 * @param area BufferRAM area
734 * @return offset given area
735 *
736 * Return BufferRAM offset given area
737 */
738static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
739{
740 struct onenand_chip *this = mtd->priv;
741
742 if (ONENAND_CURRENT_BUFFERRAM(this)) {
ee9745fc 743 /* Note: the 'this->writesize' is a real page size */
cd5f6346 744 if (area == ONENAND_DATARAM)
ee9745fc 745 return this->writesize;
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KP
746 if (area == ONENAND_SPARERAM)
747 return mtd->oobsize;
748 }
749
750 return 0;
751}
752
753/**
754 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
755 * @param mtd MTD data structure
756 * @param area BufferRAM area
757 * @param buffer the databuffer to put/get data
758 * @param offset offset to read from or write to
759 * @param count number of bytes to read/write
760 *
761 * Read the BufferRAM area
762 */
763static int onenand_read_bufferram(struct mtd_info *mtd, int area,
764 unsigned char *buffer, int offset, size_t count)
765{
766 struct onenand_chip *this = mtd->priv;
767 void __iomem *bufferram;
768
769 bufferram = this->base + area;
770
771 bufferram += onenand_bufferram_offset(mtd, area);
772
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KP
773 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
774 unsigned short word;
775
776 /* Align with word(16-bit) size */
777 count--;
778
779 /* Read word and save byte */
780 word = this->read_word(bufferram + offset + count);
781 buffer[count] = (word & 0xff);
782 }
783
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KP
784 memcpy(buffer, bufferram + offset, count);
785
786 return 0;
787}
788
52b0eea7
KP
789/**
790 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
791 * @param mtd MTD data structure
792 * @param area BufferRAM area
793 * @param buffer the databuffer to put/get data
794 * @param offset offset to read from or write to
795 * @param count number of bytes to read/write
796 *
797 * Read the BufferRAM area with Sync. Burst Mode
798 */
799static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
800 unsigned char *buffer, int offset, size_t count)
801{
802 struct onenand_chip *this = mtd->priv;
803 void __iomem *bufferram;
804
805 bufferram = this->base + area;
806
807 bufferram += onenand_bufferram_offset(mtd, area);
808
809 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
810
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KP
811 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
812 unsigned short word;
813
814 /* Align with word(16-bit) size */
815 count--;
816
817 /* Read word and save byte */
818 word = this->read_word(bufferram + offset + count);
819 buffer[count] = (word & 0xff);
820 }
821
52b0eea7
KP
822 memcpy(buffer, bufferram + offset, count);
823
824 this->mmcontrol(mtd, 0);
825
826 return 0;
827}
828
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829/**
830 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
831 * @param mtd MTD data structure
832 * @param area BufferRAM area
833 * @param buffer the databuffer to put/get data
834 * @param offset offset to read from or write to
835 * @param count number of bytes to read/write
836 *
837 * Write the BufferRAM area
838 */
839static int onenand_write_bufferram(struct mtd_info *mtd, int area,
840 const unsigned char *buffer, int offset, size_t count)
841{
842 struct onenand_chip *this = mtd->priv;
843 void __iomem *bufferram;
844
845 bufferram = this->base + area;
846
847 bufferram += onenand_bufferram_offset(mtd, area);
848
9c01f87d
KP
849 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
850 unsigned short word;
851 int byte_offset;
852
853 /* Align with word(16-bit) size */
854 count--;
855
856 /* Calculate byte access offset */
857 byte_offset = offset + count;
858
859 /* Read word and save byte */
860 word = this->read_word(bufferram + byte_offset);
861 word = (word & ~0xff) | buffer[count];
862 this->write_word(word, bufferram + byte_offset);
863 }
864
cd5f6346
KP
865 memcpy(bufferram + offset, buffer, count);
866
867 return 0;
868}
869
ee9745fc
KP
870/**
871 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
872 * @param mtd MTD data structure
873 * @param addr address to check
874 * @return blockpage address
875 *
876 * Get blockpage address at 2x program mode
877 */
878static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
879{
880 struct onenand_chip *this = mtd->priv;
881 int blockpage, block, page;
882
883 /* Calculate the even block number */
884 block = (int) (addr >> this->erase_shift) & ~1;
885 /* Is it the odd plane? */
886 if (addr & this->writesize)
887 block++;
888 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
889 blockpage = (block << 7) | page;
890
891 return blockpage;
892}
893
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894/**
895 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
896 * @param mtd MTD data structure
897 * @param addr address to check
d5c5e78a 898 * @return 1 if there are valid data, otherwise 0
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899 *
900 * Check bufferram if there is data we required
901 */
902static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
903{
904 struct onenand_chip *this = mtd->priv;
cde36b37 905 int blockpage, found = 0;
abf3c0f2 906 unsigned int i;
d5c5e78a 907
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KP
908 if (ONENAND_IS_2PLANE(this))
909 blockpage = onenand_get_2x_blockpage(mtd, addr);
910 else
911 blockpage = (int) (addr >> this->page_shift);
cd5f6346 912
abf3c0f2 913 /* Is there valid data? */
cd5f6346 914 i = ONENAND_CURRENT_BUFFERRAM(this);
abf3c0f2 915 if (this->bufferram[i].blockpage == blockpage)
cde36b37
AH
916 found = 1;
917 else {
918 /* Check another BufferRAM */
919 i = ONENAND_NEXT_BUFFERRAM(this);
920 if (this->bufferram[i].blockpage == blockpage) {
921 ONENAND_SET_NEXT_BUFFERRAM(this);
922 found = 1;
923 }
924 }
cd5f6346 925
cde36b37
AH
926 if (found && ONENAND_IS_DDP(this)) {
927 /* Select DataRAM for DDP */
5988af23 928 int block = onenand_block(this, addr);
cde36b37
AH
929 int value = onenand_bufferram_address(this, block);
930 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
abf3c0f2 931 }
cd5f6346 932
cde36b37 933 return found;
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KP
934}
935
936/**
937 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
938 * @param mtd MTD data structure
939 * @param addr address to update
940 * @param valid valid flag
941 *
942 * Update BufferRAM information
943 */
abf3c0f2 944static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
cd5f6346
KP
945 int valid)
946{
947 struct onenand_chip *this = mtd->priv;
abf3c0f2
KP
948 int blockpage;
949 unsigned int i;
d5c5e78a 950
ee9745fc
KP
951 if (ONENAND_IS_2PLANE(this))
952 blockpage = onenand_get_2x_blockpage(mtd, addr);
953 else
954 blockpage = (int) (addr >> this->page_shift);
cd5f6346 955
abf3c0f2
KP
956 /* Invalidate another BufferRAM */
957 i = ONENAND_NEXT_BUFFERRAM(this);
5b4246f1 958 if (this->bufferram[i].blockpage == blockpage)
abf3c0f2 959 this->bufferram[i].blockpage = -1;
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KP
960
961 /* Update BufferRAM */
962 i = ONENAND_CURRENT_BUFFERRAM(this);
abf3c0f2
KP
963 if (valid)
964 this->bufferram[i].blockpage = blockpage;
965 else
966 this->bufferram[i].blockpage = -1;
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967}
968
480b9dfb
AH
969/**
970 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
971 * @param mtd MTD data structure
972 * @param addr start address to invalidate
973 * @param len length to invalidate
974 *
975 * Invalidate BufferRAM information
976 */
977static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
978 unsigned int len)
979{
980 struct onenand_chip *this = mtd->priv;
981 int i;
982 loff_t end_addr = addr + len;
983
984 /* Invalidate BufferRAM */
985 for (i = 0; i < MAX_BUFFERRAM; i++) {
986 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
987 if (buf_addr >= addr && buf_addr < end_addr)
988 this->bufferram[i].blockpage = -1;
989 }
990}
991
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992/**
993 * onenand_get_device - [GENERIC] Get chip for selected access
994 * @param mtd MTD device structure
995 * @param new_state the state which is requested
996 *
997 * Get the device and lock it for exclusive access
998 */
a41371eb 999static int onenand_get_device(struct mtd_info *mtd, int new_state)
cd5f6346
KP
1000{
1001 struct onenand_chip *this = mtd->priv;
1002 DECLARE_WAITQUEUE(wait, current);
1003
1004 /*
1005 * Grab the lock and see if the device is available
1006 */
1007 while (1) {
1008 spin_lock(&this->chip_lock);
1009 if (this->state == FL_READY) {
1010 this->state = new_state;
1011 spin_unlock(&this->chip_lock);
cf24dc85
AH
1012 if (new_state != FL_PM_SUSPENDED && this->enable)
1013 this->enable(mtd);
cd5f6346
KP
1014 break;
1015 }
a41371eb
KP
1016 if (new_state == FL_PM_SUSPENDED) {
1017 spin_unlock(&this->chip_lock);
1018 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
1019 }
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1020 set_current_state(TASK_UNINTERRUPTIBLE);
1021 add_wait_queue(&this->wq, &wait);
1022 spin_unlock(&this->chip_lock);
1023 schedule();
1024 remove_wait_queue(&this->wq, &wait);
1025 }
a41371eb
KP
1026
1027 return 0;
cd5f6346
KP
1028}
1029
1030/**
1031 * onenand_release_device - [GENERIC] release chip
1032 * @param mtd MTD device structure
1033 *
1034 * Deselect, release chip lock and wake up anyone waiting on the device
1035 */
1036static void onenand_release_device(struct mtd_info *mtd)
1037{
1038 struct onenand_chip *this = mtd->priv;
1039
cf24dc85
AH
1040 if (this->state != FL_PM_SUSPENDED && this->disable)
1041 this->disable(mtd);
cd5f6346
KP
1042 /* Release the chip */
1043 spin_lock(&this->chip_lock);
1044 this->state = FL_READY;
1045 wake_up(&this->wq);
1046 spin_unlock(&this->chip_lock);
1047}
1048
1049/**
7854d3f7 1050 * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer
d15057b7
KP
1051 * @param mtd MTD device structure
1052 * @param buf destination address
1053 * @param column oob offset to read from
1054 * @param thislen oob length to read
1055 */
1056static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
1057 int thislen)
1058{
1059 struct onenand_chip *this = mtd->priv;
d30aae6d
BB
1060 int ret;
1061
1062 this->read_bufferram(mtd, ONENAND_SPARERAM, this->oob_buf, 0,
1063 mtd->oobsize);
1064 ret = mtd_ooblayout_get_databytes(mtd, buf, this->oob_buf,
1065 column, thislen);
1066 if (ret)
1067 return ret;
d15057b7 1068
d15057b7
KP
1069 return 0;
1070}
1071
5988af23
RH
1072/**
1073 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
1074 * @param mtd MTD device structure
1075 * @param addr address to recover
1076 * @param status return value from onenand_wait / onenand_bbt_wait
1077 *
1078 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
1079 * lower page address and MSB page has higher page address in paired pages.
1080 * If power off occurs during MSB page program, the paired LSB page data can
1081 * become corrupt. LSB page recovery read is a way to read LSB page though page
1082 * data are corrupted. When uncorrectable error occurs as a result of LSB page
1083 * read after power up, issue LSB page recovery read.
1084 */
1085static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
1086{
1087 struct onenand_chip *this = mtd->priv;
1088 int i;
1089
1090 /* Recovery is only for Flex-OneNAND */
1091 if (!FLEXONENAND(this))
1092 return status;
1093
1094 /* check if we failed due to uncorrectable error */
d57f4054 1095 if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR)
5988af23
RH
1096 return status;
1097
1098 /* check if address lies in MLC region */
1099 i = flexonenand_region(mtd, addr);
1100 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
1101 return status;
1102
1103 /* We are attempting to reread, so decrement stats.failed
1104 * which was incremented by onenand_wait due to read failure
1105 */
297758f8
AKS
1106 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
1107 __func__);
5988af23
RH
1108 mtd->ecc_stats.failed--;
1109
1110 /* Issue the LSB page recovery command */
1111 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
1112 return this->wait(mtd, FL_READING);
1113}
1114
1115/**
1116 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
1117 * @param mtd MTD device structure
1118 * @param from offset to read from
1119 * @param ops: oob operation description structure
1120 *
1121 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
1122 * So, read-while-load is not present.
1123 */
1124static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1125 struct mtd_oob_ops *ops)
1126{
1127 struct onenand_chip *this = mtd->priv;
1128 struct mtd_ecc_stats stats;
1129 size_t len = ops->len;
1130 size_t ooblen = ops->ooblen;
1131 u_char *buf = ops->datbuf;
1132 u_char *oobbuf = ops->oobbuf;
1133 int read = 0, column, thislen;
1134 int oobread = 0, oobcolumn, thisooblen, oobsize;
1135 int ret = 0;
1136 int writesize = this->writesize;
1137
0a32a102
BN
1138 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1139 (int)len);
5988af23 1140
29f1058a 1141 oobsize = mtd_oobavail(mtd, ops);
5988af23
RH
1142 oobcolumn = from & (mtd->oobsize - 1);
1143
1144 /* Do not allow reads past end of device */
1145 if (from + len > mtd->size) {
297758f8
AKS
1146 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1147 __func__);
5988af23
RH
1148 ops->retlen = 0;
1149 ops->oobretlen = 0;
1150 return -EINVAL;
1151 }
1152
1153 stats = mtd->ecc_stats;
1154
1155 while (read < len) {
1156 cond_resched();
1157
1158 thislen = min_t(int, writesize, len - read);
1159
1160 column = from & (writesize - 1);
1161 if (column + thislen > writesize)
1162 thislen = writesize - column;
1163
1164 if (!onenand_check_bufferram(mtd, from)) {
1165 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1166
1167 ret = this->wait(mtd, FL_READING);
1168 if (unlikely(ret))
1169 ret = onenand_recover_lsb(mtd, from, ret);
1170 onenand_update_bufferram(mtd, from, !ret);
d57f4054 1171 if (mtd_is_eccerr(ret))
5988af23 1172 ret = 0;
b085058f
AH
1173 if (ret)
1174 break;
5988af23
RH
1175 }
1176
1177 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1178 if (oobbuf) {
1179 thisooblen = oobsize - oobcolumn;
1180 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1181
0612b9dd 1182 if (ops->mode == MTD_OPS_AUTO_OOB)
5988af23
RH
1183 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1184 else
1185 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1186 oobread += thisooblen;
1187 oobbuf += thisooblen;
1188 oobcolumn = 0;
1189 }
1190
1191 read += thislen;
1192 if (read == len)
1193 break;
1194
1195 from += thislen;
1196 buf += thislen;
1197 }
1198
1199 /*
1200 * Return success, if no ECC failures, else -EBADMSG
1201 * fs driver will take care of that, because
1202 * retlen == desired len and result == -EBADMSG
1203 */
1204 ops->retlen = read;
1205 ops->oobretlen = oobread;
1206
1207 if (ret)
1208 return ret;
1209
1210 if (mtd->ecc_stats.failed - stats.failed)
1211 return -EBADMSG;
1212
edbc4540
MD
1213 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */
1214 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0;
5988af23
RH
1215}
1216
d15057b7 1217/**
49dc08ee 1218 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
cd5f6346
KP
1219 * @param mtd MTD device structure
1220 * @param from offset to read from
d15057b7 1221 * @param ops: oob operation description structure
cd5f6346 1222 *
d15057b7
KP
1223 * OneNAND read main and/or out-of-band data
1224 */
49dc08ee 1225static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
d15057b7 1226 struct mtd_oob_ops *ops)
cd5f6346
KP
1227{
1228 struct onenand_chip *this = mtd->priv;
f4f91ac3 1229 struct mtd_ecc_stats stats;
d15057b7
KP
1230 size_t len = ops->len;
1231 size_t ooblen = ops->ooblen;
1232 u_char *buf = ops->datbuf;
1233 u_char *oobbuf = ops->oobbuf;
1234 int read = 0, column, thislen;
1235 int oobread = 0, oobcolumn, thisooblen, oobsize;
0fc2ccea 1236 int ret = 0, boundary = 0;
ee9745fc 1237 int writesize = this->writesize;
cd5f6346 1238
0a32a102
BN
1239 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1240 (int)len);
d15057b7 1241
29f1058a 1242 oobsize = mtd_oobavail(mtd, ops);
d15057b7 1243 oobcolumn = from & (mtd->oobsize - 1);
cd5f6346
KP
1244
1245 /* Do not allow reads past end of device */
1246 if ((from + len) > mtd->size) {
297758f8
AKS
1247 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1248 __func__);
d15057b7
KP
1249 ops->retlen = 0;
1250 ops->oobretlen = 0;
cd5f6346
KP
1251 return -EINVAL;
1252 }
1253
f4f91ac3 1254 stats = mtd->ecc_stats;
61a7e198 1255
a8de85d5
AH
1256 /* Read-while-load method */
1257
1258 /* Do first load to bufferRAM */
1259 if (read < len) {
1260 if (!onenand_check_bufferram(mtd, from)) {
ee9745fc 1261 this->command(mtd, ONENAND_CMD_READ, from, writesize);
a8de85d5
AH
1262 ret = this->wait(mtd, FL_READING);
1263 onenand_update_bufferram(mtd, from, !ret);
d57f4054 1264 if (mtd_is_eccerr(ret))
5f4d47d5 1265 ret = 0;
a8de85d5
AH
1266 }
1267 }
1268
ee9745fc
KP
1269 thislen = min_t(int, writesize, len - read);
1270 column = from & (writesize - 1);
1271 if (column + thislen > writesize)
1272 thislen = writesize - column;
a8de85d5
AH
1273
1274 while (!ret) {
1275 /* If there is more to load then start next load */
1276 from += thislen;
1277 if (read + thislen < len) {
ee9745fc 1278 this->command(mtd, ONENAND_CMD_READ, from, writesize);
0fc2ccea
AH
1279 /*
1280 * Chip boundary handling in DDP
1281 * Now we issued chip 1 read and pointed chip 1
492e1501 1282 * bufferram so we have to point chip 0 bufferram.
0fc2ccea 1283 */
738d61f5
KP
1284 if (ONENAND_IS_DDP(this) &&
1285 unlikely(from == (this->chipsize >> 1))) {
1286 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
0fc2ccea
AH
1287 boundary = 1;
1288 } else
1289 boundary = 0;
a8de85d5
AH
1290 ONENAND_SET_PREV_BUFFERRAM(this);
1291 }
1292 /* While load is going, read from last bufferRAM */
1293 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
d15057b7
KP
1294
1295 /* Read oob area if needed */
1296 if (oobbuf) {
1297 thisooblen = oobsize - oobcolumn;
1298 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1299
0612b9dd 1300 if (ops->mode == MTD_OPS_AUTO_OOB)
d15057b7
KP
1301 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1302 else
1303 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1304 oobread += thisooblen;
1305 oobbuf += thisooblen;
1306 oobcolumn = 0;
1307 }
1308
a8de85d5
AH
1309 /* See if we are done */
1310 read += thislen;
1311 if (read == len)
1312 break;
1313 /* Set up for next read from bufferRAM */
0fc2ccea 1314 if (unlikely(boundary))
738d61f5 1315 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
a8de85d5
AH
1316 ONENAND_SET_NEXT_BUFFERRAM(this);
1317 buf += thislen;
ee9745fc 1318 thislen = min_t(int, writesize, len - read);
a8de85d5
AH
1319 column = 0;
1320 cond_resched();
1321 /* Now wait for load */
1322 ret = this->wait(mtd, FL_READING);
1323 onenand_update_bufferram(mtd, from, !ret);
d57f4054 1324 if (mtd_is_eccerr(ret))
5f4d47d5 1325 ret = 0;
a8de85d5 1326 }
cd5f6346 1327
cd5f6346
KP
1328 /*
1329 * Return success, if no ECC failures, else -EBADMSG
1330 * fs driver will take care of that, because
1331 * retlen == desired len and result == -EBADMSG
1332 */
d15057b7
KP
1333 ops->retlen = read;
1334 ops->oobretlen = oobread;
f4f91ac3 1335
a8de85d5
AH
1336 if (ret)
1337 return ret;
1338
5f4d47d5
AH
1339 if (mtd->ecc_stats.failed - stats.failed)
1340 return -EBADMSG;
1341
edbc4540
MD
1342 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */
1343 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0;
cd5f6346
KP
1344}
1345
cd5f6346 1346/**
49dc08ee 1347 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
cd5f6346
KP
1348 * @param mtd MTD device structure
1349 * @param from offset to read from
d15057b7 1350 * @param ops: oob operation description structure
cd5f6346
KP
1351 *
1352 * OneNAND read out-of-band data from the spare area
1353 */
49dc08ee 1354static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
12f77c9e 1355 struct mtd_oob_ops *ops)
cd5f6346
KP
1356{
1357 struct onenand_chip *this = mtd->priv;
5f4d47d5 1358 struct mtd_ecc_stats stats;
a5e7c7b4 1359 int read = 0, thislen, column, oobsize;
12f77c9e 1360 size_t len = ops->ooblen;
905c6bcd 1361 unsigned int mode = ops->mode;
12f77c9e 1362 u_char *buf = ops->oobbuf;
5988af23 1363 int ret = 0, readcmd;
cd5f6346 1364
12f77c9e
KP
1365 from += ops->ooboffs;
1366
0a32a102
BN
1367 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1368 (int)len);
cd5f6346
KP
1369
1370 /* Initialize return length value */
12f77c9e 1371 ops->oobretlen = 0;
cd5f6346 1372
0612b9dd 1373 if (mode == MTD_OPS_AUTO_OOB)
f5b8aa78 1374 oobsize = mtd->oobavail;
a5e7c7b4
AH
1375 else
1376 oobsize = mtd->oobsize;
1377
1378 column = from & (mtd->oobsize - 1);
1379
1380 if (unlikely(column >= oobsize)) {
297758f8
AKS
1381 printk(KERN_ERR "%s: Attempted to start read outside oob\n",
1382 __func__);
a5e7c7b4
AH
1383 return -EINVAL;
1384 }
1385
cd5f6346 1386 /* Do not allow reads past end of device */
a5e7c7b4
AH
1387 if (unlikely(from >= mtd->size ||
1388 column + len > ((mtd->size >> this->page_shift) -
1389 (from >> this->page_shift)) * oobsize)) {
297758f8
AKS
1390 printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
1391 __func__);
cd5f6346
KP
1392 return -EINVAL;
1393 }
1394
5f4d47d5
AH
1395 stats = mtd->ecc_stats;
1396
8a8f632d 1397 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
5988af23 1398
cd5f6346 1399 while (read < len) {
61a7e198
AB
1400 cond_resched();
1401
a5e7c7b4 1402 thislen = oobsize - column;
cd5f6346
KP
1403 thislen = min_t(int, thislen, len);
1404
5988af23 1405 this->command(mtd, readcmd, from, mtd->oobsize);
cd5f6346
KP
1406
1407 onenand_update_bufferram(mtd, from, 0);
1408
1409 ret = this->wait(mtd, FL_READING);
5988af23
RH
1410 if (unlikely(ret))
1411 ret = onenand_recover_lsb(mtd, from, ret);
1412
d57f4054 1413 if (ret && !mtd_is_eccerr(ret)) {
297758f8
AKS
1414 printk(KERN_ERR "%s: read failed = 0x%x\n",
1415 __func__, ret);
5f4d47d5
AH
1416 break;
1417 }
cd5f6346 1418
0612b9dd 1419 if (mode == MTD_OPS_AUTO_OOB)
a5e7c7b4
AH
1420 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1421 else
1422 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
cd5f6346
KP
1423
1424 read += thislen;
1425
1426 if (read == len)
1427 break;
1428
cd5f6346
KP
1429 buf += thislen;
1430
1431 /* Read more? */
1432 if (read < len) {
1433 /* Page size */
28318776 1434 from += mtd->writesize;
cd5f6346
KP
1435 column = 0;
1436 }
1437 }
1438
12f77c9e 1439 ops->oobretlen = read;
5f4d47d5
AH
1440
1441 if (ret)
1442 return ret;
1443
1444 if (mtd->ecc_stats.failed - stats.failed)
1445 return -EBADMSG;
1446
1447 return 0;
cd5f6346
KP
1448}
1449
8593fbc6 1450/**
d15057b7
KP
1451 * onenand_read - [MTD Interface] Read data from flash
1452 * @param mtd MTD device structure
1453 * @param from offset to read from
1454 * @param len number of bytes to read
1455 * @param retlen pointer to variable to store the number of read bytes
1456 * @param buf the databuffer to put data
1457 *
1458 * Read with ecc
1459*/
1460static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1461 size_t *retlen, u_char *buf)
1462{
5988af23 1463 struct onenand_chip *this = mtd->priv;
d15057b7
KP
1464 struct mtd_oob_ops ops = {
1465 .len = len,
1466 .ooblen = 0,
1467 .datbuf = buf,
1468 .oobbuf = NULL,
1469 };
1470 int ret;
1471
49dc08ee 1472 onenand_get_device(mtd, FL_READING);
8a8f632d 1473 ret = ONENAND_IS_4KB_PAGE(this) ?
5988af23
RH
1474 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
1475 onenand_read_ops_nolock(mtd, from, &ops);
49dc08ee 1476 onenand_release_device(mtd);
d15057b7 1477
49dc08ee 1478 *retlen = ops.retlen;
d15057b7
KP
1479 return ret;
1480}
1481
1482/**
1483 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
e3da8067
KP
1484 * @param mtd: MTD device structure
1485 * @param from: offset to read from
1486 * @param ops: oob operation description structure
d15057b7
KP
1487
1488 * Read main and/or out-of-band
8593fbc6
TG
1489 */
1490static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1491 struct mtd_oob_ops *ops)
1492{
5988af23 1493 struct onenand_chip *this = mtd->priv;
49dc08ee
AB
1494 int ret;
1495
4f4fad27 1496 switch (ops->mode) {
0612b9dd
BN
1497 case MTD_OPS_PLACE_OOB:
1498 case MTD_OPS_AUTO_OOB:
a5e7c7b4 1499 break;
0612b9dd 1500 case MTD_OPS_RAW:
4f4fad27 1501 /* Not implemented yet */
a5e7c7b4
AH
1502 default:
1503 return -EINVAL;
1504 }
d15057b7 1505
49dc08ee 1506 onenand_get_device(mtd, FL_READING);
d15057b7 1507 if (ops->datbuf)
8a8f632d 1508 ret = ONENAND_IS_4KB_PAGE(this) ?
5988af23
RH
1509 onenand_mlc_read_ops_nolock(mtd, from, ops) :
1510 onenand_read_ops_nolock(mtd, from, ops);
49dc08ee
AB
1511 else
1512 ret = onenand_read_oob_nolock(mtd, from, ops);
1513 onenand_release_device(mtd);
d15057b7 1514
49dc08ee 1515 return ret;
8593fbc6
TG
1516}
1517
211ac75f
KP
1518/**
1519 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1520 * @param mtd MTD device structure
1521 * @param state state to select the max. timeout value
1522 *
1523 * Wait for command done.
1524 */
1525static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1526{
1527 struct onenand_chip *this = mtd->priv;
1528 unsigned long timeout;
e0c1a921 1529 unsigned int interrupt, ctrl, ecc, addr1, addr8;
211ac75f
KP
1530
1531 /* The 20 msec is enough */
1532 timeout = jiffies + msecs_to_jiffies(20);
1533 while (time_before(jiffies, timeout)) {
1534 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1535 if (interrupt & ONENAND_INT_MASTER)
1536 break;
1537 }
1538 /* To get correct interrupt status in timeout case */
1539 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1540 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
e0c1a921
AH
1541 addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1);
1542 addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8);
211ac75f 1543
211ac75f 1544 if (interrupt & ONENAND_INT_READ) {
e0c1a921 1545 ecc = onenand_read_ecc(this);
83973b87 1546 if (ecc & ONENAND_ECC_2BIT_ALL) {
e0c1a921
AH
1547 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x "
1548 "intr 0x%04x addr1 %#x addr8 %#x\n",
1549 __func__, ecc, ctrl, interrupt, addr1, addr8);
5988af23 1550 return ONENAND_BBT_READ_ECC_ERROR;
83973b87 1551 }
211ac75f 1552 } else {
e0c1a921
AH
1553 printk(KERN_ERR "%s: read timeout! ctrl 0x%04x "
1554 "intr 0x%04x addr1 %#x addr8 %#x\n",
1555 __func__, ctrl, interrupt, addr1, addr8);
211ac75f
KP
1556 return ONENAND_BBT_READ_FATAL_ERROR;
1557 }
1558
83973b87
KP
1559 /* Initial bad block case: 0x2400 or 0x0400 */
1560 if (ctrl & ONENAND_CTRL_ERROR) {
e0c1a921
AH
1561 printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x "
1562 "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8);
83973b87
KP
1563 return ONENAND_BBT_READ_ERROR;
1564 }
1565
211ac75f
KP
1566 return 0;
1567}
1568
1569/**
1570 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1571 * @param mtd MTD device structure
1572 * @param from offset to read from
e3da8067 1573 * @param ops oob operation description structure
211ac75f
KP
1574 *
1575 * OneNAND read out-of-band data from the spare area for bbt scan
1576 */
1577int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1578 struct mtd_oob_ops *ops)
1579{
1580 struct onenand_chip *this = mtd->priv;
1581 int read = 0, thislen, column;
5988af23 1582 int ret = 0, readcmd;
211ac75f
KP
1583 size_t len = ops->ooblen;
1584 u_char *buf = ops->oobbuf;
1585
0a32a102
BN
1586 pr_debug("%s: from = 0x%08x, len = %zi\n", __func__, (unsigned int)from,
1587 len);
211ac75f
KP
1588
1589 /* Initialize return value */
1590 ops->oobretlen = 0;
1591
1592 /* Do not allow reads past end of device */
1593 if (unlikely((from + len) > mtd->size)) {
297758f8
AKS
1594 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1595 __func__);
211ac75f
KP
1596 return ONENAND_BBT_READ_FATAL_ERROR;
1597 }
1598
1599 /* Grab the lock and see if the device is available */
1600 onenand_get_device(mtd, FL_READING);
1601
1602 column = from & (mtd->oobsize - 1);
1603
8a8f632d 1604 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
5988af23 1605
211ac75f
KP
1606 while (read < len) {
1607 cond_resched();
1608
1609 thislen = mtd->oobsize - column;
1610 thislen = min_t(int, thislen, len);
1611
5988af23 1612 this->command(mtd, readcmd, from, mtd->oobsize);
211ac75f
KP
1613
1614 onenand_update_bufferram(mtd, from, 0);
1615
31bb999e 1616 ret = this->bbt_wait(mtd, FL_READING);
5988af23
RH
1617 if (unlikely(ret))
1618 ret = onenand_recover_lsb(mtd, from, ret);
1619
211ac75f
KP
1620 if (ret)
1621 break;
1622
1623 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1624 read += thislen;
1625 if (read == len)
1626 break;
1627
1628 buf += thislen;
1629
1630 /* Read more? */
1631 if (read < len) {
1632 /* Update Page size */
ee9745fc 1633 from += this->writesize;
211ac75f
KP
1634 column = 0;
1635 }
1636 }
1637
1638 /* Deselect and wake up anyone waiting on the device */
1639 onenand_release_device(mtd);
1640
1641 ops->oobretlen = read;
1642 return ret;
1643}
1644
cd5f6346 1645#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
8e6ec690
KP
1646/**
1647 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1648 * @param mtd MTD device structure
1649 * @param buf the databuffer to verify
1650 * @param to offset to read from
8e6ec690 1651 */
a5e7c7b4 1652static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
8e6ec690
KP
1653{
1654 struct onenand_chip *this = mtd->priv;
69d79186 1655 u_char *oob_buf = this->oob_buf;
5988af23
RH
1656 int status, i, readcmd;
1657
8a8f632d 1658 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
8e6ec690 1659
5988af23 1660 this->command(mtd, readcmd, to, mtd->oobsize);
8e6ec690
KP
1661 onenand_update_bufferram(mtd, to, 0);
1662 status = this->wait(mtd, FL_READING);
1663 if (status)
1664 return status;
1665
69d79186 1666 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
91014e9b 1667 for (i = 0; i < mtd->oobsize; i++)
69d79186 1668 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
8e6ec690
KP
1669 return -EBADMSG;
1670
1671 return 0;
1672}
1673
cd5f6346 1674/**
8b29c0b6
AH
1675 * onenand_verify - [GENERIC] verify the chip contents after a write
1676 * @param mtd MTD device structure
1677 * @param buf the databuffer to verify
1678 * @param addr offset to read from
1679 * @param len number of bytes to read and compare
cd5f6346 1680 */
8b29c0b6 1681static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
cd5f6346
KP
1682{
1683 struct onenand_chip *this = mtd->priv;
cd5f6346 1684 int ret = 0;
8b29c0b6 1685 int thislen, column;
cd5f6346 1686
e6da8568
RT
1687 column = addr & (this->writesize - 1);
1688
8b29c0b6 1689 while (len != 0) {
e6da8568 1690 thislen = min_t(int, this->writesize - column, len);
60d84f97 1691
ee9745fc 1692 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
cd5f6346 1693
8b29c0b6
AH
1694 onenand_update_bufferram(mtd, addr, 0);
1695
1696 ret = this->wait(mtd, FL_READING);
1697 if (ret)
1698 return ret;
cd5f6346 1699
8b29c0b6 1700 onenand_update_bufferram(mtd, addr, 1);
cd5f6346 1701
3328dc31 1702 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize);
cd5f6346 1703
e6da8568 1704 if (memcmp(buf, this->verify_buf + column, thislen))
8b29c0b6
AH
1705 return -EBADMSG;
1706
1707 len -= thislen;
1708 buf += thislen;
1709 addr += thislen;
e6da8568 1710 column = 0;
8b29c0b6 1711 }
d5c5e78a 1712
cd5f6346
KP
1713 return 0;
1714}
1715#else
8b29c0b6 1716#define onenand_verify(...) (0)
8e6ec690 1717#define onenand_verify_oob(...) (0)
cd5f6346
KP
1718#endif
1719
60d84f97 1720#define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
cd5f6346 1721
6c77fd64
RP
1722static void onenand_panic_wait(struct mtd_info *mtd)
1723{
1724 struct onenand_chip *this = mtd->priv;
1725 unsigned int interrupt;
1726 int i;
1727
1728 for (i = 0; i < 2000; i++) {
1729 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1730 if (interrupt & ONENAND_INT_MASTER)
1731 break;
1732 udelay(10);
1733 }
1734}
1735
1736/**
1737 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1738 * @param mtd MTD device structure
1739 * @param to offset to write to
1740 * @param len number of bytes to write
1741 * @param retlen pointer to variable to store the number of written bytes
1742 * @param buf the data to write
1743 *
1744 * Write with ECC
1745 */
1746static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1747 size_t *retlen, const u_char *buf)
1748{
1749 struct onenand_chip *this = mtd->priv;
1750 int column, subpage;
1751 int written = 0;
6c77fd64
RP
1752
1753 if (this->state == FL_PM_SUSPENDED)
1754 return -EBUSY;
1755
1756 /* Wait for any existing operation to clear */
1757 onenand_panic_wait(mtd);
1758
0a32a102
BN
1759 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1760 (int)len);
6c77fd64 1761
6c77fd64 1762 /* Reject writes, which are not page aligned */
b73d7e43 1763 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
297758f8
AKS
1764 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1765 __func__);
6c77fd64
RP
1766 return -EINVAL;
1767 }
1768
1769 column = to & (mtd->writesize - 1);
1770
1771 /* Loop until all data write */
1772 while (written < len) {
1773 int thislen = min_t(int, mtd->writesize - column, len - written);
1774 u_char *wbuf = (u_char *) buf;
1775
1776 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1777
1778 /* Partial page write */
1779 subpage = thislen < mtd->writesize;
1780 if (subpage) {
1781 memset(this->page_buf, 0xff, mtd->writesize);
1782 memcpy(this->page_buf + column, buf, thislen);
1783 wbuf = this->page_buf;
1784 }
1785
1786 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1787 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1788
1789 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1790
1791 onenand_panic_wait(mtd);
1792
1793 /* In partial page write we don't update bufferram */
7f2a7ce1 1794 onenand_update_bufferram(mtd, to, !subpage);
6c77fd64
RP
1795 if (ONENAND_IS_2PLANE(this)) {
1796 ONENAND_SET_BUFFERRAM1(this);
7f2a7ce1 1797 onenand_update_bufferram(mtd, to + this->writesize, !subpage);
6c77fd64
RP
1798 }
1799
1800 written += thislen;
1801
1802 if (written == len)
1803 break;
1804
1805 column = 0;
1806 to += thislen;
1807 buf += thislen;
1808 }
1809
1810 *retlen = written;
7f2a7ce1 1811 return 0;
6c77fd64
RP
1812}
1813
cd5f6346 1814/**
7854d3f7 1815 * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer
d15057b7
KP
1816 * @param mtd MTD device structure
1817 * @param oob_buf oob buffer
1818 * @param buf source address
1819 * @param column oob offset to write to
1820 * @param thislen oob length to write
1821 */
1822static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1823 const u_char *buf, int column, int thislen)
1824{
d30aae6d 1825 return mtd_ooblayout_set_databytes(mtd, buf, oob_buf, column, thislen);
d15057b7
KP
1826}
1827
1828/**
49dc08ee 1829 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
cd5f6346
KP
1830 * @param mtd MTD device structure
1831 * @param to offset to write to
d15057b7 1832 * @param ops oob operation description structure
cd5f6346 1833 *
d15057b7 1834 * Write main and/or oob with ECC
cd5f6346 1835 */
49dc08ee 1836static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
d15057b7 1837 struct mtd_oob_ops *ops)
cd5f6346
KP
1838{
1839 struct onenand_chip *this = mtd->priv;
9ce96908
KP
1840 int written = 0, column, thislen = 0, subpage = 0;
1841 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
d15057b7
KP
1842 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1843 size_t len = ops->len;
1844 size_t ooblen = ops->ooblen;
1845 const u_char *buf = ops->datbuf;
1846 const u_char *oob = ops->oobbuf;
1847 u_char *oobbuf;
ac80dac0 1848 int ret = 0, cmd;
cd5f6346 1849
0a32a102
BN
1850 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1851 (int)len);
cd5f6346
KP
1852
1853 /* Initialize retlen, in case of early exit */
d15057b7
KP
1854 ops->retlen = 0;
1855 ops->oobretlen = 0;
cd5f6346 1856
cd5f6346 1857 /* Reject writes, which are not page aligned */
b73d7e43 1858 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
297758f8
AKS
1859 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1860 __func__);
cd5f6346
KP
1861 return -EINVAL;
1862 }
1863
9ce96908
KP
1864 /* Check zero length */
1865 if (!len)
1866 return 0;
29f1058a 1867 oobsize = mtd_oobavail(mtd, ops);
d15057b7
KP
1868 oobcolumn = to & (mtd->oobsize - 1);
1869
60d84f97 1870 column = to & (mtd->writesize - 1);
60d84f97 1871
cd5f6346 1872 /* Loop until all data write */
9ce96908
KP
1873 while (1) {
1874 if (written < len) {
1875 u_char *wbuf = (u_char *) buf;
60d84f97 1876
9ce96908
KP
1877 thislen = min_t(int, mtd->writesize - column, len - written);
1878 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
d15057b7 1879
9ce96908 1880 cond_resched();
61a7e198 1881
9ce96908 1882 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
60d84f97 1883
9ce96908
KP
1884 /* Partial page write */
1885 subpage = thislen < mtd->writesize;
1886 if (subpage) {
1887 memset(this->page_buf, 0xff, mtd->writesize);
1888 memcpy(this->page_buf + column, buf, thislen);
1889 wbuf = this->page_buf;
1890 }
cd5f6346 1891
9ce96908 1892 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
d15057b7 1893
9ce96908
KP
1894 if (oob) {
1895 oobbuf = this->oob_buf;
d15057b7 1896
9ce96908
KP
1897 /* We send data to spare ram with oobsize
1898 * to prevent byte access */
1899 memset(oobbuf, 0xff, mtd->oobsize);
0612b9dd 1900 if (ops->mode == MTD_OPS_AUTO_OOB)
9ce96908
KP
1901 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1902 else
1903 memcpy(oobbuf + oobcolumn, oob, thisooblen);
d15057b7 1904
9ce96908
KP
1905 oobwritten += thisooblen;
1906 oob += thisooblen;
1907 oobcolumn = 0;
1908 } else
1909 oobbuf = (u_char *) ffchars;
1910
1911 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
d15057b7 1912 } else
9ce96908 1913 ONENAND_SET_NEXT_BUFFERRAM(this);
d15057b7 1914
9ce96908 1915 /*
492e1501
MK
1916 * 2 PLANE, MLC, and Flex-OneNAND do not support
1917 * write-while-program feature.
9ce96908 1918 */
6a88c47b 1919 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) {
9ce96908
KP
1920 ONENAND_SET_PREV_BUFFERRAM(this);
1921
1922 ret = this->wait(mtd, FL_WRITING);
1923
1924 /* In partial page write we don't update bufferram */
1925 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1926 if (ret) {
1927 written -= prevlen;
297758f8
AKS
1928 printk(KERN_ERR "%s: write failed %d\n",
1929 __func__, ret);
9ce96908
KP
1930 break;
1931 }
cd5f6346 1932
9ce96908
KP
1933 if (written == len) {
1934 /* Only check verify write turn on */
1935 ret = onenand_verify(mtd, buf - len, to - len, len);
1936 if (ret)
297758f8
AKS
1937 printk(KERN_ERR "%s: verify failed %d\n",
1938 __func__, ret);
9ce96908
KP
1939 break;
1940 }
cd5f6346 1941
9ce96908
KP
1942 ONENAND_SET_NEXT_BUFFERRAM(this);
1943 }
81f38e11 1944
ac80dac0
RT
1945 this->ongoing = 0;
1946 cmd = ONENAND_CMD_PROG;
1947
1948 /* Exclude 1st OTP and OTP blocks for cache program feature */
1949 if (ONENAND_IS_CACHE_PROGRAM(this) &&
1950 likely(onenand_block(this, to) != 0) &&
1951 ONENAND_IS_4KB_PAGE(this) &&
1952 ((written + thislen) < len)) {
1953 cmd = ONENAND_CMD_2X_CACHE_PROG;
1954 this->ongoing = 1;
1955 }
1956
1957 this->command(mtd, cmd, to, mtd->writesize);
9ce96908
KP
1958
1959 /*
1960 * 2 PLANE, MLC, and Flex-OneNAND wait here
1961 */
6a88c47b 1962 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) {
9ce96908 1963 ret = this->wait(mtd, FL_WRITING);
cd5f6346 1964
9ce96908
KP
1965 /* In partial page write we don't update bufferram */
1966 onenand_update_bufferram(mtd, to, !ret && !subpage);
1967 if (ret) {
297758f8
AKS
1968 printk(KERN_ERR "%s: write failed %d\n",
1969 __func__, ret);
9ce96908
KP
1970 break;
1971 }
cd5f6346 1972
9ce96908
KP
1973 /* Only check verify write turn on */
1974 ret = onenand_verify(mtd, buf, to, thislen);
1975 if (ret) {
297758f8
AKS
1976 printk(KERN_ERR "%s: verify failed %d\n",
1977 __func__, ret);
9ce96908
KP
1978 break;
1979 }
cd5f6346 1980
9ce96908 1981 written += thislen;
81f38e11 1982
9ce96908
KP
1983 if (written == len)
1984 break;
1985
1986 } else
1987 written += thislen;
cd5f6346 1988
60d84f97 1989 column = 0;
9ce96908
KP
1990 prev_subpage = subpage;
1991 prev = to;
1992 prevlen = thislen;
cd5f6346
KP
1993 to += thislen;
1994 buf += thislen;
9ce96908 1995 first = 0;
cd5f6346
KP
1996 }
1997
9ce96908
KP
1998 /* In error case, clear all bufferrams */
1999 if (written != len)
2000 onenand_invalidate_bufferram(mtd, 0, -1);
2001
d15057b7 2002 ops->retlen = written;
9ce96908 2003 ops->oobretlen = oobwritten;
d5c5e78a 2004
cd5f6346
KP
2005 return ret;
2006}
2007
a5e7c7b4 2008
cd5f6346 2009/**
7854d3f7 2010 * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band
cd5f6346
KP
2011 * @param mtd MTD device structure
2012 * @param to offset to write to
2013 * @param len number of bytes to write
2014 * @param retlen pointer to variable to store the number of written bytes
2015 * @param buf the data to write
a5e7c7b4 2016 * @param mode operation mode
cd5f6346
KP
2017 *
2018 * OneNAND write out-of-band
2019 */
49dc08ee
AB
2020static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2021 struct mtd_oob_ops *ops)
cd5f6346
KP
2022{
2023 struct onenand_chip *this = mtd->priv;
a5e7c7b4 2024 int column, ret = 0, oobsize;
5988af23 2025 int written = 0, oobcmd;
91014e9b 2026 u_char *oobbuf;
12f77c9e
KP
2027 size_t len = ops->ooblen;
2028 const u_char *buf = ops->oobbuf;
905c6bcd 2029 unsigned int mode = ops->mode;
12f77c9e
KP
2030
2031 to += ops->ooboffs;
cd5f6346 2032
0a32a102
BN
2033 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
2034 (int)len);
cd5f6346
KP
2035
2036 /* Initialize retlen, in case of early exit */
12f77c9e 2037 ops->oobretlen = 0;
cd5f6346 2038
0612b9dd 2039 if (mode == MTD_OPS_AUTO_OOB)
f5b8aa78 2040 oobsize = mtd->oobavail;
a5e7c7b4
AH
2041 else
2042 oobsize = mtd->oobsize;
2043
2044 column = to & (mtd->oobsize - 1);
2045
2046 if (unlikely(column >= oobsize)) {
297758f8
AKS
2047 printk(KERN_ERR "%s: Attempted to start write outside oob\n",
2048 __func__);
a5e7c7b4
AH
2049 return -EINVAL;
2050 }
2051
52e4200a 2052 /* For compatibility with NAND: Do not allow write past end of page */
91014e9b 2053 if (unlikely(column + len > oobsize)) {
297758f8
AKS
2054 printk(KERN_ERR "%s: Attempt to write past end of page\n",
2055 __func__);
52e4200a
AH
2056 return -EINVAL;
2057 }
2058
a5e7c7b4
AH
2059 /* Do not allow reads past end of device */
2060 if (unlikely(to >= mtd->size ||
2061 column + len > ((mtd->size >> this->page_shift) -
2062 (to >> this->page_shift)) * oobsize)) {
8032747e
DW
2063 printk(KERN_ERR "%s: Attempted to write past end of device\n",
2064 __func__);
cd5f6346
KP
2065 return -EINVAL;
2066 }
2067
470bc844 2068 oobbuf = this->oob_buf;
91014e9b 2069
8a8f632d 2070 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
5988af23 2071
cd5f6346
KP
2072 /* Loop until all data write */
2073 while (written < len) {
a5e7c7b4 2074 int thislen = min_t(int, oobsize, len - written);
cd5f6346 2075
61a7e198
AB
2076 cond_resched();
2077
cd5f6346
KP
2078 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
2079
34c10609
KP
2080 /* We send data to spare ram with oobsize
2081 * to prevent byte access */
91014e9b 2082 memset(oobbuf, 0xff, mtd->oobsize);
0612b9dd 2083 if (mode == MTD_OPS_AUTO_OOB)
91014e9b 2084 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
a5e7c7b4 2085 else
91014e9b
KP
2086 memcpy(oobbuf + column, buf, thislen);
2087 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
cd5f6346 2088
8a8f632d 2089 if (ONENAND_IS_4KB_PAGE(this)) {
5988af23
RH
2090 /* Set main area of DataRAM to 0xff*/
2091 memset(this->page_buf, 0xff, mtd->writesize);
2092 this->write_bufferram(mtd, ONENAND_DATARAM,
2093 this->page_buf, 0, mtd->writesize);
2094 }
2095
2096 this->command(mtd, oobcmd, to, mtd->oobsize);
cd5f6346
KP
2097
2098 onenand_update_bufferram(mtd, to, 0);
ee9745fc
KP
2099 if (ONENAND_IS_2PLANE(this)) {
2100 ONENAND_SET_BUFFERRAM1(this);
2101 onenand_update_bufferram(mtd, to + this->writesize, 0);
2102 }
cd5f6346 2103
8e6ec690
KP
2104 ret = this->wait(mtd, FL_WRITING);
2105 if (ret) {
297758f8 2106 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
5b4246f1 2107 break;
8e6ec690
KP
2108 }
2109
91014e9b 2110 ret = onenand_verify_oob(mtd, oobbuf, to);
8e6ec690 2111 if (ret) {
297758f8
AKS
2112 printk(KERN_ERR "%s: verify failed %d\n",
2113 __func__, ret);
5b4246f1 2114 break;
8e6ec690 2115 }
cd5f6346
KP
2116
2117 written += thislen;
cd5f6346
KP
2118 if (written == len)
2119 break;
2120
a5e7c7b4 2121 to += mtd->writesize;
cd5f6346 2122 buf += thislen;
a5e7c7b4 2123 column = 0;
cd5f6346
KP
2124 }
2125
12f77c9e 2126 ops->oobretlen = written;
d5c5e78a 2127
8e6ec690 2128 return ret;
cd5f6346
KP
2129}
2130
d15057b7
KP
2131/**
2132 * onenand_write - [MTD Interface] write buffer to FLASH
2133 * @param mtd MTD device structure
2134 * @param to offset to write to
2135 * @param len number of bytes to write
2136 * @param retlen pointer to variable to store the number of written bytes
2137 * @param buf the data to write
2138 *
2139 * Write with ECC
2140 */
2141static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
2142 size_t *retlen, const u_char *buf)
2143{
2144 struct mtd_oob_ops ops = {
2145 .len = len,
2146 .ooblen = 0,
2147 .datbuf = (u_char *) buf,
2148 .oobbuf = NULL,
2149 };
2150 int ret;
2151
49dc08ee
AB
2152 onenand_get_device(mtd, FL_WRITING);
2153 ret = onenand_write_ops_nolock(mtd, to, &ops);
2154 onenand_release_device(mtd);
d15057b7 2155
49dc08ee 2156 *retlen = ops.retlen;
d15057b7
KP
2157 return ret;
2158}
2159
8593fbc6
TG
2160/**
2161 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
e3da8067
KP
2162 * @param mtd: MTD device structure
2163 * @param to: offset to write
2164 * @param ops: oob operation description structure
8593fbc6
TG
2165 */
2166static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
2167 struct mtd_oob_ops *ops)
2168{
49dc08ee
AB
2169 int ret;
2170
4f4fad27 2171 switch (ops->mode) {
0612b9dd
BN
2172 case MTD_OPS_PLACE_OOB:
2173 case MTD_OPS_AUTO_OOB:
a5e7c7b4 2174 break;
0612b9dd 2175 case MTD_OPS_RAW:
4f4fad27 2176 /* Not implemented yet */
a5e7c7b4
AH
2177 default:
2178 return -EINVAL;
2179 }
d15057b7 2180
49dc08ee 2181 onenand_get_device(mtd, FL_WRITING);
d15057b7 2182 if (ops->datbuf)
49dc08ee
AB
2183 ret = onenand_write_ops_nolock(mtd, to, ops);
2184 else
2185 ret = onenand_write_oob_nolock(mtd, to, ops);
2186 onenand_release_device(mtd);
d15057b7 2187
49dc08ee 2188 return ret;
8593fbc6
TG
2189}
2190
cdc00130 2191/**
49dc08ee 2192 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
cdc00130
KP
2193 * @param mtd MTD device structure
2194 * @param ofs offset from device start
cdc00130
KP
2195 * @param allowbbt 1, if its allowed to access the bbt area
2196 *
2197 * Check, if the block is bad. Either by reading the bad block table or
2198 * calling of the scan function.
2199 */
49dc08ee 2200static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
cdc00130
KP
2201{
2202 struct onenand_chip *this = mtd->priv;
2203 struct bbm_info *bbm = this->bbm;
2204
2205 /* Return info from the table */
2206 return bbm->isbad_bbt(mtd, ofs, allowbbt);
2207}
2208
72073027
MK
2209
2210static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
2211 struct erase_info *instr)
2212{
2213 struct onenand_chip *this = mtd->priv;
2214 loff_t addr = instr->addr;
2215 int len = instr->len;
2216 unsigned int block_size = (1 << this->erase_shift);
2217 int ret = 0;
2218
2219 while (len) {
2220 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
2221 ret = this->wait(mtd, FL_VERIFYING_ERASE);
2222 if (ret) {
2223 printk(KERN_ERR "%s: Failed verify, block %d\n",
2224 __func__, onenand_block(this, addr));
2225 instr->state = MTD_ERASE_FAILED;
2226 instr->fail_addr = addr;
2227 return -1;
2228 }
2229 len -= block_size;
2230 addr += block_size;
2231 }
2232 return 0;
2233}
2234
2235/**
7854d3f7 2236 * onenand_multiblock_erase - [INTERN] erase block(s) using multiblock erase
72073027
MK
2237 * @param mtd MTD device structure
2238 * @param instr erase instruction
2239 * @param region erase region
2240 *
2241 * Erase one or more blocks up to 64 block at a time
2242 */
2243static int onenand_multiblock_erase(struct mtd_info *mtd,
2244 struct erase_info *instr,
2245 unsigned int block_size)
2246{
2247 struct onenand_chip *this = mtd->priv;
2248 loff_t addr = instr->addr;
2249 int len = instr->len;
2250 int eb_count = 0;
2251 int ret = 0;
2252 int bdry_block = 0;
2253
2254 instr->state = MTD_ERASING;
2255
2256 if (ONENAND_IS_DDP(this)) {
2257 loff_t bdry_addr = this->chipsize >> 1;
2258 if (addr < bdry_addr && (addr + len) > bdry_addr)
2259 bdry_block = bdry_addr >> this->erase_shift;
2260 }
2261
2262 /* Pre-check bbs */
2263 while (len) {
2264 /* Check if we have a bad block, we do not erase bad blocks */
2265 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2266 printk(KERN_WARNING "%s: attempt to erase a bad block "
2267 "at addr 0x%012llx\n",
2268 __func__, (unsigned long long) addr);
2269 instr->state = MTD_ERASE_FAILED;
2270 return -EIO;
2271 }
2272 len -= block_size;
2273 addr += block_size;
2274 }
2275
2276 len = instr->len;
2277 addr = instr->addr;
2278
2279 /* loop over 64 eb batches */
2280 while (len) {
2281 struct erase_info verify_instr = *instr;
2282 int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
2283
2284 verify_instr.addr = addr;
2285 verify_instr.len = 0;
2286
2287 /* do not cross chip boundary */
2288 if (bdry_block) {
2289 int this_block = (addr >> this->erase_shift);
2290
2291 if (this_block < bdry_block) {
2292 max_eb_count = min(max_eb_count,
2293 (bdry_block - this_block));
2294 }
2295 }
2296
2297 eb_count = 0;
2298
2299 while (len > block_size && eb_count < (max_eb_count - 1)) {
2300 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
2301 addr, block_size);
2302 onenand_invalidate_bufferram(mtd, addr, block_size);
2303
2304 ret = this->wait(mtd, FL_PREPARING_ERASE);
2305 if (ret) {
2306 printk(KERN_ERR "%s: Failed multiblock erase, "
2307 "block %d\n", __func__,
2308 onenand_block(this, addr));
2309 instr->state = MTD_ERASE_FAILED;
2310 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2311 return -EIO;
2312 }
2313
2314 len -= block_size;
2315 addr += block_size;
2316 eb_count++;
2317 }
2318
2319 /* last block of 64-eb series */
2320 cond_resched();
2321 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2322 onenand_invalidate_bufferram(mtd, addr, block_size);
2323
2324 ret = this->wait(mtd, FL_ERASING);
2325 /* Check if it is write protected */
2326 if (ret) {
2327 printk(KERN_ERR "%s: Failed erase, block %d\n",
2328 __func__, onenand_block(this, addr));
2329 instr->state = MTD_ERASE_FAILED;
2330 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2331 return -EIO;
2332 }
2333
2334 len -= block_size;
2335 addr += block_size;
2336 eb_count++;
2337
2338 /* verify */
2339 verify_instr.len = eb_count * block_size;
2340 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
2341 instr->state = verify_instr.state;
2342 instr->fail_addr = verify_instr.fail_addr;
2343 return -EIO;
2344 }
2345
2346 }
2347 return 0;
2348}
2349
2350
cd5f6346 2351/**
7854d3f7 2352 * onenand_block_by_block_erase - [INTERN] erase block(s) using regular erase
cd5f6346
KP
2353 * @param mtd MTD device structure
2354 * @param instr erase instruction
73885aea
MK
2355 * @param region erase region
2356 * @param block_size erase block size
cd5f6346 2357 *
73885aea 2358 * Erase one or more blocks one block at a time
cd5f6346 2359 */
73885aea
MK
2360static int onenand_block_by_block_erase(struct mtd_info *mtd,
2361 struct erase_info *instr,
2362 struct mtd_erase_region_info *region,
2363 unsigned int block_size)
cd5f6346
KP
2364{
2365 struct onenand_chip *this = mtd->priv;
5988af23 2366 loff_t addr = instr->addr;
73885aea 2367 int len = instr->len;
5988af23 2368 loff_t region_end = 0;
73885aea 2369 int ret = 0;
cd5f6346 2370
73885aea
MK
2371 if (region) {
2372 /* region is set for Flex-OneNAND */
5988af23 2373 region_end = region->offset + region->erasesize * region->numblocks;
cd5f6346
KP
2374 }
2375
cd5f6346
KP
2376 instr->state = MTD_ERASING;
2377
73885aea 2378 /* Loop through the blocks */
cd5f6346 2379 while (len) {
61a7e198 2380 cond_resched();
cd5f6346 2381
cdc00130 2382 /* Check if we have a bad block, we do not erase bad blocks */
49dc08ee 2383 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
297758f8
AKS
2384 printk(KERN_WARNING "%s: attempt to erase a bad block "
2385 "at addr 0x%012llx\n",
2386 __func__, (unsigned long long) addr);
cdc00130 2387 instr->state = MTD_ERASE_FAILED;
73885aea 2388 return -EIO;
cdc00130 2389 }
cd5f6346
KP
2390
2391 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2392
480b9dfb
AH
2393 onenand_invalidate_bufferram(mtd, addr, block_size);
2394
cd5f6346
KP
2395 ret = this->wait(mtd, FL_ERASING);
2396 /* Check, if it is write protected */
2397 if (ret) {
297758f8
AKS
2398 printk(KERN_ERR "%s: Failed erase, block %d\n",
2399 __func__, onenand_block(this, addr));
cd5f6346
KP
2400 instr->state = MTD_ERASE_FAILED;
2401 instr->fail_addr = addr;
73885aea 2402 return -EIO;
cd5f6346
KP
2403 }
2404
2405 len -= block_size;
2406 addr += block_size;
5988af23 2407
eff3bba6 2408 if (region && addr == region_end) {
5988af23
RH
2409 if (!len)
2410 break;
2411 region++;
2412
2413 block_size = region->erasesize;
2414 region_end = region->offset + region->erasesize * region->numblocks;
2415
2416 if (len & (block_size - 1)) {
2417 /* FIXME: This should be handled at MTD partitioning level. */
297758f8
AKS
2418 printk(KERN_ERR "%s: Unaligned address\n",
2419 __func__);
73885aea 2420 return -EIO;
5988af23
RH
2421 }
2422 }
73885aea
MK
2423 }
2424 return 0;
2425}
5988af23 2426
73885aea
MK
2427/**
2428 * onenand_erase - [MTD Interface] erase block(s)
2429 * @param mtd MTD device structure
2430 * @param instr erase instruction
2431 *
2432 * Erase one or more blocks
2433 */
2434static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2435{
2436 struct onenand_chip *this = mtd->priv;
2437 unsigned int block_size;
2438 loff_t addr = instr->addr;
2439 loff_t len = instr->len;
2440 int ret = 0;
2441 struct mtd_erase_region_info *region = NULL;
2442 loff_t region_offset = 0;
2443
289c0522 2444 pr_debug("%s: start=0x%012llx, len=%llu\n", __func__,
0a32a102
BN
2445 (unsigned long long)instr->addr,
2446 (unsigned long long)instr->len);
73885aea 2447
73885aea
MK
2448 if (FLEXONENAND(this)) {
2449 /* Find the eraseregion of this address */
2450 int i = flexonenand_region(mtd, addr);
cd5f6346 2451
73885aea
MK
2452 region = &mtd->eraseregions[i];
2453 block_size = region->erasesize;
cd5f6346 2454
73885aea
MK
2455 /* Start address within region must align on block boundary.
2456 * Erase region's start offset is always block start address.
2457 */
2458 region_offset = region->offset;
2459 } else
2460 block_size = 1 << this->erase_shift;
2461
2462 /* Start address must align on block boundary */
2463 if (unlikely((addr - region_offset) & (block_size - 1))) {
2464 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2465 return -EINVAL;
2466 }
2467
2468 /* Length must align on block boundary */
2469 if (unlikely(len & (block_size - 1))) {
2470 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2471 return -EINVAL;
2472 }
2473
73885aea
MK
2474 /* Grab the lock and see if the device is available */
2475 onenand_get_device(mtd, FL_ERASING);
2476
d983c54e
KP
2477 if (ONENAND_IS_4KB_PAGE(this) || region ||
2478 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
72073027
MK
2479 /* region is set for Flex-OneNAND (no mb erase) */
2480 ret = onenand_block_by_block_erase(mtd, instr,
2481 region, block_size);
2482 } else {
2483 ret = onenand_multiblock_erase(mtd, instr, block_size);
2484 }
cd5f6346
KP
2485
2486 /* Deselect and wake up anyone waiting on the device */
2487 onenand_release_device(mtd);
2488
3cd3a86b 2489 /* Do call back function */
73885aea
MK
2490 if (!ret) {
2491 instr->state = MTD_ERASE_DONE;
3cd3a86b 2492 mtd_erase_callback(instr);
73885aea 2493 }
3cd3a86b 2494
cd5f6346
KP
2495 return ret;
2496}
2497
2498/**
2499 * onenand_sync - [MTD Interface] sync
2500 * @param mtd MTD device structure
2501 *
2502 * Sync is actually a wait for chip ready function
2503 */
2504static void onenand_sync(struct mtd_info *mtd)
2505{
289c0522 2506 pr_debug("%s: called\n", __func__);
cd5f6346
KP
2507
2508 /* Grab the lock and see if the device is available */
2509 onenand_get_device(mtd, FL_SYNCING);
2510
2511 /* Release it and go back */
2512 onenand_release_device(mtd);
2513}
2514
2515/**
2516 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2517 * @param mtd MTD device structure
2518 * @param ofs offset relative to mtd start
cdc00130
KP
2519 *
2520 * Check whether the block is bad
cd5f6346
KP
2521 */
2522static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2523{
49dc08ee
AB
2524 int ret;
2525
49dc08ee
AB
2526 onenand_get_device(mtd, FL_READING);
2527 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
2528 onenand_release_device(mtd);
2529 return ret;
cdc00130
KP
2530}
2531
2532/**
2533 * onenand_default_block_markbad - [DEFAULT] mark a block bad
2534 * @param mtd MTD device structure
2535 * @param ofs offset from device start
2536 *
2537 * This is the default implementation, which can be overridden by
2538 * a hardware specific driver.
2539 */
2540static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
2541{
2542 struct onenand_chip *this = mtd->priv;
2543 struct bbm_info *bbm = this->bbm;
2544 u_char buf[2] = {0, 0};
12f77c9e 2545 struct mtd_oob_ops ops = {
0612b9dd 2546 .mode = MTD_OPS_PLACE_OOB,
12f77c9e
KP
2547 .ooblen = 2,
2548 .oobbuf = buf,
2549 .ooboffs = 0,
2550 };
cdc00130
KP
2551 int block;
2552
2553 /* Get block number */
5988af23 2554 block = onenand_block(this, ofs);
cdc00130
KP
2555 if (bbm->bbt)
2556 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
2557
492e1501 2558 /* We write two bytes, so we don't have to mess with 16-bit access */
cdc00130 2559 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
5988af23
RH
2560 /* FIXME : What to do when marking SLC block in partition
2561 * with MLC erasesize? For now, it is not advisable to
2562 * create partitions containing both SLC and MLC regions.
2563 */
2564 return onenand_write_oob_nolock(mtd, ofs, &ops);
cd5f6346
KP
2565}
2566
2567/**
2568 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2569 * @param mtd MTD device structure
2570 * @param ofs offset relative to mtd start
cdc00130
KP
2571 *
2572 * Mark the block as bad
cd5f6346
KP
2573 */
2574static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2575{
5e64c29e 2576 struct onenand_chip *this = mtd->priv;
cdc00130
KP
2577 int ret;
2578
2579 ret = onenand_block_isbad(mtd, ofs);
2580 if (ret) {
2581 /* If it was bad already, return success and do nothing */
2582 if (ret > 0)
2583 return 0;
2584 return ret;
2585 }
2586
49dc08ee 2587 onenand_get_device(mtd, FL_WRITING);
5e64c29e 2588 ret = this->block_markbad(mtd, ofs);
49dc08ee
AB
2589 onenand_release_device(mtd);
2590 return ret;
cd5f6346
KP
2591}
2592
2593/**
08f782b6 2594 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
cd5f6346
KP
2595 * @param mtd MTD device structure
2596 * @param ofs offset relative to mtd start
08f782b6 2597 * @param len number of bytes to lock or unlock
e3da8067 2598 * @param cmd lock or unlock command
cd5f6346 2599 *
08f782b6 2600 * Lock or unlock one or more blocks
cd5f6346 2601 */
08f782b6 2602static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
cd5f6346
KP
2603{
2604 struct onenand_chip *this = mtd->priv;
2605 int start, end, block, value, status;
08f782b6 2606 int wp_status_mask;
cd5f6346 2607
5988af23
RH
2608 start = onenand_block(this, ofs);
2609 end = onenand_block(this, ofs + len) - 1;
cd5f6346 2610
08f782b6
KP
2611 if (cmd == ONENAND_CMD_LOCK)
2612 wp_status_mask = ONENAND_WP_LS;
2613 else
2614 wp_status_mask = ONENAND_WP_US;
2615
cd5f6346 2616 /* Continuous lock scheme */
28b79ff9 2617 if (this->options & ONENAND_HAS_CONT_LOCK) {
cd5f6346
KP
2618 /* Set start block address */
2619 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2620 /* Set end block address */
5988af23 2621 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
08f782b6
KP
2622 /* Write lock command */
2623 this->command(mtd, cmd, 0, 0);
cd5f6346
KP
2624
2625 /* There's no return value */
08f782b6 2626 this->wait(mtd, FL_LOCKING);
cd5f6346
KP
2627
2628 /* Sanity check */
2629 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2630 & ONENAND_CTRL_ONGO)
2631 continue;
2632
2633 /* Check lock status */
2634 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
08f782b6 2635 if (!(status & wp_status_mask))
297758f8
AKS
2636 printk(KERN_ERR "%s: wp status = 0x%x\n",
2637 __func__, status);
cd5f6346
KP
2638
2639 return 0;
2640 }
2641
2642 /* Block lock scheme */
5988af23 2643 for (block = start; block < end + 1; block++) {
20ba89a3
KP
2644 /* Set block address */
2645 value = onenand_block_address(this, block);
2646 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2647 /* Select DataRAM for DDP */
2648 value = onenand_bufferram_address(this, block);
2649 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
cd5f6346
KP
2650 /* Set start block address */
2651 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
08f782b6
KP
2652 /* Write lock command */
2653 this->command(mtd, cmd, 0, 0);
cd5f6346
KP
2654
2655 /* There's no return value */
08f782b6 2656 this->wait(mtd, FL_LOCKING);
cd5f6346
KP
2657
2658 /* Sanity check */
2659 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2660 & ONENAND_CTRL_ONGO)
2661 continue;
2662
cd5f6346
KP
2663 /* Check lock status */
2664 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
08f782b6 2665 if (!(status & wp_status_mask))
297758f8
AKS
2666 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2667 __func__, block, status);
cd5f6346 2668 }
d5c5e78a 2669
cd5f6346
KP
2670 return 0;
2671}
2672
08f782b6
KP
2673/**
2674 * onenand_lock - [MTD Interface] Lock block(s)
2675 * @param mtd MTD device structure
2676 * @param ofs offset relative to mtd start
2677 * @param len number of bytes to unlock
2678 *
2679 * Lock one or more blocks
2680 */
69423d99 2681static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
08f782b6 2682{
34627f0e
AH
2683 int ret;
2684
2685 onenand_get_device(mtd, FL_LOCKING);
2686 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2687 onenand_release_device(mtd);
2688 return ret;
08f782b6
KP
2689}
2690
08f782b6
KP
2691/**
2692 * onenand_unlock - [MTD Interface] Unlock block(s)
2693 * @param mtd MTD device structure
2694 * @param ofs offset relative to mtd start
2695 * @param len number of bytes to unlock
2696 *
2697 * Unlock one or more blocks
2698 */
69423d99 2699static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
08f782b6 2700{
34627f0e
AH
2701 int ret;
2702
2703 onenand_get_device(mtd, FL_LOCKING);
2704 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2705 onenand_release_device(mtd);
2706 return ret;
08f782b6
KP
2707}
2708
28b79ff9
KP
2709/**
2710 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2711 * @param this onenand chip data structure
2712 *
2713 * Check lock status
2714 */
66a10506 2715static int onenand_check_lock_status(struct onenand_chip *this)
28b79ff9
KP
2716{
2717 unsigned int value, block, status;
2718 unsigned int end;
2719
2720 end = this->chipsize >> this->erase_shift;
2721 for (block = 0; block < end; block++) {
2722 /* Set block address */
2723 value = onenand_block_address(this, block);
2724 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2725 /* Select DataRAM for DDP */
2726 value = onenand_bufferram_address(this, block);
2727 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2728 /* Set start block address */
2729 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2730
2731 /* Check lock status */
2732 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
66a10506 2733 if (!(status & ONENAND_WP_US)) {
297758f8
AKS
2734 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2735 __func__, block, status);
66a10506
KP
2736 return 0;
2737 }
28b79ff9 2738 }
66a10506
KP
2739
2740 return 1;
28b79ff9
KP
2741}
2742
2743/**
2744 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2745 * @param mtd MTD device structure
2746 *
2747 * Unlock all blocks
2748 */
66a10506 2749static void onenand_unlock_all(struct mtd_info *mtd)
28b79ff9
KP
2750{
2751 struct onenand_chip *this = mtd->priv;
66a10506 2752 loff_t ofs = 0;
5988af23 2753 loff_t len = mtd->size;
28b79ff9
KP
2754
2755 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
10b7a2bd
KP
2756 /* Set start block address */
2757 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
28b79ff9
KP
2758 /* Write unlock command */
2759 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2760
2761 /* There's no return value */
08f782b6 2762 this->wait(mtd, FL_LOCKING);
28b79ff9
KP
2763
2764 /* Sanity check */
2765 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2766 & ONENAND_CTRL_ONGO)
2767 continue;
2768
31bb999e
KP
2769 /* Don't check lock status */
2770 if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
2771 return;
2772
66a10506
KP
2773 /* Check lock status */
2774 if (onenand_check_lock_status(this))
2775 return;
2776
28b79ff9 2777 /* Workaround for all block unlock in DDP */
5988af23 2778 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
66a10506
KP
2779 /* All blocks on another chip */
2780 ofs = this->chipsize >> 1;
2781 len = this->chipsize >> 1;
28b79ff9 2782 }
28b79ff9
KP
2783 }
2784
66a10506 2785 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
28b79ff9
KP
2786}
2787
493c6460
KP
2788#ifdef CONFIG_MTD_ONENAND_OTP
2789
3cf60253
AKS
2790/**
2791 * onenand_otp_command - Send OTP specific command to OneNAND device
2792 * @param mtd MTD device structure
2793 * @param cmd the command to be sent
2794 * @param addr offset to read from or write to
2795 * @param len number of bytes to read or write
2796 */
2797static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
2798 size_t len)
2799{
2800 struct onenand_chip *this = mtd->priv;
2801 int value, block, page;
2802
2803 /* Address translation */
2804 switch (cmd) {
2805 case ONENAND_CMD_OTP_ACCESS:
2806 block = (int) (addr >> this->erase_shift);
2807 page = -1;
2808 break;
2809
2810 default:
2811 block = (int) (addr >> this->erase_shift);
2812 page = (int) (addr >> this->page_shift);
2813
2814 if (ONENAND_IS_2PLANE(this)) {
2815 /* Make the even block number */
2816 block &= ~1;
2817 /* Is it the odd plane? */
2818 if (addr & this->writesize)
2819 block++;
2820 page >>= 1;
2821 }
2822 page &= this->page_mask;
2823 break;
2824 }
2825
2826 if (block != -1) {
2827 /* Write 'DFS, FBA' of Flash */
2828 value = onenand_block_address(this, block);
2829 this->write_word(value, this->base +
2830 ONENAND_REG_START_ADDRESS1);
2831 }
2832
2833 if (page != -1) {
2834 /* Now we use page size operation */
2835 int sectors = 4, count = 4;
2836 int dataram;
2837
2838 switch (cmd) {
2839 default:
2840 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
2841 cmd = ONENAND_CMD_2X_PROG;
2842 dataram = ONENAND_CURRENT_BUFFERRAM(this);
2843 break;
2844 }
2845
2846 /* Write 'FPA, FSA' of Flash */
2847 value = onenand_page_address(page, sectors);
2848 this->write_word(value, this->base +
2849 ONENAND_REG_START_ADDRESS8);
2850
2851 /* Write 'BSA, BSC' of DataRAM */
2852 value = onenand_buffer_address(dataram, sectors, count);
2853 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
2854 }
2855
2856 /* Interrupt clear */
2857 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
2858
2859 /* Write command */
2860 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
2861
2862 return 0;
2863}
2864
2865/**
7854d3f7 2866 * onenand_otp_write_oob_nolock - [INTERN] OneNAND write out-of-band, specific to OTP
3cf60253
AKS
2867 * @param mtd MTD device structure
2868 * @param to offset to write to
2869 * @param len number of bytes to write
2870 * @param retlen pointer to variable to store the number of written bytes
2871 * @param buf the data to write
2872 *
2873 * OneNAND write out-of-band only for OTP
2874 */
2875static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2876 struct mtd_oob_ops *ops)
2877{
2878 struct onenand_chip *this = mtd->priv;
2879 int column, ret = 0, oobsize;
2880 int written = 0;
2881 u_char *oobbuf;
2882 size_t len = ops->ooblen;
2883 const u_char *buf = ops->oobbuf;
2884 int block, value, status;
2885
2886 to += ops->ooboffs;
2887
2888 /* Initialize retlen, in case of early exit */
2889 ops->oobretlen = 0;
2890
2891 oobsize = mtd->oobsize;
2892
2893 column = to & (mtd->oobsize - 1);
2894
2895 oobbuf = this->oob_buf;
2896
2897 /* Loop until all data write */
2898 while (written < len) {
2899 int thislen = min_t(int, oobsize, len - written);
2900
2901 cond_resched();
2902
2903 block = (int) (to >> this->erase_shift);
2904 /*
2905 * Write 'DFS, FBA' of Flash
2906 * Add: F100h DQ=DFS, FBA
2907 */
2908
2909 value = onenand_block_address(this, block);
2910 this->write_word(value, this->base +
2911 ONENAND_REG_START_ADDRESS1);
2912
2913 /*
2914 * Select DataRAM for DDP
2915 * Add: F101h DQ=DBS
2916 */
2917
2918 value = onenand_bufferram_address(this, block);
2919 this->write_word(value, this->base +
2920 ONENAND_REG_START_ADDRESS2);
2921 ONENAND_SET_NEXT_BUFFERRAM(this);
2922
2923 /*
2924 * Enter OTP access mode
2925 */
2926 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2927 this->wait(mtd, FL_OTPING);
2928
2929 /* We send data to spare ram with oobsize
2930 * to prevent byte access */
2931 memcpy(oobbuf + column, buf, thislen);
2932
2933 /*
2934 * Write Data into DataRAM
2935 * Add: 8th Word
2936 * in sector0/spare/page0
2937 * DQ=XXFCh
2938 */
2939 this->write_bufferram(mtd, ONENAND_SPARERAM,
2940 oobbuf, 0, mtd->oobsize);
2941
2942 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
2943 onenand_update_bufferram(mtd, to, 0);
2944 if (ONENAND_IS_2PLANE(this)) {
2945 ONENAND_SET_BUFFERRAM1(this);
2946 onenand_update_bufferram(mtd, to + this->writesize, 0);
2947 }
2948
2949 ret = this->wait(mtd, FL_WRITING);
2950 if (ret) {
2951 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2952 break;
2953 }
2954
2955 /* Exit OTP access mode */
2956 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2957 this->wait(mtd, FL_RESETING);
2958
2959 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
2960 status &= 0x60;
2961
2962 if (status == 0x60) {
2963 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2964 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2965 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2966 } else if (status == 0x20) {
2967 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2968 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2969 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
2970 } else if (status == 0x40) {
2971 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2972 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
2973 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2974 } else {
2975 printk(KERN_DEBUG "Reboot to check\n");
2976 }
2977
2978 written += thislen;
2979 if (written == len)
2980 break;
2981
2982 to += mtd->writesize;
2983 buf += thislen;
2984 column = 0;
2985 }
2986
2987 ops->oobretlen = written;
2988
2989 return ret;
2990}
2991
492e1501 2992/* Internal OTP operation */
493c6460
KP
2993typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2994 size_t *retlen, u_char *buf);
2995
2996/**
2997 * do_otp_read - [DEFAULT] Read OTP block area
2998 * @param mtd MTD device structure
2999 * @param from The offset to read
3000 * @param len number of bytes to read
3001 * @param retlen pointer to variable to store the number of readbytes
3002 * @param buf the databuffer to put/get data
3003 *
3004 * Read OTP block area.
3005 */
3006static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
3007 size_t *retlen, u_char *buf)
3008{
3009 struct onenand_chip *this = mtd->priv;
49dc08ee
AB
3010 struct mtd_oob_ops ops = {
3011 .len = len,
3012 .ooblen = 0,
3013 .datbuf = buf,
3014 .oobbuf = NULL,
3015 };
493c6460
KP
3016 int ret;
3017
3018 /* Enter OTP access mode */
3019 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3020 this->wait(mtd, FL_OTPING);
3021
8a8f632d 3022 ret = ONENAND_IS_4KB_PAGE(this) ?
5988af23
RH
3023 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
3024 onenand_read_ops_nolock(mtd, from, &ops);
493c6460
KP
3025
3026 /* Exit OTP access mode */
3027 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3028 this->wait(mtd, FL_RESETING);
3029
3030 return ret;
3031}
3032
3033/**
3034 * do_otp_write - [DEFAULT] Write OTP block area
3035 * @param mtd MTD device structure
49dc08ee 3036 * @param to The offset to write
493c6460
KP
3037 * @param len number of bytes to write
3038 * @param retlen pointer to variable to store the number of write bytes
3039 * @param buf the databuffer to put/get data
3040 *
3041 * Write OTP block area.
3042 */
49dc08ee 3043static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
493c6460
KP
3044 size_t *retlen, u_char *buf)
3045{
3046 struct onenand_chip *this = mtd->priv;
3047 unsigned char *pbuf = buf;
3048 int ret;
49dc08ee 3049 struct mtd_oob_ops ops;
493c6460
KP
3050
3051 /* Force buffer page aligned */
28318776 3052 if (len < mtd->writesize) {
493c6460 3053 memcpy(this->page_buf, buf, len);
28318776 3054 memset(this->page_buf + len, 0xff, mtd->writesize - len);
493c6460 3055 pbuf = this->page_buf;
28318776 3056 len = mtd->writesize;
493c6460
KP
3057 }
3058
3059 /* Enter OTP access mode */
3060 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3061 this->wait(mtd, FL_OTPING);
3062
49dc08ee
AB
3063 ops.len = len;
3064 ops.ooblen = 0;
1437085c 3065 ops.datbuf = pbuf;
49dc08ee
AB
3066 ops.oobbuf = NULL;
3067 ret = onenand_write_ops_nolock(mtd, to, &ops);
3068 *retlen = ops.retlen;
493c6460
KP
3069
3070 /* Exit OTP access mode */
3071 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3072 this->wait(mtd, FL_RESETING);
3073
3074 return ret;
3075}
3076
3077/**
3078 * do_otp_lock - [DEFAULT] Lock OTP block area
3079 * @param mtd MTD device structure
3080 * @param from The offset to lock
3081 * @param len number of bytes to lock
3082 * @param retlen pointer to variable to store the number of lock bytes
3083 * @param buf the databuffer to put/get data
3084 *
3085 * Lock OTP block area.
3086 */
3087static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
3088 size_t *retlen, u_char *buf)
3089{
3090 struct onenand_chip *this = mtd->priv;
5988af23 3091 struct mtd_oob_ops ops;
493c6460
KP
3092 int ret;
3093
5988af23 3094 if (FLEXONENAND(this)) {
3cf60253
AKS
3095
3096 /* Enter OTP access mode */
3097 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3098 this->wait(mtd, FL_OTPING);
5988af23
RH
3099 /*
3100 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3101 * main area of page 49.
3102 */
3103 ops.len = mtd->writesize;
3104 ops.ooblen = 0;
3105 ops.datbuf = buf;
3106 ops.oobbuf = NULL;
3107 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
3108 *retlen = ops.retlen;
3cf60253
AKS
3109
3110 /* Exit OTP access mode */
3111 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3112 this->wait(mtd, FL_RESETING);
5988af23 3113 } else {
0612b9dd 3114 ops.mode = MTD_OPS_PLACE_OOB;
5988af23
RH
3115 ops.ooblen = len;
3116 ops.oobbuf = buf;
3117 ops.ooboffs = 0;
3cf60253 3118 ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
5988af23
RH
3119 *retlen = ops.oobretlen;
3120 }
493c6460 3121
493c6460
KP
3122 return ret;
3123}
3124
3125/**
3126 * onenand_otp_walk - [DEFAULT] Handle OTP operation
3127 * @param mtd MTD device structure
3128 * @param from The offset to read/write
3129 * @param len number of bytes to read/write
3130 * @param retlen pointer to variable to store the number of read bytes
3131 * @param buf the databuffer to put/get data
3132 * @param action do given action
3133 * @param mode specify user and factory
3134 *
3135 * Handle OTP operation.
3136 */
3137static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
3138 size_t *retlen, u_char *buf,
3139 otp_op_t action, int mode)
3140{
3141 struct onenand_chip *this = mtd->priv;
3142 int otp_pages;
3143 int density;
3144 int ret = 0;
3145
3146 *retlen = 0;
3147
e71f04fc 3148 density = onenand_get_density(this->device_id);
493c6460
KP
3149 if (density < ONENAND_DEVICE_DENSITY_512Mb)
3150 otp_pages = 20;
3151 else
3cf60253 3152 otp_pages = 50;
493c6460
KP
3153
3154 if (mode == MTD_OTP_FACTORY) {
28318776 3155 from += mtd->writesize * otp_pages;
3cf60253 3156 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
493c6460
KP
3157 }
3158
3159 /* Check User/Factory boundary */
3cf60253 3160 if (mode == MTD_OTP_USER) {
0a032a4d 3161 if (mtd->writesize * otp_pages < from + len)
3cf60253
AKS
3162 return 0;
3163 } else {
0a032a4d 3164 if (mtd->writesize * otp_pages < len)
3cf60253
AKS
3165 return 0;
3166 }
493c6460 3167
49dc08ee 3168 onenand_get_device(mtd, FL_OTPING);
493c6460
KP
3169 while (len > 0 && otp_pages > 0) {
3170 if (!action) { /* OTP Info functions */
3171 struct otp_info *otpinfo;
3172
3173 len -= sizeof(struct otp_info);
49dc08ee
AB
3174 if (len <= 0) {
3175 ret = -ENOSPC;
3176 break;
3177 }
493c6460
KP
3178
3179 otpinfo = (struct otp_info *) buf;
3180 otpinfo->start = from;
28318776 3181 otpinfo->length = mtd->writesize;
493c6460
KP
3182 otpinfo->locked = 0;
3183
28318776 3184 from += mtd->writesize;
493c6460
KP
3185 buf += sizeof(struct otp_info);
3186 *retlen += sizeof(struct otp_info);
3187 } else {
3188 size_t tmp_retlen;
493c6460
KP
3189
3190 ret = action(mtd, from, len, &tmp_retlen, buf);
c3cb77f8
DC
3191 if (ret)
3192 break;
493c6460 3193
3cf60253
AKS
3194 buf += tmp_retlen;
3195 len -= tmp_retlen;
3196 *retlen += tmp_retlen;
493c6460 3197
493c6460
KP
3198 }
3199 otp_pages--;
3200 }
49dc08ee 3201 onenand_release_device(mtd);
493c6460 3202
49dc08ee 3203 return ret;
493c6460
KP
3204}
3205
3206/**
3207 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
3208 * @param mtd MTD device structure
493c6460 3209 * @param len number of bytes to read
4b78fc42
CR
3210 * @param retlen pointer to variable to store the number of read bytes
3211 * @param buf the databuffer to put/get data
493c6460
KP
3212 *
3213 * Read factory OTP info.
3214 */
4b78fc42
CR
3215static int onenand_get_fact_prot_info(struct mtd_info *mtd, size_t len,
3216 size_t *retlen, struct otp_info *buf)
493c6460 3217{
4b78fc42
CR
3218 return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL,
3219 MTD_OTP_FACTORY);
493c6460
KP
3220}
3221
3222/**
3223 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
3224 * @param mtd MTD device structure
3225 * @param from The offset to read
3226 * @param len number of bytes to read
3227 * @param retlen pointer to variable to store the number of read bytes
3228 * @param buf the databuffer to put/get data
3229 *
3230 * Read factory OTP area.
3231 */
3232static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
3233 size_t len, size_t *retlen, u_char *buf)
3234{
3235 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
3236}
3237
3238/**
3239 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
3240 * @param mtd MTD device structure
4b78fc42 3241 * @param retlen pointer to variable to store the number of read bytes
493c6460 3242 * @param len number of bytes to read
4b78fc42 3243 * @param buf the databuffer to put/get data
493c6460
KP
3244 *
3245 * Read user OTP info.
3246 */
4b78fc42
CR
3247static int onenand_get_user_prot_info(struct mtd_info *mtd, size_t len,
3248 size_t *retlen, struct otp_info *buf)
493c6460 3249{
4b78fc42
CR
3250 return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL,
3251 MTD_OTP_USER);
493c6460
KP
3252}
3253
3254/**
3255 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
3256 * @param mtd MTD device structure
3257 * @param from The offset to read
3258 * @param len number of bytes to read
3259 * @param retlen pointer to variable to store the number of read bytes
3260 * @param buf the databuffer to put/get data
3261 *
3262 * Read user OTP area.
3263 */
3264static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
3265 size_t len, size_t *retlen, u_char *buf)
3266{
3267 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
3268}
3269
3270/**
3271 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
3272 * @param mtd MTD device structure
3273 * @param from The offset to write
3274 * @param len number of bytes to write
3275 * @param retlen pointer to variable to store the number of write bytes
3276 * @param buf the databuffer to put/get data
3277 *
3278 * Write user OTP area.
3279 */
3280static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
3281 size_t len, size_t *retlen, u_char *buf)
3282{
3283 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
3284}
3285
3286/**
3287 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
3288 * @param mtd MTD device structure
3289 * @param from The offset to lock
3290 * @param len number of bytes to unlock
3291 *
3292 * Write lock mark on spare area in page 0 in OTP block
3293 */
3294static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
3295 size_t len)
3296{
69d79186 3297 struct onenand_chip *this = mtd->priv;
5988af23 3298 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
493c6460
KP
3299 size_t retlen;
3300 int ret;
3cf60253 3301 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
493c6460 3302
5988af23
RH
3303 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
3304 : mtd->oobsize);
493c6460
KP
3305 /*
3306 * Write lock mark to 8th word of sector0 of page0 of the spare0.
3307 * We write 16 bytes spare area instead of 2 bytes.
5988af23
RH
3308 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3309 * main area of page 49.
493c6460 3310 */
5988af23 3311
493c6460 3312 from = 0;
5988af23 3313 len = FLEXONENAND(this) ? mtd->writesize : 16;
493c6460 3314
3cf60253
AKS
3315 /*
3316 * Note: OTP lock operation
3317 * OTP block : 0xXXFC XX 1111 1100
3318 * 1st block : 0xXXF3 (If chip support) XX 1111 0011
3319 * Both : 0xXXF0 (If chip support) XX 1111 0000
3320 */
3321 if (FLEXONENAND(this))
3322 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
3323
3324 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
3325 if (otp == 1)
3326 buf[otp_lock_offset] = 0xFC;
3327 else if (otp == 2)
3328 buf[otp_lock_offset] = 0xF3;
3329 else if (otp == 3)
3330 buf[otp_lock_offset] = 0xF0;
3331 else if (otp != 0)
3332 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
3333
5988af23 3334 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
493c6460
KP
3335
3336 return ret ? : retlen;
3337}
3cf60253 3338
493c6460
KP
3339#endif /* CONFIG_MTD_ONENAND_OTP */
3340
28b79ff9 3341/**
75384b0d 3342 * onenand_check_features - Check and set OneNAND features
28b79ff9
KP
3343 * @param mtd MTD data structure
3344 *
75384b0d
KP
3345 * Check and set OneNAND features
3346 * - lock scheme
ee9745fc 3347 * - two plane
28b79ff9 3348 */
75384b0d 3349static void onenand_check_features(struct mtd_info *mtd)
28b79ff9
KP
3350{
3351 struct onenand_chip *this = mtd->priv;
edb44b9b 3352 unsigned int density, process, numbufs;
28b79ff9
KP
3353
3354 /* Lock scheme depends on density and process */
e71f04fc 3355 density = onenand_get_density(this->device_id);
28b79ff9 3356 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
edb44b9b 3357 numbufs = this->read_word(this->base + ONENAND_REG_NUM_BUFFERS) >> 8;
28b79ff9
KP
3358
3359 /* Lock scheme */
ee9745fc
KP
3360 switch (density) {
3361 case ONENAND_DEVICE_DENSITY_4Gb:
6a88c47b
KP
3362 if (ONENAND_IS_DDP(this))
3363 this->options |= ONENAND_HAS_2PLANE;
ac80dac0 3364 else if (numbufs == 1) {
6a88c47b 3365 this->options |= ONENAND_HAS_4KB_PAGE;
ac80dac0 3366 this->options |= ONENAND_HAS_CACHE_PROGRAM;
e1c10243
KP
3367 /*
3368 * There are two different 4KiB pagesize chips
3369 * and no way to detect it by H/W config values.
3370 *
3371 * To detect the correct NOP for each chips,
3372 * It should check the version ID as workaround.
3373 *
3374 * Now it has as following
3375 * KFM4G16Q4M has NOP 4 with version ID 0x0131
3376 * KFM4G16Q5M has NOP 1 with versoin ID 0x013e
3377 */
3378 if ((this->version_id & 0xf) == 0xe)
3379 this->options |= ONENAND_HAS_NOP_1;
ac80dac0 3380 }
ee9745fc
KP
3381
3382 case ONENAND_DEVICE_DENSITY_2Gb:
492e1501 3383 /* 2Gb DDP does not have 2 plane */
ee9745fc
KP
3384 if (!ONENAND_IS_DDP(this))
3385 this->options |= ONENAND_HAS_2PLANE;
3386 this->options |= ONENAND_HAS_UNLOCK_ALL;
3387
3388 case ONENAND_DEVICE_DENSITY_1Gb:
28b79ff9 3389 /* A-Die has all block unlock */
ee9745fc 3390 if (process)
28b79ff9 3391 this->options |= ONENAND_HAS_UNLOCK_ALL;
ee9745fc
KP
3392 break;
3393
3394 default:
3395 /* Some OneNAND has continuous lock scheme */
3396 if (!process)
28b79ff9 3397 this->options |= ONENAND_HAS_CONT_LOCK;
ee9745fc 3398 break;
28b79ff9 3399 }
ee9745fc 3400
8a8f632d
KP
3401 /* The MLC has 4KiB pagesize. */
3402 if (ONENAND_IS_MLC(this))
3403 this->options |= ONENAND_HAS_4KB_PAGE;
3404
3405 if (ONENAND_IS_4KB_PAGE(this))
5988af23
RH
3406 this->options &= ~ONENAND_HAS_2PLANE;
3407
3408 if (FLEXONENAND(this)) {
3409 this->options &= ~ONENAND_HAS_CONT_LOCK;
3410 this->options |= ONENAND_HAS_UNLOCK_ALL;
3411 }
3412
ee9745fc
KP
3413 if (this->options & ONENAND_HAS_CONT_LOCK)
3414 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
3415 if (this->options & ONENAND_HAS_UNLOCK_ALL)
3416 printk(KERN_DEBUG "Chip support all block unlock\n");
3417 if (this->options & ONENAND_HAS_2PLANE)
3418 printk(KERN_DEBUG "Chip has 2 plane\n");
6a88c47b
KP
3419 if (this->options & ONENAND_HAS_4KB_PAGE)
3420 printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
ac80dac0
RT
3421 if (this->options & ONENAND_HAS_CACHE_PROGRAM)
3422 printk(KERN_DEBUG "Chip has cache program feature\n");
28b79ff9
KP
3423}
3424
cd5f6346 3425/**
e3da8067 3426 * onenand_print_device_info - Print device & version ID
cd5f6346 3427 * @param device device ID
e3da8067 3428 * @param version version ID
cd5f6346 3429 *
e3da8067 3430 * Print device & version ID
cd5f6346 3431 */
28b79ff9 3432static void onenand_print_device_info(int device, int version)
cd5f6346 3433{
5988af23 3434 int vcc, demuxed, ddp, density, flexonenand;
cd5f6346
KP
3435
3436 vcc = device & ONENAND_DEVICE_VCC_MASK;
3437 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
3438 ddp = device & ONENAND_DEVICE_IS_DDP;
e71f04fc 3439 density = onenand_get_density(device);
5988af23
RH
3440 flexonenand = device & DEVICE_IS_FLEXONENAND;
3441 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
3442 demuxed ? "" : "Muxed ",
3443 flexonenand ? "Flex-" : "",
cd5f6346
KP
3444 ddp ? "(DDP)" : "",
3445 (16 << density),
3446 vcc ? "2.65/3.3" : "1.8",
3447 device);
49dc08ee 3448 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
cd5f6346
KP
3449}
3450
3451static const struct onenand_manufacturers onenand_manuf_ids[] = {
3452 {ONENAND_MFR_SAMSUNG, "Samsung"},
ee8f3768 3453 {ONENAND_MFR_NUMONYX, "Numonyx"},
cd5f6346
KP
3454};
3455
3456/**
3457 * onenand_check_maf - Check manufacturer ID
3458 * @param manuf manufacturer ID
3459 *
3460 * Check manufacturer ID
3461 */
3462static int onenand_check_maf(int manuf)
3463{
37b1cc39
KP
3464 int size = ARRAY_SIZE(onenand_manuf_ids);
3465 char *name;
cd5f6346
KP
3466 int i;
3467
37b1cc39 3468 for (i = 0; i < size; i++)
cd5f6346
KP
3469 if (manuf == onenand_manuf_ids[i].id)
3470 break;
cd5f6346 3471
37b1cc39
KP
3472 if (i < size)
3473 name = onenand_manuf_ids[i].name;
3474 else
3475 name = "Unknown";
3476
3477 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
cd5f6346 3478
37b1cc39 3479 return (i == size);
cd5f6346
KP
3480}
3481
5988af23
RH
3482/**
3483* flexonenand_get_boundary - Reads the SLC boundary
3484* @param onenand_info - onenand info structure
3485**/
3486static int flexonenand_get_boundary(struct mtd_info *mtd)
3487{
3488 struct onenand_chip *this = mtd->priv;
3489 unsigned die, bdry;
6b7368c2 3490 int syscfg, locked;
5988af23
RH
3491
3492 /* Disable ECC */
3493 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3494 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
3495
3496 for (die = 0; die < this->dies; die++) {
3497 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3498 this->wait(mtd, FL_SYNCING);
3499
3500 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
6b7368c2 3501 this->wait(mtd, FL_READING);
5988af23
RH
3502
3503 bdry = this->read_word(this->base + ONENAND_DATARAM);
3504 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
3505 locked = 0;
3506 else
3507 locked = 1;
3508 this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
3509
3510 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
6b7368c2 3511 this->wait(mtd, FL_RESETING);
5988af23
RH
3512
3513 printk(KERN_INFO "Die %d boundary: %d%s\n", die,
3514 this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
3515 }
3516
3517 /* Enable ECC */
3518 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3519 return 0;
3520}
3521
3522/**
3523 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
3524 * boundary[], diesize[], mtd->size, mtd->erasesize
3525 * @param mtd - MTD device structure
3526 */
3527static void flexonenand_get_size(struct mtd_info *mtd)
3528{
3529 struct onenand_chip *this = mtd->priv;
3530 int die, i, eraseshift, density;
3531 int blksperdie, maxbdry;
3532 loff_t ofs;
3533
3534 density = onenand_get_density(this->device_id);
3535 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
3536 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3537 maxbdry = blksperdie - 1;
3538 eraseshift = this->erase_shift - 1;
3539
3540 mtd->numeraseregions = this->dies << 1;
3541
3542 /* This fills up the device boundary */
3543 flexonenand_get_boundary(mtd);
3544 die = ofs = 0;
3545 i = -1;
3546 for (; die < this->dies; die++) {
3547 if (!die || this->boundary[die-1] != maxbdry) {
3548 i++;
3549 mtd->eraseregions[i].offset = ofs;
3550 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3551 mtd->eraseregions[i].numblocks =
3552 this->boundary[die] + 1;
3553 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3554 eraseshift++;
3555 } else {
3556 mtd->numeraseregions -= 1;
3557 mtd->eraseregions[i].numblocks +=
3558 this->boundary[die] + 1;
3559 ofs += (this->boundary[die] + 1) << (eraseshift - 1);
3560 }
3561 if (this->boundary[die] != maxbdry) {
3562 i++;
3563 mtd->eraseregions[i].offset = ofs;
3564 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3565 mtd->eraseregions[i].numblocks = maxbdry ^
3566 this->boundary[die];
3567 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3568 eraseshift--;
3569 } else
3570 mtd->numeraseregions -= 1;
3571 }
3572
3573 /* Expose MLC erase size except when all blocks are SLC */
3574 mtd->erasesize = 1 << this->erase_shift;
3575 if (mtd->numeraseregions == 1)
3576 mtd->erasesize >>= 1;
3577
3578 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
3579 for (i = 0; i < mtd->numeraseregions; i++)
3580 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
3581 " numblocks: %04u]\n",
3582 (unsigned int) mtd->eraseregions[i].offset,
3583 mtd->eraseregions[i].erasesize,
3584 mtd->eraseregions[i].numblocks);
3585
3586 for (die = 0, mtd->size = 0; die < this->dies; die++) {
3587 this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
3588 this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
3589 << (this->erase_shift - 1);
3590 mtd->size += this->diesize[die];
3591 }
3592}
3593
3594/**
3595 * flexonenand_check_blocks_erased - Check if blocks are erased
3596 * @param mtd_info - mtd info structure
3597 * @param start - first erase block to check
3598 * @param end - last erase block to check
3599 *
3600 * Converting an unerased block from MLC to SLC
3601 * causes byte values to change. Since both data and its ECC
3602 * have changed, reads on the block give uncorrectable error.
3603 * This might lead to the block being detected as bad.
3604 *
3605 * Avoid this by ensuring that the block to be converted is
3606 * erased.
3607 */
3608static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
3609{
3610 struct onenand_chip *this = mtd->priv;
3611 int i, ret;
3612 int block;
3613 struct mtd_oob_ops ops = {
0612b9dd 3614 .mode = MTD_OPS_PLACE_OOB,
5988af23
RH
3615 .ooboffs = 0,
3616 .ooblen = mtd->oobsize,
3617 .datbuf = NULL,
3618 .oobbuf = this->oob_buf,
3619 };
3620 loff_t addr;
3621
3622 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
3623
3624 for (block = start; block <= end; block++) {
3625 addr = flexonenand_addr(this, block);
3626 if (onenand_block_isbad_nolock(mtd, addr, 0))
3627 continue;
3628
3629 /*
3630 * Since main area write results in ECC write to spare,
3631 * it is sufficient to check only ECC bytes for change.
3632 */
3633 ret = onenand_read_oob_nolock(mtd, addr, &ops);
3634 if (ret)
3635 return ret;
3636
3637 for (i = 0; i < mtd->oobsize; i++)
3638 if (this->oob_buf[i] != 0xff)
3639 break;
3640
3641 if (i != mtd->oobsize) {
297758f8
AKS
3642 printk(KERN_WARNING "%s: Block %d not erased.\n",
3643 __func__, block);
5988af23
RH
3644 return 1;
3645 }
3646 }
3647
3648 return 0;
3649}
3650
3651/**
3652 * flexonenand_set_boundary - Writes the SLC boundary
3653 * @param mtd - mtd info structure
3654 */
0131950e 3655static int flexonenand_set_boundary(struct mtd_info *mtd, int die,
5988af23
RH
3656 int boundary, int lock)
3657{
3658 struct onenand_chip *this = mtd->priv;
3659 int ret, density, blksperdie, old, new, thisboundary;
3660 loff_t addr;
3661
3662 /* Change only once for SDP Flex-OneNAND */
3663 if (die && (!ONENAND_IS_DDP(this)))
3664 return 0;
3665
3666 /* boundary value of -1 indicates no required change */
3667 if (boundary < 0 || boundary == this->boundary[die])
3668 return 0;
3669
3670 density = onenand_get_density(this->device_id);
3671 blksperdie = ((16 << density) << 20) >> this->erase_shift;
3672 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3673
3674 if (boundary >= blksperdie) {
297758f8
AKS
3675 printk(KERN_ERR "%s: Invalid boundary value. "
3676 "Boundary not changed.\n", __func__);
5988af23
RH
3677 return -EINVAL;
3678 }
3679
3680 /* Check if converting blocks are erased */
3681 old = this->boundary[die] + (die * this->density_mask);
3682 new = boundary + (die * this->density_mask);
3683 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
3684 if (ret) {
297758f8
AKS
3685 printk(KERN_ERR "%s: Please erase blocks "
3686 "before boundary change\n", __func__);
5988af23
RH
3687 return ret;
3688 }
3689
3690 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3691 this->wait(mtd, FL_SYNCING);
3692
3693 /* Check is boundary is locked */
3694 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
6b7368c2 3695 this->wait(mtd, FL_READING);
5988af23
RH
3696
3697 thisboundary = this->read_word(this->base + ONENAND_DATARAM);
3698 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
297758f8 3699 printk(KERN_ERR "%s: boundary locked\n", __func__);
5988af23
RH
3700 ret = 1;
3701 goto out;
3702 }
3703
297758f8 3704 printk(KERN_INFO "Changing die %d boundary: %d%s\n",
5988af23
RH
3705 die, boundary, lock ? "(Locked)" : "(Unlocked)");
3706
3707 addr = die ? this->diesize[0] : 0;
3708
3709 boundary &= FLEXONENAND_PI_MASK;
3710 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
3711
3712 this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
3713 ret = this->wait(mtd, FL_ERASING);
3714 if (ret) {
f369c7ec
MK
3715 printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
3716 __func__, die);
5988af23
RH
3717 goto out;
3718 }
3719
3720 this->write_word(boundary, this->base + ONENAND_DATARAM);
3721 this->command(mtd, ONENAND_CMD_PROG, addr, 0);
3722 ret = this->wait(mtd, FL_WRITING);
3723 if (ret) {
297758f8
AKS
3724 printk(KERN_ERR "%s: Failed PI write for Die %d\n",
3725 __func__, die);
5988af23
RH
3726 goto out;
3727 }
3728
3729 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
3730 ret = this->wait(mtd, FL_WRITING);
3731out:
3732 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
3733 this->wait(mtd, FL_RESETING);
3734 if (!ret)
3735 /* Recalculate device size on boundary change*/
3736 flexonenand_get_size(mtd);
3737
3738 return ret;
3739}
3740
cd5f6346 3741/**
ad0d363b 3742 * onenand_chip_probe - [OneNAND Interface] The generic chip probe
cd5f6346
KP
3743 * @param mtd MTD device structure
3744 *
3745 * OneNAND detection method:
59c51591 3746 * Compare the values from command with ones from register
cd5f6346 3747 */
ad0d363b 3748static int onenand_chip_probe(struct mtd_info *mtd)
cd5f6346
KP
3749{
3750 struct onenand_chip *this = mtd->priv;
ad0d363b 3751 int bram_maf_id, bram_dev_id, maf_id, dev_id;
47e777e0
KP
3752 int syscfg;
3753
3754 /* Save system configuration 1 */
3755 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3756 /* Clear Sync. Burst Read mode to read BootRAM */
ee8f3768 3757 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
cd5f6346
KP
3758
3759 /* Send the command for reading device ID from BootRAM */
3760 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
3761
3762 /* Read manufacturer and device IDs from BootRAM */
3763 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
3764 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
3765
47e777e0
KP
3766 /* Reset OneNAND to read default register values */
3767 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
3768 /* Wait reset */
3769 this->wait(mtd, FL_RESETING);
3770
3771 /* Restore system configuration 1 */
3772 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3773
cd5f6346
KP
3774 /* Check manufacturer ID */
3775 if (onenand_check_maf(bram_maf_id))
3776 return -ENXIO;
3777
cd5f6346
KP
3778 /* Read manufacturer and device IDs from Register */
3779 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3780 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3781
3782 /* Check OneNAND device */
3783 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
3784 return -ENXIO;
3785
ad0d363b
KP
3786 return 0;
3787}
3788
3789/**
3790 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
3791 * @param mtd MTD device structure
3792 */
3793static int onenand_probe(struct mtd_info *mtd)
3794{
3795 struct onenand_chip *this = mtd->priv;
6b7368c2 3796 int dev_id, ver_id;
ad0d363b
KP
3797 int density;
3798 int ret;
3799
3800 ret = this->chip_probe(mtd);
3801 if (ret)
3802 return ret;
3803
6b7368c2 3804 /* Device and version IDs from Register */
ad0d363b
KP
3805 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3806 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
3807 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
3808
cd5f6346 3809 /* Flash device information */
28b79ff9 3810 onenand_print_device_info(dev_id, ver_id);
cd5f6346 3811 this->device_id = dev_id;
28b79ff9 3812 this->version_id = ver_id;
cd5f6346 3813
c37cb56f
KP
3814 /* Check OneNAND features */
3815 onenand_check_features(mtd);
3816
e71f04fc 3817 density = onenand_get_density(dev_id);
5988af23
RH
3818 if (FLEXONENAND(this)) {
3819 this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
3820 /* Maximum possible erase regions */
3821 mtd->numeraseregions = this->dies << 1;
3822 mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
3823 * (this->dies << 1), GFP_KERNEL);
3824 if (!mtd->eraseregions)
3825 return -ENOMEM;
3826 }
3827
3828 /*
3829 * For Flex-OneNAND, chipsize represents maximum possible device size.
3830 * mtd->size represents the actual device size.
3831 */
cd5f6346
KP
3832 this->chipsize = (16 << density) << 20;
3833
3834 /* OneNAND page size & block size */
3835 /* The data buffer size is equal to page size */
28318776 3836 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
5988af23 3837 /* We use the full BufferRAM */
8a8f632d 3838 if (ONENAND_IS_4KB_PAGE(this))
5988af23
RH
3839 mtd->writesize <<= 1;
3840
28318776 3841 mtd->oobsize = mtd->writesize >> 5;
9bfbc9b2 3842 /* Pages per a block are always 64 in OneNAND */
28318776 3843 mtd->erasesize = mtd->writesize << 6;
5988af23
RH
3844 /*
3845 * Flex-OneNAND SLC area has 64 pages per block.
3846 * Flex-OneNAND MLC area has 128 pages per block.
3847 * Expose MLC erase size to find erase_shift and page_mask.
3848 */
3849 if (FLEXONENAND(this))
3850 mtd->erasesize <<= 1;
cd5f6346
KP
3851
3852 this->erase_shift = ffs(mtd->erasesize) - 1;
28318776 3853 this->page_shift = ffs(mtd->writesize) - 1;
9bfbc9b2 3854 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
5988af23
RH
3855 /* Set density mask. it is used for DDP */
3856 if (ONENAND_IS_DDP(this))
3857 this->density_mask = this->chipsize >> (this->erase_shift + 1);
ee9745fc
KP
3858 /* It's real page size */
3859 this->writesize = mtd->writesize;
cd5f6346 3860
492e1501 3861 /* REVISIT: Multichip handling */
cd5f6346 3862
5988af23
RH
3863 if (FLEXONENAND(this))
3864 flexonenand_get_size(mtd);
3865 else
3866 mtd->size = this->chipsize;
cd5f6346 3867
ee9745fc
KP
3868 /*
3869 * We emulate the 4KiB page and 256KiB erase block size
3870 * But oobsize is still 64 bytes.
3871 * It is only valid if you turn on 2X program support,
3872 * Otherwise it will be ignored by compiler.
3873 */
3874 if (ONENAND_IS_2PLANE(this)) {
3875 mtd->writesize <<= 1;
3876 mtd->erasesize <<= 1;
3877 }
3878
cd5f6346
KP
3879 return 0;
3880}
3881
a41371eb
KP
3882/**
3883 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
3884 * @param mtd MTD device structure
3885 */
3886static int onenand_suspend(struct mtd_info *mtd)
3887{
3888 return onenand_get_device(mtd, FL_PM_SUSPENDED);
3889}
3890
3891/**
3892 * onenand_resume - [MTD Interface] Resume the OneNAND flash
3893 * @param mtd MTD device structure
3894 */
3895static void onenand_resume(struct mtd_info *mtd)
3896{
3897 struct onenand_chip *this = mtd->priv;
3898
3899 if (this->state == FL_PM_SUSPENDED)
3900 onenand_release_device(mtd);
3901 else
297758f8
AKS
3902 printk(KERN_ERR "%s: resume() called for the chip which is not "
3903 "in suspended state\n", __func__);
a41371eb
KP
3904}
3905
cd5f6346
KP
3906/**
3907 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
3908 * @param mtd MTD device structure
3909 * @param maxchips Number of chips to scan for
3910 *
3911 * This fills out all the not initialized function pointers
3912 * with the defaults.
3913 * The flash ID is read and the mtd/chip structures are
3914 * filled with the appropriate values.
3915 */
3916int onenand_scan(struct mtd_info *mtd, int maxchips)
3917{
5988af23 3918 int i, ret;
cd5f6346
KP
3919 struct onenand_chip *this = mtd->priv;
3920
3921 if (!this->read_word)
3922 this->read_word = onenand_readw;
3923 if (!this->write_word)
3924 this->write_word = onenand_writew;
3925
3926 if (!this->command)
3927 this->command = onenand_command;
3928 if (!this->wait)
2c22120f 3929 onenand_setup_wait(mtd);
31bb999e
KP
3930 if (!this->bbt_wait)
3931 this->bbt_wait = onenand_bbt_wait;
3932 if (!this->unlock_all)
3933 this->unlock_all = onenand_unlock_all;
cd5f6346 3934
ad0d363b
KP
3935 if (!this->chip_probe)
3936 this->chip_probe = onenand_chip_probe;
3937
cd5f6346
KP
3938 if (!this->read_bufferram)
3939 this->read_bufferram = onenand_read_bufferram;
3940 if (!this->write_bufferram)
3941 this->write_bufferram = onenand_write_bufferram;
3942
cdc00130
KP
3943 if (!this->block_markbad)
3944 this->block_markbad = onenand_default_block_markbad;
3945 if (!this->scan_bbt)
3946 this->scan_bbt = onenand_default_bbt;
3947
cd5f6346
KP
3948 if (onenand_probe(mtd))
3949 return -ENXIO;
3950
52b0eea7
KP
3951 /* Set Sync. Burst Read after probing */
3952 if (this->mmcontrol) {
3953 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
3954 this->read_bufferram = onenand_sync_read_bufferram;
3955 }
3956
532a37cf
KP
3957 /* Allocate buffers, if necessary */
3958 if (!this->page_buf) {
470bc844 3959 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
e4eec195 3960 if (!this->page_buf)
532a37cf 3961 return -ENOMEM;
4a8ce0b0
KP
3962#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
3963 this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL);
3964 if (!this->verify_buf) {
3965 kfree(this->page_buf);
3966 return -ENOMEM;
3967 }
3968#endif
532a37cf
KP
3969 this->options |= ONENAND_PAGEBUF_ALLOC;
3970 }
470bc844
KP
3971 if (!this->oob_buf) {
3972 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
3973 if (!this->oob_buf) {
470bc844
KP
3974 if (this->options & ONENAND_PAGEBUF_ALLOC) {
3975 this->options &= ~ONENAND_PAGEBUF_ALLOC;
3976 kfree(this->page_buf);
3977 }
3978 return -ENOMEM;
3979 }
3980 this->options |= ONENAND_OOBBUF_ALLOC;
3981 }
532a37cf 3982
cd5f6346
KP
3983 this->state = FL_READY;
3984 init_waitqueue_head(&this->wq);
3985 spin_lock_init(&this->chip_lock);
3986
60d84f97
KP
3987 /*
3988 * Allow subpage writes up to oobsize.
3989 */
cd5f6346 3990 switch (mtd->oobsize) {
5988af23 3991 case 128:
99b17c08 3992 if (FLEXONENAND(this)) {
a411679f 3993 mtd_set_ooblayout(mtd, &flexonenand_ooblayout_ops);
99b17c08
RT
3994 mtd->subpage_sft = 0;
3995 } else {
a411679f 3996 mtd_set_ooblayout(mtd, &onenand_oob_128_ooblayout_ops);
99b17c08
RT
3997 mtd->subpage_sft = 2;
3998 }
e1c10243
KP
3999 if (ONENAND_IS_NOP_1(this))
4000 mtd->subpage_sft = 0;
5988af23 4001 break;
cd5f6346 4002 case 64:
a411679f 4003 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops);
60d84f97 4004 mtd->subpage_sft = 2;
cd5f6346
KP
4005 break;
4006
4007 case 32:
a411679f 4008 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops);
60d84f97 4009 mtd->subpage_sft = 1;
cd5f6346
KP
4010 break;
4011
4012 default:
297758f8
AKS
4013 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
4014 __func__, mtd->oobsize);
60d84f97 4015 mtd->subpage_sft = 0;
cd5f6346 4016 /* To prevent kernel oops */
a411679f 4017 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops);
cd5f6346
KP
4018 break;
4019 }
4020
60d84f97 4021 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
a5e7c7b4
AH
4022
4023 /*
4024 * The number of bytes available for a client to place data into
4025 * the out of band area
4026 */
d30aae6d
BB
4027 ret = mtd_ooblayout_count_freebytes(mtd);
4028 if (ret < 0)
4029 ret = 0;
4030
4031 mtd->oobavail = ret;
a5e7c7b4 4032
6a918bad 4033 mtd->ecc_strength = 1;
d5c5e78a 4034
cd5f6346 4035 /* Fill in remaining MTD driver data */
c7626802 4036 mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH;
5fa43394 4037 mtd->flags = MTD_CAP_NANDFLASH;
3c3c10bb
AB
4038 mtd->_erase = onenand_erase;
4039 mtd->_point = NULL;
4040 mtd->_unpoint = NULL;
4041 mtd->_read = onenand_read;
4042 mtd->_write = onenand_write;
4043 mtd->_read_oob = onenand_read_oob;
4044 mtd->_write_oob = onenand_write_oob;
4045 mtd->_panic_write = onenand_panic_write;
493c6460 4046#ifdef CONFIG_MTD_ONENAND_OTP
3c3c10bb
AB
4047 mtd->_get_fact_prot_info = onenand_get_fact_prot_info;
4048 mtd->_read_fact_prot_reg = onenand_read_fact_prot_reg;
4049 mtd->_get_user_prot_info = onenand_get_user_prot_info;
4050 mtd->_read_user_prot_reg = onenand_read_user_prot_reg;
4051 mtd->_write_user_prot_reg = onenand_write_user_prot_reg;
4052 mtd->_lock_user_prot_reg = onenand_lock_user_prot_reg;
493c6460 4053#endif
3c3c10bb
AB
4054 mtd->_sync = onenand_sync;
4055 mtd->_lock = onenand_lock;
4056 mtd->_unlock = onenand_unlock;
4057 mtd->_suspend = onenand_suspend;
4058 mtd->_resume = onenand_resume;
4059 mtd->_block_isbad = onenand_block_isbad;
4060 mtd->_block_markbad = onenand_block_markbad;
cd5f6346 4061 mtd->owner = THIS_MODULE;
25dcd297 4062 mtd->writebufsize = mtd->writesize;
cd5f6346
KP
4063
4064 /* Unlock whole block */
b3dcfd35
RT
4065 if (!(this->options & ONENAND_SKIP_INITIAL_UNLOCKING))
4066 this->unlock_all(mtd);
cd5f6346 4067
5988af23
RH
4068 ret = this->scan_bbt(mtd);
4069 if ((!FLEXONENAND(this)) || ret)
4070 return ret;
4071
4072 /* Change Flex-OneNAND boundaries if required */
4073 for (i = 0; i < MAX_DIES; i++)
4074 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
4075 flex_bdry[(2 * i) + 1]);
4076
4077 return 0;
cd5f6346
KP
4078}
4079
4080/**
4081 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
4082 * @param mtd MTD device structure
4083 */
4084void onenand_release(struct mtd_info *mtd)
4085{
532a37cf
KP
4086 struct onenand_chip *this = mtd->priv;
4087
cd5f6346 4088 /* Deregister partitions */
711a632d 4089 mtd_device_unregister(mtd);
532a37cf
KP
4090
4091 /* Free bad block table memory, if allocated */
f00b0046
AH
4092 if (this->bbm) {
4093 struct bbm_info *bbm = this->bbm;
4094 kfree(bbm->bbt);
532a37cf 4095 kfree(this->bbm);
f00b0046 4096 }
470bc844 4097 /* Buffers allocated by onenand_scan */
4a8ce0b0 4098 if (this->options & ONENAND_PAGEBUF_ALLOC) {
532a37cf 4099 kfree(this->page_buf);
4a8ce0b0
KP
4100#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
4101 kfree(this->verify_buf);
4102#endif
4103 }
470bc844
KP
4104 if (this->options & ONENAND_OOBBUF_ALLOC)
4105 kfree(this->oob_buf);
5988af23 4106 kfree(mtd->eraseregions);
cd5f6346
KP
4107}
4108
4109EXPORT_SYMBOL_GPL(onenand_scan);
4110EXPORT_SYMBOL_GPL(onenand_release);
4111
4112MODULE_LICENSE("GPL");
4113MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
4114MODULE_DESCRIPTION("Generic OneNAND flash driver code");