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cd5f6346 KP |
1 | /* |
2 | * linux/drivers/mtd/onenand/onenand_base.c | |
3 | * | |
3cf60253 AKS |
4 | * Copyright © 2005-2009 Samsung Electronics |
5 | * Copyright © 2007 Nokia Corporation | |
6 | * | |
cd5f6346 KP |
7 | * Kyungmin Park <kyungmin.park@samsung.com> |
8 | * | |
81280d58 AH |
9 | * Credits: |
10 | * Adrian Hunter <ext-adrian.hunter@nokia.com>: | |
11 | * auto-placement support, read-while load support, various fixes | |
81280d58 | 12 | * |
5988af23 RH |
13 | * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com> |
14 | * Flex-OneNAND support | |
3cf60253 AKS |
15 | * Amul Kumar Saha <amul.saha at samsung.com> |
16 | * OTP support | |
5988af23 | 17 | * |
cd5f6346 KP |
18 | * This program is free software; you can redistribute it and/or modify |
19 | * it under the terms of the GNU General Public License version 2 as | |
20 | * published by the Free Software Foundation. | |
21 | */ | |
22 | ||
23 | #include <linux/kernel.h> | |
24 | #include <linux/module.h> | |
c90173f0 | 25 | #include <linux/moduleparam.h> |
5a0e3ad6 | 26 | #include <linux/slab.h> |
cd5f6346 | 27 | #include <linux/init.h> |
015953d7 | 28 | #include <linux/sched.h> |
6c77fd64 | 29 | #include <linux/delay.h> |
2c22120f | 30 | #include <linux/interrupt.h> |
015953d7 | 31 | #include <linux/jiffies.h> |
cd5f6346 KP |
32 | #include <linux/mtd/mtd.h> |
33 | #include <linux/mtd/onenand.h> | |
34 | #include <linux/mtd/partitions.h> | |
35 | ||
36 | #include <asm/io.h> | |
37 | ||
72073027 MK |
38 | /* |
39 | * Multiblock erase if number of blocks to erase is 2 or more. | |
40 | * Maximum number of blocks for simultaneous erase is 64. | |
41 | */ | |
42 | #define MB_ERASE_MIN_BLK_COUNT 2 | |
43 | #define MB_ERASE_MAX_BLK_COUNT 64 | |
44 | ||
5988af23 RH |
45 | /* Default Flex-OneNAND boundary and lock respectively */ |
46 | static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 }; | |
47 | ||
c90173f0 AS |
48 | module_param_array(flex_bdry, int, NULL, 0400); |
49 | MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND" | |
50 | "Syntax:flex_bdry=DIE_BDRY,LOCK,..." | |
51 | "DIE_BDRY: SLC boundary of the die" | |
52 | "LOCK: Locking information for SLC boundary" | |
53 | " : 0->Set boundary in unlocked status" | |
54 | " : 1->Set boundary in locked status"); | |
55 | ||
3cf60253 AKS |
56 | /* Default OneNAND/Flex-OneNAND OTP options*/ |
57 | static int otp; | |
58 | ||
59 | module_param(otp, int, 0400); | |
60 | MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP" | |
61 | "Syntax : otp=LOCK_TYPE" | |
62 | "LOCK_TYPE : Keys issued, for specific OTP Lock type" | |
63 | " : 0 -> Default (No Blocks Locked)" | |
64 | " : 1 -> OTP Block lock" | |
65 | " : 2 -> 1st Block lock" | |
66 | " : 3 -> BOTH OTP Block and 1st Block lock"); | |
67 | ||
5988af23 RH |
68 | /** |
69 | * onenand_oob_128 - oob info for Flex-Onenand with 4KB page | |
70 | * For now, we expose only 64 out of 80 ecc bytes | |
71 | */ | |
72 | static struct nand_ecclayout onenand_oob_128 = { | |
73 | .eccbytes = 64, | |
74 | .eccpos = { | |
75 | 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, | |
76 | 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, | |
77 | 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, | |
78 | 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, | |
79 | 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, | |
80 | 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, | |
81 | 102, 103, 104, 105 | |
82 | }, | |
83 | .oobfree = { | |
84 | {2, 4}, {18, 4}, {34, 4}, {50, 4}, | |
85 | {66, 4}, {82, 4}, {98, 4}, {114, 4} | |
86 | } | |
87 | }; | |
88 | ||
cd5f6346 KP |
89 | /** |
90 | * onenand_oob_64 - oob info for large (2KB) page | |
91 | */ | |
5bd34c09 | 92 | static struct nand_ecclayout onenand_oob_64 = { |
cd5f6346 KP |
93 | .eccbytes = 20, |
94 | .eccpos = { | |
95 | 8, 9, 10, 11, 12, | |
96 | 24, 25, 26, 27, 28, | |
97 | 40, 41, 42, 43, 44, | |
98 | 56, 57, 58, 59, 60, | |
99 | }, | |
100 | .oobfree = { | |
101 | {2, 3}, {14, 2}, {18, 3}, {30, 2}, | |
d9777f1c JL |
102 | {34, 3}, {46, 2}, {50, 3}, {62, 2} |
103 | } | |
cd5f6346 KP |
104 | }; |
105 | ||
106 | /** | |
107 | * onenand_oob_32 - oob info for middle (1KB) page | |
108 | */ | |
5bd34c09 | 109 | static struct nand_ecclayout onenand_oob_32 = { |
cd5f6346 KP |
110 | .eccbytes = 10, |
111 | .eccpos = { | |
112 | 8, 9, 10, 11, 12, | |
113 | 24, 25, 26, 27, 28, | |
114 | }, | |
115 | .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } | |
116 | }; | |
117 | ||
118 | static const unsigned char ffchars[] = { | |
119 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
120 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ | |
121 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
122 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ | |
123 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
124 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ | |
125 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
126 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ | |
5988af23 RH |
127 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
128 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */ | |
129 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
130 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */ | |
131 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
132 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */ | |
133 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
134 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */ | |
cd5f6346 KP |
135 | }; |
136 | ||
137 | /** | |
138 | * onenand_readw - [OneNAND Interface] Read OneNAND register | |
139 | * @param addr address to read | |
140 | * | |
141 | * Read OneNAND register | |
142 | */ | |
143 | static unsigned short onenand_readw(void __iomem *addr) | |
144 | { | |
145 | return readw(addr); | |
146 | } | |
147 | ||
148 | /** | |
149 | * onenand_writew - [OneNAND Interface] Write OneNAND register with value | |
150 | * @param value value to write | |
151 | * @param addr address to write | |
152 | * | |
153 | * Write OneNAND register with value | |
154 | */ | |
155 | static void onenand_writew(unsigned short value, void __iomem *addr) | |
156 | { | |
157 | writew(value, addr); | |
158 | } | |
159 | ||
160 | /** | |
161 | * onenand_block_address - [DEFAULT] Get block address | |
83a36838 | 162 | * @param this onenand chip data structure |
cd5f6346 KP |
163 | * @param block the block |
164 | * @return translated block address if DDP, otherwise same | |
165 | * | |
166 | * Setup Start Address 1 Register (F100h) | |
167 | */ | |
83a36838 | 168 | static int onenand_block_address(struct onenand_chip *this, int block) |
cd5f6346 | 169 | { |
738d61f5 KP |
170 | /* Device Flash Core select, NAND Flash Block Address */ |
171 | if (block & this->density_mask) | |
172 | return ONENAND_DDP_CHIP1 | (block ^ this->density_mask); | |
cd5f6346 KP |
173 | |
174 | return block; | |
175 | } | |
176 | ||
177 | /** | |
178 | * onenand_bufferram_address - [DEFAULT] Get bufferram address | |
83a36838 | 179 | * @param this onenand chip data structure |
cd5f6346 KP |
180 | * @param block the block |
181 | * @return set DBS value if DDP, otherwise 0 | |
182 | * | |
183 | * Setup Start Address 2 Register (F101h) for DDP | |
184 | */ | |
83a36838 | 185 | static int onenand_bufferram_address(struct onenand_chip *this, int block) |
cd5f6346 | 186 | { |
738d61f5 KP |
187 | /* Device BufferRAM Select */ |
188 | if (block & this->density_mask) | |
189 | return ONENAND_DDP_CHIP1; | |
cd5f6346 | 190 | |
738d61f5 | 191 | return ONENAND_DDP_CHIP0; |
cd5f6346 KP |
192 | } |
193 | ||
194 | /** | |
195 | * onenand_page_address - [DEFAULT] Get page address | |
196 | * @param page the page address | |
197 | * @param sector the sector address | |
198 | * @return combined page and sector address | |
199 | * | |
200 | * Setup Start Address 8 Register (F107h) | |
201 | */ | |
202 | static int onenand_page_address(int page, int sector) | |
203 | { | |
204 | /* Flash Page Address, Flash Sector Address */ | |
205 | int fpa, fsa; | |
206 | ||
207 | fpa = page & ONENAND_FPA_MASK; | |
208 | fsa = sector & ONENAND_FSA_MASK; | |
209 | ||
210 | return ((fpa << ONENAND_FPA_SHIFT) | fsa); | |
211 | } | |
212 | ||
213 | /** | |
214 | * onenand_buffer_address - [DEFAULT] Get buffer address | |
215 | * @param dataram1 DataRAM index | |
216 | * @param sectors the sector address | |
217 | * @param count the number of sectors | |
218 | * @return the start buffer value | |
219 | * | |
220 | * Setup Start Buffer Register (F200h) | |
221 | */ | |
222 | static int onenand_buffer_address(int dataram1, int sectors, int count) | |
223 | { | |
224 | int bsa, bsc; | |
225 | ||
226 | /* BufferRAM Sector Address */ | |
227 | bsa = sectors & ONENAND_BSA_MASK; | |
228 | ||
229 | if (dataram1) | |
230 | bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ | |
231 | else | |
232 | bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ | |
233 | ||
234 | /* BufferRAM Sector Count */ | |
235 | bsc = count & ONENAND_BSC_MASK; | |
236 | ||
237 | return ((bsa << ONENAND_BSA_SHIFT) | bsc); | |
238 | } | |
239 | ||
5988af23 RH |
240 | /** |
241 | * flexonenand_block- For given address return block number | |
242 | * @param this - OneNAND device structure | |
243 | * @param addr - Address for which block number is needed | |
244 | */ | |
245 | static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr) | |
246 | { | |
247 | unsigned boundary, blk, die = 0; | |
248 | ||
249 | if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) { | |
250 | die = 1; | |
251 | addr -= this->diesize[0]; | |
252 | } | |
253 | ||
254 | boundary = this->boundary[die]; | |
255 | ||
256 | blk = addr >> (this->erase_shift - 1); | |
257 | if (blk > boundary) | |
258 | blk = (blk + boundary + 1) >> 1; | |
259 | ||
260 | blk += die ? this->density_mask : 0; | |
261 | return blk; | |
262 | } | |
263 | ||
264 | inline unsigned onenand_block(struct onenand_chip *this, loff_t addr) | |
265 | { | |
266 | if (!FLEXONENAND(this)) | |
267 | return addr >> this->erase_shift; | |
268 | return flexonenand_block(this, addr); | |
269 | } | |
270 | ||
271 | /** | |
272 | * flexonenand_addr - Return address of the block | |
273 | * @this: OneNAND device structure | |
274 | * @block: Block number on Flex-OneNAND | |
275 | * | |
276 | * Return address of the block | |
277 | */ | |
278 | static loff_t flexonenand_addr(struct onenand_chip *this, int block) | |
279 | { | |
280 | loff_t ofs = 0; | |
281 | int die = 0, boundary; | |
282 | ||
283 | if (ONENAND_IS_DDP(this) && block >= this->density_mask) { | |
284 | block -= this->density_mask; | |
285 | die = 1; | |
286 | ofs = this->diesize[0]; | |
287 | } | |
288 | ||
289 | boundary = this->boundary[die]; | |
290 | ofs += (loff_t)block << (this->erase_shift - 1); | |
291 | if (block > (boundary + 1)) | |
292 | ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1); | |
293 | return ofs; | |
294 | } | |
295 | ||
296 | loff_t onenand_addr(struct onenand_chip *this, int block) | |
297 | { | |
298 | if (!FLEXONENAND(this)) | |
299 | return (loff_t)block << this->erase_shift; | |
300 | return flexonenand_addr(this, block); | |
301 | } | |
302 | EXPORT_SYMBOL(onenand_addr); | |
303 | ||
e71f04fc KP |
304 | /** |
305 | * onenand_get_density - [DEFAULT] Get OneNAND density | |
306 | * @param dev_id OneNAND device ID | |
307 | * | |
308 | * Get OneNAND density from device ID | |
309 | */ | |
310 | static inline int onenand_get_density(int dev_id) | |
311 | { | |
312 | int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; | |
313 | return (density & ONENAND_DEVICE_DENSITY_MASK); | |
314 | } | |
315 | ||
5988af23 RH |
316 | /** |
317 | * flexonenand_region - [Flex-OneNAND] Return erase region of addr | |
318 | * @param mtd MTD device structure | |
319 | * @param addr address whose erase region needs to be identified | |
320 | */ | |
321 | int flexonenand_region(struct mtd_info *mtd, loff_t addr) | |
322 | { | |
323 | int i; | |
324 | ||
325 | for (i = 0; i < mtd->numeraseregions; i++) | |
326 | if (addr < mtd->eraseregions[i].offset) | |
327 | break; | |
328 | return i - 1; | |
329 | } | |
330 | EXPORT_SYMBOL(flexonenand_region); | |
331 | ||
cd5f6346 KP |
332 | /** |
333 | * onenand_command - [DEFAULT] Send command to OneNAND device | |
334 | * @param mtd MTD device structure | |
335 | * @param cmd the command to be sent | |
336 | * @param addr offset to read from or write to | |
337 | * @param len number of bytes to read or write | |
338 | * | |
339 | * Send command to OneNAND device. This function is used for middle/large page | |
340 | * devices (1KB/2KB Bytes per page) | |
341 | */ | |
342 | static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len) | |
343 | { | |
344 | struct onenand_chip *this = mtd->priv; | |
b21b72cf | 345 | int value, block, page; |
cd5f6346 KP |
346 | |
347 | /* Address translation */ | |
348 | switch (cmd) { | |
349 | case ONENAND_CMD_UNLOCK: | |
350 | case ONENAND_CMD_LOCK: | |
351 | case ONENAND_CMD_LOCK_TIGHT: | |
28b79ff9 | 352 | case ONENAND_CMD_UNLOCK_ALL: |
cd5f6346 KP |
353 | block = -1; |
354 | page = -1; | |
355 | break; | |
356 | ||
5988af23 RH |
357 | case FLEXONENAND_CMD_PI_ACCESS: |
358 | /* addr contains die index */ | |
359 | block = addr * this->density_mask; | |
360 | page = -1; | |
361 | break; | |
362 | ||
cd5f6346 | 363 | case ONENAND_CMD_ERASE: |
72073027 MK |
364 | case ONENAND_CMD_MULTIBLOCK_ERASE: |
365 | case ONENAND_CMD_ERASE_VERIFY: | |
cd5f6346 | 366 | case ONENAND_CMD_BUFFERRAM: |
493c6460 | 367 | case ONENAND_CMD_OTP_ACCESS: |
5988af23 | 368 | block = onenand_block(this, addr); |
cd5f6346 KP |
369 | page = -1; |
370 | break; | |
371 | ||
5988af23 RH |
372 | case FLEXONENAND_CMD_READ_PI: |
373 | cmd = ONENAND_CMD_READ; | |
374 | block = addr * this->density_mask; | |
375 | page = 0; | |
376 | break; | |
377 | ||
cd5f6346 | 378 | default: |
5988af23 RH |
379 | block = onenand_block(this, addr); |
380 | page = (int) (addr - onenand_addr(this, block)) >> this->page_shift; | |
ee9745fc KP |
381 | |
382 | if (ONENAND_IS_2PLANE(this)) { | |
383 | /* Make the even block number */ | |
384 | block &= ~1; | |
385 | /* Is it the odd plane? */ | |
386 | if (addr & this->writesize) | |
387 | block++; | |
388 | page >>= 1; | |
389 | } | |
cd5f6346 KP |
390 | page &= this->page_mask; |
391 | break; | |
392 | } | |
393 | ||
394 | /* NOTE: The setting order of the registers is very important! */ | |
395 | if (cmd == ONENAND_CMD_BUFFERRAM) { | |
396 | /* Select DataRAM for DDP */ | |
83a36838 | 397 | value = onenand_bufferram_address(this, block); |
cd5f6346 KP |
398 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); |
399 | ||
5988af23 | 400 | if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this)) |
ee9745fc KP |
401 | /* It is always BufferRAM0 */ |
402 | ONENAND_SET_BUFFERRAM0(this); | |
403 | else | |
404 | /* Switch to the next data buffer */ | |
405 | ONENAND_SET_NEXT_BUFFERRAM(this); | |
cd5f6346 KP |
406 | |
407 | return 0; | |
408 | } | |
409 | ||
410 | if (block != -1) { | |
411 | /* Write 'DFS, FBA' of Flash */ | |
83a36838 | 412 | value = onenand_block_address(this, block); |
cd5f6346 | 413 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); |
3cecf69e | 414 | |
b21b72cf KP |
415 | /* Select DataRAM for DDP */ |
416 | value = onenand_bufferram_address(this, block); | |
417 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); | |
cd5f6346 KP |
418 | } |
419 | ||
420 | if (page != -1) { | |
60d84f97 | 421 | /* Now we use page size operation */ |
5988af23 | 422 | int sectors = 0, count = 0; |
cd5f6346 KP |
423 | int dataram; |
424 | ||
425 | switch (cmd) { | |
5988af23 | 426 | case FLEXONENAND_CMD_RECOVER_LSB: |
cd5f6346 KP |
427 | case ONENAND_CMD_READ: |
428 | case ONENAND_CMD_READOOB: | |
5988af23 RH |
429 | if (ONENAND_IS_MLC(this)) |
430 | /* It is always BufferRAM0 */ | |
431 | dataram = ONENAND_SET_BUFFERRAM0(this); | |
432 | else | |
433 | dataram = ONENAND_SET_NEXT_BUFFERRAM(this); | |
cd5f6346 KP |
434 | break; |
435 | ||
436 | default: | |
ee9745fc KP |
437 | if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) |
438 | cmd = ONENAND_CMD_2X_PROG; | |
cd5f6346 KP |
439 | dataram = ONENAND_CURRENT_BUFFERRAM(this); |
440 | break; | |
441 | } | |
442 | ||
443 | /* Write 'FPA, FSA' of Flash */ | |
444 | value = onenand_page_address(page, sectors); | |
445 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8); | |
446 | ||
447 | /* Write 'BSA, BSC' of DataRAM */ | |
448 | value = onenand_buffer_address(dataram, sectors, count); | |
449 | this->write_word(value, this->base + ONENAND_REG_START_BUFFER); | |
cd5f6346 KP |
450 | } |
451 | ||
452 | /* Interrupt clear */ | |
453 | this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); | |
454 | ||
455 | /* Write command */ | |
456 | this->write_word(cmd, this->base + ONENAND_REG_COMMAND); | |
457 | ||
458 | return 0; | |
459 | } | |
460 | ||
5988af23 RH |
461 | /** |
462 | * onenand_read_ecc - return ecc status | |
463 | * @param this onenand chip structure | |
464 | */ | |
465 | static inline int onenand_read_ecc(struct onenand_chip *this) | |
466 | { | |
467 | int ecc, i, result = 0; | |
468 | ||
469 | if (!FLEXONENAND(this)) | |
470 | return this->read_word(this->base + ONENAND_REG_ECC_STATUS); | |
471 | ||
472 | for (i = 0; i < 4; i++) { | |
473 | ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i); | |
474 | if (likely(!ecc)) | |
475 | continue; | |
476 | if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR) | |
477 | return ONENAND_ECC_2BIT_ALL; | |
478 | else | |
479 | result = ONENAND_ECC_1BIT_ALL; | |
480 | } | |
481 | ||
482 | return result; | |
483 | } | |
484 | ||
cd5f6346 KP |
485 | /** |
486 | * onenand_wait - [DEFAULT] wait until the command is done | |
487 | * @param mtd MTD device structure | |
488 | * @param state state to select the max. timeout value | |
489 | * | |
490 | * Wait for command done. This applies to all OneNAND command | |
491 | * Read can take up to 30us, erase up to 2ms and program up to 350us | |
492 | * according to general OneNAND specs | |
493 | */ | |
494 | static int onenand_wait(struct mtd_info *mtd, int state) | |
495 | { | |
496 | struct onenand_chip * this = mtd->priv; | |
497 | unsigned long timeout; | |
498 | unsigned int flags = ONENAND_INT_MASTER; | |
499 | unsigned int interrupt = 0; | |
2fd32d4a | 500 | unsigned int ctrl; |
cd5f6346 KP |
501 | |
502 | /* The 20 msec is enough */ | |
503 | timeout = jiffies + msecs_to_jiffies(20); | |
504 | while (time_before(jiffies, timeout)) { | |
505 | interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); | |
506 | ||
507 | if (interrupt & flags) | |
508 | break; | |
509 | ||
72073027 | 510 | if (state != FL_READING && state != FL_PREPARING_ERASE) |
cd5f6346 KP |
511 | cond_resched(); |
512 | } | |
513 | /* To get correct interrupt status in timeout case */ | |
514 | interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); | |
515 | ||
516 | ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); | |
517 | ||
83973b87 KP |
518 | /* |
519 | * In the Spec. it checks the controller status first | |
520 | * However if you get the correct information in case of | |
521 | * power off recovery (POR) test, it should read ECC status first | |
522 | */ | |
cd5f6346 | 523 | if (interrupt & ONENAND_INT_READ) { |
5988af23 | 524 | int ecc = onenand_read_ecc(this); |
f4f91ac3 | 525 | if (ecc) { |
b3c9f8bf | 526 | if (ecc & ONENAND_ECC_2BIT_ALL) { |
297758f8 AKS |
527 | printk(KERN_ERR "%s: ECC error = 0x%04x\n", |
528 | __func__, ecc); | |
f4f91ac3 | 529 | mtd->ecc_stats.failed++; |
30a7eb29 | 530 | return -EBADMSG; |
49dc08ee | 531 | } else if (ecc & ONENAND_ECC_1BIT_ALL) { |
297758f8 AKS |
532 | printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n", |
533 | __func__, ecc); | |
f4f91ac3 | 534 | mtd->ecc_stats.corrected++; |
49dc08ee | 535 | } |
cd5f6346 | 536 | } |
9d032801 | 537 | } else if (state == FL_READING) { |
297758f8 AKS |
538 | printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n", |
539 | __func__, ctrl, interrupt); | |
9d032801 | 540 | return -EIO; |
cd5f6346 KP |
541 | } |
542 | ||
72073027 MK |
543 | if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) { |
544 | printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n", | |
545 | __func__, ctrl, interrupt); | |
546 | return -EIO; | |
547 | } | |
548 | ||
549 | if (!(interrupt & ONENAND_INT_MASTER)) { | |
550 | printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n", | |
551 | __func__, ctrl, interrupt); | |
552 | return -EIO; | |
553 | } | |
554 | ||
83973b87 KP |
555 | /* If there's controller error, it's a real error */ |
556 | if (ctrl & ONENAND_CTRL_ERROR) { | |
297758f8 AKS |
557 | printk(KERN_ERR "%s: controller error = 0x%04x\n", |
558 | __func__, ctrl); | |
83973b87 | 559 | if (ctrl & ONENAND_CTRL_LOCK) |
297758f8 | 560 | printk(KERN_ERR "%s: it's locked error.\n", __func__); |
83973b87 KP |
561 | return -EIO; |
562 | } | |
563 | ||
cd5f6346 KP |
564 | return 0; |
565 | } | |
566 | ||
2c22120f KP |
567 | /* |
568 | * onenand_interrupt - [DEFAULT] onenand interrupt handler | |
569 | * @param irq onenand interrupt number | |
570 | * @param dev_id interrupt data | |
571 | * | |
572 | * complete the work | |
573 | */ | |
574 | static irqreturn_t onenand_interrupt(int irq, void *data) | |
575 | { | |
06efcad0 | 576 | struct onenand_chip *this = data; |
2c22120f KP |
577 | |
578 | /* To handle shared interrupt */ | |
579 | if (!this->complete.done) | |
580 | complete(&this->complete); | |
581 | ||
582 | return IRQ_HANDLED; | |
583 | } | |
584 | ||
585 | /* | |
586 | * onenand_interrupt_wait - [DEFAULT] wait until the command is done | |
587 | * @param mtd MTD device structure | |
588 | * @param state state to select the max. timeout value | |
589 | * | |
590 | * Wait for command done. | |
591 | */ | |
592 | static int onenand_interrupt_wait(struct mtd_info *mtd, int state) | |
593 | { | |
594 | struct onenand_chip *this = mtd->priv; | |
595 | ||
2c22120f KP |
596 | wait_for_completion(&this->complete); |
597 | ||
598 | return onenand_wait(mtd, state); | |
599 | } | |
600 | ||
601 | /* | |
602 | * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait | |
603 | * @param mtd MTD device structure | |
604 | * @param state state to select the max. timeout value | |
605 | * | |
606 | * Try interrupt based wait (It is used one-time) | |
607 | */ | |
608 | static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state) | |
609 | { | |
610 | struct onenand_chip *this = mtd->priv; | |
611 | unsigned long remain, timeout; | |
612 | ||
613 | /* We use interrupt wait first */ | |
614 | this->wait = onenand_interrupt_wait; | |
615 | ||
2c22120f KP |
616 | timeout = msecs_to_jiffies(100); |
617 | remain = wait_for_completion_timeout(&this->complete, timeout); | |
618 | if (!remain) { | |
619 | printk(KERN_INFO "OneNAND: There's no interrupt. " | |
620 | "We use the normal wait\n"); | |
621 | ||
622 | /* Release the irq */ | |
623 | free_irq(this->irq, this); | |
c9ac5977 | 624 | |
2c22120f KP |
625 | this->wait = onenand_wait; |
626 | } | |
627 | ||
628 | return onenand_wait(mtd, state); | |
629 | } | |
630 | ||
631 | /* | |
632 | * onenand_setup_wait - [OneNAND Interface] setup onenand wait method | |
633 | * @param mtd MTD device structure | |
634 | * | |
635 | * There's two method to wait onenand work | |
636 | * 1. polling - read interrupt status register | |
637 | * 2. interrupt - use the kernel interrupt method | |
638 | */ | |
639 | static void onenand_setup_wait(struct mtd_info *mtd) | |
640 | { | |
641 | struct onenand_chip *this = mtd->priv; | |
642 | int syscfg; | |
643 | ||
644 | init_completion(&this->complete); | |
645 | ||
646 | if (this->irq <= 0) { | |
647 | this->wait = onenand_wait; | |
648 | return; | |
649 | } | |
650 | ||
651 | if (request_irq(this->irq, &onenand_interrupt, | |
652 | IRQF_SHARED, "onenand", this)) { | |
653 | /* If we can't get irq, use the normal wait */ | |
654 | this->wait = onenand_wait; | |
655 | return; | |
656 | } | |
657 | ||
658 | /* Enable interrupt */ | |
659 | syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); | |
660 | syscfg |= ONENAND_SYS_CFG1_IOBE; | |
661 | this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); | |
662 | ||
663 | this->wait = onenand_try_interrupt_wait; | |
664 | } | |
665 | ||
cd5f6346 KP |
666 | /** |
667 | * onenand_bufferram_offset - [DEFAULT] BufferRAM offset | |
668 | * @param mtd MTD data structure | |
669 | * @param area BufferRAM area | |
670 | * @return offset given area | |
671 | * | |
672 | * Return BufferRAM offset given area | |
673 | */ | |
674 | static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) | |
675 | { | |
676 | struct onenand_chip *this = mtd->priv; | |
677 | ||
678 | if (ONENAND_CURRENT_BUFFERRAM(this)) { | |
ee9745fc | 679 | /* Note: the 'this->writesize' is a real page size */ |
cd5f6346 | 680 | if (area == ONENAND_DATARAM) |
ee9745fc | 681 | return this->writesize; |
cd5f6346 KP |
682 | if (area == ONENAND_SPARERAM) |
683 | return mtd->oobsize; | |
684 | } | |
685 | ||
686 | return 0; | |
687 | } | |
688 | ||
689 | /** | |
690 | * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area | |
691 | * @param mtd MTD data structure | |
692 | * @param area BufferRAM area | |
693 | * @param buffer the databuffer to put/get data | |
694 | * @param offset offset to read from or write to | |
695 | * @param count number of bytes to read/write | |
696 | * | |
697 | * Read the BufferRAM area | |
698 | */ | |
699 | static int onenand_read_bufferram(struct mtd_info *mtd, int area, | |
700 | unsigned char *buffer, int offset, size_t count) | |
701 | { | |
702 | struct onenand_chip *this = mtd->priv; | |
703 | void __iomem *bufferram; | |
704 | ||
705 | bufferram = this->base + area; | |
706 | ||
707 | bufferram += onenand_bufferram_offset(mtd, area); | |
708 | ||
9c01f87d KP |
709 | if (ONENAND_CHECK_BYTE_ACCESS(count)) { |
710 | unsigned short word; | |
711 | ||
712 | /* Align with word(16-bit) size */ | |
713 | count--; | |
714 | ||
715 | /* Read word and save byte */ | |
716 | word = this->read_word(bufferram + offset + count); | |
717 | buffer[count] = (word & 0xff); | |
718 | } | |
719 | ||
cd5f6346 KP |
720 | memcpy(buffer, bufferram + offset, count); |
721 | ||
722 | return 0; | |
723 | } | |
724 | ||
52b0eea7 KP |
725 | /** |
726 | * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode | |
727 | * @param mtd MTD data structure | |
728 | * @param area BufferRAM area | |
729 | * @param buffer the databuffer to put/get data | |
730 | * @param offset offset to read from or write to | |
731 | * @param count number of bytes to read/write | |
732 | * | |
733 | * Read the BufferRAM area with Sync. Burst Mode | |
734 | */ | |
735 | static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, | |
736 | unsigned char *buffer, int offset, size_t count) | |
737 | { | |
738 | struct onenand_chip *this = mtd->priv; | |
739 | void __iomem *bufferram; | |
740 | ||
741 | bufferram = this->base + area; | |
742 | ||
743 | bufferram += onenand_bufferram_offset(mtd, area); | |
744 | ||
745 | this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); | |
746 | ||
9c01f87d KP |
747 | if (ONENAND_CHECK_BYTE_ACCESS(count)) { |
748 | unsigned short word; | |
749 | ||
750 | /* Align with word(16-bit) size */ | |
751 | count--; | |
752 | ||
753 | /* Read word and save byte */ | |
754 | word = this->read_word(bufferram + offset + count); | |
755 | buffer[count] = (word & 0xff); | |
756 | } | |
757 | ||
52b0eea7 KP |
758 | memcpy(buffer, bufferram + offset, count); |
759 | ||
760 | this->mmcontrol(mtd, 0); | |
761 | ||
762 | return 0; | |
763 | } | |
764 | ||
cd5f6346 KP |
765 | /** |
766 | * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area | |
767 | * @param mtd MTD data structure | |
768 | * @param area BufferRAM area | |
769 | * @param buffer the databuffer to put/get data | |
770 | * @param offset offset to read from or write to | |
771 | * @param count number of bytes to read/write | |
772 | * | |
773 | * Write the BufferRAM area | |
774 | */ | |
775 | static int onenand_write_bufferram(struct mtd_info *mtd, int area, | |
776 | const unsigned char *buffer, int offset, size_t count) | |
777 | { | |
778 | struct onenand_chip *this = mtd->priv; | |
779 | void __iomem *bufferram; | |
780 | ||
781 | bufferram = this->base + area; | |
782 | ||
783 | bufferram += onenand_bufferram_offset(mtd, area); | |
784 | ||
9c01f87d KP |
785 | if (ONENAND_CHECK_BYTE_ACCESS(count)) { |
786 | unsigned short word; | |
787 | int byte_offset; | |
788 | ||
789 | /* Align with word(16-bit) size */ | |
790 | count--; | |
791 | ||
792 | /* Calculate byte access offset */ | |
793 | byte_offset = offset + count; | |
794 | ||
795 | /* Read word and save byte */ | |
796 | word = this->read_word(bufferram + byte_offset); | |
797 | word = (word & ~0xff) | buffer[count]; | |
798 | this->write_word(word, bufferram + byte_offset); | |
799 | } | |
800 | ||
cd5f6346 KP |
801 | memcpy(bufferram + offset, buffer, count); |
802 | ||
803 | return 0; | |
804 | } | |
805 | ||
ee9745fc KP |
806 | /** |
807 | * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode | |
808 | * @param mtd MTD data structure | |
809 | * @param addr address to check | |
810 | * @return blockpage address | |
811 | * | |
812 | * Get blockpage address at 2x program mode | |
813 | */ | |
814 | static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr) | |
815 | { | |
816 | struct onenand_chip *this = mtd->priv; | |
817 | int blockpage, block, page; | |
818 | ||
819 | /* Calculate the even block number */ | |
820 | block = (int) (addr >> this->erase_shift) & ~1; | |
821 | /* Is it the odd plane? */ | |
822 | if (addr & this->writesize) | |
823 | block++; | |
824 | page = (int) (addr >> (this->page_shift + 1)) & this->page_mask; | |
825 | blockpage = (block << 7) | page; | |
826 | ||
827 | return blockpage; | |
828 | } | |
829 | ||
cd5f6346 KP |
830 | /** |
831 | * onenand_check_bufferram - [GENERIC] Check BufferRAM information | |
832 | * @param mtd MTD data structure | |
833 | * @param addr address to check | |
d5c5e78a | 834 | * @return 1 if there are valid data, otherwise 0 |
cd5f6346 KP |
835 | * |
836 | * Check bufferram if there is data we required | |
837 | */ | |
838 | static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) | |
839 | { | |
840 | struct onenand_chip *this = mtd->priv; | |
cde36b37 | 841 | int blockpage, found = 0; |
abf3c0f2 | 842 | unsigned int i; |
d5c5e78a | 843 | |
ee9745fc KP |
844 | if (ONENAND_IS_2PLANE(this)) |
845 | blockpage = onenand_get_2x_blockpage(mtd, addr); | |
846 | else | |
847 | blockpage = (int) (addr >> this->page_shift); | |
cd5f6346 | 848 | |
abf3c0f2 | 849 | /* Is there valid data? */ |
cd5f6346 | 850 | i = ONENAND_CURRENT_BUFFERRAM(this); |
abf3c0f2 | 851 | if (this->bufferram[i].blockpage == blockpage) |
cde36b37 AH |
852 | found = 1; |
853 | else { | |
854 | /* Check another BufferRAM */ | |
855 | i = ONENAND_NEXT_BUFFERRAM(this); | |
856 | if (this->bufferram[i].blockpage == blockpage) { | |
857 | ONENAND_SET_NEXT_BUFFERRAM(this); | |
858 | found = 1; | |
859 | } | |
860 | } | |
cd5f6346 | 861 | |
cde36b37 AH |
862 | if (found && ONENAND_IS_DDP(this)) { |
863 | /* Select DataRAM for DDP */ | |
5988af23 | 864 | int block = onenand_block(this, addr); |
cde36b37 AH |
865 | int value = onenand_bufferram_address(this, block); |
866 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); | |
abf3c0f2 | 867 | } |
cd5f6346 | 868 | |
cde36b37 | 869 | return found; |
cd5f6346 KP |
870 | } |
871 | ||
872 | /** | |
873 | * onenand_update_bufferram - [GENERIC] Update BufferRAM information | |
874 | * @param mtd MTD data structure | |
875 | * @param addr address to update | |
876 | * @param valid valid flag | |
877 | * | |
878 | * Update BufferRAM information | |
879 | */ | |
abf3c0f2 | 880 | static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, |
cd5f6346 KP |
881 | int valid) |
882 | { | |
883 | struct onenand_chip *this = mtd->priv; | |
abf3c0f2 KP |
884 | int blockpage; |
885 | unsigned int i; | |
d5c5e78a | 886 | |
ee9745fc KP |
887 | if (ONENAND_IS_2PLANE(this)) |
888 | blockpage = onenand_get_2x_blockpage(mtd, addr); | |
889 | else | |
890 | blockpage = (int) (addr >> this->page_shift); | |
cd5f6346 | 891 | |
abf3c0f2 KP |
892 | /* Invalidate another BufferRAM */ |
893 | i = ONENAND_NEXT_BUFFERRAM(this); | |
5b4246f1 | 894 | if (this->bufferram[i].blockpage == blockpage) |
abf3c0f2 | 895 | this->bufferram[i].blockpage = -1; |
cd5f6346 KP |
896 | |
897 | /* Update BufferRAM */ | |
898 | i = ONENAND_CURRENT_BUFFERRAM(this); | |
abf3c0f2 KP |
899 | if (valid) |
900 | this->bufferram[i].blockpage = blockpage; | |
901 | else | |
902 | this->bufferram[i].blockpage = -1; | |
cd5f6346 KP |
903 | } |
904 | ||
480b9dfb AH |
905 | /** |
906 | * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information | |
907 | * @param mtd MTD data structure | |
908 | * @param addr start address to invalidate | |
909 | * @param len length to invalidate | |
910 | * | |
911 | * Invalidate BufferRAM information | |
912 | */ | |
913 | static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr, | |
914 | unsigned int len) | |
915 | { | |
916 | struct onenand_chip *this = mtd->priv; | |
917 | int i; | |
918 | loff_t end_addr = addr + len; | |
919 | ||
920 | /* Invalidate BufferRAM */ | |
921 | for (i = 0; i < MAX_BUFFERRAM; i++) { | |
922 | loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift; | |
923 | if (buf_addr >= addr && buf_addr < end_addr) | |
924 | this->bufferram[i].blockpage = -1; | |
925 | } | |
926 | } | |
927 | ||
cd5f6346 KP |
928 | /** |
929 | * onenand_get_device - [GENERIC] Get chip for selected access | |
930 | * @param mtd MTD device structure | |
931 | * @param new_state the state which is requested | |
932 | * | |
933 | * Get the device and lock it for exclusive access | |
934 | */ | |
a41371eb | 935 | static int onenand_get_device(struct mtd_info *mtd, int new_state) |
cd5f6346 KP |
936 | { |
937 | struct onenand_chip *this = mtd->priv; | |
938 | DECLARE_WAITQUEUE(wait, current); | |
939 | ||
940 | /* | |
941 | * Grab the lock and see if the device is available | |
942 | */ | |
943 | while (1) { | |
944 | spin_lock(&this->chip_lock); | |
945 | if (this->state == FL_READY) { | |
946 | this->state = new_state; | |
947 | spin_unlock(&this->chip_lock); | |
948 | break; | |
949 | } | |
a41371eb KP |
950 | if (new_state == FL_PM_SUSPENDED) { |
951 | spin_unlock(&this->chip_lock); | |
952 | return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; | |
953 | } | |
cd5f6346 KP |
954 | set_current_state(TASK_UNINTERRUPTIBLE); |
955 | add_wait_queue(&this->wq, &wait); | |
956 | spin_unlock(&this->chip_lock); | |
957 | schedule(); | |
958 | remove_wait_queue(&this->wq, &wait); | |
959 | } | |
a41371eb KP |
960 | |
961 | return 0; | |
cd5f6346 KP |
962 | } |
963 | ||
964 | /** | |
965 | * onenand_release_device - [GENERIC] release chip | |
966 | * @param mtd MTD device structure | |
967 | * | |
968 | * Deselect, release chip lock and wake up anyone waiting on the device | |
969 | */ | |
970 | static void onenand_release_device(struct mtd_info *mtd) | |
971 | { | |
972 | struct onenand_chip *this = mtd->priv; | |
973 | ||
974 | /* Release the chip */ | |
975 | spin_lock(&this->chip_lock); | |
976 | this->state = FL_READY; | |
977 | wake_up(&this->wq); | |
978 | spin_unlock(&this->chip_lock); | |
979 | } | |
980 | ||
981 | /** | |
d15057b7 KP |
982 | * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer |
983 | * @param mtd MTD device structure | |
984 | * @param buf destination address | |
985 | * @param column oob offset to read from | |
986 | * @param thislen oob length to read | |
987 | */ | |
988 | static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column, | |
989 | int thislen) | |
990 | { | |
991 | struct onenand_chip *this = mtd->priv; | |
992 | struct nand_oobfree *free; | |
993 | int readcol = column; | |
994 | int readend = column + thislen; | |
995 | int lastgap = 0; | |
996 | unsigned int i; | |
997 | uint8_t *oob_buf = this->oob_buf; | |
998 | ||
999 | free = this->ecclayout->oobfree; | |
1000 | for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { | |
1001 | if (readcol >= lastgap) | |
1002 | readcol += free->offset - lastgap; | |
1003 | if (readend >= lastgap) | |
1004 | readend += free->offset - lastgap; | |
1005 | lastgap = free->offset + free->length; | |
1006 | } | |
1007 | this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); | |
1008 | free = this->ecclayout->oobfree; | |
1009 | for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { | |
1010 | int free_end = free->offset + free->length; | |
1011 | if (free->offset < readend && free_end > readcol) { | |
1012 | int st = max_t(int,free->offset,readcol); | |
1013 | int ed = min_t(int,free_end,readend); | |
1014 | int n = ed - st; | |
1015 | memcpy(buf, oob_buf + st, n); | |
1016 | buf += n; | |
1017 | } else if (column == 0) | |
1018 | break; | |
1019 | } | |
1020 | return 0; | |
1021 | } | |
1022 | ||
5988af23 RH |
1023 | /** |
1024 | * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data | |
1025 | * @param mtd MTD device structure | |
1026 | * @param addr address to recover | |
1027 | * @param status return value from onenand_wait / onenand_bbt_wait | |
1028 | * | |
1029 | * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has | |
1030 | * lower page address and MSB page has higher page address in paired pages. | |
1031 | * If power off occurs during MSB page program, the paired LSB page data can | |
1032 | * become corrupt. LSB page recovery read is a way to read LSB page though page | |
1033 | * data are corrupted. When uncorrectable error occurs as a result of LSB page | |
1034 | * read after power up, issue LSB page recovery read. | |
1035 | */ | |
1036 | static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status) | |
1037 | { | |
1038 | struct onenand_chip *this = mtd->priv; | |
1039 | int i; | |
1040 | ||
1041 | /* Recovery is only for Flex-OneNAND */ | |
1042 | if (!FLEXONENAND(this)) | |
1043 | return status; | |
1044 | ||
1045 | /* check if we failed due to uncorrectable error */ | |
1046 | if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR) | |
1047 | return status; | |
1048 | ||
1049 | /* check if address lies in MLC region */ | |
1050 | i = flexonenand_region(mtd, addr); | |
1051 | if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift)) | |
1052 | return status; | |
1053 | ||
1054 | /* We are attempting to reread, so decrement stats.failed | |
1055 | * which was incremented by onenand_wait due to read failure | |
1056 | */ | |
297758f8 AKS |
1057 | printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n", |
1058 | __func__); | |
5988af23 RH |
1059 | mtd->ecc_stats.failed--; |
1060 | ||
1061 | /* Issue the LSB page recovery command */ | |
1062 | this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize); | |
1063 | return this->wait(mtd, FL_READING); | |
1064 | } | |
1065 | ||
1066 | /** | |
1067 | * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band | |
1068 | * @param mtd MTD device structure | |
1069 | * @param from offset to read from | |
1070 | * @param ops: oob operation description structure | |
1071 | * | |
1072 | * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram. | |
1073 | * So, read-while-load is not present. | |
1074 | */ | |
1075 | static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from, | |
1076 | struct mtd_oob_ops *ops) | |
1077 | { | |
1078 | struct onenand_chip *this = mtd->priv; | |
1079 | struct mtd_ecc_stats stats; | |
1080 | size_t len = ops->len; | |
1081 | size_t ooblen = ops->ooblen; | |
1082 | u_char *buf = ops->datbuf; | |
1083 | u_char *oobbuf = ops->oobbuf; | |
1084 | int read = 0, column, thislen; | |
1085 | int oobread = 0, oobcolumn, thisooblen, oobsize; | |
1086 | int ret = 0; | |
1087 | int writesize = this->writesize; | |
1088 | ||
297758f8 | 1089 | DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n", |
8032747e | 1090 | __func__, (unsigned int) from, (int) len); |
5988af23 RH |
1091 | |
1092 | if (ops->mode == MTD_OOB_AUTO) | |
1093 | oobsize = this->ecclayout->oobavail; | |
1094 | else | |
1095 | oobsize = mtd->oobsize; | |
1096 | ||
1097 | oobcolumn = from & (mtd->oobsize - 1); | |
1098 | ||
1099 | /* Do not allow reads past end of device */ | |
1100 | if (from + len > mtd->size) { | |
297758f8 AKS |
1101 | printk(KERN_ERR "%s: Attempt read beyond end of device\n", |
1102 | __func__); | |
5988af23 RH |
1103 | ops->retlen = 0; |
1104 | ops->oobretlen = 0; | |
1105 | return -EINVAL; | |
1106 | } | |
1107 | ||
1108 | stats = mtd->ecc_stats; | |
1109 | ||
1110 | while (read < len) { | |
1111 | cond_resched(); | |
1112 | ||
1113 | thislen = min_t(int, writesize, len - read); | |
1114 | ||
1115 | column = from & (writesize - 1); | |
1116 | if (column + thislen > writesize) | |
1117 | thislen = writesize - column; | |
1118 | ||
1119 | if (!onenand_check_bufferram(mtd, from)) { | |
1120 | this->command(mtd, ONENAND_CMD_READ, from, writesize); | |
1121 | ||
1122 | ret = this->wait(mtd, FL_READING); | |
1123 | if (unlikely(ret)) | |
1124 | ret = onenand_recover_lsb(mtd, from, ret); | |
1125 | onenand_update_bufferram(mtd, from, !ret); | |
1126 | if (ret == -EBADMSG) | |
1127 | ret = 0; | |
1128 | } | |
1129 | ||
1130 | this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); | |
1131 | if (oobbuf) { | |
1132 | thisooblen = oobsize - oobcolumn; | |
1133 | thisooblen = min_t(int, thisooblen, ooblen - oobread); | |
1134 | ||
1135 | if (ops->mode == MTD_OOB_AUTO) | |
1136 | onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); | |
1137 | else | |
1138 | this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); | |
1139 | oobread += thisooblen; | |
1140 | oobbuf += thisooblen; | |
1141 | oobcolumn = 0; | |
1142 | } | |
1143 | ||
1144 | read += thislen; | |
1145 | if (read == len) | |
1146 | break; | |
1147 | ||
1148 | from += thislen; | |
1149 | buf += thislen; | |
1150 | } | |
1151 | ||
1152 | /* | |
1153 | * Return success, if no ECC failures, else -EBADMSG | |
1154 | * fs driver will take care of that, because | |
1155 | * retlen == desired len and result == -EBADMSG | |
1156 | */ | |
1157 | ops->retlen = read; | |
1158 | ops->oobretlen = oobread; | |
1159 | ||
1160 | if (ret) | |
1161 | return ret; | |
1162 | ||
1163 | if (mtd->ecc_stats.failed - stats.failed) | |
1164 | return -EBADMSG; | |
1165 | ||
1166 | return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; | |
1167 | } | |
1168 | ||
d15057b7 | 1169 | /** |
49dc08ee | 1170 | * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band |
cd5f6346 KP |
1171 | * @param mtd MTD device structure |
1172 | * @param from offset to read from | |
d15057b7 | 1173 | * @param ops: oob operation description structure |
cd5f6346 | 1174 | * |
d15057b7 KP |
1175 | * OneNAND read main and/or out-of-band data |
1176 | */ | |
49dc08ee | 1177 | static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, |
d15057b7 | 1178 | struct mtd_oob_ops *ops) |
cd5f6346 KP |
1179 | { |
1180 | struct onenand_chip *this = mtd->priv; | |
f4f91ac3 | 1181 | struct mtd_ecc_stats stats; |
d15057b7 KP |
1182 | size_t len = ops->len; |
1183 | size_t ooblen = ops->ooblen; | |
1184 | u_char *buf = ops->datbuf; | |
1185 | u_char *oobbuf = ops->oobbuf; | |
1186 | int read = 0, column, thislen; | |
1187 | int oobread = 0, oobcolumn, thisooblen, oobsize; | |
0fc2ccea | 1188 | int ret = 0, boundary = 0; |
ee9745fc | 1189 | int writesize = this->writesize; |
cd5f6346 | 1190 | |
297758f8 AKS |
1191 | DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n", |
1192 | __func__, (unsigned int) from, (int) len); | |
d15057b7 KP |
1193 | |
1194 | if (ops->mode == MTD_OOB_AUTO) | |
1195 | oobsize = this->ecclayout->oobavail; | |
1196 | else | |
1197 | oobsize = mtd->oobsize; | |
1198 | ||
1199 | oobcolumn = from & (mtd->oobsize - 1); | |
cd5f6346 KP |
1200 | |
1201 | /* Do not allow reads past end of device */ | |
1202 | if ((from + len) > mtd->size) { | |
297758f8 AKS |
1203 | printk(KERN_ERR "%s: Attempt read beyond end of device\n", |
1204 | __func__); | |
d15057b7 KP |
1205 | ops->retlen = 0; |
1206 | ops->oobretlen = 0; | |
cd5f6346 KP |
1207 | return -EINVAL; |
1208 | } | |
1209 | ||
f4f91ac3 | 1210 | stats = mtd->ecc_stats; |
61a7e198 | 1211 | |
a8de85d5 AH |
1212 | /* Read-while-load method */ |
1213 | ||
1214 | /* Do first load to bufferRAM */ | |
1215 | if (read < len) { | |
1216 | if (!onenand_check_bufferram(mtd, from)) { | |
ee9745fc | 1217 | this->command(mtd, ONENAND_CMD_READ, from, writesize); |
a8de85d5 AH |
1218 | ret = this->wait(mtd, FL_READING); |
1219 | onenand_update_bufferram(mtd, from, !ret); | |
5f4d47d5 AH |
1220 | if (ret == -EBADMSG) |
1221 | ret = 0; | |
a8de85d5 AH |
1222 | } |
1223 | } | |
1224 | ||
ee9745fc KP |
1225 | thislen = min_t(int, writesize, len - read); |
1226 | column = from & (writesize - 1); | |
1227 | if (column + thislen > writesize) | |
1228 | thislen = writesize - column; | |
a8de85d5 AH |
1229 | |
1230 | while (!ret) { | |
1231 | /* If there is more to load then start next load */ | |
1232 | from += thislen; | |
1233 | if (read + thislen < len) { | |
ee9745fc | 1234 | this->command(mtd, ONENAND_CMD_READ, from, writesize); |
0fc2ccea AH |
1235 | /* |
1236 | * Chip boundary handling in DDP | |
1237 | * Now we issued chip 1 read and pointed chip 1 | |
492e1501 | 1238 | * bufferram so we have to point chip 0 bufferram. |
0fc2ccea | 1239 | */ |
738d61f5 KP |
1240 | if (ONENAND_IS_DDP(this) && |
1241 | unlikely(from == (this->chipsize >> 1))) { | |
1242 | this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2); | |
0fc2ccea AH |
1243 | boundary = 1; |
1244 | } else | |
1245 | boundary = 0; | |
a8de85d5 AH |
1246 | ONENAND_SET_PREV_BUFFERRAM(this); |
1247 | } | |
1248 | /* While load is going, read from last bufferRAM */ | |
1249 | this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); | |
d15057b7 KP |
1250 | |
1251 | /* Read oob area if needed */ | |
1252 | if (oobbuf) { | |
1253 | thisooblen = oobsize - oobcolumn; | |
1254 | thisooblen = min_t(int, thisooblen, ooblen - oobread); | |
1255 | ||
1256 | if (ops->mode == MTD_OOB_AUTO) | |
1257 | onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); | |
1258 | else | |
1259 | this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); | |
1260 | oobread += thisooblen; | |
1261 | oobbuf += thisooblen; | |
1262 | oobcolumn = 0; | |
1263 | } | |
1264 | ||
a8de85d5 AH |
1265 | /* See if we are done */ |
1266 | read += thislen; | |
1267 | if (read == len) | |
1268 | break; | |
1269 | /* Set up for next read from bufferRAM */ | |
0fc2ccea | 1270 | if (unlikely(boundary)) |
738d61f5 | 1271 | this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2); |
a8de85d5 AH |
1272 | ONENAND_SET_NEXT_BUFFERRAM(this); |
1273 | buf += thislen; | |
ee9745fc | 1274 | thislen = min_t(int, writesize, len - read); |
a8de85d5 AH |
1275 | column = 0; |
1276 | cond_resched(); | |
1277 | /* Now wait for load */ | |
1278 | ret = this->wait(mtd, FL_READING); | |
1279 | onenand_update_bufferram(mtd, from, !ret); | |
5f4d47d5 AH |
1280 | if (ret == -EBADMSG) |
1281 | ret = 0; | |
a8de85d5 | 1282 | } |
cd5f6346 | 1283 | |
cd5f6346 KP |
1284 | /* |
1285 | * Return success, if no ECC failures, else -EBADMSG | |
1286 | * fs driver will take care of that, because | |
1287 | * retlen == desired len and result == -EBADMSG | |
1288 | */ | |
d15057b7 KP |
1289 | ops->retlen = read; |
1290 | ops->oobretlen = oobread; | |
f4f91ac3 | 1291 | |
a8de85d5 AH |
1292 | if (ret) |
1293 | return ret; | |
1294 | ||
5f4d47d5 AH |
1295 | if (mtd->ecc_stats.failed - stats.failed) |
1296 | return -EBADMSG; | |
1297 | ||
f4f91ac3 | 1298 | return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; |
cd5f6346 KP |
1299 | } |
1300 | ||
cd5f6346 | 1301 | /** |
49dc08ee | 1302 | * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band |
cd5f6346 KP |
1303 | * @param mtd MTD device structure |
1304 | * @param from offset to read from | |
d15057b7 | 1305 | * @param ops: oob operation description structure |
cd5f6346 KP |
1306 | * |
1307 | * OneNAND read out-of-band data from the spare area | |
1308 | */ | |
49dc08ee | 1309 | static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, |
12f77c9e | 1310 | struct mtd_oob_ops *ops) |
cd5f6346 KP |
1311 | { |
1312 | struct onenand_chip *this = mtd->priv; | |
5f4d47d5 | 1313 | struct mtd_ecc_stats stats; |
a5e7c7b4 | 1314 | int read = 0, thislen, column, oobsize; |
12f77c9e KP |
1315 | size_t len = ops->ooblen; |
1316 | mtd_oob_mode_t mode = ops->mode; | |
1317 | u_char *buf = ops->oobbuf; | |
5988af23 | 1318 | int ret = 0, readcmd; |
cd5f6346 | 1319 | |
12f77c9e KP |
1320 | from += ops->ooboffs; |
1321 | ||
297758f8 AKS |
1322 | DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n", |
1323 | __func__, (unsigned int) from, (int) len); | |
cd5f6346 KP |
1324 | |
1325 | /* Initialize return length value */ | |
12f77c9e | 1326 | ops->oobretlen = 0; |
cd5f6346 | 1327 | |
a5e7c7b4 AH |
1328 | if (mode == MTD_OOB_AUTO) |
1329 | oobsize = this->ecclayout->oobavail; | |
1330 | else | |
1331 | oobsize = mtd->oobsize; | |
1332 | ||
1333 | column = from & (mtd->oobsize - 1); | |
1334 | ||
1335 | if (unlikely(column >= oobsize)) { | |
297758f8 AKS |
1336 | printk(KERN_ERR "%s: Attempted to start read outside oob\n", |
1337 | __func__); | |
a5e7c7b4 AH |
1338 | return -EINVAL; |
1339 | } | |
1340 | ||
cd5f6346 | 1341 | /* Do not allow reads past end of device */ |
a5e7c7b4 AH |
1342 | if (unlikely(from >= mtd->size || |
1343 | column + len > ((mtd->size >> this->page_shift) - | |
1344 | (from >> this->page_shift)) * oobsize)) { | |
297758f8 AKS |
1345 | printk(KERN_ERR "%s: Attempted to read beyond end of device\n", |
1346 | __func__); | |
cd5f6346 KP |
1347 | return -EINVAL; |
1348 | } | |
1349 | ||
5f4d47d5 AH |
1350 | stats = mtd->ecc_stats; |
1351 | ||
5988af23 RH |
1352 | readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; |
1353 | ||
cd5f6346 | 1354 | while (read < len) { |
61a7e198 AB |
1355 | cond_resched(); |
1356 | ||
a5e7c7b4 | 1357 | thislen = oobsize - column; |
cd5f6346 KP |
1358 | thislen = min_t(int, thislen, len); |
1359 | ||
5988af23 | 1360 | this->command(mtd, readcmd, from, mtd->oobsize); |
cd5f6346 KP |
1361 | |
1362 | onenand_update_bufferram(mtd, from, 0); | |
1363 | ||
1364 | ret = this->wait(mtd, FL_READING); | |
5988af23 RH |
1365 | if (unlikely(ret)) |
1366 | ret = onenand_recover_lsb(mtd, from, ret); | |
1367 | ||
5f4d47d5 | 1368 | if (ret && ret != -EBADMSG) { |
297758f8 AKS |
1369 | printk(KERN_ERR "%s: read failed = 0x%x\n", |
1370 | __func__, ret); | |
5f4d47d5 AH |
1371 | break; |
1372 | } | |
cd5f6346 | 1373 | |
a5e7c7b4 AH |
1374 | if (mode == MTD_OOB_AUTO) |
1375 | onenand_transfer_auto_oob(mtd, buf, column, thislen); | |
1376 | else | |
1377 | this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); | |
cd5f6346 KP |
1378 | |
1379 | read += thislen; | |
1380 | ||
1381 | if (read == len) | |
1382 | break; | |
1383 | ||
cd5f6346 KP |
1384 | buf += thislen; |
1385 | ||
1386 | /* Read more? */ | |
1387 | if (read < len) { | |
1388 | /* Page size */ | |
28318776 | 1389 | from += mtd->writesize; |
cd5f6346 KP |
1390 | column = 0; |
1391 | } | |
1392 | } | |
1393 | ||
12f77c9e | 1394 | ops->oobretlen = read; |
5f4d47d5 AH |
1395 | |
1396 | if (ret) | |
1397 | return ret; | |
1398 | ||
1399 | if (mtd->ecc_stats.failed - stats.failed) | |
1400 | return -EBADMSG; | |
1401 | ||
1402 | return 0; | |
cd5f6346 KP |
1403 | } |
1404 | ||
8593fbc6 | 1405 | /** |
d15057b7 KP |
1406 | * onenand_read - [MTD Interface] Read data from flash |
1407 | * @param mtd MTD device structure | |
1408 | * @param from offset to read from | |
1409 | * @param len number of bytes to read | |
1410 | * @param retlen pointer to variable to store the number of read bytes | |
1411 | * @param buf the databuffer to put data | |
1412 | * | |
1413 | * Read with ecc | |
1414 | */ | |
1415 | static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, | |
1416 | size_t *retlen, u_char *buf) | |
1417 | { | |
5988af23 | 1418 | struct onenand_chip *this = mtd->priv; |
d15057b7 KP |
1419 | struct mtd_oob_ops ops = { |
1420 | .len = len, | |
1421 | .ooblen = 0, | |
1422 | .datbuf = buf, | |
1423 | .oobbuf = NULL, | |
1424 | }; | |
1425 | int ret; | |
1426 | ||
49dc08ee | 1427 | onenand_get_device(mtd, FL_READING); |
5988af23 RH |
1428 | ret = ONENAND_IS_MLC(this) ? |
1429 | onenand_mlc_read_ops_nolock(mtd, from, &ops) : | |
1430 | onenand_read_ops_nolock(mtd, from, &ops); | |
49dc08ee | 1431 | onenand_release_device(mtd); |
d15057b7 | 1432 | |
49dc08ee | 1433 | *retlen = ops.retlen; |
d15057b7 KP |
1434 | return ret; |
1435 | } | |
1436 | ||
1437 | /** | |
1438 | * onenand_read_oob - [MTD Interface] Read main and/or out-of-band | |
e3da8067 KP |
1439 | * @param mtd: MTD device structure |
1440 | * @param from: offset to read from | |
1441 | * @param ops: oob operation description structure | |
d15057b7 KP |
1442 | |
1443 | * Read main and/or out-of-band | |
8593fbc6 TG |
1444 | */ |
1445 | static int onenand_read_oob(struct mtd_info *mtd, loff_t from, | |
1446 | struct mtd_oob_ops *ops) | |
1447 | { | |
5988af23 | 1448 | struct onenand_chip *this = mtd->priv; |
49dc08ee AB |
1449 | int ret; |
1450 | ||
4f4fad27 | 1451 | switch (ops->mode) { |
a5e7c7b4 AH |
1452 | case MTD_OOB_PLACE: |
1453 | case MTD_OOB_AUTO: | |
1454 | break; | |
1455 | case MTD_OOB_RAW: | |
4f4fad27 | 1456 | /* Not implemented yet */ |
a5e7c7b4 AH |
1457 | default: |
1458 | return -EINVAL; | |
1459 | } | |
d15057b7 | 1460 | |
49dc08ee | 1461 | onenand_get_device(mtd, FL_READING); |
d15057b7 | 1462 | if (ops->datbuf) |
5988af23 RH |
1463 | ret = ONENAND_IS_MLC(this) ? |
1464 | onenand_mlc_read_ops_nolock(mtd, from, ops) : | |
1465 | onenand_read_ops_nolock(mtd, from, ops); | |
49dc08ee AB |
1466 | else |
1467 | ret = onenand_read_oob_nolock(mtd, from, ops); | |
1468 | onenand_release_device(mtd); | |
d15057b7 | 1469 | |
49dc08ee | 1470 | return ret; |
8593fbc6 TG |
1471 | } |
1472 | ||
211ac75f KP |
1473 | /** |
1474 | * onenand_bbt_wait - [DEFAULT] wait until the command is done | |
1475 | * @param mtd MTD device structure | |
1476 | * @param state state to select the max. timeout value | |
1477 | * | |
1478 | * Wait for command done. | |
1479 | */ | |
1480 | static int onenand_bbt_wait(struct mtd_info *mtd, int state) | |
1481 | { | |
1482 | struct onenand_chip *this = mtd->priv; | |
1483 | unsigned long timeout; | |
1484 | unsigned int interrupt; | |
1485 | unsigned int ctrl; | |
1486 | ||
1487 | /* The 20 msec is enough */ | |
1488 | timeout = jiffies + msecs_to_jiffies(20); | |
1489 | while (time_before(jiffies, timeout)) { | |
1490 | interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); | |
1491 | if (interrupt & ONENAND_INT_MASTER) | |
1492 | break; | |
1493 | } | |
1494 | /* To get correct interrupt status in timeout case */ | |
1495 | interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); | |
1496 | ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); | |
1497 | ||
211ac75f | 1498 | if (interrupt & ONENAND_INT_READ) { |
5988af23 | 1499 | int ecc = onenand_read_ecc(this); |
83973b87 | 1500 | if (ecc & ONENAND_ECC_2BIT_ALL) { |
297758f8 AKS |
1501 | printk(KERN_WARNING "%s: ecc error = 0x%04x, " |
1502 | "controller error 0x%04x\n", | |
1503 | __func__, ecc, ctrl); | |
5988af23 | 1504 | return ONENAND_BBT_READ_ECC_ERROR; |
83973b87 | 1505 | } |
211ac75f | 1506 | } else { |
297758f8 AKS |
1507 | printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n", |
1508 | __func__, ctrl, interrupt); | |
211ac75f KP |
1509 | return ONENAND_BBT_READ_FATAL_ERROR; |
1510 | } | |
1511 | ||
83973b87 KP |
1512 | /* Initial bad block case: 0x2400 or 0x0400 */ |
1513 | if (ctrl & ONENAND_CTRL_ERROR) { | |
297758f8 AKS |
1514 | printk(KERN_DEBUG "%s: controller error = 0x%04x\n", |
1515 | __func__, ctrl); | |
83973b87 KP |
1516 | return ONENAND_BBT_READ_ERROR; |
1517 | } | |
1518 | ||
211ac75f KP |
1519 | return 0; |
1520 | } | |
1521 | ||
1522 | /** | |
1523 | * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan | |
1524 | * @param mtd MTD device structure | |
1525 | * @param from offset to read from | |
e3da8067 | 1526 | * @param ops oob operation description structure |
211ac75f KP |
1527 | * |
1528 | * OneNAND read out-of-band data from the spare area for bbt scan | |
1529 | */ | |
1530 | int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, | |
1531 | struct mtd_oob_ops *ops) | |
1532 | { | |
1533 | struct onenand_chip *this = mtd->priv; | |
1534 | int read = 0, thislen, column; | |
5988af23 | 1535 | int ret = 0, readcmd; |
211ac75f KP |
1536 | size_t len = ops->ooblen; |
1537 | u_char *buf = ops->oobbuf; | |
1538 | ||
297758f8 AKS |
1539 | DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n", |
1540 | __func__, (unsigned int) from, len); | |
211ac75f KP |
1541 | |
1542 | /* Initialize return value */ | |
1543 | ops->oobretlen = 0; | |
1544 | ||
1545 | /* Do not allow reads past end of device */ | |
1546 | if (unlikely((from + len) > mtd->size)) { | |
297758f8 AKS |
1547 | printk(KERN_ERR "%s: Attempt read beyond end of device\n", |
1548 | __func__); | |
211ac75f KP |
1549 | return ONENAND_BBT_READ_FATAL_ERROR; |
1550 | } | |
1551 | ||
1552 | /* Grab the lock and see if the device is available */ | |
1553 | onenand_get_device(mtd, FL_READING); | |
1554 | ||
1555 | column = from & (mtd->oobsize - 1); | |
1556 | ||
5988af23 RH |
1557 | readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; |
1558 | ||
211ac75f KP |
1559 | while (read < len) { |
1560 | cond_resched(); | |
1561 | ||
1562 | thislen = mtd->oobsize - column; | |
1563 | thislen = min_t(int, thislen, len); | |
1564 | ||
5988af23 | 1565 | this->command(mtd, readcmd, from, mtd->oobsize); |
211ac75f KP |
1566 | |
1567 | onenand_update_bufferram(mtd, from, 0); | |
1568 | ||
31bb999e | 1569 | ret = this->bbt_wait(mtd, FL_READING); |
5988af23 RH |
1570 | if (unlikely(ret)) |
1571 | ret = onenand_recover_lsb(mtd, from, ret); | |
1572 | ||
211ac75f KP |
1573 | if (ret) |
1574 | break; | |
1575 | ||
1576 | this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); | |
1577 | read += thislen; | |
1578 | if (read == len) | |
1579 | break; | |
1580 | ||
1581 | buf += thislen; | |
1582 | ||
1583 | /* Read more? */ | |
1584 | if (read < len) { | |
1585 | /* Update Page size */ | |
ee9745fc | 1586 | from += this->writesize; |
211ac75f KP |
1587 | column = 0; |
1588 | } | |
1589 | } | |
1590 | ||
1591 | /* Deselect and wake up anyone waiting on the device */ | |
1592 | onenand_release_device(mtd); | |
1593 | ||
1594 | ops->oobretlen = read; | |
1595 | return ret; | |
1596 | } | |
1597 | ||
cd5f6346 | 1598 | #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE |
8e6ec690 KP |
1599 | /** |
1600 | * onenand_verify_oob - [GENERIC] verify the oob contents after a write | |
1601 | * @param mtd MTD device structure | |
1602 | * @param buf the databuffer to verify | |
1603 | * @param to offset to read from | |
8e6ec690 | 1604 | */ |
a5e7c7b4 | 1605 | static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to) |
8e6ec690 KP |
1606 | { |
1607 | struct onenand_chip *this = mtd->priv; | |
69d79186 | 1608 | u_char *oob_buf = this->oob_buf; |
5988af23 RH |
1609 | int status, i, readcmd; |
1610 | ||
1611 | readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; | |
8e6ec690 | 1612 | |
5988af23 | 1613 | this->command(mtd, readcmd, to, mtd->oobsize); |
8e6ec690 KP |
1614 | onenand_update_bufferram(mtd, to, 0); |
1615 | status = this->wait(mtd, FL_READING); | |
1616 | if (status) | |
1617 | return status; | |
1618 | ||
69d79186 | 1619 | this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); |
91014e9b | 1620 | for (i = 0; i < mtd->oobsize; i++) |
69d79186 | 1621 | if (buf[i] != 0xFF && buf[i] != oob_buf[i]) |
8e6ec690 KP |
1622 | return -EBADMSG; |
1623 | ||
1624 | return 0; | |
1625 | } | |
1626 | ||
cd5f6346 | 1627 | /** |
8b29c0b6 AH |
1628 | * onenand_verify - [GENERIC] verify the chip contents after a write |
1629 | * @param mtd MTD device structure | |
1630 | * @param buf the databuffer to verify | |
1631 | * @param addr offset to read from | |
1632 | * @param len number of bytes to read and compare | |
cd5f6346 | 1633 | */ |
8b29c0b6 | 1634 | static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len) |
cd5f6346 KP |
1635 | { |
1636 | struct onenand_chip *this = mtd->priv; | |
8b29c0b6 | 1637 | void __iomem *dataram; |
cd5f6346 | 1638 | int ret = 0; |
8b29c0b6 | 1639 | int thislen, column; |
cd5f6346 | 1640 | |
8b29c0b6 | 1641 | while (len != 0) { |
ee9745fc KP |
1642 | thislen = min_t(int, this->writesize, len); |
1643 | column = addr & (this->writesize - 1); | |
1644 | if (column + thislen > this->writesize) | |
1645 | thislen = this->writesize - column; | |
60d84f97 | 1646 | |
ee9745fc | 1647 | this->command(mtd, ONENAND_CMD_READ, addr, this->writesize); |
cd5f6346 | 1648 | |
8b29c0b6 AH |
1649 | onenand_update_bufferram(mtd, addr, 0); |
1650 | ||
1651 | ret = this->wait(mtd, FL_READING); | |
1652 | if (ret) | |
1653 | return ret; | |
cd5f6346 | 1654 | |
8b29c0b6 | 1655 | onenand_update_bufferram(mtd, addr, 1); |
cd5f6346 | 1656 | |
8b29c0b6 AH |
1657 | dataram = this->base + ONENAND_DATARAM; |
1658 | dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM); | |
cd5f6346 | 1659 | |
8b29c0b6 AH |
1660 | if (memcmp(buf, dataram + column, thislen)) |
1661 | return -EBADMSG; | |
1662 | ||
1663 | len -= thislen; | |
1664 | buf += thislen; | |
1665 | addr += thislen; | |
1666 | } | |
d5c5e78a | 1667 | |
cd5f6346 KP |
1668 | return 0; |
1669 | } | |
1670 | #else | |
8b29c0b6 | 1671 | #define onenand_verify(...) (0) |
8e6ec690 | 1672 | #define onenand_verify_oob(...) (0) |
cd5f6346 KP |
1673 | #endif |
1674 | ||
60d84f97 | 1675 | #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) |
cd5f6346 | 1676 | |
6c77fd64 RP |
1677 | static void onenand_panic_wait(struct mtd_info *mtd) |
1678 | { | |
1679 | struct onenand_chip *this = mtd->priv; | |
1680 | unsigned int interrupt; | |
1681 | int i; | |
1682 | ||
1683 | for (i = 0; i < 2000; i++) { | |
1684 | interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); | |
1685 | if (interrupt & ONENAND_INT_MASTER) | |
1686 | break; | |
1687 | udelay(10); | |
1688 | } | |
1689 | } | |
1690 | ||
1691 | /** | |
1692 | * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context | |
1693 | * @param mtd MTD device structure | |
1694 | * @param to offset to write to | |
1695 | * @param len number of bytes to write | |
1696 | * @param retlen pointer to variable to store the number of written bytes | |
1697 | * @param buf the data to write | |
1698 | * | |
1699 | * Write with ECC | |
1700 | */ | |
1701 | static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len, | |
1702 | size_t *retlen, const u_char *buf) | |
1703 | { | |
1704 | struct onenand_chip *this = mtd->priv; | |
1705 | int column, subpage; | |
1706 | int written = 0; | |
1707 | int ret = 0; | |
1708 | ||
1709 | if (this->state == FL_PM_SUSPENDED) | |
1710 | return -EBUSY; | |
1711 | ||
1712 | /* Wait for any existing operation to clear */ | |
1713 | onenand_panic_wait(mtd); | |
1714 | ||
297758f8 AKS |
1715 | DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", |
1716 | __func__, (unsigned int) to, (int) len); | |
6c77fd64 RP |
1717 | |
1718 | /* Initialize retlen, in case of early exit */ | |
1719 | *retlen = 0; | |
1720 | ||
1721 | /* Do not allow writes past end of device */ | |
1722 | if (unlikely((to + len) > mtd->size)) { | |
297758f8 AKS |
1723 | printk(KERN_ERR "%s: Attempt write to past end of device\n", |
1724 | __func__); | |
6c77fd64 RP |
1725 | return -EINVAL; |
1726 | } | |
1727 | ||
1728 | /* Reject writes, which are not page aligned */ | |
b73d7e43 | 1729 | if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { |
297758f8 AKS |
1730 | printk(KERN_ERR "%s: Attempt to write not page aligned data\n", |
1731 | __func__); | |
6c77fd64 RP |
1732 | return -EINVAL; |
1733 | } | |
1734 | ||
1735 | column = to & (mtd->writesize - 1); | |
1736 | ||
1737 | /* Loop until all data write */ | |
1738 | while (written < len) { | |
1739 | int thislen = min_t(int, mtd->writesize - column, len - written); | |
1740 | u_char *wbuf = (u_char *) buf; | |
1741 | ||
1742 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); | |
1743 | ||
1744 | /* Partial page write */ | |
1745 | subpage = thislen < mtd->writesize; | |
1746 | if (subpage) { | |
1747 | memset(this->page_buf, 0xff, mtd->writesize); | |
1748 | memcpy(this->page_buf + column, buf, thislen); | |
1749 | wbuf = this->page_buf; | |
1750 | } | |
1751 | ||
1752 | this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); | |
1753 | this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); | |
1754 | ||
1755 | this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); | |
1756 | ||
1757 | onenand_panic_wait(mtd); | |
1758 | ||
1759 | /* In partial page write we don't update bufferram */ | |
1760 | onenand_update_bufferram(mtd, to, !ret && !subpage); | |
1761 | if (ONENAND_IS_2PLANE(this)) { | |
1762 | ONENAND_SET_BUFFERRAM1(this); | |
1763 | onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage); | |
1764 | } | |
1765 | ||
1766 | if (ret) { | |
297758f8 | 1767 | printk(KERN_ERR "%s: write failed %d\n", __func__, ret); |
6c77fd64 RP |
1768 | break; |
1769 | } | |
1770 | ||
1771 | written += thislen; | |
1772 | ||
1773 | if (written == len) | |
1774 | break; | |
1775 | ||
1776 | column = 0; | |
1777 | to += thislen; | |
1778 | buf += thislen; | |
1779 | } | |
1780 | ||
1781 | *retlen = written; | |
1782 | return ret; | |
1783 | } | |
1784 | ||
cd5f6346 | 1785 | /** |
d15057b7 KP |
1786 | * onenand_fill_auto_oob - [Internal] oob auto-placement transfer |
1787 | * @param mtd MTD device structure | |
1788 | * @param oob_buf oob buffer | |
1789 | * @param buf source address | |
1790 | * @param column oob offset to write to | |
1791 | * @param thislen oob length to write | |
1792 | */ | |
1793 | static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf, | |
1794 | const u_char *buf, int column, int thislen) | |
1795 | { | |
1796 | struct onenand_chip *this = mtd->priv; | |
1797 | struct nand_oobfree *free; | |
1798 | int writecol = column; | |
1799 | int writeend = column + thislen; | |
1800 | int lastgap = 0; | |
1801 | unsigned int i; | |
1802 | ||
1803 | free = this->ecclayout->oobfree; | |
1804 | for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { | |
1805 | if (writecol >= lastgap) | |
1806 | writecol += free->offset - lastgap; | |
1807 | if (writeend >= lastgap) | |
1808 | writeend += free->offset - lastgap; | |
1809 | lastgap = free->offset + free->length; | |
1810 | } | |
1811 | free = this->ecclayout->oobfree; | |
1812 | for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { | |
1813 | int free_end = free->offset + free->length; | |
1814 | if (free->offset < writeend && free_end > writecol) { | |
1815 | int st = max_t(int,free->offset,writecol); | |
1816 | int ed = min_t(int,free_end,writeend); | |
1817 | int n = ed - st; | |
1818 | memcpy(oob_buf + st, buf, n); | |
1819 | buf += n; | |
1820 | } else if (column == 0) | |
1821 | break; | |
1822 | } | |
1823 | return 0; | |
1824 | } | |
1825 | ||
1826 | /** | |
49dc08ee | 1827 | * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band |
cd5f6346 KP |
1828 | * @param mtd MTD device structure |
1829 | * @param to offset to write to | |
d15057b7 | 1830 | * @param ops oob operation description structure |
cd5f6346 | 1831 | * |
d15057b7 | 1832 | * Write main and/or oob with ECC |
cd5f6346 | 1833 | */ |
49dc08ee | 1834 | static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, |
d15057b7 | 1835 | struct mtd_oob_ops *ops) |
cd5f6346 KP |
1836 | { |
1837 | struct onenand_chip *this = mtd->priv; | |
9ce96908 KP |
1838 | int written = 0, column, thislen = 0, subpage = 0; |
1839 | int prev = 0, prevlen = 0, prev_subpage = 0, first = 1; | |
d15057b7 KP |
1840 | int oobwritten = 0, oobcolumn, thisooblen, oobsize; |
1841 | size_t len = ops->len; | |
1842 | size_t ooblen = ops->ooblen; | |
1843 | const u_char *buf = ops->datbuf; | |
1844 | const u_char *oob = ops->oobbuf; | |
1845 | u_char *oobbuf; | |
cd5f6346 KP |
1846 | int ret = 0; |
1847 | ||
297758f8 AKS |
1848 | DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", |
1849 | __func__, (unsigned int) to, (int) len); | |
cd5f6346 KP |
1850 | |
1851 | /* Initialize retlen, in case of early exit */ | |
d15057b7 KP |
1852 | ops->retlen = 0; |
1853 | ops->oobretlen = 0; | |
cd5f6346 KP |
1854 | |
1855 | /* Do not allow writes past end of device */ | |
1856 | if (unlikely((to + len) > mtd->size)) { | |
297758f8 AKS |
1857 | printk(KERN_ERR "%s: Attempt write to past end of device\n", |
1858 | __func__); | |
cd5f6346 KP |
1859 | return -EINVAL; |
1860 | } | |
1861 | ||
1862 | /* Reject writes, which are not page aligned */ | |
b73d7e43 | 1863 | if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { |
297758f8 AKS |
1864 | printk(KERN_ERR "%s: Attempt to write not page aligned data\n", |
1865 | __func__); | |
cd5f6346 KP |
1866 | return -EINVAL; |
1867 | } | |
1868 | ||
9ce96908 KP |
1869 | /* Check zero length */ |
1870 | if (!len) | |
1871 | return 0; | |
1872 | ||
d15057b7 KP |
1873 | if (ops->mode == MTD_OOB_AUTO) |
1874 | oobsize = this->ecclayout->oobavail; | |
1875 | else | |
1876 | oobsize = mtd->oobsize; | |
1877 | ||
1878 | oobcolumn = to & (mtd->oobsize - 1); | |
1879 | ||
60d84f97 | 1880 | column = to & (mtd->writesize - 1); |
60d84f97 | 1881 | |
cd5f6346 | 1882 | /* Loop until all data write */ |
9ce96908 KP |
1883 | while (1) { |
1884 | if (written < len) { | |
1885 | u_char *wbuf = (u_char *) buf; | |
60d84f97 | 1886 | |
9ce96908 KP |
1887 | thislen = min_t(int, mtd->writesize - column, len - written); |
1888 | thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten); | |
d15057b7 | 1889 | |
9ce96908 | 1890 | cond_resched(); |
61a7e198 | 1891 | |
9ce96908 | 1892 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); |
60d84f97 | 1893 | |
9ce96908 KP |
1894 | /* Partial page write */ |
1895 | subpage = thislen < mtd->writesize; | |
1896 | if (subpage) { | |
1897 | memset(this->page_buf, 0xff, mtd->writesize); | |
1898 | memcpy(this->page_buf + column, buf, thislen); | |
1899 | wbuf = this->page_buf; | |
1900 | } | |
cd5f6346 | 1901 | |
9ce96908 | 1902 | this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); |
d15057b7 | 1903 | |
9ce96908 KP |
1904 | if (oob) { |
1905 | oobbuf = this->oob_buf; | |
d15057b7 | 1906 | |
9ce96908 KP |
1907 | /* We send data to spare ram with oobsize |
1908 | * to prevent byte access */ | |
1909 | memset(oobbuf, 0xff, mtd->oobsize); | |
1910 | if (ops->mode == MTD_OOB_AUTO) | |
1911 | onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen); | |
1912 | else | |
1913 | memcpy(oobbuf + oobcolumn, oob, thisooblen); | |
d15057b7 | 1914 | |
9ce96908 KP |
1915 | oobwritten += thisooblen; |
1916 | oob += thisooblen; | |
1917 | oobcolumn = 0; | |
1918 | } else | |
1919 | oobbuf = (u_char *) ffchars; | |
1920 | ||
1921 | this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); | |
d15057b7 | 1922 | } else |
9ce96908 | 1923 | ONENAND_SET_NEXT_BUFFERRAM(this); |
d15057b7 | 1924 | |
9ce96908 | 1925 | /* |
492e1501 MK |
1926 | * 2 PLANE, MLC, and Flex-OneNAND do not support |
1927 | * write-while-program feature. | |
9ce96908 KP |
1928 | */ |
1929 | if (!ONENAND_IS_2PLANE(this) && !first) { | |
1930 | ONENAND_SET_PREV_BUFFERRAM(this); | |
1931 | ||
1932 | ret = this->wait(mtd, FL_WRITING); | |
1933 | ||
1934 | /* In partial page write we don't update bufferram */ | |
1935 | onenand_update_bufferram(mtd, prev, !ret && !prev_subpage); | |
1936 | if (ret) { | |
1937 | written -= prevlen; | |
297758f8 AKS |
1938 | printk(KERN_ERR "%s: write failed %d\n", |
1939 | __func__, ret); | |
9ce96908 KP |
1940 | break; |
1941 | } | |
cd5f6346 | 1942 | |
9ce96908 KP |
1943 | if (written == len) { |
1944 | /* Only check verify write turn on */ | |
1945 | ret = onenand_verify(mtd, buf - len, to - len, len); | |
1946 | if (ret) | |
297758f8 AKS |
1947 | printk(KERN_ERR "%s: verify failed %d\n", |
1948 | __func__, ret); | |
9ce96908 KP |
1949 | break; |
1950 | } | |
cd5f6346 | 1951 | |
9ce96908 KP |
1952 | ONENAND_SET_NEXT_BUFFERRAM(this); |
1953 | } | |
81f38e11 | 1954 | |
9ce96908 KP |
1955 | this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); |
1956 | ||
1957 | /* | |
1958 | * 2 PLANE, MLC, and Flex-OneNAND wait here | |
1959 | */ | |
ee9745fc | 1960 | if (ONENAND_IS_2PLANE(this)) { |
9ce96908 | 1961 | ret = this->wait(mtd, FL_WRITING); |
cd5f6346 | 1962 | |
9ce96908 KP |
1963 | /* In partial page write we don't update bufferram */ |
1964 | onenand_update_bufferram(mtd, to, !ret && !subpage); | |
1965 | if (ret) { | |
297758f8 AKS |
1966 | printk(KERN_ERR "%s: write failed %d\n", |
1967 | __func__, ret); | |
9ce96908 KP |
1968 | break; |
1969 | } | |
cd5f6346 | 1970 | |
9ce96908 KP |
1971 | /* Only check verify write turn on */ |
1972 | ret = onenand_verify(mtd, buf, to, thislen); | |
1973 | if (ret) { | |
297758f8 AKS |
1974 | printk(KERN_ERR "%s: verify failed %d\n", |
1975 | __func__, ret); | |
9ce96908 KP |
1976 | break; |
1977 | } | |
cd5f6346 | 1978 | |
9ce96908 | 1979 | written += thislen; |
81f38e11 | 1980 | |
9ce96908 KP |
1981 | if (written == len) |
1982 | break; | |
1983 | ||
1984 | } else | |
1985 | written += thislen; | |
cd5f6346 | 1986 | |
60d84f97 | 1987 | column = 0; |
9ce96908 KP |
1988 | prev_subpage = subpage; |
1989 | prev = to; | |
1990 | prevlen = thislen; | |
cd5f6346 KP |
1991 | to += thislen; |
1992 | buf += thislen; | |
9ce96908 | 1993 | first = 0; |
cd5f6346 KP |
1994 | } |
1995 | ||
9ce96908 KP |
1996 | /* In error case, clear all bufferrams */ |
1997 | if (written != len) | |
1998 | onenand_invalidate_bufferram(mtd, 0, -1); | |
1999 | ||
d15057b7 | 2000 | ops->retlen = written; |
9ce96908 | 2001 | ops->oobretlen = oobwritten; |
d5c5e78a | 2002 | |
cd5f6346 KP |
2003 | return ret; |
2004 | } | |
2005 | ||
a5e7c7b4 | 2006 | |
cd5f6346 | 2007 | /** |
49dc08ee | 2008 | * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band |
cd5f6346 KP |
2009 | * @param mtd MTD device structure |
2010 | * @param to offset to write to | |
2011 | * @param len number of bytes to write | |
2012 | * @param retlen pointer to variable to store the number of written bytes | |
2013 | * @param buf the data to write | |
a5e7c7b4 | 2014 | * @param mode operation mode |
cd5f6346 KP |
2015 | * |
2016 | * OneNAND write out-of-band | |
2017 | */ | |
49dc08ee AB |
2018 | static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, |
2019 | struct mtd_oob_ops *ops) | |
cd5f6346 KP |
2020 | { |
2021 | struct onenand_chip *this = mtd->priv; | |
a5e7c7b4 | 2022 | int column, ret = 0, oobsize; |
5988af23 | 2023 | int written = 0, oobcmd; |
91014e9b | 2024 | u_char *oobbuf; |
12f77c9e KP |
2025 | size_t len = ops->ooblen; |
2026 | const u_char *buf = ops->oobbuf; | |
2027 | mtd_oob_mode_t mode = ops->mode; | |
2028 | ||
2029 | to += ops->ooboffs; | |
cd5f6346 | 2030 | |
297758f8 AKS |
2031 | DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", |
2032 | __func__, (unsigned int) to, (int) len); | |
cd5f6346 KP |
2033 | |
2034 | /* Initialize retlen, in case of early exit */ | |
12f77c9e | 2035 | ops->oobretlen = 0; |
cd5f6346 | 2036 | |
a5e7c7b4 AH |
2037 | if (mode == MTD_OOB_AUTO) |
2038 | oobsize = this->ecclayout->oobavail; | |
2039 | else | |
2040 | oobsize = mtd->oobsize; | |
2041 | ||
2042 | column = to & (mtd->oobsize - 1); | |
2043 | ||
2044 | if (unlikely(column >= oobsize)) { | |
297758f8 AKS |
2045 | printk(KERN_ERR "%s: Attempted to start write outside oob\n", |
2046 | __func__); | |
a5e7c7b4 AH |
2047 | return -EINVAL; |
2048 | } | |
2049 | ||
52e4200a | 2050 | /* For compatibility with NAND: Do not allow write past end of page */ |
91014e9b | 2051 | if (unlikely(column + len > oobsize)) { |
297758f8 AKS |
2052 | printk(KERN_ERR "%s: Attempt to write past end of page\n", |
2053 | __func__); | |
52e4200a AH |
2054 | return -EINVAL; |
2055 | } | |
2056 | ||
a5e7c7b4 AH |
2057 | /* Do not allow reads past end of device */ |
2058 | if (unlikely(to >= mtd->size || | |
2059 | column + len > ((mtd->size >> this->page_shift) - | |
2060 | (to >> this->page_shift)) * oobsize)) { | |
8032747e DW |
2061 | printk(KERN_ERR "%s: Attempted to write past end of device\n", |
2062 | __func__); | |
cd5f6346 KP |
2063 | return -EINVAL; |
2064 | } | |
2065 | ||
470bc844 | 2066 | oobbuf = this->oob_buf; |
91014e9b | 2067 | |
5988af23 RH |
2068 | oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; |
2069 | ||
cd5f6346 KP |
2070 | /* Loop until all data write */ |
2071 | while (written < len) { | |
a5e7c7b4 | 2072 | int thislen = min_t(int, oobsize, len - written); |
cd5f6346 | 2073 | |
61a7e198 AB |
2074 | cond_resched(); |
2075 | ||
cd5f6346 KP |
2076 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); |
2077 | ||
34c10609 KP |
2078 | /* We send data to spare ram with oobsize |
2079 | * to prevent byte access */ | |
91014e9b | 2080 | memset(oobbuf, 0xff, mtd->oobsize); |
a5e7c7b4 | 2081 | if (mode == MTD_OOB_AUTO) |
91014e9b | 2082 | onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen); |
a5e7c7b4 | 2083 | else |
91014e9b KP |
2084 | memcpy(oobbuf + column, buf, thislen); |
2085 | this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); | |
cd5f6346 | 2086 | |
5988af23 RH |
2087 | if (ONENAND_IS_MLC(this)) { |
2088 | /* Set main area of DataRAM to 0xff*/ | |
2089 | memset(this->page_buf, 0xff, mtd->writesize); | |
2090 | this->write_bufferram(mtd, ONENAND_DATARAM, | |
2091 | this->page_buf, 0, mtd->writesize); | |
2092 | } | |
2093 | ||
2094 | this->command(mtd, oobcmd, to, mtd->oobsize); | |
cd5f6346 KP |
2095 | |
2096 | onenand_update_bufferram(mtd, to, 0); | |
ee9745fc KP |
2097 | if (ONENAND_IS_2PLANE(this)) { |
2098 | ONENAND_SET_BUFFERRAM1(this); | |
2099 | onenand_update_bufferram(mtd, to + this->writesize, 0); | |
2100 | } | |
cd5f6346 | 2101 | |
8e6ec690 KP |
2102 | ret = this->wait(mtd, FL_WRITING); |
2103 | if (ret) { | |
297758f8 | 2104 | printk(KERN_ERR "%s: write failed %d\n", __func__, ret); |
5b4246f1 | 2105 | break; |
8e6ec690 KP |
2106 | } |
2107 | ||
91014e9b | 2108 | ret = onenand_verify_oob(mtd, oobbuf, to); |
8e6ec690 | 2109 | if (ret) { |
297758f8 AKS |
2110 | printk(KERN_ERR "%s: verify failed %d\n", |
2111 | __func__, ret); | |
5b4246f1 | 2112 | break; |
8e6ec690 | 2113 | } |
cd5f6346 KP |
2114 | |
2115 | written += thislen; | |
cd5f6346 KP |
2116 | if (written == len) |
2117 | break; | |
2118 | ||
a5e7c7b4 | 2119 | to += mtd->writesize; |
cd5f6346 | 2120 | buf += thislen; |
a5e7c7b4 | 2121 | column = 0; |
cd5f6346 KP |
2122 | } |
2123 | ||
12f77c9e | 2124 | ops->oobretlen = written; |
d5c5e78a | 2125 | |
8e6ec690 | 2126 | return ret; |
cd5f6346 KP |
2127 | } |
2128 | ||
d15057b7 KP |
2129 | /** |
2130 | * onenand_write - [MTD Interface] write buffer to FLASH | |
2131 | * @param mtd MTD device structure | |
2132 | * @param to offset to write to | |
2133 | * @param len number of bytes to write | |
2134 | * @param retlen pointer to variable to store the number of written bytes | |
2135 | * @param buf the data to write | |
2136 | * | |
2137 | * Write with ECC | |
2138 | */ | |
2139 | static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, | |
2140 | size_t *retlen, const u_char *buf) | |
2141 | { | |
2142 | struct mtd_oob_ops ops = { | |
2143 | .len = len, | |
2144 | .ooblen = 0, | |
2145 | .datbuf = (u_char *) buf, | |
2146 | .oobbuf = NULL, | |
2147 | }; | |
2148 | int ret; | |
2149 | ||
49dc08ee AB |
2150 | onenand_get_device(mtd, FL_WRITING); |
2151 | ret = onenand_write_ops_nolock(mtd, to, &ops); | |
2152 | onenand_release_device(mtd); | |
d15057b7 | 2153 | |
49dc08ee | 2154 | *retlen = ops.retlen; |
d15057b7 KP |
2155 | return ret; |
2156 | } | |
2157 | ||
8593fbc6 TG |
2158 | /** |
2159 | * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band | |
e3da8067 KP |
2160 | * @param mtd: MTD device structure |
2161 | * @param to: offset to write | |
2162 | * @param ops: oob operation description structure | |
8593fbc6 TG |
2163 | */ |
2164 | static int onenand_write_oob(struct mtd_info *mtd, loff_t to, | |
2165 | struct mtd_oob_ops *ops) | |
2166 | { | |
49dc08ee AB |
2167 | int ret; |
2168 | ||
4f4fad27 | 2169 | switch (ops->mode) { |
a5e7c7b4 AH |
2170 | case MTD_OOB_PLACE: |
2171 | case MTD_OOB_AUTO: | |
2172 | break; | |
2173 | case MTD_OOB_RAW: | |
4f4fad27 | 2174 | /* Not implemented yet */ |
a5e7c7b4 AH |
2175 | default: |
2176 | return -EINVAL; | |
2177 | } | |
d15057b7 | 2178 | |
49dc08ee | 2179 | onenand_get_device(mtd, FL_WRITING); |
d15057b7 | 2180 | if (ops->datbuf) |
49dc08ee AB |
2181 | ret = onenand_write_ops_nolock(mtd, to, ops); |
2182 | else | |
2183 | ret = onenand_write_oob_nolock(mtd, to, ops); | |
2184 | onenand_release_device(mtd); | |
d15057b7 | 2185 | |
49dc08ee | 2186 | return ret; |
8593fbc6 TG |
2187 | } |
2188 | ||
cdc00130 | 2189 | /** |
49dc08ee | 2190 | * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad |
cdc00130 KP |
2191 | * @param mtd MTD device structure |
2192 | * @param ofs offset from device start | |
cdc00130 KP |
2193 | * @param allowbbt 1, if its allowed to access the bbt area |
2194 | * | |
2195 | * Check, if the block is bad. Either by reading the bad block table or | |
2196 | * calling of the scan function. | |
2197 | */ | |
49dc08ee | 2198 | static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt) |
cdc00130 KP |
2199 | { |
2200 | struct onenand_chip *this = mtd->priv; | |
2201 | struct bbm_info *bbm = this->bbm; | |
2202 | ||
2203 | /* Return info from the table */ | |
2204 | return bbm->isbad_bbt(mtd, ofs, allowbbt); | |
2205 | } | |
2206 | ||
72073027 MK |
2207 | |
2208 | static int onenand_multiblock_erase_verify(struct mtd_info *mtd, | |
2209 | struct erase_info *instr) | |
2210 | { | |
2211 | struct onenand_chip *this = mtd->priv; | |
2212 | loff_t addr = instr->addr; | |
2213 | int len = instr->len; | |
2214 | unsigned int block_size = (1 << this->erase_shift); | |
2215 | int ret = 0; | |
2216 | ||
2217 | while (len) { | |
2218 | this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size); | |
2219 | ret = this->wait(mtd, FL_VERIFYING_ERASE); | |
2220 | if (ret) { | |
2221 | printk(KERN_ERR "%s: Failed verify, block %d\n", | |
2222 | __func__, onenand_block(this, addr)); | |
2223 | instr->state = MTD_ERASE_FAILED; | |
2224 | instr->fail_addr = addr; | |
2225 | return -1; | |
2226 | } | |
2227 | len -= block_size; | |
2228 | addr += block_size; | |
2229 | } | |
2230 | return 0; | |
2231 | } | |
2232 | ||
2233 | /** | |
2234 | * onenand_multiblock_erase - [Internal] erase block(s) using multiblock erase | |
2235 | * @param mtd MTD device structure | |
2236 | * @param instr erase instruction | |
2237 | * @param region erase region | |
2238 | * | |
2239 | * Erase one or more blocks up to 64 block at a time | |
2240 | */ | |
2241 | static int onenand_multiblock_erase(struct mtd_info *mtd, | |
2242 | struct erase_info *instr, | |
2243 | unsigned int block_size) | |
2244 | { | |
2245 | struct onenand_chip *this = mtd->priv; | |
2246 | loff_t addr = instr->addr; | |
2247 | int len = instr->len; | |
2248 | int eb_count = 0; | |
2249 | int ret = 0; | |
2250 | int bdry_block = 0; | |
2251 | ||
2252 | instr->state = MTD_ERASING; | |
2253 | ||
2254 | if (ONENAND_IS_DDP(this)) { | |
2255 | loff_t bdry_addr = this->chipsize >> 1; | |
2256 | if (addr < bdry_addr && (addr + len) > bdry_addr) | |
2257 | bdry_block = bdry_addr >> this->erase_shift; | |
2258 | } | |
2259 | ||
2260 | /* Pre-check bbs */ | |
2261 | while (len) { | |
2262 | /* Check if we have a bad block, we do not erase bad blocks */ | |
2263 | if (onenand_block_isbad_nolock(mtd, addr, 0)) { | |
2264 | printk(KERN_WARNING "%s: attempt to erase a bad block " | |
2265 | "at addr 0x%012llx\n", | |
2266 | __func__, (unsigned long long) addr); | |
2267 | instr->state = MTD_ERASE_FAILED; | |
2268 | return -EIO; | |
2269 | } | |
2270 | len -= block_size; | |
2271 | addr += block_size; | |
2272 | } | |
2273 | ||
2274 | len = instr->len; | |
2275 | addr = instr->addr; | |
2276 | ||
2277 | /* loop over 64 eb batches */ | |
2278 | while (len) { | |
2279 | struct erase_info verify_instr = *instr; | |
2280 | int max_eb_count = MB_ERASE_MAX_BLK_COUNT; | |
2281 | ||
2282 | verify_instr.addr = addr; | |
2283 | verify_instr.len = 0; | |
2284 | ||
2285 | /* do not cross chip boundary */ | |
2286 | if (bdry_block) { | |
2287 | int this_block = (addr >> this->erase_shift); | |
2288 | ||
2289 | if (this_block < bdry_block) { | |
2290 | max_eb_count = min(max_eb_count, | |
2291 | (bdry_block - this_block)); | |
2292 | } | |
2293 | } | |
2294 | ||
2295 | eb_count = 0; | |
2296 | ||
2297 | while (len > block_size && eb_count < (max_eb_count - 1)) { | |
2298 | this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE, | |
2299 | addr, block_size); | |
2300 | onenand_invalidate_bufferram(mtd, addr, block_size); | |
2301 | ||
2302 | ret = this->wait(mtd, FL_PREPARING_ERASE); | |
2303 | if (ret) { | |
2304 | printk(KERN_ERR "%s: Failed multiblock erase, " | |
2305 | "block %d\n", __func__, | |
2306 | onenand_block(this, addr)); | |
2307 | instr->state = MTD_ERASE_FAILED; | |
2308 | instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; | |
2309 | return -EIO; | |
2310 | } | |
2311 | ||
2312 | len -= block_size; | |
2313 | addr += block_size; | |
2314 | eb_count++; | |
2315 | } | |
2316 | ||
2317 | /* last block of 64-eb series */ | |
2318 | cond_resched(); | |
2319 | this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); | |
2320 | onenand_invalidate_bufferram(mtd, addr, block_size); | |
2321 | ||
2322 | ret = this->wait(mtd, FL_ERASING); | |
2323 | /* Check if it is write protected */ | |
2324 | if (ret) { | |
2325 | printk(KERN_ERR "%s: Failed erase, block %d\n", | |
2326 | __func__, onenand_block(this, addr)); | |
2327 | instr->state = MTD_ERASE_FAILED; | |
2328 | instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; | |
2329 | return -EIO; | |
2330 | } | |
2331 | ||
2332 | len -= block_size; | |
2333 | addr += block_size; | |
2334 | eb_count++; | |
2335 | ||
2336 | /* verify */ | |
2337 | verify_instr.len = eb_count * block_size; | |
2338 | if (onenand_multiblock_erase_verify(mtd, &verify_instr)) { | |
2339 | instr->state = verify_instr.state; | |
2340 | instr->fail_addr = verify_instr.fail_addr; | |
2341 | return -EIO; | |
2342 | } | |
2343 | ||
2344 | } | |
2345 | return 0; | |
2346 | } | |
2347 | ||
2348 | ||
cd5f6346 | 2349 | /** |
73885aea | 2350 | * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase |
cd5f6346 KP |
2351 | * @param mtd MTD device structure |
2352 | * @param instr erase instruction | |
73885aea MK |
2353 | * @param region erase region |
2354 | * @param block_size erase block size | |
cd5f6346 | 2355 | * |
73885aea | 2356 | * Erase one or more blocks one block at a time |
cd5f6346 | 2357 | */ |
73885aea MK |
2358 | static int onenand_block_by_block_erase(struct mtd_info *mtd, |
2359 | struct erase_info *instr, | |
2360 | struct mtd_erase_region_info *region, | |
2361 | unsigned int block_size) | |
cd5f6346 KP |
2362 | { |
2363 | struct onenand_chip *this = mtd->priv; | |
5988af23 | 2364 | loff_t addr = instr->addr; |
73885aea | 2365 | int len = instr->len; |
5988af23 | 2366 | loff_t region_end = 0; |
73885aea | 2367 | int ret = 0; |
cd5f6346 | 2368 | |
73885aea MK |
2369 | if (region) { |
2370 | /* region is set for Flex-OneNAND */ | |
5988af23 | 2371 | region_end = region->offset + region->erasesize * region->numblocks; |
cd5f6346 KP |
2372 | } |
2373 | ||
cd5f6346 KP |
2374 | instr->state = MTD_ERASING; |
2375 | ||
73885aea | 2376 | /* Loop through the blocks */ |
cd5f6346 | 2377 | while (len) { |
61a7e198 | 2378 | cond_resched(); |
cd5f6346 | 2379 | |
cdc00130 | 2380 | /* Check if we have a bad block, we do not erase bad blocks */ |
49dc08ee | 2381 | if (onenand_block_isbad_nolock(mtd, addr, 0)) { |
297758f8 AKS |
2382 | printk(KERN_WARNING "%s: attempt to erase a bad block " |
2383 | "at addr 0x%012llx\n", | |
2384 | __func__, (unsigned long long) addr); | |
cdc00130 | 2385 | instr->state = MTD_ERASE_FAILED; |
73885aea | 2386 | return -EIO; |
cdc00130 | 2387 | } |
cd5f6346 KP |
2388 | |
2389 | this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); | |
2390 | ||
480b9dfb AH |
2391 | onenand_invalidate_bufferram(mtd, addr, block_size); |
2392 | ||
cd5f6346 KP |
2393 | ret = this->wait(mtd, FL_ERASING); |
2394 | /* Check, if it is write protected */ | |
2395 | if (ret) { | |
297758f8 AKS |
2396 | printk(KERN_ERR "%s: Failed erase, block %d\n", |
2397 | __func__, onenand_block(this, addr)); | |
cd5f6346 KP |
2398 | instr->state = MTD_ERASE_FAILED; |
2399 | instr->fail_addr = addr; | |
73885aea | 2400 | return -EIO; |
cd5f6346 KP |
2401 | } |
2402 | ||
2403 | len -= block_size; | |
2404 | addr += block_size; | |
5988af23 RH |
2405 | |
2406 | if (addr == region_end) { | |
2407 | if (!len) | |
2408 | break; | |
2409 | region++; | |
2410 | ||
2411 | block_size = region->erasesize; | |
2412 | region_end = region->offset + region->erasesize * region->numblocks; | |
2413 | ||
2414 | if (len & (block_size - 1)) { | |
2415 | /* FIXME: This should be handled at MTD partitioning level. */ | |
297758f8 AKS |
2416 | printk(KERN_ERR "%s: Unaligned address\n", |
2417 | __func__); | |
73885aea | 2418 | return -EIO; |
5988af23 RH |
2419 | } |
2420 | } | |
73885aea MK |
2421 | } |
2422 | return 0; | |
2423 | } | |
5988af23 | 2424 | |
73885aea MK |
2425 | /** |
2426 | * onenand_erase - [MTD Interface] erase block(s) | |
2427 | * @param mtd MTD device structure | |
2428 | * @param instr erase instruction | |
2429 | * | |
2430 | * Erase one or more blocks | |
2431 | */ | |
2432 | static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) | |
2433 | { | |
2434 | struct onenand_chip *this = mtd->priv; | |
2435 | unsigned int block_size; | |
2436 | loff_t addr = instr->addr; | |
2437 | loff_t len = instr->len; | |
2438 | int ret = 0; | |
2439 | struct mtd_erase_region_info *region = NULL; | |
2440 | loff_t region_offset = 0; | |
2441 | ||
2442 | DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__, | |
2443 | (unsigned long long) instr->addr, (unsigned long long) instr->len); | |
2444 | ||
2445 | /* Do not allow erase past end of device */ | |
2446 | if (unlikely((len + addr) > mtd->size)) { | |
2447 | printk(KERN_ERR "%s: Erase past end of device\n", __func__); | |
2448 | return -EINVAL; | |
cd5f6346 KP |
2449 | } |
2450 | ||
73885aea MK |
2451 | if (FLEXONENAND(this)) { |
2452 | /* Find the eraseregion of this address */ | |
2453 | int i = flexonenand_region(mtd, addr); | |
cd5f6346 | 2454 | |
73885aea MK |
2455 | region = &mtd->eraseregions[i]; |
2456 | block_size = region->erasesize; | |
cd5f6346 | 2457 | |
73885aea MK |
2458 | /* Start address within region must align on block boundary. |
2459 | * Erase region's start offset is always block start address. | |
2460 | */ | |
2461 | region_offset = region->offset; | |
2462 | } else | |
2463 | block_size = 1 << this->erase_shift; | |
2464 | ||
2465 | /* Start address must align on block boundary */ | |
2466 | if (unlikely((addr - region_offset) & (block_size - 1))) { | |
2467 | printk(KERN_ERR "%s: Unaligned address\n", __func__); | |
2468 | return -EINVAL; | |
2469 | } | |
2470 | ||
2471 | /* Length must align on block boundary */ | |
2472 | if (unlikely(len & (block_size - 1))) { | |
2473 | printk(KERN_ERR "%s: Length not block aligned\n", __func__); | |
2474 | return -EINVAL; | |
2475 | } | |
2476 | ||
2477 | instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; | |
2478 | ||
2479 | /* Grab the lock and see if the device is available */ | |
2480 | onenand_get_device(mtd, FL_ERASING); | |
2481 | ||
72073027 MK |
2482 | if (region || instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) { |
2483 | /* region is set for Flex-OneNAND (no mb erase) */ | |
2484 | ret = onenand_block_by_block_erase(mtd, instr, | |
2485 | region, block_size); | |
2486 | } else { | |
2487 | ret = onenand_multiblock_erase(mtd, instr, block_size); | |
2488 | } | |
cd5f6346 KP |
2489 | |
2490 | /* Deselect and wake up anyone waiting on the device */ | |
2491 | onenand_release_device(mtd); | |
2492 | ||
3cd3a86b | 2493 | /* Do call back function */ |
73885aea MK |
2494 | if (!ret) { |
2495 | instr->state = MTD_ERASE_DONE; | |
3cd3a86b | 2496 | mtd_erase_callback(instr); |
73885aea | 2497 | } |
3cd3a86b | 2498 | |
cd5f6346 KP |
2499 | return ret; |
2500 | } | |
2501 | ||
2502 | /** | |
2503 | * onenand_sync - [MTD Interface] sync | |
2504 | * @param mtd MTD device structure | |
2505 | * | |
2506 | * Sync is actually a wait for chip ready function | |
2507 | */ | |
2508 | static void onenand_sync(struct mtd_info *mtd) | |
2509 | { | |
297758f8 | 2510 | DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__); |
cd5f6346 KP |
2511 | |
2512 | /* Grab the lock and see if the device is available */ | |
2513 | onenand_get_device(mtd, FL_SYNCING); | |
2514 | ||
2515 | /* Release it and go back */ | |
2516 | onenand_release_device(mtd); | |
2517 | } | |
2518 | ||
2519 | /** | |
2520 | * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad | |
2521 | * @param mtd MTD device structure | |
2522 | * @param ofs offset relative to mtd start | |
cdc00130 KP |
2523 | * |
2524 | * Check whether the block is bad | |
cd5f6346 KP |
2525 | */ |
2526 | static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) | |
2527 | { | |
49dc08ee AB |
2528 | int ret; |
2529 | ||
cdc00130 KP |
2530 | /* Check for invalid offset */ |
2531 | if (ofs > mtd->size) | |
2532 | return -EINVAL; | |
2533 | ||
49dc08ee AB |
2534 | onenand_get_device(mtd, FL_READING); |
2535 | ret = onenand_block_isbad_nolock(mtd, ofs, 0); | |
2536 | onenand_release_device(mtd); | |
2537 | return ret; | |
cdc00130 KP |
2538 | } |
2539 | ||
2540 | /** | |
2541 | * onenand_default_block_markbad - [DEFAULT] mark a block bad | |
2542 | * @param mtd MTD device structure | |
2543 | * @param ofs offset from device start | |
2544 | * | |
2545 | * This is the default implementation, which can be overridden by | |
2546 | * a hardware specific driver. | |
2547 | */ | |
2548 | static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
2549 | { | |
2550 | struct onenand_chip *this = mtd->priv; | |
2551 | struct bbm_info *bbm = this->bbm; | |
2552 | u_char buf[2] = {0, 0}; | |
12f77c9e KP |
2553 | struct mtd_oob_ops ops = { |
2554 | .mode = MTD_OOB_PLACE, | |
2555 | .ooblen = 2, | |
2556 | .oobbuf = buf, | |
2557 | .ooboffs = 0, | |
2558 | }; | |
cdc00130 KP |
2559 | int block; |
2560 | ||
2561 | /* Get block number */ | |
5988af23 | 2562 | block = onenand_block(this, ofs); |
cdc00130 KP |
2563 | if (bbm->bbt) |
2564 | bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); | |
2565 | ||
492e1501 | 2566 | /* We write two bytes, so we don't have to mess with 16-bit access */ |
cdc00130 | 2567 | ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); |
5988af23 RH |
2568 | /* FIXME : What to do when marking SLC block in partition |
2569 | * with MLC erasesize? For now, it is not advisable to | |
2570 | * create partitions containing both SLC and MLC regions. | |
2571 | */ | |
2572 | return onenand_write_oob_nolock(mtd, ofs, &ops); | |
cd5f6346 KP |
2573 | } |
2574 | ||
2575 | /** | |
2576 | * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad | |
2577 | * @param mtd MTD device structure | |
2578 | * @param ofs offset relative to mtd start | |
cdc00130 KP |
2579 | * |
2580 | * Mark the block as bad | |
cd5f6346 KP |
2581 | */ |
2582 | static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
2583 | { | |
cdc00130 KP |
2584 | struct onenand_chip *this = mtd->priv; |
2585 | int ret; | |
2586 | ||
2587 | ret = onenand_block_isbad(mtd, ofs); | |
2588 | if (ret) { | |
2589 | /* If it was bad already, return success and do nothing */ | |
2590 | if (ret > 0) | |
2591 | return 0; | |
2592 | return ret; | |
2593 | } | |
2594 | ||
49dc08ee AB |
2595 | onenand_get_device(mtd, FL_WRITING); |
2596 | ret = this->block_markbad(mtd, ofs); | |
2597 | onenand_release_device(mtd); | |
2598 | return ret; | |
cd5f6346 KP |
2599 | } |
2600 | ||
2601 | /** | |
08f782b6 | 2602 | * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s) |
cd5f6346 KP |
2603 | * @param mtd MTD device structure |
2604 | * @param ofs offset relative to mtd start | |
08f782b6 | 2605 | * @param len number of bytes to lock or unlock |
e3da8067 | 2606 | * @param cmd lock or unlock command |
cd5f6346 | 2607 | * |
08f782b6 | 2608 | * Lock or unlock one or more blocks |
cd5f6346 | 2609 | */ |
08f782b6 | 2610 | static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) |
cd5f6346 KP |
2611 | { |
2612 | struct onenand_chip *this = mtd->priv; | |
2613 | int start, end, block, value, status; | |
08f782b6 | 2614 | int wp_status_mask; |
cd5f6346 | 2615 | |
5988af23 RH |
2616 | start = onenand_block(this, ofs); |
2617 | end = onenand_block(this, ofs + len) - 1; | |
cd5f6346 | 2618 | |
08f782b6 KP |
2619 | if (cmd == ONENAND_CMD_LOCK) |
2620 | wp_status_mask = ONENAND_WP_LS; | |
2621 | else | |
2622 | wp_status_mask = ONENAND_WP_US; | |
2623 | ||
cd5f6346 | 2624 | /* Continuous lock scheme */ |
28b79ff9 | 2625 | if (this->options & ONENAND_HAS_CONT_LOCK) { |
cd5f6346 KP |
2626 | /* Set start block address */ |
2627 | this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS); | |
2628 | /* Set end block address */ | |
5988af23 | 2629 | this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS); |
08f782b6 KP |
2630 | /* Write lock command */ |
2631 | this->command(mtd, cmd, 0, 0); | |
cd5f6346 KP |
2632 | |
2633 | /* There's no return value */ | |
08f782b6 | 2634 | this->wait(mtd, FL_LOCKING); |
cd5f6346 KP |
2635 | |
2636 | /* Sanity check */ | |
2637 | while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) | |
2638 | & ONENAND_CTRL_ONGO) | |
2639 | continue; | |
2640 | ||
2641 | /* Check lock status */ | |
2642 | status = this->read_word(this->base + ONENAND_REG_WP_STATUS); | |
08f782b6 | 2643 | if (!(status & wp_status_mask)) |
297758f8 AKS |
2644 | printk(KERN_ERR "%s: wp status = 0x%x\n", |
2645 | __func__, status); | |
cd5f6346 KP |
2646 | |
2647 | return 0; | |
2648 | } | |
2649 | ||
2650 | /* Block lock scheme */ | |
5988af23 | 2651 | for (block = start; block < end + 1; block++) { |
20ba89a3 KP |
2652 | /* Set block address */ |
2653 | value = onenand_block_address(this, block); | |
2654 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); | |
2655 | /* Select DataRAM for DDP */ | |
2656 | value = onenand_bufferram_address(this, block); | |
2657 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); | |
cd5f6346 KP |
2658 | /* Set start block address */ |
2659 | this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); | |
08f782b6 KP |
2660 | /* Write lock command */ |
2661 | this->command(mtd, cmd, 0, 0); | |
cd5f6346 KP |
2662 | |
2663 | /* There's no return value */ | |
08f782b6 | 2664 | this->wait(mtd, FL_LOCKING); |
cd5f6346 KP |
2665 | |
2666 | /* Sanity check */ | |
2667 | while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) | |
2668 | & ONENAND_CTRL_ONGO) | |
2669 | continue; | |
2670 | ||
cd5f6346 KP |
2671 | /* Check lock status */ |
2672 | status = this->read_word(this->base + ONENAND_REG_WP_STATUS); | |
08f782b6 | 2673 | if (!(status & wp_status_mask)) |
297758f8 AKS |
2674 | printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n", |
2675 | __func__, block, status); | |
cd5f6346 | 2676 | } |
d5c5e78a | 2677 | |
cd5f6346 KP |
2678 | return 0; |
2679 | } | |
2680 | ||
08f782b6 KP |
2681 | /** |
2682 | * onenand_lock - [MTD Interface] Lock block(s) | |
2683 | * @param mtd MTD device structure | |
2684 | * @param ofs offset relative to mtd start | |
2685 | * @param len number of bytes to unlock | |
2686 | * | |
2687 | * Lock one or more blocks | |
2688 | */ | |
69423d99 | 2689 | static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
08f782b6 | 2690 | { |
34627f0e AH |
2691 | int ret; |
2692 | ||
2693 | onenand_get_device(mtd, FL_LOCKING); | |
2694 | ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK); | |
2695 | onenand_release_device(mtd); | |
2696 | return ret; | |
08f782b6 KP |
2697 | } |
2698 | ||
08f782b6 KP |
2699 | /** |
2700 | * onenand_unlock - [MTD Interface] Unlock block(s) | |
2701 | * @param mtd MTD device structure | |
2702 | * @param ofs offset relative to mtd start | |
2703 | * @param len number of bytes to unlock | |
2704 | * | |
2705 | * Unlock one or more blocks | |
2706 | */ | |
69423d99 | 2707 | static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
08f782b6 | 2708 | { |
34627f0e AH |
2709 | int ret; |
2710 | ||
2711 | onenand_get_device(mtd, FL_LOCKING); | |
2712 | ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); | |
2713 | onenand_release_device(mtd); | |
2714 | return ret; | |
08f782b6 KP |
2715 | } |
2716 | ||
28b79ff9 KP |
2717 | /** |
2718 | * onenand_check_lock_status - [OneNAND Interface] Check lock status | |
2719 | * @param this onenand chip data structure | |
2720 | * | |
2721 | * Check lock status | |
2722 | */ | |
66a10506 | 2723 | static int onenand_check_lock_status(struct onenand_chip *this) |
28b79ff9 KP |
2724 | { |
2725 | unsigned int value, block, status; | |
2726 | unsigned int end; | |
2727 | ||
2728 | end = this->chipsize >> this->erase_shift; | |
2729 | for (block = 0; block < end; block++) { | |
2730 | /* Set block address */ | |
2731 | value = onenand_block_address(this, block); | |
2732 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); | |
2733 | /* Select DataRAM for DDP */ | |
2734 | value = onenand_bufferram_address(this, block); | |
2735 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); | |
2736 | /* Set start block address */ | |
2737 | this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); | |
2738 | ||
2739 | /* Check lock status */ | |
2740 | status = this->read_word(this->base + ONENAND_REG_WP_STATUS); | |
66a10506 | 2741 | if (!(status & ONENAND_WP_US)) { |
297758f8 AKS |
2742 | printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n", |
2743 | __func__, block, status); | |
66a10506 KP |
2744 | return 0; |
2745 | } | |
28b79ff9 | 2746 | } |
66a10506 KP |
2747 | |
2748 | return 1; | |
28b79ff9 KP |
2749 | } |
2750 | ||
2751 | /** | |
2752 | * onenand_unlock_all - [OneNAND Interface] unlock all blocks | |
2753 | * @param mtd MTD device structure | |
2754 | * | |
2755 | * Unlock all blocks | |
2756 | */ | |
66a10506 | 2757 | static void onenand_unlock_all(struct mtd_info *mtd) |
28b79ff9 KP |
2758 | { |
2759 | struct onenand_chip *this = mtd->priv; | |
66a10506 | 2760 | loff_t ofs = 0; |
5988af23 | 2761 | loff_t len = mtd->size; |
28b79ff9 KP |
2762 | |
2763 | if (this->options & ONENAND_HAS_UNLOCK_ALL) { | |
10b7a2bd KP |
2764 | /* Set start block address */ |
2765 | this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS); | |
28b79ff9 KP |
2766 | /* Write unlock command */ |
2767 | this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0); | |
2768 | ||
2769 | /* There's no return value */ | |
08f782b6 | 2770 | this->wait(mtd, FL_LOCKING); |
28b79ff9 KP |
2771 | |
2772 | /* Sanity check */ | |
2773 | while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) | |
2774 | & ONENAND_CTRL_ONGO) | |
2775 | continue; | |
2776 | ||
31bb999e KP |
2777 | /* Don't check lock status */ |
2778 | if (this->options & ONENAND_SKIP_UNLOCK_CHECK) | |
2779 | return; | |
2780 | ||
66a10506 KP |
2781 | /* Check lock status */ |
2782 | if (onenand_check_lock_status(this)) | |
2783 | return; | |
2784 | ||
28b79ff9 | 2785 | /* Workaround for all block unlock in DDP */ |
5988af23 | 2786 | if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) { |
66a10506 KP |
2787 | /* All blocks on another chip */ |
2788 | ofs = this->chipsize >> 1; | |
2789 | len = this->chipsize >> 1; | |
28b79ff9 | 2790 | } |
28b79ff9 KP |
2791 | } |
2792 | ||
66a10506 | 2793 | onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); |
28b79ff9 KP |
2794 | } |
2795 | ||
493c6460 KP |
2796 | #ifdef CONFIG_MTD_ONENAND_OTP |
2797 | ||
3cf60253 AKS |
2798 | /** |
2799 | * onenand_otp_command - Send OTP specific command to OneNAND device | |
2800 | * @param mtd MTD device structure | |
2801 | * @param cmd the command to be sent | |
2802 | * @param addr offset to read from or write to | |
2803 | * @param len number of bytes to read or write | |
2804 | */ | |
2805 | static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr, | |
2806 | size_t len) | |
2807 | { | |
2808 | struct onenand_chip *this = mtd->priv; | |
2809 | int value, block, page; | |
2810 | ||
2811 | /* Address translation */ | |
2812 | switch (cmd) { | |
2813 | case ONENAND_CMD_OTP_ACCESS: | |
2814 | block = (int) (addr >> this->erase_shift); | |
2815 | page = -1; | |
2816 | break; | |
2817 | ||
2818 | default: | |
2819 | block = (int) (addr >> this->erase_shift); | |
2820 | page = (int) (addr >> this->page_shift); | |
2821 | ||
2822 | if (ONENAND_IS_2PLANE(this)) { | |
2823 | /* Make the even block number */ | |
2824 | block &= ~1; | |
2825 | /* Is it the odd plane? */ | |
2826 | if (addr & this->writesize) | |
2827 | block++; | |
2828 | page >>= 1; | |
2829 | } | |
2830 | page &= this->page_mask; | |
2831 | break; | |
2832 | } | |
2833 | ||
2834 | if (block != -1) { | |
2835 | /* Write 'DFS, FBA' of Flash */ | |
2836 | value = onenand_block_address(this, block); | |
2837 | this->write_word(value, this->base + | |
2838 | ONENAND_REG_START_ADDRESS1); | |
2839 | } | |
2840 | ||
2841 | if (page != -1) { | |
2842 | /* Now we use page size operation */ | |
2843 | int sectors = 4, count = 4; | |
2844 | int dataram; | |
2845 | ||
2846 | switch (cmd) { | |
2847 | default: | |
2848 | if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) | |
2849 | cmd = ONENAND_CMD_2X_PROG; | |
2850 | dataram = ONENAND_CURRENT_BUFFERRAM(this); | |
2851 | break; | |
2852 | } | |
2853 | ||
2854 | /* Write 'FPA, FSA' of Flash */ | |
2855 | value = onenand_page_address(page, sectors); | |
2856 | this->write_word(value, this->base + | |
2857 | ONENAND_REG_START_ADDRESS8); | |
2858 | ||
2859 | /* Write 'BSA, BSC' of DataRAM */ | |
2860 | value = onenand_buffer_address(dataram, sectors, count); | |
2861 | this->write_word(value, this->base + ONENAND_REG_START_BUFFER); | |
2862 | } | |
2863 | ||
2864 | /* Interrupt clear */ | |
2865 | this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); | |
2866 | ||
2867 | /* Write command */ | |
2868 | this->write_word(cmd, this->base + ONENAND_REG_COMMAND); | |
2869 | ||
2870 | return 0; | |
2871 | } | |
2872 | ||
2873 | /** | |
2874 | * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP | |
2875 | * @param mtd MTD device structure | |
2876 | * @param to offset to write to | |
2877 | * @param len number of bytes to write | |
2878 | * @param retlen pointer to variable to store the number of written bytes | |
2879 | * @param buf the data to write | |
2880 | * | |
2881 | * OneNAND write out-of-band only for OTP | |
2882 | */ | |
2883 | static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to, | |
2884 | struct mtd_oob_ops *ops) | |
2885 | { | |
2886 | struct onenand_chip *this = mtd->priv; | |
2887 | int column, ret = 0, oobsize; | |
2888 | int written = 0; | |
2889 | u_char *oobbuf; | |
2890 | size_t len = ops->ooblen; | |
2891 | const u_char *buf = ops->oobbuf; | |
2892 | int block, value, status; | |
2893 | ||
2894 | to += ops->ooboffs; | |
2895 | ||
2896 | /* Initialize retlen, in case of early exit */ | |
2897 | ops->oobretlen = 0; | |
2898 | ||
2899 | oobsize = mtd->oobsize; | |
2900 | ||
2901 | column = to & (mtd->oobsize - 1); | |
2902 | ||
2903 | oobbuf = this->oob_buf; | |
2904 | ||
2905 | /* Loop until all data write */ | |
2906 | while (written < len) { | |
2907 | int thislen = min_t(int, oobsize, len - written); | |
2908 | ||
2909 | cond_resched(); | |
2910 | ||
2911 | block = (int) (to >> this->erase_shift); | |
2912 | /* | |
2913 | * Write 'DFS, FBA' of Flash | |
2914 | * Add: F100h DQ=DFS, FBA | |
2915 | */ | |
2916 | ||
2917 | value = onenand_block_address(this, block); | |
2918 | this->write_word(value, this->base + | |
2919 | ONENAND_REG_START_ADDRESS1); | |
2920 | ||
2921 | /* | |
2922 | * Select DataRAM for DDP | |
2923 | * Add: F101h DQ=DBS | |
2924 | */ | |
2925 | ||
2926 | value = onenand_bufferram_address(this, block); | |
2927 | this->write_word(value, this->base + | |
2928 | ONENAND_REG_START_ADDRESS2); | |
2929 | ONENAND_SET_NEXT_BUFFERRAM(this); | |
2930 | ||
2931 | /* | |
2932 | * Enter OTP access mode | |
2933 | */ | |
2934 | this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); | |
2935 | this->wait(mtd, FL_OTPING); | |
2936 | ||
2937 | /* We send data to spare ram with oobsize | |
2938 | * to prevent byte access */ | |
2939 | memcpy(oobbuf + column, buf, thislen); | |
2940 | ||
2941 | /* | |
2942 | * Write Data into DataRAM | |
2943 | * Add: 8th Word | |
2944 | * in sector0/spare/page0 | |
2945 | * DQ=XXFCh | |
2946 | */ | |
2947 | this->write_bufferram(mtd, ONENAND_SPARERAM, | |
2948 | oobbuf, 0, mtd->oobsize); | |
2949 | ||
2950 | onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); | |
2951 | onenand_update_bufferram(mtd, to, 0); | |
2952 | if (ONENAND_IS_2PLANE(this)) { | |
2953 | ONENAND_SET_BUFFERRAM1(this); | |
2954 | onenand_update_bufferram(mtd, to + this->writesize, 0); | |
2955 | } | |
2956 | ||
2957 | ret = this->wait(mtd, FL_WRITING); | |
2958 | if (ret) { | |
2959 | printk(KERN_ERR "%s: write failed %d\n", __func__, ret); | |
2960 | break; | |
2961 | } | |
2962 | ||
2963 | /* Exit OTP access mode */ | |
2964 | this->command(mtd, ONENAND_CMD_RESET, 0, 0); | |
2965 | this->wait(mtd, FL_RESETING); | |
2966 | ||
2967 | status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); | |
2968 | status &= 0x60; | |
2969 | ||
2970 | if (status == 0x60) { | |
2971 | printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); | |
2972 | printk(KERN_DEBUG "1st Block\tLOCKED\n"); | |
2973 | printk(KERN_DEBUG "OTP Block\tLOCKED\n"); | |
2974 | } else if (status == 0x20) { | |
2975 | printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); | |
2976 | printk(KERN_DEBUG "1st Block\tLOCKED\n"); | |
2977 | printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n"); | |
2978 | } else if (status == 0x40) { | |
2979 | printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); | |
2980 | printk(KERN_DEBUG "1st Block\tUN-LOCKED\n"); | |
2981 | printk(KERN_DEBUG "OTP Block\tLOCKED\n"); | |
2982 | } else { | |
2983 | printk(KERN_DEBUG "Reboot to check\n"); | |
2984 | } | |
2985 | ||
2986 | written += thislen; | |
2987 | if (written == len) | |
2988 | break; | |
2989 | ||
2990 | to += mtd->writesize; | |
2991 | buf += thislen; | |
2992 | column = 0; | |
2993 | } | |
2994 | ||
2995 | ops->oobretlen = written; | |
2996 | ||
2997 | return ret; | |
2998 | } | |
2999 | ||
492e1501 | 3000 | /* Internal OTP operation */ |
493c6460 KP |
3001 | typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len, |
3002 | size_t *retlen, u_char *buf); | |
3003 | ||
3004 | /** | |
3005 | * do_otp_read - [DEFAULT] Read OTP block area | |
3006 | * @param mtd MTD device structure | |
3007 | * @param from The offset to read | |
3008 | * @param len number of bytes to read | |
3009 | * @param retlen pointer to variable to store the number of readbytes | |
3010 | * @param buf the databuffer to put/get data | |
3011 | * | |
3012 | * Read OTP block area. | |
3013 | */ | |
3014 | static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len, | |
3015 | size_t *retlen, u_char *buf) | |
3016 | { | |
3017 | struct onenand_chip *this = mtd->priv; | |
49dc08ee AB |
3018 | struct mtd_oob_ops ops = { |
3019 | .len = len, | |
3020 | .ooblen = 0, | |
3021 | .datbuf = buf, | |
3022 | .oobbuf = NULL, | |
3023 | }; | |
493c6460 KP |
3024 | int ret; |
3025 | ||
3026 | /* Enter OTP access mode */ | |
3027 | this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); | |
3028 | this->wait(mtd, FL_OTPING); | |
3029 | ||
5988af23 RH |
3030 | ret = ONENAND_IS_MLC(this) ? |
3031 | onenand_mlc_read_ops_nolock(mtd, from, &ops) : | |
3032 | onenand_read_ops_nolock(mtd, from, &ops); | |
493c6460 KP |
3033 | |
3034 | /* Exit OTP access mode */ | |
3035 | this->command(mtd, ONENAND_CMD_RESET, 0, 0); | |
3036 | this->wait(mtd, FL_RESETING); | |
3037 | ||
3038 | return ret; | |
3039 | } | |
3040 | ||
3041 | /** | |
3042 | * do_otp_write - [DEFAULT] Write OTP block area | |
3043 | * @param mtd MTD device structure | |
49dc08ee | 3044 | * @param to The offset to write |
493c6460 KP |
3045 | * @param len number of bytes to write |
3046 | * @param retlen pointer to variable to store the number of write bytes | |
3047 | * @param buf the databuffer to put/get data | |
3048 | * | |
3049 | * Write OTP block area. | |
3050 | */ | |
49dc08ee | 3051 | static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len, |
493c6460 KP |
3052 | size_t *retlen, u_char *buf) |
3053 | { | |
3054 | struct onenand_chip *this = mtd->priv; | |
3055 | unsigned char *pbuf = buf; | |
3056 | int ret; | |
49dc08ee | 3057 | struct mtd_oob_ops ops; |
493c6460 KP |
3058 | |
3059 | /* Force buffer page aligned */ | |
28318776 | 3060 | if (len < mtd->writesize) { |
493c6460 | 3061 | memcpy(this->page_buf, buf, len); |
28318776 | 3062 | memset(this->page_buf + len, 0xff, mtd->writesize - len); |
493c6460 | 3063 | pbuf = this->page_buf; |
28318776 | 3064 | len = mtd->writesize; |
493c6460 KP |
3065 | } |
3066 | ||
3067 | /* Enter OTP access mode */ | |
3068 | this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); | |
3069 | this->wait(mtd, FL_OTPING); | |
3070 | ||
49dc08ee AB |
3071 | ops.len = len; |
3072 | ops.ooblen = 0; | |
1437085c | 3073 | ops.datbuf = pbuf; |
49dc08ee AB |
3074 | ops.oobbuf = NULL; |
3075 | ret = onenand_write_ops_nolock(mtd, to, &ops); | |
3076 | *retlen = ops.retlen; | |
493c6460 KP |
3077 | |
3078 | /* Exit OTP access mode */ | |
3079 | this->command(mtd, ONENAND_CMD_RESET, 0, 0); | |
3080 | this->wait(mtd, FL_RESETING); | |
3081 | ||
3082 | return ret; | |
3083 | } | |
3084 | ||
3085 | /** | |
3086 | * do_otp_lock - [DEFAULT] Lock OTP block area | |
3087 | * @param mtd MTD device structure | |
3088 | * @param from The offset to lock | |
3089 | * @param len number of bytes to lock | |
3090 | * @param retlen pointer to variable to store the number of lock bytes | |
3091 | * @param buf the databuffer to put/get data | |
3092 | * | |
3093 | * Lock OTP block area. | |
3094 | */ | |
3095 | static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len, | |
3096 | size_t *retlen, u_char *buf) | |
3097 | { | |
3098 | struct onenand_chip *this = mtd->priv; | |
5988af23 | 3099 | struct mtd_oob_ops ops; |
493c6460 KP |
3100 | int ret; |
3101 | ||
5988af23 | 3102 | if (FLEXONENAND(this)) { |
3cf60253 AKS |
3103 | |
3104 | /* Enter OTP access mode */ | |
3105 | this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); | |
3106 | this->wait(mtd, FL_OTPING); | |
5988af23 RH |
3107 | /* |
3108 | * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of | |
3109 | * main area of page 49. | |
3110 | */ | |
3111 | ops.len = mtd->writesize; | |
3112 | ops.ooblen = 0; | |
3113 | ops.datbuf = buf; | |
3114 | ops.oobbuf = NULL; | |
3115 | ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops); | |
3116 | *retlen = ops.retlen; | |
3cf60253 AKS |
3117 | |
3118 | /* Exit OTP access mode */ | |
3119 | this->command(mtd, ONENAND_CMD_RESET, 0, 0); | |
3120 | this->wait(mtd, FL_RESETING); | |
5988af23 RH |
3121 | } else { |
3122 | ops.mode = MTD_OOB_PLACE; | |
3123 | ops.ooblen = len; | |
3124 | ops.oobbuf = buf; | |
3125 | ops.ooboffs = 0; | |
3cf60253 | 3126 | ret = onenand_otp_write_oob_nolock(mtd, from, &ops); |
5988af23 RH |
3127 | *retlen = ops.oobretlen; |
3128 | } | |
493c6460 | 3129 | |
493c6460 KP |
3130 | return ret; |
3131 | } | |
3132 | ||
3133 | /** | |
3134 | * onenand_otp_walk - [DEFAULT] Handle OTP operation | |
3135 | * @param mtd MTD device structure | |
3136 | * @param from The offset to read/write | |
3137 | * @param len number of bytes to read/write | |
3138 | * @param retlen pointer to variable to store the number of read bytes | |
3139 | * @param buf the databuffer to put/get data | |
3140 | * @param action do given action | |
3141 | * @param mode specify user and factory | |
3142 | * | |
3143 | * Handle OTP operation. | |
3144 | */ | |
3145 | static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len, | |
3146 | size_t *retlen, u_char *buf, | |
3147 | otp_op_t action, int mode) | |
3148 | { | |
3149 | struct onenand_chip *this = mtd->priv; | |
3150 | int otp_pages; | |
3151 | int density; | |
3152 | int ret = 0; | |
3153 | ||
3154 | *retlen = 0; | |
3155 | ||
e71f04fc | 3156 | density = onenand_get_density(this->device_id); |
493c6460 KP |
3157 | if (density < ONENAND_DEVICE_DENSITY_512Mb) |
3158 | otp_pages = 20; | |
3159 | else | |
3cf60253 | 3160 | otp_pages = 50; |
493c6460 KP |
3161 | |
3162 | if (mode == MTD_OTP_FACTORY) { | |
28318776 | 3163 | from += mtd->writesize * otp_pages; |
3cf60253 | 3164 | otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages; |
493c6460 KP |
3165 | } |
3166 | ||
3167 | /* Check User/Factory boundary */ | |
3cf60253 | 3168 | if (mode == MTD_OTP_USER) { |
0a032a4d | 3169 | if (mtd->writesize * otp_pages < from + len) |
3cf60253 AKS |
3170 | return 0; |
3171 | } else { | |
0a032a4d | 3172 | if (mtd->writesize * otp_pages < len) |
3cf60253 AKS |
3173 | return 0; |
3174 | } | |
493c6460 | 3175 | |
49dc08ee | 3176 | onenand_get_device(mtd, FL_OTPING); |
493c6460 KP |
3177 | while (len > 0 && otp_pages > 0) { |
3178 | if (!action) { /* OTP Info functions */ | |
3179 | struct otp_info *otpinfo; | |
3180 | ||
3181 | len -= sizeof(struct otp_info); | |
49dc08ee AB |
3182 | if (len <= 0) { |
3183 | ret = -ENOSPC; | |
3184 | break; | |
3185 | } | |
493c6460 KP |
3186 | |
3187 | otpinfo = (struct otp_info *) buf; | |
3188 | otpinfo->start = from; | |
28318776 | 3189 | otpinfo->length = mtd->writesize; |
493c6460 KP |
3190 | otpinfo->locked = 0; |
3191 | ||
28318776 | 3192 | from += mtd->writesize; |
493c6460 KP |
3193 | buf += sizeof(struct otp_info); |
3194 | *retlen += sizeof(struct otp_info); | |
3195 | } else { | |
3196 | size_t tmp_retlen; | |
493c6460 KP |
3197 | |
3198 | ret = action(mtd, from, len, &tmp_retlen, buf); | |
3199 | ||
3cf60253 AKS |
3200 | buf += tmp_retlen; |
3201 | len -= tmp_retlen; | |
3202 | *retlen += tmp_retlen; | |
493c6460 | 3203 | |
49dc08ee AB |
3204 | if (ret) |
3205 | break; | |
493c6460 KP |
3206 | } |
3207 | otp_pages--; | |
3208 | } | |
49dc08ee | 3209 | onenand_release_device(mtd); |
493c6460 | 3210 | |
49dc08ee | 3211 | return ret; |
493c6460 KP |
3212 | } |
3213 | ||
3214 | /** | |
3215 | * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info | |
3216 | * @param mtd MTD device structure | |
3217 | * @param buf the databuffer to put/get data | |
3218 | * @param len number of bytes to read | |
3219 | * | |
3220 | * Read factory OTP info. | |
3221 | */ | |
3222 | static int onenand_get_fact_prot_info(struct mtd_info *mtd, | |
3223 | struct otp_info *buf, size_t len) | |
3224 | { | |
3225 | size_t retlen; | |
3226 | int ret; | |
3227 | ||
3228 | ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY); | |
3229 | ||
3230 | return ret ? : retlen; | |
3231 | } | |
3232 | ||
3233 | /** | |
3234 | * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area | |
3235 | * @param mtd MTD device structure | |
3236 | * @param from The offset to read | |
3237 | * @param len number of bytes to read | |
3238 | * @param retlen pointer to variable to store the number of read bytes | |
3239 | * @param buf the databuffer to put/get data | |
3240 | * | |
3241 | * Read factory OTP area. | |
3242 | */ | |
3243 | static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, | |
3244 | size_t len, size_t *retlen, u_char *buf) | |
3245 | { | |
3246 | return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY); | |
3247 | } | |
3248 | ||
3249 | /** | |
3250 | * onenand_get_user_prot_info - [MTD Interface] Read user OTP info | |
3251 | * @param mtd MTD device structure | |
3252 | * @param buf the databuffer to put/get data | |
3253 | * @param len number of bytes to read | |
3254 | * | |
3255 | * Read user OTP info. | |
3256 | */ | |
3257 | static int onenand_get_user_prot_info(struct mtd_info *mtd, | |
3258 | struct otp_info *buf, size_t len) | |
3259 | { | |
3260 | size_t retlen; | |
3261 | int ret; | |
3262 | ||
3263 | ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER); | |
3264 | ||
3265 | return ret ? : retlen; | |
3266 | } | |
3267 | ||
3268 | /** | |
3269 | * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area | |
3270 | * @param mtd MTD device structure | |
3271 | * @param from The offset to read | |
3272 | * @param len number of bytes to read | |
3273 | * @param retlen pointer to variable to store the number of read bytes | |
3274 | * @param buf the databuffer to put/get data | |
3275 | * | |
3276 | * Read user OTP area. | |
3277 | */ | |
3278 | static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from, | |
3279 | size_t len, size_t *retlen, u_char *buf) | |
3280 | { | |
3281 | return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER); | |
3282 | } | |
3283 | ||
3284 | /** | |
3285 | * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area | |
3286 | * @param mtd MTD device structure | |
3287 | * @param from The offset to write | |
3288 | * @param len number of bytes to write | |
3289 | * @param retlen pointer to variable to store the number of write bytes | |
3290 | * @param buf the databuffer to put/get data | |
3291 | * | |
3292 | * Write user OTP area. | |
3293 | */ | |
3294 | static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from, | |
3295 | size_t len, size_t *retlen, u_char *buf) | |
3296 | { | |
3297 | return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER); | |
3298 | } | |
3299 | ||
3300 | /** | |
3301 | * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area | |
3302 | * @param mtd MTD device structure | |
3303 | * @param from The offset to lock | |
3304 | * @param len number of bytes to unlock | |
3305 | * | |
3306 | * Write lock mark on spare area in page 0 in OTP block | |
3307 | */ | |
3308 | static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, | |
3309 | size_t len) | |
3310 | { | |
69d79186 | 3311 | struct onenand_chip *this = mtd->priv; |
5988af23 | 3312 | u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf; |
493c6460 KP |
3313 | size_t retlen; |
3314 | int ret; | |
3cf60253 | 3315 | unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET; |
493c6460 | 3316 | |
5988af23 RH |
3317 | memset(buf, 0xff, FLEXONENAND(this) ? this->writesize |
3318 | : mtd->oobsize); | |
493c6460 KP |
3319 | /* |
3320 | * Write lock mark to 8th word of sector0 of page0 of the spare0. | |
3321 | * We write 16 bytes spare area instead of 2 bytes. | |
5988af23 RH |
3322 | * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of |
3323 | * main area of page 49. | |
493c6460 | 3324 | */ |
5988af23 | 3325 | |
493c6460 | 3326 | from = 0; |
5988af23 | 3327 | len = FLEXONENAND(this) ? mtd->writesize : 16; |
493c6460 | 3328 | |
3cf60253 AKS |
3329 | /* |
3330 | * Note: OTP lock operation | |
3331 | * OTP block : 0xXXFC XX 1111 1100 | |
3332 | * 1st block : 0xXXF3 (If chip support) XX 1111 0011 | |
3333 | * Both : 0xXXF0 (If chip support) XX 1111 0000 | |
3334 | */ | |
3335 | if (FLEXONENAND(this)) | |
3336 | otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET; | |
3337 | ||
3338 | /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */ | |
3339 | if (otp == 1) | |
3340 | buf[otp_lock_offset] = 0xFC; | |
3341 | else if (otp == 2) | |
3342 | buf[otp_lock_offset] = 0xF3; | |
3343 | else if (otp == 3) | |
3344 | buf[otp_lock_offset] = 0xF0; | |
3345 | else if (otp != 0) | |
3346 | printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n"); | |
3347 | ||
5988af23 | 3348 | ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER); |
493c6460 KP |
3349 | |
3350 | return ret ? : retlen; | |
3351 | } | |
3cf60253 | 3352 | |
493c6460 KP |
3353 | #endif /* CONFIG_MTD_ONENAND_OTP */ |
3354 | ||
28b79ff9 | 3355 | /** |
75384b0d | 3356 | * onenand_check_features - Check and set OneNAND features |
28b79ff9 KP |
3357 | * @param mtd MTD data structure |
3358 | * | |
75384b0d KP |
3359 | * Check and set OneNAND features |
3360 | * - lock scheme | |
ee9745fc | 3361 | * - two plane |
28b79ff9 | 3362 | */ |
75384b0d | 3363 | static void onenand_check_features(struct mtd_info *mtd) |
28b79ff9 KP |
3364 | { |
3365 | struct onenand_chip *this = mtd->priv; | |
3366 | unsigned int density, process; | |
3367 | ||
3368 | /* Lock scheme depends on density and process */ | |
e71f04fc | 3369 | density = onenand_get_density(this->device_id); |
28b79ff9 KP |
3370 | process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT; |
3371 | ||
3372 | /* Lock scheme */ | |
ee9745fc KP |
3373 | switch (density) { |
3374 | case ONENAND_DEVICE_DENSITY_4Gb: | |
3375 | this->options |= ONENAND_HAS_2PLANE; | |
3376 | ||
3377 | case ONENAND_DEVICE_DENSITY_2Gb: | |
492e1501 | 3378 | /* 2Gb DDP does not have 2 plane */ |
ee9745fc KP |
3379 | if (!ONENAND_IS_DDP(this)) |
3380 | this->options |= ONENAND_HAS_2PLANE; | |
3381 | this->options |= ONENAND_HAS_UNLOCK_ALL; | |
3382 | ||
3383 | case ONENAND_DEVICE_DENSITY_1Gb: | |
28b79ff9 | 3384 | /* A-Die has all block unlock */ |
ee9745fc | 3385 | if (process) |
28b79ff9 | 3386 | this->options |= ONENAND_HAS_UNLOCK_ALL; |
ee9745fc KP |
3387 | break; |
3388 | ||
3389 | default: | |
3390 | /* Some OneNAND has continuous lock scheme */ | |
3391 | if (!process) | |
28b79ff9 | 3392 | this->options |= ONENAND_HAS_CONT_LOCK; |
ee9745fc | 3393 | break; |
28b79ff9 | 3394 | } |
ee9745fc | 3395 | |
5988af23 RH |
3396 | if (ONENAND_IS_MLC(this)) |
3397 | this->options &= ~ONENAND_HAS_2PLANE; | |
3398 | ||
3399 | if (FLEXONENAND(this)) { | |
3400 | this->options &= ~ONENAND_HAS_CONT_LOCK; | |
3401 | this->options |= ONENAND_HAS_UNLOCK_ALL; | |
3402 | } | |
3403 | ||
ee9745fc KP |
3404 | if (this->options & ONENAND_HAS_CONT_LOCK) |
3405 | printk(KERN_DEBUG "Lock scheme is Continuous Lock\n"); | |
3406 | if (this->options & ONENAND_HAS_UNLOCK_ALL) | |
3407 | printk(KERN_DEBUG "Chip support all block unlock\n"); | |
3408 | if (this->options & ONENAND_HAS_2PLANE) | |
3409 | printk(KERN_DEBUG "Chip has 2 plane\n"); | |
28b79ff9 KP |
3410 | } |
3411 | ||
cd5f6346 | 3412 | /** |
e3da8067 | 3413 | * onenand_print_device_info - Print device & version ID |
cd5f6346 | 3414 | * @param device device ID |
e3da8067 | 3415 | * @param version version ID |
cd5f6346 | 3416 | * |
e3da8067 | 3417 | * Print device & version ID |
cd5f6346 | 3418 | */ |
28b79ff9 | 3419 | static void onenand_print_device_info(int device, int version) |
cd5f6346 | 3420 | { |
5988af23 | 3421 | int vcc, demuxed, ddp, density, flexonenand; |
cd5f6346 KP |
3422 | |
3423 | vcc = device & ONENAND_DEVICE_VCC_MASK; | |
3424 | demuxed = device & ONENAND_DEVICE_IS_DEMUX; | |
3425 | ddp = device & ONENAND_DEVICE_IS_DDP; | |
e71f04fc | 3426 | density = onenand_get_density(device); |
5988af23 RH |
3427 | flexonenand = device & DEVICE_IS_FLEXONENAND; |
3428 | printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", | |
3429 | demuxed ? "" : "Muxed ", | |
3430 | flexonenand ? "Flex-" : "", | |
cd5f6346 KP |
3431 | ddp ? "(DDP)" : "", |
3432 | (16 << density), | |
3433 | vcc ? "2.65/3.3" : "1.8", | |
3434 | device); | |
49dc08ee | 3435 | printk(KERN_INFO "OneNAND version = 0x%04x\n", version); |
cd5f6346 KP |
3436 | } |
3437 | ||
3438 | static const struct onenand_manufacturers onenand_manuf_ids[] = { | |
3439 | {ONENAND_MFR_SAMSUNG, "Samsung"}, | |
ee8f3768 | 3440 | {ONENAND_MFR_NUMONYX, "Numonyx"}, |
cd5f6346 KP |
3441 | }; |
3442 | ||
3443 | /** | |
3444 | * onenand_check_maf - Check manufacturer ID | |
3445 | * @param manuf manufacturer ID | |
3446 | * | |
3447 | * Check manufacturer ID | |
3448 | */ | |
3449 | static int onenand_check_maf(int manuf) | |
3450 | { | |
37b1cc39 KP |
3451 | int size = ARRAY_SIZE(onenand_manuf_ids); |
3452 | char *name; | |
cd5f6346 KP |
3453 | int i; |
3454 | ||
37b1cc39 | 3455 | for (i = 0; i < size; i++) |
cd5f6346 KP |
3456 | if (manuf == onenand_manuf_ids[i].id) |
3457 | break; | |
cd5f6346 | 3458 | |
37b1cc39 KP |
3459 | if (i < size) |
3460 | name = onenand_manuf_ids[i].name; | |
3461 | else | |
3462 | name = "Unknown"; | |
3463 | ||
3464 | printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); | |
cd5f6346 | 3465 | |
37b1cc39 | 3466 | return (i == size); |
cd5f6346 KP |
3467 | } |
3468 | ||
5988af23 RH |
3469 | /** |
3470 | * flexonenand_get_boundary - Reads the SLC boundary | |
3471 | * @param onenand_info - onenand info structure | |
3472 | **/ | |
3473 | static int flexonenand_get_boundary(struct mtd_info *mtd) | |
3474 | { | |
3475 | struct onenand_chip *this = mtd->priv; | |
3476 | unsigned die, bdry; | |
3477 | int ret, syscfg, locked; | |
3478 | ||
3479 | /* Disable ECC */ | |
3480 | syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); | |
3481 | this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1); | |
3482 | ||
3483 | for (die = 0; die < this->dies; die++) { | |
3484 | this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); | |
3485 | this->wait(mtd, FL_SYNCING); | |
3486 | ||
3487 | this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); | |
3488 | ret = this->wait(mtd, FL_READING); | |
3489 | ||
3490 | bdry = this->read_word(this->base + ONENAND_DATARAM); | |
3491 | if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3) | |
3492 | locked = 0; | |
3493 | else | |
3494 | locked = 1; | |
3495 | this->boundary[die] = bdry & FLEXONENAND_PI_MASK; | |
3496 | ||
3497 | this->command(mtd, ONENAND_CMD_RESET, 0, 0); | |
3498 | ret = this->wait(mtd, FL_RESETING); | |
3499 | ||
3500 | printk(KERN_INFO "Die %d boundary: %d%s\n", die, | |
3501 | this->boundary[die], locked ? "(Locked)" : "(Unlocked)"); | |
3502 | } | |
3503 | ||
3504 | /* Enable ECC */ | |
3505 | this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); | |
3506 | return 0; | |
3507 | } | |
3508 | ||
3509 | /** | |
3510 | * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info | |
3511 | * boundary[], diesize[], mtd->size, mtd->erasesize | |
3512 | * @param mtd - MTD device structure | |
3513 | */ | |
3514 | static void flexonenand_get_size(struct mtd_info *mtd) | |
3515 | { | |
3516 | struct onenand_chip *this = mtd->priv; | |
3517 | int die, i, eraseshift, density; | |
3518 | int blksperdie, maxbdry; | |
3519 | loff_t ofs; | |
3520 | ||
3521 | density = onenand_get_density(this->device_id); | |
3522 | blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift); | |
3523 | blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; | |
3524 | maxbdry = blksperdie - 1; | |
3525 | eraseshift = this->erase_shift - 1; | |
3526 | ||
3527 | mtd->numeraseregions = this->dies << 1; | |
3528 | ||
3529 | /* This fills up the device boundary */ | |
3530 | flexonenand_get_boundary(mtd); | |
3531 | die = ofs = 0; | |
3532 | i = -1; | |
3533 | for (; die < this->dies; die++) { | |
3534 | if (!die || this->boundary[die-1] != maxbdry) { | |
3535 | i++; | |
3536 | mtd->eraseregions[i].offset = ofs; | |
3537 | mtd->eraseregions[i].erasesize = 1 << eraseshift; | |
3538 | mtd->eraseregions[i].numblocks = | |
3539 | this->boundary[die] + 1; | |
3540 | ofs += mtd->eraseregions[i].numblocks << eraseshift; | |
3541 | eraseshift++; | |
3542 | } else { | |
3543 | mtd->numeraseregions -= 1; | |
3544 | mtd->eraseregions[i].numblocks += | |
3545 | this->boundary[die] + 1; | |
3546 | ofs += (this->boundary[die] + 1) << (eraseshift - 1); | |
3547 | } | |
3548 | if (this->boundary[die] != maxbdry) { | |
3549 | i++; | |
3550 | mtd->eraseregions[i].offset = ofs; | |
3551 | mtd->eraseregions[i].erasesize = 1 << eraseshift; | |
3552 | mtd->eraseregions[i].numblocks = maxbdry ^ | |
3553 | this->boundary[die]; | |
3554 | ofs += mtd->eraseregions[i].numblocks << eraseshift; | |
3555 | eraseshift--; | |
3556 | } else | |
3557 | mtd->numeraseregions -= 1; | |
3558 | } | |
3559 | ||
3560 | /* Expose MLC erase size except when all blocks are SLC */ | |
3561 | mtd->erasesize = 1 << this->erase_shift; | |
3562 | if (mtd->numeraseregions == 1) | |
3563 | mtd->erasesize >>= 1; | |
3564 | ||
3565 | printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions); | |
3566 | for (i = 0; i < mtd->numeraseregions; i++) | |
3567 | printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x," | |
3568 | " numblocks: %04u]\n", | |
3569 | (unsigned int) mtd->eraseregions[i].offset, | |
3570 | mtd->eraseregions[i].erasesize, | |
3571 | mtd->eraseregions[i].numblocks); | |
3572 | ||
3573 | for (die = 0, mtd->size = 0; die < this->dies; die++) { | |
3574 | this->diesize[die] = (loff_t)blksperdie << this->erase_shift; | |
3575 | this->diesize[die] -= (loff_t)(this->boundary[die] + 1) | |
3576 | << (this->erase_shift - 1); | |
3577 | mtd->size += this->diesize[die]; | |
3578 | } | |
3579 | } | |
3580 | ||
3581 | /** | |
3582 | * flexonenand_check_blocks_erased - Check if blocks are erased | |
3583 | * @param mtd_info - mtd info structure | |
3584 | * @param start - first erase block to check | |
3585 | * @param end - last erase block to check | |
3586 | * | |
3587 | * Converting an unerased block from MLC to SLC | |
3588 | * causes byte values to change. Since both data and its ECC | |
3589 | * have changed, reads on the block give uncorrectable error. | |
3590 | * This might lead to the block being detected as bad. | |
3591 | * | |
3592 | * Avoid this by ensuring that the block to be converted is | |
3593 | * erased. | |
3594 | */ | |
3595 | static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end) | |
3596 | { | |
3597 | struct onenand_chip *this = mtd->priv; | |
3598 | int i, ret; | |
3599 | int block; | |
3600 | struct mtd_oob_ops ops = { | |
3601 | .mode = MTD_OOB_PLACE, | |
3602 | .ooboffs = 0, | |
3603 | .ooblen = mtd->oobsize, | |
3604 | .datbuf = NULL, | |
3605 | .oobbuf = this->oob_buf, | |
3606 | }; | |
3607 | loff_t addr; | |
3608 | ||
3609 | printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end); | |
3610 | ||
3611 | for (block = start; block <= end; block++) { | |
3612 | addr = flexonenand_addr(this, block); | |
3613 | if (onenand_block_isbad_nolock(mtd, addr, 0)) | |
3614 | continue; | |
3615 | ||
3616 | /* | |
3617 | * Since main area write results in ECC write to spare, | |
3618 | * it is sufficient to check only ECC bytes for change. | |
3619 | */ | |
3620 | ret = onenand_read_oob_nolock(mtd, addr, &ops); | |
3621 | if (ret) | |
3622 | return ret; | |
3623 | ||
3624 | for (i = 0; i < mtd->oobsize; i++) | |
3625 | if (this->oob_buf[i] != 0xff) | |
3626 | break; | |
3627 | ||
3628 | if (i != mtd->oobsize) { | |
297758f8 AKS |
3629 | printk(KERN_WARNING "%s: Block %d not erased.\n", |
3630 | __func__, block); | |
5988af23 RH |
3631 | return 1; |
3632 | } | |
3633 | } | |
3634 | ||
3635 | return 0; | |
3636 | } | |
3637 | ||
3638 | /** | |
3639 | * flexonenand_set_boundary - Writes the SLC boundary | |
3640 | * @param mtd - mtd info structure | |
3641 | */ | |
3642 | int flexonenand_set_boundary(struct mtd_info *mtd, int die, | |
3643 | int boundary, int lock) | |
3644 | { | |
3645 | struct onenand_chip *this = mtd->priv; | |
3646 | int ret, density, blksperdie, old, new, thisboundary; | |
3647 | loff_t addr; | |
3648 | ||
3649 | /* Change only once for SDP Flex-OneNAND */ | |
3650 | if (die && (!ONENAND_IS_DDP(this))) | |
3651 | return 0; | |
3652 | ||
3653 | /* boundary value of -1 indicates no required change */ | |
3654 | if (boundary < 0 || boundary == this->boundary[die]) | |
3655 | return 0; | |
3656 | ||
3657 | density = onenand_get_density(this->device_id); | |
3658 | blksperdie = ((16 << density) << 20) >> this->erase_shift; | |
3659 | blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; | |
3660 | ||
3661 | if (boundary >= blksperdie) { | |
297758f8 AKS |
3662 | printk(KERN_ERR "%s: Invalid boundary value. " |
3663 | "Boundary not changed.\n", __func__); | |
5988af23 RH |
3664 | return -EINVAL; |
3665 | } | |
3666 | ||
3667 | /* Check if converting blocks are erased */ | |
3668 | old = this->boundary[die] + (die * this->density_mask); | |
3669 | new = boundary + (die * this->density_mask); | |
3670 | ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new)); | |
3671 | if (ret) { | |
297758f8 AKS |
3672 | printk(KERN_ERR "%s: Please erase blocks " |
3673 | "before boundary change\n", __func__); | |
5988af23 RH |
3674 | return ret; |
3675 | } | |
3676 | ||
3677 | this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); | |
3678 | this->wait(mtd, FL_SYNCING); | |
3679 | ||
3680 | /* Check is boundary is locked */ | |
3681 | this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); | |
3682 | ret = this->wait(mtd, FL_READING); | |
3683 | ||
3684 | thisboundary = this->read_word(this->base + ONENAND_DATARAM); | |
3685 | if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) { | |
297758f8 | 3686 | printk(KERN_ERR "%s: boundary locked\n", __func__); |
5988af23 RH |
3687 | ret = 1; |
3688 | goto out; | |
3689 | } | |
3690 | ||
297758f8 | 3691 | printk(KERN_INFO "Changing die %d boundary: %d%s\n", |
5988af23 RH |
3692 | die, boundary, lock ? "(Locked)" : "(Unlocked)"); |
3693 | ||
3694 | addr = die ? this->diesize[0] : 0; | |
3695 | ||
3696 | boundary &= FLEXONENAND_PI_MASK; | |
3697 | boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT); | |
3698 | ||
3699 | this->command(mtd, ONENAND_CMD_ERASE, addr, 0); | |
3700 | ret = this->wait(mtd, FL_ERASING); | |
3701 | if (ret) { | |
f369c7ec MK |
3702 | printk(KERN_ERR "%s: Failed PI erase for Die %d\n", |
3703 | __func__, die); | |
5988af23 RH |
3704 | goto out; |
3705 | } | |
3706 | ||
3707 | this->write_word(boundary, this->base + ONENAND_DATARAM); | |
3708 | this->command(mtd, ONENAND_CMD_PROG, addr, 0); | |
3709 | ret = this->wait(mtd, FL_WRITING); | |
3710 | if (ret) { | |
297758f8 AKS |
3711 | printk(KERN_ERR "%s: Failed PI write for Die %d\n", |
3712 | __func__, die); | |
5988af23 RH |
3713 | goto out; |
3714 | } | |
3715 | ||
3716 | this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0); | |
3717 | ret = this->wait(mtd, FL_WRITING); | |
3718 | out: | |
3719 | this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND); | |
3720 | this->wait(mtd, FL_RESETING); | |
3721 | if (!ret) | |
3722 | /* Recalculate device size on boundary change*/ | |
3723 | flexonenand_get_size(mtd); | |
3724 | ||
3725 | return ret; | |
3726 | } | |
3727 | ||
cd5f6346 KP |
3728 | /** |
3729 | * onenand_probe - [OneNAND Interface] Probe the OneNAND device | |
3730 | * @param mtd MTD device structure | |
3731 | * | |
3732 | * OneNAND detection method: | |
59c51591 | 3733 | * Compare the values from command with ones from register |
cd5f6346 KP |
3734 | */ |
3735 | static int onenand_probe(struct mtd_info *mtd) | |
3736 | { | |
3737 | struct onenand_chip *this = mtd->priv; | |
28b79ff9 | 3738 | int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id; |
cd5f6346 | 3739 | int density; |
47e777e0 KP |
3740 | int syscfg; |
3741 | ||
3742 | /* Save system configuration 1 */ | |
3743 | syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); | |
3744 | /* Clear Sync. Burst Read mode to read BootRAM */ | |
ee8f3768 | 3745 | this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1); |
cd5f6346 KP |
3746 | |
3747 | /* Send the command for reading device ID from BootRAM */ | |
3748 | this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); | |
3749 | ||
3750 | /* Read manufacturer and device IDs from BootRAM */ | |
3751 | bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); | |
3752 | bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); | |
3753 | ||
47e777e0 KP |
3754 | /* Reset OneNAND to read default register values */ |
3755 | this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); | |
3756 | /* Wait reset */ | |
3757 | this->wait(mtd, FL_RESETING); | |
3758 | ||
3759 | /* Restore system configuration 1 */ | |
3760 | this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); | |
3761 | ||
cd5f6346 KP |
3762 | /* Check manufacturer ID */ |
3763 | if (onenand_check_maf(bram_maf_id)) | |
3764 | return -ENXIO; | |
3765 | ||
cd5f6346 KP |
3766 | /* Read manufacturer and device IDs from Register */ |
3767 | maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); | |
3768 | dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); | |
f4f91ac3 | 3769 | ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); |
5988af23 | 3770 | this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); |
cd5f6346 KP |
3771 | |
3772 | /* Check OneNAND device */ | |
3773 | if (maf_id != bram_maf_id || dev_id != bram_dev_id) | |
3774 | return -ENXIO; | |
3775 | ||
3776 | /* Flash device information */ | |
28b79ff9 | 3777 | onenand_print_device_info(dev_id, ver_id); |
cd5f6346 | 3778 | this->device_id = dev_id; |
28b79ff9 | 3779 | this->version_id = ver_id; |
cd5f6346 | 3780 | |
e71f04fc | 3781 | density = onenand_get_density(dev_id); |
5988af23 RH |
3782 | if (FLEXONENAND(this)) { |
3783 | this->dies = ONENAND_IS_DDP(this) ? 2 : 1; | |
3784 | /* Maximum possible erase regions */ | |
3785 | mtd->numeraseregions = this->dies << 1; | |
3786 | mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info) | |
3787 | * (this->dies << 1), GFP_KERNEL); | |
3788 | if (!mtd->eraseregions) | |
3789 | return -ENOMEM; | |
3790 | } | |
3791 | ||
3792 | /* | |
3793 | * For Flex-OneNAND, chipsize represents maximum possible device size. | |
3794 | * mtd->size represents the actual device size. | |
3795 | */ | |
cd5f6346 KP |
3796 | this->chipsize = (16 << density) << 20; |
3797 | ||
3798 | /* OneNAND page size & block size */ | |
3799 | /* The data buffer size is equal to page size */ | |
28318776 | 3800 | mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); |
5988af23 RH |
3801 | /* We use the full BufferRAM */ |
3802 | if (ONENAND_IS_MLC(this)) | |
3803 | mtd->writesize <<= 1; | |
3804 | ||
28318776 | 3805 | mtd->oobsize = mtd->writesize >> 5; |
9bfbc9b2 | 3806 | /* Pages per a block are always 64 in OneNAND */ |
28318776 | 3807 | mtd->erasesize = mtd->writesize << 6; |
5988af23 RH |
3808 | /* |
3809 | * Flex-OneNAND SLC area has 64 pages per block. | |
3810 | * Flex-OneNAND MLC area has 128 pages per block. | |
3811 | * Expose MLC erase size to find erase_shift and page_mask. | |
3812 | */ | |
3813 | if (FLEXONENAND(this)) | |
3814 | mtd->erasesize <<= 1; | |
cd5f6346 KP |
3815 | |
3816 | this->erase_shift = ffs(mtd->erasesize) - 1; | |
28318776 | 3817 | this->page_shift = ffs(mtd->writesize) - 1; |
9bfbc9b2 | 3818 | this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1; |
5988af23 RH |
3819 | /* Set density mask. it is used for DDP */ |
3820 | if (ONENAND_IS_DDP(this)) | |
3821 | this->density_mask = this->chipsize >> (this->erase_shift + 1); | |
ee9745fc KP |
3822 | /* It's real page size */ |
3823 | this->writesize = mtd->writesize; | |
cd5f6346 | 3824 | |
492e1501 | 3825 | /* REVISIT: Multichip handling */ |
cd5f6346 | 3826 | |
5988af23 RH |
3827 | if (FLEXONENAND(this)) |
3828 | flexonenand_get_size(mtd); | |
3829 | else | |
3830 | mtd->size = this->chipsize; | |
cd5f6346 | 3831 | |
75384b0d KP |
3832 | /* Check OneNAND features */ |
3833 | onenand_check_features(mtd); | |
d5c5e78a | 3834 | |
ee9745fc KP |
3835 | /* |
3836 | * We emulate the 4KiB page and 256KiB erase block size | |
3837 | * But oobsize is still 64 bytes. | |
3838 | * It is only valid if you turn on 2X program support, | |
3839 | * Otherwise it will be ignored by compiler. | |
3840 | */ | |
3841 | if (ONENAND_IS_2PLANE(this)) { | |
3842 | mtd->writesize <<= 1; | |
3843 | mtd->erasesize <<= 1; | |
3844 | } | |
3845 | ||
cd5f6346 KP |
3846 | return 0; |
3847 | } | |
3848 | ||
a41371eb KP |
3849 | /** |
3850 | * onenand_suspend - [MTD Interface] Suspend the OneNAND flash | |
3851 | * @param mtd MTD device structure | |
3852 | */ | |
3853 | static int onenand_suspend(struct mtd_info *mtd) | |
3854 | { | |
3855 | return onenand_get_device(mtd, FL_PM_SUSPENDED); | |
3856 | } | |
3857 | ||
3858 | /** | |
3859 | * onenand_resume - [MTD Interface] Resume the OneNAND flash | |
3860 | * @param mtd MTD device structure | |
3861 | */ | |
3862 | static void onenand_resume(struct mtd_info *mtd) | |
3863 | { | |
3864 | struct onenand_chip *this = mtd->priv; | |
3865 | ||
3866 | if (this->state == FL_PM_SUSPENDED) | |
3867 | onenand_release_device(mtd); | |
3868 | else | |
297758f8 AKS |
3869 | printk(KERN_ERR "%s: resume() called for the chip which is not " |
3870 | "in suspended state\n", __func__); | |
a41371eb KP |
3871 | } |
3872 | ||
cd5f6346 KP |
3873 | /** |
3874 | * onenand_scan - [OneNAND Interface] Scan for the OneNAND device | |
3875 | * @param mtd MTD device structure | |
3876 | * @param maxchips Number of chips to scan for | |
3877 | * | |
3878 | * This fills out all the not initialized function pointers | |
3879 | * with the defaults. | |
3880 | * The flash ID is read and the mtd/chip structures are | |
3881 | * filled with the appropriate values. | |
3882 | */ | |
3883 | int onenand_scan(struct mtd_info *mtd, int maxchips) | |
3884 | { | |
5988af23 | 3885 | int i, ret; |
cd5f6346 KP |
3886 | struct onenand_chip *this = mtd->priv; |
3887 | ||
3888 | if (!this->read_word) | |
3889 | this->read_word = onenand_readw; | |
3890 | if (!this->write_word) | |
3891 | this->write_word = onenand_writew; | |
3892 | ||
3893 | if (!this->command) | |
3894 | this->command = onenand_command; | |
3895 | if (!this->wait) | |
2c22120f | 3896 | onenand_setup_wait(mtd); |
31bb999e KP |
3897 | if (!this->bbt_wait) |
3898 | this->bbt_wait = onenand_bbt_wait; | |
3899 | if (!this->unlock_all) | |
3900 | this->unlock_all = onenand_unlock_all; | |
cd5f6346 KP |
3901 | |
3902 | if (!this->read_bufferram) | |
3903 | this->read_bufferram = onenand_read_bufferram; | |
3904 | if (!this->write_bufferram) | |
3905 | this->write_bufferram = onenand_write_bufferram; | |
3906 | ||
cdc00130 KP |
3907 | if (!this->block_markbad) |
3908 | this->block_markbad = onenand_default_block_markbad; | |
3909 | if (!this->scan_bbt) | |
3910 | this->scan_bbt = onenand_default_bbt; | |
3911 | ||
cd5f6346 KP |
3912 | if (onenand_probe(mtd)) |
3913 | return -ENXIO; | |
3914 | ||
52b0eea7 KP |
3915 | /* Set Sync. Burst Read after probing */ |
3916 | if (this->mmcontrol) { | |
3917 | printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); | |
3918 | this->read_bufferram = onenand_sync_read_bufferram; | |
3919 | } | |
3920 | ||
532a37cf KP |
3921 | /* Allocate buffers, if necessary */ |
3922 | if (!this->page_buf) { | |
470bc844 | 3923 | this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL); |
532a37cf | 3924 | if (!this->page_buf) { |
297758f8 AKS |
3925 | printk(KERN_ERR "%s: Can't allocate page_buf\n", |
3926 | __func__); | |
532a37cf KP |
3927 | return -ENOMEM; |
3928 | } | |
3929 | this->options |= ONENAND_PAGEBUF_ALLOC; | |
3930 | } | |
470bc844 KP |
3931 | if (!this->oob_buf) { |
3932 | this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL); | |
3933 | if (!this->oob_buf) { | |
297758f8 AKS |
3934 | printk(KERN_ERR "%s: Can't allocate oob_buf\n", |
3935 | __func__); | |
470bc844 KP |
3936 | if (this->options & ONENAND_PAGEBUF_ALLOC) { |
3937 | this->options &= ~ONENAND_PAGEBUF_ALLOC; | |
3938 | kfree(this->page_buf); | |
3939 | } | |
3940 | return -ENOMEM; | |
3941 | } | |
3942 | this->options |= ONENAND_OOBBUF_ALLOC; | |
3943 | } | |
532a37cf | 3944 | |
cd5f6346 KP |
3945 | this->state = FL_READY; |
3946 | init_waitqueue_head(&this->wq); | |
3947 | spin_lock_init(&this->chip_lock); | |
3948 | ||
60d84f97 KP |
3949 | /* |
3950 | * Allow subpage writes up to oobsize. | |
3951 | */ | |
cd5f6346 | 3952 | switch (mtd->oobsize) { |
5988af23 RH |
3953 | case 128: |
3954 | this->ecclayout = &onenand_oob_128; | |
3955 | mtd->subpage_sft = 0; | |
3956 | break; | |
cd5f6346 | 3957 | case 64: |
5bd34c09 | 3958 | this->ecclayout = &onenand_oob_64; |
60d84f97 | 3959 | mtd->subpage_sft = 2; |
cd5f6346 KP |
3960 | break; |
3961 | ||
3962 | case 32: | |
5bd34c09 | 3963 | this->ecclayout = &onenand_oob_32; |
60d84f97 | 3964 | mtd->subpage_sft = 1; |
cd5f6346 KP |
3965 | break; |
3966 | ||
3967 | default: | |
297758f8 AKS |
3968 | printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n", |
3969 | __func__, mtd->oobsize); | |
60d84f97 | 3970 | mtd->subpage_sft = 0; |
cd5f6346 | 3971 | /* To prevent kernel oops */ |
5bd34c09 | 3972 | this->ecclayout = &onenand_oob_32; |
cd5f6346 KP |
3973 | break; |
3974 | } | |
3975 | ||
60d84f97 | 3976 | this->subpagesize = mtd->writesize >> mtd->subpage_sft; |
a5e7c7b4 AH |
3977 | |
3978 | /* | |
3979 | * The number of bytes available for a client to place data into | |
3980 | * the out of band area | |
3981 | */ | |
3982 | this->ecclayout->oobavail = 0; | |
ad286343 KP |
3983 | for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && |
3984 | this->ecclayout->oobfree[i].length; i++) | |
a5e7c7b4 AH |
3985 | this->ecclayout->oobavail += |
3986 | this->ecclayout->oobfree[i].length; | |
1f92267c | 3987 | mtd->oobavail = this->ecclayout->oobavail; |
a5e7c7b4 | 3988 | |
5bd34c09 | 3989 | mtd->ecclayout = this->ecclayout; |
d5c5e78a | 3990 | |
cd5f6346 KP |
3991 | /* Fill in remaining MTD driver data */ |
3992 | mtd->type = MTD_NANDFLASH; | |
5fa43394 | 3993 | mtd->flags = MTD_CAP_NANDFLASH; |
cd5f6346 KP |
3994 | mtd->erase = onenand_erase; |
3995 | mtd->point = NULL; | |
3996 | mtd->unpoint = NULL; | |
3997 | mtd->read = onenand_read; | |
3998 | mtd->write = onenand_write; | |
cd5f6346 KP |
3999 | mtd->read_oob = onenand_read_oob; |
4000 | mtd->write_oob = onenand_write_oob; | |
6c77fd64 | 4001 | mtd->panic_write = onenand_panic_write; |
493c6460 KP |
4002 | #ifdef CONFIG_MTD_ONENAND_OTP |
4003 | mtd->get_fact_prot_info = onenand_get_fact_prot_info; | |
4004 | mtd->read_fact_prot_reg = onenand_read_fact_prot_reg; | |
4005 | mtd->get_user_prot_info = onenand_get_user_prot_info; | |
4006 | mtd->read_user_prot_reg = onenand_read_user_prot_reg; | |
4007 | mtd->write_user_prot_reg = onenand_write_user_prot_reg; | |
4008 | mtd->lock_user_prot_reg = onenand_lock_user_prot_reg; | |
4009 | #endif | |
cd5f6346 | 4010 | mtd->sync = onenand_sync; |
08f782b6 | 4011 | mtd->lock = onenand_lock; |
cd5f6346 | 4012 | mtd->unlock = onenand_unlock; |
a41371eb KP |
4013 | mtd->suspend = onenand_suspend; |
4014 | mtd->resume = onenand_resume; | |
cd5f6346 KP |
4015 | mtd->block_isbad = onenand_block_isbad; |
4016 | mtd->block_markbad = onenand_block_markbad; | |
4017 | mtd->owner = THIS_MODULE; | |
4018 | ||
4019 | /* Unlock whole block */ | |
31bb999e | 4020 | this->unlock_all(mtd); |
cd5f6346 | 4021 | |
5988af23 RH |
4022 | ret = this->scan_bbt(mtd); |
4023 | if ((!FLEXONENAND(this)) || ret) | |
4024 | return ret; | |
4025 | ||
4026 | /* Change Flex-OneNAND boundaries if required */ | |
4027 | for (i = 0; i < MAX_DIES; i++) | |
4028 | flexonenand_set_boundary(mtd, i, flex_bdry[2 * i], | |
4029 | flex_bdry[(2 * i) + 1]); | |
4030 | ||
4031 | return 0; | |
cd5f6346 KP |
4032 | } |
4033 | ||
4034 | /** | |
4035 | * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device | |
4036 | * @param mtd MTD device structure | |
4037 | */ | |
4038 | void onenand_release(struct mtd_info *mtd) | |
4039 | { | |
532a37cf KP |
4040 | struct onenand_chip *this = mtd->priv; |
4041 | ||
cd5f6346 KP |
4042 | #ifdef CONFIG_MTD_PARTITIONS |
4043 | /* Deregister partitions */ | |
4044 | del_mtd_partitions (mtd); | |
4045 | #endif | |
4046 | /* Deregister the device */ | |
4047 | del_mtd_device (mtd); | |
532a37cf KP |
4048 | |
4049 | /* Free bad block table memory, if allocated */ | |
f00b0046 AH |
4050 | if (this->bbm) { |
4051 | struct bbm_info *bbm = this->bbm; | |
4052 | kfree(bbm->bbt); | |
532a37cf | 4053 | kfree(this->bbm); |
f00b0046 | 4054 | } |
470bc844 | 4055 | /* Buffers allocated by onenand_scan */ |
532a37cf KP |
4056 | if (this->options & ONENAND_PAGEBUF_ALLOC) |
4057 | kfree(this->page_buf); | |
470bc844 KP |
4058 | if (this->options & ONENAND_OOBBUF_ALLOC) |
4059 | kfree(this->oob_buf); | |
5988af23 | 4060 | kfree(mtd->eraseregions); |
cd5f6346 KP |
4061 | } |
4062 | ||
4063 | EXPORT_SYMBOL_GPL(onenand_scan); | |
4064 | EXPORT_SYMBOL_GPL(onenand_release); | |
4065 | ||
4066 | MODULE_LICENSE("GPL"); | |
4067 | MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>"); | |
4068 | MODULE_DESCRIPTION("Generic OneNAND flash driver code"); |