]>
Commit | Line | Data |
---|---|---|
a6a53252 JY |
1 | /* |
2 | * Copyright(c) 2007 Atheros Corporation. All rights reserved. | |
3 | * | |
4 | * Derived from Intel e1000 driver | |
5 | * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License as published by the Free | |
9 | * Software Foundation; either version 2 of the License, or (at your option) | |
10 | * any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., 59 | |
19 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
20 | */ | |
21 | ||
22 | #include "atl1e.h" | |
23 | ||
24 | #define DRV_VERSION "1.0.0.7-NAPI" | |
25 | ||
26 | char atl1e_driver_name[] = "ATL1E"; | |
27 | char atl1e_driver_version[] = DRV_VERSION; | |
28 | #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026 | |
29 | /* | |
30 | * atl1e_pci_tbl - PCI Device ID Table | |
31 | * | |
32 | * Wildcard entries (PCI_ANY_ID) should come last | |
33 | * Last entry must be all 0s | |
34 | * | |
35 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, | |
36 | * Class, Class Mask, private data (not used) } | |
37 | */ | |
a3aa1884 | 38 | static DEFINE_PCI_DEVICE_TABLE(atl1e_pci_tbl) = { |
a6a53252 | 39 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)}, |
bdb0e010 | 40 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)}, |
a6a53252 JY |
41 | /* required last entry */ |
42 | { 0 } | |
43 | }; | |
44 | MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl); | |
45 | ||
46 | MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>"); | |
47 | MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver"); | |
48 | MODULE_LICENSE("GPL"); | |
49 | MODULE_VERSION(DRV_VERSION); | |
50 | ||
e6ca2328 | 51 | static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter); |
a6a53252 JY |
52 | |
53 | static const u16 | |
54 | atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = | |
55 | { | |
56 | {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD}, | |
57 | {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD}, | |
58 | {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD}, | |
59 | {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD} | |
60 | }; | |
61 | ||
62 | static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] = | |
63 | { | |
64 | REG_RXF0_BASE_ADDR_HI, | |
65 | REG_RXF1_BASE_ADDR_HI, | |
66 | REG_RXF2_BASE_ADDR_HI, | |
67 | REG_RXF3_BASE_ADDR_HI | |
68 | }; | |
69 | ||
70 | static const u16 | |
71 | atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = | |
72 | { | |
73 | {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO}, | |
74 | {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO}, | |
75 | {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO}, | |
76 | {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO} | |
77 | }; | |
78 | ||
79 | static const u16 | |
80 | atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = | |
81 | { | |
82 | {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO}, | |
83 | {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO}, | |
84 | {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO}, | |
85 | {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO} | |
86 | }; | |
87 | ||
88 | static const u16 atl1e_pay_load_size[] = { | |
89 | 128, 256, 512, 1024, 2048, 4096, | |
90 | }; | |
91 | ||
92 | /* | |
93 | * atl1e_irq_enable - Enable default interrupt generation settings | |
94 | * @adapter: board private structure | |
95 | */ | |
96 | static inline void atl1e_irq_enable(struct atl1e_adapter *adapter) | |
97 | { | |
98 | if (likely(atomic_dec_and_test(&adapter->irq_sem))) { | |
99 | AT_WRITE_REG(&adapter->hw, REG_ISR, 0); | |
100 | AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK); | |
101 | AT_WRITE_FLUSH(&adapter->hw); | |
102 | } | |
103 | } | |
104 | ||
105 | /* | |
106 | * atl1e_irq_disable - Mask off interrupt generation on the NIC | |
107 | * @adapter: board private structure | |
108 | */ | |
109 | static inline void atl1e_irq_disable(struct atl1e_adapter *adapter) | |
110 | { | |
111 | atomic_inc(&adapter->irq_sem); | |
112 | AT_WRITE_REG(&adapter->hw, REG_IMR, 0); | |
113 | AT_WRITE_FLUSH(&adapter->hw); | |
114 | synchronize_irq(adapter->pdev->irq); | |
115 | } | |
116 | ||
117 | /* | |
118 | * atl1e_irq_reset - reset interrupt confiure on the NIC | |
119 | * @adapter: board private structure | |
120 | */ | |
121 | static inline void atl1e_irq_reset(struct atl1e_adapter *adapter) | |
122 | { | |
123 | atomic_set(&adapter->irq_sem, 0); | |
124 | AT_WRITE_REG(&adapter->hw, REG_ISR, 0); | |
125 | AT_WRITE_REG(&adapter->hw, REG_IMR, 0); | |
126 | AT_WRITE_FLUSH(&adapter->hw); | |
127 | } | |
128 | ||
129 | /* | |
130 | * atl1e_phy_config - Timer Call-back | |
131 | * @data: pointer to netdev cast into an unsigned long | |
132 | */ | |
133 | static void atl1e_phy_config(unsigned long data) | |
134 | { | |
135 | struct atl1e_adapter *adapter = (struct atl1e_adapter *) data; | |
136 | struct atl1e_hw *hw = &adapter->hw; | |
137 | unsigned long flags; | |
138 | ||
139 | spin_lock_irqsave(&adapter->mdio_lock, flags); | |
140 | atl1e_restart_autoneg(hw); | |
141 | spin_unlock_irqrestore(&adapter->mdio_lock, flags); | |
142 | } | |
143 | ||
144 | void atl1e_reinit_locked(struct atl1e_adapter *adapter) | |
145 | { | |
146 | ||
147 | WARN_ON(in_interrupt()); | |
148 | while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) | |
149 | msleep(1); | |
150 | atl1e_down(adapter); | |
151 | atl1e_up(adapter); | |
152 | clear_bit(__AT_RESETTING, &adapter->flags); | |
153 | } | |
154 | ||
155 | static void atl1e_reset_task(struct work_struct *work) | |
156 | { | |
157 | struct atl1e_adapter *adapter; | |
158 | adapter = container_of(work, struct atl1e_adapter, reset_task); | |
159 | ||
160 | atl1e_reinit_locked(adapter); | |
161 | } | |
162 | ||
163 | static int atl1e_check_link(struct atl1e_adapter *adapter) | |
164 | { | |
165 | struct atl1e_hw *hw = &adapter->hw; | |
166 | struct net_device *netdev = adapter->netdev; | |
a6a53252 JY |
167 | int err = 0; |
168 | u16 speed, duplex, phy_data; | |
169 | ||
ba211e3e | 170 | /* MII_BMSR must read twice */ |
a6a53252 JY |
171 | atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); |
172 | atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); | |
173 | if ((phy_data & BMSR_LSTATUS) == 0) { | |
174 | /* link down */ | |
175 | if (netif_carrier_ok(netdev)) { /* old link state: Up */ | |
176 | u32 value; | |
177 | /* disable rx */ | |
178 | value = AT_READ_REG(hw, REG_MAC_CTRL); | |
179 | value &= ~MAC_CTRL_RX_EN; | |
180 | AT_WRITE_REG(hw, REG_MAC_CTRL, value); | |
181 | adapter->link_speed = SPEED_0; | |
182 | netif_carrier_off(netdev); | |
183 | netif_stop_queue(netdev); | |
184 | } | |
185 | } else { | |
186 | /* Link Up */ | |
187 | err = atl1e_get_speed_and_duplex(hw, &speed, &duplex); | |
188 | if (unlikely(err)) | |
189 | return err; | |
190 | ||
191 | /* link result is our setting */ | |
192 | if (adapter->link_speed != speed || | |
193 | adapter->link_duplex != duplex) { | |
194 | adapter->link_speed = speed; | |
195 | adapter->link_duplex = duplex; | |
196 | atl1e_setup_mac_ctrl(adapter); | |
ba211e3e JP |
197 | netdev_info(netdev, |
198 | "NIC Link is Up <%d Mbps %s Duplex>\n", | |
199 | adapter->link_speed, | |
200 | adapter->link_duplex == FULL_DUPLEX ? | |
201 | "Full" : "Half"); | |
a6a53252 JY |
202 | } |
203 | ||
204 | if (!netif_carrier_ok(netdev)) { | |
205 | /* Link down -> Up */ | |
206 | netif_carrier_on(netdev); | |
207 | netif_wake_queue(netdev); | |
208 | } | |
209 | } | |
210 | return 0; | |
211 | } | |
212 | ||
213 | /* | |
214 | * atl1e_link_chg_task - deal with link change event Out of interrupt context | |
215 | * @netdev: network interface device structure | |
216 | */ | |
217 | static void atl1e_link_chg_task(struct work_struct *work) | |
218 | { | |
219 | struct atl1e_adapter *adapter; | |
220 | unsigned long flags; | |
221 | ||
222 | adapter = container_of(work, struct atl1e_adapter, link_chg_task); | |
223 | spin_lock_irqsave(&adapter->mdio_lock, flags); | |
224 | atl1e_check_link(adapter); | |
225 | spin_unlock_irqrestore(&adapter->mdio_lock, flags); | |
226 | } | |
227 | ||
228 | static void atl1e_link_chg_event(struct atl1e_adapter *adapter) | |
229 | { | |
230 | struct net_device *netdev = adapter->netdev; | |
a6a53252 JY |
231 | u16 phy_data = 0; |
232 | u16 link_up = 0; | |
233 | ||
234 | spin_lock(&adapter->mdio_lock); | |
235 | atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); | |
236 | atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); | |
237 | spin_unlock(&adapter->mdio_lock); | |
238 | link_up = phy_data & BMSR_LSTATUS; | |
239 | /* notify upper layer link down ASAP */ | |
240 | if (!link_up) { | |
241 | if (netif_carrier_ok(netdev)) { | |
242 | /* old link state: Up */ | |
ba211e3e | 243 | netdev_info(netdev, "NIC Link is Down\n"); |
a6a53252 JY |
244 | adapter->link_speed = SPEED_0; |
245 | netif_stop_queue(netdev); | |
246 | } | |
247 | } | |
248 | schedule_work(&adapter->link_chg_task); | |
249 | } | |
250 | ||
251 | static void atl1e_del_timer(struct atl1e_adapter *adapter) | |
252 | { | |
253 | del_timer_sync(&adapter->phy_config_timer); | |
254 | } | |
255 | ||
256 | static void atl1e_cancel_work(struct atl1e_adapter *adapter) | |
257 | { | |
258 | cancel_work_sync(&adapter->reset_task); | |
259 | cancel_work_sync(&adapter->link_chg_task); | |
260 | } | |
261 | ||
262 | /* | |
263 | * atl1e_tx_timeout - Respond to a Tx Hang | |
264 | * @netdev: network interface device structure | |
265 | */ | |
266 | static void atl1e_tx_timeout(struct net_device *netdev) | |
267 | { | |
268 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
269 | ||
270 | /* Do the reset outside of interrupt context */ | |
271 | schedule_work(&adapter->reset_task); | |
272 | } | |
273 | ||
274 | /* | |
275 | * atl1e_set_multi - Multicast and Promiscuous mode set | |
276 | * @netdev: network interface device structure | |
277 | * | |
278 | * The set_multi entry point is called whenever the multicast address | |
279 | * list or the network interface flags are updated. This routine is | |
280 | * responsible for configuring the hardware for proper multicast, | |
281 | * promiscuous mode, and all-multi behavior. | |
282 | */ | |
283 | static void atl1e_set_multi(struct net_device *netdev) | |
284 | { | |
285 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
286 | struct atl1e_hw *hw = &adapter->hw; | |
22bedad3 | 287 | struct netdev_hw_addr *ha; |
a6a53252 JY |
288 | u32 mac_ctrl_data = 0; |
289 | u32 hash_value; | |
290 | ||
291 | /* Check for Promiscuous and All Multicast modes */ | |
292 | mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL); | |
293 | ||
294 | if (netdev->flags & IFF_PROMISC) { | |
295 | mac_ctrl_data |= MAC_CTRL_PROMIS_EN; | |
296 | } else if (netdev->flags & IFF_ALLMULTI) { | |
297 | mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; | |
298 | mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; | |
299 | } else { | |
300 | mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); | |
301 | } | |
302 | ||
303 | AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); | |
304 | ||
305 | /* clear the old settings from the multicast hash table */ | |
306 | AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); | |
307 | AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); | |
308 | ||
309 | /* comoute mc addresses' hash value ,and put it into hash table */ | |
22bedad3 JP |
310 | netdev_for_each_mc_addr(ha, netdev) { |
311 | hash_value = atl1e_hash_mc_addr(hw, ha->addr); | |
a6a53252 JY |
312 | atl1e_hash_set(hw, hash_value); |
313 | } | |
314 | } | |
315 | ||
2707fffc JP |
316 | static void __atl1e_vlan_mode(u32 features, u32 *mac_ctrl_data) |
317 | { | |
318 | if (features & NETIF_F_HW_VLAN_RX) { | |
319 | /* enable VLAN tag insert/strip */ | |
320 | *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; | |
321 | } else { | |
322 | /* disable VLAN tag insert/strip */ | |
323 | *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; | |
324 | } | |
325 | } | |
326 | ||
327 | static void atl1e_vlan_mode(struct net_device *netdev, u32 features) | |
a6a53252 JY |
328 | { |
329 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
a6a53252 JY |
330 | u32 mac_ctrl_data = 0; |
331 | ||
ba211e3e | 332 | netdev_dbg(adapter->netdev, "%s\n", __func__); |
a6a53252 JY |
333 | |
334 | atl1e_irq_disable(adapter); | |
a6a53252 | 335 | mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); |
2707fffc | 336 | __atl1e_vlan_mode(features, &mac_ctrl_data); |
a6a53252 JY |
337 | AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); |
338 | atl1e_irq_enable(adapter); | |
339 | } | |
340 | ||
341 | static void atl1e_restore_vlan(struct atl1e_adapter *adapter) | |
342 | { | |
ba211e3e | 343 | netdev_dbg(adapter->netdev, "%s\n", __func__); |
2707fffc | 344 | atl1e_vlan_mode(adapter->netdev, adapter->netdev->features); |
a6a53252 | 345 | } |
2707fffc | 346 | |
a6a53252 JY |
347 | /* |
348 | * atl1e_set_mac - Change the Ethernet Address of the NIC | |
349 | * @netdev: network interface device structure | |
350 | * @p: pointer to an address structure | |
351 | * | |
352 | * Returns 0 on success, negative on failure | |
353 | */ | |
354 | static int atl1e_set_mac_addr(struct net_device *netdev, void *p) | |
355 | { | |
356 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
357 | struct sockaddr *addr = p; | |
358 | ||
359 | if (!is_valid_ether_addr(addr->sa_data)) | |
360 | return -EADDRNOTAVAIL; | |
361 | ||
362 | if (netif_running(netdev)) | |
363 | return -EBUSY; | |
364 | ||
365 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
366 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
367 | ||
368 | atl1e_hw_set_mac_addr(&adapter->hw); | |
369 | ||
370 | return 0; | |
371 | } | |
372 | ||
2707fffc JP |
373 | static u32 atl1e_fix_features(struct net_device *netdev, u32 features) |
374 | { | |
375 | /* | |
376 | * Since there is no support for separate rx/tx vlan accel | |
377 | * enable/disable make sure tx flag is always in same state as rx. | |
378 | */ | |
379 | if (features & NETIF_F_HW_VLAN_RX) | |
380 | features |= NETIF_F_HW_VLAN_TX; | |
381 | else | |
382 | features &= ~NETIF_F_HW_VLAN_TX; | |
383 | ||
384 | return features; | |
385 | } | |
386 | ||
387 | static int atl1e_set_features(struct net_device *netdev, u32 features) | |
388 | { | |
389 | u32 changed = netdev->features ^ features; | |
390 | ||
391 | if (changed & NETIF_F_HW_VLAN_RX) | |
392 | atl1e_vlan_mode(netdev, features); | |
393 | ||
394 | return 0; | |
395 | } | |
396 | ||
a6a53252 JY |
397 | /* |
398 | * atl1e_change_mtu - Change the Maximum Transfer Unit | |
399 | * @netdev: network interface device structure | |
400 | * @new_mtu: new value for maximum frame size | |
401 | * | |
402 | * Returns 0 on success, negative on failure | |
403 | */ | |
404 | static int atl1e_change_mtu(struct net_device *netdev, int new_mtu) | |
405 | { | |
406 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
407 | int old_mtu = netdev->mtu; | |
408 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; | |
409 | ||
410 | if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) || | |
411 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
ba211e3e | 412 | netdev_warn(adapter->netdev, "invalid MTU setting\n"); |
a6a53252 JY |
413 | return -EINVAL; |
414 | } | |
415 | /* set MTU */ | |
416 | if (old_mtu != new_mtu && netif_running(netdev)) { | |
417 | while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) | |
418 | msleep(1); | |
419 | netdev->mtu = new_mtu; | |
420 | adapter->hw.max_frame_size = new_mtu; | |
421 | adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3; | |
422 | atl1e_down(adapter); | |
423 | atl1e_up(adapter); | |
424 | clear_bit(__AT_RESETTING, &adapter->flags); | |
425 | } | |
426 | return 0; | |
427 | } | |
428 | ||
429 | /* | |
430 | * caller should hold mdio_lock | |
431 | */ | |
432 | static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num) | |
433 | { | |
434 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
435 | u16 result; | |
436 | ||
437 | atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); | |
438 | return result; | |
439 | } | |
440 | ||
441 | static void atl1e_mdio_write(struct net_device *netdev, int phy_id, | |
442 | int reg_num, int val) | |
443 | { | |
444 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
445 | ||
446 | atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val); | |
447 | } | |
448 | ||
449 | /* | |
450 | * atl1e_mii_ioctl - | |
451 | * @netdev: | |
452 | * @ifreq: | |
453 | * @cmd: | |
454 | */ | |
455 | static int atl1e_mii_ioctl(struct net_device *netdev, | |
456 | struct ifreq *ifr, int cmd) | |
457 | { | |
458 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
a6a53252 JY |
459 | struct mii_ioctl_data *data = if_mii(ifr); |
460 | unsigned long flags; | |
461 | int retval = 0; | |
462 | ||
463 | if (!netif_running(netdev)) | |
464 | return -EINVAL; | |
465 | ||
466 | spin_lock_irqsave(&adapter->mdio_lock, flags); | |
467 | switch (cmd) { | |
468 | case SIOCGMIIPHY: | |
469 | data->phy_id = 0; | |
470 | break; | |
471 | ||
472 | case SIOCGMIIREG: | |
a6a53252 JY |
473 | if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, |
474 | &data->val_out)) { | |
475 | retval = -EIO; | |
476 | goto out; | |
477 | } | |
478 | break; | |
479 | ||
480 | case SIOCSMIIREG: | |
a6a53252 JY |
481 | if (data->reg_num & ~(0x1F)) { |
482 | retval = -EFAULT; | |
483 | goto out; | |
484 | } | |
485 | ||
ba211e3e JP |
486 | netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n", |
487 | data->reg_num, data->val_in); | |
a6a53252 JY |
488 | if (atl1e_write_phy_reg(&adapter->hw, |
489 | data->reg_num, data->val_in)) { | |
490 | retval = -EIO; | |
491 | goto out; | |
492 | } | |
493 | break; | |
494 | ||
495 | default: | |
496 | retval = -EOPNOTSUPP; | |
497 | break; | |
498 | } | |
499 | out: | |
500 | spin_unlock_irqrestore(&adapter->mdio_lock, flags); | |
501 | return retval; | |
502 | ||
503 | } | |
504 | ||
505 | /* | |
506 | * atl1e_ioctl - | |
507 | * @netdev: | |
508 | * @ifreq: | |
509 | * @cmd: | |
510 | */ | |
511 | static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
512 | { | |
513 | switch (cmd) { | |
514 | case SIOCGMIIPHY: | |
515 | case SIOCGMIIREG: | |
516 | case SIOCSMIIREG: | |
517 | return atl1e_mii_ioctl(netdev, ifr, cmd); | |
518 | default: | |
519 | return -EOPNOTSUPP; | |
520 | } | |
521 | } | |
522 | ||
523 | static void atl1e_setup_pcicmd(struct pci_dev *pdev) | |
524 | { | |
525 | u16 cmd; | |
526 | ||
527 | pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
528 | cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO); | |
529 | cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); | |
530 | pci_write_config_word(pdev, PCI_COMMAND, cmd); | |
531 | ||
532 | /* | |
533 | * some motherboards BIOS(PXE/EFI) driver may set PME | |
534 | * while they transfer control to OS (Windows/Linux) | |
535 | * so we should clear this bit before NIC work normally | |
536 | */ | |
537 | pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0); | |
538 | msleep(1); | |
539 | } | |
540 | ||
541 | /* | |
542 | * atl1e_alloc_queues - Allocate memory for all rings | |
543 | * @adapter: board private structure to initialize | |
544 | * | |
545 | */ | |
546 | static int __devinit atl1e_alloc_queues(struct atl1e_adapter *adapter) | |
547 | { | |
548 | return 0; | |
549 | } | |
550 | ||
551 | /* | |
552 | * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter) | |
553 | * @adapter: board private structure to initialize | |
554 | * | |
555 | * atl1e_sw_init initializes the Adapter private data structure. | |
556 | * Fields are initialized based on PCI device information and | |
557 | * OS network device settings (MTU size). | |
558 | */ | |
559 | static int __devinit atl1e_sw_init(struct atl1e_adapter *adapter) | |
560 | { | |
561 | struct atl1e_hw *hw = &adapter->hw; | |
562 | struct pci_dev *pdev = adapter->pdev; | |
563 | u32 phy_status_data = 0; | |
564 | ||
565 | adapter->wol = 0; | |
566 | adapter->link_speed = SPEED_0; /* hardware init */ | |
567 | adapter->link_duplex = FULL_DUPLEX; | |
568 | adapter->num_rx_queues = 1; | |
569 | ||
570 | /* PCI config space info */ | |
571 | hw->vendor_id = pdev->vendor; | |
572 | hw->device_id = pdev->device; | |
573 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
574 | hw->subsystem_id = pdev->subsystem_device; | |
ff938e43 | 575 | hw->revision_id = pdev->revision; |
a6a53252 | 576 | |
a6a53252 JY |
577 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); |
578 | ||
579 | phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); | |
580 | /* nic type */ | |
581 | if (hw->revision_id >= 0xF0) { | |
582 | hw->nic_type = athr_l2e_revB; | |
583 | } else { | |
584 | if (phy_status_data & PHY_STATUS_100M) | |
585 | hw->nic_type = athr_l1e; | |
586 | else | |
587 | hw->nic_type = athr_l2e_revA; | |
588 | } | |
589 | ||
590 | phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); | |
591 | ||
592 | if (phy_status_data & PHY_STATUS_EMI_CA) | |
593 | hw->emi_ca = true; | |
594 | else | |
595 | hw->emi_ca = false; | |
596 | ||
597 | hw->phy_configured = false; | |
598 | hw->preamble_len = 7; | |
599 | hw->max_frame_size = adapter->netdev->mtu; | |
600 | hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN + | |
601 | VLAN_HLEN + ETH_FCS_LEN + 7) >> 3; | |
602 | ||
603 | hw->rrs_type = atl1e_rrs_disable; | |
604 | hw->indirect_tab = 0; | |
605 | hw->base_cpu = 0; | |
606 | ||
607 | /* need confirm */ | |
608 | ||
609 | hw->ict = 50000; /* 100ms */ | |
610 | hw->smb_timer = 200000; /* 200ms */ | |
611 | hw->tpd_burst = 5; | |
612 | hw->rrd_thresh = 1; | |
613 | hw->tpd_thresh = adapter->tx_ring.count / 2; | |
614 | hw->rx_count_down = 4; /* 2us resolution */ | |
615 | hw->tx_count_down = hw->imt * 4 / 3; | |
616 | hw->dmar_block = atl1e_dma_req_1024; | |
617 | hw->dmaw_block = atl1e_dma_req_1024; | |
618 | hw->dmar_dly_cnt = 15; | |
619 | hw->dmaw_dly_cnt = 4; | |
620 | ||
621 | if (atl1e_alloc_queues(adapter)) { | |
ba211e3e | 622 | netdev_err(adapter->netdev, "Unable to allocate memory for queues\n"); |
a6a53252 JY |
623 | return -ENOMEM; |
624 | } | |
625 | ||
626 | atomic_set(&adapter->irq_sem, 1); | |
627 | spin_lock_init(&adapter->mdio_lock); | |
628 | spin_lock_init(&adapter->tx_lock); | |
629 | ||
630 | set_bit(__AT_DOWN, &adapter->flags); | |
631 | ||
632 | return 0; | |
633 | } | |
634 | ||
635 | /* | |
636 | * atl1e_clean_tx_ring - Free Tx-skb | |
637 | * @adapter: board private structure | |
638 | */ | |
639 | static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter) | |
640 | { | |
641 | struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *) | |
642 | &adapter->tx_ring; | |
643 | struct atl1e_tx_buffer *tx_buffer = NULL; | |
644 | struct pci_dev *pdev = adapter->pdev; | |
645 | u16 index, ring_count; | |
646 | ||
647 | if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL) | |
648 | return; | |
649 | ||
650 | ring_count = tx_ring->count; | |
651 | /* first unmmap dma */ | |
652 | for (index = 0; index < ring_count; index++) { | |
653 | tx_buffer = &tx_ring->tx_buffer[index]; | |
654 | if (tx_buffer->dma) { | |
03f18991 JY |
655 | if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) |
656 | pci_unmap_single(pdev, tx_buffer->dma, | |
657 | tx_buffer->length, PCI_DMA_TODEVICE); | |
658 | else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) | |
659 | pci_unmap_page(pdev, tx_buffer->dma, | |
a6a53252 JY |
660 | tx_buffer->length, PCI_DMA_TODEVICE); |
661 | tx_buffer->dma = 0; | |
662 | } | |
663 | } | |
664 | /* second free skb */ | |
665 | for (index = 0; index < ring_count; index++) { | |
666 | tx_buffer = &tx_ring->tx_buffer[index]; | |
667 | if (tx_buffer->skb) { | |
668 | dev_kfree_skb_any(tx_buffer->skb); | |
669 | tx_buffer->skb = NULL; | |
670 | } | |
671 | } | |
672 | /* Zero out Tx-buffers */ | |
673 | memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) * | |
674 | ring_count); | |
675 | memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) * | |
676 | ring_count); | |
677 | } | |
678 | ||
679 | /* | |
680 | * atl1e_clean_rx_ring - Free rx-reservation skbs | |
681 | * @adapter: board private structure | |
682 | */ | |
683 | static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter) | |
684 | { | |
685 | struct atl1e_rx_ring *rx_ring = | |
686 | (struct atl1e_rx_ring *)&adapter->rx_ring; | |
687 | struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc; | |
688 | u16 i, j; | |
689 | ||
690 | ||
691 | if (adapter->ring_vir_addr == NULL) | |
692 | return; | |
693 | /* Zero out the descriptor ring */ | |
694 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
695 | for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { | |
696 | if (rx_page_desc[i].rx_page[j].addr != NULL) { | |
697 | memset(rx_page_desc[i].rx_page[j].addr, 0, | |
698 | rx_ring->real_page_size); | |
699 | } | |
700 | } | |
701 | } | |
702 | } | |
703 | ||
704 | static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size) | |
705 | { | |
706 | *ring_size = ((u32)(adapter->tx_ring.count * | |
707 | sizeof(struct atl1e_tpd_desc) + 7 | |
708 | /* tx ring, qword align */ | |
709 | + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE * | |
710 | adapter->num_rx_queues + 31 | |
711 | /* rx ring, 32 bytes align */ | |
712 | + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) * | |
713 | sizeof(u32) + 3)); | |
714 | /* tx, rx cmd, dword align */ | |
715 | } | |
716 | ||
717 | static void atl1e_init_ring_resources(struct atl1e_adapter *adapter) | |
718 | { | |
a6a53252 JY |
719 | struct atl1e_rx_ring *rx_ring = NULL; |
720 | ||
a6a53252 JY |
721 | rx_ring = &adapter->rx_ring; |
722 | ||
723 | rx_ring->real_page_size = adapter->rx_ring.page_size | |
724 | + adapter->hw.max_frame_size | |
725 | + ETH_HLEN + VLAN_HLEN | |
726 | + ETH_FCS_LEN; | |
727 | rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32); | |
728 | atl1e_cal_ring_size(adapter, &adapter->ring_size); | |
729 | ||
730 | adapter->ring_vir_addr = NULL; | |
731 | adapter->rx_ring.desc = NULL; | |
732 | rwlock_init(&adapter->tx_ring.tx_lock); | |
a6a53252 JY |
733 | } |
734 | ||
735 | /* | |
736 | * Read / Write Ptr Initialize: | |
737 | */ | |
738 | static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter) | |
739 | { | |
740 | struct atl1e_tx_ring *tx_ring = NULL; | |
741 | struct atl1e_rx_ring *rx_ring = NULL; | |
742 | struct atl1e_rx_page_desc *rx_page_desc = NULL; | |
743 | int i, j; | |
744 | ||
745 | tx_ring = &adapter->tx_ring; | |
746 | rx_ring = &adapter->rx_ring; | |
747 | rx_page_desc = rx_ring->rx_page_desc; | |
748 | ||
749 | tx_ring->next_to_use = 0; | |
750 | atomic_set(&tx_ring->next_to_clean, 0); | |
751 | ||
752 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
753 | rx_page_desc[i].rx_using = 0; | |
754 | rx_page_desc[i].rx_nxseq = 0; | |
755 | for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { | |
756 | *rx_page_desc[i].rx_page[j].write_offset_addr = 0; | |
757 | rx_page_desc[i].rx_page[j].read_offset = 0; | |
758 | } | |
759 | } | |
760 | } | |
761 | ||
762 | /* | |
763 | * atl1e_free_ring_resources - Free Tx / RX descriptor Resources | |
764 | * @adapter: board private structure | |
765 | * | |
766 | * Free all transmit software resources | |
767 | */ | |
768 | static void atl1e_free_ring_resources(struct atl1e_adapter *adapter) | |
769 | { | |
770 | struct pci_dev *pdev = adapter->pdev; | |
771 | ||
772 | atl1e_clean_tx_ring(adapter); | |
773 | atl1e_clean_rx_ring(adapter); | |
774 | ||
775 | if (adapter->ring_vir_addr) { | |
776 | pci_free_consistent(pdev, adapter->ring_size, | |
777 | adapter->ring_vir_addr, adapter->ring_dma); | |
778 | adapter->ring_vir_addr = NULL; | |
779 | } | |
780 | ||
781 | if (adapter->tx_ring.tx_buffer) { | |
782 | kfree(adapter->tx_ring.tx_buffer); | |
783 | adapter->tx_ring.tx_buffer = NULL; | |
784 | } | |
785 | } | |
786 | ||
787 | /* | |
788 | * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources | |
789 | * @adapter: board private structure | |
790 | * | |
791 | * Return 0 on success, negative on failure | |
792 | */ | |
793 | static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter) | |
794 | { | |
795 | struct pci_dev *pdev = adapter->pdev; | |
796 | struct atl1e_tx_ring *tx_ring; | |
797 | struct atl1e_rx_ring *rx_ring; | |
798 | struct atl1e_rx_page_desc *rx_page_desc; | |
799 | int size, i, j; | |
800 | u32 offset = 0; | |
801 | int err = 0; | |
802 | ||
803 | if (adapter->ring_vir_addr != NULL) | |
804 | return 0; /* alloced already */ | |
805 | ||
806 | tx_ring = &adapter->tx_ring; | |
807 | rx_ring = &adapter->rx_ring; | |
808 | ||
809 | /* real ring DMA buffer */ | |
810 | ||
811 | size = adapter->ring_size; | |
812 | adapter->ring_vir_addr = pci_alloc_consistent(pdev, | |
813 | adapter->ring_size, &adapter->ring_dma); | |
814 | ||
815 | if (adapter->ring_vir_addr == NULL) { | |
ba211e3e JP |
816 | netdev_err(adapter->netdev, |
817 | "pci_alloc_consistent failed, size = D%d\n", size); | |
a6a53252 JY |
818 | return -ENOMEM; |
819 | } | |
820 | ||
821 | memset(adapter->ring_vir_addr, 0, adapter->ring_size); | |
822 | ||
823 | rx_page_desc = rx_ring->rx_page_desc; | |
824 | ||
825 | /* Init TPD Ring */ | |
826 | tx_ring->dma = roundup(adapter->ring_dma, 8); | |
827 | offset = tx_ring->dma - adapter->ring_dma; | |
43d620c8 | 828 | tx_ring->desc = adapter->ring_vir_addr + offset; |
a6a53252 JY |
829 | size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count); |
830 | tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL); | |
831 | if (tx_ring->tx_buffer == NULL) { | |
ba211e3e JP |
832 | netdev_err(adapter->netdev, "kzalloc failed, size = D%d\n", |
833 | size); | |
a6a53252 JY |
834 | err = -ENOMEM; |
835 | goto failed; | |
836 | } | |
837 | ||
838 | /* Init RXF-Pages */ | |
839 | offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count); | |
840 | offset = roundup(offset, 32); | |
841 | ||
842 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
843 | for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { | |
844 | rx_page_desc[i].rx_page[j].dma = | |
845 | adapter->ring_dma + offset; | |
846 | rx_page_desc[i].rx_page[j].addr = | |
847 | adapter->ring_vir_addr + offset; | |
848 | offset += rx_ring->real_page_size; | |
849 | } | |
850 | } | |
851 | ||
852 | /* Init CMB dma address */ | |
853 | tx_ring->cmb_dma = adapter->ring_dma + offset; | |
43d620c8 | 854 | tx_ring->cmb = adapter->ring_vir_addr + offset; |
a6a53252 JY |
855 | offset += sizeof(u32); |
856 | ||
857 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
858 | for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { | |
859 | rx_page_desc[i].rx_page[j].write_offset_dma = | |
860 | adapter->ring_dma + offset; | |
861 | rx_page_desc[i].rx_page[j].write_offset_addr = | |
862 | adapter->ring_vir_addr + offset; | |
863 | offset += sizeof(u32); | |
864 | } | |
865 | } | |
866 | ||
867 | if (unlikely(offset > adapter->ring_size)) { | |
ba211e3e JP |
868 | netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n", |
869 | offset, adapter->ring_size); | |
a6a53252 JY |
870 | err = -1; |
871 | goto failed; | |
872 | } | |
873 | ||
874 | return 0; | |
875 | failed: | |
876 | if (adapter->ring_vir_addr != NULL) { | |
877 | pci_free_consistent(pdev, adapter->ring_size, | |
878 | adapter->ring_vir_addr, adapter->ring_dma); | |
879 | adapter->ring_vir_addr = NULL; | |
880 | } | |
881 | return err; | |
882 | } | |
883 | ||
884 | static inline void atl1e_configure_des_ring(const struct atl1e_adapter *adapter) | |
885 | { | |
886 | ||
887 | struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw; | |
888 | struct atl1e_rx_ring *rx_ring = | |
889 | (struct atl1e_rx_ring *)&adapter->rx_ring; | |
890 | struct atl1e_tx_ring *tx_ring = | |
891 | (struct atl1e_tx_ring *)&adapter->tx_ring; | |
892 | struct atl1e_rx_page_desc *rx_page_desc = NULL; | |
893 | int i, j; | |
894 | ||
895 | AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI, | |
896 | (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32)); | |
897 | AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO, | |
898 | (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK)); | |
899 | AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count)); | |
900 | AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO, | |
901 | (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK)); | |
902 | ||
903 | rx_page_desc = rx_ring->rx_page_desc; | |
904 | /* RXF Page Physical address / Page Length */ | |
905 | for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) { | |
906 | AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i], | |
907 | (u32)((adapter->ring_dma & | |
908 | AT_DMA_HI_ADDR_MASK) >> 32)); | |
909 | for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { | |
910 | u32 page_phy_addr; | |
911 | u32 offset_phy_addr; | |
912 | ||
913 | page_phy_addr = rx_page_desc[i].rx_page[j].dma; | |
914 | offset_phy_addr = | |
915 | rx_page_desc[i].rx_page[j].write_offset_dma; | |
916 | ||
917 | AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j], | |
918 | page_phy_addr & AT_DMA_LO_ADDR_MASK); | |
919 | AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j], | |
920 | offset_phy_addr & AT_DMA_LO_ADDR_MASK); | |
921 | AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1); | |
922 | } | |
923 | } | |
924 | /* Page Length */ | |
925 | AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size); | |
926 | /* Load all of base address above */ | |
927 | AT_WRITE_REG(hw, REG_LOAD_PTR, 1); | |
a6a53252 JY |
928 | } |
929 | ||
930 | static inline void atl1e_configure_tx(struct atl1e_adapter *adapter) | |
931 | { | |
932 | struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw; | |
933 | u32 dev_ctrl_data = 0; | |
934 | u32 max_pay_load = 0; | |
935 | u32 jumbo_thresh = 0; | |
936 | u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */ | |
937 | ||
938 | /* configure TXQ param */ | |
939 | if (hw->nic_type != athr_l2e_revB) { | |
940 | extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN; | |
941 | if (hw->max_frame_size <= 1500) { | |
942 | jumbo_thresh = hw->max_frame_size + extra_size; | |
943 | } else if (hw->max_frame_size < 6*1024) { | |
944 | jumbo_thresh = | |
945 | (hw->max_frame_size + extra_size) * 2 / 3; | |
946 | } else { | |
947 | jumbo_thresh = (hw->max_frame_size + extra_size) / 2; | |
948 | } | |
949 | AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3); | |
950 | } | |
951 | ||
952 | dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL); | |
953 | ||
954 | max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) & | |
955 | DEVICE_CTRL_MAX_PAYLOAD_MASK; | |
956 | ||
81b504b8 | 957 | hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block); |
a6a53252 JY |
958 | |
959 | max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) & | |
960 | DEVICE_CTRL_MAX_RREQ_SZ_MASK; | |
81b504b8 | 961 | hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); |
a6a53252 JY |
962 | |
963 | if (hw->nic_type != athr_l2e_revB) | |
964 | AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2, | |
965 | atl1e_pay_load_size[hw->dmar_block]); | |
966 | /* enable TXQ */ | |
967 | AT_WRITE_REGW(hw, REG_TXQ_CTRL, | |
968 | (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK) | |
969 | << TXQ_CTRL_NUM_TPD_BURST_SHIFT) | |
970 | | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN); | |
a6a53252 JY |
971 | } |
972 | ||
973 | static inline void atl1e_configure_rx(struct atl1e_adapter *adapter) | |
974 | { | |
975 | struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw; | |
976 | u32 rxf_len = 0; | |
977 | u32 rxf_low = 0; | |
978 | u32 rxf_high = 0; | |
979 | u32 rxf_thresh_data = 0; | |
980 | u32 rxq_ctrl_data = 0; | |
981 | ||
982 | if (hw->nic_type != athr_l2e_revB) { | |
983 | AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM, | |
984 | (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) << | |
985 | RXQ_JMBOSZ_TH_SHIFT | | |
986 | (1 & RXQ_JMBO_LKAH_MASK) << | |
987 | RXQ_JMBO_LKAH_SHIFT)); | |
988 | ||
989 | rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN); | |
990 | rxf_high = rxf_len * 4 / 5; | |
991 | rxf_low = rxf_len / 5; | |
992 | rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK) | |
993 | << RXQ_RXF_PAUSE_TH_HI_SHIFT) | | |
994 | ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK) | |
995 | << RXQ_RXF_PAUSE_TH_LO_SHIFT); | |
996 | ||
997 | AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data); | |
998 | } | |
999 | ||
1000 | /* RRS */ | |
1001 | AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab); | |
1002 | AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu); | |
1003 | ||
1004 | if (hw->rrs_type & atl1e_rrs_ipv4) | |
1005 | rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4; | |
1006 | ||
1007 | if (hw->rrs_type & atl1e_rrs_ipv4_tcp) | |
1008 | rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP; | |
1009 | ||
1010 | if (hw->rrs_type & atl1e_rrs_ipv6) | |
1011 | rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6; | |
1012 | ||
1013 | if (hw->rrs_type & atl1e_rrs_ipv6_tcp) | |
1014 | rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP; | |
1015 | ||
1016 | if (hw->rrs_type != atl1e_rrs_disable) | |
1017 | rxq_ctrl_data |= | |
1018 | (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT); | |
1019 | ||
1020 | rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 | | |
1021 | RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN; | |
1022 | ||
1023 | AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); | |
a6a53252 JY |
1024 | } |
1025 | ||
1026 | static inline void atl1e_configure_dma(struct atl1e_adapter *adapter) | |
1027 | { | |
1028 | struct atl1e_hw *hw = &adapter->hw; | |
1029 | u32 dma_ctrl_data = 0; | |
1030 | ||
1031 | dma_ctrl_data = DMA_CTRL_RXCMB_EN; | |
1032 | dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK) | |
1033 | << DMA_CTRL_DMAR_BURST_LEN_SHIFT; | |
1034 | dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK) | |
1035 | << DMA_CTRL_DMAW_BURST_LEN_SHIFT; | |
1036 | dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER; | |
1037 | dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK) | |
1038 | << DMA_CTRL_DMAR_DLY_CNT_SHIFT; | |
1039 | dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK) | |
1040 | << DMA_CTRL_DMAW_DLY_CNT_SHIFT; | |
1041 | ||
1042 | AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); | |
a6a53252 JY |
1043 | } |
1044 | ||
e6ca2328 | 1045 | static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter) |
a6a53252 JY |
1046 | { |
1047 | u32 value; | |
1048 | struct atl1e_hw *hw = &adapter->hw; | |
1049 | struct net_device *netdev = adapter->netdev; | |
1050 | ||
1051 | /* Config MAC CTRL Register */ | |
1052 | value = MAC_CTRL_TX_EN | | |
1053 | MAC_CTRL_RX_EN ; | |
1054 | ||
1055 | if (FULL_DUPLEX == adapter->link_duplex) | |
1056 | value |= MAC_CTRL_DUPLX; | |
1057 | ||
1058 | value |= ((u32)((SPEED_1000 == adapter->link_speed) ? | |
1059 | MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) << | |
1060 | MAC_CTRL_SPEED_SHIFT); | |
1061 | value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); | |
1062 | ||
1063 | value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); | |
1064 | value |= (((u32)adapter->hw.preamble_len & | |
1065 | MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT); | |
1066 | ||
2707fffc | 1067 | __atl1e_vlan_mode(netdev->features, &value); |
a6a53252 JY |
1068 | |
1069 | value |= MAC_CTRL_BC_EN; | |
1070 | if (netdev->flags & IFF_PROMISC) | |
1071 | value |= MAC_CTRL_PROMIS_EN; | |
1072 | if (netdev->flags & IFF_ALLMULTI) | |
1073 | value |= MAC_CTRL_MC_ALL_EN; | |
1074 | ||
1075 | AT_WRITE_REG(hw, REG_MAC_CTRL, value); | |
1076 | } | |
1077 | ||
1078 | /* | |
1079 | * atl1e_configure - Configure Transmit&Receive Unit after Reset | |
1080 | * @adapter: board private structure | |
1081 | * | |
1082 | * Configure the Tx /Rx unit of the MAC after a reset. | |
1083 | */ | |
1084 | static int atl1e_configure(struct atl1e_adapter *adapter) | |
1085 | { | |
1086 | struct atl1e_hw *hw = &adapter->hw; | |
a6a53252 JY |
1087 | |
1088 | u32 intr_status_data = 0; | |
1089 | ||
1090 | /* clear interrupt status */ | |
1091 | AT_WRITE_REG(hw, REG_ISR, ~0); | |
1092 | ||
1093 | /* 1. set MAC Address */ | |
1094 | atl1e_hw_set_mac_addr(hw); | |
1095 | ||
1096 | /* 2. Init the Multicast HASH table done by set_muti */ | |
1097 | ||
1098 | /* 3. Clear any WOL status */ | |
1099 | AT_WRITE_REG(hw, REG_WOL_CTRL, 0); | |
1100 | ||
1101 | /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr | |
1102 | * TPD Ring/SMB/RXF0 Page CMBs, they use the same | |
1103 | * High 32bits memory */ | |
1104 | atl1e_configure_des_ring(adapter); | |
1105 | ||
1106 | /* 5. set Interrupt Moderator Timer */ | |
1107 | AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt); | |
1108 | AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt); | |
1109 | AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE | | |
1110 | MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN); | |
1111 | ||
1112 | /* 6. rx/tx threshold to trig interrupt */ | |
1113 | AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh); | |
1114 | AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh); | |
1115 | AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down); | |
1116 | AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down); | |
1117 | ||
1118 | /* 7. set Interrupt Clear Timer */ | |
1119 | AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict); | |
1120 | ||
1121 | /* 8. set MTU */ | |
1122 | AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + | |
1123 | VLAN_HLEN + ETH_FCS_LEN); | |
1124 | ||
1125 | /* 9. config TXQ early tx threshold */ | |
1126 | atl1e_configure_tx(adapter); | |
1127 | ||
1128 | /* 10. config RXQ */ | |
1129 | atl1e_configure_rx(adapter); | |
1130 | ||
1131 | /* 11. config DMA Engine */ | |
1132 | atl1e_configure_dma(adapter); | |
1133 | ||
1134 | /* 12. smb timer to trig interrupt */ | |
1135 | AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer); | |
1136 | ||
1137 | intr_status_data = AT_READ_REG(hw, REG_ISR); | |
1138 | if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) { | |
ba211e3e JP |
1139 | netdev_err(adapter->netdev, |
1140 | "atl1e_configure failed, PCIE phy link down\n"); | |
a6a53252 JY |
1141 | return -1; |
1142 | } | |
1143 | ||
1144 | AT_WRITE_REG(hw, REG_ISR, 0x7fffffff); | |
1145 | return 0; | |
1146 | } | |
1147 | ||
1148 | /* | |
1149 | * atl1e_get_stats - Get System Network Statistics | |
1150 | * @netdev: network interface device structure | |
1151 | * | |
1152 | * Returns the address of the device statistics structure. | |
1153 | * The statistics are actually updated from the timer callback. | |
1154 | */ | |
1155 | static struct net_device_stats *atl1e_get_stats(struct net_device *netdev) | |
1156 | { | |
1157 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
1158 | struct atl1e_hw_stats *hw_stats = &adapter->hw_stats; | |
d3f65f7c | 1159 | struct net_device_stats *net_stats = &netdev->stats; |
a6a53252 JY |
1160 | |
1161 | net_stats->rx_packets = hw_stats->rx_ok; | |
1162 | net_stats->tx_packets = hw_stats->tx_ok; | |
1163 | net_stats->rx_bytes = hw_stats->rx_byte_cnt; | |
1164 | net_stats->tx_bytes = hw_stats->tx_byte_cnt; | |
1165 | net_stats->multicast = hw_stats->rx_mcast; | |
1166 | net_stats->collisions = hw_stats->tx_1_col + | |
1167 | hw_stats->tx_2_col * 2 + | |
1168 | hw_stats->tx_late_col + hw_stats->tx_abort_col; | |
1169 | ||
1170 | net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err + | |
1171 | hw_stats->rx_len_err + hw_stats->rx_sz_ov + | |
1172 | hw_stats->rx_rrd_ov + hw_stats->rx_align_err; | |
1173 | net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; | |
1174 | net_stats->rx_length_errors = hw_stats->rx_len_err; | |
1175 | net_stats->rx_crc_errors = hw_stats->rx_fcs_err; | |
1176 | net_stats->rx_frame_errors = hw_stats->rx_align_err; | |
1177 | net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; | |
1178 | ||
1179 | net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; | |
1180 | ||
1181 | net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col + | |
1182 | hw_stats->tx_underrun + hw_stats->tx_trunc; | |
1183 | net_stats->tx_fifo_errors = hw_stats->tx_underrun; | |
1184 | net_stats->tx_aborted_errors = hw_stats->tx_abort_col; | |
1185 | net_stats->tx_window_errors = hw_stats->tx_late_col; | |
1186 | ||
d3f65f7c | 1187 | return net_stats; |
a6a53252 JY |
1188 | } |
1189 | ||
1190 | static void atl1e_update_hw_stats(struct atl1e_adapter *adapter) | |
1191 | { | |
1192 | u16 hw_reg_addr = 0; | |
1193 | unsigned long *stats_item = NULL; | |
1194 | ||
1195 | /* update rx status */ | |
1196 | hw_reg_addr = REG_MAC_RX_STATUS_BIN; | |
1197 | stats_item = &adapter->hw_stats.rx_ok; | |
1198 | while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { | |
1199 | *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); | |
1200 | stats_item++; | |
1201 | hw_reg_addr += 4; | |
1202 | } | |
1203 | /* update tx status */ | |
1204 | hw_reg_addr = REG_MAC_TX_STATUS_BIN; | |
1205 | stats_item = &adapter->hw_stats.tx_ok; | |
1206 | while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { | |
1207 | *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); | |
1208 | stats_item++; | |
1209 | hw_reg_addr += 4; | |
1210 | } | |
1211 | } | |
1212 | ||
1213 | static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter) | |
1214 | { | |
1215 | u16 phy_data; | |
1216 | ||
1217 | spin_lock(&adapter->mdio_lock); | |
1218 | atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data); | |
1219 | spin_unlock(&adapter->mdio_lock); | |
1220 | } | |
1221 | ||
1222 | static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter) | |
1223 | { | |
1224 | struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *) | |
1225 | &adapter->tx_ring; | |
1226 | struct atl1e_tx_buffer *tx_buffer = NULL; | |
1227 | u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX); | |
1228 | u16 next_to_clean = atomic_read(&tx_ring->next_to_clean); | |
1229 | ||
1230 | while (next_to_clean != hw_next_to_clean) { | |
1231 | tx_buffer = &tx_ring->tx_buffer[next_to_clean]; | |
1232 | if (tx_buffer->dma) { | |
03f18991 JY |
1233 | if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) |
1234 | pci_unmap_single(adapter->pdev, tx_buffer->dma, | |
1235 | tx_buffer->length, PCI_DMA_TODEVICE); | |
1236 | else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) | |
1237 | pci_unmap_page(adapter->pdev, tx_buffer->dma, | |
a6a53252 JY |
1238 | tx_buffer->length, PCI_DMA_TODEVICE); |
1239 | tx_buffer->dma = 0; | |
1240 | } | |
1241 | ||
1242 | if (tx_buffer->skb) { | |
1243 | dev_kfree_skb_irq(tx_buffer->skb); | |
1244 | tx_buffer->skb = NULL; | |
1245 | } | |
1246 | ||
1247 | if (++next_to_clean == tx_ring->count) | |
1248 | next_to_clean = 0; | |
1249 | } | |
1250 | ||
1251 | atomic_set(&tx_ring->next_to_clean, next_to_clean); | |
1252 | ||
1253 | if (netif_queue_stopped(adapter->netdev) && | |
1254 | netif_carrier_ok(adapter->netdev)) { | |
1255 | netif_wake_queue(adapter->netdev); | |
1256 | } | |
1257 | ||
1258 | return true; | |
1259 | } | |
1260 | ||
1261 | /* | |
1262 | * atl1e_intr - Interrupt Handler | |
1263 | * @irq: interrupt number | |
1264 | * @data: pointer to a network interface device structure | |
1265 | * @pt_regs: CPU registers structure | |
1266 | */ | |
1267 | static irqreturn_t atl1e_intr(int irq, void *data) | |
1268 | { | |
1269 | struct net_device *netdev = data; | |
1270 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
a6a53252 JY |
1271 | struct atl1e_hw *hw = &adapter->hw; |
1272 | int max_ints = AT_MAX_INT_WORK; | |
1273 | int handled = IRQ_NONE; | |
1274 | u32 status; | |
1275 | ||
1276 | do { | |
1277 | status = AT_READ_REG(hw, REG_ISR); | |
1278 | if ((status & IMR_NORMAL_MASK) == 0 || | |
1279 | (status & ISR_DIS_INT) != 0) { | |
1280 | if (max_ints != AT_MAX_INT_WORK) | |
1281 | handled = IRQ_HANDLED; | |
1282 | break; | |
1283 | } | |
1284 | /* link event */ | |
1285 | if (status & ISR_GPHY) | |
1286 | atl1e_clear_phy_int(adapter); | |
1287 | /* Ack ISR */ | |
1288 | AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); | |
1289 | ||
1290 | handled = IRQ_HANDLED; | |
1291 | /* check if PCIE PHY Link down */ | |
1292 | if (status & ISR_PHY_LINKDOWN) { | |
ba211e3e JP |
1293 | netdev_err(adapter->netdev, |
1294 | "pcie phy linkdown %x\n", status); | |
a6a53252 JY |
1295 | if (netif_running(adapter->netdev)) { |
1296 | /* reset MAC */ | |
1297 | atl1e_irq_reset(adapter); | |
1298 | schedule_work(&adapter->reset_task); | |
1299 | break; | |
1300 | } | |
1301 | } | |
1302 | ||
1303 | /* check if DMA read/write error */ | |
1304 | if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) { | |
ba211e3e JP |
1305 | netdev_err(adapter->netdev, |
1306 | "PCIE DMA RW error (status = 0x%x)\n", | |
1307 | status); | |
a6a53252 JY |
1308 | atl1e_irq_reset(adapter); |
1309 | schedule_work(&adapter->reset_task); | |
1310 | break; | |
1311 | } | |
1312 | ||
1313 | if (status & ISR_SMB) | |
1314 | atl1e_update_hw_stats(adapter); | |
1315 | ||
1316 | /* link event */ | |
1317 | if (status & (ISR_GPHY | ISR_MANUAL)) { | |
d3f65f7c | 1318 | netdev->stats.tx_carrier_errors++; |
a6a53252 JY |
1319 | atl1e_link_chg_event(adapter); |
1320 | break; | |
1321 | } | |
1322 | ||
1323 | /* transmit event */ | |
1324 | if (status & ISR_TX_EVENT) | |
1325 | atl1e_clean_tx_irq(adapter); | |
1326 | ||
1327 | if (status & ISR_RX_EVENT) { | |
1328 | /* | |
1329 | * disable rx interrupts, without | |
1330 | * the synchronize_irq bit | |
1331 | */ | |
1332 | AT_WRITE_REG(hw, REG_IMR, | |
1333 | IMR_NORMAL_MASK & ~ISR_RX_EVENT); | |
1334 | AT_WRITE_FLUSH(hw); | |
288379f0 | 1335 | if (likely(napi_schedule_prep( |
a6a53252 | 1336 | &adapter->napi))) |
288379f0 | 1337 | __napi_schedule(&adapter->napi); |
a6a53252 JY |
1338 | } |
1339 | } while (--max_ints > 0); | |
1340 | /* re-enable Interrupt*/ | |
1341 | AT_WRITE_REG(&adapter->hw, REG_ISR, 0); | |
1342 | ||
1343 | return handled; | |
1344 | } | |
1345 | ||
1346 | static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter, | |
1347 | struct sk_buff *skb, struct atl1e_recv_ret_status *prrs) | |
1348 | { | |
1349 | u8 *packet = (u8 *)(prrs + 1); | |
1350 | struct iphdr *iph; | |
1351 | u16 head_len = ETH_HLEN; | |
1352 | u16 pkt_flags; | |
1353 | u16 err_flags; | |
1354 | ||
bc8acf2c | 1355 | skb_checksum_none_assert(skb); |
a6a53252 JY |
1356 | pkt_flags = prrs->pkt_flag; |
1357 | err_flags = prrs->err_flag; | |
1358 | if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) && | |
1359 | ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) { | |
1360 | if (pkt_flags & RRS_IS_IPV4) { | |
1361 | if (pkt_flags & RRS_IS_802_3) | |
1362 | head_len += 8; | |
1363 | iph = (struct iphdr *) (packet + head_len); | |
1364 | if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF)) | |
1365 | goto hw_xsum; | |
1366 | } | |
1367 | if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) { | |
1368 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1369 | return; | |
1370 | } | |
1371 | } | |
1372 | ||
1373 | hw_xsum : | |
1374 | return; | |
1375 | } | |
1376 | ||
1377 | static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter, | |
1378 | u8 que) | |
1379 | { | |
1380 | struct atl1e_rx_page_desc *rx_page_desc = | |
1381 | (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc; | |
1382 | u8 rx_using = rx_page_desc[que].rx_using; | |
1383 | ||
1384 | return (struct atl1e_rx_page *)&(rx_page_desc[que].rx_page[rx_using]); | |
1385 | } | |
1386 | ||
1387 | static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que, | |
1388 | int *work_done, int work_to_do) | |
1389 | { | |
a6a53252 JY |
1390 | struct net_device *netdev = adapter->netdev; |
1391 | struct atl1e_rx_ring *rx_ring = (struct atl1e_rx_ring *) | |
1392 | &adapter->rx_ring; | |
1393 | struct atl1e_rx_page_desc *rx_page_desc = | |
1394 | (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc; | |
1395 | struct sk_buff *skb = NULL; | |
1396 | struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que); | |
1397 | u32 packet_size, write_offset; | |
1398 | struct atl1e_recv_ret_status *prrs; | |
1399 | ||
1400 | write_offset = *(rx_page->write_offset_addr); | |
1401 | if (likely(rx_page->read_offset < write_offset)) { | |
1402 | do { | |
1403 | if (*work_done >= work_to_do) | |
1404 | break; | |
1405 | (*work_done)++; | |
1406 | /* get new packet's rrs */ | |
1407 | prrs = (struct atl1e_recv_ret_status *) (rx_page->addr + | |
1408 | rx_page->read_offset); | |
1409 | /* check sequence number */ | |
1410 | if (prrs->seq_num != rx_page_desc[que].rx_nxseq) { | |
ba211e3e JP |
1411 | netdev_err(netdev, |
1412 | "rx sequence number error (rx=%d) (expect=%d)\n", | |
1413 | prrs->seq_num, | |
1414 | rx_page_desc[que].rx_nxseq); | |
a6a53252 JY |
1415 | rx_page_desc[que].rx_nxseq++; |
1416 | /* just for debug use */ | |
1417 | AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0, | |
1418 | (((u32)prrs->seq_num) << 16) | | |
1419 | rx_page_desc[que].rx_nxseq); | |
1420 | goto fatal_err; | |
1421 | } | |
1422 | rx_page_desc[que].rx_nxseq++; | |
1423 | ||
1424 | /* error packet */ | |
1425 | if (prrs->pkt_flag & RRS_IS_ERR_FRAME) { | |
1426 | if (prrs->err_flag & (RRS_ERR_BAD_CRC | | |
1427 | RRS_ERR_DRIBBLE | RRS_ERR_CODE | | |
1428 | RRS_ERR_TRUNC)) { | |
1429 | /* hardware error, discard this packet*/ | |
ba211e3e JP |
1430 | netdev_err(netdev, |
1431 | "rx packet desc error %x\n", | |
1432 | *((u32 *)prrs + 1)); | |
a6a53252 JY |
1433 | goto skip_pkt; |
1434 | } | |
1435 | } | |
1436 | ||
1437 | packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & | |
1438 | RRS_PKT_SIZE_MASK) - 4; /* CRC */ | |
89d71a66 | 1439 | skb = netdev_alloc_skb_ip_align(netdev, packet_size); |
a6a53252 | 1440 | if (skb == NULL) { |
ba211e3e JP |
1441 | netdev_warn(netdev, |
1442 | "Memory squeeze, deferring packet\n"); | |
a6a53252 JY |
1443 | goto skip_pkt; |
1444 | } | |
a6a53252 JY |
1445 | memcpy(skb->data, (u8 *)(prrs + 1), packet_size); |
1446 | skb_put(skb, packet_size); | |
1447 | skb->protocol = eth_type_trans(skb, netdev); | |
1448 | atl1e_rx_checksum(adapter, skb, prrs); | |
1449 | ||
2707fffc | 1450 | if (prrs->pkt_flag & RRS_IS_VLAN_TAG) { |
a6a53252 JY |
1451 | u16 vlan_tag = (prrs->vtag >> 4) | |
1452 | ((prrs->vtag & 7) << 13) | | |
1453 | ((prrs->vtag & 8) << 9); | |
ba211e3e JP |
1454 | netdev_dbg(netdev, |
1455 | "RXD VLAN TAG<RRD>=0x%04x\n", | |
1456 | prrs->vtag); | |
2707fffc | 1457 | __vlan_hwaccel_put_tag(skb, vlan_tag); |
a6a53252 | 1458 | } |
2707fffc | 1459 | netif_receive_skb(skb); |
a6a53252 | 1460 | |
a6a53252 JY |
1461 | skip_pkt: |
1462 | /* skip current packet whether it's ok or not. */ | |
1463 | rx_page->read_offset += | |
1464 | (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & | |
1465 | RRS_PKT_SIZE_MASK) + | |
1466 | sizeof(struct atl1e_recv_ret_status) + 31) & | |
1467 | 0xFFFFFFE0); | |
1468 | ||
1469 | if (rx_page->read_offset >= rx_ring->page_size) { | |
1470 | /* mark this page clean */ | |
1471 | u16 reg_addr; | |
1472 | u8 rx_using; | |
1473 | ||
1474 | rx_page->read_offset = | |
1475 | *(rx_page->write_offset_addr) = 0; | |
1476 | rx_using = rx_page_desc[que].rx_using; | |
1477 | reg_addr = | |
1478 | atl1e_rx_page_vld_regs[que][rx_using]; | |
1479 | AT_WRITE_REGB(&adapter->hw, reg_addr, 1); | |
1480 | rx_page_desc[que].rx_using ^= 1; | |
1481 | rx_page = atl1e_get_rx_page(adapter, que); | |
1482 | } | |
1483 | write_offset = *(rx_page->write_offset_addr); | |
1484 | } while (rx_page->read_offset < write_offset); | |
1485 | } | |
1486 | ||
1487 | return; | |
1488 | ||
1489 | fatal_err: | |
1490 | if (!test_bit(__AT_DOWN, &adapter->flags)) | |
1491 | schedule_work(&adapter->reset_task); | |
1492 | } | |
1493 | ||
1494 | /* | |
1495 | * atl1e_clean - NAPI Rx polling callback | |
1496 | * @adapter: board private structure | |
1497 | */ | |
1498 | static int atl1e_clean(struct napi_struct *napi, int budget) | |
1499 | { | |
1500 | struct atl1e_adapter *adapter = | |
1501 | container_of(napi, struct atl1e_adapter, napi); | |
a6a53252 JY |
1502 | u32 imr_data; |
1503 | int work_done = 0; | |
1504 | ||
1505 | /* Keep link state information with original netdev */ | |
1506 | if (!netif_carrier_ok(adapter->netdev)) | |
1507 | goto quit_polling; | |
1508 | ||
1509 | atl1e_clean_rx_irq(adapter, 0, &work_done, budget); | |
1510 | ||
1511 | /* If no Tx and not enough Rx work done, exit the polling mode */ | |
1512 | if (work_done < budget) { | |
1513 | quit_polling: | |
288379f0 | 1514 | napi_complete(napi); |
a6a53252 JY |
1515 | imr_data = AT_READ_REG(&adapter->hw, REG_IMR); |
1516 | AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT); | |
1517 | /* test debug */ | |
1518 | if (test_bit(__AT_DOWN, &adapter->flags)) { | |
1519 | atomic_dec(&adapter->irq_sem); | |
ba211e3e JP |
1520 | netdev_err(adapter->netdev, |
1521 | "atl1e_clean is called when AT_DOWN\n"); | |
a6a53252 JY |
1522 | } |
1523 | /* reenable RX intr */ | |
1524 | /*atl1e_irq_enable(adapter); */ | |
1525 | ||
1526 | } | |
1527 | return work_done; | |
1528 | } | |
1529 | ||
1530 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1531 | ||
1532 | /* | |
1533 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
1534 | * without having to re-enable interrupts. It's not called while | |
1535 | * the interrupt routine is executing. | |
1536 | */ | |
1537 | static void atl1e_netpoll(struct net_device *netdev) | |
1538 | { | |
1539 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
1540 | ||
1541 | disable_irq(adapter->pdev->irq); | |
1542 | atl1e_intr(adapter->pdev->irq, netdev); | |
1543 | enable_irq(adapter->pdev->irq); | |
1544 | } | |
1545 | #endif | |
1546 | ||
1547 | static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter) | |
1548 | { | |
1549 | struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; | |
1550 | u16 next_to_use = 0; | |
1551 | u16 next_to_clean = 0; | |
1552 | ||
1553 | next_to_clean = atomic_read(&tx_ring->next_to_clean); | |
1554 | next_to_use = tx_ring->next_to_use; | |
1555 | ||
1556 | return (u16)(next_to_clean > next_to_use) ? | |
1557 | (next_to_clean - next_to_use - 1) : | |
1558 | (tx_ring->count + next_to_clean - next_to_use - 1); | |
1559 | } | |
1560 | ||
1561 | /* | |
1562 | * get next usable tpd | |
1563 | * Note: should call atl1e_tdp_avail to make sure | |
1564 | * there is enough tpd to use | |
1565 | */ | |
1566 | static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter) | |
1567 | { | |
1568 | struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; | |
1569 | u16 next_to_use = 0; | |
1570 | ||
1571 | next_to_use = tx_ring->next_to_use; | |
1572 | if (++tx_ring->next_to_use == tx_ring->count) | |
1573 | tx_ring->next_to_use = 0; | |
1574 | ||
1575 | memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc)); | |
1576 | return (struct atl1e_tpd_desc *)&tx_ring->desc[next_to_use]; | |
1577 | } | |
1578 | ||
1579 | static struct atl1e_tx_buffer * | |
1580 | atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd) | |
1581 | { | |
1582 | struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; | |
1583 | ||
1584 | return &tx_ring->tx_buffer[tpd - tx_ring->desc]; | |
1585 | } | |
1586 | ||
1587 | /* Calculate the transmit packet descript needed*/ | |
1588 | static u16 atl1e_cal_tdp_req(const struct sk_buff *skb) | |
1589 | { | |
1590 | int i = 0; | |
1591 | u16 tpd_req = 1; | |
1592 | u16 fg_size = 0; | |
1593 | u16 proto_hdr_len = 0; | |
1594 | ||
1595 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | |
1596 | fg_size = skb_shinfo(skb)->frags[i].size; | |
1597 | tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT); | |
1598 | } | |
1599 | ||
1600 | if (skb_is_gso(skb)) { | |
17d0cdfa | 1601 | if (skb->protocol == htons(ETH_P_IP) || |
a6a53252 JY |
1602 | (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) { |
1603 | proto_hdr_len = skb_transport_offset(skb) + | |
1604 | tcp_hdrlen(skb); | |
1605 | if (proto_hdr_len < skb_headlen(skb)) { | |
1606 | tpd_req += ((skb_headlen(skb) - proto_hdr_len + | |
1607 | MAX_TX_BUF_LEN - 1) >> | |
1608 | MAX_TX_BUF_SHIFT); | |
1609 | } | |
1610 | } | |
1611 | ||
1612 | } | |
1613 | return tpd_req; | |
1614 | } | |
1615 | ||
1616 | static int atl1e_tso_csum(struct atl1e_adapter *adapter, | |
1617 | struct sk_buff *skb, struct atl1e_tpd_desc *tpd) | |
1618 | { | |
a6a53252 JY |
1619 | u8 hdr_len; |
1620 | u32 real_len; | |
1621 | unsigned short offload_type; | |
1622 | int err; | |
1623 | ||
1624 | if (skb_is_gso(skb)) { | |
1625 | if (skb_header_cloned(skb)) { | |
1626 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
1627 | if (unlikely(err)) | |
1628 | return -1; | |
1629 | } | |
1630 | offload_type = skb_shinfo(skb)->gso_type; | |
1631 | ||
1632 | if (offload_type & SKB_GSO_TCPV4) { | |
1633 | real_len = (((unsigned char *)ip_hdr(skb) - skb->data) | |
1634 | + ntohs(ip_hdr(skb)->tot_len)); | |
1635 | ||
1636 | if (real_len < skb->len) | |
1637 | pskb_trim(skb, real_len); | |
1638 | ||
1639 | hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); | |
1640 | if (unlikely(skb->len == hdr_len)) { | |
1641 | /* only xsum need */ | |
ba211e3e JP |
1642 | netdev_warn(adapter->netdev, |
1643 | "IPV4 tso with zero data??\n"); | |
a6a53252 JY |
1644 | goto check_sum; |
1645 | } else { | |
1646 | ip_hdr(skb)->check = 0; | |
1647 | ip_hdr(skb)->tot_len = 0; | |
1648 | tcp_hdr(skb)->check = ~csum_tcpudp_magic( | |
1649 | ip_hdr(skb)->saddr, | |
1650 | ip_hdr(skb)->daddr, | |
1651 | 0, IPPROTO_TCP, 0); | |
1652 | tpd->word3 |= (ip_hdr(skb)->ihl & | |
1653 | TDP_V4_IPHL_MASK) << | |
1654 | TPD_V4_IPHL_SHIFT; | |
1655 | tpd->word3 |= ((tcp_hdrlen(skb) >> 2) & | |
1656 | TPD_TCPHDRLEN_MASK) << | |
1657 | TPD_TCPHDRLEN_SHIFT; | |
1658 | tpd->word3 |= ((skb_shinfo(skb)->gso_size) & | |
1659 | TPD_MSS_MASK) << TPD_MSS_SHIFT; | |
1660 | tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT; | |
1661 | } | |
1662 | return 0; | |
1663 | } | |
a6a53252 JY |
1664 | } |
1665 | ||
1666 | check_sum: | |
1667 | if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { | |
1668 | u8 css, cso; | |
1669 | ||
0d0b1672 | 1670 | cso = skb_checksum_start_offset(skb); |
a6a53252 | 1671 | if (unlikely(cso & 0x1)) { |
ba211e3e JP |
1672 | netdev_err(adapter->netdev, |
1673 | "payload offset should not ant event number\n"); | |
a6a53252 JY |
1674 | return -1; |
1675 | } else { | |
1676 | css = cso + skb->csum_offset; | |
1677 | tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) << | |
1678 | TPD_PLOADOFFSET_SHIFT; | |
1679 | tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) << | |
1680 | TPD_CCSUMOFFSET_SHIFT; | |
1681 | tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT; | |
1682 | } | |
1683 | } | |
1684 | ||
1685 | return 0; | |
1686 | } | |
1687 | ||
1688 | static void atl1e_tx_map(struct atl1e_adapter *adapter, | |
1689 | struct sk_buff *skb, struct atl1e_tpd_desc *tpd) | |
1690 | { | |
1691 | struct atl1e_tpd_desc *use_tpd = NULL; | |
1692 | struct atl1e_tx_buffer *tx_buffer = NULL; | |
e743d313 | 1693 | u16 buf_len = skb_headlen(skb); |
a6a53252 JY |
1694 | u16 map_len = 0; |
1695 | u16 mapped_len = 0; | |
1696 | u16 hdr_len = 0; | |
1697 | u16 nr_frags; | |
1698 | u16 f; | |
1699 | int segment; | |
1700 | ||
1701 | nr_frags = skb_shinfo(skb)->nr_frags; | |
1702 | segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK; | |
1703 | if (segment) { | |
1704 | /* TSO */ | |
1705 | map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); | |
1706 | use_tpd = tpd; | |
1707 | ||
1708 | tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); | |
1709 | tx_buffer->length = map_len; | |
1710 | tx_buffer->dma = pci_map_single(adapter->pdev, | |
1711 | skb->data, hdr_len, PCI_DMA_TODEVICE); | |
03f18991 | 1712 | ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); |
a6a53252 JY |
1713 | mapped_len += map_len; |
1714 | use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); | |
1715 | use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | | |
1716 | ((cpu_to_le32(tx_buffer->length) & | |
1717 | TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); | |
1718 | } | |
1719 | ||
1720 | while (mapped_len < buf_len) { | |
1721 | /* mapped_len == 0, means we should use the first tpd, | |
1722 | which is given by caller */ | |
1723 | if (mapped_len == 0) { | |
1724 | use_tpd = tpd; | |
1725 | } else { | |
1726 | use_tpd = atl1e_get_tpd(adapter); | |
1727 | memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); | |
1728 | } | |
1729 | tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); | |
1730 | tx_buffer->skb = NULL; | |
1731 | ||
1732 | tx_buffer->length = map_len = | |
1733 | ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ? | |
1734 | MAX_TX_BUF_LEN : (buf_len - mapped_len); | |
1735 | tx_buffer->dma = | |
1736 | pci_map_single(adapter->pdev, skb->data + mapped_len, | |
1737 | map_len, PCI_DMA_TODEVICE); | |
03f18991 | 1738 | ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); |
a6a53252 JY |
1739 | mapped_len += map_len; |
1740 | use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); | |
1741 | use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | | |
1742 | ((cpu_to_le32(tx_buffer->length) & | |
1743 | TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); | |
1744 | } | |
1745 | ||
1746 | for (f = 0; f < nr_frags; f++) { | |
1747 | struct skb_frag_struct *frag; | |
1748 | u16 i; | |
1749 | u16 seg_num; | |
1750 | ||
1751 | frag = &skb_shinfo(skb)->frags[f]; | |
1752 | buf_len = frag->size; | |
1753 | ||
1754 | seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN; | |
1755 | for (i = 0; i < seg_num; i++) { | |
1756 | use_tpd = atl1e_get_tpd(adapter); | |
1757 | memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); | |
1758 | ||
1759 | tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); | |
0ee904c3 | 1760 | BUG_ON(tx_buffer->skb); |
a6a53252 JY |
1761 | |
1762 | tx_buffer->skb = NULL; | |
1763 | tx_buffer->length = | |
1764 | (buf_len > MAX_TX_BUF_LEN) ? | |
1765 | MAX_TX_BUF_LEN : buf_len; | |
1766 | buf_len -= tx_buffer->length; | |
1767 | ||
1768 | tx_buffer->dma = | |
1769 | pci_map_page(adapter->pdev, frag->page, | |
1770 | frag->page_offset + | |
1771 | (i * MAX_TX_BUF_LEN), | |
1772 | tx_buffer->length, | |
1773 | PCI_DMA_TODEVICE); | |
03f18991 | 1774 | ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE); |
a6a53252 JY |
1775 | use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); |
1776 | use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | | |
1777 | ((cpu_to_le32(tx_buffer->length) & | |
1778 | TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); | |
1779 | } | |
1780 | } | |
1781 | ||
1782 | if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK) | |
1783 | /* note this one is a tcp header */ | |
1784 | tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT; | |
1785 | /* The last tpd */ | |
1786 | ||
1787 | use_tpd->word3 |= 1 << TPD_EOP_SHIFT; | |
1788 | /* The last buffer info contain the skb address, | |
1789 | so it will be free after unmap */ | |
1790 | tx_buffer->skb = skb; | |
1791 | } | |
1792 | ||
1793 | static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count, | |
1794 | struct atl1e_tpd_desc *tpd) | |
1795 | { | |
1796 | struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; | |
1797 | /* Force memory writes to complete before letting h/w | |
1798 | * know there are new descriptors to fetch. (Only | |
1799 | * applicable for weak-ordered memory model archs, | |
1800 | * such as IA-64). */ | |
1801 | wmb(); | |
1802 | AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use); | |
1803 | } | |
1804 | ||
61357325 SH |
1805 | static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb, |
1806 | struct net_device *netdev) | |
a6a53252 JY |
1807 | { |
1808 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
1809 | unsigned long flags; | |
1810 | u16 tpd_req = 1; | |
1811 | struct atl1e_tpd_desc *tpd; | |
1812 | ||
1813 | if (test_bit(__AT_DOWN, &adapter->flags)) { | |
1814 | dev_kfree_skb_any(skb); | |
1815 | return NETDEV_TX_OK; | |
1816 | } | |
1817 | ||
1818 | if (unlikely(skb->len <= 0)) { | |
1819 | dev_kfree_skb_any(skb); | |
1820 | return NETDEV_TX_OK; | |
1821 | } | |
1822 | tpd_req = atl1e_cal_tdp_req(skb); | |
1823 | if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) | |
1824 | return NETDEV_TX_LOCKED; | |
1825 | ||
1826 | if (atl1e_tpd_avail(adapter) < tpd_req) { | |
1827 | /* no enough descriptor, just stop queue */ | |
1828 | netif_stop_queue(netdev); | |
1829 | spin_unlock_irqrestore(&adapter->tx_lock, flags); | |
1830 | return NETDEV_TX_BUSY; | |
1831 | } | |
1832 | ||
1833 | tpd = atl1e_get_tpd(adapter); | |
1834 | ||
2707fffc | 1835 | if (vlan_tx_tag_present(skb)) { |
a6a53252 JY |
1836 | u16 vlan_tag = vlan_tx_tag_get(skb); |
1837 | u16 atl1e_vlan_tag; | |
1838 | ||
1839 | tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT; | |
1840 | AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag); | |
1841 | tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) << | |
1842 | TPD_VLAN_SHIFT; | |
1843 | } | |
1844 | ||
17d0cdfa | 1845 | if (skb->protocol == htons(ETH_P_8021Q)) |
a6a53252 JY |
1846 | tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT; |
1847 | ||
1848 | if (skb_network_offset(skb) != ETH_HLEN) | |
1849 | tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */ | |
1850 | ||
1851 | /* do TSO and check sum */ | |
1852 | if (atl1e_tso_csum(adapter, skb, tpd) != 0) { | |
1853 | spin_unlock_irqrestore(&adapter->tx_lock, flags); | |
1854 | dev_kfree_skb_any(skb); | |
1855 | return NETDEV_TX_OK; | |
1856 | } | |
1857 | ||
1858 | atl1e_tx_map(adapter, skb, tpd); | |
1859 | atl1e_tx_queue(adapter, tpd_req, tpd); | |
1860 | ||
cdd0db05 | 1861 | netdev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */ |
a6a53252 JY |
1862 | spin_unlock_irqrestore(&adapter->tx_lock, flags); |
1863 | return NETDEV_TX_OK; | |
1864 | } | |
1865 | ||
1866 | static void atl1e_free_irq(struct atl1e_adapter *adapter) | |
1867 | { | |
1868 | struct net_device *netdev = adapter->netdev; | |
1869 | ||
1870 | free_irq(adapter->pdev->irq, netdev); | |
1871 | ||
1872 | if (adapter->have_msi) | |
1873 | pci_disable_msi(adapter->pdev); | |
1874 | } | |
1875 | ||
1876 | static int atl1e_request_irq(struct atl1e_adapter *adapter) | |
1877 | { | |
1878 | struct pci_dev *pdev = adapter->pdev; | |
1879 | struct net_device *netdev = adapter->netdev; | |
1880 | int flags = 0; | |
1881 | int err = 0; | |
1882 | ||
1883 | adapter->have_msi = true; | |
1884 | err = pci_enable_msi(adapter->pdev); | |
1885 | if (err) { | |
ba211e3e JP |
1886 | netdev_dbg(adapter->netdev, |
1887 | "Unable to allocate MSI interrupt Error: %d\n", err); | |
a6a53252 JY |
1888 | adapter->have_msi = false; |
1889 | } else | |
1890 | netdev->irq = pdev->irq; | |
1891 | ||
1892 | ||
1893 | if (!adapter->have_msi) | |
1894 | flags |= IRQF_SHARED; | |
a0607fd3 | 1895 | err = request_irq(adapter->pdev->irq, atl1e_intr, flags, |
a6a53252 JY |
1896 | netdev->name, netdev); |
1897 | if (err) { | |
ba211e3e JP |
1898 | netdev_dbg(adapter->netdev, |
1899 | "Unable to allocate interrupt Error: %d\n", err); | |
a6a53252 JY |
1900 | if (adapter->have_msi) |
1901 | pci_disable_msi(adapter->pdev); | |
1902 | return err; | |
1903 | } | |
ba211e3e | 1904 | netdev_dbg(adapter->netdev, "atl1e_request_irq OK\n"); |
a6a53252 JY |
1905 | return err; |
1906 | } | |
1907 | ||
1908 | int atl1e_up(struct atl1e_adapter *adapter) | |
1909 | { | |
1910 | struct net_device *netdev = adapter->netdev; | |
1911 | int err = 0; | |
1912 | u32 val; | |
1913 | ||
1914 | /* hardware has been reset, we need to reload some things */ | |
1915 | err = atl1e_init_hw(&adapter->hw); | |
1916 | if (err) { | |
1917 | err = -EIO; | |
1918 | return err; | |
1919 | } | |
1920 | atl1e_init_ring_ptrs(adapter); | |
1921 | atl1e_set_multi(netdev); | |
1922 | atl1e_restore_vlan(adapter); | |
1923 | ||
1924 | if (atl1e_configure(adapter)) { | |
1925 | err = -EIO; | |
1926 | goto err_up; | |
1927 | } | |
1928 | ||
1929 | clear_bit(__AT_DOWN, &adapter->flags); | |
1930 | napi_enable(&adapter->napi); | |
1931 | atl1e_irq_enable(adapter); | |
1932 | val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL); | |
1933 | AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, | |
1934 | val | MASTER_CTRL_MANUAL_INT); | |
1935 | ||
1936 | err_up: | |
1937 | return err; | |
1938 | } | |
1939 | ||
1940 | void atl1e_down(struct atl1e_adapter *adapter) | |
1941 | { | |
1942 | struct net_device *netdev = adapter->netdev; | |
1943 | ||
1944 | /* signal that we're down so the interrupt handler does not | |
1945 | * reschedule our watchdog timer */ | |
1946 | set_bit(__AT_DOWN, &adapter->flags); | |
1947 | ||
a6a53252 | 1948 | netif_stop_queue(netdev); |
a6a53252 JY |
1949 | |
1950 | /* reset MAC to disable all RX/TX */ | |
1951 | atl1e_reset_hw(&adapter->hw); | |
1952 | msleep(1); | |
1953 | ||
1954 | napi_disable(&adapter->napi); | |
1955 | atl1e_del_timer(adapter); | |
1956 | atl1e_irq_disable(adapter); | |
1957 | ||
1958 | netif_carrier_off(netdev); | |
1959 | adapter->link_speed = SPEED_0; | |
1960 | adapter->link_duplex = -1; | |
1961 | atl1e_clean_tx_ring(adapter); | |
1962 | atl1e_clean_rx_ring(adapter); | |
1963 | } | |
1964 | ||
1965 | /* | |
1966 | * atl1e_open - Called when a network interface is made active | |
1967 | * @netdev: network interface device structure | |
1968 | * | |
1969 | * Returns 0 on success, negative value on failure | |
1970 | * | |
1971 | * The open entry point is called when a network interface is made | |
1972 | * active by the system (IFF_UP). At this point all resources needed | |
1973 | * for transmit and receive operations are allocated, the interrupt | |
1974 | * handler is registered with the OS, the watchdog timer is started, | |
1975 | * and the stack is notified that the interface is ready. | |
1976 | */ | |
1977 | static int atl1e_open(struct net_device *netdev) | |
1978 | { | |
1979 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
1980 | int err; | |
1981 | ||
1982 | /* disallow open during test */ | |
1983 | if (test_bit(__AT_TESTING, &adapter->flags)) | |
1984 | return -EBUSY; | |
1985 | ||
1986 | /* allocate rx/tx dma buffer & descriptors */ | |
1987 | atl1e_init_ring_resources(adapter); | |
1988 | err = atl1e_setup_ring_resources(adapter); | |
1989 | if (unlikely(err)) | |
1990 | return err; | |
1991 | ||
1992 | err = atl1e_request_irq(adapter); | |
1993 | if (unlikely(err)) | |
1994 | goto err_req_irq; | |
1995 | ||
1996 | err = atl1e_up(adapter); | |
1997 | if (unlikely(err)) | |
1998 | goto err_up; | |
1999 | ||
2000 | return 0; | |
2001 | ||
2002 | err_up: | |
2003 | atl1e_free_irq(adapter); | |
2004 | err_req_irq: | |
2005 | atl1e_free_ring_resources(adapter); | |
2006 | atl1e_reset_hw(&adapter->hw); | |
2007 | ||
2008 | return err; | |
2009 | } | |
2010 | ||
2011 | /* | |
2012 | * atl1e_close - Disables a network interface | |
2013 | * @netdev: network interface device structure | |
2014 | * | |
2015 | * Returns 0, this is not allowed to fail | |
2016 | * | |
2017 | * The close entry point is called when an interface is de-activated | |
2018 | * by the OS. The hardware is still under the drivers control, but | |
2019 | * needs to be disabled. A global MAC reset is issued to stop the | |
2020 | * hardware, and all transmit and receive resources are freed. | |
2021 | */ | |
2022 | static int atl1e_close(struct net_device *netdev) | |
2023 | { | |
2024 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
2025 | ||
2026 | WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); | |
2027 | atl1e_down(adapter); | |
2028 | atl1e_free_irq(adapter); | |
2029 | atl1e_free_ring_resources(adapter); | |
2030 | ||
2031 | return 0; | |
2032 | } | |
2033 | ||
a6a53252 JY |
2034 | static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state) |
2035 | { | |
2036 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2037 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
2038 | struct atl1e_hw *hw = &adapter->hw; | |
2039 | u32 ctrl = 0; | |
2040 | u32 mac_ctrl_data = 0; | |
2041 | u32 wol_ctrl_data = 0; | |
2042 | u16 mii_advertise_data = 0; | |
2043 | u16 mii_bmsr_data = 0; | |
2044 | u16 mii_intr_status_data = 0; | |
2045 | u32 wufc = adapter->wol; | |
2046 | u32 i; | |
2047 | #ifdef CONFIG_PM | |
2048 | int retval = 0; | |
2049 | #endif | |
2050 | ||
2051 | if (netif_running(netdev)) { | |
2052 | WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); | |
2053 | atl1e_down(adapter); | |
2054 | } | |
2055 | netif_device_detach(netdev); | |
2056 | ||
2057 | #ifdef CONFIG_PM | |
2058 | retval = pci_save_state(pdev); | |
2059 | if (retval) | |
2060 | return retval; | |
2061 | #endif | |
2062 | ||
2063 | if (wufc) { | |
2064 | /* get link status */ | |
2065 | atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data); | |
2066 | atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data); | |
2067 | ||
ccd5c8ef | 2068 | mii_advertise_data = ADVERTISE_10HALF; |
a6a53252 | 2069 | |
ccd5c8ef | 2070 | if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) || |
a6a53252 JY |
2071 | (atl1e_write_phy_reg(hw, |
2072 | MII_ADVERTISE, mii_advertise_data) != 0) || | |
2073 | (atl1e_phy_commit(hw)) != 0) { | |
ba211e3e | 2074 | netdev_dbg(adapter->netdev, "set phy register failed\n"); |
a6a53252 JY |
2075 | goto wol_dis; |
2076 | } | |
2077 | ||
2078 | hw->phy_configured = false; /* re-init PHY when resume */ | |
2079 | ||
2080 | /* turn on magic packet wol */ | |
2081 | if (wufc & AT_WUFC_MAG) | |
2082 | wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN; | |
2083 | ||
2084 | if (wufc & AT_WUFC_LNKC) { | |
2085 | /* if orignal link status is link, just wait for retrive link */ | |
2086 | if (mii_bmsr_data & BMSR_LSTATUS) { | |
2087 | for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) { | |
2088 | msleep(100); | |
2089 | atl1e_read_phy_reg(hw, MII_BMSR, | |
2090 | (u16 *)&mii_bmsr_data); | |
2091 | if (mii_bmsr_data & BMSR_LSTATUS) | |
2092 | break; | |
2093 | } | |
2094 | ||
2095 | if ((mii_bmsr_data & BMSR_LSTATUS) == 0) | |
ba211e3e JP |
2096 | netdev_dbg(adapter->netdev, |
2097 | "Link may change when suspend\n"); | |
a6a53252 JY |
2098 | } |
2099 | wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; | |
2100 | /* only link up can wake up */ | |
2101 | if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) { | |
ba211e3e JP |
2102 | netdev_dbg(adapter->netdev, |
2103 | "read write phy register failed\n"); | |
a6a53252 JY |
2104 | goto wol_dis; |
2105 | } | |
2106 | } | |
2107 | /* clear phy interrupt */ | |
2108 | atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data); | |
2109 | /* Config MAC Ctrl register */ | |
2110 | mac_ctrl_data = MAC_CTRL_RX_EN; | |
2111 | /* set to 10/100M halt duplex */ | |
2112 | mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT; | |
2113 | mac_ctrl_data |= (((u32)adapter->hw.preamble_len & | |
2114 | MAC_CTRL_PRMLEN_MASK) << | |
2115 | MAC_CTRL_PRMLEN_SHIFT); | |
2116 | ||
2707fffc | 2117 | __atl1e_vlan_mode(netdev->features, &mac_ctrl_data); |
a6a53252 JY |
2118 | |
2119 | /* magic packet maybe Broadcast&multicast&Unicast frame */ | |
2120 | if (wufc & AT_WUFC_MAG) | |
2121 | mac_ctrl_data |= MAC_CTRL_BC_EN; | |
2122 | ||
ba211e3e JP |
2123 | netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n", |
2124 | mac_ctrl_data); | |
a6a53252 JY |
2125 | |
2126 | AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); | |
2127 | AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); | |
2128 | /* pcie patch */ | |
2129 | ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); | |
2130 | ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; | |
2131 | AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); | |
2132 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); | |
2133 | goto suspend_exit; | |
2134 | } | |
2135 | wol_dis: | |
2136 | ||
2137 | /* WOL disabled */ | |
2138 | AT_WRITE_REG(hw, REG_WOL_CTRL, 0); | |
2139 | ||
2140 | /* pcie patch */ | |
2141 | ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); | |
2142 | ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; | |
2143 | AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); | |
2144 | ||
2145 | atl1e_force_ps(hw); | |
2146 | hw->phy_configured = false; /* re-init PHY when resume */ | |
2147 | ||
2148 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); | |
2149 | ||
2150 | suspend_exit: | |
2151 | ||
2152 | if (netif_running(netdev)) | |
2153 | atl1e_free_irq(adapter); | |
2154 | ||
2155 | pci_disable_device(pdev); | |
2156 | ||
2157 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
2158 | ||
2159 | return 0; | |
2160 | } | |
2161 | ||
d6f8aa85 | 2162 | #ifdef CONFIG_PM |
a6a53252 JY |
2163 | static int atl1e_resume(struct pci_dev *pdev) |
2164 | { | |
2165 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2166 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
2167 | u32 err; | |
2168 | ||
2169 | pci_set_power_state(pdev, PCI_D0); | |
2170 | pci_restore_state(pdev); | |
2171 | ||
2172 | err = pci_enable_device(pdev); | |
2173 | if (err) { | |
ba211e3e JP |
2174 | netdev_err(adapter->netdev, |
2175 | "Cannot enable PCI device from suspend\n"); | |
a6a53252 JY |
2176 | return err; |
2177 | } | |
2178 | ||
2179 | pci_set_master(pdev); | |
2180 | ||
2181 | AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */ | |
2182 | ||
2183 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
2184 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
2185 | ||
2186 | AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); | |
2187 | ||
50f684b9 | 2188 | if (netif_running(netdev)) { |
a6a53252 JY |
2189 | err = atl1e_request_irq(adapter); |
2190 | if (err) | |
2191 | return err; | |
50f684b9 | 2192 | } |
a6a53252 JY |
2193 | |
2194 | atl1e_reset_hw(&adapter->hw); | |
2195 | ||
2196 | if (netif_running(netdev)) | |
2197 | atl1e_up(adapter); | |
2198 | ||
2199 | netif_device_attach(netdev); | |
2200 | ||
2201 | return 0; | |
2202 | } | |
2203 | #endif | |
2204 | ||
2205 | static void atl1e_shutdown(struct pci_dev *pdev) | |
2206 | { | |
2207 | atl1e_suspend(pdev, PMSG_SUSPEND); | |
2208 | } | |
2209 | ||
1e058ab5 SH |
2210 | static const struct net_device_ops atl1e_netdev_ops = { |
2211 | .ndo_open = atl1e_open, | |
2212 | .ndo_stop = atl1e_close, | |
00829823 | 2213 | .ndo_start_xmit = atl1e_xmit_frame, |
1e058ab5 SH |
2214 | .ndo_get_stats = atl1e_get_stats, |
2215 | .ndo_set_multicast_list = atl1e_set_multi, | |
2216 | .ndo_validate_addr = eth_validate_addr, | |
2217 | .ndo_set_mac_address = atl1e_set_mac_addr, | |
2707fffc JP |
2218 | .ndo_fix_features = atl1e_fix_features, |
2219 | .ndo_set_features = atl1e_set_features, | |
1e058ab5 SH |
2220 | .ndo_change_mtu = atl1e_change_mtu, |
2221 | .ndo_do_ioctl = atl1e_ioctl, | |
2222 | .ndo_tx_timeout = atl1e_tx_timeout, | |
1e058ab5 SH |
2223 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2224 | .ndo_poll_controller = atl1e_netpoll, | |
2225 | #endif | |
2226 | ||
2227 | }; | |
2228 | ||
a6a53252 JY |
2229 | static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev) |
2230 | { | |
2231 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
2232 | pci_set_drvdata(pdev, netdev); | |
2233 | ||
2234 | netdev->irq = pdev->irq; | |
1e058ab5 | 2235 | netdev->netdev_ops = &atl1e_netdev_ops; |
00829823 | 2236 | |
a6a53252 | 2237 | netdev->watchdog_timeo = AT_TX_WATCHDOG; |
a6a53252 JY |
2238 | atl1e_set_ethtool_ops(netdev); |
2239 | ||
782d640a | 2240 | netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO | |
2707fffc JP |
2241 | NETIF_F_HW_VLAN_RX; |
2242 | netdev->features = netdev->hw_features | NETIF_F_LLTX | | |
2243 | NETIF_F_HW_VLAN_TX; | |
a6a53252 JY |
2244 | |
2245 | return 0; | |
2246 | } | |
2247 | ||
2248 | /* | |
2249 | * atl1e_probe - Device Initialization Routine | |
2250 | * @pdev: PCI device information struct | |
2251 | * @ent: entry in atl1e_pci_tbl | |
2252 | * | |
2253 | * Returns 0 on success, negative on failure | |
2254 | * | |
2255 | * atl1e_probe initializes an adapter identified by a pci_dev structure. | |
2256 | * The OS initialization, configuring of the adapter private structure, | |
2257 | * and a hardware reset occur. | |
2258 | */ | |
2259 | static int __devinit atl1e_probe(struct pci_dev *pdev, | |
2260 | const struct pci_device_id *ent) | |
2261 | { | |
2262 | struct net_device *netdev; | |
2263 | struct atl1e_adapter *adapter = NULL; | |
2264 | static int cards_found; | |
2265 | ||
2266 | int err = 0; | |
2267 | ||
2268 | err = pci_enable_device(pdev); | |
2269 | if (err) { | |
2270 | dev_err(&pdev->dev, "cannot enable PCI device\n"); | |
2271 | return err; | |
2272 | } | |
2273 | ||
2274 | /* | |
2275 | * The atl1e chip can DMA to 64-bit addresses, but it uses a single | |
2276 | * shared register for the high 32 bits, so only a single, aligned, | |
2277 | * 4 GB physical address range can be used at a time. | |
2278 | * | |
2279 | * Supporting 64-bit DMA on this hardware is more trouble than it's | |
2280 | * worth. It is far easier to limit to 32-bit DMA than update | |
2281 | * various kernel subsystems to support the mechanics required by a | |
2282 | * fixed-high-32-bit system. | |
2283 | */ | |
284901a9 YH |
2284 | if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || |
2285 | (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { | |
a6a53252 JY |
2286 | dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); |
2287 | goto err_dma; | |
2288 | } | |
2289 | ||
2290 | err = pci_request_regions(pdev, atl1e_driver_name); | |
2291 | if (err) { | |
2292 | dev_err(&pdev->dev, "cannot obtain PCI resources\n"); | |
2293 | goto err_pci_reg; | |
2294 | } | |
2295 | ||
2296 | pci_set_master(pdev); | |
2297 | ||
2298 | netdev = alloc_etherdev(sizeof(struct atl1e_adapter)); | |
2299 | if (netdev == NULL) { | |
2300 | err = -ENOMEM; | |
2301 | dev_err(&pdev->dev, "etherdev alloc failed\n"); | |
2302 | goto err_alloc_etherdev; | |
2303 | } | |
2304 | ||
2305 | err = atl1e_init_netdev(netdev, pdev); | |
2306 | if (err) { | |
ba211e3e | 2307 | netdev_err(netdev, "init netdevice failed\n"); |
a6a53252 JY |
2308 | goto err_init_netdev; |
2309 | } | |
2310 | adapter = netdev_priv(netdev); | |
2311 | adapter->bd_number = cards_found; | |
2312 | adapter->netdev = netdev; | |
2313 | adapter->pdev = pdev; | |
2314 | adapter->hw.adapter = adapter; | |
2315 | adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0); | |
2316 | if (!adapter->hw.hw_addr) { | |
2317 | err = -EIO; | |
ba211e3e | 2318 | netdev_err(netdev, "cannot map device registers\n"); |
a6a53252 JY |
2319 | goto err_ioremap; |
2320 | } | |
2321 | netdev->base_addr = (unsigned long)adapter->hw.hw_addr; | |
2322 | ||
2323 | /* init mii data */ | |
2324 | adapter->mii.dev = netdev; | |
2325 | adapter->mii.mdio_read = atl1e_mdio_read; | |
2326 | adapter->mii.mdio_write = atl1e_mdio_write; | |
2327 | adapter->mii.phy_id_mask = 0x1f; | |
2328 | adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; | |
2329 | ||
2330 | netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64); | |
2331 | ||
2332 | init_timer(&adapter->phy_config_timer); | |
c061b18d | 2333 | adapter->phy_config_timer.function = atl1e_phy_config; |
a6a53252 JY |
2334 | adapter->phy_config_timer.data = (unsigned long) adapter; |
2335 | ||
2336 | /* get user settings */ | |
2337 | atl1e_check_options(adapter); | |
2338 | /* | |
2339 | * Mark all PCI regions associated with PCI device | |
2340 | * pdev as being reserved by owner atl1e_driver_name | |
2341 | * Enables bus-mastering on the device and calls | |
2342 | * pcibios_set_master to do the needed arch specific settings | |
2343 | */ | |
2344 | atl1e_setup_pcicmd(pdev); | |
2345 | /* setup the private structure */ | |
2346 | err = atl1e_sw_init(adapter); | |
2347 | if (err) { | |
ba211e3e | 2348 | netdev_err(netdev, "net device private data init failed\n"); |
a6a53252 JY |
2349 | goto err_sw_init; |
2350 | } | |
2351 | ||
2352 | /* Init GPHY as early as possible due to power saving issue */ | |
a6a53252 | 2353 | atl1e_phy_init(&adapter->hw); |
a6a53252 JY |
2354 | /* reset the controller to |
2355 | * put the device in a known good starting state */ | |
2356 | err = atl1e_reset_hw(&adapter->hw); | |
2357 | if (err) { | |
2358 | err = -EIO; | |
2359 | goto err_reset; | |
2360 | } | |
2361 | ||
2362 | if (atl1e_read_mac_addr(&adapter->hw) != 0) { | |
2363 | err = -EIO; | |
ba211e3e | 2364 | netdev_err(netdev, "get mac address failed\n"); |
a6a53252 JY |
2365 | goto err_eeprom; |
2366 | } | |
2367 | ||
2368 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
2369 | memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); | |
ba211e3e | 2370 | netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr); |
a6a53252 JY |
2371 | |
2372 | INIT_WORK(&adapter->reset_task, atl1e_reset_task); | |
2373 | INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task); | |
2374 | err = register_netdev(netdev); | |
2375 | if (err) { | |
ba211e3e | 2376 | netdev_err(netdev, "register netdevice failed\n"); |
a6a53252 JY |
2377 | goto err_register; |
2378 | } | |
2379 | ||
2380 | /* assume we have no link for now */ | |
2381 | netif_stop_queue(netdev); | |
2382 | netif_carrier_off(netdev); | |
2383 | ||
2384 | cards_found++; | |
2385 | ||
2386 | return 0; | |
2387 | ||
2388 | err_reset: | |
2389 | err_register: | |
2390 | err_sw_init: | |
2391 | err_eeprom: | |
2392 | iounmap(adapter->hw.hw_addr); | |
2393 | err_init_netdev: | |
2394 | err_ioremap: | |
2395 | free_netdev(netdev); | |
2396 | err_alloc_etherdev: | |
2397 | pci_release_regions(pdev); | |
2398 | err_pci_reg: | |
2399 | err_dma: | |
2400 | pci_disable_device(pdev); | |
2401 | return err; | |
2402 | } | |
2403 | ||
2404 | /* | |
2405 | * atl1e_remove - Device Removal Routine | |
2406 | * @pdev: PCI device information struct | |
2407 | * | |
2408 | * atl1e_remove is called by the PCI subsystem to alert the driver | |
2409 | * that it should release a PCI device. The could be caused by a | |
2410 | * Hot-Plug event, or because the driver is going to be removed from | |
2411 | * memory. | |
2412 | */ | |
2413 | static void __devexit atl1e_remove(struct pci_dev *pdev) | |
2414 | { | |
2415 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2416 | struct atl1e_adapter *adapter = netdev_priv(netdev); | |
2417 | ||
2418 | /* | |
2419 | * flush_scheduled work may reschedule our watchdog task, so | |
2420 | * explicitly disable watchdog tasks from being rescheduled | |
2421 | */ | |
2422 | set_bit(__AT_DOWN, &adapter->flags); | |
2423 | ||
2424 | atl1e_del_timer(adapter); | |
2425 | atl1e_cancel_work(adapter); | |
2426 | ||
2427 | unregister_netdev(netdev); | |
2428 | atl1e_free_ring_resources(adapter); | |
2429 | atl1e_force_ps(&adapter->hw); | |
2430 | iounmap(adapter->hw.hw_addr); | |
2431 | pci_release_regions(pdev); | |
2432 | free_netdev(netdev); | |
2433 | pci_disable_device(pdev); | |
2434 | } | |
2435 | ||
2436 | /* | |
2437 | * atl1e_io_error_detected - called when PCI error is detected | |
2438 | * @pdev: Pointer to PCI device | |
2439 | * @state: The current pci connection state | |
2440 | * | |
2441 | * This function is called after a PCI bus error affecting | |
2442 | * this device has been detected. | |
2443 | */ | |
2444 | static pci_ers_result_t | |
2445 | atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |
2446 | { | |
2447 | struct net_device *netdev = pci_get_drvdata(pdev); | |
454d7c9b | 2448 | struct atl1e_adapter *adapter = netdev_priv(netdev); |
a6a53252 JY |
2449 | |
2450 | netif_device_detach(netdev); | |
2451 | ||
0d6ab58d DN |
2452 | if (state == pci_channel_io_perm_failure) |
2453 | return PCI_ERS_RESULT_DISCONNECT; | |
2454 | ||
a6a53252 JY |
2455 | if (netif_running(netdev)) |
2456 | atl1e_down(adapter); | |
2457 | ||
2458 | pci_disable_device(pdev); | |
2459 | ||
2460 | /* Request a slot slot reset. */ | |
2461 | return PCI_ERS_RESULT_NEED_RESET; | |
2462 | } | |
2463 | ||
2464 | /* | |
2465 | * atl1e_io_slot_reset - called after the pci bus has been reset. | |
2466 | * @pdev: Pointer to PCI device | |
2467 | * | |
2468 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
2469 | * resembles the first-half of the e1000_resume routine. | |
2470 | */ | |
2471 | static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev) | |
2472 | { | |
2473 | struct net_device *netdev = pci_get_drvdata(pdev); | |
454d7c9b | 2474 | struct atl1e_adapter *adapter = netdev_priv(netdev); |
a6a53252 JY |
2475 | |
2476 | if (pci_enable_device(pdev)) { | |
ba211e3e JP |
2477 | netdev_err(adapter->netdev, |
2478 | "Cannot re-enable PCI device after reset\n"); | |
a6a53252 JY |
2479 | return PCI_ERS_RESULT_DISCONNECT; |
2480 | } | |
2481 | pci_set_master(pdev); | |
2482 | ||
2483 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
2484 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
2485 | ||
2486 | atl1e_reset_hw(&adapter->hw); | |
2487 | ||
2488 | return PCI_ERS_RESULT_RECOVERED; | |
2489 | } | |
2490 | ||
2491 | /* | |
2492 | * atl1e_io_resume - called when traffic can start flowing again. | |
2493 | * @pdev: Pointer to PCI device | |
2494 | * | |
2495 | * This callback is called when the error recovery driver tells us that | |
2496 | * its OK to resume normal operation. Implementation resembles the | |
2497 | * second-half of the atl1e_resume routine. | |
2498 | */ | |
2499 | static void atl1e_io_resume(struct pci_dev *pdev) | |
2500 | { | |
2501 | struct net_device *netdev = pci_get_drvdata(pdev); | |
454d7c9b | 2502 | struct atl1e_adapter *adapter = netdev_priv(netdev); |
a6a53252 JY |
2503 | |
2504 | if (netif_running(netdev)) { | |
2505 | if (atl1e_up(adapter)) { | |
ba211e3e JP |
2506 | netdev_err(adapter->netdev, |
2507 | "can't bring device back up after reset\n"); | |
a6a53252 JY |
2508 | return; |
2509 | } | |
2510 | } | |
2511 | ||
2512 | netif_device_attach(netdev); | |
2513 | } | |
2514 | ||
2515 | static struct pci_error_handlers atl1e_err_handler = { | |
2516 | .error_detected = atl1e_io_error_detected, | |
2517 | .slot_reset = atl1e_io_slot_reset, | |
2518 | .resume = atl1e_io_resume, | |
2519 | }; | |
2520 | ||
2521 | static struct pci_driver atl1e_driver = { | |
2522 | .name = atl1e_driver_name, | |
2523 | .id_table = atl1e_pci_tbl, | |
2524 | .probe = atl1e_probe, | |
2525 | .remove = __devexit_p(atl1e_remove), | |
25985edc | 2526 | /* Power Management Hooks */ |
a6a53252 JY |
2527 | #ifdef CONFIG_PM |
2528 | .suspend = atl1e_suspend, | |
2529 | .resume = atl1e_resume, | |
2530 | #endif | |
2531 | .shutdown = atl1e_shutdown, | |
2532 | .err_handler = &atl1e_err_handler | |
2533 | }; | |
2534 | ||
2535 | /* | |
2536 | * atl1e_init_module - Driver Registration Routine | |
2537 | * | |
2538 | * atl1e_init_module is the first routine called when the driver is | |
2539 | * loaded. All it does is register with the PCI subsystem. | |
2540 | */ | |
2541 | static int __init atl1e_init_module(void) | |
2542 | { | |
2543 | return pci_register_driver(&atl1e_driver); | |
2544 | } | |
2545 | ||
2546 | /* | |
2547 | * atl1e_exit_module - Driver Exit Cleanup Routine | |
2548 | * | |
2549 | * atl1e_exit_module is called just before the driver is removed | |
2550 | * from memory. | |
2551 | */ | |
2552 | static void __exit atl1e_exit_module(void) | |
2553 | { | |
2554 | pci_unregister_driver(&atl1e_driver); | |
2555 | } | |
2556 | ||
2557 | module_init(atl1e_init_module); | |
2558 | module_exit(atl1e_exit_module); |