]>
Commit | Line | Data |
---|---|---|
452c1ce2 CS |
1 | /* |
2 | * Copyright(c) 2006 - 2007 Atheros Corporation. All rights reserved. | |
3 | * Copyright(c) 2007 - 2008 Chris Snook <csnook@redhat.com> | |
4 | * | |
5 | * Derived from Intel e1000 driver | |
6 | * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the Free | |
10 | * Software Foundation; either version 2 of the License, or (at your option) | |
11 | * any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
16 | * more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License along with | |
19 | * this program; if not, write to the Free Software Foundation, Inc., 59 | |
20 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
21 | */ | |
22 | ||
23 | #include <asm/atomic.h> | |
24 | #include <linux/crc32.h> | |
25 | #include <linux/dma-mapping.h> | |
26 | #include <linux/etherdevice.h> | |
27 | #include <linux/ethtool.h> | |
28 | #include <linux/hardirq.h> | |
29 | #include <linux/if_vlan.h> | |
30 | #include <linux/in.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/ip.h> | |
33 | #include <linux/irqflags.h> | |
34 | #include <linux/irqreturn.h> | |
35 | #include <linux/mii.h> | |
36 | #include <linux/net.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/pci_ids.h> | |
40 | #include <linux/pm.h> | |
41 | #include <linux/skbuff.h> | |
42 | #include <linux/spinlock.h> | |
43 | #include <linux/string.h> | |
44 | #include <linux/tcp.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/types.h> | |
47 | #include <linux/workqueue.h> | |
48 | ||
49 | #include "atl2.h" | |
50 | ||
51 | #define ATL2_DRV_VERSION "2.2.3" | |
52 | ||
53 | static char atl2_driver_name[] = "atl2"; | |
54 | static const char atl2_driver_string[] = "Atheros(R) L2 Ethernet Driver"; | |
55 | static char atl2_copyright[] = "Copyright (c) 2007 Atheros Corporation."; | |
56 | static char atl2_driver_version[] = ATL2_DRV_VERSION; | |
57 | ||
58 | MODULE_AUTHOR("Atheros Corporation <xiong.huang@atheros.com>, Chris Snook <csnook@redhat.com>"); | |
59 | MODULE_DESCRIPTION("Atheros Fast Ethernet Network Driver"); | |
60 | MODULE_LICENSE("GPL"); | |
61 | MODULE_VERSION(ATL2_DRV_VERSION); | |
62 | ||
63 | /* | |
64 | * atl2_pci_tbl - PCI Device ID Table | |
65 | */ | |
66 | static struct pci_device_id atl2_pci_tbl[] = { | |
67 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2)}, | |
68 | /* required last entry */ | |
69 | {0,} | |
70 | }; | |
71 | MODULE_DEVICE_TABLE(pci, atl2_pci_tbl); | |
72 | ||
73 | static void atl2_set_ethtool_ops(struct net_device *netdev); | |
74 | ||
75 | static void atl2_check_options(struct atl2_adapter *adapter); | |
76 | ||
77 | /* | |
78 | * atl2_sw_init - Initialize general software structures (struct atl2_adapter) | |
79 | * @adapter: board private structure to initialize | |
80 | * | |
81 | * atl2_sw_init initializes the Adapter private data structure. | |
82 | * Fields are initialized based on PCI device information and | |
83 | * OS network device settings (MTU size). | |
84 | */ | |
85 | static int __devinit atl2_sw_init(struct atl2_adapter *adapter) | |
86 | { | |
87 | struct atl2_hw *hw = &adapter->hw; | |
88 | struct pci_dev *pdev = adapter->pdev; | |
89 | ||
90 | /* PCI config space info */ | |
91 | hw->vendor_id = pdev->vendor; | |
92 | hw->device_id = pdev->device; | |
93 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
94 | hw->subsystem_id = pdev->subsystem_device; | |
95 | ||
96 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
97 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
98 | ||
99 | adapter->wol = 0; | |
100 | adapter->ict = 50000; /* ~100ms */ | |
101 | adapter->link_speed = SPEED_0; /* hardware init */ | |
102 | adapter->link_duplex = FULL_DUPLEX; | |
103 | ||
104 | hw->phy_configured = false; | |
105 | hw->preamble_len = 7; | |
106 | hw->ipgt = 0x60; | |
107 | hw->min_ifg = 0x50; | |
108 | hw->ipgr1 = 0x40; | |
109 | hw->ipgr2 = 0x60; | |
110 | hw->retry_buf = 2; | |
111 | hw->max_retry = 0xf; | |
112 | hw->lcol = 0x37; | |
113 | hw->jam_ipg = 7; | |
114 | hw->fc_rxd_hi = 0; | |
115 | hw->fc_rxd_lo = 0; | |
116 | hw->max_frame_size = adapter->netdev->mtu; | |
117 | ||
118 | spin_lock_init(&adapter->stats_lock); | |
452c1ce2 CS |
119 | |
120 | set_bit(__ATL2_DOWN, &adapter->flags); | |
121 | ||
122 | return 0; | |
123 | } | |
124 | ||
125 | /* | |
126 | * atl2_set_multi - Multicast and Promiscuous mode set | |
127 | * @netdev: network interface device structure | |
128 | * | |
129 | * The set_multi entry point is called whenever the multicast address | |
130 | * list or the network interface flags are updated. This routine is | |
131 | * responsible for configuring the hardware for proper multicast, | |
132 | * promiscuous mode, and all-multi behavior. | |
133 | */ | |
134 | static void atl2_set_multi(struct net_device *netdev) | |
135 | { | |
136 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
137 | struct atl2_hw *hw = &adapter->hw; | |
138 | struct dev_mc_list *mc_ptr; | |
139 | u32 rctl; | |
140 | u32 hash_value; | |
141 | ||
142 | /* Check for Promiscuous and All Multicast modes */ | |
143 | rctl = ATL2_READ_REG(hw, REG_MAC_CTRL); | |
144 | ||
145 | if (netdev->flags & IFF_PROMISC) { | |
146 | rctl |= MAC_CTRL_PROMIS_EN; | |
147 | } else if (netdev->flags & IFF_ALLMULTI) { | |
148 | rctl |= MAC_CTRL_MC_ALL_EN; | |
149 | rctl &= ~MAC_CTRL_PROMIS_EN; | |
150 | } else | |
151 | rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); | |
152 | ||
153 | ATL2_WRITE_REG(hw, REG_MAC_CTRL, rctl); | |
154 | ||
155 | /* clear the old settings from the multicast hash table */ | |
156 | ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); | |
157 | ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); | |
158 | ||
159 | /* comoute mc addresses' hash value ,and put it into hash table */ | |
160 | for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) { | |
161 | hash_value = atl2_hash_mc_addr(hw, mc_ptr->dmi_addr); | |
162 | atl2_hash_set(hw, hash_value); | |
163 | } | |
164 | } | |
165 | ||
166 | static void init_ring_ptrs(struct atl2_adapter *adapter) | |
167 | { | |
168 | /* Read / Write Ptr Initialize: */ | |
169 | adapter->txd_write_ptr = 0; | |
170 | atomic_set(&adapter->txd_read_ptr, 0); | |
171 | ||
172 | adapter->rxd_read_ptr = 0; | |
173 | adapter->rxd_write_ptr = 0; | |
174 | ||
175 | atomic_set(&adapter->txs_write_ptr, 0); | |
176 | adapter->txs_next_clear = 0; | |
177 | } | |
178 | ||
179 | /* | |
180 | * atl2_configure - Configure Transmit&Receive Unit after Reset | |
181 | * @adapter: board private structure | |
182 | * | |
183 | * Configure the Tx /Rx unit of the MAC after a reset. | |
184 | */ | |
185 | static int atl2_configure(struct atl2_adapter *adapter) | |
186 | { | |
187 | struct atl2_hw *hw = &adapter->hw; | |
188 | u32 value; | |
189 | ||
190 | /* clear interrupt status */ | |
191 | ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0xffffffff); | |
192 | ||
193 | /* set MAC Address */ | |
194 | value = (((u32)hw->mac_addr[2]) << 24) | | |
195 | (((u32)hw->mac_addr[3]) << 16) | | |
196 | (((u32)hw->mac_addr[4]) << 8) | | |
197 | (((u32)hw->mac_addr[5])); | |
198 | ATL2_WRITE_REG(hw, REG_MAC_STA_ADDR, value); | |
199 | value = (((u32)hw->mac_addr[0]) << 8) | | |
200 | (((u32)hw->mac_addr[1])); | |
201 | ATL2_WRITE_REG(hw, (REG_MAC_STA_ADDR+4), value); | |
202 | ||
203 | /* HI base address */ | |
204 | ATL2_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI, | |
205 | (u32)((adapter->ring_dma & 0xffffffff00000000ULL) >> 32)); | |
206 | ||
207 | /* LO base address */ | |
208 | ATL2_WRITE_REG(hw, REG_TXD_BASE_ADDR_LO, | |
209 | (u32)(adapter->txd_dma & 0x00000000ffffffffULL)); | |
210 | ATL2_WRITE_REG(hw, REG_TXS_BASE_ADDR_LO, | |
211 | (u32)(adapter->txs_dma & 0x00000000ffffffffULL)); | |
212 | ATL2_WRITE_REG(hw, REG_RXD_BASE_ADDR_LO, | |
213 | (u32)(adapter->rxd_dma & 0x00000000ffffffffULL)); | |
214 | ||
215 | /* element count */ | |
216 | ATL2_WRITE_REGW(hw, REG_TXD_MEM_SIZE, (u16)(adapter->txd_ring_size/4)); | |
217 | ATL2_WRITE_REGW(hw, REG_TXS_MEM_SIZE, (u16)adapter->txs_ring_size); | |
218 | ATL2_WRITE_REGW(hw, REG_RXD_BUF_NUM, (u16)adapter->rxd_ring_size); | |
219 | ||
220 | /* config Internal SRAM */ | |
221 | /* | |
222 | ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_tx_end); | |
223 | ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_rx_end); | |
224 | */ | |
225 | ||
226 | /* config IPG/IFG */ | |
227 | value = (((u32)hw->ipgt & MAC_IPG_IFG_IPGT_MASK) << | |
228 | MAC_IPG_IFG_IPGT_SHIFT) | | |
229 | (((u32)hw->min_ifg & MAC_IPG_IFG_MIFG_MASK) << | |
230 | MAC_IPG_IFG_MIFG_SHIFT) | | |
231 | (((u32)hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK) << | |
232 | MAC_IPG_IFG_IPGR1_SHIFT)| | |
233 | (((u32)hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK) << | |
234 | MAC_IPG_IFG_IPGR2_SHIFT); | |
235 | ATL2_WRITE_REG(hw, REG_MAC_IPG_IFG, value); | |
236 | ||
237 | /* config Half-Duplex Control */ | |
238 | value = ((u32)hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) | | |
239 | (((u32)hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK) << | |
240 | MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) | | |
241 | MAC_HALF_DUPLX_CTRL_EXC_DEF_EN | | |
242 | (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) | | |
243 | (((u32)hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK) << | |
244 | MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT); | |
245 | ATL2_WRITE_REG(hw, REG_MAC_HALF_DUPLX_CTRL, value); | |
246 | ||
247 | /* set Interrupt Moderator Timer */ | |
248 | ATL2_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, adapter->imt); | |
249 | ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_ITIMER_EN); | |
250 | ||
251 | /* set Interrupt Clear Timer */ | |
252 | ATL2_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, adapter->ict); | |
253 | ||
254 | /* set MTU */ | |
255 | ATL2_WRITE_REG(hw, REG_MTU, adapter->netdev->mtu + | |
256 | ENET_HEADER_SIZE + VLAN_SIZE + ETHERNET_FCS_SIZE); | |
257 | ||
258 | /* 1590 */ | |
259 | ATL2_WRITE_REG(hw, REG_TX_CUT_THRESH, 0x177); | |
260 | ||
261 | /* flow control */ | |
262 | ATL2_WRITE_REGW(hw, REG_PAUSE_ON_TH, hw->fc_rxd_hi); | |
263 | ATL2_WRITE_REGW(hw, REG_PAUSE_OFF_TH, hw->fc_rxd_lo); | |
264 | ||
265 | /* Init mailbox */ | |
266 | ATL2_WRITE_REGW(hw, REG_MB_TXD_WR_IDX, (u16)adapter->txd_write_ptr); | |
267 | ATL2_WRITE_REGW(hw, REG_MB_RXD_RD_IDX, (u16)adapter->rxd_read_ptr); | |
268 | ||
269 | /* enable DMA read/write */ | |
270 | ATL2_WRITE_REGB(hw, REG_DMAR, DMAR_EN); | |
271 | ATL2_WRITE_REGB(hw, REG_DMAW, DMAW_EN); | |
272 | ||
273 | value = ATL2_READ_REG(&adapter->hw, REG_ISR); | |
274 | if ((value & ISR_PHY_LINKDOWN) != 0) | |
275 | value = 1; /* config failed */ | |
276 | else | |
277 | value = 0; | |
278 | ||
279 | /* clear all interrupt status */ | |
280 | ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0x3fffffff); | |
281 | ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0); | |
282 | return value; | |
283 | } | |
284 | ||
285 | /* | |
286 | * atl2_setup_ring_resources - allocate Tx / RX descriptor resources | |
287 | * @adapter: board private structure | |
288 | * | |
289 | * Return 0 on success, negative on failure | |
290 | */ | |
291 | static s32 atl2_setup_ring_resources(struct atl2_adapter *adapter) | |
292 | { | |
293 | struct pci_dev *pdev = adapter->pdev; | |
294 | int size; | |
295 | u8 offset = 0; | |
296 | ||
297 | /* real ring DMA buffer */ | |
298 | adapter->ring_size = size = | |
299 | adapter->txd_ring_size * 1 + 7 + /* dword align */ | |
300 | adapter->txs_ring_size * 4 + 7 + /* dword align */ | |
301 | adapter->rxd_ring_size * 1536 + 127; /* 128bytes align */ | |
302 | ||
303 | adapter->ring_vir_addr = pci_alloc_consistent(pdev, size, | |
304 | &adapter->ring_dma); | |
305 | if (!adapter->ring_vir_addr) | |
306 | return -ENOMEM; | |
307 | memset(adapter->ring_vir_addr, 0, adapter->ring_size); | |
308 | ||
309 | /* Init TXD Ring */ | |
310 | adapter->txd_dma = adapter->ring_dma ; | |
311 | offset = (adapter->txd_dma & 0x7) ? (8 - (adapter->txd_dma & 0x7)) : 0; | |
312 | adapter->txd_dma += offset; | |
313 | adapter->txd_ring = (struct tx_pkt_header *) (adapter->ring_vir_addr + | |
314 | offset); | |
315 | ||
316 | /* Init TXS Ring */ | |
317 | adapter->txs_dma = adapter->txd_dma + adapter->txd_ring_size; | |
318 | offset = (adapter->txs_dma & 0x7) ? (8 - (adapter->txs_dma & 0x7)) : 0; | |
319 | adapter->txs_dma += offset; | |
320 | adapter->txs_ring = (struct tx_pkt_status *) | |
321 | (((u8 *)adapter->txd_ring) + (adapter->txd_ring_size + offset)); | |
322 | ||
323 | /* Init RXD Ring */ | |
324 | adapter->rxd_dma = adapter->txs_dma + adapter->txs_ring_size * 4; | |
325 | offset = (adapter->rxd_dma & 127) ? | |
326 | (128 - (adapter->rxd_dma & 127)) : 0; | |
327 | if (offset > 7) | |
328 | offset -= 8; | |
329 | else | |
330 | offset += (128 - 8); | |
331 | ||
332 | adapter->rxd_dma += offset; | |
333 | adapter->rxd_ring = (struct rx_desc *) (((u8 *)adapter->txs_ring) + | |
334 | (adapter->txs_ring_size * 4 + offset)); | |
335 | ||
336 | /* | |
337 | * Read / Write Ptr Initialize: | |
338 | * init_ring_ptrs(adapter); | |
339 | */ | |
340 | return 0; | |
341 | } | |
342 | ||
343 | /* | |
344 | * atl2_irq_enable - Enable default interrupt generation settings | |
345 | * @adapter: board private structure | |
346 | */ | |
347 | static inline void atl2_irq_enable(struct atl2_adapter *adapter) | |
348 | { | |
349 | ATL2_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK); | |
350 | ATL2_WRITE_FLUSH(&adapter->hw); | |
351 | } | |
352 | ||
353 | /* | |
354 | * atl2_irq_disable - Mask off interrupt generation on the NIC | |
355 | * @adapter: board private structure | |
356 | */ | |
357 | static inline void atl2_irq_disable(struct atl2_adapter *adapter) | |
358 | { | |
359 | ATL2_WRITE_REG(&adapter->hw, REG_IMR, 0); | |
360 | ATL2_WRITE_FLUSH(&adapter->hw); | |
361 | synchronize_irq(adapter->pdev->irq); | |
362 | } | |
363 | ||
364 | #ifdef NETIF_F_HW_VLAN_TX | |
365 | static void atl2_vlan_rx_register(struct net_device *netdev, | |
366 | struct vlan_group *grp) | |
367 | { | |
368 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
369 | u32 ctrl; | |
370 | ||
371 | atl2_irq_disable(adapter); | |
372 | adapter->vlgrp = grp; | |
373 | ||
374 | if (grp) { | |
375 | /* enable VLAN tag insert/strip */ | |
376 | ctrl = ATL2_READ_REG(&adapter->hw, REG_MAC_CTRL); | |
377 | ctrl |= MAC_CTRL_RMV_VLAN; | |
378 | ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl); | |
379 | } else { | |
380 | /* disable VLAN tag insert/strip */ | |
381 | ctrl = ATL2_READ_REG(&adapter->hw, REG_MAC_CTRL); | |
382 | ctrl &= ~MAC_CTRL_RMV_VLAN; | |
383 | ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl); | |
384 | } | |
385 | ||
386 | atl2_irq_enable(adapter); | |
387 | } | |
388 | ||
389 | static void atl2_restore_vlan(struct atl2_adapter *adapter) | |
390 | { | |
391 | atl2_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
392 | } | |
393 | #endif | |
394 | ||
395 | static void atl2_intr_rx(struct atl2_adapter *adapter) | |
396 | { | |
397 | struct net_device *netdev = adapter->netdev; | |
398 | struct rx_desc *rxd; | |
399 | struct sk_buff *skb; | |
400 | ||
401 | do { | |
402 | rxd = adapter->rxd_ring+adapter->rxd_write_ptr; | |
403 | if (!rxd->status.update) | |
404 | break; /* end of tx */ | |
405 | ||
406 | /* clear this flag at once */ | |
407 | rxd->status.update = 0; | |
408 | ||
409 | if (rxd->status.ok && rxd->status.pkt_size >= 60) { | |
410 | int rx_size = (int)(rxd->status.pkt_size - 4); | |
411 | /* alloc new buffer */ | |
412 | skb = netdev_alloc_skb(netdev, rx_size + NET_IP_ALIGN); | |
413 | if (NULL == skb) { | |
414 | printk(KERN_WARNING | |
415 | "%s: Mem squeeze, deferring packet.\n", | |
416 | netdev->name); | |
417 | /* | |
418 | * Check that some rx space is free. If not, | |
419 | * free one and mark stats->rx_dropped++. | |
420 | */ | |
02e71731 | 421 | netdev->stats.rx_dropped++; |
452c1ce2 CS |
422 | break; |
423 | } | |
424 | skb_reserve(skb, NET_IP_ALIGN); | |
425 | skb->dev = netdev; | |
426 | memcpy(skb->data, rxd->packet, rx_size); | |
427 | skb_put(skb, rx_size); | |
428 | skb->protocol = eth_type_trans(skb, netdev); | |
429 | #ifdef NETIF_F_HW_VLAN_TX | |
430 | if (adapter->vlgrp && (rxd->status.vlan)) { | |
431 | u16 vlan_tag = (rxd->status.vtag>>4) | | |
432 | ((rxd->status.vtag&7) << 13) | | |
433 | ((rxd->status.vtag&8) << 9); | |
434 | vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag); | |
435 | } else | |
436 | #endif | |
437 | netif_rx(skb); | |
02e71731 SH |
438 | netdev->stats.rx_bytes += rx_size; |
439 | netdev->stats.rx_packets++; | |
452c1ce2 | 440 | } else { |
02e71731 | 441 | netdev->stats.rx_errors++; |
452c1ce2 CS |
442 | |
443 | if (rxd->status.ok && rxd->status.pkt_size <= 60) | |
02e71731 | 444 | netdev->stats.rx_length_errors++; |
452c1ce2 | 445 | if (rxd->status.mcast) |
02e71731 | 446 | netdev->stats.multicast++; |
452c1ce2 | 447 | if (rxd->status.crc) |
02e71731 | 448 | netdev->stats.rx_crc_errors++; |
452c1ce2 | 449 | if (rxd->status.align) |
02e71731 | 450 | netdev->stats.rx_frame_errors++; |
452c1ce2 CS |
451 | } |
452 | ||
453 | /* advance write ptr */ | |
454 | if (++adapter->rxd_write_ptr == adapter->rxd_ring_size) | |
455 | adapter->rxd_write_ptr = 0; | |
456 | } while (1); | |
457 | ||
458 | /* update mailbox? */ | |
459 | adapter->rxd_read_ptr = adapter->rxd_write_ptr; | |
460 | ATL2_WRITE_REGW(&adapter->hw, REG_MB_RXD_RD_IDX, adapter->rxd_read_ptr); | |
461 | } | |
462 | ||
463 | static void atl2_intr_tx(struct atl2_adapter *adapter) | |
464 | { | |
02e71731 | 465 | struct net_device *netdev = adapter->netdev; |
452c1ce2 CS |
466 | u32 txd_read_ptr; |
467 | u32 txs_write_ptr; | |
468 | struct tx_pkt_status *txs; | |
469 | struct tx_pkt_header *txph; | |
470 | int free_hole = 0; | |
471 | ||
472 | do { | |
473 | txs_write_ptr = (u32) atomic_read(&adapter->txs_write_ptr); | |
474 | txs = adapter->txs_ring + txs_write_ptr; | |
475 | if (!txs->update) | |
476 | break; /* tx stop here */ | |
477 | ||
478 | free_hole = 1; | |
479 | txs->update = 0; | |
480 | ||
481 | if (++txs_write_ptr == adapter->txs_ring_size) | |
482 | txs_write_ptr = 0; | |
483 | atomic_set(&adapter->txs_write_ptr, (int)txs_write_ptr); | |
484 | ||
485 | txd_read_ptr = (u32) atomic_read(&adapter->txd_read_ptr); | |
486 | txph = (struct tx_pkt_header *) | |
487 | (((u8 *)adapter->txd_ring) + txd_read_ptr); | |
488 | ||
489 | if (txph->pkt_size != txs->pkt_size) { | |
490 | struct tx_pkt_status *old_txs = txs; | |
491 | printk(KERN_WARNING | |
492 | "%s: txs packet size not consistent with txd" | |
493 | " txd_:0x%08x, txs_:0x%08x!\n", | |
494 | adapter->netdev->name, | |
495 | *(u32 *)txph, *(u32 *)txs); | |
496 | printk(KERN_WARNING | |
497 | "txd read ptr: 0x%x\n", | |
498 | txd_read_ptr); | |
499 | txs = adapter->txs_ring + txs_write_ptr; | |
500 | printk(KERN_WARNING | |
501 | "txs-behind:0x%08x\n", | |
502 | *(u32 *)txs); | |
503 | if (txs_write_ptr < 2) { | |
504 | txs = adapter->txs_ring + | |
505 | (adapter->txs_ring_size + | |
506 | txs_write_ptr - 2); | |
507 | } else { | |
508 | txs = adapter->txs_ring + (txs_write_ptr - 2); | |
509 | } | |
510 | printk(KERN_WARNING | |
511 | "txs-before:0x%08x\n", | |
512 | *(u32 *)txs); | |
513 | txs = old_txs; | |
514 | } | |
515 | ||
516 | /* 4for TPH */ | |
517 | txd_read_ptr += (((u32)(txph->pkt_size) + 7) & ~3); | |
518 | if (txd_read_ptr >= adapter->txd_ring_size) | |
519 | txd_read_ptr -= adapter->txd_ring_size; | |
520 | ||
521 | atomic_set(&adapter->txd_read_ptr, (int)txd_read_ptr); | |
522 | ||
523 | /* tx statistics: */ | |
e2f092ff | 524 | if (txs->ok) { |
02e71731 SH |
525 | netdev->stats.tx_bytes += txs->pkt_size; |
526 | netdev->stats.tx_packets++; | |
e2f092ff | 527 | } |
452c1ce2 | 528 | else |
02e71731 | 529 | netdev->stats.tx_errors++; |
452c1ce2 CS |
530 | |
531 | if (txs->defer) | |
02e71731 | 532 | netdev->stats.collisions++; |
452c1ce2 | 533 | if (txs->abort_col) |
02e71731 | 534 | netdev->stats.tx_aborted_errors++; |
452c1ce2 | 535 | if (txs->late_col) |
02e71731 | 536 | netdev->stats.tx_window_errors++; |
452c1ce2 | 537 | if (txs->underun) |
02e71731 | 538 | netdev->stats.tx_fifo_errors++; |
452c1ce2 CS |
539 | } while (1); |
540 | ||
541 | if (free_hole) { | |
542 | if (netif_queue_stopped(adapter->netdev) && | |
543 | netif_carrier_ok(adapter->netdev)) | |
544 | netif_wake_queue(adapter->netdev); | |
545 | } | |
546 | } | |
547 | ||
548 | static void atl2_check_for_link(struct atl2_adapter *adapter) | |
549 | { | |
550 | struct net_device *netdev = adapter->netdev; | |
551 | u16 phy_data = 0; | |
552 | ||
553 | spin_lock(&adapter->stats_lock); | |
554 | atl2_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); | |
555 | atl2_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); | |
556 | spin_unlock(&adapter->stats_lock); | |
557 | ||
558 | /* notify upper layer link down ASAP */ | |
559 | if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */ | |
560 | if (netif_carrier_ok(netdev)) { /* old link state: Up */ | |
561 | printk(KERN_INFO "%s: %s NIC Link is Down\n", | |
562 | atl2_driver_name, netdev->name); | |
563 | adapter->link_speed = SPEED_0; | |
564 | netif_carrier_off(netdev); | |
565 | netif_stop_queue(netdev); | |
566 | } | |
567 | } | |
568 | schedule_work(&adapter->link_chg_task); | |
569 | } | |
570 | ||
571 | static inline void atl2_clear_phy_int(struct atl2_adapter *adapter) | |
572 | { | |
573 | u16 phy_data; | |
574 | spin_lock(&adapter->stats_lock); | |
575 | atl2_read_phy_reg(&adapter->hw, 19, &phy_data); | |
576 | spin_unlock(&adapter->stats_lock); | |
577 | } | |
578 | ||
579 | /* | |
580 | * atl2_intr - Interrupt Handler | |
581 | * @irq: interrupt number | |
582 | * @data: pointer to a network interface device structure | |
583 | * @pt_regs: CPU registers structure | |
584 | */ | |
585 | static irqreturn_t atl2_intr(int irq, void *data) | |
586 | { | |
587 | struct atl2_adapter *adapter = netdev_priv(data); | |
588 | struct atl2_hw *hw = &adapter->hw; | |
589 | u32 status; | |
590 | ||
591 | status = ATL2_READ_REG(hw, REG_ISR); | |
592 | if (0 == status) | |
593 | return IRQ_NONE; | |
594 | ||
595 | /* link event */ | |
596 | if (status & ISR_PHY) | |
597 | atl2_clear_phy_int(adapter); | |
598 | ||
599 | /* clear ISR status, and Enable CMB DMA/Disable Interrupt */ | |
600 | ATL2_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); | |
601 | ||
602 | /* check if PCIE PHY Link down */ | |
603 | if (status & ISR_PHY_LINKDOWN) { | |
604 | if (netif_running(adapter->netdev)) { /* reset MAC */ | |
605 | ATL2_WRITE_REG(hw, REG_ISR, 0); | |
606 | ATL2_WRITE_REG(hw, REG_IMR, 0); | |
607 | ATL2_WRITE_FLUSH(hw); | |
608 | schedule_work(&adapter->reset_task); | |
609 | return IRQ_HANDLED; | |
610 | } | |
611 | } | |
612 | ||
613 | /* check if DMA read/write error? */ | |
614 | if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) { | |
615 | ATL2_WRITE_REG(hw, REG_ISR, 0); | |
616 | ATL2_WRITE_REG(hw, REG_IMR, 0); | |
617 | ATL2_WRITE_FLUSH(hw); | |
618 | schedule_work(&adapter->reset_task); | |
619 | return IRQ_HANDLED; | |
620 | } | |
621 | ||
622 | /* link event */ | |
623 | if (status & (ISR_PHY | ISR_MANUAL)) { | |
02e71731 | 624 | adapter->netdev->stats.tx_carrier_errors++; |
452c1ce2 CS |
625 | atl2_check_for_link(adapter); |
626 | } | |
627 | ||
628 | /* transmit event */ | |
629 | if (status & ISR_TX_EVENT) | |
630 | atl2_intr_tx(adapter); | |
631 | ||
632 | /* rx exception */ | |
633 | if (status & ISR_RX_EVENT) | |
634 | atl2_intr_rx(adapter); | |
635 | ||
636 | /* re-enable Interrupt */ | |
637 | ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0); | |
638 | return IRQ_HANDLED; | |
639 | } | |
640 | ||
641 | static int atl2_request_irq(struct atl2_adapter *adapter) | |
642 | { | |
643 | struct net_device *netdev = adapter->netdev; | |
644 | int flags, err = 0; | |
645 | ||
646 | flags = IRQF_SHARED; | |
452c1ce2 CS |
647 | adapter->have_msi = true; |
648 | err = pci_enable_msi(adapter->pdev); | |
649 | if (err) | |
650 | adapter->have_msi = false; | |
651 | ||
652 | if (adapter->have_msi) | |
653 | flags &= ~IRQF_SHARED; | |
452c1ce2 CS |
654 | |
655 | return request_irq(adapter->pdev->irq, &atl2_intr, flags, netdev->name, | |
656 | netdev); | |
657 | } | |
658 | ||
659 | /* | |
660 | * atl2_free_ring_resources - Free Tx / RX descriptor Resources | |
661 | * @adapter: board private structure | |
662 | * | |
663 | * Free all transmit software resources | |
664 | */ | |
665 | static void atl2_free_ring_resources(struct atl2_adapter *adapter) | |
666 | { | |
667 | struct pci_dev *pdev = adapter->pdev; | |
668 | pci_free_consistent(pdev, adapter->ring_size, adapter->ring_vir_addr, | |
669 | adapter->ring_dma); | |
670 | } | |
671 | ||
672 | /* | |
673 | * atl2_open - Called when a network interface is made active | |
674 | * @netdev: network interface device structure | |
675 | * | |
676 | * Returns 0 on success, negative value on failure | |
677 | * | |
678 | * The open entry point is called when a network interface is made | |
679 | * active by the system (IFF_UP). At this point all resources needed | |
680 | * for transmit and receive operations are allocated, the interrupt | |
681 | * handler is registered with the OS, the watchdog timer is started, | |
682 | * and the stack is notified that the interface is ready. | |
683 | */ | |
684 | static int atl2_open(struct net_device *netdev) | |
685 | { | |
686 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
687 | int err; | |
688 | u32 val; | |
689 | ||
690 | /* disallow open during test */ | |
691 | if (test_bit(__ATL2_TESTING, &adapter->flags)) | |
692 | return -EBUSY; | |
693 | ||
694 | /* allocate transmit descriptors */ | |
695 | err = atl2_setup_ring_resources(adapter); | |
696 | if (err) | |
697 | return err; | |
698 | ||
699 | err = atl2_init_hw(&adapter->hw); | |
700 | if (err) { | |
701 | err = -EIO; | |
702 | goto err_init_hw; | |
703 | } | |
704 | ||
705 | /* hardware has been reset, we need to reload some things */ | |
706 | atl2_set_multi(netdev); | |
707 | init_ring_ptrs(adapter); | |
708 | ||
709 | #ifdef NETIF_F_HW_VLAN_TX | |
710 | atl2_restore_vlan(adapter); | |
711 | #endif | |
712 | ||
713 | if (atl2_configure(adapter)) { | |
714 | err = -EIO; | |
715 | goto err_config; | |
716 | } | |
717 | ||
718 | err = atl2_request_irq(adapter); | |
719 | if (err) | |
720 | goto err_req_irq; | |
721 | ||
722 | clear_bit(__ATL2_DOWN, &adapter->flags); | |
723 | ||
e053b628 | 724 | mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 4*HZ)); |
452c1ce2 CS |
725 | |
726 | val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL); | |
727 | ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, | |
728 | val | MASTER_CTRL_MANUAL_INT); | |
729 | ||
730 | atl2_irq_enable(adapter); | |
731 | ||
732 | return 0; | |
733 | ||
734 | err_init_hw: | |
735 | err_req_irq: | |
736 | err_config: | |
737 | atl2_free_ring_resources(adapter); | |
738 | atl2_reset_hw(&adapter->hw); | |
739 | ||
740 | return err; | |
741 | } | |
742 | ||
743 | static void atl2_down(struct atl2_adapter *adapter) | |
744 | { | |
745 | struct net_device *netdev = adapter->netdev; | |
746 | ||
747 | /* signal that we're down so the interrupt handler does not | |
748 | * reschedule our watchdog timer */ | |
749 | set_bit(__ATL2_DOWN, &adapter->flags); | |
750 | ||
452c1ce2 | 751 | netif_tx_disable(netdev); |
452c1ce2 CS |
752 | |
753 | /* reset MAC to disable all RX/TX */ | |
754 | atl2_reset_hw(&adapter->hw); | |
755 | msleep(1); | |
756 | ||
757 | atl2_irq_disable(adapter); | |
758 | ||
759 | del_timer_sync(&adapter->watchdog_timer); | |
760 | del_timer_sync(&adapter->phy_config_timer); | |
761 | clear_bit(0, &adapter->cfg_phy); | |
762 | ||
763 | netif_carrier_off(netdev); | |
764 | adapter->link_speed = SPEED_0; | |
765 | adapter->link_duplex = -1; | |
766 | } | |
767 | ||
768 | static void atl2_free_irq(struct atl2_adapter *adapter) | |
769 | { | |
770 | struct net_device *netdev = adapter->netdev; | |
771 | ||
772 | free_irq(adapter->pdev->irq, netdev); | |
773 | ||
774 | #ifdef CONFIG_PCI_MSI | |
775 | if (adapter->have_msi) | |
776 | pci_disable_msi(adapter->pdev); | |
777 | #endif | |
778 | } | |
779 | ||
780 | /* | |
781 | * atl2_close - Disables a network interface | |
782 | * @netdev: network interface device structure | |
783 | * | |
784 | * Returns 0, this is not allowed to fail | |
785 | * | |
786 | * The close entry point is called when an interface is de-activated | |
787 | * by the OS. The hardware is still under the drivers control, but | |
788 | * needs to be disabled. A global MAC reset is issued to stop the | |
789 | * hardware, and all transmit and receive resources are freed. | |
790 | */ | |
791 | static int atl2_close(struct net_device *netdev) | |
792 | { | |
793 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
794 | ||
795 | WARN_ON(test_bit(__ATL2_RESETTING, &adapter->flags)); | |
796 | ||
797 | atl2_down(adapter); | |
798 | atl2_free_irq(adapter); | |
799 | atl2_free_ring_resources(adapter); | |
800 | ||
801 | return 0; | |
802 | } | |
803 | ||
804 | static inline int TxsFreeUnit(struct atl2_adapter *adapter) | |
805 | { | |
806 | u32 txs_write_ptr = (u32) atomic_read(&adapter->txs_write_ptr); | |
807 | ||
808 | return (adapter->txs_next_clear >= txs_write_ptr) ? | |
809 | (int) (adapter->txs_ring_size - adapter->txs_next_clear + | |
810 | txs_write_ptr - 1) : | |
811 | (int) (txs_write_ptr - adapter->txs_next_clear - 1); | |
812 | } | |
813 | ||
814 | static inline int TxdFreeBytes(struct atl2_adapter *adapter) | |
815 | { | |
816 | u32 txd_read_ptr = (u32)atomic_read(&adapter->txd_read_ptr); | |
817 | ||
818 | return (adapter->txd_write_ptr >= txd_read_ptr) ? | |
819 | (int) (adapter->txd_ring_size - adapter->txd_write_ptr + | |
820 | txd_read_ptr - 1) : | |
821 | (int) (txd_read_ptr - adapter->txd_write_ptr - 1); | |
822 | } | |
823 | ||
61357325 SH |
824 | static netdev_tx_t atl2_xmit_frame(struct sk_buff *skb, |
825 | struct net_device *netdev) | |
452c1ce2 CS |
826 | { |
827 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
452c1ce2 CS |
828 | struct tx_pkt_header *txph; |
829 | u32 offset, copy_len; | |
830 | int txs_unused; | |
831 | int txbuf_unused; | |
832 | ||
833 | if (test_bit(__ATL2_DOWN, &adapter->flags)) { | |
834 | dev_kfree_skb_any(skb); | |
835 | return NETDEV_TX_OK; | |
836 | } | |
837 | ||
838 | if (unlikely(skb->len <= 0)) { | |
839 | dev_kfree_skb_any(skb); | |
840 | return NETDEV_TX_OK; | |
841 | } | |
842 | ||
452c1ce2 CS |
843 | txs_unused = TxsFreeUnit(adapter); |
844 | txbuf_unused = TxdFreeBytes(adapter); | |
845 | ||
846 | if (skb->len + sizeof(struct tx_pkt_header) + 4 > txbuf_unused || | |
847 | txs_unused < 1) { | |
848 | /* not enough resources */ | |
849 | netif_stop_queue(netdev); | |
452c1ce2 CS |
850 | return NETDEV_TX_BUSY; |
851 | } | |
852 | ||
853 | offset = adapter->txd_write_ptr; | |
854 | ||
855 | txph = (struct tx_pkt_header *) (((u8 *)adapter->txd_ring) + offset); | |
856 | ||
857 | *(u32 *)txph = 0; | |
858 | txph->pkt_size = skb->len; | |
859 | ||
860 | offset += 4; | |
861 | if (offset >= adapter->txd_ring_size) | |
862 | offset -= adapter->txd_ring_size; | |
863 | copy_len = adapter->txd_ring_size - offset; | |
864 | if (copy_len >= skb->len) { | |
865 | memcpy(((u8 *)adapter->txd_ring) + offset, skb->data, skb->len); | |
866 | offset += ((u32)(skb->len + 3) & ~3); | |
867 | } else { | |
868 | memcpy(((u8 *)adapter->txd_ring)+offset, skb->data, copy_len); | |
869 | memcpy((u8 *)adapter->txd_ring, skb->data+copy_len, | |
870 | skb->len-copy_len); | |
871 | offset = ((u32)(skb->len-copy_len + 3) & ~3); | |
872 | } | |
873 | #ifdef NETIF_F_HW_VLAN_TX | |
874 | if (adapter->vlgrp && vlan_tx_tag_present(skb)) { | |
875 | u16 vlan_tag = vlan_tx_tag_get(skb); | |
876 | vlan_tag = (vlan_tag << 4) | | |
877 | (vlan_tag >> 13) | | |
878 | ((vlan_tag >> 9) & 0x8); | |
879 | txph->ins_vlan = 1; | |
880 | txph->vlan = vlan_tag; | |
881 | } | |
882 | #endif | |
883 | if (offset >= adapter->txd_ring_size) | |
884 | offset -= adapter->txd_ring_size; | |
885 | adapter->txd_write_ptr = offset; | |
886 | ||
887 | /* clear txs before send */ | |
888 | adapter->txs_ring[adapter->txs_next_clear].update = 0; | |
889 | if (++adapter->txs_next_clear == adapter->txs_ring_size) | |
890 | adapter->txs_next_clear = 0; | |
891 | ||
892 | ATL2_WRITE_REGW(&adapter->hw, REG_MB_TXD_WR_IDX, | |
893 | (adapter->txd_write_ptr >> 2)); | |
894 | ||
87241840 | 895 | mmiowb(); |
452c1ce2 CS |
896 | netdev->trans_start = jiffies; |
897 | dev_kfree_skb_any(skb); | |
898 | return NETDEV_TX_OK; | |
899 | } | |
900 | ||
452c1ce2 CS |
901 | /* |
902 | * atl2_change_mtu - Change the Maximum Transfer Unit | |
903 | * @netdev: network interface device structure | |
904 | * @new_mtu: new value for maximum frame size | |
905 | * | |
906 | * Returns 0 on success, negative on failure | |
907 | */ | |
908 | static int atl2_change_mtu(struct net_device *netdev, int new_mtu) | |
909 | { | |
910 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
911 | struct atl2_hw *hw = &adapter->hw; | |
912 | ||
913 | if ((new_mtu < 40) || (new_mtu > (ETH_DATA_LEN + VLAN_SIZE))) | |
914 | return -EINVAL; | |
915 | ||
916 | /* set MTU */ | |
917 | if (hw->max_frame_size != new_mtu) { | |
918 | netdev->mtu = new_mtu; | |
919 | ATL2_WRITE_REG(hw, REG_MTU, new_mtu + ENET_HEADER_SIZE + | |
920 | VLAN_SIZE + ETHERNET_FCS_SIZE); | |
921 | } | |
922 | ||
923 | return 0; | |
924 | } | |
925 | ||
926 | /* | |
927 | * atl2_set_mac - Change the Ethernet Address of the NIC | |
928 | * @netdev: network interface device structure | |
929 | * @p: pointer to an address structure | |
930 | * | |
931 | * Returns 0 on success, negative on failure | |
932 | */ | |
933 | static int atl2_set_mac(struct net_device *netdev, void *p) | |
934 | { | |
935 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
936 | struct sockaddr *addr = p; | |
937 | ||
938 | if (!is_valid_ether_addr(addr->sa_data)) | |
939 | return -EADDRNOTAVAIL; | |
940 | ||
941 | if (netif_running(netdev)) | |
942 | return -EBUSY; | |
943 | ||
944 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
945 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
946 | ||
947 | atl2_set_mac_addr(&adapter->hw); | |
948 | ||
949 | return 0; | |
950 | } | |
951 | ||
952 | /* | |
953 | * atl2_mii_ioctl - | |
954 | * @netdev: | |
955 | * @ifreq: | |
956 | * @cmd: | |
957 | */ | |
958 | static int atl2_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
959 | { | |
960 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
961 | struct mii_ioctl_data *data = if_mii(ifr); | |
962 | unsigned long flags; | |
963 | ||
964 | switch (cmd) { | |
965 | case SIOCGMIIPHY: | |
966 | data->phy_id = 0; | |
967 | break; | |
968 | case SIOCGMIIREG: | |
969 | if (!capable(CAP_NET_ADMIN)) | |
970 | return -EPERM; | |
971 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
972 | if (atl2_read_phy_reg(&adapter->hw, | |
973 | data->reg_num & 0x1F, &data->val_out)) { | |
974 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
975 | return -EIO; | |
976 | } | |
977 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
978 | break; | |
979 | case SIOCSMIIREG: | |
980 | if (!capable(CAP_NET_ADMIN)) | |
981 | return -EPERM; | |
982 | if (data->reg_num & ~(0x1F)) | |
983 | return -EFAULT; | |
984 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
985 | if (atl2_write_phy_reg(&adapter->hw, data->reg_num, | |
986 | data->val_in)) { | |
987 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
988 | return -EIO; | |
989 | } | |
990 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
991 | break; | |
992 | default: | |
993 | return -EOPNOTSUPP; | |
994 | } | |
995 | return 0; | |
996 | } | |
997 | ||
998 | /* | |
999 | * atl2_ioctl - | |
1000 | * @netdev: | |
1001 | * @ifreq: | |
1002 | * @cmd: | |
1003 | */ | |
1004 | static int atl2_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
1005 | { | |
1006 | switch (cmd) { | |
1007 | case SIOCGMIIPHY: | |
1008 | case SIOCGMIIREG: | |
1009 | case SIOCSMIIREG: | |
1010 | return atl2_mii_ioctl(netdev, ifr, cmd); | |
1011 | #ifdef ETHTOOL_OPS_COMPAT | |
1012 | case SIOCETHTOOL: | |
1013 | return ethtool_ioctl(ifr); | |
1014 | #endif | |
1015 | default: | |
1016 | return -EOPNOTSUPP; | |
1017 | } | |
1018 | } | |
1019 | ||
1020 | /* | |
1021 | * atl2_tx_timeout - Respond to a Tx Hang | |
1022 | * @netdev: network interface device structure | |
1023 | */ | |
1024 | static void atl2_tx_timeout(struct net_device *netdev) | |
1025 | { | |
1026 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
1027 | ||
1028 | /* Do the reset outside of interrupt context */ | |
1029 | schedule_work(&adapter->reset_task); | |
1030 | } | |
1031 | ||
1032 | /* | |
1033 | * atl2_watchdog - Timer Call-back | |
1034 | * @data: pointer to netdev cast into an unsigned long | |
1035 | */ | |
1036 | static void atl2_watchdog(unsigned long data) | |
1037 | { | |
1038 | struct atl2_adapter *adapter = (struct atl2_adapter *) data; | |
452c1ce2 CS |
1039 | |
1040 | if (!test_bit(__ATL2_DOWN, &adapter->flags)) { | |
02e71731 SH |
1041 | u32 drop_rxd, drop_rxs; |
1042 | unsigned long flags; | |
1043 | ||
452c1ce2 CS |
1044 | spin_lock_irqsave(&adapter->stats_lock, flags); |
1045 | drop_rxd = ATL2_READ_REG(&adapter->hw, REG_STS_RXD_OV); | |
1046 | drop_rxs = ATL2_READ_REG(&adapter->hw, REG_STS_RXS_OV); | |
452c1ce2 CS |
1047 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1048 | ||
02e71731 SH |
1049 | adapter->netdev->stats.rx_over_errors += drop_rxd + drop_rxs; |
1050 | ||
452c1ce2 | 1051 | /* Reset the timer */ |
e053b628 SH |
1052 | mod_timer(&adapter->watchdog_timer, |
1053 | round_jiffies(jiffies + 4 * HZ)); | |
452c1ce2 CS |
1054 | } |
1055 | } | |
1056 | ||
1057 | /* | |
1058 | * atl2_phy_config - Timer Call-back | |
1059 | * @data: pointer to netdev cast into an unsigned long | |
1060 | */ | |
1061 | static void atl2_phy_config(unsigned long data) | |
1062 | { | |
1063 | struct atl2_adapter *adapter = (struct atl2_adapter *) data; | |
1064 | struct atl2_hw *hw = &adapter->hw; | |
1065 | unsigned long flags; | |
1066 | ||
1067 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
1068 | atl2_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg); | |
1069 | atl2_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN | | |
1070 | MII_CR_RESTART_AUTO_NEG); | |
1071 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1072 | clear_bit(0, &adapter->cfg_phy); | |
1073 | } | |
1074 | ||
1075 | static int atl2_up(struct atl2_adapter *adapter) | |
1076 | { | |
1077 | struct net_device *netdev = adapter->netdev; | |
1078 | int err = 0; | |
1079 | u32 val; | |
1080 | ||
1081 | /* hardware has been reset, we need to reload some things */ | |
1082 | ||
1083 | err = atl2_init_hw(&adapter->hw); | |
1084 | if (err) { | |
1085 | err = -EIO; | |
1086 | return err; | |
1087 | } | |
1088 | ||
1089 | atl2_set_multi(netdev); | |
1090 | init_ring_ptrs(adapter); | |
1091 | ||
1092 | #ifdef NETIF_F_HW_VLAN_TX | |
1093 | atl2_restore_vlan(adapter); | |
1094 | #endif | |
1095 | ||
1096 | if (atl2_configure(adapter)) { | |
1097 | err = -EIO; | |
1098 | goto err_up; | |
1099 | } | |
1100 | ||
1101 | clear_bit(__ATL2_DOWN, &adapter->flags); | |
1102 | ||
1103 | val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL); | |
1104 | ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, val | | |
1105 | MASTER_CTRL_MANUAL_INT); | |
1106 | ||
1107 | atl2_irq_enable(adapter); | |
1108 | ||
1109 | err_up: | |
1110 | return err; | |
1111 | } | |
1112 | ||
1113 | static void atl2_reinit_locked(struct atl2_adapter *adapter) | |
1114 | { | |
1115 | WARN_ON(in_interrupt()); | |
1116 | while (test_and_set_bit(__ATL2_RESETTING, &adapter->flags)) | |
1117 | msleep(1); | |
1118 | atl2_down(adapter); | |
1119 | atl2_up(adapter); | |
1120 | clear_bit(__ATL2_RESETTING, &adapter->flags); | |
1121 | } | |
1122 | ||
1123 | static void atl2_reset_task(struct work_struct *work) | |
1124 | { | |
1125 | struct atl2_adapter *adapter; | |
1126 | adapter = container_of(work, struct atl2_adapter, reset_task); | |
1127 | ||
1128 | atl2_reinit_locked(adapter); | |
1129 | } | |
1130 | ||
1131 | static void atl2_setup_mac_ctrl(struct atl2_adapter *adapter) | |
1132 | { | |
1133 | u32 value; | |
1134 | struct atl2_hw *hw = &adapter->hw; | |
1135 | struct net_device *netdev = adapter->netdev; | |
1136 | ||
1137 | /* Config MAC CTRL Register */ | |
1138 | value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN | MAC_CTRL_MACLP_CLK_PHY; | |
1139 | ||
1140 | /* duplex */ | |
1141 | if (FULL_DUPLEX == adapter->link_duplex) | |
1142 | value |= MAC_CTRL_DUPLX; | |
1143 | ||
1144 | /* flow control */ | |
1145 | value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); | |
1146 | ||
1147 | /* PAD & CRC */ | |
1148 | value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); | |
1149 | ||
1150 | /* preamble length */ | |
1151 | value |= (((u32)adapter->hw.preamble_len & MAC_CTRL_PRMLEN_MASK) << | |
1152 | MAC_CTRL_PRMLEN_SHIFT); | |
1153 | ||
1154 | /* vlan */ | |
1155 | if (adapter->vlgrp) | |
1156 | value |= MAC_CTRL_RMV_VLAN; | |
1157 | ||
1158 | /* filter mode */ | |
1159 | value |= MAC_CTRL_BC_EN; | |
1160 | if (netdev->flags & IFF_PROMISC) | |
1161 | value |= MAC_CTRL_PROMIS_EN; | |
1162 | else if (netdev->flags & IFF_ALLMULTI) | |
1163 | value |= MAC_CTRL_MC_ALL_EN; | |
1164 | ||
1165 | /* half retry buffer */ | |
1166 | value |= (((u32)(adapter->hw.retry_buf & | |
1167 | MAC_CTRL_HALF_LEFT_BUF_MASK)) << MAC_CTRL_HALF_LEFT_BUF_SHIFT); | |
1168 | ||
1169 | ATL2_WRITE_REG(hw, REG_MAC_CTRL, value); | |
1170 | } | |
1171 | ||
1172 | static int atl2_check_link(struct atl2_adapter *adapter) | |
1173 | { | |
1174 | struct atl2_hw *hw = &adapter->hw; | |
1175 | struct net_device *netdev = adapter->netdev; | |
1176 | int ret_val; | |
1177 | u16 speed, duplex, phy_data; | |
1178 | int reconfig = 0; | |
1179 | ||
1180 | /* MII_BMSR must read twise */ | |
1181 | atl2_read_phy_reg(hw, MII_BMSR, &phy_data); | |
1182 | atl2_read_phy_reg(hw, MII_BMSR, &phy_data); | |
1183 | if (!(phy_data&BMSR_LSTATUS)) { /* link down */ | |
1184 | if (netif_carrier_ok(netdev)) { /* old link state: Up */ | |
1185 | u32 value; | |
1186 | /* disable rx */ | |
1187 | value = ATL2_READ_REG(hw, REG_MAC_CTRL); | |
1188 | value &= ~MAC_CTRL_RX_EN; | |
1189 | ATL2_WRITE_REG(hw, REG_MAC_CTRL, value); | |
1190 | adapter->link_speed = SPEED_0; | |
1191 | netif_carrier_off(netdev); | |
1192 | netif_stop_queue(netdev); | |
1193 | } | |
1194 | return 0; | |
1195 | } | |
1196 | ||
1197 | /* Link Up */ | |
1198 | ret_val = atl2_get_speed_and_duplex(hw, &speed, &duplex); | |
1199 | if (ret_val) | |
1200 | return ret_val; | |
1201 | switch (hw->MediaType) { | |
1202 | case MEDIA_TYPE_100M_FULL: | |
1203 | if (speed != SPEED_100 || duplex != FULL_DUPLEX) | |
1204 | reconfig = 1; | |
1205 | break; | |
1206 | case MEDIA_TYPE_100M_HALF: | |
1207 | if (speed != SPEED_100 || duplex != HALF_DUPLEX) | |
1208 | reconfig = 1; | |
1209 | break; | |
1210 | case MEDIA_TYPE_10M_FULL: | |
1211 | if (speed != SPEED_10 || duplex != FULL_DUPLEX) | |
1212 | reconfig = 1; | |
1213 | break; | |
1214 | case MEDIA_TYPE_10M_HALF: | |
1215 | if (speed != SPEED_10 || duplex != HALF_DUPLEX) | |
1216 | reconfig = 1; | |
1217 | break; | |
1218 | } | |
1219 | /* link result is our setting */ | |
1220 | if (reconfig == 0) { | |
1221 | if (adapter->link_speed != speed || | |
1222 | adapter->link_duplex != duplex) { | |
1223 | adapter->link_speed = speed; | |
1224 | adapter->link_duplex = duplex; | |
1225 | atl2_setup_mac_ctrl(adapter); | |
1226 | printk(KERN_INFO "%s: %s NIC Link is Up<%d Mbps %s>\n", | |
1227 | atl2_driver_name, netdev->name, | |
1228 | adapter->link_speed, | |
1229 | adapter->link_duplex == FULL_DUPLEX ? | |
1230 | "Full Duplex" : "Half Duplex"); | |
1231 | } | |
1232 | ||
1233 | if (!netif_carrier_ok(netdev)) { /* Link down -> Up */ | |
1234 | netif_carrier_on(netdev); | |
1235 | netif_wake_queue(netdev); | |
1236 | } | |
1237 | return 0; | |
1238 | } | |
1239 | ||
1240 | /* change original link status */ | |
1241 | if (netif_carrier_ok(netdev)) { | |
1242 | u32 value; | |
1243 | /* disable rx */ | |
1244 | value = ATL2_READ_REG(hw, REG_MAC_CTRL); | |
1245 | value &= ~MAC_CTRL_RX_EN; | |
1246 | ATL2_WRITE_REG(hw, REG_MAC_CTRL, value); | |
1247 | ||
1248 | adapter->link_speed = SPEED_0; | |
1249 | netif_carrier_off(netdev); | |
1250 | netif_stop_queue(netdev); | |
1251 | } | |
1252 | ||
1253 | /* auto-neg, insert timer to re-config phy | |
1254 | * (if interval smaller than 5 seconds, something strange) */ | |
1255 | if (!test_bit(__ATL2_DOWN, &adapter->flags)) { | |
1256 | if (!test_and_set_bit(0, &adapter->cfg_phy)) | |
e053b628 SH |
1257 | mod_timer(&adapter->phy_config_timer, |
1258 | round_jiffies(jiffies + 5 * HZ)); | |
452c1ce2 CS |
1259 | } |
1260 | ||
1261 | return 0; | |
1262 | } | |
1263 | ||
1264 | /* | |
1265 | * atl2_link_chg_task - deal with link change event Out of interrupt context | |
1266 | * @netdev: network interface device structure | |
1267 | */ | |
1268 | static void atl2_link_chg_task(struct work_struct *work) | |
1269 | { | |
1270 | struct atl2_adapter *adapter; | |
1271 | unsigned long flags; | |
1272 | ||
1273 | adapter = container_of(work, struct atl2_adapter, link_chg_task); | |
1274 | ||
1275 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
1276 | atl2_check_link(adapter); | |
1277 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1278 | } | |
1279 | ||
1280 | static void atl2_setup_pcicmd(struct pci_dev *pdev) | |
1281 | { | |
1282 | u16 cmd; | |
1283 | ||
1284 | pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
1285 | ||
1286 | if (cmd & PCI_COMMAND_INTX_DISABLE) | |
1287 | cmd &= ~PCI_COMMAND_INTX_DISABLE; | |
1288 | if (cmd & PCI_COMMAND_IO) | |
1289 | cmd &= ~PCI_COMMAND_IO; | |
1290 | if (0 == (cmd & PCI_COMMAND_MEMORY)) | |
1291 | cmd |= PCI_COMMAND_MEMORY; | |
1292 | if (0 == (cmd & PCI_COMMAND_MASTER)) | |
1293 | cmd |= PCI_COMMAND_MASTER; | |
1294 | pci_write_config_word(pdev, PCI_COMMAND, cmd); | |
1295 | ||
1296 | /* | |
1297 | * some motherboards BIOS(PXE/EFI) driver may set PME | |
1298 | * while they transfer control to OS (Windows/Linux) | |
1299 | * so we should clear this bit before NIC work normally | |
1300 | */ | |
1301 | pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0); | |
1302 | } | |
1303 | ||
8d1b1fc9 KH |
1304 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1305 | static void atl2_poll_controller(struct net_device *netdev) | |
1306 | { | |
1307 | disable_irq(netdev->irq); | |
1308 | atl2_intr(netdev->irq, netdev); | |
1309 | enable_irq(netdev->irq); | |
1310 | } | |
1311 | #endif | |
1312 | ||
825a84d1 SH |
1313 | |
1314 | static const struct net_device_ops atl2_netdev_ops = { | |
1315 | .ndo_open = atl2_open, | |
1316 | .ndo_stop = atl2_close, | |
00829823 | 1317 | .ndo_start_xmit = atl2_xmit_frame, |
825a84d1 SH |
1318 | .ndo_set_multicast_list = atl2_set_multi, |
1319 | .ndo_validate_addr = eth_validate_addr, | |
1320 | .ndo_set_mac_address = atl2_set_mac, | |
1321 | .ndo_change_mtu = atl2_change_mtu, | |
1322 | .ndo_do_ioctl = atl2_ioctl, | |
1323 | .ndo_tx_timeout = atl2_tx_timeout, | |
1324 | .ndo_vlan_rx_register = atl2_vlan_rx_register, | |
1325 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1326 | .ndo_poll_controller = atl2_poll_controller, | |
1327 | #endif | |
1328 | }; | |
1329 | ||
452c1ce2 CS |
1330 | /* |
1331 | * atl2_probe - Device Initialization Routine | |
1332 | * @pdev: PCI device information struct | |
1333 | * @ent: entry in atl2_pci_tbl | |
1334 | * | |
1335 | * Returns 0 on success, negative on failure | |
1336 | * | |
1337 | * atl2_probe initializes an adapter identified by a pci_dev structure. | |
1338 | * The OS initialization, configuring of the adapter private structure, | |
1339 | * and a hardware reset occur. | |
1340 | */ | |
1341 | static int __devinit atl2_probe(struct pci_dev *pdev, | |
1342 | const struct pci_device_id *ent) | |
1343 | { | |
1344 | struct net_device *netdev; | |
1345 | struct atl2_adapter *adapter; | |
1346 | static int cards_found; | |
1347 | unsigned long mmio_start; | |
1348 | int mmio_len; | |
1349 | int err; | |
1350 | ||
1351 | cards_found = 0; | |
1352 | ||
1353 | err = pci_enable_device(pdev); | |
1354 | if (err) | |
1355 | return err; | |
1356 | ||
1357 | /* | |
1358 | * atl2 is a shared-high-32-bit device, so we're stuck with 32-bit DMA | |
1359 | * until the kernel has the proper infrastructure to support 64-bit DMA | |
1360 | * on these devices. | |
1361 | */ | |
284901a9 YH |
1362 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) && |
1363 | pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { | |
452c1ce2 CS |
1364 | printk(KERN_ERR "atl2: No usable DMA configuration, aborting\n"); |
1365 | goto err_dma; | |
1366 | } | |
1367 | ||
1368 | /* Mark all PCI regions associated with PCI device | |
1369 | * pdev as being reserved by owner atl2_driver_name */ | |
1370 | err = pci_request_regions(pdev, atl2_driver_name); | |
1371 | if (err) | |
1372 | goto err_pci_reg; | |
1373 | ||
1374 | /* Enables bus-mastering on the device and calls | |
1375 | * pcibios_set_master to do the needed arch specific settings */ | |
1376 | pci_set_master(pdev); | |
1377 | ||
1378 | err = -ENOMEM; | |
1379 | netdev = alloc_etherdev(sizeof(struct atl2_adapter)); | |
1380 | if (!netdev) | |
1381 | goto err_alloc_etherdev; | |
1382 | ||
1383 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
1384 | ||
1385 | pci_set_drvdata(pdev, netdev); | |
1386 | adapter = netdev_priv(netdev); | |
1387 | adapter->netdev = netdev; | |
1388 | adapter->pdev = pdev; | |
1389 | adapter->hw.back = adapter; | |
1390 | ||
1391 | mmio_start = pci_resource_start(pdev, 0x0); | |
1392 | mmio_len = pci_resource_len(pdev, 0x0); | |
1393 | ||
1394 | adapter->hw.mem_rang = (u32)mmio_len; | |
1395 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); | |
1396 | if (!adapter->hw.hw_addr) { | |
1397 | err = -EIO; | |
1398 | goto err_ioremap; | |
1399 | } | |
1400 | ||
1401 | atl2_setup_pcicmd(pdev); | |
1402 | ||
825a84d1 | 1403 | netdev->netdev_ops = &atl2_netdev_ops; |
452c1ce2 | 1404 | atl2_set_ethtool_ops(netdev); |
452c1ce2 | 1405 | netdev->watchdog_timeo = 5 * HZ; |
452c1ce2 CS |
1406 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
1407 | ||
1408 | netdev->mem_start = mmio_start; | |
1409 | netdev->mem_end = mmio_start + mmio_len; | |
1410 | adapter->bd_number = cards_found; | |
1411 | adapter->pci_using_64 = false; | |
1412 | ||
1413 | /* setup the private structure */ | |
1414 | err = atl2_sw_init(adapter); | |
1415 | if (err) | |
1416 | goto err_sw_init; | |
1417 | ||
1418 | err = -EIO; | |
1419 | ||
1420 | #ifdef NETIF_F_HW_VLAN_TX | |
1421 | netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX); | |
1422 | #endif | |
1423 | ||
452c1ce2 CS |
1424 | /* Init PHY as early as possible due to power saving issue */ |
1425 | atl2_phy_init(&adapter->hw); | |
1426 | ||
1427 | /* reset the controller to | |
1428 | * put the device in a known good starting state */ | |
1429 | ||
1430 | if (atl2_reset_hw(&adapter->hw)) { | |
1431 | err = -EIO; | |
1432 | goto err_reset; | |
1433 | } | |
1434 | ||
1435 | /* copy the MAC address out of the EEPROM */ | |
1436 | atl2_read_mac_addr(&adapter->hw); | |
1437 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
1438 | /* FIXME: do we still need this? */ | |
1439 | #ifdef ETHTOOL_GPERMADDR | |
1440 | memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); | |
1441 | ||
1442 | if (!is_valid_ether_addr(netdev->perm_addr)) { | |
1443 | #else | |
1444 | if (!is_valid_ether_addr(netdev->dev_addr)) { | |
1445 | #endif | |
1446 | err = -EIO; | |
1447 | goto err_eeprom; | |
1448 | } | |
1449 | ||
1450 | atl2_check_options(adapter); | |
1451 | ||
1452 | init_timer(&adapter->watchdog_timer); | |
1453 | adapter->watchdog_timer.function = &atl2_watchdog; | |
1454 | adapter->watchdog_timer.data = (unsigned long) adapter; | |
1455 | ||
1456 | init_timer(&adapter->phy_config_timer); | |
1457 | adapter->phy_config_timer.function = &atl2_phy_config; | |
1458 | adapter->phy_config_timer.data = (unsigned long) adapter; | |
1459 | ||
1460 | INIT_WORK(&adapter->reset_task, atl2_reset_task); | |
1461 | INIT_WORK(&adapter->link_chg_task, atl2_link_chg_task); | |
1462 | ||
1463 | strcpy(netdev->name, "eth%d"); /* ?? */ | |
1464 | err = register_netdev(netdev); | |
1465 | if (err) | |
1466 | goto err_register; | |
1467 | ||
1468 | /* assume we have no link for now */ | |
1469 | netif_carrier_off(netdev); | |
1470 | netif_stop_queue(netdev); | |
1471 | ||
1472 | cards_found++; | |
1473 | ||
1474 | return 0; | |
1475 | ||
1476 | err_reset: | |
1477 | err_register: | |
1478 | err_sw_init: | |
1479 | err_eeprom: | |
1480 | iounmap(adapter->hw.hw_addr); | |
1481 | err_ioremap: | |
1482 | free_netdev(netdev); | |
1483 | err_alloc_etherdev: | |
1484 | pci_release_regions(pdev); | |
1485 | err_pci_reg: | |
1486 | err_dma: | |
1487 | pci_disable_device(pdev); | |
1488 | return err; | |
1489 | } | |
1490 | ||
1491 | /* | |
1492 | * atl2_remove - Device Removal Routine | |
1493 | * @pdev: PCI device information struct | |
1494 | * | |
1495 | * atl2_remove is called by the PCI subsystem to alert the driver | |
1496 | * that it should release a PCI device. The could be caused by a | |
1497 | * Hot-Plug event, or because the driver is going to be removed from | |
1498 | * memory. | |
1499 | */ | |
1500 | /* FIXME: write the original MAC address back in case it was changed from a | |
1501 | * BIOS-set value, as in atl1 -- CHS */ | |
1502 | static void __devexit atl2_remove(struct pci_dev *pdev) | |
1503 | { | |
1504 | struct net_device *netdev = pci_get_drvdata(pdev); | |
1505 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
1506 | ||
1507 | /* flush_scheduled work may reschedule our watchdog task, so | |
1508 | * explicitly disable watchdog tasks from being rescheduled */ | |
1509 | set_bit(__ATL2_DOWN, &adapter->flags); | |
1510 | ||
1511 | del_timer_sync(&adapter->watchdog_timer); | |
1512 | del_timer_sync(&adapter->phy_config_timer); | |
1513 | ||
1514 | flush_scheduled_work(); | |
1515 | ||
1516 | unregister_netdev(netdev); | |
1517 | ||
1518 | atl2_force_ps(&adapter->hw); | |
1519 | ||
1520 | iounmap(adapter->hw.hw_addr); | |
1521 | pci_release_regions(pdev); | |
1522 | ||
1523 | free_netdev(netdev); | |
1524 | ||
1525 | pci_disable_device(pdev); | |
1526 | } | |
1527 | ||
1528 | static int atl2_suspend(struct pci_dev *pdev, pm_message_t state) | |
1529 | { | |
1530 | struct net_device *netdev = pci_get_drvdata(pdev); | |
1531 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
1532 | struct atl2_hw *hw = &adapter->hw; | |
1533 | u16 speed, duplex; | |
1534 | u32 ctrl = 0; | |
1535 | u32 wufc = adapter->wol; | |
1536 | ||
1537 | #ifdef CONFIG_PM | |
1538 | int retval = 0; | |
1539 | #endif | |
1540 | ||
1541 | netif_device_detach(netdev); | |
1542 | ||
1543 | if (netif_running(netdev)) { | |
1544 | WARN_ON(test_bit(__ATL2_RESETTING, &adapter->flags)); | |
1545 | atl2_down(adapter); | |
1546 | } | |
1547 | ||
1548 | #ifdef CONFIG_PM | |
1549 | retval = pci_save_state(pdev); | |
1550 | if (retval) | |
1551 | return retval; | |
1552 | #endif | |
1553 | ||
1554 | atl2_read_phy_reg(hw, MII_BMSR, (u16 *)&ctrl); | |
1555 | atl2_read_phy_reg(hw, MII_BMSR, (u16 *)&ctrl); | |
1556 | if (ctrl & BMSR_LSTATUS) | |
1557 | wufc &= ~ATLX_WUFC_LNKC; | |
1558 | ||
1559 | if (0 != (ctrl & BMSR_LSTATUS) && 0 != wufc) { | |
1560 | u32 ret_val; | |
1561 | /* get current link speed & duplex */ | |
1562 | ret_val = atl2_get_speed_and_duplex(hw, &speed, &duplex); | |
1563 | if (ret_val) { | |
1564 | printk(KERN_DEBUG | |
1565 | "%s: get speed&duplex error while suspend\n", | |
1566 | atl2_driver_name); | |
1567 | goto wol_dis; | |
1568 | } | |
1569 | ||
1570 | ctrl = 0; | |
1571 | ||
1572 | /* turn on magic packet wol */ | |
1573 | if (wufc & ATLX_WUFC_MAG) | |
1574 | ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN); | |
1575 | ||
1576 | /* ignore Link Chg event when Link is up */ | |
1577 | ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl); | |
1578 | ||
1579 | /* Config MAC CTRL Register */ | |
1580 | ctrl = MAC_CTRL_RX_EN | MAC_CTRL_MACLP_CLK_PHY; | |
1581 | if (FULL_DUPLEX == adapter->link_duplex) | |
1582 | ctrl |= MAC_CTRL_DUPLX; | |
1583 | ctrl |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); | |
1584 | ctrl |= (((u32)adapter->hw.preamble_len & | |
1585 | MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT); | |
1586 | ctrl |= (((u32)(adapter->hw.retry_buf & | |
1587 | MAC_CTRL_HALF_LEFT_BUF_MASK)) << | |
1588 | MAC_CTRL_HALF_LEFT_BUF_SHIFT); | |
1589 | if (wufc & ATLX_WUFC_MAG) { | |
1590 | /* magic packet maybe Broadcast&multicast&Unicast */ | |
1591 | ctrl |= MAC_CTRL_BC_EN; | |
1592 | } | |
1593 | ||
1594 | ATL2_WRITE_REG(hw, REG_MAC_CTRL, ctrl); | |
1595 | ||
1596 | /* pcie patch */ | |
1597 | ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC); | |
1598 | ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; | |
1599 | ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); | |
1600 | ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1); | |
1601 | ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK; | |
1602 | ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl); | |
1603 | ||
1604 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); | |
1605 | goto suspend_exit; | |
1606 | } | |
1607 | ||
1608 | if (0 == (ctrl&BMSR_LSTATUS) && 0 != (wufc&ATLX_WUFC_LNKC)) { | |
1609 | /* link is down, so only LINK CHG WOL event enable */ | |
1610 | ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN); | |
1611 | ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl); | |
1612 | ATL2_WRITE_REG(hw, REG_MAC_CTRL, 0); | |
1613 | ||
1614 | /* pcie patch */ | |
1615 | ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC); | |
1616 | ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; | |
1617 | ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); | |
1618 | ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1); | |
1619 | ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK; | |
1620 | ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl); | |
1621 | ||
1622 | hw->phy_configured = false; /* re-init PHY when resume */ | |
1623 | ||
1624 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); | |
1625 | ||
1626 | goto suspend_exit; | |
1627 | } | |
1628 | ||
1629 | wol_dis: | |
1630 | /* WOL disabled */ | |
1631 | ATL2_WRITE_REG(hw, REG_WOL_CTRL, 0); | |
1632 | ||
1633 | /* pcie patch */ | |
1634 | ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC); | |
1635 | ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; | |
1636 | ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); | |
1637 | ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1); | |
1638 | ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK; | |
1639 | ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl); | |
1640 | ||
1641 | atl2_force_ps(hw); | |
1642 | hw->phy_configured = false; /* re-init PHY when resume */ | |
1643 | ||
1644 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); | |
1645 | ||
1646 | suspend_exit: | |
1647 | if (netif_running(netdev)) | |
1648 | atl2_free_irq(adapter); | |
1649 | ||
1650 | pci_disable_device(pdev); | |
1651 | ||
1652 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
1653 | ||
1654 | return 0; | |
1655 | } | |
1656 | ||
1657 | #ifdef CONFIG_PM | |
1658 | static int atl2_resume(struct pci_dev *pdev) | |
1659 | { | |
1660 | struct net_device *netdev = pci_get_drvdata(pdev); | |
1661 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
1662 | u32 err; | |
1663 | ||
1664 | pci_set_power_state(pdev, PCI_D0); | |
1665 | pci_restore_state(pdev); | |
1666 | ||
1667 | err = pci_enable_device(pdev); | |
1668 | if (err) { | |
1669 | printk(KERN_ERR | |
1670 | "atl2: Cannot enable PCI device from suspend\n"); | |
1671 | return err; | |
1672 | } | |
1673 | ||
1674 | pci_set_master(pdev); | |
1675 | ||
1676 | ATL2_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */ | |
1677 | ||
1678 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
1679 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1680 | ||
1681 | ATL2_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); | |
1682 | ||
a849854f AJ |
1683 | if (netif_running(netdev)) { |
1684 | err = atl2_request_irq(adapter); | |
1685 | if (err) | |
1686 | return err; | |
1687 | } | |
452c1ce2 CS |
1688 | |
1689 | atl2_reset_hw(&adapter->hw); | |
1690 | ||
1691 | if (netif_running(netdev)) | |
1692 | atl2_up(adapter); | |
1693 | ||
1694 | netif_device_attach(netdev); | |
1695 | ||
1696 | return 0; | |
1697 | } | |
1698 | #endif | |
1699 | ||
1700 | static void atl2_shutdown(struct pci_dev *pdev) | |
1701 | { | |
1702 | atl2_suspend(pdev, PMSG_SUSPEND); | |
1703 | } | |
1704 | ||
1705 | static struct pci_driver atl2_driver = { | |
1706 | .name = atl2_driver_name, | |
1707 | .id_table = atl2_pci_tbl, | |
1708 | .probe = atl2_probe, | |
1709 | .remove = __devexit_p(atl2_remove), | |
1710 | /* Power Managment Hooks */ | |
1711 | .suspend = atl2_suspend, | |
1712 | #ifdef CONFIG_PM | |
1713 | .resume = atl2_resume, | |
1714 | #endif | |
1715 | .shutdown = atl2_shutdown, | |
1716 | }; | |
1717 | ||
1718 | /* | |
1719 | * atl2_init_module - Driver Registration Routine | |
1720 | * | |
1721 | * atl2_init_module is the first routine called when the driver is | |
1722 | * loaded. All it does is register with the PCI subsystem. | |
1723 | */ | |
1724 | static int __init atl2_init_module(void) | |
1725 | { | |
1726 | printk(KERN_INFO "%s - version %s\n", atl2_driver_string, | |
1727 | atl2_driver_version); | |
1728 | printk(KERN_INFO "%s\n", atl2_copyright); | |
1729 | return pci_register_driver(&atl2_driver); | |
1730 | } | |
1731 | module_init(atl2_init_module); | |
1732 | ||
1733 | /* | |
1734 | * atl2_exit_module - Driver Exit Cleanup Routine | |
1735 | * | |
1736 | * atl2_exit_module is called just before the driver is removed | |
1737 | * from memory. | |
1738 | */ | |
1739 | static void __exit atl2_exit_module(void) | |
1740 | { | |
1741 | pci_unregister_driver(&atl2_driver); | |
1742 | } | |
1743 | module_exit(atl2_exit_module); | |
1744 | ||
1745 | static void atl2_read_pci_cfg(struct atl2_hw *hw, u32 reg, u16 *value) | |
1746 | { | |
1747 | struct atl2_adapter *adapter = hw->back; | |
1748 | pci_read_config_word(adapter->pdev, reg, value); | |
1749 | } | |
1750 | ||
1751 | static void atl2_write_pci_cfg(struct atl2_hw *hw, u32 reg, u16 *value) | |
1752 | { | |
1753 | struct atl2_adapter *adapter = hw->back; | |
1754 | pci_write_config_word(adapter->pdev, reg, *value); | |
1755 | } | |
1756 | ||
1757 | static int atl2_get_settings(struct net_device *netdev, | |
1758 | struct ethtool_cmd *ecmd) | |
1759 | { | |
1760 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
1761 | struct atl2_hw *hw = &adapter->hw; | |
1762 | ||
1763 | ecmd->supported = (SUPPORTED_10baseT_Half | | |
1764 | SUPPORTED_10baseT_Full | | |
1765 | SUPPORTED_100baseT_Half | | |
1766 | SUPPORTED_100baseT_Full | | |
1767 | SUPPORTED_Autoneg | | |
1768 | SUPPORTED_TP); | |
1769 | ecmd->advertising = ADVERTISED_TP; | |
1770 | ||
1771 | ecmd->advertising |= ADVERTISED_Autoneg; | |
1772 | ecmd->advertising |= hw->autoneg_advertised; | |
1773 | ||
1774 | ecmd->port = PORT_TP; | |
1775 | ecmd->phy_address = 0; | |
1776 | ecmd->transceiver = XCVR_INTERNAL; | |
1777 | ||
1778 | if (adapter->link_speed != SPEED_0) { | |
1779 | ecmd->speed = adapter->link_speed; | |
1780 | if (adapter->link_duplex == FULL_DUPLEX) | |
1781 | ecmd->duplex = DUPLEX_FULL; | |
1782 | else | |
1783 | ecmd->duplex = DUPLEX_HALF; | |
1784 | } else { | |
1785 | ecmd->speed = -1; | |
1786 | ecmd->duplex = -1; | |
1787 | } | |
1788 | ||
1789 | ecmd->autoneg = AUTONEG_ENABLE; | |
1790 | return 0; | |
1791 | } | |
1792 | ||
1793 | static int atl2_set_settings(struct net_device *netdev, | |
1794 | struct ethtool_cmd *ecmd) | |
1795 | { | |
1796 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
1797 | struct atl2_hw *hw = &adapter->hw; | |
1798 | ||
1799 | while (test_and_set_bit(__ATL2_RESETTING, &adapter->flags)) | |
1800 | msleep(1); | |
1801 | ||
1802 | if (ecmd->autoneg == AUTONEG_ENABLE) { | |
1803 | #define MY_ADV_MASK (ADVERTISE_10_HALF | \ | |
1804 | ADVERTISE_10_FULL | \ | |
1805 | ADVERTISE_100_HALF| \ | |
1806 | ADVERTISE_100_FULL) | |
1807 | ||
1808 | if ((ecmd->advertising & MY_ADV_MASK) == MY_ADV_MASK) { | |
1809 | hw->MediaType = MEDIA_TYPE_AUTO_SENSOR; | |
1810 | hw->autoneg_advertised = MY_ADV_MASK; | |
1811 | } else if ((ecmd->advertising & MY_ADV_MASK) == | |
1812 | ADVERTISE_100_FULL) { | |
1813 | hw->MediaType = MEDIA_TYPE_100M_FULL; | |
1814 | hw->autoneg_advertised = ADVERTISE_100_FULL; | |
1815 | } else if ((ecmd->advertising & MY_ADV_MASK) == | |
1816 | ADVERTISE_100_HALF) { | |
1817 | hw->MediaType = MEDIA_TYPE_100M_HALF; | |
1818 | hw->autoneg_advertised = ADVERTISE_100_HALF; | |
1819 | } else if ((ecmd->advertising & MY_ADV_MASK) == | |
1820 | ADVERTISE_10_FULL) { | |
1821 | hw->MediaType = MEDIA_TYPE_10M_FULL; | |
1822 | hw->autoneg_advertised = ADVERTISE_10_FULL; | |
1823 | } else if ((ecmd->advertising & MY_ADV_MASK) == | |
1824 | ADVERTISE_10_HALF) { | |
1825 | hw->MediaType = MEDIA_TYPE_10M_HALF; | |
1826 | hw->autoneg_advertised = ADVERTISE_10_HALF; | |
1827 | } else { | |
1828 | clear_bit(__ATL2_RESETTING, &adapter->flags); | |
1829 | return -EINVAL; | |
1830 | } | |
1831 | ecmd->advertising = hw->autoneg_advertised | | |
1832 | ADVERTISED_TP | ADVERTISED_Autoneg; | |
1833 | } else { | |
1834 | clear_bit(__ATL2_RESETTING, &adapter->flags); | |
1835 | return -EINVAL; | |
1836 | } | |
1837 | ||
1838 | /* reset the link */ | |
1839 | if (netif_running(adapter->netdev)) { | |
1840 | atl2_down(adapter); | |
1841 | atl2_up(adapter); | |
1842 | } else | |
1843 | atl2_reset_hw(&adapter->hw); | |
1844 | ||
1845 | clear_bit(__ATL2_RESETTING, &adapter->flags); | |
1846 | return 0; | |
1847 | } | |
1848 | ||
1849 | static u32 atl2_get_tx_csum(struct net_device *netdev) | |
1850 | { | |
1851 | return (netdev->features & NETIF_F_HW_CSUM) != 0; | |
1852 | } | |
1853 | ||
1854 | static u32 atl2_get_msglevel(struct net_device *netdev) | |
1855 | { | |
1856 | return 0; | |
1857 | } | |
1858 | ||
1859 | /* | |
1860 | * It's sane for this to be empty, but we might want to take advantage of this. | |
1861 | */ | |
1862 | static void atl2_set_msglevel(struct net_device *netdev, u32 data) | |
1863 | { | |
1864 | } | |
1865 | ||
1866 | static int atl2_get_regs_len(struct net_device *netdev) | |
1867 | { | |
1868 | #define ATL2_REGS_LEN 42 | |
1869 | return sizeof(u32) * ATL2_REGS_LEN; | |
1870 | } | |
1871 | ||
1872 | static void atl2_get_regs(struct net_device *netdev, | |
1873 | struct ethtool_regs *regs, void *p) | |
1874 | { | |
1875 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
1876 | struct atl2_hw *hw = &adapter->hw; | |
1877 | u32 *regs_buff = p; | |
1878 | u16 phy_data; | |
1879 | ||
1880 | memset(p, 0, sizeof(u32) * ATL2_REGS_LEN); | |
1881 | ||
1882 | regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id; | |
1883 | ||
1884 | regs_buff[0] = ATL2_READ_REG(hw, REG_VPD_CAP); | |
1885 | regs_buff[1] = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL); | |
1886 | regs_buff[2] = ATL2_READ_REG(hw, REG_SPI_FLASH_CONFIG); | |
1887 | regs_buff[3] = ATL2_READ_REG(hw, REG_TWSI_CTRL); | |
1888 | regs_buff[4] = ATL2_READ_REG(hw, REG_PCIE_DEV_MISC_CTRL); | |
1889 | regs_buff[5] = ATL2_READ_REG(hw, REG_MASTER_CTRL); | |
1890 | regs_buff[6] = ATL2_READ_REG(hw, REG_MANUAL_TIMER_INIT); | |
1891 | regs_buff[7] = ATL2_READ_REG(hw, REG_IRQ_MODU_TIMER_INIT); | |
1892 | regs_buff[8] = ATL2_READ_REG(hw, REG_PHY_ENABLE); | |
1893 | regs_buff[9] = ATL2_READ_REG(hw, REG_CMBDISDMA_TIMER); | |
1894 | regs_buff[10] = ATL2_READ_REG(hw, REG_IDLE_STATUS); | |
1895 | regs_buff[11] = ATL2_READ_REG(hw, REG_MDIO_CTRL); | |
1896 | regs_buff[12] = ATL2_READ_REG(hw, REG_SERDES_LOCK); | |
1897 | regs_buff[13] = ATL2_READ_REG(hw, REG_MAC_CTRL); | |
1898 | regs_buff[14] = ATL2_READ_REG(hw, REG_MAC_IPG_IFG); | |
1899 | regs_buff[15] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR); | |
1900 | regs_buff[16] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR+4); | |
1901 | regs_buff[17] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE); | |
1902 | regs_buff[18] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE+4); | |
1903 | regs_buff[19] = ATL2_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL); | |
1904 | regs_buff[20] = ATL2_READ_REG(hw, REG_MTU); | |
1905 | regs_buff[21] = ATL2_READ_REG(hw, REG_WOL_CTRL); | |
1906 | regs_buff[22] = ATL2_READ_REG(hw, REG_SRAM_TXRAM_END); | |
1907 | regs_buff[23] = ATL2_READ_REG(hw, REG_DESC_BASE_ADDR_HI); | |
1908 | regs_buff[24] = ATL2_READ_REG(hw, REG_TXD_BASE_ADDR_LO); | |
1909 | regs_buff[25] = ATL2_READ_REG(hw, REG_TXD_MEM_SIZE); | |
1910 | regs_buff[26] = ATL2_READ_REG(hw, REG_TXS_BASE_ADDR_LO); | |
1911 | regs_buff[27] = ATL2_READ_REG(hw, REG_TXS_MEM_SIZE); | |
1912 | regs_buff[28] = ATL2_READ_REG(hw, REG_RXD_BASE_ADDR_LO); | |
1913 | regs_buff[29] = ATL2_READ_REG(hw, REG_RXD_BUF_NUM); | |
1914 | regs_buff[30] = ATL2_READ_REG(hw, REG_DMAR); | |
1915 | regs_buff[31] = ATL2_READ_REG(hw, REG_TX_CUT_THRESH); | |
1916 | regs_buff[32] = ATL2_READ_REG(hw, REG_DMAW); | |
1917 | regs_buff[33] = ATL2_READ_REG(hw, REG_PAUSE_ON_TH); | |
1918 | regs_buff[34] = ATL2_READ_REG(hw, REG_PAUSE_OFF_TH); | |
1919 | regs_buff[35] = ATL2_READ_REG(hw, REG_MB_TXD_WR_IDX); | |
1920 | regs_buff[36] = ATL2_READ_REG(hw, REG_MB_RXD_RD_IDX); | |
1921 | regs_buff[38] = ATL2_READ_REG(hw, REG_ISR); | |
1922 | regs_buff[39] = ATL2_READ_REG(hw, REG_IMR); | |
1923 | ||
1924 | atl2_read_phy_reg(hw, MII_BMCR, &phy_data); | |
1925 | regs_buff[40] = (u32)phy_data; | |
1926 | atl2_read_phy_reg(hw, MII_BMSR, &phy_data); | |
1927 | regs_buff[41] = (u32)phy_data; | |
1928 | } | |
1929 | ||
1930 | static int atl2_get_eeprom_len(struct net_device *netdev) | |
1931 | { | |
1932 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
1933 | ||
1934 | if (!atl2_check_eeprom_exist(&adapter->hw)) | |
1935 | return 512; | |
1936 | else | |
1937 | return 0; | |
1938 | } | |
1939 | ||
1940 | static int atl2_get_eeprom(struct net_device *netdev, | |
1941 | struct ethtool_eeprom *eeprom, u8 *bytes) | |
1942 | { | |
1943 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
1944 | struct atl2_hw *hw = &adapter->hw; | |
1945 | u32 *eeprom_buff; | |
1946 | int first_dword, last_dword; | |
1947 | int ret_val = 0; | |
1948 | int i; | |
1949 | ||
1950 | if (eeprom->len == 0) | |
1951 | return -EINVAL; | |
1952 | ||
1953 | if (atl2_check_eeprom_exist(hw)) | |
1954 | return -EINVAL; | |
1955 | ||
1956 | eeprom->magic = hw->vendor_id | (hw->device_id << 16); | |
1957 | ||
1958 | first_dword = eeprom->offset >> 2; | |
1959 | last_dword = (eeprom->offset + eeprom->len - 1) >> 2; | |
1960 | ||
1961 | eeprom_buff = kmalloc(sizeof(u32) * (last_dword - first_dword + 1), | |
1962 | GFP_KERNEL); | |
1963 | if (!eeprom_buff) | |
1964 | return -ENOMEM; | |
1965 | ||
1966 | for (i = first_dword; i < last_dword; i++) { | |
1967 | if (!atl2_read_eeprom(hw, i*4, &(eeprom_buff[i-first_dword]))) | |
1968 | return -EIO; | |
1969 | } | |
1970 | ||
1971 | memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3), | |
1972 | eeprom->len); | |
1973 | kfree(eeprom_buff); | |
1974 | ||
1975 | return ret_val; | |
1976 | } | |
1977 | ||
1978 | static int atl2_set_eeprom(struct net_device *netdev, | |
1979 | struct ethtool_eeprom *eeprom, u8 *bytes) | |
1980 | { | |
1981 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
1982 | struct atl2_hw *hw = &adapter->hw; | |
1983 | u32 *eeprom_buff; | |
1984 | u32 *ptr; | |
1985 | int max_len, first_dword, last_dword, ret_val = 0; | |
1986 | int i; | |
1987 | ||
1988 | if (eeprom->len == 0) | |
1989 | return -EOPNOTSUPP; | |
1990 | ||
1991 | if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) | |
1992 | return -EFAULT; | |
1993 | ||
1994 | max_len = 512; | |
1995 | ||
1996 | first_dword = eeprom->offset >> 2; | |
1997 | last_dword = (eeprom->offset + eeprom->len - 1) >> 2; | |
1998 | eeprom_buff = kmalloc(max_len, GFP_KERNEL); | |
1999 | if (!eeprom_buff) | |
2000 | return -ENOMEM; | |
2001 | ||
2002 | ptr = (u32 *)eeprom_buff; | |
2003 | ||
2004 | if (eeprom->offset & 3) { | |
2005 | /* need read/modify/write of first changed EEPROM word */ | |
2006 | /* only the second byte of the word is being modified */ | |
2007 | if (!atl2_read_eeprom(hw, first_dword*4, &(eeprom_buff[0]))) | |
2008 | return -EIO; | |
2009 | ptr++; | |
2010 | } | |
2011 | if (((eeprom->offset + eeprom->len) & 3)) { | |
2012 | /* | |
2013 | * need read/modify/write of last changed EEPROM word | |
2014 | * only the first byte of the word is being modified | |
2015 | */ | |
2016 | if (!atl2_read_eeprom(hw, last_dword * 4, | |
2017 | &(eeprom_buff[last_dword - first_dword]))) | |
2018 | return -EIO; | |
2019 | } | |
2020 | ||
2021 | /* Device's eeprom is always little-endian, word addressable */ | |
2022 | memcpy(ptr, bytes, eeprom->len); | |
2023 | ||
2024 | for (i = 0; i < last_dword - first_dword + 1; i++) { | |
2025 | if (!atl2_write_eeprom(hw, ((first_dword+i)*4), eeprom_buff[i])) | |
2026 | return -EIO; | |
2027 | } | |
2028 | ||
2029 | kfree(eeprom_buff); | |
2030 | return ret_val; | |
2031 | } | |
2032 | ||
2033 | static void atl2_get_drvinfo(struct net_device *netdev, | |
2034 | struct ethtool_drvinfo *drvinfo) | |
2035 | { | |
2036 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
2037 | ||
2038 | strncpy(drvinfo->driver, atl2_driver_name, 32); | |
2039 | strncpy(drvinfo->version, atl2_driver_version, 32); | |
2040 | strncpy(drvinfo->fw_version, "L2", 32); | |
2041 | strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32); | |
2042 | drvinfo->n_stats = 0; | |
2043 | drvinfo->testinfo_len = 0; | |
2044 | drvinfo->regdump_len = atl2_get_regs_len(netdev); | |
2045 | drvinfo->eedump_len = atl2_get_eeprom_len(netdev); | |
2046 | } | |
2047 | ||
2048 | static void atl2_get_wol(struct net_device *netdev, | |
2049 | struct ethtool_wolinfo *wol) | |
2050 | { | |
2051 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
2052 | ||
2053 | wol->supported = WAKE_MAGIC; | |
2054 | wol->wolopts = 0; | |
2055 | ||
2056 | if (adapter->wol & ATLX_WUFC_EX) | |
2057 | wol->wolopts |= WAKE_UCAST; | |
2058 | if (adapter->wol & ATLX_WUFC_MC) | |
2059 | wol->wolopts |= WAKE_MCAST; | |
2060 | if (adapter->wol & ATLX_WUFC_BC) | |
2061 | wol->wolopts |= WAKE_BCAST; | |
2062 | if (adapter->wol & ATLX_WUFC_MAG) | |
2063 | wol->wolopts |= WAKE_MAGIC; | |
2064 | if (adapter->wol & ATLX_WUFC_LNKC) | |
2065 | wol->wolopts |= WAKE_PHY; | |
2066 | } | |
2067 | ||
2068 | static int atl2_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | |
2069 | { | |
2070 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
2071 | ||
2072 | if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE)) | |
2073 | return -EOPNOTSUPP; | |
2074 | ||
41796e91 | 2075 | if (wol->wolopts & (WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)) |
452c1ce2 CS |
2076 | return -EOPNOTSUPP; |
2077 | ||
2078 | /* these settings will always override what we currently have */ | |
2079 | adapter->wol = 0; | |
2080 | ||
2081 | if (wol->wolopts & WAKE_MAGIC) | |
2082 | adapter->wol |= ATLX_WUFC_MAG; | |
2083 | if (wol->wolopts & WAKE_PHY) | |
2084 | adapter->wol |= ATLX_WUFC_LNKC; | |
2085 | ||
2086 | return 0; | |
2087 | } | |
2088 | ||
2089 | static int atl2_nway_reset(struct net_device *netdev) | |
2090 | { | |
2091 | struct atl2_adapter *adapter = netdev_priv(netdev); | |
2092 | if (netif_running(netdev)) | |
2093 | atl2_reinit_locked(adapter); | |
2094 | return 0; | |
2095 | } | |
2096 | ||
2097 | static struct ethtool_ops atl2_ethtool_ops = { | |
2098 | .get_settings = atl2_get_settings, | |
2099 | .set_settings = atl2_set_settings, | |
2100 | .get_drvinfo = atl2_get_drvinfo, | |
2101 | .get_regs_len = atl2_get_regs_len, | |
2102 | .get_regs = atl2_get_regs, | |
2103 | .get_wol = atl2_get_wol, | |
2104 | .set_wol = atl2_set_wol, | |
2105 | .get_msglevel = atl2_get_msglevel, | |
2106 | .set_msglevel = atl2_set_msglevel, | |
2107 | .nway_reset = atl2_nway_reset, | |
2108 | .get_link = ethtool_op_get_link, | |
2109 | .get_eeprom_len = atl2_get_eeprom_len, | |
2110 | .get_eeprom = atl2_get_eeprom, | |
2111 | .set_eeprom = atl2_set_eeprom, | |
2112 | .get_tx_csum = atl2_get_tx_csum, | |
2113 | .get_sg = ethtool_op_get_sg, | |
2114 | .set_sg = ethtool_op_set_sg, | |
2115 | #ifdef NETIF_F_TSO | |
2116 | .get_tso = ethtool_op_get_tso, | |
2117 | #endif | |
2118 | }; | |
2119 | ||
2120 | static void atl2_set_ethtool_ops(struct net_device *netdev) | |
2121 | { | |
2122 | SET_ETHTOOL_OPS(netdev, &atl2_ethtool_ops); | |
2123 | } | |
2124 | ||
2125 | #define LBYTESWAP(a) ((((a) & 0x00ff00ff) << 8) | \ | |
2126 | (((a) & 0xff00ff00) >> 8)) | |
2127 | #define LONGSWAP(a) ((LBYTESWAP(a) << 16) | (LBYTESWAP(a) >> 16)) | |
2128 | #define SHORTSWAP(a) (((a) << 8) | ((a) >> 8)) | |
2129 | ||
2130 | /* | |
2131 | * Reset the transmit and receive units; mask and clear all interrupts. | |
2132 | * | |
2133 | * hw - Struct containing variables accessed by shared code | |
2134 | * return : 0 or idle status (if error) | |
2135 | */ | |
2136 | static s32 atl2_reset_hw(struct atl2_hw *hw) | |
2137 | { | |
2138 | u32 icr; | |
2139 | u16 pci_cfg_cmd_word; | |
2140 | int i; | |
2141 | ||
2142 | /* Workaround for PCI problem when BIOS sets MMRBC incorrectly. */ | |
2143 | atl2_read_pci_cfg(hw, PCI_REG_COMMAND, &pci_cfg_cmd_word); | |
2144 | if ((pci_cfg_cmd_word & | |
2145 | (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER)) != | |
2146 | (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER)) { | |
2147 | pci_cfg_cmd_word |= | |
2148 | (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER); | |
2149 | atl2_write_pci_cfg(hw, PCI_REG_COMMAND, &pci_cfg_cmd_word); | |
2150 | } | |
2151 | ||
2152 | /* Clear Interrupt mask to stop board from generating | |
2153 | * interrupts & Clear any pending interrupt events | |
2154 | */ | |
2155 | /* FIXME */ | |
2156 | /* ATL2_WRITE_REG(hw, REG_IMR, 0); */ | |
2157 | /* ATL2_WRITE_REG(hw, REG_ISR, 0xffffffff); */ | |
2158 | ||
2159 | /* Issue Soft Reset to the MAC. This will reset the chip's | |
2160 | * transmit, receive, DMA. It will not effect | |
2161 | * the current PCI configuration. The global reset bit is self- | |
2162 | * clearing, and should clear within a microsecond. | |
2163 | */ | |
2164 | ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST); | |
2165 | wmb(); | |
2166 | msleep(1); /* delay about 1ms */ | |
2167 | ||
2168 | /* Wait at least 10ms for All module to be Idle */ | |
2169 | for (i = 0; i < 10; i++) { | |
2170 | icr = ATL2_READ_REG(hw, REG_IDLE_STATUS); | |
2171 | if (!icr) | |
2172 | break; | |
2173 | msleep(1); /* delay 1 ms */ | |
2174 | cpu_relax(); | |
2175 | } | |
2176 | ||
2177 | if (icr) | |
2178 | return icr; | |
2179 | ||
2180 | return 0; | |
2181 | } | |
2182 | ||
2183 | #define CUSTOM_SPI_CS_SETUP 2 | |
2184 | #define CUSTOM_SPI_CLK_HI 2 | |
2185 | #define CUSTOM_SPI_CLK_LO 2 | |
2186 | #define CUSTOM_SPI_CS_HOLD 2 | |
2187 | #define CUSTOM_SPI_CS_HI 3 | |
2188 | ||
2189 | static struct atl2_spi_flash_dev flash_table[] = | |
2190 | { | |
2191 | /* MFR WRSR READ PROGRAM WREN WRDI RDSR RDID SECTOR_ERASE CHIP_ERASE */ | |
2192 | {"Atmel", 0x0, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52, 0x62 }, | |
2193 | {"SST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0x90, 0x20, 0x60 }, | |
2194 | {"ST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0xAB, 0xD8, 0xC7 }, | |
2195 | }; | |
2196 | ||
2197 | static bool atl2_spi_read(struct atl2_hw *hw, u32 addr, u32 *buf) | |
2198 | { | |
2199 | int i; | |
2200 | u32 value; | |
2201 | ||
2202 | ATL2_WRITE_REG(hw, REG_SPI_DATA, 0); | |
2203 | ATL2_WRITE_REG(hw, REG_SPI_ADDR, addr); | |
2204 | ||
2205 | value = SPI_FLASH_CTRL_WAIT_READY | | |
2206 | (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) << | |
2207 | SPI_FLASH_CTRL_CS_SETUP_SHIFT | | |
2208 | (CUSTOM_SPI_CLK_HI & SPI_FLASH_CTRL_CLK_HI_MASK) << | |
2209 | SPI_FLASH_CTRL_CLK_HI_SHIFT | | |
2210 | (CUSTOM_SPI_CLK_LO & SPI_FLASH_CTRL_CLK_LO_MASK) << | |
2211 | SPI_FLASH_CTRL_CLK_LO_SHIFT | | |
2212 | (CUSTOM_SPI_CS_HOLD & SPI_FLASH_CTRL_CS_HOLD_MASK) << | |
2213 | SPI_FLASH_CTRL_CS_HOLD_SHIFT | | |
2214 | (CUSTOM_SPI_CS_HI & SPI_FLASH_CTRL_CS_HI_MASK) << | |
2215 | SPI_FLASH_CTRL_CS_HI_SHIFT | | |
2216 | (0x1 & SPI_FLASH_CTRL_INS_MASK) << SPI_FLASH_CTRL_INS_SHIFT; | |
2217 | ||
2218 | ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value); | |
2219 | ||
2220 | value |= SPI_FLASH_CTRL_START; | |
2221 | ||
2222 | ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value); | |
2223 | ||
2224 | for (i = 0; i < 10; i++) { | |
2225 | msleep(1); | |
2226 | value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL); | |
2227 | if (!(value & SPI_FLASH_CTRL_START)) | |
2228 | break; | |
2229 | } | |
2230 | ||
2231 | if (value & SPI_FLASH_CTRL_START) | |
2232 | return false; | |
2233 | ||
2234 | *buf = ATL2_READ_REG(hw, REG_SPI_DATA); | |
2235 | ||
2236 | return true; | |
2237 | } | |
2238 | ||
2239 | /* | |
2240 | * get_permanent_address | |
2241 | * return 0 if get valid mac address, | |
2242 | */ | |
2243 | static int get_permanent_address(struct atl2_hw *hw) | |
2244 | { | |
2245 | u32 Addr[2]; | |
2246 | u32 i, Control; | |
2247 | u16 Register; | |
2248 | u8 EthAddr[NODE_ADDRESS_SIZE]; | |
2249 | bool KeyValid; | |
2250 | ||
2251 | if (is_valid_ether_addr(hw->perm_mac_addr)) | |
2252 | return 0; | |
2253 | ||
2254 | Addr[0] = 0; | |
2255 | Addr[1] = 0; | |
2256 | ||
2257 | if (!atl2_check_eeprom_exist(hw)) { /* eeprom exists */ | |
2258 | Register = 0; | |
2259 | KeyValid = false; | |
2260 | ||
2261 | /* Read out all EEPROM content */ | |
2262 | i = 0; | |
2263 | while (1) { | |
2264 | if (atl2_read_eeprom(hw, i + 0x100, &Control)) { | |
2265 | if (KeyValid) { | |
2266 | if (Register == REG_MAC_STA_ADDR) | |
2267 | Addr[0] = Control; | |
2268 | else if (Register == | |
2269 | (REG_MAC_STA_ADDR + 4)) | |
2270 | Addr[1] = Control; | |
2271 | KeyValid = false; | |
2272 | } else if ((Control & 0xff) == 0x5A) { | |
2273 | KeyValid = true; | |
2274 | Register = (u16) (Control >> 16); | |
2275 | } else { | |
2276 | /* assume data end while encount an invalid KEYWORD */ | |
2277 | break; | |
2278 | } | |
2279 | } else { | |
2280 | break; /* read error */ | |
2281 | } | |
2282 | i += 4; | |
2283 | } | |
2284 | ||
2285 | *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]); | |
2286 | *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *) &Addr[1]); | |
2287 | ||
2288 | if (is_valid_ether_addr(EthAddr)) { | |
2289 | memcpy(hw->perm_mac_addr, EthAddr, NODE_ADDRESS_SIZE); | |
2290 | return 0; | |
2291 | } | |
2292 | return 1; | |
2293 | } | |
2294 | ||
2295 | /* see if SPI flash exists? */ | |
2296 | Addr[0] = 0; | |
2297 | Addr[1] = 0; | |
2298 | Register = 0; | |
2299 | KeyValid = false; | |
2300 | i = 0; | |
2301 | while (1) { | |
2302 | if (atl2_spi_read(hw, i + 0x1f000, &Control)) { | |
2303 | if (KeyValid) { | |
2304 | if (Register == REG_MAC_STA_ADDR) | |
2305 | Addr[0] = Control; | |
2306 | else if (Register == (REG_MAC_STA_ADDR + 4)) | |
2307 | Addr[1] = Control; | |
2308 | KeyValid = false; | |
2309 | } else if ((Control & 0xff) == 0x5A) { | |
2310 | KeyValid = true; | |
2311 | Register = (u16) (Control >> 16); | |
2312 | } else { | |
2313 | break; /* data end */ | |
2314 | } | |
2315 | } else { | |
2316 | break; /* read error */ | |
2317 | } | |
2318 | i += 4; | |
2319 | } | |
2320 | ||
2321 | *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]); | |
2322 | *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *)&Addr[1]); | |
2323 | if (is_valid_ether_addr(EthAddr)) { | |
2324 | memcpy(hw->perm_mac_addr, EthAddr, NODE_ADDRESS_SIZE); | |
2325 | return 0; | |
2326 | } | |
2327 | /* maybe MAC-address is from BIOS */ | |
2328 | Addr[0] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR); | |
2329 | Addr[1] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR + 4); | |
2330 | *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]); | |
2331 | *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *) &Addr[1]); | |
2332 | ||
2333 | if (is_valid_ether_addr(EthAddr)) { | |
2334 | memcpy(hw->perm_mac_addr, EthAddr, NODE_ADDRESS_SIZE); | |
2335 | return 0; | |
2336 | } | |
2337 | ||
2338 | return 1; | |
2339 | } | |
2340 | ||
2341 | /* | |
2342 | * Reads the adapter's MAC address from the EEPROM | |
2343 | * | |
2344 | * hw - Struct containing variables accessed by shared code | |
2345 | */ | |
2346 | static s32 atl2_read_mac_addr(struct atl2_hw *hw) | |
2347 | { | |
2348 | u16 i; | |
2349 | ||
2350 | if (get_permanent_address(hw)) { | |
2351 | /* for test */ | |
2352 | /* FIXME: shouldn't we use random_ether_addr() here? */ | |
2353 | hw->perm_mac_addr[0] = 0x00; | |
2354 | hw->perm_mac_addr[1] = 0x13; | |
2355 | hw->perm_mac_addr[2] = 0x74; | |
2356 | hw->perm_mac_addr[3] = 0x00; | |
2357 | hw->perm_mac_addr[4] = 0x5c; | |
2358 | hw->perm_mac_addr[5] = 0x38; | |
2359 | } | |
2360 | ||
2361 | for (i = 0; i < NODE_ADDRESS_SIZE; i++) | |
2362 | hw->mac_addr[i] = hw->perm_mac_addr[i]; | |
2363 | ||
2364 | return 0; | |
2365 | } | |
2366 | ||
2367 | /* | |
2368 | * Hashes an address to determine its location in the multicast table | |
2369 | * | |
2370 | * hw - Struct containing variables accessed by shared code | |
2371 | * mc_addr - the multicast address to hash | |
2372 | * | |
2373 | * atl2_hash_mc_addr | |
2374 | * purpose | |
2375 | * set hash value for a multicast address | |
2376 | * hash calcu processing : | |
2377 | * 1. calcu 32bit CRC for multicast address | |
2378 | * 2. reverse crc with MSB to LSB | |
2379 | */ | |
2380 | static u32 atl2_hash_mc_addr(struct atl2_hw *hw, u8 *mc_addr) | |
2381 | { | |
2382 | u32 crc32, value; | |
2383 | int i; | |
2384 | ||
2385 | value = 0; | |
2386 | crc32 = ether_crc_le(6, mc_addr); | |
2387 | ||
2388 | for (i = 0; i < 32; i++) | |
2389 | value |= (((crc32 >> i) & 1) << (31 - i)); | |
2390 | ||
2391 | return value; | |
2392 | } | |
2393 | ||
2394 | /* | |
2395 | * Sets the bit in the multicast table corresponding to the hash value. | |
2396 | * | |
2397 | * hw - Struct containing variables accessed by shared code | |
2398 | * hash_value - Multicast address hash value | |
2399 | */ | |
2400 | static void atl2_hash_set(struct atl2_hw *hw, u32 hash_value) | |
2401 | { | |
2402 | u32 hash_bit, hash_reg; | |
2403 | u32 mta; | |
2404 | ||
2405 | /* The HASH Table is a register array of 2 32-bit registers. | |
2406 | * It is treated like an array of 64 bits. We want to set | |
2407 | * bit BitArray[hash_value]. So we figure out what register | |
2408 | * the bit is in, read it, OR in the new bit, then write | |
2409 | * back the new value. The register is determined by the | |
2410 | * upper 7 bits of the hash value and the bit within that | |
2411 | * register are determined by the lower 5 bits of the value. | |
2412 | */ | |
2413 | hash_reg = (hash_value >> 31) & 0x1; | |
2414 | hash_bit = (hash_value >> 26) & 0x1F; | |
2415 | ||
2416 | mta = ATL2_READ_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg); | |
2417 | ||
2418 | mta |= (1 << hash_bit); | |
2419 | ||
2420 | ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg, mta); | |
2421 | } | |
2422 | ||
2423 | /* | |
2424 | * atl2_init_pcie - init PCIE module | |
2425 | */ | |
2426 | static void atl2_init_pcie(struct atl2_hw *hw) | |
2427 | { | |
2428 | u32 value; | |
2429 | value = LTSSM_TEST_MODE_DEF; | |
2430 | ATL2_WRITE_REG(hw, REG_LTSSM_TEST_MODE, value); | |
2431 | ||
2432 | value = PCIE_DLL_TX_CTRL1_DEF; | |
2433 | ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, value); | |
2434 | } | |
2435 | ||
2436 | static void atl2_init_flash_opcode(struct atl2_hw *hw) | |
2437 | { | |
2438 | if (hw->flash_vendor >= ARRAY_SIZE(flash_table)) | |
2439 | hw->flash_vendor = 0; /* ATMEL */ | |
2440 | ||
2441 | /* Init OP table */ | |
2442 | ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_PROGRAM, | |
2443 | flash_table[hw->flash_vendor].cmdPROGRAM); | |
2444 | ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_SC_ERASE, | |
2445 | flash_table[hw->flash_vendor].cmdSECTOR_ERASE); | |
2446 | ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_CHIP_ERASE, | |
2447 | flash_table[hw->flash_vendor].cmdCHIP_ERASE); | |
2448 | ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_RDID, | |
2449 | flash_table[hw->flash_vendor].cmdRDID); | |
2450 | ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_WREN, | |
2451 | flash_table[hw->flash_vendor].cmdWREN); | |
2452 | ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_RDSR, | |
2453 | flash_table[hw->flash_vendor].cmdRDSR); | |
2454 | ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_WRSR, | |
2455 | flash_table[hw->flash_vendor].cmdWRSR); | |
2456 | ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_READ, | |
2457 | flash_table[hw->flash_vendor].cmdREAD); | |
2458 | } | |
2459 | ||
2460 | /******************************************************************** | |
2461 | * Performs basic configuration of the adapter. | |
2462 | * | |
2463 | * hw - Struct containing variables accessed by shared code | |
2464 | * Assumes that the controller has previously been reset and is in a | |
2465 | * post-reset uninitialized state. Initializes multicast table, | |
2466 | * and Calls routines to setup link | |
2467 | * Leaves the transmit and receive units disabled and uninitialized. | |
2468 | ********************************************************************/ | |
2469 | static s32 atl2_init_hw(struct atl2_hw *hw) | |
2470 | { | |
2471 | u32 ret_val = 0; | |
2472 | ||
2473 | atl2_init_pcie(hw); | |
2474 | ||
2475 | /* Zero out the Multicast HASH table */ | |
2476 | /* clear the old settings from the multicast hash table */ | |
2477 | ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); | |
2478 | ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); | |
2479 | ||
2480 | atl2_init_flash_opcode(hw); | |
2481 | ||
2482 | ret_val = atl2_phy_init(hw); | |
2483 | ||
2484 | return ret_val; | |
2485 | } | |
2486 | ||
2487 | /* | |
2488 | * Detects the current speed and duplex settings of the hardware. | |
2489 | * | |
2490 | * hw - Struct containing variables accessed by shared code | |
2491 | * speed - Speed of the connection | |
2492 | * duplex - Duplex setting of the connection | |
2493 | */ | |
2494 | static s32 atl2_get_speed_and_duplex(struct atl2_hw *hw, u16 *speed, | |
2495 | u16 *duplex) | |
2496 | { | |
2497 | s32 ret_val; | |
2498 | u16 phy_data; | |
2499 | ||
2500 | /* Read PHY Specific Status Register (17) */ | |
2501 | ret_val = atl2_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data); | |
2502 | if (ret_val) | |
2503 | return ret_val; | |
2504 | ||
2505 | if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED)) | |
2506 | return ATLX_ERR_PHY_RES; | |
2507 | ||
2508 | switch (phy_data & MII_ATLX_PSSR_SPEED) { | |
2509 | case MII_ATLX_PSSR_100MBS: | |
2510 | *speed = SPEED_100; | |
2511 | break; | |
2512 | case MII_ATLX_PSSR_10MBS: | |
2513 | *speed = SPEED_10; | |
2514 | break; | |
2515 | default: | |
2516 | return ATLX_ERR_PHY_SPEED; | |
2517 | break; | |
2518 | } | |
2519 | ||
2520 | if (phy_data & MII_ATLX_PSSR_DPLX) | |
2521 | *duplex = FULL_DUPLEX; | |
2522 | else | |
2523 | *duplex = HALF_DUPLEX; | |
2524 | ||
2525 | return 0; | |
2526 | } | |
2527 | ||
2528 | /* | |
2529 | * Reads the value from a PHY register | |
2530 | * hw - Struct containing variables accessed by shared code | |
2531 | * reg_addr - address of the PHY register to read | |
2532 | */ | |
2533 | static s32 atl2_read_phy_reg(struct atl2_hw *hw, u16 reg_addr, u16 *phy_data) | |
2534 | { | |
2535 | u32 val; | |
2536 | int i; | |
2537 | ||
2538 | val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | | |
2539 | MDIO_START | | |
2540 | MDIO_SUP_PREAMBLE | | |
2541 | MDIO_RW | | |
2542 | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT; | |
2543 | ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val); | |
2544 | ||
2545 | wmb(); | |
2546 | ||
2547 | for (i = 0; i < MDIO_WAIT_TIMES; i++) { | |
2548 | udelay(2); | |
2549 | val = ATL2_READ_REG(hw, REG_MDIO_CTRL); | |
2550 | if (!(val & (MDIO_START | MDIO_BUSY))) | |
2551 | break; | |
2552 | wmb(); | |
2553 | } | |
2554 | if (!(val & (MDIO_START | MDIO_BUSY))) { | |
2555 | *phy_data = (u16)val; | |
2556 | return 0; | |
2557 | } | |
2558 | ||
2559 | return ATLX_ERR_PHY; | |
2560 | } | |
2561 | ||
2562 | /* | |
2563 | * Writes a value to a PHY register | |
2564 | * hw - Struct containing variables accessed by shared code | |
2565 | * reg_addr - address of the PHY register to write | |
2566 | * data - data to write to the PHY | |
2567 | */ | |
2568 | static s32 atl2_write_phy_reg(struct atl2_hw *hw, u32 reg_addr, u16 phy_data) | |
2569 | { | |
2570 | int i; | |
2571 | u32 val; | |
2572 | ||
2573 | val = ((u32)(phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT | | |
2574 | (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | | |
2575 | MDIO_SUP_PREAMBLE | | |
2576 | MDIO_START | | |
2577 | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT; | |
2578 | ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val); | |
2579 | ||
2580 | wmb(); | |
2581 | ||
2582 | for (i = 0; i < MDIO_WAIT_TIMES; i++) { | |
2583 | udelay(2); | |
2584 | val = ATL2_READ_REG(hw, REG_MDIO_CTRL); | |
2585 | if (!(val & (MDIO_START | MDIO_BUSY))) | |
2586 | break; | |
2587 | ||
2588 | wmb(); | |
2589 | } | |
2590 | ||
2591 | if (!(val & (MDIO_START | MDIO_BUSY))) | |
2592 | return 0; | |
2593 | ||
2594 | return ATLX_ERR_PHY; | |
2595 | } | |
2596 | ||
2597 | /* | |
2598 | * Configures PHY autoneg and flow control advertisement settings | |
2599 | * | |
2600 | * hw - Struct containing variables accessed by shared code | |
2601 | */ | |
2602 | static s32 atl2_phy_setup_autoneg_adv(struct atl2_hw *hw) | |
2603 | { | |
2604 | s32 ret_val; | |
2605 | s16 mii_autoneg_adv_reg; | |
2606 | ||
2607 | /* Read the MII Auto-Neg Advertisement Register (Address 4). */ | |
2608 | mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK; | |
2609 | ||
2610 | /* Need to parse autoneg_advertised and set up | |
2611 | * the appropriate PHY registers. First we will parse for | |
2612 | * autoneg_advertised software override. Since we can advertise | |
2613 | * a plethora of combinations, we need to check each bit | |
2614 | * individually. | |
2615 | */ | |
2616 | ||
2617 | /* First we clear all the 10/100 mb speed bits in the Auto-Neg | |
2618 | * Advertisement Register (Address 4) and the 1000 mb speed bits in | |
2619 | * the 1000Base-T Control Register (Address 9). */ | |
2620 | mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK; | |
2621 | ||
2622 | /* Need to parse MediaType and setup the | |
2623 | * appropriate PHY registers. */ | |
2624 | switch (hw->MediaType) { | |
2625 | case MEDIA_TYPE_AUTO_SENSOR: | |
2626 | mii_autoneg_adv_reg |= | |
2627 | (MII_AR_10T_HD_CAPS | | |
2628 | MII_AR_10T_FD_CAPS | | |
2629 | MII_AR_100TX_HD_CAPS| | |
2630 | MII_AR_100TX_FD_CAPS); | |
2631 | hw->autoneg_advertised = | |
2632 | ADVERTISE_10_HALF | | |
2633 | ADVERTISE_10_FULL | | |
2634 | ADVERTISE_100_HALF| | |
2635 | ADVERTISE_100_FULL; | |
2636 | break; | |
2637 | case MEDIA_TYPE_100M_FULL: | |
2638 | mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS; | |
2639 | hw->autoneg_advertised = ADVERTISE_100_FULL; | |
2640 | break; | |
2641 | case MEDIA_TYPE_100M_HALF: | |
2642 | mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS; | |
2643 | hw->autoneg_advertised = ADVERTISE_100_HALF; | |
2644 | break; | |
2645 | case MEDIA_TYPE_10M_FULL: | |
2646 | mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS; | |
2647 | hw->autoneg_advertised = ADVERTISE_10_FULL; | |
2648 | break; | |
2649 | default: | |
2650 | mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS; | |
2651 | hw->autoneg_advertised = ADVERTISE_10_HALF; | |
2652 | break; | |
2653 | } | |
2654 | ||
2655 | /* flow control fixed to enable all */ | |
2656 | mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE); | |
2657 | ||
2658 | hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg; | |
2659 | ||
2660 | ret_val = atl2_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg); | |
2661 | ||
2662 | if (ret_val) | |
2663 | return ret_val; | |
2664 | ||
2665 | return 0; | |
2666 | } | |
2667 | ||
2668 | /* | |
2669 | * Resets the PHY and make all config validate | |
2670 | * | |
2671 | * hw - Struct containing variables accessed by shared code | |
2672 | * | |
2673 | * Sets bit 15 and 12 of the MII Control regiser (for F001 bug) | |
2674 | */ | |
2675 | static s32 atl2_phy_commit(struct atl2_hw *hw) | |
2676 | { | |
2677 | s32 ret_val; | |
2678 | u16 phy_data; | |
2679 | ||
2680 | phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG; | |
2681 | ret_val = atl2_write_phy_reg(hw, MII_BMCR, phy_data); | |
2682 | if (ret_val) { | |
2683 | u32 val; | |
2684 | int i; | |
2685 | /* pcie serdes link may be down ! */ | |
2686 | for (i = 0; i < 25; i++) { | |
2687 | msleep(1); | |
2688 | val = ATL2_READ_REG(hw, REG_MDIO_CTRL); | |
2689 | if (!(val & (MDIO_START | MDIO_BUSY))) | |
2690 | break; | |
2691 | } | |
2692 | ||
2693 | if (0 != (val & (MDIO_START | MDIO_BUSY))) { | |
2694 | printk(KERN_ERR "atl2: PCIe link down for at least 25ms !\n"); | |
2695 | return ret_val; | |
2696 | } | |
2697 | } | |
2698 | return 0; | |
2699 | } | |
2700 | ||
2701 | static s32 atl2_phy_init(struct atl2_hw *hw) | |
2702 | { | |
2703 | s32 ret_val; | |
2704 | u16 phy_val; | |
2705 | ||
2706 | if (hw->phy_configured) | |
2707 | return 0; | |
2708 | ||
2709 | /* Enable PHY */ | |
2710 | ATL2_WRITE_REGW(hw, REG_PHY_ENABLE, 1); | |
2711 | ATL2_WRITE_FLUSH(hw); | |
2712 | msleep(1); | |
2713 | ||
2714 | /* check if the PHY is in powersaving mode */ | |
2715 | atl2_write_phy_reg(hw, MII_DBG_ADDR, 0); | |
2716 | atl2_read_phy_reg(hw, MII_DBG_DATA, &phy_val); | |
2717 | ||
2718 | /* 024E / 124E 0r 0274 / 1274 ? */ | |
2719 | if (phy_val & 0x1000) { | |
2720 | phy_val &= ~0x1000; | |
2721 | atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val); | |
2722 | } | |
2723 | ||
2724 | msleep(1); | |
2725 | ||
2726 | /*Enable PHY LinkChange Interrupt */ | |
2727 | ret_val = atl2_write_phy_reg(hw, 18, 0xC00); | |
2728 | if (ret_val) | |
2729 | return ret_val; | |
2730 | ||
2731 | /* setup AutoNeg parameters */ | |
2732 | ret_val = atl2_phy_setup_autoneg_adv(hw); | |
2733 | if (ret_val) | |
2734 | return ret_val; | |
2735 | ||
2736 | /* SW.Reset & En-Auto-Neg to restart Auto-Neg */ | |
2737 | ret_val = atl2_phy_commit(hw); | |
2738 | if (ret_val) | |
2739 | return ret_val; | |
2740 | ||
2741 | hw->phy_configured = true; | |
2742 | ||
2743 | return ret_val; | |
2744 | } | |
2745 | ||
2746 | static void atl2_set_mac_addr(struct atl2_hw *hw) | |
2747 | { | |
2748 | u32 value; | |
2749 | /* 00-0B-6A-F6-00-DC | |
2750 | * 0: 6AF600DC 1: 000B | |
2751 | * low dword */ | |
2752 | value = (((u32)hw->mac_addr[2]) << 24) | | |
2753 | (((u32)hw->mac_addr[3]) << 16) | | |
2754 | (((u32)hw->mac_addr[4]) << 8) | | |
2755 | (((u32)hw->mac_addr[5])); | |
2756 | ATL2_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value); | |
2757 | /* hight dword */ | |
2758 | value = (((u32)hw->mac_addr[0]) << 8) | | |
2759 | (((u32)hw->mac_addr[1])); | |
2760 | ATL2_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value); | |
2761 | } | |
2762 | ||
2763 | /* | |
2764 | * check_eeprom_exist | |
2765 | * return 0 if eeprom exist | |
2766 | */ | |
2767 | static int atl2_check_eeprom_exist(struct atl2_hw *hw) | |
2768 | { | |
2769 | u32 value; | |
2770 | ||
2771 | value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL); | |
2772 | if (value & SPI_FLASH_CTRL_EN_VPD) { | |
2773 | value &= ~SPI_FLASH_CTRL_EN_VPD; | |
2774 | ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value); | |
2775 | } | |
2776 | value = ATL2_READ_REGW(hw, REG_PCIE_CAP_LIST); | |
2777 | return ((value & 0xFF00) == 0x6C00) ? 0 : 1; | |
2778 | } | |
2779 | ||
2780 | /* FIXME: This doesn't look right. -- CHS */ | |
2781 | static bool atl2_write_eeprom(struct atl2_hw *hw, u32 offset, u32 value) | |
2782 | { | |
2783 | return true; | |
2784 | } | |
2785 | ||
2786 | static bool atl2_read_eeprom(struct atl2_hw *hw, u32 Offset, u32 *pValue) | |
2787 | { | |
2788 | int i; | |
2789 | u32 Control; | |
2790 | ||
2791 | if (Offset & 0x3) | |
2792 | return false; /* address do not align */ | |
2793 | ||
2794 | ATL2_WRITE_REG(hw, REG_VPD_DATA, 0); | |
2795 | Control = (Offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT; | |
2796 | ATL2_WRITE_REG(hw, REG_VPD_CAP, Control); | |
2797 | ||
2798 | for (i = 0; i < 10; i++) { | |
2799 | msleep(2); | |
2800 | Control = ATL2_READ_REG(hw, REG_VPD_CAP); | |
2801 | if (Control & VPD_CAP_VPD_FLAG) | |
2802 | break; | |
2803 | } | |
2804 | ||
2805 | if (Control & VPD_CAP_VPD_FLAG) { | |
2806 | *pValue = ATL2_READ_REG(hw, REG_VPD_DATA); | |
2807 | return true; | |
2808 | } | |
2809 | return false; /* timeout */ | |
2810 | } | |
2811 | ||
2812 | static void atl2_force_ps(struct atl2_hw *hw) | |
2813 | { | |
2814 | u16 phy_val; | |
2815 | ||
2816 | atl2_write_phy_reg(hw, MII_DBG_ADDR, 0); | |
2817 | atl2_read_phy_reg(hw, MII_DBG_DATA, &phy_val); | |
2818 | atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val | 0x1000); | |
2819 | ||
2820 | atl2_write_phy_reg(hw, MII_DBG_ADDR, 2); | |
2821 | atl2_write_phy_reg(hw, MII_DBG_DATA, 0x3000); | |
2822 | atl2_write_phy_reg(hw, MII_DBG_ADDR, 3); | |
2823 | atl2_write_phy_reg(hw, MII_DBG_DATA, 0); | |
2824 | } | |
2825 | ||
2826 | /* This is the only thing that needs to be changed to adjust the | |
2827 | * maximum number of ports that the driver can manage. | |
2828 | */ | |
2829 | #define ATL2_MAX_NIC 4 | |
2830 | ||
2831 | #define OPTION_UNSET -1 | |
2832 | #define OPTION_DISABLED 0 | |
2833 | #define OPTION_ENABLED 1 | |
2834 | ||
2835 | /* All parameters are treated the same, as an integer array of values. | |
2836 | * This macro just reduces the need to repeat the same declaration code | |
2837 | * over and over (plus this helps to avoid typo bugs). | |
2838 | */ | |
2839 | #define ATL2_PARAM_INIT {[0 ... ATL2_MAX_NIC] = OPTION_UNSET} | |
2840 | #ifndef module_param_array | |
2841 | /* Module Parameters are always initialized to -1, so that the driver | |
2842 | * can tell the difference between no user specified value or the | |
2843 | * user asking for the default value. | |
2844 | * The true default values are loaded in when atl2_check_options is called. | |
2845 | * | |
2846 | * This is a GCC extension to ANSI C. | |
2847 | * See the item "Labeled Elements in Initializers" in the section | |
2848 | * "Extensions to the C Language Family" of the GCC documentation. | |
2849 | */ | |
2850 | ||
2851 | #define ATL2_PARAM(X, desc) \ | |
2852 | static const int __devinitdata X[ATL2_MAX_NIC + 1] = ATL2_PARAM_INIT; \ | |
2853 | MODULE_PARM(X, "1-" __MODULE_STRING(ATL2_MAX_NIC) "i"); \ | |
2854 | MODULE_PARM_DESC(X, desc); | |
2855 | #else | |
2856 | #define ATL2_PARAM(X, desc) \ | |
2857 | static int __devinitdata X[ATL2_MAX_NIC+1] = ATL2_PARAM_INIT; \ | |
b79d8fff | 2858 | static unsigned int num_##X; \ |
452c1ce2 CS |
2859 | module_param_array_named(X, X, int, &num_##X, 0); \ |
2860 | MODULE_PARM_DESC(X, desc); | |
2861 | #endif | |
2862 | ||
2863 | /* | |
2864 | * Transmit Memory Size | |
2865 | * Valid Range: 64-2048 | |
2866 | * Default Value: 128 | |
2867 | */ | |
2868 | #define ATL2_MIN_TX_MEMSIZE 4 /* 4KB */ | |
2869 | #define ATL2_MAX_TX_MEMSIZE 64 /* 64KB */ | |
2870 | #define ATL2_DEFAULT_TX_MEMSIZE 8 /* 8KB */ | |
2871 | ATL2_PARAM(TxMemSize, "Bytes of Transmit Memory"); | |
2872 | ||
2873 | /* | |
2874 | * Receive Memory Block Count | |
2875 | * Valid Range: 16-512 | |
2876 | * Default Value: 128 | |
2877 | */ | |
2878 | #define ATL2_MIN_RXD_COUNT 16 | |
2879 | #define ATL2_MAX_RXD_COUNT 512 | |
2880 | #define ATL2_DEFAULT_RXD_COUNT 64 | |
2881 | ATL2_PARAM(RxMemBlock, "Number of receive memory block"); | |
2882 | ||
2883 | /* | |
2884 | * User Specified MediaType Override | |
2885 | * | |
2886 | * Valid Range: 0-5 | |
2887 | * - 0 - auto-negotiate at all supported speeds | |
2888 | * - 1 - only link at 1000Mbps Full Duplex | |
2889 | * - 2 - only link at 100Mbps Full Duplex | |
2890 | * - 3 - only link at 100Mbps Half Duplex | |
2891 | * - 4 - only link at 10Mbps Full Duplex | |
2892 | * - 5 - only link at 10Mbps Half Duplex | |
2893 | * Default Value: 0 | |
2894 | */ | |
2895 | ATL2_PARAM(MediaType, "MediaType Select"); | |
2896 | ||
2897 | /* | |
2898 | * Interrupt Moderate Timer in units of 2048 ns (~2 us) | |
2899 | * Valid Range: 10-65535 | |
2900 | * Default Value: 45000(90ms) | |
2901 | */ | |
2902 | #define INT_MOD_DEFAULT_CNT 100 /* 200us */ | |
2903 | #define INT_MOD_MAX_CNT 65000 | |
2904 | #define INT_MOD_MIN_CNT 50 | |
2905 | ATL2_PARAM(IntModTimer, "Interrupt Moderator Timer"); | |
2906 | ||
2907 | /* | |
2908 | * FlashVendor | |
2909 | * Valid Range: 0-2 | |
2910 | * 0 - Atmel | |
2911 | * 1 - SST | |
2912 | * 2 - ST | |
2913 | */ | |
2914 | ATL2_PARAM(FlashVendor, "SPI Flash Vendor"); | |
2915 | ||
2916 | #define AUTONEG_ADV_DEFAULT 0x2F | |
2917 | #define AUTONEG_ADV_MASK 0x2F | |
2918 | #define FLOW_CONTROL_DEFAULT FLOW_CONTROL_FULL | |
2919 | ||
2920 | #define FLASH_VENDOR_DEFAULT 0 | |
2921 | #define FLASH_VENDOR_MIN 0 | |
2922 | #define FLASH_VENDOR_MAX 2 | |
2923 | ||
2924 | struct atl2_option { | |
2925 | enum { enable_option, range_option, list_option } type; | |
2926 | char *name; | |
2927 | char *err; | |
2928 | int def; | |
2929 | union { | |
2930 | struct { /* range_option info */ | |
2931 | int min; | |
2932 | int max; | |
2933 | } r; | |
2934 | struct { /* list_option info */ | |
2935 | int nr; | |
2936 | struct atl2_opt_list { int i; char *str; } *p; | |
2937 | } l; | |
2938 | } arg; | |
2939 | }; | |
2940 | ||
2941 | static int __devinit atl2_validate_option(int *value, struct atl2_option *opt) | |
2942 | { | |
2943 | int i; | |
2944 | struct atl2_opt_list *ent; | |
2945 | ||
2946 | if (*value == OPTION_UNSET) { | |
2947 | *value = opt->def; | |
2948 | return 0; | |
2949 | } | |
2950 | ||
2951 | switch (opt->type) { | |
2952 | case enable_option: | |
2953 | switch (*value) { | |
2954 | case OPTION_ENABLED: | |
2955 | printk(KERN_INFO "%s Enabled\n", opt->name); | |
2956 | return 0; | |
2957 | break; | |
2958 | case OPTION_DISABLED: | |
2959 | printk(KERN_INFO "%s Disabled\n", opt->name); | |
2960 | return 0; | |
2961 | break; | |
2962 | } | |
2963 | break; | |
2964 | case range_option: | |
2965 | if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) { | |
2966 | printk(KERN_INFO "%s set to %i\n", opt->name, *value); | |
2967 | return 0; | |
2968 | } | |
2969 | break; | |
2970 | case list_option: | |
2971 | for (i = 0; i < opt->arg.l.nr; i++) { | |
2972 | ent = &opt->arg.l.p[i]; | |
2973 | if (*value == ent->i) { | |
2974 | if (ent->str[0] != '\0') | |
2975 | printk(KERN_INFO "%s\n", ent->str); | |
2976 | return 0; | |
2977 | } | |
2978 | } | |
2979 | break; | |
2980 | default: | |
2981 | BUG(); | |
2982 | } | |
2983 | ||
2984 | printk(KERN_INFO "Invalid %s specified (%i) %s\n", | |
2985 | opt->name, *value, opt->err); | |
2986 | *value = opt->def; | |
2987 | return -1; | |
2988 | } | |
2989 | ||
2990 | /* | |
2991 | * atl2_check_options - Range Checking for Command Line Parameters | |
2992 | * @adapter: board private structure | |
2993 | * | |
2994 | * This routine checks all command line parameters for valid user | |
2995 | * input. If an invalid value is given, or if no user specified | |
2996 | * value exists, a default value is used. The final value is stored | |
2997 | * in a variable in the adapter structure. | |
2998 | */ | |
2999 | static void __devinit atl2_check_options(struct atl2_adapter *adapter) | |
3000 | { | |
3001 | int val; | |
3002 | struct atl2_option opt; | |
3003 | int bd = adapter->bd_number; | |
3004 | if (bd >= ATL2_MAX_NIC) { | |
3005 | printk(KERN_NOTICE "Warning: no configuration for board #%i\n", | |
3006 | bd); | |
3007 | printk(KERN_NOTICE "Using defaults for all values\n"); | |
3008 | #ifndef module_param_array | |
3009 | bd = ATL2_MAX_NIC; | |
3010 | #endif | |
3011 | } | |
3012 | ||
3013 | /* Bytes of Transmit Memory */ | |
3014 | opt.type = range_option; | |
3015 | opt.name = "Bytes of Transmit Memory"; | |
3016 | opt.err = "using default of " __MODULE_STRING(ATL2_DEFAULT_TX_MEMSIZE); | |
3017 | opt.def = ATL2_DEFAULT_TX_MEMSIZE; | |
3018 | opt.arg.r.min = ATL2_MIN_TX_MEMSIZE; | |
3019 | opt.arg.r.max = ATL2_MAX_TX_MEMSIZE; | |
3020 | #ifdef module_param_array | |
3021 | if (num_TxMemSize > bd) { | |
3022 | #endif | |
3023 | val = TxMemSize[bd]; | |
3024 | atl2_validate_option(&val, &opt); | |
3025 | adapter->txd_ring_size = ((u32) val) * 1024; | |
3026 | #ifdef module_param_array | |
3027 | } else | |
3028 | adapter->txd_ring_size = ((u32)opt.def) * 1024; | |
3029 | #endif | |
3030 | /* txs ring size: */ | |
3031 | adapter->txs_ring_size = adapter->txd_ring_size / 128; | |
3032 | if (adapter->txs_ring_size > 160) | |
3033 | adapter->txs_ring_size = 160; | |
3034 | ||
3035 | /* Receive Memory Block Count */ | |
3036 | opt.type = range_option; | |
3037 | opt.name = "Number of receive memory block"; | |
3038 | opt.err = "using default of " __MODULE_STRING(ATL2_DEFAULT_RXD_COUNT); | |
3039 | opt.def = ATL2_DEFAULT_RXD_COUNT; | |
3040 | opt.arg.r.min = ATL2_MIN_RXD_COUNT; | |
3041 | opt.arg.r.max = ATL2_MAX_RXD_COUNT; | |
3042 | #ifdef module_param_array | |
3043 | if (num_RxMemBlock > bd) { | |
3044 | #endif | |
3045 | val = RxMemBlock[bd]; | |
3046 | atl2_validate_option(&val, &opt); | |
3047 | adapter->rxd_ring_size = (u32)val; | |
3048 | /* FIXME */ | |
3049 | /* ((u16)val)&~1; */ /* even number */ | |
3050 | #ifdef module_param_array | |
3051 | } else | |
3052 | adapter->rxd_ring_size = (u32)opt.def; | |
3053 | #endif | |
3054 | /* init RXD Flow control value */ | |
3055 | adapter->hw.fc_rxd_hi = (adapter->rxd_ring_size / 8) * 7; | |
3056 | adapter->hw.fc_rxd_lo = (ATL2_MIN_RXD_COUNT / 8) > | |
3057 | (adapter->rxd_ring_size / 12) ? (ATL2_MIN_RXD_COUNT / 8) : | |
3058 | (adapter->rxd_ring_size / 12); | |
3059 | ||
3060 | /* Interrupt Moderate Timer */ | |
3061 | opt.type = range_option; | |
3062 | opt.name = "Interrupt Moderate Timer"; | |
3063 | opt.err = "using default of " __MODULE_STRING(INT_MOD_DEFAULT_CNT); | |
3064 | opt.def = INT_MOD_DEFAULT_CNT; | |
3065 | opt.arg.r.min = INT_MOD_MIN_CNT; | |
3066 | opt.arg.r.max = INT_MOD_MAX_CNT; | |
3067 | #ifdef module_param_array | |
3068 | if (num_IntModTimer > bd) { | |
3069 | #endif | |
3070 | val = IntModTimer[bd]; | |
3071 | atl2_validate_option(&val, &opt); | |
3072 | adapter->imt = (u16) val; | |
3073 | #ifdef module_param_array | |
3074 | } else | |
3075 | adapter->imt = (u16)(opt.def); | |
3076 | #endif | |
3077 | /* Flash Vendor */ | |
3078 | opt.type = range_option; | |
3079 | opt.name = "SPI Flash Vendor"; | |
3080 | opt.err = "using default of " __MODULE_STRING(FLASH_VENDOR_DEFAULT); | |
3081 | opt.def = FLASH_VENDOR_DEFAULT; | |
3082 | opt.arg.r.min = FLASH_VENDOR_MIN; | |
3083 | opt.arg.r.max = FLASH_VENDOR_MAX; | |
3084 | #ifdef module_param_array | |
3085 | if (num_FlashVendor > bd) { | |
3086 | #endif | |
3087 | val = FlashVendor[bd]; | |
3088 | atl2_validate_option(&val, &opt); | |
3089 | adapter->hw.flash_vendor = (u8) val; | |
3090 | #ifdef module_param_array | |
3091 | } else | |
3092 | adapter->hw.flash_vendor = (u8)(opt.def); | |
3093 | #endif | |
3094 | /* MediaType */ | |
3095 | opt.type = range_option; | |
3096 | opt.name = "Speed/Duplex Selection"; | |
3097 | opt.err = "using default of " __MODULE_STRING(MEDIA_TYPE_AUTO_SENSOR); | |
3098 | opt.def = MEDIA_TYPE_AUTO_SENSOR; | |
3099 | opt.arg.r.min = MEDIA_TYPE_AUTO_SENSOR; | |
3100 | opt.arg.r.max = MEDIA_TYPE_10M_HALF; | |
3101 | #ifdef module_param_array | |
3102 | if (num_MediaType > bd) { | |
3103 | #endif | |
3104 | val = MediaType[bd]; | |
3105 | atl2_validate_option(&val, &opt); | |
3106 | adapter->hw.MediaType = (u16) val; | |
3107 | #ifdef module_param_array | |
3108 | } else | |
3109 | adapter->hw.MediaType = (u16)(opt.def); | |
3110 | #endif | |
3111 | } |