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825a2ff1 BD |
1 | /* drivers/net/ax88796.c |
2 | * | |
3 | * Copyright 2005,2007 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * Asix AX88796 10/100 Ethernet controller support | |
7 | * Based on ne.c, by Donald Becker, et-al. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/errno.h> | |
17 | #include <linux/isapnp.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/timer.h> | |
23 | #include <linux/netdevice.h> | |
24 | #include <linux/etherdevice.h> | |
25 | #include <linux/ethtool.h> | |
26 | #include <linux/mii.h> | |
89e536a1 | 27 | #include <linux/eeprom_93cx6.h> |
825a2ff1 BD |
28 | |
29 | #include <net/ax88796.h> | |
30 | ||
31 | #include <asm/system.h> | |
32 | #include <asm/io.h> | |
33 | ||
34 | static int phy_debug = 0; | |
35 | ||
36 | /* Rename the lib8390.c functions to show that they are in this driver */ | |
37 | #define __ei_open ax_ei_open | |
38 | #define __ei_close ax_ei_close | |
39 | #define __ei_poll ax_ei_poll | |
40 | #define __ei_tx_timeout ax_ei_tx_timeout | |
41 | #define __ei_interrupt ax_ei_interrupt | |
42 | #define ____alloc_ei_netdev ax__alloc_ei_netdev | |
43 | #define __NS8390_init ax_NS8390_init | |
44 | ||
45 | /* force unsigned long back to 'void __iomem *' */ | |
46 | #define ax_convert_addr(_a) ((void __force __iomem *)(_a)) | |
47 | ||
48 | #define ei_inb(_a) readb(ax_convert_addr(_a)) | |
49 | #define ei_outb(_v, _a) writeb(_v, ax_convert_addr(_a)) | |
50 | ||
51 | #define ei_inb_p(_a) ei_inb(_a) | |
52 | #define ei_outb_p(_v, _a) ei_outb(_v, _a) | |
53 | ||
54 | /* define EI_SHIFT() to take into account our register offsets */ | |
55 | #define EI_SHIFT(x) (ei_local->reg_offset[(x)]) | |
56 | ||
57 | /* Ensure we have our RCR base value */ | |
58 | #define AX88796_PLATFORM | |
59 | ||
60 | static unsigned char version[] = "ax88796.c: Copyright 2005,2007 Simtec Electronics\n"; | |
61 | ||
62 | #include "lib8390.c" | |
63 | ||
64 | #define DRV_NAME "ax88796" | |
65 | #define DRV_VERSION "1.00" | |
66 | ||
67 | /* from ne.c */ | |
68 | #define NE_CMD EI_SHIFT(0x00) | |
69 | #define NE_RESET EI_SHIFT(0x1f) | |
70 | #define NE_DATAPORT EI_SHIFT(0x10) | |
71 | ||
72 | #define NE1SM_START_PG 0x20 /* First page of TX buffer */ | |
73 | #define NE1SM_STOP_PG 0x40 /* Last page +1 of RX ring */ | |
74 | #define NESM_START_PG 0x40 /* First page of TX buffer */ | |
75 | #define NESM_STOP_PG 0x80 /* Last page +1 of RX ring */ | |
76 | ||
77 | /* device private data */ | |
78 | ||
79 | struct ax_device { | |
80 | struct timer_list mii_timer; | |
81 | spinlock_t mii_lock; | |
82 | struct mii_if_info mii; | |
83 | ||
84 | u32 msg_enable; | |
85 | void __iomem *map2; | |
86 | struct platform_device *dev; | |
87 | struct resource *mem; | |
88 | struct resource *mem2; | |
89 | struct ax_plat_data *plat; | |
90 | ||
91 | unsigned char running; | |
92 | unsigned char resume_open; | |
93 | ||
94 | u32 reg_offsets[0x20]; | |
95 | }; | |
96 | ||
97 | static inline struct ax_device *to_ax_dev(struct net_device *dev) | |
98 | { | |
99 | struct ei_device *ei_local = netdev_priv(dev); | |
100 | return (struct ax_device *)(ei_local+1); | |
101 | } | |
102 | ||
103 | /* ax_initial_check | |
104 | * | |
105 | * do an initial probe for the card to check wether it exists | |
106 | * and is functional | |
107 | */ | |
108 | ||
109 | static int ax_initial_check(struct net_device *dev) | |
110 | { | |
111 | struct ei_device *ei_local = netdev_priv(dev); | |
112 | void __iomem *ioaddr = ei_local->mem; | |
113 | int reg0; | |
114 | int regd; | |
115 | ||
116 | reg0 = ei_inb(ioaddr); | |
117 | if (reg0 == 0xFF) | |
118 | return -ENODEV; | |
119 | ||
120 | ei_outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, ioaddr + E8390_CMD); | |
121 | regd = ei_inb(ioaddr + 0x0d); | |
122 | ei_outb(0xff, ioaddr + 0x0d); | |
123 | ei_outb(E8390_NODMA+E8390_PAGE0, ioaddr + E8390_CMD); | |
124 | ei_inb(ioaddr + EN0_COUNTER0); /* Clear the counter by reading. */ | |
125 | if (ei_inb(ioaddr + EN0_COUNTER0) != 0) { | |
126 | ei_outb(reg0, ioaddr); | |
127 | ei_outb(regd, ioaddr + 0x0d); /* Restore the old values. */ | |
128 | return -ENODEV; | |
129 | } | |
130 | ||
131 | return 0; | |
132 | } | |
133 | ||
134 | /* Hard reset the card. This used to pause for the same period that a | |
135 | 8390 reset command required, but that shouldn't be necessary. */ | |
136 | ||
137 | static void ax_reset_8390(struct net_device *dev) | |
138 | { | |
139 | struct ei_device *ei_local = netdev_priv(dev); | |
237c5e8e | 140 | struct ax_device *ax = to_ax_dev(dev); |
825a2ff1 BD |
141 | unsigned long reset_start_time = jiffies; |
142 | void __iomem *addr = (void __iomem *)dev->base_addr; | |
143 | ||
144 | if (ei_debug > 1) | |
237c5e8e | 145 | dev_dbg(&ax->dev->dev, "resetting the 8390 t=%ld\n", jiffies); |
825a2ff1 BD |
146 | |
147 | ei_outb(ei_inb(addr + NE_RESET), addr + NE_RESET); | |
148 | ||
149 | ei_status.txing = 0; | |
150 | ei_status.dmaing = 0; | |
151 | ||
152 | /* This check _should_not_ be necessary, omit eventually. */ | |
153 | while ((ei_inb(addr + EN0_ISR) & ENISR_RESET) == 0) { | |
154 | if (jiffies - reset_start_time > 2*HZ/100) { | |
237c5e8e | 155 | dev_warn(&ax->dev->dev, "%s: %s did not complete.\n", |
825a2ff1 BD |
156 | __FUNCTION__, dev->name); |
157 | break; | |
158 | } | |
159 | } | |
160 | ||
161 | ei_outb(ENISR_RESET, addr + EN0_ISR); /* Ack intr. */ | |
162 | } | |
163 | ||
164 | ||
165 | static void ax_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr, | |
166 | int ring_page) | |
167 | { | |
168 | struct ei_device *ei_local = netdev_priv(dev); | |
237c5e8e | 169 | struct ax_device *ax = to_ax_dev(dev); |
825a2ff1 BD |
170 | void __iomem *nic_base = ei_local->mem; |
171 | ||
172 | /* This *shouldn't* happen. If it does, it's the last thing you'll see */ | |
173 | if (ei_status.dmaing) { | |
237c5e8e BD |
174 | dev_err(&ax->dev->dev, "%s: DMAing conflict in %s " |
175 | "[DMAstat:%d][irqlock:%d].\n", | |
825a2ff1 | 176 | dev->name, __FUNCTION__, |
237c5e8e | 177 | ei_status.dmaing, ei_status.irqlock); |
825a2ff1 BD |
178 | return; |
179 | } | |
180 | ||
181 | ei_status.dmaing |= 0x01; | |
182 | ei_outb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD); | |
183 | ei_outb(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO); | |
184 | ei_outb(0, nic_base + EN0_RCNTHI); | |
185 | ei_outb(0, nic_base + EN0_RSARLO); /* On page boundary */ | |
186 | ei_outb(ring_page, nic_base + EN0_RSARHI); | |
187 | ei_outb(E8390_RREAD+E8390_START, nic_base + NE_CMD); | |
188 | ||
189 | if (ei_status.word16) | |
190 | readsw(nic_base + NE_DATAPORT, hdr, sizeof(struct e8390_pkt_hdr)>>1); | |
191 | else | |
192 | readsb(nic_base + NE_DATAPORT, hdr, sizeof(struct e8390_pkt_hdr)); | |
193 | ||
194 | ei_outb(ENISR_RDC, nic_base + EN0_ISR); /* Ack intr. */ | |
195 | ei_status.dmaing &= ~0x01; | |
196 | ||
197 | le16_to_cpus(&hdr->count); | |
198 | } | |
199 | ||
200 | ||
201 | /* Block input and output, similar to the Crynwr packet driver. If you | |
202 | are porting to a new ethercard, look at the packet driver source for hints. | |
203 | The NEx000 doesn't share the on-board packet memory -- you have to put | |
204 | the packet out through the "remote DMA" dataport using ei_outb. */ | |
205 | ||
206 | static void ax_block_input(struct net_device *dev, int count, | |
207 | struct sk_buff *skb, int ring_offset) | |
208 | { | |
209 | struct ei_device *ei_local = netdev_priv(dev); | |
237c5e8e | 210 | struct ax_device *ax = to_ax_dev(dev); |
825a2ff1 BD |
211 | void __iomem *nic_base = ei_local->mem; |
212 | char *buf = skb->data; | |
213 | ||
214 | if (ei_status.dmaing) { | |
237c5e8e BD |
215 | dev_err(&ax->dev->dev, |
216 | "%s: DMAing conflict in %s " | |
825a2ff1 | 217 | "[DMAstat:%d][irqlock:%d].\n", |
237c5e8e BD |
218 | dev->name, __FUNCTION__, |
219 | ei_status.dmaing, ei_status.irqlock); | |
825a2ff1 BD |
220 | return; |
221 | } | |
222 | ||
223 | ei_status.dmaing |= 0x01; | |
224 | ||
225 | ei_outb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD); | |
226 | ei_outb(count & 0xff, nic_base + EN0_RCNTLO); | |
227 | ei_outb(count >> 8, nic_base + EN0_RCNTHI); | |
228 | ei_outb(ring_offset & 0xff, nic_base + EN0_RSARLO); | |
229 | ei_outb(ring_offset >> 8, nic_base + EN0_RSARHI); | |
230 | ei_outb(E8390_RREAD+E8390_START, nic_base + NE_CMD); | |
231 | ||
232 | if (ei_status.word16) { | |
233 | readsw(nic_base + NE_DATAPORT, buf, count >> 1); | |
234 | if (count & 0x01) | |
235 | buf[count-1] = ei_inb(nic_base + NE_DATAPORT); | |
236 | ||
237 | } else { | |
238 | readsb(nic_base + NE_DATAPORT, buf, count); | |
239 | } | |
240 | ||
241 | ei_status.dmaing &= ~1; | |
242 | } | |
243 | ||
244 | static void ax_block_output(struct net_device *dev, int count, | |
245 | const unsigned char *buf, const int start_page) | |
246 | { | |
247 | struct ei_device *ei_local = netdev_priv(dev); | |
237c5e8e | 248 | struct ax_device *ax = to_ax_dev(dev); |
825a2ff1 BD |
249 | void __iomem *nic_base = ei_local->mem; |
250 | unsigned long dma_start; | |
251 | ||
252 | /* Round the count up for word writes. Do we need to do this? | |
253 | What effect will an odd byte count have on the 8390? | |
254 | I should check someday. */ | |
255 | ||
256 | if (ei_status.word16 && (count & 0x01)) | |
257 | count++; | |
258 | ||
259 | /* This *shouldn't* happen. If it does, it's the last thing you'll see */ | |
260 | if (ei_status.dmaing) { | |
237c5e8e | 261 | dev_err(&ax->dev->dev, "%s: DMAing conflict in %s." |
825a2ff1 BD |
262 | "[DMAstat:%d][irqlock:%d]\n", |
263 | dev->name, __FUNCTION__, | |
264 | ei_status.dmaing, ei_status.irqlock); | |
265 | return; | |
266 | } | |
267 | ||
268 | ei_status.dmaing |= 0x01; | |
269 | /* We should already be in page 0, but to be safe... */ | |
270 | ei_outb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD); | |
271 | ||
272 | ei_outb(ENISR_RDC, nic_base + EN0_ISR); | |
273 | ||
274 | /* Now the normal output. */ | |
275 | ei_outb(count & 0xff, nic_base + EN0_RCNTLO); | |
276 | ei_outb(count >> 8, nic_base + EN0_RCNTHI); | |
277 | ei_outb(0x00, nic_base + EN0_RSARLO); | |
278 | ei_outb(start_page, nic_base + EN0_RSARHI); | |
279 | ||
280 | ei_outb(E8390_RWRITE+E8390_START, nic_base + NE_CMD); | |
281 | if (ei_status.word16) { | |
282 | writesw(nic_base + NE_DATAPORT, buf, count>>1); | |
283 | } else { | |
284 | writesb(nic_base + NE_DATAPORT, buf, count); | |
285 | } | |
286 | ||
287 | dma_start = jiffies; | |
288 | ||
289 | while ((ei_inb(nic_base + EN0_ISR) & ENISR_RDC) == 0) { | |
290 | if (jiffies - dma_start > 2*HZ/100) { /* 20ms */ | |
237c5e8e BD |
291 | dev_warn(&ax->dev->dev, |
292 | "%s: timeout waiting for Tx RDC.\n", dev->name); | |
825a2ff1 BD |
293 | ax_reset_8390(dev); |
294 | ax_NS8390_init(dev,1); | |
295 | break; | |
296 | } | |
297 | } | |
298 | ||
299 | ei_outb(ENISR_RDC, nic_base + EN0_ISR); /* Ack intr. */ | |
300 | ei_status.dmaing &= ~0x01; | |
301 | return; | |
302 | } | |
303 | ||
304 | /* definitions for accessing MII/EEPROM interface */ | |
305 | ||
306 | #define AX_MEMR EI_SHIFT(0x14) | |
307 | #define AX_MEMR_MDC (1<<0) | |
308 | #define AX_MEMR_MDIR (1<<1) | |
309 | #define AX_MEMR_MDI (1<<2) | |
310 | #define AX_MEMR_MDO (1<<3) | |
311 | #define AX_MEMR_EECS (1<<4) | |
312 | #define AX_MEMR_EEI (1<<5) | |
313 | #define AX_MEMR_EEO (1<<6) | |
314 | #define AX_MEMR_EECLK (1<<7) | |
315 | ||
316 | /* ax_mii_ei_outbits | |
317 | * | |
318 | * write the specified set of bits to the phy | |
319 | */ | |
320 | ||
321 | static void | |
322 | ax_mii_ei_outbits(struct net_device *dev, unsigned int bits, int len) | |
323 | { | |
324 | struct ei_device *ei_local = (struct ei_device *) netdev_priv(dev); | |
325 | void __iomem *memr_addr = (void __iomem *)dev->base_addr + AX_MEMR; | |
326 | unsigned int memr; | |
327 | ||
328 | /* clock low, data to output mode */ | |
329 | memr = ei_inb(memr_addr); | |
330 | memr &= ~(AX_MEMR_MDC | AX_MEMR_MDIR); | |
331 | ei_outb(memr, memr_addr); | |
332 | ||
333 | for (len--; len >= 0; len--) { | |
334 | if (bits & (1 << len)) | |
335 | memr |= AX_MEMR_MDO; | |
336 | else | |
337 | memr &= ~AX_MEMR_MDO; | |
338 | ||
339 | ei_outb(memr, memr_addr); | |
340 | ||
341 | /* clock high */ | |
342 | ||
343 | ei_outb(memr | AX_MEMR_MDC, memr_addr); | |
344 | udelay(1); | |
345 | ||
346 | /* clock low */ | |
347 | ei_outb(memr, memr_addr); | |
348 | } | |
349 | ||
350 | /* leaves the clock line low, mdir input */ | |
351 | memr |= AX_MEMR_MDIR; | |
352 | ei_outb(memr, (void __iomem *)dev->base_addr + AX_MEMR); | |
353 | } | |
354 | ||
355 | /* ax_phy_ei_inbits | |
356 | * | |
357 | * read a specified number of bits from the phy | |
358 | */ | |
359 | ||
360 | static unsigned int | |
361 | ax_phy_ei_inbits(struct net_device *dev, int no) | |
362 | { | |
363 | struct ei_device *ei_local = (struct ei_device *) netdev_priv(dev); | |
364 | void __iomem *memr_addr = (void __iomem *)dev->base_addr + AX_MEMR; | |
365 | unsigned int memr; | |
366 | unsigned int result = 0; | |
367 | ||
368 | /* clock low, data to input mode */ | |
369 | memr = ei_inb(memr_addr); | |
370 | memr &= ~AX_MEMR_MDC; | |
371 | memr |= AX_MEMR_MDIR; | |
372 | ei_outb(memr, memr_addr); | |
373 | ||
374 | for (no--; no >= 0; no--) { | |
375 | ei_outb(memr | AX_MEMR_MDC, memr_addr); | |
376 | ||
377 | udelay(1); | |
378 | ||
379 | if (ei_inb(memr_addr) & AX_MEMR_MDI) | |
380 | result |= (1<<no); | |
381 | ||
382 | ei_outb(memr, memr_addr); | |
383 | } | |
384 | ||
385 | return result; | |
386 | } | |
387 | ||
388 | /* ax_phy_issueaddr | |
389 | * | |
390 | * use the low level bit shifting routines to send the address | |
391 | * and command to the specified phy | |
392 | */ | |
393 | ||
394 | static void | |
395 | ax_phy_issueaddr(struct net_device *dev, int phy_addr, int reg, int opc) | |
396 | { | |
397 | if (phy_debug) | |
398 | pr_debug("%s: dev %p, %04x, %04x, %d\n", | |
399 | __FUNCTION__, dev, phy_addr, reg, opc); | |
400 | ||
401 | ax_mii_ei_outbits(dev, 0x3f, 6); /* pre-amble */ | |
402 | ax_mii_ei_outbits(dev, 1, 2); /* frame-start */ | |
403 | ax_mii_ei_outbits(dev, opc, 2); /* op code */ | |
404 | ax_mii_ei_outbits(dev, phy_addr, 5); /* phy address */ | |
405 | ax_mii_ei_outbits(dev, reg, 5); /* reg address */ | |
406 | } | |
407 | ||
408 | static int | |
409 | ax_phy_read(struct net_device *dev, int phy_addr, int reg) | |
410 | { | |
411 | struct ei_device *ei_local = (struct ei_device *) netdev_priv(dev); | |
412 | unsigned long flags; | |
413 | unsigned int result; | |
414 | ||
415 | spin_lock_irqsave(&ei_local->page_lock, flags); | |
416 | ||
417 | ax_phy_issueaddr(dev, phy_addr, reg, 2); | |
418 | ||
419 | result = ax_phy_ei_inbits(dev, 17); | |
420 | result &= ~(3<<16); | |
421 | ||
422 | spin_unlock_irqrestore(&ei_local->page_lock, flags); | |
423 | ||
424 | if (phy_debug) | |
425 | pr_debug("%s: %04x.%04x => read %04x\n", __FUNCTION__, | |
426 | phy_addr, reg, result); | |
427 | ||
428 | return result; | |
429 | } | |
430 | ||
431 | static void | |
432 | ax_phy_write(struct net_device *dev, int phy_addr, int reg, int value) | |
433 | { | |
434 | struct ei_device *ei = (struct ei_device *) netdev_priv(dev); | |
237c5e8e | 435 | struct ax_device *ax = to_ax_dev(dev); |
825a2ff1 BD |
436 | unsigned long flags; |
437 | ||
237c5e8e BD |
438 | dev_dbg(&ax->dev->dev, "%s: %p, %04x, %04x %04x\n", |
439 | __FUNCTION__, dev, phy_addr, reg, value); | |
825a2ff1 BD |
440 | |
441 | spin_lock_irqsave(&ei->page_lock, flags); | |
442 | ||
443 | ax_phy_issueaddr(dev, phy_addr, reg, 1); | |
444 | ax_mii_ei_outbits(dev, 2, 2); /* send TA */ | |
445 | ax_mii_ei_outbits(dev, value, 16); | |
446 | ||
447 | spin_unlock_irqrestore(&ei->page_lock, flags); | |
448 | } | |
449 | ||
450 | static void ax_mii_expiry(unsigned long data) | |
451 | { | |
452 | struct net_device *dev = (struct net_device *)data; | |
453 | struct ax_device *ax = to_ax_dev(dev); | |
454 | unsigned long flags; | |
455 | ||
456 | spin_lock_irqsave(&ax->mii_lock, flags); | |
457 | mii_check_media(&ax->mii, netif_msg_link(ax), 0); | |
458 | spin_unlock_irqrestore(&ax->mii_lock, flags); | |
459 | ||
460 | if (ax->running) { | |
461 | ax->mii_timer.expires = jiffies + HZ*2; | |
462 | add_timer(&ax->mii_timer); | |
463 | } | |
464 | } | |
465 | ||
466 | static int ax_open(struct net_device *dev) | |
467 | { | |
468 | struct ax_device *ax = to_ax_dev(dev); | |
469 | struct ei_device *ei_local = netdev_priv(dev); | |
470 | int ret; | |
471 | ||
2832e856 | 472 | dev_dbg(&ax->dev->dev, "%s: open\n", dev->name); |
825a2ff1 BD |
473 | |
474 | ret = request_irq(dev->irq, ax_ei_interrupt, 0, dev->name, dev); | |
475 | if (ret) | |
476 | return ret; | |
477 | ||
478 | ret = ax_ei_open(dev); | |
479 | if (ret) | |
480 | return ret; | |
481 | ||
482 | /* turn the phy on (if turned off) */ | |
483 | ||
484 | ei_outb(ax->plat->gpoc_val, ei_local->mem + EI_SHIFT(0x17)); | |
485 | ax->running = 1; | |
486 | ||
487 | /* start the MII timer */ | |
488 | ||
489 | init_timer(&ax->mii_timer); | |
490 | ||
491 | ax->mii_timer.expires = jiffies+1; | |
492 | ax->mii_timer.data = (unsigned long) dev; | |
493 | ax->mii_timer.function = ax_mii_expiry; | |
494 | ||
495 | add_timer(&ax->mii_timer); | |
496 | ||
497 | return 0; | |
498 | } | |
499 | ||
500 | static int ax_close(struct net_device *dev) | |
501 | { | |
502 | struct ax_device *ax = to_ax_dev(dev); | |
503 | struct ei_device *ei_local = netdev_priv(dev); | |
504 | ||
2832e856 | 505 | dev_dbg(&ax->dev->dev, "%s: close\n", dev->name); |
825a2ff1 BD |
506 | |
507 | /* turn the phy off */ | |
508 | ||
509 | ei_outb(ax->plat->gpoc_val | (1<<6), | |
510 | ei_local->mem + EI_SHIFT(0x17)); | |
511 | ||
512 | ax->running = 0; | |
513 | wmb(); | |
514 | ||
515 | del_timer_sync(&ax->mii_timer); | |
516 | ax_ei_close(dev); | |
517 | ||
518 | free_irq(dev->irq, dev); | |
519 | return 0; | |
520 | } | |
521 | ||
522 | static int ax_ioctl(struct net_device *dev, struct ifreq *req, int cmd) | |
523 | { | |
524 | struct ax_device *ax = to_ax_dev(dev); | |
525 | unsigned long flags; | |
526 | int rc; | |
527 | ||
528 | if (!netif_running(dev)) | |
529 | return -EINVAL; | |
530 | ||
531 | spin_lock_irqsave(&ax->mii_lock, flags); | |
532 | rc = generic_mii_ioctl(&ax->mii, if_mii(req), cmd, NULL); | |
533 | spin_unlock_irqrestore(&ax->mii_lock, flags); | |
534 | ||
535 | return rc; | |
536 | } | |
537 | ||
538 | /* ethtool ops */ | |
539 | ||
540 | static void ax_get_drvinfo(struct net_device *dev, | |
541 | struct ethtool_drvinfo *info) | |
542 | { | |
543 | struct ax_device *ax = to_ax_dev(dev); | |
544 | ||
545 | strcpy(info->driver, DRV_NAME); | |
546 | strcpy(info->version, DRV_VERSION); | |
547 | strcpy(info->bus_info, ax->dev->name); | |
548 | } | |
549 | ||
550 | static int ax_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
551 | { | |
552 | struct ax_device *ax = to_ax_dev(dev); | |
553 | unsigned long flags; | |
554 | ||
555 | spin_lock_irqsave(&ax->mii_lock, flags); | |
556 | mii_ethtool_gset(&ax->mii, cmd); | |
c0912585 | 557 | spin_unlock_irqrestore(&ax->mii_lock, flags); |
825a2ff1 BD |
558 | |
559 | return 0; | |
560 | } | |
561 | ||
562 | static int ax_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
563 | { | |
564 | struct ax_device *ax = to_ax_dev(dev); | |
565 | unsigned long flags; | |
566 | int rc; | |
567 | ||
568 | spin_lock_irqsave(&ax->mii_lock, flags); | |
569 | rc = mii_ethtool_sset(&ax->mii, cmd); | |
c0912585 | 570 | spin_unlock_irqrestore(&ax->mii_lock, flags); |
825a2ff1 BD |
571 | |
572 | return rc; | |
573 | } | |
574 | ||
575 | static int ax_nway_reset(struct net_device *dev) | |
576 | { | |
577 | struct ax_device *ax = to_ax_dev(dev); | |
578 | return mii_nway_restart(&ax->mii); | |
579 | } | |
580 | ||
581 | static u32 ax_get_link(struct net_device *dev) | |
582 | { | |
583 | struct ax_device *ax = to_ax_dev(dev); | |
584 | return mii_link_ok(&ax->mii); | |
585 | } | |
586 | ||
587 | static const struct ethtool_ops ax_ethtool_ops = { | |
588 | .get_drvinfo = ax_get_drvinfo, | |
589 | .get_settings = ax_get_settings, | |
590 | .set_settings = ax_set_settings, | |
591 | .nway_reset = ax_nway_reset, | |
592 | .get_link = ax_get_link, | |
825a2ff1 BD |
593 | }; |
594 | ||
89e536a1 MD |
595 | #ifdef CONFIG_AX88796_93CX6 |
596 | static void ax_eeprom_register_read(struct eeprom_93cx6 *eeprom) | |
597 | { | |
598 | struct ei_device *ei_local = eeprom->data; | |
599 | u8 reg = ei_inb(ei_local->mem + AX_MEMR); | |
600 | ||
601 | eeprom->reg_data_in = reg & AX_MEMR_EEI; | |
602 | eeprom->reg_data_out = reg & AX_MEMR_EEO; /* Input pin */ | |
603 | eeprom->reg_data_clock = reg & AX_MEMR_EECLK; | |
604 | eeprom->reg_chip_select = reg & AX_MEMR_EECS; | |
605 | } | |
606 | ||
607 | static void ax_eeprom_register_write(struct eeprom_93cx6 *eeprom) | |
608 | { | |
609 | struct ei_device *ei_local = eeprom->data; | |
610 | u8 reg = ei_inb(ei_local->mem + AX_MEMR); | |
611 | ||
612 | reg &= ~(AX_MEMR_EEI | AX_MEMR_EECLK | AX_MEMR_EECS); | |
613 | ||
614 | if (eeprom->reg_data_in) | |
615 | reg |= AX_MEMR_EEI; | |
616 | if (eeprom->reg_data_clock) | |
617 | reg |= AX_MEMR_EECLK; | |
618 | if (eeprom->reg_chip_select) | |
619 | reg |= AX_MEMR_EECS; | |
620 | ||
621 | ei_outb(reg, ei_local->mem + AX_MEMR); | |
622 | udelay(10); | |
623 | } | |
624 | #endif | |
625 | ||
825a2ff1 BD |
626 | /* setup code */ |
627 | ||
628 | static void ax_initial_setup(struct net_device *dev, struct ei_device *ei_local) | |
629 | { | |
630 | void __iomem *ioaddr = ei_local->mem; | |
631 | struct ax_device *ax = to_ax_dev(dev); | |
632 | ||
633 | /* Select page 0*/ | |
634 | ei_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, ioaddr + E8390_CMD); | |
635 | ||
636 | /* set to byte access */ | |
637 | ei_outb(ax->plat->dcr_val & ~1, ioaddr + EN0_DCFG); | |
638 | ei_outb(ax->plat->gpoc_val, ioaddr + EI_SHIFT(0x17)); | |
639 | } | |
640 | ||
641 | /* ax_init_dev | |
642 | * | |
643 | * initialise the specified device, taking care to note the MAC | |
644 | * address it may already have (if configured), ensure | |
645 | * the device is ready to be used by lib8390.c and registerd with | |
646 | * the network layer. | |
647 | */ | |
648 | ||
649 | static int ax_init_dev(struct net_device *dev, int first_init) | |
650 | { | |
651 | struct ei_device *ei_local = netdev_priv(dev); | |
652 | struct ax_device *ax = to_ax_dev(dev); | |
653 | void __iomem *ioaddr = ei_local->mem; | |
654 | unsigned int start_page; | |
655 | unsigned int stop_page; | |
656 | int ret; | |
657 | int i; | |
658 | ||
659 | ret = ax_initial_check(dev); | |
660 | if (ret) | |
661 | goto err_out; | |
662 | ||
663 | /* setup goes here */ | |
664 | ||
665 | ax_initial_setup(dev, ei_local); | |
666 | ||
667 | /* read the mac from the card prom if we need it */ | |
668 | ||
669 | if (first_init && ax->plat->flags & AXFLG_HAS_EEPROM) { | |
670 | unsigned char SA_prom[32]; | |
671 | ||
672 | for(i = 0; i < sizeof(SA_prom); i+=2) { | |
673 | SA_prom[i] = ei_inb(ioaddr + NE_DATAPORT); | |
674 | SA_prom[i+1] = ei_inb(ioaddr + NE_DATAPORT); | |
675 | } | |
676 | ||
677 | if (ax->plat->wordlength == 2) | |
678 | for (i = 0; i < 16; i++) | |
679 | SA_prom[i] = SA_prom[i+i]; | |
680 | ||
681 | memcpy(dev->dev_addr, SA_prom, 6); | |
682 | } | |
683 | ||
89e536a1 MD |
684 | #ifdef CONFIG_AX88796_93CX6 |
685 | if (first_init && ax->plat->flags & AXFLG_HAS_93CX6) { | |
686 | unsigned char mac_addr[6]; | |
687 | struct eeprom_93cx6 eeprom; | |
688 | ||
689 | eeprom.data = ei_local; | |
690 | eeprom.register_read = ax_eeprom_register_read; | |
691 | eeprom.register_write = ax_eeprom_register_write; | |
692 | eeprom.width = PCI_EEPROM_WIDTH_93C56; | |
693 | ||
694 | eeprom_93cx6_multiread(&eeprom, 0, | |
695 | (__le16 __force *)mac_addr, | |
696 | sizeof(mac_addr) >> 1); | |
697 | ||
698 | memcpy(dev->dev_addr, mac_addr, 6); | |
699 | } | |
700 | #endif | |
825a2ff1 BD |
701 | if (ax->plat->wordlength == 2) { |
702 | /* We must set the 8390 for word mode. */ | |
703 | ei_outb(ax->plat->dcr_val, ei_local->mem + EN0_DCFG); | |
704 | start_page = NESM_START_PG; | |
705 | stop_page = NESM_STOP_PG; | |
706 | } else { | |
707 | start_page = NE1SM_START_PG; | |
708 | stop_page = NE1SM_STOP_PG; | |
709 | } | |
710 | ||
711 | /* load the mac-address from the device if this is the | |
712 | * first time we've initialised */ | |
713 | ||
714 | if (first_init && ax->plat->flags & AXFLG_MAC_FROMDEV) { | |
715 | ei_outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP, | |
716 | ei_local->mem + E8390_CMD); /* 0x61 */ | |
717 | ||
718 | for (i = 0 ; i < ETHER_ADDR_LEN ; i++) | |
719 | dev->dev_addr[i] = ei_inb(ioaddr + EN1_PHYS_SHIFT(i)); | |
720 | } | |
721 | ||
722 | ax_reset_8390(dev); | |
723 | ||
724 | ei_status.name = "AX88796"; | |
725 | ei_status.tx_start_page = start_page; | |
726 | ei_status.stop_page = stop_page; | |
727 | ei_status.word16 = (ax->plat->wordlength == 2); | |
728 | ei_status.rx_start_page = start_page + TX_PAGES; | |
729 | ||
730 | #ifdef PACKETBUF_MEMSIZE | |
731 | /* Allow the packet buffer size to be overridden by know-it-alls. */ | |
732 | ei_status.stop_page = ei_status.tx_start_page + PACKETBUF_MEMSIZE; | |
733 | #endif | |
734 | ||
735 | ei_status.reset_8390 = &ax_reset_8390; | |
736 | ei_status.block_input = &ax_block_input; | |
737 | ei_status.block_output = &ax_block_output; | |
738 | ei_status.get_8390_hdr = &ax_get_8390_hdr; | |
739 | ei_status.priv = 0; | |
740 | ||
741 | dev->open = ax_open; | |
742 | dev->stop = ax_close; | |
743 | dev->do_ioctl = ax_ioctl; | |
744 | dev->ethtool_ops = &ax_ethtool_ops; | |
745 | ||
746 | ax->msg_enable = NETIF_MSG_LINK; | |
747 | ax->mii.phy_id_mask = 0x1f; | |
748 | ax->mii.reg_num_mask = 0x1f; | |
749 | ax->mii.phy_id = 0x10; /* onboard phy */ | |
750 | ax->mii.force_media = 0; | |
751 | ax->mii.full_duplex = 0; | |
752 | ax->mii.mdio_read = ax_phy_read; | |
753 | ax->mii.mdio_write = ax_phy_write; | |
754 | ax->mii.dev = dev; | |
755 | ||
756 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
757 | dev->poll_controller = ax_ei_poll; | |
758 | #endif | |
759 | ax_NS8390_init(dev, 0); | |
760 | ||
761 | if (first_init) { | |
237c5e8e | 762 | DECLARE_MAC_BUF(mac); |
825a2ff1 | 763 | |
237c5e8e BD |
764 | dev_info(&ax->dev->dev, "%dbit, irq %d, %lx, MAC: %s\n", |
765 | ei_status.word16 ? 16:8, dev->irq, dev->base_addr, | |
766 | print_mac(mac, dev->dev_addr)); | |
825a2ff1 BD |
767 | } |
768 | ||
769 | ret = register_netdev(dev); | |
770 | if (ret) | |
771 | goto out_irq; | |
772 | ||
773 | return 0; | |
774 | ||
775 | out_irq: | |
776 | /* cleanup irq */ | |
777 | free_irq(dev->irq, dev); | |
778 | err_out: | |
779 | return ret; | |
780 | } | |
781 | ||
782 | static int ax_remove(struct platform_device *_dev) | |
783 | { | |
784 | struct net_device *dev = platform_get_drvdata(_dev); | |
785 | struct ax_device *ax; | |
786 | ||
787 | ax = to_ax_dev(dev); | |
788 | ||
789 | unregister_netdev(dev); | |
790 | free_irq(dev->irq, dev); | |
791 | ||
792 | iounmap(ei_status.mem); | |
793 | release_resource(ax->mem); | |
794 | kfree(ax->mem); | |
795 | ||
796 | if (ax->map2) { | |
797 | iounmap(ax->map2); | |
798 | release_resource(ax->mem2); | |
799 | kfree(ax->mem2); | |
800 | } | |
801 | ||
802 | free_netdev(dev); | |
803 | ||
804 | return 0; | |
805 | } | |
806 | ||
807 | /* ax_probe | |
808 | * | |
809 | * This is the entry point when the platform device system uses to | |
810 | * notify us of a new device to attach to. Allocate memory, find | |
811 | * the resources and information passed, and map the necessary registers. | |
812 | */ | |
813 | ||
814 | static int ax_probe(struct platform_device *pdev) | |
815 | { | |
816 | struct net_device *dev; | |
817 | struct ax_device *ax; | |
818 | struct resource *res; | |
819 | size_t size; | |
820 | int ret; | |
821 | ||
822 | dev = ax__alloc_ei_netdev(sizeof(struct ax_device)); | |
823 | if (dev == NULL) | |
824 | return -ENOMEM; | |
825 | ||
826 | /* ok, let's setup our device */ | |
827 | ax = to_ax_dev(dev); | |
828 | ||
829 | memset(ax, 0, sizeof(struct ax_device)); | |
830 | ||
831 | spin_lock_init(&ax->mii_lock); | |
832 | ||
833 | ax->dev = pdev; | |
834 | ax->plat = pdev->dev.platform_data; | |
835 | platform_set_drvdata(pdev, dev); | |
836 | ||
837 | ei_status.rxcr_base = ax->plat->rcr_val; | |
838 | ||
839 | /* find the platform resources */ | |
840 | ||
841 | dev->irq = platform_get_irq(pdev, 0); | |
842 | if (dev->irq < 0) { | |
843 | dev_err(&pdev->dev, "no IRQ specified\n"); | |
844 | ret = -ENXIO; | |
845 | goto exit_mem; | |
846 | } | |
847 | ||
848 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
849 | if (res == NULL) { | |
850 | dev_err(&pdev->dev, "no MEM specified\n"); | |
851 | ret = -ENXIO; | |
852 | goto exit_mem; | |
853 | } | |
854 | ||
855 | size = (res->end - res->start) + 1; | |
856 | ||
857 | /* setup the register offsets from either the platform data | |
858 | * or by using the size of the resource provided */ | |
859 | ||
860 | if (ax->plat->reg_offsets) | |
861 | ei_status.reg_offset = ax->plat->reg_offsets; | |
862 | else { | |
863 | ei_status.reg_offset = ax->reg_offsets; | |
864 | for (ret = 0; ret < 0x18; ret++) | |
865 | ax->reg_offsets[ret] = (size / 0x18) * ret; | |
866 | } | |
867 | ||
868 | ax->mem = request_mem_region(res->start, size, pdev->name); | |
869 | if (ax->mem == NULL) { | |
870 | dev_err(&pdev->dev, "cannot reserve registers\n"); | |
871 | ret = -ENXIO; | |
872 | goto exit_mem; | |
873 | } | |
874 | ||
875 | ei_status.mem = ioremap(res->start, size); | |
c7b17cb1 | 876 | dev->base_addr = (unsigned long)ei_status.mem; |
825a2ff1 BD |
877 | |
878 | if (ei_status.mem == NULL) { | |
b4efe22c AM |
879 | dev_err(&pdev->dev, "Cannot ioremap area (%08llx,%08llx)\n", |
880 | (unsigned long long)res->start, | |
881 | (unsigned long long)res->end); | |
825a2ff1 BD |
882 | |
883 | ret = -ENXIO; | |
884 | goto exit_req; | |
885 | } | |
886 | ||
887 | /* look for reset area */ | |
888 | ||
889 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
890 | if (res == NULL) { | |
891 | if (!ax->plat->reg_offsets) { | |
892 | for (ret = 0; ret < 0x20; ret++) | |
893 | ax->reg_offsets[ret] = (size / 0x20) * ret; | |
894 | } | |
895 | ||
896 | ax->map2 = NULL; | |
897 | } else { | |
898 | size = (res->end - res->start) + 1; | |
899 | ||
900 | ax->mem2 = request_mem_region(res->start, size, pdev->name); | |
901 | if (ax->mem == NULL) { | |
902 | dev_err(&pdev->dev, "cannot reserve registers\n"); | |
903 | ret = -ENXIO; | |
904 | goto exit_mem1; | |
905 | } | |
906 | ||
907 | ax->map2 = ioremap(res->start, size); | |
908 | if (ax->map2 == NULL) { | |
898eb71c | 909 | dev_err(&pdev->dev, "cannot map reset register\n"); |
825a2ff1 BD |
910 | ret = -ENXIO; |
911 | goto exit_mem2; | |
912 | } | |
913 | ||
914 | ei_status.reg_offset[0x1f] = ax->map2 - ei_status.mem; | |
915 | } | |
916 | ||
917 | /* got resources, now initialise and register device */ | |
918 | ||
919 | ret = ax_init_dev(dev, 1); | |
920 | if (!ret) | |
921 | return 0; | |
922 | ||
923 | if (ax->map2 == NULL) | |
924 | goto exit_mem1; | |
925 | ||
926 | iounmap(ax->map2); | |
927 | ||
928 | exit_mem2: | |
929 | release_resource(ax->mem2); | |
930 | kfree(ax->mem2); | |
931 | ||
932 | exit_mem1: | |
933 | iounmap(ei_status.mem); | |
934 | ||
935 | exit_req: | |
936 | release_resource(ax->mem); | |
937 | kfree(ax->mem); | |
938 | ||
939 | exit_mem: | |
940 | free_netdev(dev); | |
941 | ||
942 | return ret; | |
943 | } | |
944 | ||
945 | /* suspend and resume */ | |
946 | ||
947 | #ifdef CONFIG_PM | |
948 | static int ax_suspend(struct platform_device *dev, pm_message_t state) | |
949 | { | |
950 | struct net_device *ndev = platform_get_drvdata(dev); | |
951 | struct ax_device *ax = to_ax_dev(ndev); | |
952 | ||
953 | ax->resume_open = ax->running; | |
954 | ||
955 | netif_device_detach(ndev); | |
956 | ax_close(ndev); | |
957 | ||
958 | return 0; | |
959 | } | |
960 | ||
961 | static int ax_resume(struct platform_device *pdev) | |
962 | { | |
963 | struct net_device *ndev = platform_get_drvdata(pdev); | |
964 | struct ax_device *ax = to_ax_dev(ndev); | |
965 | ||
966 | ax_initial_setup(ndev, netdev_priv(ndev)); | |
967 | ax_NS8390_init(ndev, ax->resume_open); | |
968 | netif_device_attach(ndev); | |
969 | ||
970 | if (ax->resume_open) | |
971 | ax_open(ndev); | |
972 | ||
973 | return 0; | |
974 | } | |
975 | ||
976 | #else | |
977 | #define ax_suspend NULL | |
978 | #define ax_resume NULL | |
979 | #endif | |
980 | ||
981 | static struct platform_driver axdrv = { | |
982 | .driver = { | |
983 | .name = "ax88796", | |
984 | .owner = THIS_MODULE, | |
985 | }, | |
986 | .probe = ax_probe, | |
987 | .remove = ax_remove, | |
988 | .suspend = ax_suspend, | |
989 | .resume = ax_resume, | |
990 | }; | |
991 | ||
992 | static int __init axdrv_init(void) | |
993 | { | |
994 | return platform_driver_register(&axdrv); | |
995 | } | |
996 | ||
997 | static void __exit axdrv_exit(void) | |
998 | { | |
999 | platform_driver_unregister(&axdrv); | |
1000 | } | |
1001 | ||
1002 | module_init(axdrv_init); | |
1003 | module_exit(axdrv_exit); | |
1004 | ||
1005 | MODULE_DESCRIPTION("AX88796 10/100 Ethernet platform driver"); | |
1006 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); | |
1007 | MODULE_LICENSE("GPL v2"); | |
72abb461 | 1008 | MODULE_ALIAS("platform:ax88796"); |