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Commit | Line | Data |
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6b7c5b94 SP |
1 | /* |
2 | * Copyright (C) 2005 - 2009 ServerEngines | |
3 | * All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License version 2 | |
7 | * as published by the Free Software Foundation. The full GNU General | |
8 | * Public License is included in this distribution in the file called COPYING. | |
9 | * | |
10 | * Contact Information: | |
11 | * linux-drivers@serverengines.com | |
12 | * | |
13 | * ServerEngines | |
14 | * 209 N. Fair Oaks Ave | |
15 | * Sunnyvale, CA 94085 | |
16 | */ | |
17 | ||
18 | #include "be.h" | |
8788fdc2 | 19 | #include "be_cmds.h" |
65f71b8b | 20 | #include <asm/div64.h> |
6b7c5b94 SP |
21 | |
22 | MODULE_VERSION(DRV_VER); | |
23 | MODULE_DEVICE_TABLE(pci, be_dev_ids); | |
24 | MODULE_DESCRIPTION(DRV_DESC " " DRV_VER); | |
25 | MODULE_AUTHOR("ServerEngines Corporation"); | |
26 | MODULE_LICENSE("GPL"); | |
27 | ||
28 | static unsigned int rx_frag_size = 2048; | |
29 | module_param(rx_frag_size, uint, S_IRUGO); | |
30 | MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data."); | |
31 | ||
6b7c5b94 | 32 | static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = { |
c4ca2374 | 33 | { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) }, |
59fd5d87 | 34 | { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) }, |
c4ca2374 AK |
35 | { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) }, |
36 | { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) }, | |
59fd5d87 | 37 | { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) }, |
6b7c5b94 SP |
38 | { 0 } |
39 | }; | |
40 | MODULE_DEVICE_TABLE(pci, be_dev_ids); | |
41 | ||
42 | static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q) | |
43 | { | |
44 | struct be_dma_mem *mem = &q->dma_mem; | |
45 | if (mem->va) | |
46 | pci_free_consistent(adapter->pdev, mem->size, | |
47 | mem->va, mem->dma); | |
48 | } | |
49 | ||
50 | static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q, | |
51 | u16 len, u16 entry_size) | |
52 | { | |
53 | struct be_dma_mem *mem = &q->dma_mem; | |
54 | ||
55 | memset(q, 0, sizeof(*q)); | |
56 | q->len = len; | |
57 | q->entry_size = entry_size; | |
58 | mem->size = len * entry_size; | |
59 | mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma); | |
60 | if (!mem->va) | |
61 | return -1; | |
62 | memset(mem->va, 0, mem->size); | |
63 | return 0; | |
64 | } | |
65 | ||
8788fdc2 | 66 | static void be_intr_set(struct be_adapter *adapter, bool enable) |
6b7c5b94 | 67 | { |
8788fdc2 | 68 | u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET; |
6b7c5b94 SP |
69 | u32 reg = ioread32(addr); |
70 | u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; | |
5f0b849e SP |
71 | |
72 | if (!enabled && enable) | |
6b7c5b94 | 73 | reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; |
5f0b849e | 74 | else if (enabled && !enable) |
6b7c5b94 | 75 | reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; |
5f0b849e | 76 | else |
6b7c5b94 | 77 | return; |
5f0b849e | 78 | |
6b7c5b94 SP |
79 | iowrite32(reg, addr); |
80 | } | |
81 | ||
8788fdc2 | 82 | static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted) |
6b7c5b94 SP |
83 | { |
84 | u32 val = 0; | |
85 | val |= qid & DB_RQ_RING_ID_MASK; | |
86 | val |= posted << DB_RQ_NUM_POSTED_SHIFT; | |
8788fdc2 | 87 | iowrite32(val, adapter->db + DB_RQ_OFFSET); |
6b7c5b94 SP |
88 | } |
89 | ||
8788fdc2 | 90 | static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted) |
6b7c5b94 SP |
91 | { |
92 | u32 val = 0; | |
93 | val |= qid & DB_TXULP_RING_ID_MASK; | |
94 | val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT; | |
8788fdc2 | 95 | iowrite32(val, adapter->db + DB_TXULP1_OFFSET); |
6b7c5b94 SP |
96 | } |
97 | ||
8788fdc2 | 98 | static void be_eq_notify(struct be_adapter *adapter, u16 qid, |
6b7c5b94 SP |
99 | bool arm, bool clear_int, u16 num_popped) |
100 | { | |
101 | u32 val = 0; | |
102 | val |= qid & DB_EQ_RING_ID_MASK; | |
103 | if (arm) | |
104 | val |= 1 << DB_EQ_REARM_SHIFT; | |
105 | if (clear_int) | |
106 | val |= 1 << DB_EQ_CLR_SHIFT; | |
107 | val |= 1 << DB_EQ_EVNT_SHIFT; | |
108 | val |= num_popped << DB_EQ_NUM_POPPED_SHIFT; | |
8788fdc2 | 109 | iowrite32(val, adapter->db + DB_EQ_OFFSET); |
6b7c5b94 SP |
110 | } |
111 | ||
8788fdc2 | 112 | void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped) |
6b7c5b94 SP |
113 | { |
114 | u32 val = 0; | |
115 | val |= qid & DB_CQ_RING_ID_MASK; | |
116 | if (arm) | |
117 | val |= 1 << DB_CQ_REARM_SHIFT; | |
118 | val |= num_popped << DB_CQ_NUM_POPPED_SHIFT; | |
8788fdc2 | 119 | iowrite32(val, adapter->db + DB_CQ_OFFSET); |
6b7c5b94 SP |
120 | } |
121 | ||
6b7c5b94 SP |
122 | static int be_mac_addr_set(struct net_device *netdev, void *p) |
123 | { | |
124 | struct be_adapter *adapter = netdev_priv(netdev); | |
125 | struct sockaddr *addr = p; | |
126 | int status = 0; | |
127 | ||
a65027e4 SP |
128 | status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id); |
129 | if (status) | |
130 | return status; | |
6b7c5b94 | 131 | |
a65027e4 SP |
132 | status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data, |
133 | adapter->if_handle, &adapter->pmac_id); | |
6b7c5b94 SP |
134 | if (!status) |
135 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
136 | ||
137 | return status; | |
138 | } | |
139 | ||
b31c50a7 | 140 | void netdev_stats_update(struct be_adapter *adapter) |
6b7c5b94 SP |
141 | { |
142 | struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va); | |
143 | struct be_rxf_stats *rxf_stats = &hw_stats->rxf; | |
144 | struct be_port_rxf_stats *port_stats = | |
145 | &rxf_stats->port[adapter->port_num]; | |
78122a52 | 146 | struct net_device_stats *dev_stats = &adapter->netdev->stats; |
68110868 | 147 | struct be_erx_stats *erx_stats = &hw_stats->erx; |
6b7c5b94 SP |
148 | |
149 | dev_stats->rx_packets = port_stats->rx_total_frames; | |
150 | dev_stats->tx_packets = port_stats->tx_unicastframes + | |
151 | port_stats->tx_multicastframes + port_stats->tx_broadcastframes; | |
152 | dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 | | |
153 | (u64) port_stats->rx_bytes_lsd; | |
154 | dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 | | |
155 | (u64) port_stats->tx_bytes_lsd; | |
156 | ||
157 | /* bad pkts received */ | |
158 | dev_stats->rx_errors = port_stats->rx_crc_errors + | |
159 | port_stats->rx_alignment_symbol_errors + | |
160 | port_stats->rx_in_range_errors + | |
68110868 SP |
161 | port_stats->rx_out_range_errors + |
162 | port_stats->rx_frame_too_long + | |
163 | port_stats->rx_dropped_too_small + | |
164 | port_stats->rx_dropped_too_short + | |
165 | port_stats->rx_dropped_header_too_small + | |
166 | port_stats->rx_dropped_tcp_length + | |
167 | port_stats->rx_dropped_runt + | |
168 | port_stats->rx_tcp_checksum_errs + | |
169 | port_stats->rx_ip_checksum_errs + | |
170 | port_stats->rx_udp_checksum_errs; | |
171 | ||
172 | /* no space in linux buffers: best possible approximation */ | |
173 | dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0]; | |
6b7c5b94 SP |
174 | |
175 | /* detailed rx errors */ | |
176 | dev_stats->rx_length_errors = port_stats->rx_in_range_errors + | |
68110868 SP |
177 | port_stats->rx_out_range_errors + |
178 | port_stats->rx_frame_too_long; | |
179 | ||
6b7c5b94 SP |
180 | /* receive ring buffer overflow */ |
181 | dev_stats->rx_over_errors = 0; | |
68110868 | 182 | |
6b7c5b94 SP |
183 | dev_stats->rx_crc_errors = port_stats->rx_crc_errors; |
184 | ||
185 | /* frame alignment errors */ | |
186 | dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors; | |
68110868 | 187 | |
6b7c5b94 SP |
188 | /* receiver fifo overrun */ |
189 | /* drops_no_pbuf is no per i/f, it's per BE card */ | |
190 | dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow + | |
191 | port_stats->rx_input_fifo_overflow + | |
192 | rxf_stats->rx_drops_no_pbuf; | |
193 | /* receiver missed packetd */ | |
194 | dev_stats->rx_missed_errors = 0; | |
68110868 SP |
195 | |
196 | /* packet transmit problems */ | |
197 | dev_stats->tx_errors = 0; | |
198 | ||
199 | /* no space available in linux */ | |
200 | dev_stats->tx_dropped = 0; | |
201 | ||
c5b9b92e | 202 | dev_stats->multicast = port_stats->rx_multicast_frames; |
68110868 SP |
203 | dev_stats->collisions = 0; |
204 | ||
6b7c5b94 SP |
205 | /* detailed tx_errors */ |
206 | dev_stats->tx_aborted_errors = 0; | |
207 | dev_stats->tx_carrier_errors = 0; | |
208 | dev_stats->tx_fifo_errors = 0; | |
209 | dev_stats->tx_heartbeat_errors = 0; | |
210 | dev_stats->tx_window_errors = 0; | |
211 | } | |
212 | ||
8788fdc2 | 213 | void be_link_status_update(struct be_adapter *adapter, bool link_up) |
6b7c5b94 | 214 | { |
6b7c5b94 SP |
215 | struct net_device *netdev = adapter->netdev; |
216 | ||
6b7c5b94 | 217 | /* If link came up or went down */ |
a8f447bd SP |
218 | if (adapter->link_up != link_up) { |
219 | if (link_up) { | |
6b7c5b94 SP |
220 | netif_start_queue(netdev); |
221 | netif_carrier_on(netdev); | |
222 | printk(KERN_INFO "%s: Link up\n", netdev->name); | |
a8f447bd SP |
223 | } else { |
224 | netif_stop_queue(netdev); | |
225 | netif_carrier_off(netdev); | |
226 | printk(KERN_INFO "%s: Link down\n", netdev->name); | |
6b7c5b94 | 227 | } |
a8f447bd | 228 | adapter->link_up = link_up; |
6b7c5b94 | 229 | } |
6b7c5b94 SP |
230 | } |
231 | ||
232 | /* Update the EQ delay n BE based on the RX frags consumed / sec */ | |
233 | static void be_rx_eqd_update(struct be_adapter *adapter) | |
234 | { | |
6b7c5b94 SP |
235 | struct be_eq_obj *rx_eq = &adapter->rx_eq; |
236 | struct be_drvr_stats *stats = &adapter->stats.drvr_stats; | |
4097f663 SP |
237 | ulong now = jiffies; |
238 | u32 eqd; | |
239 | ||
240 | if (!rx_eq->enable_aic) | |
241 | return; | |
242 | ||
243 | /* Wrapped around */ | |
244 | if (time_before(now, stats->rx_fps_jiffies)) { | |
245 | stats->rx_fps_jiffies = now; | |
246 | return; | |
247 | } | |
6b7c5b94 SP |
248 | |
249 | /* Update once a second */ | |
4097f663 | 250 | if ((now - stats->rx_fps_jiffies) < HZ) |
6b7c5b94 SP |
251 | return; |
252 | ||
253 | stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) / | |
4097f663 | 254 | ((now - stats->rx_fps_jiffies) / HZ); |
6b7c5b94 | 255 | |
4097f663 | 256 | stats->rx_fps_jiffies = now; |
6b7c5b94 SP |
257 | stats->be_prev_rx_frags = stats->be_rx_frags; |
258 | eqd = stats->be_rx_fps / 110000; | |
259 | eqd = eqd << 3; | |
260 | if (eqd > rx_eq->max_eqd) | |
261 | eqd = rx_eq->max_eqd; | |
262 | if (eqd < rx_eq->min_eqd) | |
263 | eqd = rx_eq->min_eqd; | |
264 | if (eqd < 10) | |
265 | eqd = 0; | |
266 | if (eqd != rx_eq->cur_eqd) | |
8788fdc2 | 267 | be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd); |
6b7c5b94 SP |
268 | |
269 | rx_eq->cur_eqd = eqd; | |
270 | } | |
271 | ||
6b7c5b94 SP |
272 | static struct net_device_stats *be_get_stats(struct net_device *dev) |
273 | { | |
78122a52 | 274 | return &dev->stats; |
6b7c5b94 SP |
275 | } |
276 | ||
65f71b8b SH |
277 | static u32 be_calc_rate(u64 bytes, unsigned long ticks) |
278 | { | |
279 | u64 rate = bytes; | |
280 | ||
281 | do_div(rate, ticks / HZ); | |
282 | rate <<= 3; /* bytes/sec -> bits/sec */ | |
283 | do_div(rate, 1000000ul); /* MB/Sec */ | |
284 | ||
285 | return rate; | |
286 | } | |
287 | ||
4097f663 SP |
288 | static void be_tx_rate_update(struct be_adapter *adapter) |
289 | { | |
290 | struct be_drvr_stats *stats = drvr_stats(adapter); | |
291 | ulong now = jiffies; | |
292 | ||
293 | /* Wrapped around? */ | |
294 | if (time_before(now, stats->be_tx_jiffies)) { | |
295 | stats->be_tx_jiffies = now; | |
296 | return; | |
297 | } | |
298 | ||
299 | /* Update tx rate once in two seconds */ | |
300 | if ((now - stats->be_tx_jiffies) > 2 * HZ) { | |
65f71b8b SH |
301 | stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes |
302 | - stats->be_tx_bytes_prev, | |
303 | now - stats->be_tx_jiffies); | |
4097f663 SP |
304 | stats->be_tx_jiffies = now; |
305 | stats->be_tx_bytes_prev = stats->be_tx_bytes; | |
306 | } | |
307 | } | |
308 | ||
6b7c5b94 SP |
309 | static void be_tx_stats_update(struct be_adapter *adapter, |
310 | u32 wrb_cnt, u32 copied, bool stopped) | |
311 | { | |
4097f663 | 312 | struct be_drvr_stats *stats = drvr_stats(adapter); |
6b7c5b94 SP |
313 | stats->be_tx_reqs++; |
314 | stats->be_tx_wrbs += wrb_cnt; | |
315 | stats->be_tx_bytes += copied; | |
316 | if (stopped) | |
317 | stats->be_tx_stops++; | |
6b7c5b94 SP |
318 | } |
319 | ||
320 | /* Determine number of WRB entries needed to xmit data in an skb */ | |
321 | static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy) | |
322 | { | |
ebc8d2ab DM |
323 | int cnt = (skb->len > skb->data_len); |
324 | ||
325 | cnt += skb_shinfo(skb)->nr_frags; | |
326 | ||
6b7c5b94 SP |
327 | /* to account for hdr wrb */ |
328 | cnt++; | |
329 | if (cnt & 1) { | |
330 | /* add a dummy to make it an even num */ | |
331 | cnt++; | |
332 | *dummy = true; | |
333 | } else | |
334 | *dummy = false; | |
335 | BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT); | |
336 | return cnt; | |
337 | } | |
338 | ||
339 | static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len) | |
340 | { | |
341 | wrb->frag_pa_hi = upper_32_bits(addr); | |
342 | wrb->frag_pa_lo = addr & 0xFFFFFFFF; | |
343 | wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK; | |
344 | } | |
345 | ||
346 | static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb, | |
347 | bool vlan, u32 wrb_cnt, u32 len) | |
348 | { | |
349 | memset(hdr, 0, sizeof(*hdr)); | |
350 | ||
351 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1); | |
352 | ||
353 | if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) { | |
354 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1); | |
355 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss, | |
356 | hdr, skb_shinfo(skb)->gso_size); | |
357 | } else if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
358 | if (is_tcp_pkt(skb)) | |
359 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1); | |
360 | else if (is_udp_pkt(skb)) | |
361 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1); | |
362 | } | |
363 | ||
364 | if (vlan && vlan_tx_tag_present(skb)) { | |
365 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1); | |
366 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag, | |
367 | hdr, vlan_tx_tag_get(skb)); | |
368 | } | |
369 | ||
370 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1); | |
371 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1); | |
372 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt); | |
373 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len); | |
374 | } | |
375 | ||
376 | ||
377 | static int make_tx_wrbs(struct be_adapter *adapter, | |
378 | struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb) | |
379 | { | |
380 | u64 busaddr; | |
381 | u32 i, copied = 0; | |
382 | struct pci_dev *pdev = adapter->pdev; | |
383 | struct sk_buff *first_skb = skb; | |
384 | struct be_queue_info *txq = &adapter->tx_obj.q; | |
385 | struct be_eth_wrb *wrb; | |
386 | struct be_eth_hdr_wrb *hdr; | |
387 | ||
6b7c5b94 | 388 | hdr = queue_head_node(txq); |
c190e3c8 | 389 | atomic_add(wrb_cnt, &txq->used); |
6b7c5b94 SP |
390 | queue_head_inc(txq); |
391 | ||
c190e3c8 AK |
392 | if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) { |
393 | dev_err(&pdev->dev, "TX DMA mapping failed\n"); | |
394 | return 0; | |
395 | } | |
396 | ||
ebc8d2ab DM |
397 | if (skb->len > skb->data_len) { |
398 | int len = skb->len - skb->data_len; | |
ebc8d2ab | 399 | wrb = queue_head_node(txq); |
c190e3c8 | 400 | busaddr = skb_shinfo(skb)->dma_head; |
ebc8d2ab DM |
401 | wrb_fill(wrb, busaddr, len); |
402 | be_dws_cpu_to_le(wrb, sizeof(*wrb)); | |
403 | queue_head_inc(txq); | |
404 | copied += len; | |
405 | } | |
6b7c5b94 | 406 | |
ebc8d2ab DM |
407 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
408 | struct skb_frag_struct *frag = | |
409 | &skb_shinfo(skb)->frags[i]; | |
c190e3c8 AK |
410 | |
411 | busaddr = skb_shinfo(skb)->dma_maps[i]; | |
ebc8d2ab DM |
412 | wrb = queue_head_node(txq); |
413 | wrb_fill(wrb, busaddr, frag->size); | |
414 | be_dws_cpu_to_le(wrb, sizeof(*wrb)); | |
415 | queue_head_inc(txq); | |
416 | copied += frag->size; | |
6b7c5b94 SP |
417 | } |
418 | ||
419 | if (dummy_wrb) { | |
420 | wrb = queue_head_node(txq); | |
421 | wrb_fill(wrb, 0, 0); | |
422 | be_dws_cpu_to_le(wrb, sizeof(*wrb)); | |
423 | queue_head_inc(txq); | |
424 | } | |
425 | ||
426 | wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false, | |
427 | wrb_cnt, copied); | |
428 | be_dws_cpu_to_le(hdr, sizeof(*hdr)); | |
429 | ||
430 | return copied; | |
431 | } | |
432 | ||
61357325 | 433 | static netdev_tx_t be_xmit(struct sk_buff *skb, |
b31c50a7 | 434 | struct net_device *netdev) |
6b7c5b94 SP |
435 | { |
436 | struct be_adapter *adapter = netdev_priv(netdev); | |
437 | struct be_tx_obj *tx_obj = &adapter->tx_obj; | |
438 | struct be_queue_info *txq = &tx_obj->q; | |
439 | u32 wrb_cnt = 0, copied = 0; | |
440 | u32 start = txq->head; | |
441 | bool dummy_wrb, stopped = false; | |
442 | ||
443 | wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb); | |
444 | ||
445 | copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb); | |
c190e3c8 AK |
446 | if (copied) { |
447 | /* record the sent skb in the sent_skb table */ | |
448 | BUG_ON(tx_obj->sent_skb_list[start]); | |
449 | tx_obj->sent_skb_list[start] = skb; | |
450 | ||
451 | /* Ensure txq has space for the next skb; Else stop the queue | |
452 | * *BEFORE* ringing the tx doorbell, so that we serialze the | |
453 | * tx compls of the current transmit which'll wake up the queue | |
454 | */ | |
455 | if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= | |
456 | txq->len) { | |
457 | netif_stop_queue(netdev); | |
458 | stopped = true; | |
459 | } | |
6b7c5b94 | 460 | |
c190e3c8 | 461 | be_txq_notify(adapter, txq->id, wrb_cnt); |
6b7c5b94 | 462 | |
c190e3c8 AK |
463 | be_tx_stats_update(adapter, wrb_cnt, copied, stopped); |
464 | } else { | |
465 | txq->head = start; | |
466 | dev_kfree_skb_any(skb); | |
6b7c5b94 | 467 | } |
6b7c5b94 SP |
468 | return NETDEV_TX_OK; |
469 | } | |
470 | ||
471 | static int be_change_mtu(struct net_device *netdev, int new_mtu) | |
472 | { | |
473 | struct be_adapter *adapter = netdev_priv(netdev); | |
474 | if (new_mtu < BE_MIN_MTU || | |
475 | new_mtu > BE_MAX_JUMBO_FRAME_SIZE) { | |
476 | dev_info(&adapter->pdev->dev, | |
477 | "MTU must be between %d and %d bytes\n", | |
478 | BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE); | |
479 | return -EINVAL; | |
480 | } | |
481 | dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n", | |
482 | netdev->mtu, new_mtu); | |
483 | netdev->mtu = new_mtu; | |
484 | return 0; | |
485 | } | |
486 | ||
487 | /* | |
488 | * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured, | |
489 | * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured, | |
490 | * set the BE in promiscuous VLAN mode. | |
491 | */ | |
b31c50a7 | 492 | static int be_vid_config(struct be_adapter *adapter) |
6b7c5b94 | 493 | { |
6b7c5b94 SP |
494 | u16 vtag[BE_NUM_VLANS_SUPPORTED]; |
495 | u16 ntags = 0, i; | |
b31c50a7 | 496 | int status; |
6b7c5b94 SP |
497 | |
498 | if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) { | |
499 | /* Construct VLAN Table to give to HW */ | |
500 | for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) { | |
501 | if (adapter->vlan_tag[i]) { | |
502 | vtag[ntags] = cpu_to_le16(i); | |
503 | ntags++; | |
504 | } | |
505 | } | |
b31c50a7 SP |
506 | status = be_cmd_vlan_config(adapter, adapter->if_handle, |
507 | vtag, ntags, 1, 0); | |
6b7c5b94 | 508 | } else { |
b31c50a7 SP |
509 | status = be_cmd_vlan_config(adapter, adapter->if_handle, |
510 | NULL, 0, 1, 1); | |
6b7c5b94 | 511 | } |
b31c50a7 | 512 | return status; |
6b7c5b94 SP |
513 | } |
514 | ||
515 | static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp) | |
516 | { | |
517 | struct be_adapter *adapter = netdev_priv(netdev); | |
518 | struct be_eq_obj *rx_eq = &adapter->rx_eq; | |
519 | struct be_eq_obj *tx_eq = &adapter->tx_eq; | |
6b7c5b94 | 520 | |
8788fdc2 SP |
521 | be_eq_notify(adapter, rx_eq->q.id, false, false, 0); |
522 | be_eq_notify(adapter, tx_eq->q.id, false, false, 0); | |
6b7c5b94 | 523 | adapter->vlan_grp = grp; |
8788fdc2 SP |
524 | be_eq_notify(adapter, rx_eq->q.id, true, false, 0); |
525 | be_eq_notify(adapter, tx_eq->q.id, true, false, 0); | |
6b7c5b94 SP |
526 | } |
527 | ||
528 | static void be_vlan_add_vid(struct net_device *netdev, u16 vid) | |
529 | { | |
530 | struct be_adapter *adapter = netdev_priv(netdev); | |
531 | ||
532 | adapter->num_vlans++; | |
533 | adapter->vlan_tag[vid] = 1; | |
534 | ||
b31c50a7 | 535 | be_vid_config(adapter); |
6b7c5b94 SP |
536 | } |
537 | ||
538 | static void be_vlan_rem_vid(struct net_device *netdev, u16 vid) | |
539 | { | |
540 | struct be_adapter *adapter = netdev_priv(netdev); | |
541 | ||
542 | adapter->num_vlans--; | |
543 | adapter->vlan_tag[vid] = 0; | |
544 | ||
545 | vlan_group_set_device(adapter->vlan_grp, vid, NULL); | |
b31c50a7 | 546 | be_vid_config(adapter); |
6b7c5b94 SP |
547 | } |
548 | ||
24307eef | 549 | static void be_set_multicast_list(struct net_device *netdev) |
6b7c5b94 SP |
550 | { |
551 | struct be_adapter *adapter = netdev_priv(netdev); | |
6b7c5b94 | 552 | |
24307eef | 553 | if (netdev->flags & IFF_PROMISC) { |
8788fdc2 | 554 | be_cmd_promiscuous_config(adapter, adapter->port_num, 1); |
24307eef SP |
555 | adapter->promiscuous = true; |
556 | goto done; | |
6b7c5b94 SP |
557 | } |
558 | ||
24307eef SP |
559 | /* BE was previously in promiscous mode; disable it */ |
560 | if (adapter->promiscuous) { | |
561 | adapter->promiscuous = false; | |
8788fdc2 | 562 | be_cmd_promiscuous_config(adapter, adapter->port_num, 0); |
6b7c5b94 SP |
563 | } |
564 | ||
24307eef | 565 | if (netdev->flags & IFF_ALLMULTI) { |
8788fdc2 | 566 | be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0); |
24307eef | 567 | goto done; |
6b7c5b94 | 568 | } |
6b7c5b94 | 569 | |
8788fdc2 | 570 | be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list, |
24307eef SP |
571 | netdev->mc_count); |
572 | done: | |
573 | return; | |
6b7c5b94 SP |
574 | } |
575 | ||
4097f663 | 576 | static void be_rx_rate_update(struct be_adapter *adapter) |
6b7c5b94 | 577 | { |
4097f663 SP |
578 | struct be_drvr_stats *stats = drvr_stats(adapter); |
579 | ulong now = jiffies; | |
6b7c5b94 | 580 | |
4097f663 SP |
581 | /* Wrapped around */ |
582 | if (time_before(now, stats->be_rx_jiffies)) { | |
583 | stats->be_rx_jiffies = now; | |
584 | return; | |
585 | } | |
6b7c5b94 SP |
586 | |
587 | /* Update the rate once in two seconds */ | |
4097f663 | 588 | if ((now - stats->be_rx_jiffies) < 2 * HZ) |
6b7c5b94 SP |
589 | return; |
590 | ||
65f71b8b SH |
591 | stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes |
592 | - stats->be_rx_bytes_prev, | |
593 | now - stats->be_rx_jiffies); | |
4097f663 | 594 | stats->be_rx_jiffies = now; |
6b7c5b94 SP |
595 | stats->be_rx_bytes_prev = stats->be_rx_bytes; |
596 | } | |
597 | ||
4097f663 SP |
598 | static void be_rx_stats_update(struct be_adapter *adapter, |
599 | u32 pktsize, u16 numfrags) | |
600 | { | |
601 | struct be_drvr_stats *stats = drvr_stats(adapter); | |
602 | ||
603 | stats->be_rx_compl++; | |
604 | stats->be_rx_frags += numfrags; | |
605 | stats->be_rx_bytes += pktsize; | |
606 | } | |
607 | ||
728a9972 AK |
608 | static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso) |
609 | { | |
610 | u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk; | |
611 | ||
612 | l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp); | |
613 | ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp); | |
614 | ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp); | |
615 | if (ip_version) { | |
616 | tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp); | |
617 | udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp); | |
618 | } | |
619 | ipv6_chk = (ip_version && (tcpf || udpf)); | |
620 | ||
621 | return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true; | |
622 | } | |
623 | ||
6b7c5b94 SP |
624 | static struct be_rx_page_info * |
625 | get_rx_page_info(struct be_adapter *adapter, u16 frag_idx) | |
626 | { | |
627 | struct be_rx_page_info *rx_page_info; | |
628 | struct be_queue_info *rxq = &adapter->rx_obj.q; | |
629 | ||
630 | rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx]; | |
631 | BUG_ON(!rx_page_info->page); | |
632 | ||
633 | if (rx_page_info->last_page_user) | |
634 | pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus), | |
635 | adapter->big_page_size, PCI_DMA_FROMDEVICE); | |
636 | ||
637 | atomic_dec(&rxq->used); | |
638 | return rx_page_info; | |
639 | } | |
640 | ||
641 | /* Throwaway the data in the Rx completion */ | |
642 | static void be_rx_compl_discard(struct be_adapter *adapter, | |
643 | struct be_eth_rx_compl *rxcp) | |
644 | { | |
645 | struct be_queue_info *rxq = &adapter->rx_obj.q; | |
646 | struct be_rx_page_info *page_info; | |
647 | u16 rxq_idx, i, num_rcvd; | |
648 | ||
649 | rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp); | |
650 | num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp); | |
651 | ||
652 | for (i = 0; i < num_rcvd; i++) { | |
653 | page_info = get_rx_page_info(adapter, rxq_idx); | |
654 | put_page(page_info->page); | |
655 | memset(page_info, 0, sizeof(*page_info)); | |
656 | index_inc(&rxq_idx, rxq->len); | |
657 | } | |
658 | } | |
659 | ||
660 | /* | |
661 | * skb_fill_rx_data forms a complete skb for an ether frame | |
662 | * indicated by rxcp. | |
663 | */ | |
664 | static void skb_fill_rx_data(struct be_adapter *adapter, | |
665 | struct sk_buff *skb, struct be_eth_rx_compl *rxcp) | |
666 | { | |
667 | struct be_queue_info *rxq = &adapter->rx_obj.q; | |
668 | struct be_rx_page_info *page_info; | |
bd46cb6c | 669 | u16 rxq_idx, i, num_rcvd, j; |
fa77406a | 670 | u32 pktsize, hdr_len, curr_frag_len, size; |
6b7c5b94 SP |
671 | u8 *start; |
672 | ||
673 | rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp); | |
674 | pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp); | |
675 | num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp); | |
676 | ||
677 | page_info = get_rx_page_info(adapter, rxq_idx); | |
678 | ||
679 | start = page_address(page_info->page) + page_info->page_offset; | |
680 | prefetch(start); | |
681 | ||
682 | /* Copy data in the first descriptor of this completion */ | |
683 | curr_frag_len = min(pktsize, rx_frag_size); | |
684 | ||
685 | /* Copy the header portion into skb_data */ | |
686 | hdr_len = min((u32)BE_HDR_LEN, curr_frag_len); | |
687 | memcpy(skb->data, start, hdr_len); | |
688 | skb->len = curr_frag_len; | |
689 | if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */ | |
690 | /* Complete packet has now been moved to data */ | |
691 | put_page(page_info->page); | |
692 | skb->data_len = 0; | |
693 | skb->tail += curr_frag_len; | |
694 | } else { | |
695 | skb_shinfo(skb)->nr_frags = 1; | |
696 | skb_shinfo(skb)->frags[0].page = page_info->page; | |
697 | skb_shinfo(skb)->frags[0].page_offset = | |
698 | page_info->page_offset + hdr_len; | |
699 | skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len; | |
700 | skb->data_len = curr_frag_len - hdr_len; | |
701 | skb->tail += hdr_len; | |
702 | } | |
703 | memset(page_info, 0, sizeof(*page_info)); | |
704 | ||
705 | if (pktsize <= rx_frag_size) { | |
706 | BUG_ON(num_rcvd != 1); | |
76fbb429 | 707 | goto done; |
6b7c5b94 SP |
708 | } |
709 | ||
710 | /* More frags present for this completion */ | |
fa77406a | 711 | size = pktsize; |
bd46cb6c | 712 | for (i = 1, j = 0; i < num_rcvd; i++) { |
fa77406a | 713 | size -= curr_frag_len; |
6b7c5b94 SP |
714 | index_inc(&rxq_idx, rxq->len); |
715 | page_info = get_rx_page_info(adapter, rxq_idx); | |
716 | ||
fa77406a | 717 | curr_frag_len = min(size, rx_frag_size); |
6b7c5b94 | 718 | |
bd46cb6c AK |
719 | /* Coalesce all frags from the same physical page in one slot */ |
720 | if (page_info->page_offset == 0) { | |
721 | /* Fresh page */ | |
722 | j++; | |
723 | skb_shinfo(skb)->frags[j].page = page_info->page; | |
724 | skb_shinfo(skb)->frags[j].page_offset = | |
725 | page_info->page_offset; | |
726 | skb_shinfo(skb)->frags[j].size = 0; | |
727 | skb_shinfo(skb)->nr_frags++; | |
728 | } else { | |
729 | put_page(page_info->page); | |
730 | } | |
731 | ||
732 | skb_shinfo(skb)->frags[j].size += curr_frag_len; | |
6b7c5b94 SP |
733 | skb->len += curr_frag_len; |
734 | skb->data_len += curr_frag_len; | |
6b7c5b94 SP |
735 | |
736 | memset(page_info, 0, sizeof(*page_info)); | |
737 | } | |
bd46cb6c | 738 | BUG_ON(j > MAX_SKB_FRAGS); |
6b7c5b94 | 739 | |
76fbb429 | 740 | done: |
4097f663 | 741 | be_rx_stats_update(adapter, pktsize, num_rcvd); |
6b7c5b94 SP |
742 | return; |
743 | } | |
744 | ||
5be93b9a | 745 | /* Process the RX completion indicated by rxcp when GRO is disabled */ |
6b7c5b94 SP |
746 | static void be_rx_compl_process(struct be_adapter *adapter, |
747 | struct be_eth_rx_compl *rxcp) | |
748 | { | |
749 | struct sk_buff *skb; | |
dcb9b564 AK |
750 | u32 vlanf, vid; |
751 | u8 vtm; | |
6b7c5b94 | 752 | |
dcb9b564 AK |
753 | vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp); |
754 | vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp); | |
755 | ||
756 | /* vlanf could be wrongly set in some cards. | |
757 | * ignore if vtm is not set */ | |
758 | if ((adapter->cap == 0x400) && !vtm) | |
759 | vlanf = 0; | |
6b7c5b94 | 760 | |
89d71a66 | 761 | skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN); |
6b7c5b94 SP |
762 | if (!skb) { |
763 | if (net_ratelimit()) | |
764 | dev_warn(&adapter->pdev->dev, "skb alloc failed\n"); | |
765 | be_rx_compl_discard(adapter, rxcp); | |
766 | return; | |
767 | } | |
768 | ||
6b7c5b94 SP |
769 | skb_fill_rx_data(adapter, skb, rxcp); |
770 | ||
728a9972 | 771 | if (do_pkt_csum(rxcp, adapter->rx_csum)) |
6b7c5b94 | 772 | skb->ip_summed = CHECKSUM_NONE; |
728a9972 AK |
773 | else |
774 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
6b7c5b94 SP |
775 | |
776 | skb->truesize = skb->len + sizeof(struct sk_buff); | |
777 | skb->protocol = eth_type_trans(skb, adapter->netdev); | |
778 | skb->dev = adapter->netdev; | |
779 | ||
dcb9b564 | 780 | if (vlanf) { |
6b7c5b94 SP |
781 | if (!adapter->vlan_grp || adapter->num_vlans == 0) { |
782 | kfree_skb(skb); | |
783 | return; | |
784 | } | |
785 | vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp); | |
786 | vid = be16_to_cpu(vid); | |
787 | vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid); | |
788 | } else { | |
789 | netif_receive_skb(skb); | |
790 | } | |
791 | ||
6b7c5b94 SP |
792 | return; |
793 | } | |
794 | ||
5be93b9a AK |
795 | /* Process the RX completion indicated by rxcp when GRO is enabled */ |
796 | static void be_rx_compl_process_gro(struct be_adapter *adapter, | |
6b7c5b94 SP |
797 | struct be_eth_rx_compl *rxcp) |
798 | { | |
799 | struct be_rx_page_info *page_info; | |
5be93b9a | 800 | struct sk_buff *skb = NULL; |
6b7c5b94 | 801 | struct be_queue_info *rxq = &adapter->rx_obj.q; |
5be93b9a | 802 | struct be_eq_obj *eq_obj = &adapter->rx_eq; |
6b7c5b94 | 803 | u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len; |
bd46cb6c | 804 | u16 i, rxq_idx = 0, vid, j; |
dcb9b564 | 805 | u8 vtm; |
6b7c5b94 SP |
806 | |
807 | num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp); | |
808 | pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp); | |
809 | vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp); | |
810 | rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp); | |
dcb9b564 AK |
811 | vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp); |
812 | ||
813 | /* vlanf could be wrongly set in some cards. | |
814 | * ignore if vtm is not set */ | |
815 | if ((adapter->cap == 0x400) && !vtm) | |
816 | vlanf = 0; | |
6b7c5b94 | 817 | |
5be93b9a AK |
818 | skb = napi_get_frags(&eq_obj->napi); |
819 | if (!skb) { | |
820 | be_rx_compl_discard(adapter, rxcp); | |
821 | return; | |
822 | } | |
823 | ||
6b7c5b94 | 824 | remaining = pkt_size; |
bd46cb6c | 825 | for (i = 0, j = -1; i < num_rcvd; i++) { |
6b7c5b94 SP |
826 | page_info = get_rx_page_info(adapter, rxq_idx); |
827 | ||
828 | curr_frag_len = min(remaining, rx_frag_size); | |
829 | ||
bd46cb6c AK |
830 | /* Coalesce all frags from the same physical page in one slot */ |
831 | if (i == 0 || page_info->page_offset == 0) { | |
832 | /* First frag or Fresh page */ | |
833 | j++; | |
5be93b9a AK |
834 | skb_shinfo(skb)->frags[j].page = page_info->page; |
835 | skb_shinfo(skb)->frags[j].page_offset = | |
836 | page_info->page_offset; | |
837 | skb_shinfo(skb)->frags[j].size = 0; | |
bd46cb6c AK |
838 | } else { |
839 | put_page(page_info->page); | |
840 | } | |
5be93b9a | 841 | skb_shinfo(skb)->frags[j].size += curr_frag_len; |
6b7c5b94 | 842 | |
bd46cb6c | 843 | remaining -= curr_frag_len; |
6b7c5b94 | 844 | index_inc(&rxq_idx, rxq->len); |
6b7c5b94 SP |
845 | memset(page_info, 0, sizeof(*page_info)); |
846 | } | |
bd46cb6c | 847 | BUG_ON(j > MAX_SKB_FRAGS); |
6b7c5b94 | 848 | |
5be93b9a AK |
849 | skb_shinfo(skb)->nr_frags = j + 1; |
850 | skb->len = pkt_size; | |
851 | skb->data_len = pkt_size; | |
852 | skb->truesize += pkt_size; | |
853 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
854 | ||
6b7c5b94 | 855 | if (likely(!vlanf)) { |
5be93b9a | 856 | napi_gro_frags(&eq_obj->napi); |
6b7c5b94 SP |
857 | } else { |
858 | vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp); | |
859 | vid = be16_to_cpu(vid); | |
860 | ||
861 | if (!adapter->vlan_grp || adapter->num_vlans == 0) | |
862 | return; | |
863 | ||
5be93b9a | 864 | vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid); |
6b7c5b94 SP |
865 | } |
866 | ||
4097f663 | 867 | be_rx_stats_update(adapter, pkt_size, num_rcvd); |
6b7c5b94 SP |
868 | return; |
869 | } | |
870 | ||
871 | static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter) | |
872 | { | |
873 | struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq); | |
874 | ||
875 | if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0) | |
876 | return NULL; | |
877 | ||
878 | be_dws_le_to_cpu(rxcp, sizeof(*rxcp)); | |
879 | ||
6b7c5b94 SP |
880 | queue_tail_inc(&adapter->rx_obj.cq); |
881 | return rxcp; | |
882 | } | |
883 | ||
a7a0ef31 SP |
884 | /* To reset the valid bit, we need to reset the whole word as |
885 | * when walking the queue the valid entries are little-endian | |
886 | * and invalid entries are host endian | |
887 | */ | |
888 | static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp) | |
889 | { | |
890 | rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0; | |
891 | } | |
892 | ||
6b7c5b94 SP |
893 | static inline struct page *be_alloc_pages(u32 size) |
894 | { | |
895 | gfp_t alloc_flags = GFP_ATOMIC; | |
896 | u32 order = get_order(size); | |
897 | if (order > 0) | |
898 | alloc_flags |= __GFP_COMP; | |
899 | return alloc_pages(alloc_flags, order); | |
900 | } | |
901 | ||
902 | /* | |
903 | * Allocate a page, split it to fragments of size rx_frag_size and post as | |
904 | * receive buffers to BE | |
905 | */ | |
906 | static void be_post_rx_frags(struct be_adapter *adapter) | |
907 | { | |
908 | struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl; | |
909 | struct be_rx_page_info *page_info = NULL; | |
910 | struct be_queue_info *rxq = &adapter->rx_obj.q; | |
911 | struct page *pagep = NULL; | |
912 | struct be_eth_rx_d *rxd; | |
913 | u64 page_dmaaddr = 0, frag_dmaaddr; | |
914 | u32 posted, page_offset = 0; | |
915 | ||
6b7c5b94 SP |
916 | page_info = &page_info_tbl[rxq->head]; |
917 | for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) { | |
918 | if (!pagep) { | |
919 | pagep = be_alloc_pages(adapter->big_page_size); | |
920 | if (unlikely(!pagep)) { | |
921 | drvr_stats(adapter)->be_ethrx_post_fail++; | |
922 | break; | |
923 | } | |
924 | page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0, | |
925 | adapter->big_page_size, | |
926 | PCI_DMA_FROMDEVICE); | |
927 | page_info->page_offset = 0; | |
928 | } else { | |
929 | get_page(pagep); | |
930 | page_info->page_offset = page_offset + rx_frag_size; | |
931 | } | |
932 | page_offset = page_info->page_offset; | |
933 | page_info->page = pagep; | |
934 | pci_unmap_addr_set(page_info, bus, page_dmaaddr); | |
935 | frag_dmaaddr = page_dmaaddr + page_info->page_offset; | |
936 | ||
937 | rxd = queue_head_node(rxq); | |
938 | rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF); | |
939 | rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr)); | |
940 | queue_head_inc(rxq); | |
941 | ||
942 | /* Any space left in the current big page for another frag? */ | |
943 | if ((page_offset + rx_frag_size + rx_frag_size) > | |
944 | adapter->big_page_size) { | |
945 | pagep = NULL; | |
946 | page_info->last_page_user = true; | |
947 | } | |
948 | page_info = &page_info_tbl[rxq->head]; | |
949 | } | |
950 | if (pagep) | |
951 | page_info->last_page_user = true; | |
952 | ||
953 | if (posted) { | |
6b7c5b94 | 954 | atomic_add(posted, &rxq->used); |
8788fdc2 | 955 | be_rxq_notify(adapter, rxq->id, posted); |
ea1dae11 SP |
956 | } else if (atomic_read(&rxq->used) == 0) { |
957 | /* Let be_worker replenish when memory is available */ | |
958 | adapter->rx_post_starved = true; | |
6b7c5b94 SP |
959 | } |
960 | ||
961 | return; | |
962 | } | |
963 | ||
5fb379ee | 964 | static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq) |
6b7c5b94 | 965 | { |
6b7c5b94 SP |
966 | struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq); |
967 | ||
968 | if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0) | |
969 | return NULL; | |
970 | ||
971 | be_dws_le_to_cpu(txcp, sizeof(*txcp)); | |
972 | ||
973 | txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0; | |
974 | ||
975 | queue_tail_inc(tx_cq); | |
976 | return txcp; | |
977 | } | |
978 | ||
979 | static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index) | |
980 | { | |
981 | struct be_queue_info *txq = &adapter->tx_obj.q; | |
6b7c5b94 SP |
982 | struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list; |
983 | struct sk_buff *sent_skb; | |
6b7c5b94 SP |
984 | u16 cur_index, num_wrbs = 0; |
985 | ||
986 | cur_index = txq->tail; | |
987 | sent_skb = sent_skbs[cur_index]; | |
988 | BUG_ON(!sent_skb); | |
989 | sent_skbs[cur_index] = NULL; | |
990 | ||
991 | do { | |
992 | cur_index = txq->tail; | |
6b7c5b94 SP |
993 | num_wrbs++; |
994 | queue_tail_inc(txq); | |
995 | } while (cur_index != last_index); | |
996 | ||
997 | atomic_sub(num_wrbs, &txq->used); | |
c190e3c8 | 998 | skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE); |
6b7c5b94 SP |
999 | kfree_skb(sent_skb); |
1000 | } | |
1001 | ||
859b1e4e SP |
1002 | static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj) |
1003 | { | |
1004 | struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q); | |
1005 | ||
1006 | if (!eqe->evt) | |
1007 | return NULL; | |
1008 | ||
1009 | eqe->evt = le32_to_cpu(eqe->evt); | |
1010 | queue_tail_inc(&eq_obj->q); | |
1011 | return eqe; | |
1012 | } | |
1013 | ||
1014 | static int event_handle(struct be_adapter *adapter, | |
1015 | struct be_eq_obj *eq_obj) | |
1016 | { | |
1017 | struct be_eq_entry *eqe; | |
1018 | u16 num = 0; | |
1019 | ||
1020 | while ((eqe = event_get(eq_obj)) != NULL) { | |
1021 | eqe->evt = 0; | |
1022 | num++; | |
1023 | } | |
1024 | ||
1025 | /* Deal with any spurious interrupts that come | |
1026 | * without events | |
1027 | */ | |
1028 | be_eq_notify(adapter, eq_obj->q.id, true, true, num); | |
1029 | if (num) | |
1030 | napi_schedule(&eq_obj->napi); | |
1031 | ||
1032 | return num; | |
1033 | } | |
1034 | ||
1035 | /* Just read and notify events without processing them. | |
1036 | * Used at the time of destroying event queues */ | |
1037 | static void be_eq_clean(struct be_adapter *adapter, | |
1038 | struct be_eq_obj *eq_obj) | |
1039 | { | |
1040 | struct be_eq_entry *eqe; | |
1041 | u16 num = 0; | |
1042 | ||
1043 | while ((eqe = event_get(eq_obj)) != NULL) { | |
1044 | eqe->evt = 0; | |
1045 | num++; | |
1046 | } | |
1047 | ||
1048 | if (num) | |
1049 | be_eq_notify(adapter, eq_obj->q.id, false, true, num); | |
1050 | } | |
1051 | ||
6b7c5b94 SP |
1052 | static void be_rx_q_clean(struct be_adapter *adapter) |
1053 | { | |
1054 | struct be_rx_page_info *page_info; | |
1055 | struct be_queue_info *rxq = &adapter->rx_obj.q; | |
1056 | struct be_queue_info *rx_cq = &adapter->rx_obj.cq; | |
1057 | struct be_eth_rx_compl *rxcp; | |
1058 | u16 tail; | |
1059 | ||
1060 | /* First cleanup pending rx completions */ | |
1061 | while ((rxcp = be_rx_compl_get(adapter)) != NULL) { | |
1062 | be_rx_compl_discard(adapter, rxcp); | |
a7a0ef31 | 1063 | be_rx_compl_reset(rxcp); |
8788fdc2 | 1064 | be_cq_notify(adapter, rx_cq->id, true, 1); |
6b7c5b94 SP |
1065 | } |
1066 | ||
1067 | /* Then free posted rx buffer that were not used */ | |
1068 | tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len; | |
cdab23b7 | 1069 | for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) { |
6b7c5b94 SP |
1070 | page_info = get_rx_page_info(adapter, tail); |
1071 | put_page(page_info->page); | |
1072 | memset(page_info, 0, sizeof(*page_info)); | |
1073 | } | |
1074 | BUG_ON(atomic_read(&rxq->used)); | |
1075 | } | |
1076 | ||
a8e9179a | 1077 | static void be_tx_compl_clean(struct be_adapter *adapter) |
6b7c5b94 | 1078 | { |
a8e9179a | 1079 | struct be_queue_info *tx_cq = &adapter->tx_obj.cq; |
6b7c5b94 | 1080 | struct be_queue_info *txq = &adapter->tx_obj.q; |
a8e9179a SP |
1081 | struct be_eth_tx_compl *txcp; |
1082 | u16 end_idx, cmpl = 0, timeo = 0; | |
1083 | ||
1084 | /* Wait for a max of 200ms for all the tx-completions to arrive. */ | |
1085 | do { | |
1086 | while ((txcp = be_tx_compl_get(tx_cq))) { | |
1087 | end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl, | |
1088 | wrb_index, txcp); | |
1089 | be_tx_compl_process(adapter, end_idx); | |
1090 | cmpl++; | |
1091 | } | |
1092 | if (cmpl) { | |
1093 | be_cq_notify(adapter, tx_cq->id, false, cmpl); | |
1094 | cmpl = 0; | |
1095 | } | |
1096 | ||
1097 | if (atomic_read(&txq->used) == 0 || ++timeo > 200) | |
1098 | break; | |
1099 | ||
1100 | mdelay(1); | |
1101 | } while (true); | |
1102 | ||
1103 | if (atomic_read(&txq->used)) | |
1104 | dev_err(&adapter->pdev->dev, "%d pending tx-completions\n", | |
1105 | atomic_read(&txq->used)); | |
6b7c5b94 SP |
1106 | } |
1107 | ||
5fb379ee SP |
1108 | static void be_mcc_queues_destroy(struct be_adapter *adapter) |
1109 | { | |
1110 | struct be_queue_info *q; | |
5fb379ee | 1111 | |
8788fdc2 | 1112 | q = &adapter->mcc_obj.q; |
5fb379ee | 1113 | if (q->created) |
8788fdc2 | 1114 | be_cmd_q_destroy(adapter, q, QTYPE_MCCQ); |
5fb379ee SP |
1115 | be_queue_free(adapter, q); |
1116 | ||
8788fdc2 | 1117 | q = &adapter->mcc_obj.cq; |
5fb379ee | 1118 | if (q->created) |
8788fdc2 | 1119 | be_cmd_q_destroy(adapter, q, QTYPE_CQ); |
5fb379ee SP |
1120 | be_queue_free(adapter, q); |
1121 | } | |
1122 | ||
1123 | /* Must be called only after TX qs are created as MCC shares TX EQ */ | |
1124 | static int be_mcc_queues_create(struct be_adapter *adapter) | |
1125 | { | |
1126 | struct be_queue_info *q, *cq; | |
5fb379ee SP |
1127 | |
1128 | /* Alloc MCC compl queue */ | |
8788fdc2 | 1129 | cq = &adapter->mcc_obj.cq; |
5fb379ee | 1130 | if (be_queue_alloc(adapter, cq, MCC_CQ_LEN, |
efd2e40a | 1131 | sizeof(struct be_mcc_compl))) |
5fb379ee SP |
1132 | goto err; |
1133 | ||
1134 | /* Ask BE to create MCC compl queue; share TX's eq */ | |
8788fdc2 | 1135 | if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0)) |
5fb379ee SP |
1136 | goto mcc_cq_free; |
1137 | ||
1138 | /* Alloc MCC queue */ | |
8788fdc2 | 1139 | q = &adapter->mcc_obj.q; |
5fb379ee SP |
1140 | if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb))) |
1141 | goto mcc_cq_destroy; | |
1142 | ||
1143 | /* Ask BE to create MCC queue */ | |
8788fdc2 | 1144 | if (be_cmd_mccq_create(adapter, q, cq)) |
5fb379ee SP |
1145 | goto mcc_q_free; |
1146 | ||
1147 | return 0; | |
1148 | ||
1149 | mcc_q_free: | |
1150 | be_queue_free(adapter, q); | |
1151 | mcc_cq_destroy: | |
8788fdc2 | 1152 | be_cmd_q_destroy(adapter, cq, QTYPE_CQ); |
5fb379ee SP |
1153 | mcc_cq_free: |
1154 | be_queue_free(adapter, cq); | |
1155 | err: | |
1156 | return -1; | |
1157 | } | |
1158 | ||
6b7c5b94 SP |
1159 | static void be_tx_queues_destroy(struct be_adapter *adapter) |
1160 | { | |
1161 | struct be_queue_info *q; | |
1162 | ||
1163 | q = &adapter->tx_obj.q; | |
a8e9179a | 1164 | if (q->created) |
8788fdc2 | 1165 | be_cmd_q_destroy(adapter, q, QTYPE_TXQ); |
6b7c5b94 SP |
1166 | be_queue_free(adapter, q); |
1167 | ||
1168 | q = &adapter->tx_obj.cq; | |
1169 | if (q->created) | |
8788fdc2 | 1170 | be_cmd_q_destroy(adapter, q, QTYPE_CQ); |
6b7c5b94 SP |
1171 | be_queue_free(adapter, q); |
1172 | ||
859b1e4e SP |
1173 | /* Clear any residual events */ |
1174 | be_eq_clean(adapter, &adapter->tx_eq); | |
1175 | ||
6b7c5b94 SP |
1176 | q = &adapter->tx_eq.q; |
1177 | if (q->created) | |
8788fdc2 | 1178 | be_cmd_q_destroy(adapter, q, QTYPE_EQ); |
6b7c5b94 SP |
1179 | be_queue_free(adapter, q); |
1180 | } | |
1181 | ||
1182 | static int be_tx_queues_create(struct be_adapter *adapter) | |
1183 | { | |
1184 | struct be_queue_info *eq, *q, *cq; | |
1185 | ||
1186 | adapter->tx_eq.max_eqd = 0; | |
1187 | adapter->tx_eq.min_eqd = 0; | |
1188 | adapter->tx_eq.cur_eqd = 96; | |
1189 | adapter->tx_eq.enable_aic = false; | |
1190 | /* Alloc Tx Event queue */ | |
1191 | eq = &adapter->tx_eq.q; | |
1192 | if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry))) | |
1193 | return -1; | |
1194 | ||
1195 | /* Ask BE to create Tx Event queue */ | |
8788fdc2 | 1196 | if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd)) |
6b7c5b94 SP |
1197 | goto tx_eq_free; |
1198 | /* Alloc TX eth compl queue */ | |
1199 | cq = &adapter->tx_obj.cq; | |
1200 | if (be_queue_alloc(adapter, cq, TX_CQ_LEN, | |
1201 | sizeof(struct be_eth_tx_compl))) | |
1202 | goto tx_eq_destroy; | |
1203 | ||
1204 | /* Ask BE to create Tx eth compl queue */ | |
8788fdc2 | 1205 | if (be_cmd_cq_create(adapter, cq, eq, false, false, 3)) |
6b7c5b94 SP |
1206 | goto tx_cq_free; |
1207 | ||
1208 | /* Alloc TX eth queue */ | |
1209 | q = &adapter->tx_obj.q; | |
1210 | if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb))) | |
1211 | goto tx_cq_destroy; | |
1212 | ||
1213 | /* Ask BE to create Tx eth queue */ | |
8788fdc2 | 1214 | if (be_cmd_txq_create(adapter, q, cq)) |
6b7c5b94 SP |
1215 | goto tx_q_free; |
1216 | return 0; | |
1217 | ||
1218 | tx_q_free: | |
1219 | be_queue_free(adapter, q); | |
1220 | tx_cq_destroy: | |
8788fdc2 | 1221 | be_cmd_q_destroy(adapter, cq, QTYPE_CQ); |
6b7c5b94 SP |
1222 | tx_cq_free: |
1223 | be_queue_free(adapter, cq); | |
1224 | tx_eq_destroy: | |
8788fdc2 | 1225 | be_cmd_q_destroy(adapter, eq, QTYPE_EQ); |
6b7c5b94 SP |
1226 | tx_eq_free: |
1227 | be_queue_free(adapter, eq); | |
1228 | return -1; | |
1229 | } | |
1230 | ||
1231 | static void be_rx_queues_destroy(struct be_adapter *adapter) | |
1232 | { | |
1233 | struct be_queue_info *q; | |
1234 | ||
1235 | q = &adapter->rx_obj.q; | |
1236 | if (q->created) { | |
8788fdc2 | 1237 | be_cmd_q_destroy(adapter, q, QTYPE_RXQ); |
6b7c5b94 SP |
1238 | be_rx_q_clean(adapter); |
1239 | } | |
1240 | be_queue_free(adapter, q); | |
1241 | ||
1242 | q = &adapter->rx_obj.cq; | |
1243 | if (q->created) | |
8788fdc2 | 1244 | be_cmd_q_destroy(adapter, q, QTYPE_CQ); |
6b7c5b94 SP |
1245 | be_queue_free(adapter, q); |
1246 | ||
859b1e4e SP |
1247 | /* Clear any residual events */ |
1248 | be_eq_clean(adapter, &adapter->rx_eq); | |
1249 | ||
6b7c5b94 SP |
1250 | q = &adapter->rx_eq.q; |
1251 | if (q->created) | |
8788fdc2 | 1252 | be_cmd_q_destroy(adapter, q, QTYPE_EQ); |
6b7c5b94 SP |
1253 | be_queue_free(adapter, q); |
1254 | } | |
1255 | ||
1256 | static int be_rx_queues_create(struct be_adapter *adapter) | |
1257 | { | |
1258 | struct be_queue_info *eq, *q, *cq; | |
1259 | int rc; | |
1260 | ||
6b7c5b94 SP |
1261 | adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE; |
1262 | adapter->rx_eq.max_eqd = BE_MAX_EQD; | |
1263 | adapter->rx_eq.min_eqd = 0; | |
1264 | adapter->rx_eq.cur_eqd = 0; | |
1265 | adapter->rx_eq.enable_aic = true; | |
1266 | ||
1267 | /* Alloc Rx Event queue */ | |
1268 | eq = &adapter->rx_eq.q; | |
1269 | rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN, | |
1270 | sizeof(struct be_eq_entry)); | |
1271 | if (rc) | |
1272 | return rc; | |
1273 | ||
1274 | /* Ask BE to create Rx Event queue */ | |
8788fdc2 | 1275 | rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd); |
6b7c5b94 SP |
1276 | if (rc) |
1277 | goto rx_eq_free; | |
1278 | ||
1279 | /* Alloc RX eth compl queue */ | |
1280 | cq = &adapter->rx_obj.cq; | |
1281 | rc = be_queue_alloc(adapter, cq, RX_CQ_LEN, | |
1282 | sizeof(struct be_eth_rx_compl)); | |
1283 | if (rc) | |
1284 | goto rx_eq_destroy; | |
1285 | ||
1286 | /* Ask BE to create Rx eth compl queue */ | |
8788fdc2 | 1287 | rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3); |
6b7c5b94 SP |
1288 | if (rc) |
1289 | goto rx_cq_free; | |
1290 | ||
1291 | /* Alloc RX eth queue */ | |
1292 | q = &adapter->rx_obj.q; | |
1293 | rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d)); | |
1294 | if (rc) | |
1295 | goto rx_cq_destroy; | |
1296 | ||
1297 | /* Ask BE to create Rx eth queue */ | |
8788fdc2 | 1298 | rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size, |
6b7c5b94 SP |
1299 | BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false); |
1300 | if (rc) | |
1301 | goto rx_q_free; | |
1302 | ||
1303 | return 0; | |
1304 | rx_q_free: | |
1305 | be_queue_free(adapter, q); | |
1306 | rx_cq_destroy: | |
8788fdc2 | 1307 | be_cmd_q_destroy(adapter, cq, QTYPE_CQ); |
6b7c5b94 SP |
1308 | rx_cq_free: |
1309 | be_queue_free(adapter, cq); | |
1310 | rx_eq_destroy: | |
8788fdc2 | 1311 | be_cmd_q_destroy(adapter, eq, QTYPE_EQ); |
6b7c5b94 SP |
1312 | rx_eq_free: |
1313 | be_queue_free(adapter, eq); | |
1314 | return rc; | |
1315 | } | |
6b7c5b94 | 1316 | |
b628bde2 SP |
1317 | /* There are 8 evt ids per func. Retruns the evt id's bit number */ |
1318 | static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id) | |
1319 | { | |
1320 | return eq_id - 8 * be_pci_func(adapter); | |
1321 | } | |
1322 | ||
6b7c5b94 SP |
1323 | static irqreturn_t be_intx(int irq, void *dev) |
1324 | { | |
1325 | struct be_adapter *adapter = dev; | |
8788fdc2 | 1326 | int isr; |
6b7c5b94 | 1327 | |
8788fdc2 | 1328 | isr = ioread32(adapter->csr + CEV_ISR0_OFFSET + |
eec368fb | 1329 | be_pci_func(adapter) * CEV_ISR_SIZE); |
c001c213 | 1330 | if (!isr) |
8788fdc2 | 1331 | return IRQ_NONE; |
6b7c5b94 | 1332 | |
8788fdc2 SP |
1333 | event_handle(adapter, &adapter->tx_eq); |
1334 | event_handle(adapter, &adapter->rx_eq); | |
c001c213 | 1335 | |
8788fdc2 | 1336 | return IRQ_HANDLED; |
6b7c5b94 SP |
1337 | } |
1338 | ||
1339 | static irqreturn_t be_msix_rx(int irq, void *dev) | |
1340 | { | |
1341 | struct be_adapter *adapter = dev; | |
1342 | ||
8788fdc2 | 1343 | event_handle(adapter, &adapter->rx_eq); |
6b7c5b94 SP |
1344 | |
1345 | return IRQ_HANDLED; | |
1346 | } | |
1347 | ||
5fb379ee | 1348 | static irqreturn_t be_msix_tx_mcc(int irq, void *dev) |
6b7c5b94 SP |
1349 | { |
1350 | struct be_adapter *adapter = dev; | |
1351 | ||
8788fdc2 | 1352 | event_handle(adapter, &adapter->tx_eq); |
6b7c5b94 SP |
1353 | |
1354 | return IRQ_HANDLED; | |
1355 | } | |
1356 | ||
5be93b9a | 1357 | static inline bool do_gro(struct be_adapter *adapter, |
6b7c5b94 SP |
1358 | struct be_eth_rx_compl *rxcp) |
1359 | { | |
1360 | int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp); | |
1361 | int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp); | |
1362 | ||
1363 | if (err) | |
1364 | drvr_stats(adapter)->be_rxcp_err++; | |
1365 | ||
5be93b9a | 1366 | return (tcp_frame && !err) ? true : false; |
6b7c5b94 SP |
1367 | } |
1368 | ||
1369 | int be_poll_rx(struct napi_struct *napi, int budget) | |
1370 | { | |
1371 | struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi); | |
1372 | struct be_adapter *adapter = | |
1373 | container_of(rx_eq, struct be_adapter, rx_eq); | |
1374 | struct be_queue_info *rx_cq = &adapter->rx_obj.cq; | |
1375 | struct be_eth_rx_compl *rxcp; | |
1376 | u32 work_done; | |
1377 | ||
1378 | for (work_done = 0; work_done < budget; work_done++) { | |
1379 | rxcp = be_rx_compl_get(adapter); | |
1380 | if (!rxcp) | |
1381 | break; | |
1382 | ||
5be93b9a AK |
1383 | if (do_gro(adapter, rxcp)) |
1384 | be_rx_compl_process_gro(adapter, rxcp); | |
6b7c5b94 SP |
1385 | else |
1386 | be_rx_compl_process(adapter, rxcp); | |
a7a0ef31 SP |
1387 | |
1388 | be_rx_compl_reset(rxcp); | |
6b7c5b94 SP |
1389 | } |
1390 | ||
6b7c5b94 SP |
1391 | /* Refill the queue */ |
1392 | if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM) | |
1393 | be_post_rx_frags(adapter); | |
1394 | ||
1395 | /* All consumed */ | |
1396 | if (work_done < budget) { | |
1397 | napi_complete(napi); | |
8788fdc2 | 1398 | be_cq_notify(adapter, rx_cq->id, true, work_done); |
6b7c5b94 SP |
1399 | } else { |
1400 | /* More to be consumed; continue with interrupts disabled */ | |
8788fdc2 | 1401 | be_cq_notify(adapter, rx_cq->id, false, work_done); |
6b7c5b94 SP |
1402 | } |
1403 | return work_done; | |
1404 | } | |
1405 | ||
5fb379ee | 1406 | void be_process_tx(struct be_adapter *adapter) |
6b7c5b94 | 1407 | { |
5fb379ee SP |
1408 | struct be_queue_info *txq = &adapter->tx_obj.q; |
1409 | struct be_queue_info *tx_cq = &adapter->tx_obj.cq; | |
6b7c5b94 SP |
1410 | struct be_eth_tx_compl *txcp; |
1411 | u32 num_cmpl = 0; | |
1412 | u16 end_idx; | |
1413 | ||
5fb379ee | 1414 | while ((txcp = be_tx_compl_get(tx_cq))) { |
6b7c5b94 SP |
1415 | end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl, |
1416 | wrb_index, txcp); | |
1417 | be_tx_compl_process(adapter, end_idx); | |
1418 | num_cmpl++; | |
1419 | } | |
1420 | ||
5fb379ee | 1421 | if (num_cmpl) { |
8788fdc2 | 1422 | be_cq_notify(adapter, tx_cq->id, true, num_cmpl); |
5fb379ee SP |
1423 | |
1424 | /* As Tx wrbs have been freed up, wake up netdev queue if | |
1425 | * it was stopped due to lack of tx wrbs. | |
1426 | */ | |
1427 | if (netif_queue_stopped(adapter->netdev) && | |
6b7c5b94 | 1428 | atomic_read(&txq->used) < txq->len / 2) { |
5fb379ee SP |
1429 | netif_wake_queue(adapter->netdev); |
1430 | } | |
1431 | ||
1432 | drvr_stats(adapter)->be_tx_events++; | |
1433 | drvr_stats(adapter)->be_tx_compl += num_cmpl; | |
6b7c5b94 | 1434 | } |
5fb379ee SP |
1435 | } |
1436 | ||
1437 | /* As TX and MCC share the same EQ check for both TX and MCC completions. | |
1438 | * For TX/MCC we don't honour budget; consume everything | |
1439 | */ | |
1440 | static int be_poll_tx_mcc(struct napi_struct *napi, int budget) | |
1441 | { | |
1442 | struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi); | |
1443 | struct be_adapter *adapter = | |
1444 | container_of(tx_eq, struct be_adapter, tx_eq); | |
6b7c5b94 SP |
1445 | |
1446 | napi_complete(napi); | |
1447 | ||
5fb379ee | 1448 | be_process_tx(adapter); |
6b7c5b94 | 1449 | |
8788fdc2 | 1450 | be_process_mcc(adapter); |
6b7c5b94 SP |
1451 | |
1452 | return 1; | |
1453 | } | |
1454 | ||
ea1dae11 SP |
1455 | static void be_worker(struct work_struct *work) |
1456 | { | |
1457 | struct be_adapter *adapter = | |
1458 | container_of(work, struct be_adapter, work.work); | |
ea1dae11 | 1459 | |
b31c50a7 | 1460 | be_cmd_get_stats(adapter, &adapter->stats.cmd); |
ea1dae11 SP |
1461 | |
1462 | /* Set EQ delay */ | |
1463 | be_rx_eqd_update(adapter); | |
1464 | ||
4097f663 SP |
1465 | be_tx_rate_update(adapter); |
1466 | be_rx_rate_update(adapter); | |
1467 | ||
ea1dae11 SP |
1468 | if (adapter->rx_post_starved) { |
1469 | adapter->rx_post_starved = false; | |
1470 | be_post_rx_frags(adapter); | |
1471 | } | |
1472 | ||
1473 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000)); | |
1474 | } | |
1475 | ||
6b7c5b94 SP |
1476 | static void be_msix_enable(struct be_adapter *adapter) |
1477 | { | |
1478 | int i, status; | |
1479 | ||
1480 | for (i = 0; i < BE_NUM_MSIX_VECTORS; i++) | |
1481 | adapter->msix_entries[i].entry = i; | |
1482 | ||
1483 | status = pci_enable_msix(adapter->pdev, adapter->msix_entries, | |
1484 | BE_NUM_MSIX_VECTORS); | |
1485 | if (status == 0) | |
1486 | adapter->msix_enabled = true; | |
1487 | return; | |
1488 | } | |
1489 | ||
1490 | static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id) | |
1491 | { | |
b628bde2 SP |
1492 | return adapter->msix_entries[ |
1493 | be_evt_bit_get(adapter, eq_id)].vector; | |
6b7c5b94 SP |
1494 | } |
1495 | ||
b628bde2 SP |
1496 | static int be_request_irq(struct be_adapter *adapter, |
1497 | struct be_eq_obj *eq_obj, | |
1498 | void *handler, char *desc) | |
6b7c5b94 SP |
1499 | { |
1500 | struct net_device *netdev = adapter->netdev; | |
b628bde2 SP |
1501 | int vec; |
1502 | ||
1503 | sprintf(eq_obj->desc, "%s-%s", netdev->name, desc); | |
1504 | vec = be_msix_vec_get(adapter, eq_obj->q.id); | |
1505 | return request_irq(vec, handler, 0, eq_obj->desc, adapter); | |
1506 | } | |
1507 | ||
1508 | static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj) | |
1509 | { | |
1510 | int vec = be_msix_vec_get(adapter, eq_obj->q.id); | |
1511 | free_irq(vec, adapter); | |
1512 | } | |
6b7c5b94 | 1513 | |
b628bde2 SP |
1514 | static int be_msix_register(struct be_adapter *adapter) |
1515 | { | |
1516 | int status; | |
1517 | ||
1518 | status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx"); | |
6b7c5b94 SP |
1519 | if (status) |
1520 | goto err; | |
1521 | ||
b628bde2 SP |
1522 | status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx"); |
1523 | if (status) | |
1524 | goto free_tx_irq; | |
1525 | ||
6b7c5b94 | 1526 | return 0; |
b628bde2 SP |
1527 | |
1528 | free_tx_irq: | |
1529 | be_free_irq(adapter, &adapter->tx_eq); | |
6b7c5b94 SP |
1530 | err: |
1531 | dev_warn(&adapter->pdev->dev, | |
1532 | "MSIX Request IRQ failed - err %d\n", status); | |
1533 | pci_disable_msix(adapter->pdev); | |
1534 | adapter->msix_enabled = false; | |
1535 | return status; | |
1536 | } | |
1537 | ||
1538 | static int be_irq_register(struct be_adapter *adapter) | |
1539 | { | |
1540 | struct net_device *netdev = adapter->netdev; | |
1541 | int status; | |
1542 | ||
1543 | if (adapter->msix_enabled) { | |
1544 | status = be_msix_register(adapter); | |
1545 | if (status == 0) | |
1546 | goto done; | |
1547 | } | |
1548 | ||
1549 | /* INTx */ | |
1550 | netdev->irq = adapter->pdev->irq; | |
1551 | status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name, | |
1552 | adapter); | |
1553 | if (status) { | |
1554 | dev_err(&adapter->pdev->dev, | |
1555 | "INTx request IRQ failed - err %d\n", status); | |
1556 | return status; | |
1557 | } | |
1558 | done: | |
1559 | adapter->isr_registered = true; | |
1560 | return 0; | |
1561 | } | |
1562 | ||
1563 | static void be_irq_unregister(struct be_adapter *adapter) | |
1564 | { | |
1565 | struct net_device *netdev = adapter->netdev; | |
6b7c5b94 SP |
1566 | |
1567 | if (!adapter->isr_registered) | |
1568 | return; | |
1569 | ||
1570 | /* INTx */ | |
1571 | if (!adapter->msix_enabled) { | |
1572 | free_irq(netdev->irq, adapter); | |
1573 | goto done; | |
1574 | } | |
1575 | ||
1576 | /* MSIx */ | |
b628bde2 SP |
1577 | be_free_irq(adapter, &adapter->tx_eq); |
1578 | be_free_irq(adapter, &adapter->rx_eq); | |
6b7c5b94 SP |
1579 | done: |
1580 | adapter->isr_registered = false; | |
1581 | return; | |
1582 | } | |
1583 | ||
1584 | static int be_open(struct net_device *netdev) | |
1585 | { | |
1586 | struct be_adapter *adapter = netdev_priv(netdev); | |
6b7c5b94 SP |
1587 | struct be_eq_obj *rx_eq = &adapter->rx_eq; |
1588 | struct be_eq_obj *tx_eq = &adapter->tx_eq; | |
a8f447bd SP |
1589 | bool link_up; |
1590 | int status; | |
0388f251 SB |
1591 | u8 mac_speed; |
1592 | u16 link_speed; | |
5fb379ee SP |
1593 | |
1594 | /* First time posting */ | |
1595 | be_post_rx_frags(adapter); | |
1596 | ||
1597 | napi_enable(&rx_eq->napi); | |
1598 | napi_enable(&tx_eq->napi); | |
1599 | ||
1600 | be_irq_register(adapter); | |
1601 | ||
8788fdc2 | 1602 | be_intr_set(adapter, true); |
5fb379ee SP |
1603 | |
1604 | /* The evt queues are created in unarmed state; arm them */ | |
8788fdc2 SP |
1605 | be_eq_notify(adapter, rx_eq->q.id, true, false, 0); |
1606 | be_eq_notify(adapter, tx_eq->q.id, true, false, 0); | |
5fb379ee SP |
1607 | |
1608 | /* Rx compl queue may be in unarmed state; rearm it */ | |
8788fdc2 | 1609 | be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0); |
5fb379ee | 1610 | |
0388f251 SB |
1611 | status = be_cmd_link_status_query(adapter, &link_up, &mac_speed, |
1612 | &link_speed); | |
a8f447bd | 1613 | if (status) |
4f2aa89c | 1614 | goto ret_sts; |
a8f447bd | 1615 | be_link_status_update(adapter, link_up); |
5fb379ee | 1616 | |
4f2aa89c AK |
1617 | status = be_vid_config(adapter); |
1618 | if (status) | |
1619 | goto ret_sts; | |
1620 | ||
1621 | status = be_cmd_set_flow_control(adapter, | |
1622 | adapter->tx_fc, adapter->rx_fc); | |
1623 | if (status) | |
1624 | goto ret_sts; | |
1625 | ||
5fb379ee | 1626 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); |
4f2aa89c AK |
1627 | ret_sts: |
1628 | return status; | |
5fb379ee SP |
1629 | } |
1630 | ||
1631 | static int be_setup(struct be_adapter *adapter) | |
1632 | { | |
5fb379ee | 1633 | struct net_device *netdev = adapter->netdev; |
73d540f2 | 1634 | u32 cap_flags, en_flags; |
6b7c5b94 SP |
1635 | int status; |
1636 | ||
73d540f2 SP |
1637 | cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST | |
1638 | BE_IF_FLAGS_MCAST_PROMISCUOUS | | |
1639 | BE_IF_FLAGS_PROMISCUOUS | | |
1640 | BE_IF_FLAGS_PASS_L3L4_ERRORS; | |
1641 | en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST | | |
1642 | BE_IF_FLAGS_PASS_L3L4_ERRORS; | |
1643 | ||
1644 | status = be_cmd_if_create(adapter, cap_flags, en_flags, | |
1645 | netdev->dev_addr, false/* pmac_invalid */, | |
1646 | &adapter->if_handle, &adapter->pmac_id); | |
6b7c5b94 SP |
1647 | if (status != 0) |
1648 | goto do_none; | |
1649 | ||
6b7c5b94 SP |
1650 | status = be_tx_queues_create(adapter); |
1651 | if (status != 0) | |
1652 | goto if_destroy; | |
1653 | ||
1654 | status = be_rx_queues_create(adapter); | |
1655 | if (status != 0) | |
1656 | goto tx_qs_destroy; | |
1657 | ||
5fb379ee SP |
1658 | status = be_mcc_queues_create(adapter); |
1659 | if (status != 0) | |
1660 | goto rx_qs_destroy; | |
6b7c5b94 | 1661 | |
6b7c5b94 SP |
1662 | return 0; |
1663 | ||
5fb379ee SP |
1664 | rx_qs_destroy: |
1665 | be_rx_queues_destroy(adapter); | |
6b7c5b94 SP |
1666 | tx_qs_destroy: |
1667 | be_tx_queues_destroy(adapter); | |
1668 | if_destroy: | |
8788fdc2 | 1669 | be_cmd_if_destroy(adapter, adapter->if_handle); |
6b7c5b94 SP |
1670 | do_none: |
1671 | return status; | |
1672 | } | |
1673 | ||
5fb379ee SP |
1674 | static int be_clear(struct be_adapter *adapter) |
1675 | { | |
1a8887d8 | 1676 | be_mcc_queues_destroy(adapter); |
5fb379ee SP |
1677 | be_rx_queues_destroy(adapter); |
1678 | be_tx_queues_destroy(adapter); | |
1679 | ||
8788fdc2 | 1680 | be_cmd_if_destroy(adapter, adapter->if_handle); |
5fb379ee | 1681 | |
5fb379ee SP |
1682 | return 0; |
1683 | } | |
1684 | ||
6b7c5b94 SP |
1685 | static int be_close(struct net_device *netdev) |
1686 | { | |
1687 | struct be_adapter *adapter = netdev_priv(netdev); | |
6b7c5b94 SP |
1688 | struct be_eq_obj *rx_eq = &adapter->rx_eq; |
1689 | struct be_eq_obj *tx_eq = &adapter->tx_eq; | |
1690 | int vec; | |
1691 | ||
b305be78 | 1692 | cancel_delayed_work_sync(&adapter->work); |
6b7c5b94 SP |
1693 | |
1694 | netif_stop_queue(netdev); | |
1695 | netif_carrier_off(netdev); | |
a8f447bd | 1696 | adapter->link_up = false; |
6b7c5b94 | 1697 | |
8788fdc2 | 1698 | be_intr_set(adapter, false); |
6b7c5b94 SP |
1699 | |
1700 | if (adapter->msix_enabled) { | |
1701 | vec = be_msix_vec_get(adapter, tx_eq->q.id); | |
1702 | synchronize_irq(vec); | |
1703 | vec = be_msix_vec_get(adapter, rx_eq->q.id); | |
1704 | synchronize_irq(vec); | |
1705 | } else { | |
1706 | synchronize_irq(netdev->irq); | |
1707 | } | |
1708 | be_irq_unregister(adapter); | |
1709 | ||
1710 | napi_disable(&rx_eq->napi); | |
1711 | napi_disable(&tx_eq->napi); | |
1712 | ||
a8e9179a SP |
1713 | /* Wait for all pending tx completions to arrive so that |
1714 | * all tx skbs are freed. | |
1715 | */ | |
1716 | be_tx_compl_clean(adapter); | |
1717 | ||
6b7c5b94 SP |
1718 | return 0; |
1719 | } | |
1720 | ||
84517482 AK |
1721 | #define FW_FILE_HDR_SIGN "ServerEngines Corp. " |
1722 | char flash_cookie[2][16] = {"*** SE FLAS", | |
1723 | "H DIRECTORY *** "}; | |
1724 | static int be_flash_image(struct be_adapter *adapter, | |
1725 | const struct firmware *fw, | |
1726 | struct be_dma_mem *flash_cmd, u32 flash_type) | |
1727 | { | |
1728 | int status; | |
1729 | u32 flash_op, image_offset = 0, total_bytes, image_size = 0; | |
1730 | int num_bytes; | |
1731 | const u8 *p = fw->data; | |
1732 | struct be_cmd_write_flashrom *req = flash_cmd->va; | |
1733 | ||
1734 | switch (flash_type) { | |
1735 | case FLASHROM_TYPE_ISCSI_ACTIVE: | |
1736 | image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START; | |
1737 | image_size = FLASH_IMAGE_MAX_SIZE; | |
1738 | break; | |
1739 | case FLASHROM_TYPE_ISCSI_BACKUP: | |
1740 | image_offset = FLASH_iSCSI_BACKUP_IMAGE_START; | |
1741 | image_size = FLASH_IMAGE_MAX_SIZE; | |
1742 | break; | |
1743 | case FLASHROM_TYPE_FCOE_FW_ACTIVE: | |
1744 | image_offset = FLASH_FCoE_PRIMARY_IMAGE_START; | |
1745 | image_size = FLASH_IMAGE_MAX_SIZE; | |
1746 | break; | |
1747 | case FLASHROM_TYPE_FCOE_FW_BACKUP: | |
1748 | image_offset = FLASH_FCoE_BACKUP_IMAGE_START; | |
1749 | image_size = FLASH_IMAGE_MAX_SIZE; | |
1750 | break; | |
1751 | case FLASHROM_TYPE_BIOS: | |
1752 | image_offset = FLASH_iSCSI_BIOS_START; | |
1753 | image_size = FLASH_BIOS_IMAGE_MAX_SIZE; | |
1754 | break; | |
1755 | case FLASHROM_TYPE_FCOE_BIOS: | |
1756 | image_offset = FLASH_FCoE_BIOS_START; | |
1757 | image_size = FLASH_BIOS_IMAGE_MAX_SIZE; | |
1758 | break; | |
1759 | case FLASHROM_TYPE_PXE_BIOS: | |
1760 | image_offset = FLASH_PXE_BIOS_START; | |
1761 | image_size = FLASH_BIOS_IMAGE_MAX_SIZE; | |
1762 | break; | |
1763 | default: | |
1764 | return 0; | |
1765 | } | |
1766 | ||
1767 | p += sizeof(struct flash_file_hdr) + image_offset; | |
1768 | if (p + image_size > fw->data + fw->size) | |
1769 | return -1; | |
1770 | ||
1771 | total_bytes = image_size; | |
1772 | ||
1773 | while (total_bytes) { | |
1774 | if (total_bytes > 32*1024) | |
1775 | num_bytes = 32*1024; | |
1776 | else | |
1777 | num_bytes = total_bytes; | |
1778 | total_bytes -= num_bytes; | |
1779 | ||
1780 | if (!total_bytes) | |
1781 | flash_op = FLASHROM_OPER_FLASH; | |
1782 | else | |
1783 | flash_op = FLASHROM_OPER_SAVE; | |
1784 | memcpy(req->params.data_buf, p, num_bytes); | |
1785 | p += num_bytes; | |
1786 | status = be_cmd_write_flashrom(adapter, flash_cmd, | |
1787 | flash_type, flash_op, num_bytes); | |
1788 | if (status) { | |
1789 | dev_err(&adapter->pdev->dev, | |
1790 | "cmd to write to flash rom failed. type/op %d/%d\n", | |
1791 | flash_type, flash_op); | |
1792 | return -1; | |
1793 | } | |
1794 | yield(); | |
1795 | } | |
1796 | ||
1797 | return 0; | |
1798 | } | |
1799 | ||
1800 | int be_load_fw(struct be_adapter *adapter, u8 *func) | |
1801 | { | |
1802 | char fw_file[ETHTOOL_FLASH_MAX_FILENAME]; | |
1803 | const struct firmware *fw; | |
1804 | struct flash_file_hdr *fhdr; | |
1805 | struct flash_section_info *fsec = NULL; | |
1806 | struct be_dma_mem flash_cmd; | |
1807 | int status; | |
1808 | const u8 *p; | |
1809 | bool entry_found = false; | |
1810 | int flash_type; | |
1811 | char fw_ver[FW_VER_LEN]; | |
1812 | char fw_cfg; | |
1813 | ||
1814 | status = be_cmd_get_fw_ver(adapter, fw_ver); | |
1815 | if (status) | |
1816 | return status; | |
1817 | ||
1818 | fw_cfg = *(fw_ver + 2); | |
1819 | if (fw_cfg == '0') | |
1820 | fw_cfg = '1'; | |
1821 | strcpy(fw_file, func); | |
1822 | ||
1823 | status = request_firmware(&fw, fw_file, &adapter->pdev->dev); | |
1824 | if (status) | |
1825 | goto fw_exit; | |
1826 | ||
1827 | p = fw->data; | |
1828 | fhdr = (struct flash_file_hdr *) p; | |
1829 | if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) { | |
1830 | dev_err(&adapter->pdev->dev, | |
1831 | "Firmware(%s) load error (signature did not match)\n", | |
1832 | fw_file); | |
1833 | status = -1; | |
1834 | goto fw_exit; | |
1835 | } | |
1836 | ||
1837 | dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file); | |
1838 | ||
1839 | p += sizeof(struct flash_file_hdr); | |
1840 | while (p < (fw->data + fw->size)) { | |
1841 | fsec = (struct flash_section_info *)p; | |
1842 | if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) { | |
1843 | entry_found = true; | |
1844 | break; | |
1845 | } | |
1846 | p += 32; | |
1847 | } | |
1848 | ||
1849 | if (!entry_found) { | |
1850 | status = -1; | |
1851 | dev_err(&adapter->pdev->dev, | |
1852 | "Flash cookie not found in firmware image\n"); | |
1853 | goto fw_exit; | |
1854 | } | |
1855 | ||
1856 | flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024; | |
1857 | flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size, | |
1858 | &flash_cmd.dma); | |
1859 | if (!flash_cmd.va) { | |
1860 | status = -ENOMEM; | |
1861 | dev_err(&adapter->pdev->dev, | |
1862 | "Memory allocation failure while flashing\n"); | |
1863 | goto fw_exit; | |
1864 | } | |
1865 | ||
1866 | for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE; | |
1867 | flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) { | |
1868 | status = be_flash_image(adapter, fw, &flash_cmd, | |
1869 | flash_type); | |
1870 | if (status) | |
1871 | break; | |
1872 | } | |
1873 | ||
1874 | pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va, | |
1875 | flash_cmd.dma); | |
1876 | if (status) { | |
1877 | dev_err(&adapter->pdev->dev, "Firmware load error\n"); | |
1878 | goto fw_exit; | |
1879 | } | |
1880 | ||
1881 | dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n"); | |
1882 | ||
1883 | fw_exit: | |
1884 | release_firmware(fw); | |
1885 | return status; | |
1886 | } | |
1887 | ||
6b7c5b94 SP |
1888 | static struct net_device_ops be_netdev_ops = { |
1889 | .ndo_open = be_open, | |
1890 | .ndo_stop = be_close, | |
1891 | .ndo_start_xmit = be_xmit, | |
1892 | .ndo_get_stats = be_get_stats, | |
1893 | .ndo_set_rx_mode = be_set_multicast_list, | |
1894 | .ndo_set_mac_address = be_mac_addr_set, | |
1895 | .ndo_change_mtu = be_change_mtu, | |
1896 | .ndo_validate_addr = eth_validate_addr, | |
1897 | .ndo_vlan_rx_register = be_vlan_register, | |
1898 | .ndo_vlan_rx_add_vid = be_vlan_add_vid, | |
1899 | .ndo_vlan_rx_kill_vid = be_vlan_rem_vid, | |
1900 | }; | |
1901 | ||
1902 | static void be_netdev_init(struct net_device *netdev) | |
1903 | { | |
1904 | struct be_adapter *adapter = netdev_priv(netdev); | |
1905 | ||
1906 | netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO | | |
583e3f34 AK |
1907 | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM | |
1908 | NETIF_F_GRO; | |
6b7c5b94 SP |
1909 | |
1910 | netdev->flags |= IFF_MULTICAST; | |
1911 | ||
728a9972 AK |
1912 | adapter->rx_csum = true; |
1913 | ||
9e90c961 AK |
1914 | /* Default settings for Rx and Tx flow control */ |
1915 | adapter->rx_fc = true; | |
1916 | adapter->tx_fc = true; | |
1917 | ||
c190e3c8 AK |
1918 | netif_set_gso_max_size(netdev, 65535); |
1919 | ||
6b7c5b94 SP |
1920 | BE_SET_NETDEV_OPS(netdev, &be_netdev_ops); |
1921 | ||
1922 | SET_ETHTOOL_OPS(netdev, &be_ethtool_ops); | |
1923 | ||
6b7c5b94 SP |
1924 | netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx, |
1925 | BE_NAPI_WEIGHT); | |
5fb379ee | 1926 | netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc, |
6b7c5b94 SP |
1927 | BE_NAPI_WEIGHT); |
1928 | ||
1929 | netif_carrier_off(netdev); | |
1930 | netif_stop_queue(netdev); | |
1931 | } | |
1932 | ||
1933 | static void be_unmap_pci_bars(struct be_adapter *adapter) | |
1934 | { | |
8788fdc2 SP |
1935 | if (adapter->csr) |
1936 | iounmap(adapter->csr); | |
1937 | if (adapter->db) | |
1938 | iounmap(adapter->db); | |
1939 | if (adapter->pcicfg) | |
1940 | iounmap(adapter->pcicfg); | |
6b7c5b94 SP |
1941 | } |
1942 | ||
1943 | static int be_map_pci_bars(struct be_adapter *adapter) | |
1944 | { | |
1945 | u8 __iomem *addr; | |
1946 | ||
1947 | addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2), | |
1948 | pci_resource_len(adapter->pdev, 2)); | |
1949 | if (addr == NULL) | |
1950 | return -ENOMEM; | |
8788fdc2 | 1951 | adapter->csr = addr; |
6b7c5b94 SP |
1952 | |
1953 | addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4), | |
1954 | 128 * 1024); | |
1955 | if (addr == NULL) | |
1956 | goto pci_map_err; | |
8788fdc2 | 1957 | adapter->db = addr; |
6b7c5b94 SP |
1958 | |
1959 | addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1), | |
1960 | pci_resource_len(adapter->pdev, 1)); | |
1961 | if (addr == NULL) | |
1962 | goto pci_map_err; | |
8788fdc2 | 1963 | adapter->pcicfg = addr; |
6b7c5b94 SP |
1964 | |
1965 | return 0; | |
1966 | pci_map_err: | |
1967 | be_unmap_pci_bars(adapter); | |
1968 | return -ENOMEM; | |
1969 | } | |
1970 | ||
1971 | ||
1972 | static void be_ctrl_cleanup(struct be_adapter *adapter) | |
1973 | { | |
8788fdc2 | 1974 | struct be_dma_mem *mem = &adapter->mbox_mem_alloced; |
6b7c5b94 SP |
1975 | |
1976 | be_unmap_pci_bars(adapter); | |
1977 | ||
1978 | if (mem->va) | |
1979 | pci_free_consistent(adapter->pdev, mem->size, | |
1980 | mem->va, mem->dma); | |
1981 | } | |
1982 | ||
6b7c5b94 SP |
1983 | static int be_ctrl_init(struct be_adapter *adapter) |
1984 | { | |
8788fdc2 SP |
1985 | struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced; |
1986 | struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem; | |
6b7c5b94 | 1987 | int status; |
6b7c5b94 SP |
1988 | |
1989 | status = be_map_pci_bars(adapter); | |
1990 | if (status) | |
1991 | return status; | |
1992 | ||
1993 | mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16; | |
1994 | mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev, | |
1995 | mbox_mem_alloc->size, &mbox_mem_alloc->dma); | |
1996 | if (!mbox_mem_alloc->va) { | |
1997 | be_unmap_pci_bars(adapter); | |
1998 | return -1; | |
1999 | } | |
2000 | mbox_mem_align->size = sizeof(struct be_mcc_mailbox); | |
2001 | mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16); | |
2002 | mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16); | |
2003 | memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox)); | |
8788fdc2 SP |
2004 | spin_lock_init(&adapter->mbox_lock); |
2005 | spin_lock_init(&adapter->mcc_lock); | |
2006 | spin_lock_init(&adapter->mcc_cq_lock); | |
a8f447bd | 2007 | |
6b7c5b94 SP |
2008 | return 0; |
2009 | } | |
2010 | ||
2011 | static void be_stats_cleanup(struct be_adapter *adapter) | |
2012 | { | |
2013 | struct be_stats_obj *stats = &adapter->stats; | |
2014 | struct be_dma_mem *cmd = &stats->cmd; | |
2015 | ||
2016 | if (cmd->va) | |
2017 | pci_free_consistent(adapter->pdev, cmd->size, | |
2018 | cmd->va, cmd->dma); | |
2019 | } | |
2020 | ||
2021 | static int be_stats_init(struct be_adapter *adapter) | |
2022 | { | |
2023 | struct be_stats_obj *stats = &adapter->stats; | |
2024 | struct be_dma_mem *cmd = &stats->cmd; | |
2025 | ||
2026 | cmd->size = sizeof(struct be_cmd_req_get_stats); | |
2027 | cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma); | |
2028 | if (cmd->va == NULL) | |
2029 | return -1; | |
2030 | return 0; | |
2031 | } | |
2032 | ||
2033 | static void __devexit be_remove(struct pci_dev *pdev) | |
2034 | { | |
2035 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
2036 | if (!adapter) | |
2037 | return; | |
2038 | ||
2039 | unregister_netdev(adapter->netdev); | |
2040 | ||
5fb379ee SP |
2041 | be_clear(adapter); |
2042 | ||
6b7c5b94 SP |
2043 | be_stats_cleanup(adapter); |
2044 | ||
2045 | be_ctrl_cleanup(adapter); | |
2046 | ||
2047 | if (adapter->msix_enabled) { | |
2048 | pci_disable_msix(adapter->pdev); | |
2049 | adapter->msix_enabled = false; | |
2050 | } | |
2051 | ||
2052 | pci_set_drvdata(pdev, NULL); | |
2053 | pci_release_regions(pdev); | |
2054 | pci_disable_device(pdev); | |
2055 | ||
2056 | free_netdev(adapter->netdev); | |
2057 | } | |
2058 | ||
2059 | static int be_hw_up(struct be_adapter *adapter) | |
2060 | { | |
6b7c5b94 SP |
2061 | int status; |
2062 | ||
8788fdc2 | 2063 | status = be_cmd_POST(adapter); |
6b7c5b94 SP |
2064 | if (status) |
2065 | return status; | |
2066 | ||
43a04fdc SP |
2067 | status = be_cmd_reset_function(adapter); |
2068 | if (status) | |
2069 | return status; | |
2070 | ||
8788fdc2 | 2071 | status = be_cmd_get_fw_ver(adapter, adapter->fw_ver); |
6b7c5b94 SP |
2072 | if (status) |
2073 | return status; | |
2074 | ||
dcb9b564 AK |
2075 | status = be_cmd_query_fw_cfg(adapter, |
2076 | &adapter->port_num, &adapter->cap); | |
6b7c5b94 SP |
2077 | return status; |
2078 | } | |
2079 | ||
2080 | static int __devinit be_probe(struct pci_dev *pdev, | |
2081 | const struct pci_device_id *pdev_id) | |
2082 | { | |
2083 | int status = 0; | |
2084 | struct be_adapter *adapter; | |
2085 | struct net_device *netdev; | |
6b7c5b94 SP |
2086 | u8 mac[ETH_ALEN]; |
2087 | ||
2088 | status = pci_enable_device(pdev); | |
2089 | if (status) | |
2090 | goto do_none; | |
2091 | ||
2092 | status = pci_request_regions(pdev, DRV_NAME); | |
2093 | if (status) | |
2094 | goto disable_dev; | |
2095 | pci_set_master(pdev); | |
2096 | ||
2097 | netdev = alloc_etherdev(sizeof(struct be_adapter)); | |
2098 | if (netdev == NULL) { | |
2099 | status = -ENOMEM; | |
2100 | goto rel_reg; | |
2101 | } | |
2102 | adapter = netdev_priv(netdev); | |
2103 | adapter->pdev = pdev; | |
2104 | pci_set_drvdata(pdev, adapter); | |
2105 | adapter->netdev = netdev; | |
2106 | ||
2107 | be_msix_enable(adapter); | |
2108 | ||
e930438c | 2109 | status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); |
6b7c5b94 SP |
2110 | if (!status) { |
2111 | netdev->features |= NETIF_F_HIGHDMA; | |
2112 | } else { | |
e930438c | 2113 | status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
6b7c5b94 SP |
2114 | if (status) { |
2115 | dev_err(&pdev->dev, "Could not set PCI DMA Mask\n"); | |
2116 | goto free_netdev; | |
2117 | } | |
2118 | } | |
2119 | ||
6b7c5b94 SP |
2120 | status = be_ctrl_init(adapter); |
2121 | if (status) | |
2122 | goto free_netdev; | |
2123 | ||
2124 | status = be_stats_init(adapter); | |
2125 | if (status) | |
2126 | goto ctrl_clean; | |
2127 | ||
2128 | status = be_hw_up(adapter); | |
2129 | if (status) | |
2130 | goto stats_clean; | |
2131 | ||
8788fdc2 | 2132 | status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK, |
6b7c5b94 SP |
2133 | true /* permanent */, 0); |
2134 | if (status) | |
2135 | goto stats_clean; | |
2136 | memcpy(netdev->dev_addr, mac, ETH_ALEN); | |
2137 | ||
2138 | INIT_DELAYED_WORK(&adapter->work, be_worker); | |
2139 | be_netdev_init(netdev); | |
2140 | SET_NETDEV_DEV(netdev, &adapter->pdev->dev); | |
2141 | ||
5fb379ee SP |
2142 | status = be_setup(adapter); |
2143 | if (status) | |
2144 | goto stats_clean; | |
6b7c5b94 SP |
2145 | status = register_netdev(netdev); |
2146 | if (status != 0) | |
5fb379ee | 2147 | goto unsetup; |
6b7c5b94 | 2148 | |
c4ca2374 | 2149 | dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num); |
6b7c5b94 SP |
2150 | return 0; |
2151 | ||
5fb379ee SP |
2152 | unsetup: |
2153 | be_clear(adapter); | |
6b7c5b94 SP |
2154 | stats_clean: |
2155 | be_stats_cleanup(adapter); | |
2156 | ctrl_clean: | |
2157 | be_ctrl_cleanup(adapter); | |
2158 | free_netdev: | |
2159 | free_netdev(adapter->netdev); | |
2160 | rel_reg: | |
2161 | pci_release_regions(pdev); | |
2162 | disable_dev: | |
2163 | pci_disable_device(pdev); | |
2164 | do_none: | |
c4ca2374 | 2165 | dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev)); |
6b7c5b94 SP |
2166 | return status; |
2167 | } | |
2168 | ||
2169 | static int be_suspend(struct pci_dev *pdev, pm_message_t state) | |
2170 | { | |
2171 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
2172 | struct net_device *netdev = adapter->netdev; | |
2173 | ||
2174 | netif_device_detach(netdev); | |
2175 | if (netif_running(netdev)) { | |
2176 | rtnl_lock(); | |
2177 | be_close(netdev); | |
2178 | rtnl_unlock(); | |
2179 | } | |
9e90c961 | 2180 | be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc); |
9b0365f1 | 2181 | be_clear(adapter); |
6b7c5b94 SP |
2182 | |
2183 | pci_save_state(pdev); | |
2184 | pci_disable_device(pdev); | |
2185 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
2186 | return 0; | |
2187 | } | |
2188 | ||
2189 | static int be_resume(struct pci_dev *pdev) | |
2190 | { | |
2191 | int status = 0; | |
2192 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
2193 | struct net_device *netdev = adapter->netdev; | |
2194 | ||
2195 | netif_device_detach(netdev); | |
2196 | ||
2197 | status = pci_enable_device(pdev); | |
2198 | if (status) | |
2199 | return status; | |
2200 | ||
2201 | pci_set_power_state(pdev, 0); | |
2202 | pci_restore_state(pdev); | |
2203 | ||
9b0365f1 | 2204 | be_setup(adapter); |
6b7c5b94 SP |
2205 | if (netif_running(netdev)) { |
2206 | rtnl_lock(); | |
2207 | be_open(netdev); | |
2208 | rtnl_unlock(); | |
2209 | } | |
2210 | netif_device_attach(netdev); | |
2211 | return 0; | |
2212 | } | |
2213 | ||
2214 | static struct pci_driver be_driver = { | |
2215 | .name = DRV_NAME, | |
2216 | .id_table = be_dev_ids, | |
2217 | .probe = be_probe, | |
2218 | .remove = be_remove, | |
2219 | .suspend = be_suspend, | |
2220 | .resume = be_resume | |
2221 | }; | |
2222 | ||
2223 | static int __init be_init_module(void) | |
2224 | { | |
2225 | if (rx_frag_size != 8192 && rx_frag_size != 4096 | |
2226 | && rx_frag_size != 2048) { | |
2227 | printk(KERN_WARNING DRV_NAME | |
2228 | " : Module param rx_frag_size must be 2048/4096/8192." | |
2229 | " Using 2048\n"); | |
2230 | rx_frag_size = 2048; | |
2231 | } | |
6b7c5b94 SP |
2232 | |
2233 | return pci_register_driver(&be_driver); | |
2234 | } | |
2235 | module_init(be_init_module); | |
2236 | ||
2237 | static void __exit be_exit_module(void) | |
2238 | { | |
2239 | pci_unregister_driver(&be_driver); | |
2240 | } | |
2241 | module_exit(be_exit_module); |