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40d69043 DT |
1 | /* |
2 | * Copyright (C) ST-Ericsson AB 2010 | |
3 | * Contact: Sjur Brendeland / sjur.brandeland@stericsson.com | |
4 | * Author: Daniel Martensson / daniel.martensson@stericsson.com | |
5 | * Dmitry.Tarnyagin / dmitry.tarnyagin@stericsson.com | |
6 | * License terms: GNU General Public License (GPL) version 2. | |
7 | */ | |
8 | ||
39abbaef | 9 | #define pr_fmt(fmt) KBUILD_MODNAME fmt |
10 | ||
40d69043 DT |
11 | #include <linux/init.h> |
12 | #include <linux/module.h> | |
13 | #include <linux/device.h> | |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/netdevice.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/if_arp.h> | |
22 | #include <linux/timer.h> | |
5bbed92d | 23 | #include <linux/rtnetlink.h> |
ece367d5 | 24 | #include <linux/pkt_sched.h> |
40d69043 DT |
25 | #include <net/caif/caif_layer.h> |
26 | #include <net/caif/caif_hsi.h> | |
27 | ||
28 | MODULE_LICENSE("GPL"); | |
29 | MODULE_AUTHOR("Daniel Martensson<daniel.martensson@stericsson.com>"); | |
30 | MODULE_DESCRIPTION("CAIF HSI driver"); | |
31 | ||
32 | /* Returns the number of padding bytes for alignment. */ | |
33 | #define PAD_POW2(x, pow) ((((x)&((pow)-1)) == 0) ? 0 :\ | |
34 | (((pow)-((x)&((pow)-1))))) | |
35 | ||
28bd2049 DT |
36 | static int inactivity_timeout = 1000; |
37 | module_param(inactivity_timeout, int, S_IRUGO | S_IWUSR); | |
38 | MODULE_PARM_DESC(inactivity_timeout, "Inactivity timeout on HSI, ms."); | |
39 | ||
ece367d5 DT |
40 | static int aggregation_timeout = 1; |
41 | module_param(aggregation_timeout, int, S_IRUGO | S_IWUSR); | |
42 | MODULE_PARM_DESC(aggregation_timeout, "Aggregation timeout on HSI, ms."); | |
43 | ||
40d69043 DT |
44 | /* |
45 | * HSI padding options. | |
46 | * Warning: must be a base of 2 (& operation used) and can not be zero ! | |
47 | */ | |
48 | static int hsi_head_align = 4; | |
49 | module_param(hsi_head_align, int, S_IRUGO); | |
50 | MODULE_PARM_DESC(hsi_head_align, "HSI head alignment."); | |
51 | ||
52 | static int hsi_tail_align = 4; | |
53 | module_param(hsi_tail_align, int, S_IRUGO); | |
54 | MODULE_PARM_DESC(hsi_tail_align, "HSI tail alignment."); | |
55 | ||
56 | /* | |
57 | * HSI link layer flowcontrol thresholds. | |
58 | * Warning: A high threshold value migth increase throughput but it will at | |
59 | * the same time prevent channel prioritization and increase the risk of | |
60 | * flooding the modem. The high threshold should be above the low. | |
61 | */ | |
62 | static int hsi_high_threshold = 100; | |
63 | module_param(hsi_high_threshold, int, S_IRUGO); | |
64 | MODULE_PARM_DESC(hsi_high_threshold, "HSI high threshold (FLOW OFF)."); | |
65 | ||
66 | static int hsi_low_threshold = 50; | |
67 | module_param(hsi_low_threshold, int, S_IRUGO); | |
68 | MODULE_PARM_DESC(hsi_low_threshold, "HSI high threshold (FLOW ON)."); | |
69 | ||
70 | #define ON 1 | |
71 | #define OFF 0 | |
72 | ||
73 | /* | |
74 | * Threshold values for the HSI packet queue. Flowcontrol will be asserted | |
75 | * when the number of packets exceeds HIGH_WATER_MARK. It will not be | |
76 | * de-asserted before the number of packets drops below LOW_WATER_MARK. | |
77 | */ | |
78 | #define LOW_WATER_MARK hsi_low_threshold | |
79 | #define HIGH_WATER_MARK hsi_high_threshold | |
80 | ||
81 | static LIST_HEAD(cfhsi_list); | |
82 | static spinlock_t cfhsi_list_lock; | |
83 | ||
84 | static void cfhsi_inactivity_tout(unsigned long arg) | |
85 | { | |
86 | struct cfhsi *cfhsi = (struct cfhsi *)arg; | |
87 | ||
88 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", | |
89 | __func__); | |
90 | ||
91 | /* Schedule power down work queue. */ | |
92 | if (!test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
93 | queue_work(cfhsi->wq, &cfhsi->wake_down_work); | |
94 | } | |
95 | ||
ece367d5 DT |
96 | static void cfhsi_update_aggregation_stats(struct cfhsi *cfhsi, |
97 | const struct sk_buff *skb, | |
98 | int direction) | |
99 | { | |
100 | struct caif_payload_info *info; | |
101 | int hpad, tpad, len; | |
102 | ||
103 | info = (struct caif_payload_info *)&skb->cb; | |
104 | hpad = 1 + PAD_POW2((info->hdr_len + 1), hsi_head_align); | |
105 | tpad = PAD_POW2((skb->len + hpad), hsi_tail_align); | |
106 | len = skb->len + hpad + tpad; | |
107 | ||
108 | if (direction > 0) | |
109 | cfhsi->aggregation_len += len; | |
110 | else if (direction < 0) | |
111 | cfhsi->aggregation_len -= len; | |
112 | } | |
113 | ||
114 | static bool cfhsi_can_send_aggregate(struct cfhsi *cfhsi) | |
115 | { | |
116 | int i; | |
117 | ||
118 | if (cfhsi->aggregation_timeout < 0) | |
119 | return true; | |
120 | ||
121 | for (i = 0; i < CFHSI_PRIO_BEBK; ++i) { | |
122 | if (cfhsi->qhead[i].qlen) | |
123 | return true; | |
124 | } | |
125 | ||
126 | /* TODO: Use aggregation_len instead */ | |
127 | if (cfhsi->qhead[CFHSI_PRIO_BEBK].qlen >= CFHSI_MAX_PKTS) | |
128 | return true; | |
129 | ||
130 | return false; | |
131 | } | |
132 | ||
133 | static struct sk_buff *cfhsi_dequeue(struct cfhsi *cfhsi) | |
134 | { | |
135 | struct sk_buff *skb; | |
136 | int i; | |
137 | ||
138 | for (i = 0; i < CFHSI_PRIO_LAST; ++i) { | |
139 | skb = skb_dequeue(&cfhsi->qhead[i]); | |
140 | if (skb) | |
141 | break; | |
142 | } | |
143 | ||
144 | return skb; | |
145 | } | |
146 | ||
147 | static int cfhsi_tx_queue_len(struct cfhsi *cfhsi) | |
148 | { | |
149 | int i, len = 0; | |
150 | for (i = 0; i < CFHSI_PRIO_LAST; ++i) | |
151 | len += skb_queue_len(&cfhsi->qhead[i]); | |
152 | return len; | |
153 | } | |
154 | ||
40d69043 DT |
155 | static void cfhsi_abort_tx(struct cfhsi *cfhsi) |
156 | { | |
157 | struct sk_buff *skb; | |
158 | ||
159 | for (;;) { | |
160 | spin_lock_bh(&cfhsi->lock); | |
ece367d5 | 161 | skb = cfhsi_dequeue(cfhsi); |
40d69043 DT |
162 | if (!skb) |
163 | break; | |
164 | ||
165 | cfhsi->ndev->stats.tx_errors++; | |
166 | cfhsi->ndev->stats.tx_dropped++; | |
ece367d5 | 167 | cfhsi_update_aggregation_stats(cfhsi, skb, -1); |
40d69043 DT |
168 | spin_unlock_bh(&cfhsi->lock); |
169 | kfree_skb(skb); | |
170 | } | |
171 | cfhsi->tx_state = CFHSI_TX_STATE_IDLE; | |
172 | if (!test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
ece367d5 | 173 | mod_timer(&cfhsi->inactivity_timer, |
28bd2049 | 174 | jiffies + cfhsi->inactivity_timeout); |
40d69043 DT |
175 | spin_unlock_bh(&cfhsi->lock); |
176 | } | |
177 | ||
178 | static int cfhsi_flush_fifo(struct cfhsi *cfhsi) | |
179 | { | |
180 | char buffer[32]; /* Any reasonable value */ | |
181 | size_t fifo_occupancy; | |
182 | int ret; | |
183 | ||
184 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", | |
185 | __func__); | |
186 | ||
40d69043 DT |
187 | do { |
188 | ret = cfhsi->dev->cfhsi_fifo_occupancy(cfhsi->dev, | |
189 | &fifo_occupancy); | |
190 | if (ret) { | |
191 | dev_warn(&cfhsi->ndev->dev, | |
192 | "%s: can't get FIFO occupancy: %d.\n", | |
193 | __func__, ret); | |
194 | break; | |
195 | } else if (!fifo_occupancy) | |
196 | /* No more data, exitting normally */ | |
197 | break; | |
198 | ||
199 | fifo_occupancy = min(sizeof(buffer), fifo_occupancy); | |
200 | set_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits); | |
201 | ret = cfhsi->dev->cfhsi_rx(buffer, fifo_occupancy, | |
202 | cfhsi->dev); | |
203 | if (ret) { | |
204 | clear_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits); | |
205 | dev_warn(&cfhsi->ndev->dev, | |
206 | "%s: can't read data: %d.\n", | |
207 | __func__, ret); | |
208 | break; | |
209 | } | |
210 | ||
211 | ret = 5 * HZ; | |
687b13e9 | 212 | ret = wait_event_interruptible_timeout(cfhsi->flush_fifo_wait, |
40d69043 DT |
213 | !test_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits), ret); |
214 | ||
215 | if (ret < 0) { | |
216 | dev_warn(&cfhsi->ndev->dev, | |
217 | "%s: can't wait for flush complete: %d.\n", | |
218 | __func__, ret); | |
219 | break; | |
220 | } else if (!ret) { | |
221 | ret = -ETIMEDOUT; | |
222 | dev_warn(&cfhsi->ndev->dev, | |
223 | "%s: timeout waiting for flush complete.\n", | |
224 | __func__); | |
225 | break; | |
226 | } | |
227 | } while (1); | |
228 | ||
40d69043 DT |
229 | return ret; |
230 | } | |
231 | ||
232 | static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi) | |
233 | { | |
234 | int nfrms = 0; | |
235 | int pld_len = 0; | |
236 | struct sk_buff *skb; | |
237 | u8 *pfrm = desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ; | |
238 | ||
ece367d5 | 239 | skb = cfhsi_dequeue(cfhsi); |
40d69043 DT |
240 | if (!skb) |
241 | return 0; | |
242 | ||
94230feb | 243 | /* Clear offset. */ |
244 | desc->offset = 0; | |
245 | ||
40d69043 DT |
246 | /* Check if we can embed a CAIF frame. */ |
247 | if (skb->len < CFHSI_MAX_EMB_FRM_SZ) { | |
248 | struct caif_payload_info *info; | |
249 | int hpad = 0; | |
250 | int tpad = 0; | |
251 | ||
252 | /* Calculate needed head alignment and tail alignment. */ | |
253 | info = (struct caif_payload_info *)&skb->cb; | |
254 | ||
255 | hpad = 1 + PAD_POW2((info->hdr_len + 1), hsi_head_align); | |
256 | tpad = PAD_POW2((skb->len + hpad), hsi_tail_align); | |
257 | ||
258 | /* Check if frame still fits with added alignment. */ | |
259 | if ((skb->len + hpad + tpad) <= CFHSI_MAX_EMB_FRM_SZ) { | |
260 | u8 *pemb = desc->emb_frm; | |
261 | desc->offset = CFHSI_DESC_SHORT_SZ; | |
262 | *pemb = (u8)(hpad - 1); | |
263 | pemb += hpad; | |
264 | ||
265 | /* Update network statistics. */ | |
ece367d5 | 266 | spin_lock_bh(&cfhsi->lock); |
40d69043 DT |
267 | cfhsi->ndev->stats.tx_packets++; |
268 | cfhsi->ndev->stats.tx_bytes += skb->len; | |
ece367d5 DT |
269 | cfhsi_update_aggregation_stats(cfhsi, skb, -1); |
270 | spin_unlock_bh(&cfhsi->lock); | |
40d69043 DT |
271 | |
272 | /* Copy in embedded CAIF frame. */ | |
273 | skb_copy_bits(skb, 0, pemb, skb->len); | |
ece367d5 DT |
274 | |
275 | /* Consume the SKB */ | |
40d69043 DT |
276 | consume_skb(skb); |
277 | skb = NULL; | |
278 | } | |
94230feb | 279 | } |
40d69043 DT |
280 | |
281 | /* Create payload CAIF frames. */ | |
282 | pfrm = desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ; | |
283 | while (nfrms < CFHSI_MAX_PKTS) { | |
284 | struct caif_payload_info *info; | |
285 | int hpad = 0; | |
286 | int tpad = 0; | |
287 | ||
288 | if (!skb) | |
ece367d5 | 289 | skb = cfhsi_dequeue(cfhsi); |
40d69043 DT |
290 | |
291 | if (!skb) | |
292 | break; | |
293 | ||
294 | /* Calculate needed head alignment and tail alignment. */ | |
295 | info = (struct caif_payload_info *)&skb->cb; | |
296 | ||
297 | hpad = 1 + PAD_POW2((info->hdr_len + 1), hsi_head_align); | |
298 | tpad = PAD_POW2((skb->len + hpad), hsi_tail_align); | |
299 | ||
300 | /* Fill in CAIF frame length in descriptor. */ | |
301 | desc->cffrm_len[nfrms] = hpad + skb->len + tpad; | |
302 | ||
303 | /* Fill head padding information. */ | |
304 | *pfrm = (u8)(hpad - 1); | |
305 | pfrm += hpad; | |
306 | ||
307 | /* Update network statistics. */ | |
ece367d5 | 308 | spin_lock_bh(&cfhsi->lock); |
40d69043 DT |
309 | cfhsi->ndev->stats.tx_packets++; |
310 | cfhsi->ndev->stats.tx_bytes += skb->len; | |
ece367d5 DT |
311 | cfhsi_update_aggregation_stats(cfhsi, skb, -1); |
312 | spin_unlock_bh(&cfhsi->lock); | |
40d69043 DT |
313 | |
314 | /* Copy in CAIF frame. */ | |
315 | skb_copy_bits(skb, 0, pfrm, skb->len); | |
316 | ||
317 | /* Update payload length. */ | |
318 | pld_len += desc->cffrm_len[nfrms]; | |
319 | ||
320 | /* Update frame pointer. */ | |
321 | pfrm += skb->len + tpad; | |
ece367d5 DT |
322 | |
323 | /* Consume the SKB */ | |
40d69043 DT |
324 | consume_skb(skb); |
325 | skb = NULL; | |
326 | ||
327 | /* Update number of frames. */ | |
328 | nfrms++; | |
329 | } | |
330 | ||
331 | /* Unused length fields should be zero-filled (according to SPEC). */ | |
332 | while (nfrms < CFHSI_MAX_PKTS) { | |
333 | desc->cffrm_len[nfrms] = 0x0000; | |
334 | nfrms++; | |
335 | } | |
336 | ||
337 | /* Check if we can piggy-back another descriptor. */ | |
ece367d5 | 338 | if (cfhsi_can_send_aggregate(cfhsi)) |
40d69043 DT |
339 | desc->header |= CFHSI_PIGGY_DESC; |
340 | else | |
341 | desc->header &= ~CFHSI_PIGGY_DESC; | |
342 | ||
343 | return CFHSI_DESC_SZ + pld_len; | |
344 | } | |
345 | ||
ece367d5 | 346 | static void cfhsi_start_tx(struct cfhsi *cfhsi) |
40d69043 | 347 | { |
ece367d5 DT |
348 | struct cfhsi_desc *desc = (struct cfhsi_desc *)cfhsi->tx_buf; |
349 | int len, res; | |
40d69043 | 350 | |
687b13e9 | 351 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", __func__); |
40d69043 DT |
352 | |
353 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
354 | return; | |
355 | ||
40d69043 | 356 | do { |
40d69043 | 357 | /* Create HSI frame. */ |
ece367d5 DT |
358 | len = cfhsi_tx_frm(desc, cfhsi); |
359 | if (!len) { | |
360 | spin_lock_bh(&cfhsi->lock); | |
361 | if (unlikely(cfhsi_tx_queue_len(cfhsi))) { | |
fe47f125 | 362 | spin_unlock_bh(&cfhsi->lock); |
ece367d5 DT |
363 | res = -EAGAIN; |
364 | continue; | |
fe47f125 | 365 | } |
ece367d5 DT |
366 | cfhsi->tx_state = CFHSI_TX_STATE_IDLE; |
367 | /* Start inactivity timer. */ | |
368 | mod_timer(&cfhsi->inactivity_timer, | |
369 | jiffies + cfhsi->inactivity_timeout); | |
370 | spin_unlock_bh(&cfhsi->lock); | |
371 | break; | |
372 | } | |
40d69043 DT |
373 | |
374 | /* Set up new transfer. */ | |
375 | res = cfhsi->dev->cfhsi_tx(cfhsi->tx_buf, len, cfhsi->dev); | |
ece367d5 | 376 | if (WARN_ON(res < 0)) |
40d69043 DT |
377 | dev_err(&cfhsi->ndev->dev, "%s: TX error %d.\n", |
378 | __func__, res); | |
40d69043 | 379 | } while (res < 0); |
ece367d5 DT |
380 | } |
381 | ||
382 | static void cfhsi_tx_done(struct cfhsi *cfhsi) | |
383 | { | |
384 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", __func__); | |
385 | ||
386 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
387 | return; | |
388 | ||
389 | /* | |
390 | * Send flow on if flow off has been previously signalled | |
391 | * and number of packets is below low water mark. | |
392 | */ | |
393 | spin_lock_bh(&cfhsi->lock); | |
394 | if (cfhsi->flow_off_sent && | |
395 | cfhsi_tx_queue_len(cfhsi) <= cfhsi->q_low_mark && | |
396 | cfhsi->cfdev.flowctrl) { | |
397 | ||
398 | cfhsi->flow_off_sent = 0; | |
399 | cfhsi->cfdev.flowctrl(cfhsi->ndev, ON); | |
400 | } | |
401 | ||
402 | if (cfhsi_can_send_aggregate(cfhsi)) { | |
403 | spin_unlock_bh(&cfhsi->lock); | |
404 | cfhsi_start_tx(cfhsi); | |
405 | } else { | |
406 | mod_timer(&cfhsi->aggregation_timer, | |
407 | jiffies + cfhsi->aggregation_timeout); | |
408 | spin_unlock_bh(&cfhsi->lock); | |
409 | } | |
fe47f125 | 410 | |
fe47f125 | 411 | return; |
40d69043 DT |
412 | } |
413 | ||
414 | static void cfhsi_tx_done_cb(struct cfhsi_drv *drv) | |
415 | { | |
416 | struct cfhsi *cfhsi; | |
417 | ||
418 | cfhsi = container_of(drv, struct cfhsi, drv); | |
419 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", | |
420 | __func__); | |
421 | ||
422 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
423 | return; | |
687b13e9 | 424 | cfhsi_tx_done(cfhsi); |
40d69043 DT |
425 | } |
426 | ||
5bbed92d | 427 | static int cfhsi_rx_desc(struct cfhsi_desc *desc, struct cfhsi *cfhsi) |
40d69043 DT |
428 | { |
429 | int xfer_sz = 0; | |
430 | int nfrms = 0; | |
431 | u16 *plen = NULL; | |
432 | u8 *pfrm = NULL; | |
433 | ||
434 | if ((desc->header & ~CFHSI_PIGGY_DESC) || | |
435 | (desc->offset > CFHSI_MAX_EMB_FRM_SZ)) { | |
436 | dev_err(&cfhsi->ndev->dev, "%s: Invalid descriptor.\n", | |
437 | __func__); | |
5bbed92d | 438 | return -EPROTO; |
40d69043 DT |
439 | } |
440 | ||
441 | /* Check for embedded CAIF frame. */ | |
442 | if (desc->offset) { | |
443 | struct sk_buff *skb; | |
444 | u8 *dst = NULL; | |
687b13e9 | 445 | int len = 0; |
40d69043 DT |
446 | pfrm = ((u8 *)desc) + desc->offset; |
447 | ||
448 | /* Remove offset padding. */ | |
449 | pfrm += *pfrm + 1; | |
450 | ||
451 | /* Read length of CAIF frame (little endian). */ | |
452 | len = *pfrm; | |
453 | len |= ((*(pfrm+1)) << 8) & 0xFF00; | |
454 | len += 2; /* Add FCS fields. */ | |
455 | ||
5bbed92d DM |
456 | /* Sanity check length of CAIF frame. */ |
457 | if (unlikely(len > CFHSI_MAX_CAIF_FRAME_SZ)) { | |
458 | dev_err(&cfhsi->ndev->dev, "%s: Invalid length.\n", | |
459 | __func__); | |
460 | return -EPROTO; | |
461 | } | |
40d69043 DT |
462 | |
463 | /* Allocate SKB (OK even in IRQ context). */ | |
687b13e9 DM |
464 | skb = alloc_skb(len + 1, GFP_ATOMIC); |
465 | if (!skb) { | |
466 | dev_err(&cfhsi->ndev->dev, "%s: Out of memory !\n", | |
467 | __func__); | |
468 | return -ENOMEM; | |
40d69043 DT |
469 | } |
470 | caif_assert(skb != NULL); | |
471 | ||
472 | dst = skb_put(skb, len); | |
473 | memcpy(dst, pfrm, len); | |
474 | ||
475 | skb->protocol = htons(ETH_P_CAIF); | |
476 | skb_reset_mac_header(skb); | |
477 | skb->dev = cfhsi->ndev; | |
478 | ||
479 | /* | |
480 | * We are called from a arch specific platform device. | |
481 | * Unfortunately we don't know what context we're | |
482 | * running in. | |
483 | */ | |
484 | if (in_interrupt()) | |
485 | netif_rx(skb); | |
486 | else | |
487 | netif_rx_ni(skb); | |
488 | ||
489 | /* Update network statistics. */ | |
490 | cfhsi->ndev->stats.rx_packets++; | |
491 | cfhsi->ndev->stats.rx_bytes += len; | |
492 | } | |
493 | ||
40d69043 DT |
494 | /* Calculate transfer length. */ |
495 | plen = desc->cffrm_len; | |
496 | while (nfrms < CFHSI_MAX_PKTS && *plen) { | |
497 | xfer_sz += *plen; | |
498 | plen++; | |
499 | nfrms++; | |
500 | } | |
501 | ||
502 | /* Check for piggy-backed descriptor. */ | |
503 | if (desc->header & CFHSI_PIGGY_DESC) | |
504 | xfer_sz += CFHSI_DESC_SZ; | |
505 | ||
5bbed92d | 506 | if ((xfer_sz % 4) || (xfer_sz > (CFHSI_BUF_SZ_RX - CFHSI_DESC_SZ))) { |
40d69043 DT |
507 | dev_err(&cfhsi->ndev->dev, |
508 | "%s: Invalid payload len: %d, ignored.\n", | |
509 | __func__, xfer_sz); | |
5bbed92d | 510 | return -EPROTO; |
40d69043 | 511 | } |
40d69043 DT |
512 | return xfer_sz; |
513 | } | |
514 | ||
332ad43f | 515 | static int cfhsi_rx_desc_len(struct cfhsi_desc *desc) |
516 | { | |
517 | int xfer_sz = 0; | |
518 | int nfrms = 0; | |
519 | u16 *plen; | |
520 | ||
521 | if ((desc->header & ~CFHSI_PIGGY_DESC) || | |
522 | (desc->offset > CFHSI_MAX_EMB_FRM_SZ)) { | |
523 | ||
524 | pr_err("Invalid descriptor. %x %x\n", desc->header, | |
525 | desc->offset); | |
526 | return -EPROTO; | |
527 | } | |
528 | ||
529 | /* Calculate transfer length. */ | |
530 | plen = desc->cffrm_len; | |
531 | while (nfrms < CFHSI_MAX_PKTS && *plen) { | |
532 | xfer_sz += *plen; | |
533 | plen++; | |
534 | nfrms++; | |
535 | } | |
536 | ||
537 | if (xfer_sz % 4) { | |
538 | pr_err("Invalid payload len: %d, ignored.\n", xfer_sz); | |
539 | return -EPROTO; | |
540 | } | |
541 | return xfer_sz; | |
542 | } | |
543 | ||
5bbed92d | 544 | static int cfhsi_rx_pld(struct cfhsi_desc *desc, struct cfhsi *cfhsi) |
40d69043 DT |
545 | { |
546 | int rx_sz = 0; | |
547 | int nfrms = 0; | |
548 | u16 *plen = NULL; | |
549 | u8 *pfrm = NULL; | |
550 | ||
551 | /* Sanity check header and offset. */ | |
552 | if (WARN_ON((desc->header & ~CFHSI_PIGGY_DESC) || | |
553 | (desc->offset > CFHSI_MAX_EMB_FRM_SZ))) { | |
554 | dev_err(&cfhsi->ndev->dev, "%s: Invalid descriptor.\n", | |
555 | __func__); | |
5bbed92d | 556 | return -EPROTO; |
40d69043 DT |
557 | } |
558 | ||
559 | /* Set frame pointer to start of payload. */ | |
560 | pfrm = desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ; | |
561 | plen = desc->cffrm_len; | |
687b13e9 DM |
562 | |
563 | /* Skip already processed frames. */ | |
564 | while (nfrms < cfhsi->rx_state.nfrms) { | |
565 | pfrm += *plen; | |
566 | rx_sz += *plen; | |
567 | plen++; | |
568 | nfrms++; | |
569 | } | |
570 | ||
571 | /* Parse payload. */ | |
40d69043 DT |
572 | while (nfrms < CFHSI_MAX_PKTS && *plen) { |
573 | struct sk_buff *skb; | |
574 | u8 *dst = NULL; | |
575 | u8 *pcffrm = NULL; | |
687b13e9 | 576 | int len = 0; |
40d69043 | 577 | |
40d69043 DT |
578 | /* CAIF frame starts after head padding. */ |
579 | pcffrm = pfrm + *pfrm + 1; | |
580 | ||
581 | /* Read length of CAIF frame (little endian). */ | |
582 | len = *pcffrm; | |
583 | len |= ((*(pcffrm + 1)) << 8) & 0xFF00; | |
584 | len += 2; /* Add FCS fields. */ | |
585 | ||
5bbed92d DM |
586 | /* Sanity check length of CAIF frames. */ |
587 | if (unlikely(len > CFHSI_MAX_CAIF_FRAME_SZ)) { | |
588 | dev_err(&cfhsi->ndev->dev, "%s: Invalid length.\n", | |
589 | __func__); | |
590 | return -EPROTO; | |
591 | } | |
592 | ||
40d69043 | 593 | /* Allocate SKB (OK even in IRQ context). */ |
687b13e9 DM |
594 | skb = alloc_skb(len + 1, GFP_ATOMIC); |
595 | if (!skb) { | |
596 | dev_err(&cfhsi->ndev->dev, "%s: Out of memory !\n", | |
597 | __func__); | |
598 | cfhsi->rx_state.nfrms = nfrms; | |
599 | return -ENOMEM; | |
40d69043 DT |
600 | } |
601 | caif_assert(skb != NULL); | |
602 | ||
603 | dst = skb_put(skb, len); | |
604 | memcpy(dst, pcffrm, len); | |
605 | ||
606 | skb->protocol = htons(ETH_P_CAIF); | |
607 | skb_reset_mac_header(skb); | |
608 | skb->dev = cfhsi->ndev; | |
609 | ||
610 | /* | |
611 | * We're called from a platform device, | |
612 | * and don't know the context we're running in. | |
613 | */ | |
614 | if (in_interrupt()) | |
615 | netif_rx(skb); | |
616 | else | |
617 | netif_rx_ni(skb); | |
618 | ||
619 | /* Update network statistics. */ | |
620 | cfhsi->ndev->stats.rx_packets++; | |
621 | cfhsi->ndev->stats.rx_bytes += len; | |
622 | ||
40d69043 DT |
623 | pfrm += *plen; |
624 | rx_sz += *plen; | |
625 | plen++; | |
626 | nfrms++; | |
627 | } | |
628 | ||
629 | return rx_sz; | |
630 | } | |
631 | ||
687b13e9 | 632 | static void cfhsi_rx_done(struct cfhsi *cfhsi) |
40d69043 DT |
633 | { |
634 | int res; | |
332ad43f | 635 | int desc_pld_len = 0, rx_len, rx_state; |
40d69043 | 636 | struct cfhsi_desc *desc = NULL; |
332ad43f | 637 | u8 *rx_ptr, *rx_buf; |
638 | struct cfhsi_desc *piggy_desc = NULL; | |
40d69043 | 639 | |
40d69043 DT |
640 | desc = (struct cfhsi_desc *)cfhsi->rx_buf; |
641 | ||
687b13e9 | 642 | dev_dbg(&cfhsi->ndev->dev, "%s\n", __func__); |
40d69043 DT |
643 | |
644 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
645 | return; | |
646 | ||
647 | /* Update inactivity timer if pending. */ | |
73033c98 | 648 | spin_lock_bh(&cfhsi->lock); |
ece367d5 | 649 | mod_timer_pending(&cfhsi->inactivity_timer, |
28bd2049 | 650 | jiffies + cfhsi->inactivity_timeout); |
73033c98 | 651 | spin_unlock_bh(&cfhsi->lock); |
40d69043 | 652 | |
687b13e9 | 653 | if (cfhsi->rx_state.state == CFHSI_RX_STATE_DESC) { |
332ad43f | 654 | desc_pld_len = cfhsi_rx_desc_len(desc); |
655 | ||
656 | if (desc_pld_len < 0) | |
5bbed92d | 657 | goto out_of_sync; |
332ad43f | 658 | |
659 | rx_buf = cfhsi->rx_buf; | |
660 | rx_len = desc_pld_len; | |
661 | if (desc_pld_len > 0 && (desc->header & CFHSI_PIGGY_DESC)) | |
662 | rx_len += CFHSI_DESC_SZ; | |
663 | if (desc_pld_len == 0) | |
664 | rx_buf = cfhsi->rx_flip_buf; | |
40d69043 | 665 | } else { |
332ad43f | 666 | rx_buf = cfhsi->rx_flip_buf; |
40d69043 | 667 | |
332ad43f | 668 | rx_len = CFHSI_DESC_SZ; |
669 | if (cfhsi->rx_state.pld_len > 0 && | |
670 | (desc->header & CFHSI_PIGGY_DESC)) { | |
40d69043 | 671 | |
40d69043 DT |
672 | piggy_desc = (struct cfhsi_desc *) |
673 | (desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ + | |
332ad43f | 674 | cfhsi->rx_state.pld_len); |
675 | ||
687b13e9 | 676 | cfhsi->rx_state.piggy_desc = true; |
40d69043 | 677 | |
332ad43f | 678 | /* Extract payload len from piggy-backed descriptor. */ |
679 | desc_pld_len = cfhsi_rx_desc_len(piggy_desc); | |
680 | if (desc_pld_len < 0) | |
681 | goto out_of_sync; | |
682 | ||
683 | if (desc_pld_len > 0) | |
684 | rx_len = desc_pld_len; | |
685 | ||
686 | if (desc_pld_len > 0 && | |
687 | (piggy_desc->header & CFHSI_PIGGY_DESC)) | |
688 | rx_len += CFHSI_DESC_SZ; | |
40d69043 DT |
689 | |
690 | /* | |
691 | * Copy needed information from the piggy-backed | |
692 | * descriptor to the descriptor in the start. | |
693 | */ | |
332ad43f | 694 | memcpy(rx_buf, (u8 *)piggy_desc, |
40d69043 | 695 | CFHSI_DESC_SHORT_SZ); |
332ad43f | 696 | /* Mark no embedded frame here */ |
697 | piggy_desc->offset = 0; | |
5bbed92d DM |
698 | if (desc_pld_len == -EPROTO) |
699 | goto out_of_sync; | |
700 | } | |
687b13e9 DM |
701 | } |
702 | ||
40d69043 | 703 | if (desc_pld_len) { |
332ad43f | 704 | rx_state = CFHSI_RX_STATE_PAYLOAD; |
705 | rx_ptr = rx_buf + CFHSI_DESC_SZ; | |
40d69043 | 706 | } else { |
332ad43f | 707 | rx_state = CFHSI_RX_STATE_DESC; |
708 | rx_ptr = rx_buf; | |
709 | rx_len = CFHSI_DESC_SZ; | |
40d69043 | 710 | } |
40d69043 | 711 | |
332ad43f | 712 | /* Initiate next read */ |
40d69043 DT |
713 | if (test_bit(CFHSI_AWAKE, &cfhsi->bits)) { |
714 | /* Set up new transfer. */ | |
715 | dev_dbg(&cfhsi->ndev->dev, "%s: Start RX.\n", | |
332ad43f | 716 | __func__); |
717 | ||
718 | res = cfhsi->dev->cfhsi_rx(rx_ptr, rx_len, | |
40d69043 DT |
719 | cfhsi->dev); |
720 | if (WARN_ON(res < 0)) { | |
721 | dev_err(&cfhsi->ndev->dev, "%s: RX error %d.\n", | |
722 | __func__, res); | |
723 | cfhsi->ndev->stats.rx_errors++; | |
724 | cfhsi->ndev->stats.rx_dropped++; | |
725 | } | |
726 | } | |
687b13e9 | 727 | |
332ad43f | 728 | if (cfhsi->rx_state.state == CFHSI_RX_STATE_DESC) { |
729 | /* Extract payload from descriptor */ | |
730 | if (cfhsi_rx_desc(desc, cfhsi) < 0) | |
731 | goto out_of_sync; | |
732 | } else { | |
733 | /* Extract payload */ | |
734 | if (cfhsi_rx_pld(desc, cfhsi) < 0) | |
735 | goto out_of_sync; | |
736 | if (piggy_desc) { | |
737 | /* Extract any payload in piggyback descriptor. */ | |
738 | if (cfhsi_rx_desc(piggy_desc, cfhsi) < 0) | |
739 | goto out_of_sync; | |
740 | } | |
687b13e9 | 741 | } |
332ad43f | 742 | |
743 | /* Update state info */ | |
744 | memset(&cfhsi->rx_state, 0, sizeof(cfhsi->rx_state)); | |
745 | cfhsi->rx_state.state = rx_state; | |
746 | cfhsi->rx_ptr = rx_ptr; | |
747 | cfhsi->rx_len = rx_len; | |
748 | cfhsi->rx_state.pld_len = desc_pld_len; | |
749 | cfhsi->rx_state.piggy_desc = desc->header & CFHSI_PIGGY_DESC; | |
750 | ||
751 | if (rx_buf != cfhsi->rx_buf) | |
752 | swap(cfhsi->rx_buf, cfhsi->rx_flip_buf); | |
5bbed92d DM |
753 | return; |
754 | ||
755 | out_of_sync: | |
756 | dev_err(&cfhsi->ndev->dev, "%s: Out of sync.\n", __func__); | |
757 | print_hex_dump_bytes("--> ", DUMP_PREFIX_NONE, | |
758 | cfhsi->rx_buf, CFHSI_DESC_SZ); | |
759 | schedule_work(&cfhsi->out_of_sync_work); | |
687b13e9 DM |
760 | } |
761 | ||
762 | static void cfhsi_rx_slowpath(unsigned long arg) | |
763 | { | |
764 | struct cfhsi *cfhsi = (struct cfhsi *)arg; | |
765 | ||
766 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", | |
767 | __func__); | |
768 | ||
769 | cfhsi_rx_done(cfhsi); | |
40d69043 DT |
770 | } |
771 | ||
772 | static void cfhsi_rx_done_cb(struct cfhsi_drv *drv) | |
773 | { | |
774 | struct cfhsi *cfhsi; | |
775 | ||
776 | cfhsi = container_of(drv, struct cfhsi, drv); | |
777 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", | |
778 | __func__); | |
779 | ||
780 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
781 | return; | |
782 | ||
40d69043 DT |
783 | if (test_and_clear_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits)) |
784 | wake_up_interruptible(&cfhsi->flush_fifo_wait); | |
785 | else | |
687b13e9 | 786 | cfhsi_rx_done(cfhsi); |
40d69043 DT |
787 | } |
788 | ||
789 | static void cfhsi_wake_up(struct work_struct *work) | |
790 | { | |
791 | struct cfhsi *cfhsi = NULL; | |
792 | int res; | |
793 | int len; | |
794 | long ret; | |
795 | ||
796 | cfhsi = container_of(work, struct cfhsi, wake_up_work); | |
797 | ||
798 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
799 | return; | |
800 | ||
801 | if (unlikely(test_bit(CFHSI_AWAKE, &cfhsi->bits))) { | |
802 | /* It happenes when wakeup is requested by | |
803 | * both ends at the same time. */ | |
804 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); | |
5ea2ef5f | 805 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); |
40d69043 DT |
806 | return; |
807 | } | |
808 | ||
809 | /* Activate wake line. */ | |
810 | cfhsi->dev->cfhsi_wake_up(cfhsi->dev); | |
811 | ||
812 | dev_dbg(&cfhsi->ndev->dev, "%s: Start waiting.\n", | |
813 | __func__); | |
814 | ||
815 | /* Wait for acknowledge. */ | |
687b13e9 DM |
816 | ret = CFHSI_WAKE_TOUT; |
817 | ret = wait_event_interruptible_timeout(cfhsi->wake_up_wait, | |
818 | test_and_clear_bit(CFHSI_WAKE_UP_ACK, | |
40d69043 DT |
819 | &cfhsi->bits), ret); |
820 | if (unlikely(ret < 0)) { | |
821 | /* Interrupted by signal. */ | |
5ea2ef5f | 822 | dev_err(&cfhsi->ndev->dev, "%s: Signalled: %ld.\n", |
40d69043 | 823 | __func__, ret); |
5ea2ef5f | 824 | |
40d69043 DT |
825 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); |
826 | cfhsi->dev->cfhsi_wake_down(cfhsi->dev); | |
827 | return; | |
828 | } else if (!ret) { | |
5ea2ef5f DM |
829 | bool ca_wake = false; |
830 | size_t fifo_occupancy = 0; | |
831 | ||
40d69043 | 832 | /* Wakeup timeout */ |
d62f8dbb | 833 | dev_dbg(&cfhsi->ndev->dev, "%s: Timeout.\n", |
40d69043 | 834 | __func__); |
5ea2ef5f DM |
835 | |
836 | /* Check FIFO to check if modem has sent something. */ | |
837 | WARN_ON(cfhsi->dev->cfhsi_fifo_occupancy(cfhsi->dev, | |
838 | &fifo_occupancy)); | |
839 | ||
d62f8dbb | 840 | dev_dbg(&cfhsi->ndev->dev, "%s: Bytes in FIFO: %u.\n", |
5ea2ef5f DM |
841 | __func__, (unsigned) fifo_occupancy); |
842 | ||
843 | /* Check if we misssed the interrupt. */ | |
844 | WARN_ON(cfhsi->dev->cfhsi_get_peer_wake(cfhsi->dev, | |
845 | &ca_wake)); | |
846 | ||
847 | if (ca_wake) { | |
848 | dev_err(&cfhsi->ndev->dev, "%s: CA Wake missed !.\n", | |
849 | __func__); | |
850 | ||
851 | /* Clear the CFHSI_WAKE_UP_ACK bit to prevent race. */ | |
852 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); | |
853 | ||
854 | /* Continue execution. */ | |
855 | goto wake_ack; | |
856 | } | |
857 | ||
40d69043 DT |
858 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); |
859 | cfhsi->dev->cfhsi_wake_down(cfhsi->dev); | |
860 | return; | |
861 | } | |
5ea2ef5f | 862 | wake_ack: |
40d69043 DT |
863 | dev_dbg(&cfhsi->ndev->dev, "%s: Woken.\n", |
864 | __func__); | |
865 | ||
866 | /* Clear power up bit. */ | |
867 | set_bit(CFHSI_AWAKE, &cfhsi->bits); | |
868 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); | |
869 | ||
870 | /* Resume read operation. */ | |
687b13e9 DM |
871 | dev_dbg(&cfhsi->ndev->dev, "%s: Start RX.\n", __func__); |
872 | res = cfhsi->dev->cfhsi_rx(cfhsi->rx_ptr, cfhsi->rx_len, cfhsi->dev); | |
873 | ||
874 | if (WARN_ON(res < 0)) | |
875 | dev_err(&cfhsi->ndev->dev, "%s: RX err %d.\n", __func__, res); | |
40d69043 DT |
876 | |
877 | /* Clear power up acknowledment. */ | |
878 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); | |
879 | ||
880 | spin_lock_bh(&cfhsi->lock); | |
881 | ||
ece367d5 DT |
882 | /* Resume transmit if queues are not empty. */ |
883 | if (!cfhsi_tx_queue_len(cfhsi)) { | |
40d69043 DT |
884 | dev_dbg(&cfhsi->ndev->dev, "%s: Peer wake, start timer.\n", |
885 | __func__); | |
886 | /* Start inactivity timer. */ | |
ece367d5 | 887 | mod_timer(&cfhsi->inactivity_timer, |
28bd2049 | 888 | jiffies + cfhsi->inactivity_timeout); |
40d69043 DT |
889 | spin_unlock_bh(&cfhsi->lock); |
890 | return; | |
891 | } | |
892 | ||
893 | dev_dbg(&cfhsi->ndev->dev, "%s: Host wake.\n", | |
894 | __func__); | |
895 | ||
896 | spin_unlock_bh(&cfhsi->lock); | |
897 | ||
898 | /* Create HSI frame. */ | |
899 | len = cfhsi_tx_frm((struct cfhsi_desc *)cfhsi->tx_buf, cfhsi); | |
900 | ||
901 | if (likely(len > 0)) { | |
902 | /* Set up new transfer. */ | |
903 | res = cfhsi->dev->cfhsi_tx(cfhsi->tx_buf, len, cfhsi->dev); | |
904 | if (WARN_ON(res < 0)) { | |
905 | dev_err(&cfhsi->ndev->dev, "%s: TX error %d.\n", | |
906 | __func__, res); | |
907 | cfhsi_abort_tx(cfhsi); | |
908 | } | |
909 | } else { | |
910 | dev_err(&cfhsi->ndev->dev, | |
911 | "%s: Failed to create HSI frame: %d.\n", | |
912 | __func__, len); | |
913 | } | |
40d69043 DT |
914 | } |
915 | ||
916 | static void cfhsi_wake_down(struct work_struct *work) | |
917 | { | |
918 | long ret; | |
919 | struct cfhsi *cfhsi = NULL; | |
687b13e9 DM |
920 | size_t fifo_occupancy = 0; |
921 | int retry = CFHSI_WAKE_TOUT; | |
40d69043 DT |
922 | |
923 | cfhsi = container_of(work, struct cfhsi, wake_down_work); | |
687b13e9 | 924 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", __func__); |
40d69043 DT |
925 | |
926 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
927 | return; | |
928 | ||
40d69043 DT |
929 | /* Deactivate wake line. */ |
930 | cfhsi->dev->cfhsi_wake_down(cfhsi->dev); | |
931 | ||
932 | /* Wait for acknowledge. */ | |
687b13e9 | 933 | ret = CFHSI_WAKE_TOUT; |
40d69043 | 934 | ret = wait_event_interruptible_timeout(cfhsi->wake_down_wait, |
687b13e9 DM |
935 | test_and_clear_bit(CFHSI_WAKE_DOWN_ACK, |
936 | &cfhsi->bits), ret); | |
40d69043 DT |
937 | if (ret < 0) { |
938 | /* Interrupted by signal. */ | |
5ea2ef5f | 939 | dev_err(&cfhsi->ndev->dev, "%s: Signalled: %ld.\n", |
40d69043 DT |
940 | __func__, ret); |
941 | return; | |
942 | } else if (!ret) { | |
5ea2ef5f DM |
943 | bool ca_wake = true; |
944 | ||
40d69043 | 945 | /* Timeout */ |
687b13e9 | 946 | dev_err(&cfhsi->ndev->dev, "%s: Timeout.\n", __func__); |
5ea2ef5f DM |
947 | |
948 | /* Check if we misssed the interrupt. */ | |
949 | WARN_ON(cfhsi->dev->cfhsi_get_peer_wake(cfhsi->dev, | |
950 | &ca_wake)); | |
951 | if (!ca_wake) | |
952 | dev_err(&cfhsi->ndev->dev, "%s: CA Wake missed !.\n", | |
953 | __func__); | |
40d69043 DT |
954 | } |
955 | ||
687b13e9 DM |
956 | /* Check FIFO occupancy. */ |
957 | while (retry) { | |
958 | WARN_ON(cfhsi->dev->cfhsi_fifo_occupancy(cfhsi->dev, | |
959 | &fifo_occupancy)); | |
960 | ||
961 | if (!fifo_occupancy) | |
962 | break; | |
963 | ||
964 | set_current_state(TASK_INTERRUPTIBLE); | |
965 | schedule_timeout(1); | |
966 | retry--; | |
967 | } | |
968 | ||
969 | if (!retry) | |
970 | dev_err(&cfhsi->ndev->dev, "%s: FIFO Timeout.\n", __func__); | |
971 | ||
972 | /* Clear AWAKE condition. */ | |
40d69043 DT |
973 | clear_bit(CFHSI_AWAKE, &cfhsi->bits); |
974 | ||
687b13e9 DM |
975 | /* Cancel pending RX requests. */ |
976 | cfhsi->dev->cfhsi_rx_cancel(cfhsi->dev); | |
40d69043 | 977 | |
40d69043 DT |
978 | } |
979 | ||
5bbed92d DM |
980 | static void cfhsi_out_of_sync(struct work_struct *work) |
981 | { | |
982 | struct cfhsi *cfhsi = NULL; | |
983 | ||
984 | cfhsi = container_of(work, struct cfhsi, out_of_sync_work); | |
985 | ||
986 | rtnl_lock(); | |
987 | dev_close(cfhsi->ndev); | |
988 | rtnl_unlock(); | |
989 | } | |
990 | ||
40d69043 DT |
991 | static void cfhsi_wake_up_cb(struct cfhsi_drv *drv) |
992 | { | |
993 | struct cfhsi *cfhsi = NULL; | |
994 | ||
995 | cfhsi = container_of(drv, struct cfhsi, drv); | |
996 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", | |
997 | __func__); | |
998 | ||
999 | set_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); | |
1000 | wake_up_interruptible(&cfhsi->wake_up_wait); | |
1001 | ||
1002 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
1003 | return; | |
1004 | ||
1005 | /* Schedule wake up work queue if the peer initiates. */ | |
1006 | if (!test_and_set_bit(CFHSI_WAKE_UP, &cfhsi->bits)) | |
1007 | queue_work(cfhsi->wq, &cfhsi->wake_up_work); | |
1008 | } | |
1009 | ||
1010 | static void cfhsi_wake_down_cb(struct cfhsi_drv *drv) | |
1011 | { | |
1012 | struct cfhsi *cfhsi = NULL; | |
1013 | ||
1014 | cfhsi = container_of(drv, struct cfhsi, drv); | |
1015 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", | |
1016 | __func__); | |
1017 | ||
1018 | /* Initiating low power is only permitted by the host (us). */ | |
1019 | set_bit(CFHSI_WAKE_DOWN_ACK, &cfhsi->bits); | |
1020 | wake_up_interruptible(&cfhsi->wake_down_wait); | |
1021 | } | |
1022 | ||
ece367d5 DT |
1023 | static void cfhsi_aggregation_tout(unsigned long arg) |
1024 | { | |
1025 | struct cfhsi *cfhsi = (struct cfhsi *)arg; | |
1026 | ||
1027 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", | |
1028 | __func__); | |
1029 | ||
1030 | cfhsi_start_tx(cfhsi); | |
1031 | } | |
1032 | ||
40d69043 DT |
1033 | static int cfhsi_xmit(struct sk_buff *skb, struct net_device *dev) |
1034 | { | |
1035 | struct cfhsi *cfhsi = NULL; | |
1036 | int start_xfer = 0; | |
1037 | int timer_active; | |
ece367d5 | 1038 | int prio; |
40d69043 DT |
1039 | |
1040 | if (!dev) | |
1041 | return -EINVAL; | |
1042 | ||
1043 | cfhsi = netdev_priv(dev); | |
1044 | ||
ece367d5 DT |
1045 | switch (skb->priority) { |
1046 | case TC_PRIO_BESTEFFORT: | |
1047 | case TC_PRIO_FILLER: | |
1048 | case TC_PRIO_BULK: | |
1049 | prio = CFHSI_PRIO_BEBK; | |
1050 | break; | |
1051 | case TC_PRIO_INTERACTIVE_BULK: | |
1052 | prio = CFHSI_PRIO_VI; | |
1053 | break; | |
1054 | case TC_PRIO_INTERACTIVE: | |
1055 | prio = CFHSI_PRIO_VO; | |
1056 | break; | |
1057 | case TC_PRIO_CONTROL: | |
1058 | default: | |
1059 | prio = CFHSI_PRIO_CTL; | |
1060 | break; | |
1061 | } | |
1062 | ||
40d69043 DT |
1063 | spin_lock_bh(&cfhsi->lock); |
1064 | ||
ece367d5 DT |
1065 | /* Update aggregation statistics */ |
1066 | cfhsi_update_aggregation_stats(cfhsi, skb, 1); | |
1067 | ||
1068 | /* Queue the SKB */ | |
1069 | skb_queue_tail(&cfhsi->qhead[prio], skb); | |
40d69043 DT |
1070 | |
1071 | /* Sanity check; xmit should not be called after unregister_netdev */ | |
1072 | if (WARN_ON(test_bit(CFHSI_SHUTDOWN, &cfhsi->bits))) { | |
1073 | spin_unlock_bh(&cfhsi->lock); | |
1074 | cfhsi_abort_tx(cfhsi); | |
1075 | return -EINVAL; | |
1076 | } | |
1077 | ||
1078 | /* Send flow off if number of packets is above high water mark. */ | |
1079 | if (!cfhsi->flow_off_sent && | |
ece367d5 | 1080 | cfhsi_tx_queue_len(cfhsi) > cfhsi->q_high_mark && |
40d69043 DT |
1081 | cfhsi->cfdev.flowctrl) { |
1082 | cfhsi->flow_off_sent = 1; | |
1083 | cfhsi->cfdev.flowctrl(cfhsi->ndev, OFF); | |
1084 | } | |
1085 | ||
1086 | if (cfhsi->tx_state == CFHSI_TX_STATE_IDLE) { | |
1087 | cfhsi->tx_state = CFHSI_TX_STATE_XFER; | |
1088 | start_xfer = 1; | |
1089 | } | |
1090 | ||
73033c98 | 1091 | if (!start_xfer) { |
ece367d5 DT |
1092 | /* Send aggregate if it is possible */ |
1093 | bool aggregate_ready = | |
1094 | cfhsi_can_send_aggregate(cfhsi) && | |
1095 | del_timer(&cfhsi->aggregation_timer) > 0; | |
73033c98 | 1096 | spin_unlock_bh(&cfhsi->lock); |
ece367d5 DT |
1097 | if (aggregate_ready) |
1098 | cfhsi_start_tx(cfhsi); | |
40d69043 | 1099 | return 0; |
73033c98 | 1100 | } |
40d69043 DT |
1101 | |
1102 | /* Delete inactivity timer if started. */ | |
ece367d5 | 1103 | timer_active = del_timer_sync(&cfhsi->inactivity_timer); |
40d69043 | 1104 | |
73033c98 DT |
1105 | spin_unlock_bh(&cfhsi->lock); |
1106 | ||
40d69043 DT |
1107 | if (timer_active) { |
1108 | struct cfhsi_desc *desc = (struct cfhsi_desc *)cfhsi->tx_buf; | |
1109 | int len; | |
1110 | int res; | |
1111 | ||
1112 | /* Create HSI frame. */ | |
1113 | len = cfhsi_tx_frm(desc, cfhsi); | |
f84ea779 | 1114 | WARN_ON(!len); |
40d69043 DT |
1115 | |
1116 | /* Set up new transfer. */ | |
1117 | res = cfhsi->dev->cfhsi_tx(cfhsi->tx_buf, len, cfhsi->dev); | |
1118 | if (WARN_ON(res < 0)) { | |
1119 | dev_err(&cfhsi->ndev->dev, "%s: TX error %d.\n", | |
1120 | __func__, res); | |
1121 | cfhsi_abort_tx(cfhsi); | |
1122 | } | |
1123 | } else { | |
1124 | /* Schedule wake up work queue if the we initiate. */ | |
1125 | if (!test_and_set_bit(CFHSI_WAKE_UP, &cfhsi->bits)) | |
1126 | queue_work(cfhsi->wq, &cfhsi->wake_up_work); | |
1127 | } | |
1128 | ||
1129 | return 0; | |
1130 | } | |
1131 | ||
39abbaef | 1132 | static const struct net_device_ops cfhsi_ops; |
40d69043 DT |
1133 | |
1134 | static void cfhsi_setup(struct net_device *dev) | |
1135 | { | |
ece367d5 | 1136 | int i; |
40d69043 DT |
1137 | struct cfhsi *cfhsi = netdev_priv(dev); |
1138 | dev->features = 0; | |
1139 | dev->netdev_ops = &cfhsi_ops; | |
1140 | dev->type = ARPHRD_CAIF; | |
1141 | dev->flags = IFF_POINTOPOINT | IFF_NOARP; | |
34efc283 | 1142 | dev->mtu = CFHSI_MAX_CAIF_FRAME_SZ; |
40d69043 DT |
1143 | dev->tx_queue_len = 0; |
1144 | dev->destructor = free_netdev; | |
ece367d5 DT |
1145 | for (i = 0; i < CFHSI_PRIO_LAST; ++i) |
1146 | skb_queue_head_init(&cfhsi->qhead[i]); | |
40d69043 DT |
1147 | cfhsi->cfdev.link_select = CAIF_LINK_HIGH_BANDW; |
1148 | cfhsi->cfdev.use_frag = false; | |
1149 | cfhsi->cfdev.use_stx = false; | |
1150 | cfhsi->cfdev.use_fcs = false; | |
1151 | cfhsi->ndev = dev; | |
1152 | } | |
1153 | ||
1154 | int cfhsi_probe(struct platform_device *pdev) | |
1155 | { | |
1156 | struct cfhsi *cfhsi = NULL; | |
1157 | struct net_device *ndev; | |
39abbaef | 1158 | |
40d69043 DT |
1159 | int res; |
1160 | ||
1161 | ndev = alloc_netdev(sizeof(struct cfhsi), "cfhsi%d", cfhsi_setup); | |
7ac2ed0c | 1162 | if (!ndev) |
40d69043 | 1163 | return -ENODEV; |
40d69043 DT |
1164 | |
1165 | cfhsi = netdev_priv(ndev); | |
1166 | cfhsi->ndev = ndev; | |
1167 | cfhsi->pdev = pdev; | |
1168 | ||
39abbaef | 1169 | /* Assign the HSI device. */ |
1170 | cfhsi->dev = pdev->dev.platform_data; | |
1171 | ||
1172 | /* Assign the driver to this HSI device. */ | |
1173 | cfhsi->dev->drv = &cfhsi->drv; | |
1174 | ||
1175 | /* Register network device. */ | |
1176 | res = register_netdev(ndev); | |
1177 | if (res) { | |
1178 | dev_err(&ndev->dev, "%s: Registration error: %d.\n", | |
1179 | __func__, res); | |
1180 | free_netdev(ndev); | |
1181 | } | |
1182 | /* Add CAIF HSI device to list. */ | |
1183 | spin_lock(&cfhsi_list_lock); | |
1184 | list_add_tail(&cfhsi->list, &cfhsi_list); | |
1185 | spin_unlock(&cfhsi_list_lock); | |
1186 | ||
1187 | return res; | |
1188 | } | |
1189 | ||
1190 | static int cfhsi_open(struct net_device *ndev) | |
1191 | { | |
1192 | struct cfhsi *cfhsi = netdev_priv(ndev); | |
1193 | int res; | |
1194 | ||
1195 | clear_bit(CFHSI_SHUTDOWN, &cfhsi->bits); | |
1196 | ||
40d69043 DT |
1197 | /* Initialize state vaiables. */ |
1198 | cfhsi->tx_state = CFHSI_TX_STATE_IDLE; | |
687b13e9 | 1199 | cfhsi->rx_state.state = CFHSI_RX_STATE_DESC; |
40d69043 DT |
1200 | |
1201 | /* Set flow info */ | |
1202 | cfhsi->flow_off_sent = 0; | |
1203 | cfhsi->q_low_mark = LOW_WATER_MARK; | |
1204 | cfhsi->q_high_mark = HIGH_WATER_MARK; | |
1205 | ||
40d69043 DT |
1206 | |
1207 | /* | |
1208 | * Allocate a TX buffer with the size of a HSI packet descriptors | |
1209 | * and the necessary room for CAIF payload frames. | |
1210 | */ | |
1211 | cfhsi->tx_buf = kzalloc(CFHSI_BUF_SZ_TX, GFP_KERNEL); | |
1212 | if (!cfhsi->tx_buf) { | |
40d69043 DT |
1213 | res = -ENODEV; |
1214 | goto err_alloc_tx; | |
1215 | } | |
1216 | ||
1217 | /* | |
1218 | * Allocate a RX buffer with the size of two HSI packet descriptors and | |
1219 | * the necessary room for CAIF payload frames. | |
1220 | */ | |
1221 | cfhsi->rx_buf = kzalloc(CFHSI_BUF_SZ_RX, GFP_KERNEL); | |
1222 | if (!cfhsi->rx_buf) { | |
40d69043 DT |
1223 | res = -ENODEV; |
1224 | goto err_alloc_rx; | |
1225 | } | |
1226 | ||
332ad43f | 1227 | cfhsi->rx_flip_buf = kzalloc(CFHSI_BUF_SZ_RX, GFP_KERNEL); |
1228 | if (!cfhsi->rx_flip_buf) { | |
1229 | res = -ENODEV; | |
1230 | goto err_alloc_rx_flip; | |
1231 | } | |
1232 | ||
28bd2049 DT |
1233 | /* Pre-calculate inactivity timeout. */ |
1234 | if (inactivity_timeout != -1) { | |
1235 | cfhsi->inactivity_timeout = | |
1236 | inactivity_timeout * HZ / 1000; | |
1237 | if (!cfhsi->inactivity_timeout) | |
1238 | cfhsi->inactivity_timeout = 1; | |
1239 | else if (cfhsi->inactivity_timeout > NEXT_TIMER_MAX_DELTA) | |
1240 | cfhsi->inactivity_timeout = NEXT_TIMER_MAX_DELTA; | |
1241 | } else { | |
1242 | cfhsi->inactivity_timeout = NEXT_TIMER_MAX_DELTA; | |
1243 | } | |
1244 | ||
ece367d5 DT |
1245 | /* Initialize aggregation timeout */ |
1246 | cfhsi->aggregation_timeout = aggregation_timeout; | |
1247 | ||
28bd2049 | 1248 | /* Initialize recieve vaiables. */ |
40d69043 DT |
1249 | cfhsi->rx_ptr = cfhsi->rx_buf; |
1250 | cfhsi->rx_len = CFHSI_DESC_SZ; | |
1251 | ||
1252 | /* Initialize spin locks. */ | |
1253 | spin_lock_init(&cfhsi->lock); | |
1254 | ||
1255 | /* Set up the driver. */ | |
1256 | cfhsi->drv.tx_done_cb = cfhsi_tx_done_cb; | |
1257 | cfhsi->drv.rx_done_cb = cfhsi_rx_done_cb; | |
94230feb | 1258 | cfhsi->drv.wake_up_cb = cfhsi_wake_up_cb; |
1259 | cfhsi->drv.wake_down_cb = cfhsi_wake_down_cb; | |
40d69043 DT |
1260 | |
1261 | /* Initialize the work queues. */ | |
1262 | INIT_WORK(&cfhsi->wake_up_work, cfhsi_wake_up); | |
1263 | INIT_WORK(&cfhsi->wake_down_work, cfhsi_wake_down); | |
5bbed92d | 1264 | INIT_WORK(&cfhsi->out_of_sync_work, cfhsi_out_of_sync); |
40d69043 DT |
1265 | |
1266 | /* Clear all bit fields. */ | |
1267 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); | |
1268 | clear_bit(CFHSI_WAKE_DOWN_ACK, &cfhsi->bits); | |
1269 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); | |
1270 | clear_bit(CFHSI_AWAKE, &cfhsi->bits); | |
40d69043 DT |
1271 | |
1272 | /* Create work thread. */ | |
39abbaef | 1273 | cfhsi->wq = create_singlethread_workqueue(cfhsi->pdev->name); |
40d69043 | 1274 | if (!cfhsi->wq) { |
39abbaef | 1275 | dev_err(&cfhsi->ndev->dev, "%s: Failed to create work queue.\n", |
40d69043 DT |
1276 | __func__); |
1277 | res = -ENODEV; | |
1278 | goto err_create_wq; | |
1279 | } | |
1280 | ||
1281 | /* Initialize wait queues. */ | |
1282 | init_waitqueue_head(&cfhsi->wake_up_wait); | |
1283 | init_waitqueue_head(&cfhsi->wake_down_wait); | |
1284 | init_waitqueue_head(&cfhsi->flush_fifo_wait); | |
1285 | ||
1286 | /* Setup the inactivity timer. */ | |
ece367d5 DT |
1287 | init_timer(&cfhsi->inactivity_timer); |
1288 | cfhsi->inactivity_timer.data = (unsigned long)cfhsi; | |
1289 | cfhsi->inactivity_timer.function = cfhsi_inactivity_tout; | |
687b13e9 DM |
1290 | /* Setup the slowpath RX timer. */ |
1291 | init_timer(&cfhsi->rx_slowpath_timer); | |
1292 | cfhsi->rx_slowpath_timer.data = (unsigned long)cfhsi; | |
1293 | cfhsi->rx_slowpath_timer.function = cfhsi_rx_slowpath; | |
ece367d5 DT |
1294 | /* Setup the aggregation timer. */ |
1295 | init_timer(&cfhsi->aggregation_timer); | |
1296 | cfhsi->aggregation_timer.data = (unsigned long)cfhsi; | |
1297 | cfhsi->aggregation_timer.function = cfhsi_aggregation_tout; | |
40d69043 | 1298 | |
40d69043 DT |
1299 | /* Activate HSI interface. */ |
1300 | res = cfhsi->dev->cfhsi_up(cfhsi->dev); | |
1301 | if (res) { | |
1302 | dev_err(&cfhsi->ndev->dev, | |
1303 | "%s: can't activate HSI interface: %d.\n", | |
1304 | __func__, res); | |
1305 | goto err_activate; | |
1306 | } | |
1307 | ||
1308 | /* Flush FIFO */ | |
1309 | res = cfhsi_flush_fifo(cfhsi); | |
1310 | if (res) { | |
39abbaef | 1311 | dev_err(&cfhsi->ndev->dev, "%s: Can't flush FIFO: %d.\n", |
40d69043 DT |
1312 | __func__, res); |
1313 | goto err_net_reg; | |
1314 | } | |
40d69043 DT |
1315 | return res; |
1316 | ||
1317 | err_net_reg: | |
1318 | cfhsi->dev->cfhsi_down(cfhsi->dev); | |
1319 | err_activate: | |
1320 | destroy_workqueue(cfhsi->wq); | |
1321 | err_create_wq: | |
332ad43f | 1322 | kfree(cfhsi->rx_flip_buf); |
1323 | err_alloc_rx_flip: | |
40d69043 DT |
1324 | kfree(cfhsi->rx_buf); |
1325 | err_alloc_rx: | |
1326 | kfree(cfhsi->tx_buf); | |
1327 | err_alloc_tx: | |
40d69043 DT |
1328 | return res; |
1329 | } | |
1330 | ||
39abbaef | 1331 | static int cfhsi_close(struct net_device *ndev) |
40d69043 | 1332 | { |
39abbaef | 1333 | struct cfhsi *cfhsi = netdev_priv(ndev); |
5f614e6b | 1334 | u8 *tx_buf, *rx_buf, *flip_buf; |
40d69043 | 1335 | |
40d69043 DT |
1336 | /* going to shutdown driver */ |
1337 | set_bit(CFHSI_SHUTDOWN, &cfhsi->bits); | |
1338 | ||
40d69043 DT |
1339 | /* Flush workqueue */ |
1340 | flush_workqueue(cfhsi->wq); | |
1341 | ||
687b13e9 | 1342 | /* Delete timers if pending */ |
ece367d5 | 1343 | del_timer_sync(&cfhsi->inactivity_timer); |
687b13e9 | 1344 | del_timer_sync(&cfhsi->rx_slowpath_timer); |
ece367d5 | 1345 | del_timer_sync(&cfhsi->aggregation_timer); |
40d69043 DT |
1346 | |
1347 | /* Cancel pending RX request (if any) */ | |
1348 | cfhsi->dev->cfhsi_rx_cancel(cfhsi->dev); | |
1349 | ||
ca63f8c7 | 1350 | /* Destroy workqueue */ |
40d69043 DT |
1351 | destroy_workqueue(cfhsi->wq); |
1352 | ||
1353 | /* Store bufferes: will be freed later. */ | |
1354 | tx_buf = cfhsi->tx_buf; | |
1355 | rx_buf = cfhsi->rx_buf; | |
5f614e6b | 1356 | flip_buf = cfhsi->rx_flip_buf; |
40d69043 DT |
1357 | /* Flush transmit queues. */ |
1358 | cfhsi_abort_tx(cfhsi); | |
1359 | ||
1360 | /* Deactivate interface */ | |
1361 | cfhsi->dev->cfhsi_down(cfhsi->dev); | |
1362 | ||
40d69043 DT |
1363 | /* Free buffers. */ |
1364 | kfree(tx_buf); | |
1365 | kfree(rx_buf); | |
5f614e6b | 1366 | kfree(flip_buf); |
39abbaef | 1367 | return 0; |
40d69043 DT |
1368 | } |
1369 | ||
39abbaef | 1370 | static const struct net_device_ops cfhsi_ops = { |
1371 | .ndo_open = cfhsi_open, | |
1372 | .ndo_stop = cfhsi_close, | |
1373 | .ndo_start_xmit = cfhsi_xmit | |
1374 | }; | |
1375 | ||
40d69043 DT |
1376 | int cfhsi_remove(struct platform_device *pdev) |
1377 | { | |
1378 | struct list_head *list_node; | |
1379 | struct list_head *n; | |
1380 | struct cfhsi *cfhsi = NULL; | |
1381 | struct cfhsi_dev *dev; | |
1382 | ||
1383 | dev = (struct cfhsi_dev *)pdev->dev.platform_data; | |
1384 | spin_lock(&cfhsi_list_lock); | |
1385 | list_for_each_safe(list_node, n, &cfhsi_list) { | |
1386 | cfhsi = list_entry(list_node, struct cfhsi, list); | |
1387 | /* Find the corresponding device. */ | |
1388 | if (cfhsi->dev == dev) { | |
1389 | /* Remove from list. */ | |
1390 | list_del(list_node); | |
1391 | spin_unlock(&cfhsi_list_lock); | |
40d69043 DT |
1392 | return 0; |
1393 | } | |
1394 | } | |
1395 | spin_unlock(&cfhsi_list_lock); | |
1396 | return -ENODEV; | |
1397 | } | |
1398 | ||
1399 | struct platform_driver cfhsi_plat_drv = { | |
1400 | .probe = cfhsi_probe, | |
1401 | .remove = cfhsi_remove, | |
1402 | .driver = { | |
1403 | .name = "cfhsi", | |
1404 | .owner = THIS_MODULE, | |
1405 | }, | |
1406 | }; | |
1407 | ||
1408 | static void __exit cfhsi_exit_module(void) | |
1409 | { | |
1410 | struct list_head *list_node; | |
1411 | struct list_head *n; | |
1412 | struct cfhsi *cfhsi = NULL; | |
1413 | ||
1414 | spin_lock(&cfhsi_list_lock); | |
1415 | list_for_each_safe(list_node, n, &cfhsi_list) { | |
1416 | cfhsi = list_entry(list_node, struct cfhsi, list); | |
1417 | ||
1418 | /* Remove from list. */ | |
1419 | list_del(list_node); | |
1420 | spin_unlock(&cfhsi_list_lock); | |
1421 | ||
39abbaef | 1422 | unregister_netdevice(cfhsi->ndev); |
40d69043 DT |
1423 | |
1424 | spin_lock(&cfhsi_list_lock); | |
1425 | } | |
1426 | spin_unlock(&cfhsi_list_lock); | |
1427 | ||
1428 | /* Unregister platform driver. */ | |
1429 | platform_driver_unregister(&cfhsi_plat_drv); | |
1430 | } | |
1431 | ||
1432 | static int __init cfhsi_init_module(void) | |
1433 | { | |
1434 | int result; | |
1435 | ||
1436 | /* Initialize spin lock. */ | |
1437 | spin_lock_init(&cfhsi_list_lock); | |
1438 | ||
1439 | /* Register platform driver. */ | |
1440 | result = platform_driver_register(&cfhsi_plat_drv); | |
1441 | if (result) { | |
1442 | printk(KERN_ERR "Could not register platform HSI driver: %d.\n", | |
1443 | result); | |
1444 | goto err_dev_register; | |
1445 | } | |
1446 | ||
40d69043 DT |
1447 | err_dev_register: |
1448 | return result; | |
1449 | } | |
1450 | ||
1451 | module_init(cfhsi_init_module); | |
1452 | module_exit(cfhsi_exit_module); |