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Commit | Line | Data |
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99c4a634 DM |
1 | /* |
2 | * at91_can.c - CAN network driver for AT91 SoC CAN controller | |
3 | * | |
3e9ebd3c | 4 | * (C) 2007 by Hans J. Koch <hjk@hansjkoch.de> |
0909c1ec | 5 | * (C) 2008, 2009, 2010, 2011 by Marc Kleine-Budde <kernel@pengutronix.de> |
99c4a634 DM |
6 | * |
7 | * This software may be distributed under the terms of the GNU General | |
8 | * Public License ("GPL") version 2 as distributed in the 'COPYING' | |
9 | * file from the main directory of the linux kernel source. | |
10 | * | |
99c4a634 DM |
11 | * |
12 | * Your platform definition file should specify something like: | |
13 | * | |
14 | * static struct at91_can_data ek_can_data = { | |
15 | * transceiver_switch = sam9263ek_transceiver_switch, | |
16 | * }; | |
17 | * | |
18 | * at91_add_device_can(&ek_can_data); | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/clk.h> | |
23 | #include <linux/errno.h> | |
24 | #include <linux/if_arp.h> | |
99c4a634 DM |
25 | #include <linux/interrupt.h> |
26 | #include <linux/kernel.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/netdevice.h> | |
3078cde7 | 29 | #include <linux/of.h> |
99c4a634 | 30 | #include <linux/platform_device.h> |
3a5655a5 | 31 | #include <linux/rtnetlink.h> |
99c4a634 DM |
32 | #include <linux/skbuff.h> |
33 | #include <linux/spinlock.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/types.h> | |
bcd2360c | 36 | #include <linux/platform_data/atmel.h> |
99c4a634 | 37 | |
99c4a634 DM |
38 | #include <linux/can/dev.h> |
39 | #include <linux/can/error.h> | |
4723f2b8 | 40 | #include <linux/can/led.h> |
99c4a634 | 41 | |
b049994d | 42 | #define AT91_MB_MASK(i) ((1 << (i)) - 1) |
99c4a634 DM |
43 | |
44 | /* Common registers */ | |
45 | enum at91_reg { | |
46 | AT91_MR = 0x000, | |
47 | AT91_IER = 0x004, | |
48 | AT91_IDR = 0x008, | |
49 | AT91_IMR = 0x00C, | |
50 | AT91_SR = 0x010, | |
51 | AT91_BR = 0x014, | |
52 | AT91_TIM = 0x018, | |
53 | AT91_TIMESTP = 0x01C, | |
54 | AT91_ECR = 0x020, | |
55 | AT91_TCR = 0x024, | |
56 | AT91_ACR = 0x028, | |
57 | }; | |
58 | ||
59 | /* Mailbox registers (0 <= i <= 15) */ | |
60 | #define AT91_MMR(i) (enum at91_reg)(0x200 + ((i) * 0x20)) | |
61 | #define AT91_MAM(i) (enum at91_reg)(0x204 + ((i) * 0x20)) | |
62 | #define AT91_MID(i) (enum at91_reg)(0x208 + ((i) * 0x20)) | |
63 | #define AT91_MFID(i) (enum at91_reg)(0x20C + ((i) * 0x20)) | |
64 | #define AT91_MSR(i) (enum at91_reg)(0x210 + ((i) * 0x20)) | |
65 | #define AT91_MDL(i) (enum at91_reg)(0x214 + ((i) * 0x20)) | |
66 | #define AT91_MDH(i) (enum at91_reg)(0x218 + ((i) * 0x20)) | |
67 | #define AT91_MCR(i) (enum at91_reg)(0x21C + ((i) * 0x20)) | |
68 | ||
69 | /* Register bits */ | |
70 | #define AT91_MR_CANEN BIT(0) | |
71 | #define AT91_MR_LPM BIT(1) | |
72 | #define AT91_MR_ABM BIT(2) | |
73 | #define AT91_MR_OVL BIT(3) | |
74 | #define AT91_MR_TEOF BIT(4) | |
75 | #define AT91_MR_TTM BIT(5) | |
76 | #define AT91_MR_TIMFRZ BIT(6) | |
77 | #define AT91_MR_DRPT BIT(7) | |
78 | ||
79 | #define AT91_SR_RBSY BIT(29) | |
80 | ||
81 | #define AT91_MMR_PRIO_SHIFT (16) | |
82 | ||
83 | #define AT91_MID_MIDE BIT(29) | |
84 | ||
85 | #define AT91_MSR_MRTR BIT(20) | |
86 | #define AT91_MSR_MABT BIT(22) | |
87 | #define AT91_MSR_MRDY BIT(23) | |
88 | #define AT91_MSR_MMI BIT(24) | |
89 | ||
90 | #define AT91_MCR_MRTR BIT(20) | |
91 | #define AT91_MCR_MTCR BIT(23) | |
92 | ||
93 | /* Mailbox Modes */ | |
94 | enum at91_mb_mode { | |
95 | AT91_MB_MODE_DISABLED = 0, | |
96 | AT91_MB_MODE_RX = 1, | |
97 | AT91_MB_MODE_RX_OVRWR = 2, | |
98 | AT91_MB_MODE_TX = 3, | |
99 | AT91_MB_MODE_CONSUMER = 4, | |
100 | AT91_MB_MODE_PRODUCER = 5, | |
101 | }; | |
102 | ||
103 | /* Interrupt mask bits */ | |
99c4a634 DM |
104 | #define AT91_IRQ_ERRA (1 << 16) |
105 | #define AT91_IRQ_WARN (1 << 17) | |
106 | #define AT91_IRQ_ERRP (1 << 18) | |
107 | #define AT91_IRQ_BOFF (1 << 19) | |
108 | #define AT91_IRQ_SLEEP (1 << 20) | |
109 | #define AT91_IRQ_WAKEUP (1 << 21) | |
110 | #define AT91_IRQ_TOVF (1 << 22) | |
111 | #define AT91_IRQ_TSTP (1 << 23) | |
112 | #define AT91_IRQ_CERR (1 << 24) | |
113 | #define AT91_IRQ_SERR (1 << 25) | |
114 | #define AT91_IRQ_AERR (1 << 26) | |
115 | #define AT91_IRQ_FERR (1 << 27) | |
116 | #define AT91_IRQ_BERR (1 << 28) | |
117 | ||
118 | #define AT91_IRQ_ERR_ALL (0x1fff0000) | |
119 | #define AT91_IRQ_ERR_FRAME (AT91_IRQ_CERR | AT91_IRQ_SERR | \ | |
120 | AT91_IRQ_AERR | AT91_IRQ_FERR | AT91_IRQ_BERR) | |
121 | #define AT91_IRQ_ERR_LINE (AT91_IRQ_ERRA | AT91_IRQ_WARN | \ | |
122 | AT91_IRQ_ERRP | AT91_IRQ_BOFF) | |
123 | ||
124 | #define AT91_IRQ_ALL (0x1fffffff) | |
125 | ||
d3d47264 MKB |
126 | enum at91_devtype { |
127 | AT91_DEVTYPE_SAM9263, | |
6388b396 | 128 | AT91_DEVTYPE_SAM9X5, |
d3d47264 MKB |
129 | }; |
130 | ||
131 | struct at91_devtype_data { | |
132 | unsigned int rx_first; | |
133 | unsigned int rx_split; | |
134 | unsigned int rx_last; | |
135 | unsigned int tx_shift; | |
136 | enum at91_devtype type; | |
137 | }; | |
138 | ||
99c4a634 | 139 | struct at91_priv { |
44d85666 MKB |
140 | struct can_priv can; /* must be the first member! */ |
141 | struct net_device *dev; | |
142 | struct napi_struct napi; | |
99c4a634 | 143 | |
44d85666 | 144 | void __iomem *reg_base; |
99c4a634 | 145 | |
44d85666 MKB |
146 | u32 reg_sr; |
147 | unsigned int tx_next; | |
148 | unsigned int tx_echo; | |
149 | unsigned int rx_next; | |
d3d47264 | 150 | struct at91_devtype_data devtype_data; |
99c4a634 | 151 | |
44d85666 MKB |
152 | struct clk *clk; |
153 | struct at91_can_data *pdata; | |
3a5655a5 | 154 | |
44d85666 | 155 | canid_t mb0_id; |
99c4a634 DM |
156 | }; |
157 | ||
3078cde7 LD |
158 | static const struct at91_devtype_data at91_at91sam9263_data = { |
159 | .rx_first = 1, | |
160 | .rx_split = 8, | |
161 | .rx_last = 11, | |
162 | .tx_shift = 2, | |
163 | .type = AT91_DEVTYPE_SAM9263, | |
164 | }; | |
165 | ||
166 | static const struct at91_devtype_data at91_at91sam9x5_data = { | |
167 | .rx_first = 0, | |
168 | .rx_split = 4, | |
169 | .rx_last = 5, | |
170 | .tx_shift = 1, | |
171 | .type = AT91_DEVTYPE_SAM9X5, | |
d3d47264 MKB |
172 | }; |
173 | ||
194b9a4c | 174 | static const struct can_bittiming_const at91_bittiming_const = { |
00389b08 | 175 | .name = KBUILD_MODNAME, |
99c4a634 DM |
176 | .tseg1_min = 4, |
177 | .tseg1_max = 16, | |
178 | .tseg2_min = 2, | |
179 | .tseg2_max = 8, | |
180 | .sjw_max = 4, | |
181 | .brp_min = 2, | |
182 | .brp_max = 128, | |
183 | .brp_inc = 1, | |
184 | }; | |
185 | ||
d3d47264 MKB |
186 | #define AT91_IS(_model) \ |
187 | static inline int at91_is_sam##_model(const struct at91_priv *priv) \ | |
188 | { \ | |
189 | return priv->devtype_data.type == AT91_DEVTYPE_SAM##_model; \ | |
190 | } | |
191 | ||
192 | AT91_IS(9263); | |
6388b396 | 193 | AT91_IS(9X5); |
d3d47264 MKB |
194 | |
195 | static inline unsigned int get_mb_rx_first(const struct at91_priv *priv) | |
196 | { | |
197 | return priv->devtype_data.rx_first; | |
198 | } | |
199 | ||
200 | static inline unsigned int get_mb_rx_last(const struct at91_priv *priv) | |
201 | { | |
202 | return priv->devtype_data.rx_last; | |
203 | } | |
204 | ||
205 | static inline unsigned int get_mb_rx_split(const struct at91_priv *priv) | |
206 | { | |
207 | return priv->devtype_data.rx_split; | |
208 | } | |
209 | ||
210 | static inline unsigned int get_mb_rx_num(const struct at91_priv *priv) | |
211 | { | |
212 | return get_mb_rx_last(priv) - get_mb_rx_first(priv) + 1; | |
213 | } | |
214 | ||
79008997 MKB |
215 | static inline unsigned int get_mb_rx_low_last(const struct at91_priv *priv) |
216 | { | |
d3d47264 | 217 | return get_mb_rx_split(priv) - 1; |
79008997 MKB |
218 | } |
219 | ||
220 | static inline unsigned int get_mb_rx_low_mask(const struct at91_priv *priv) | |
221 | { | |
d3d47264 MKB |
222 | return AT91_MB_MASK(get_mb_rx_split(priv)) & |
223 | ~AT91_MB_MASK(get_mb_rx_first(priv)); | |
224 | } | |
225 | ||
226 | static inline unsigned int get_mb_tx_shift(const struct at91_priv *priv) | |
227 | { | |
228 | return priv->devtype_data.tx_shift; | |
79008997 MKB |
229 | } |
230 | ||
231 | static inline unsigned int get_mb_tx_num(const struct at91_priv *priv) | |
232 | { | |
d3d47264 | 233 | return 1 << get_mb_tx_shift(priv); |
79008997 MKB |
234 | } |
235 | ||
236 | static inline unsigned int get_mb_tx_first(const struct at91_priv *priv) | |
237 | { | |
d3d47264 | 238 | return get_mb_rx_last(priv) + 1; |
79008997 MKB |
239 | } |
240 | ||
241 | static inline unsigned int get_mb_tx_last(const struct at91_priv *priv) | |
242 | { | |
243 | return get_mb_tx_first(priv) + get_mb_tx_num(priv) - 1; | |
244 | } | |
245 | ||
246 | static inline unsigned int get_next_prio_shift(const struct at91_priv *priv) | |
247 | { | |
d3d47264 | 248 | return get_mb_tx_shift(priv); |
79008997 MKB |
249 | } |
250 | ||
251 | static inline unsigned int get_next_prio_mask(const struct at91_priv *priv) | |
252 | { | |
d3d47264 | 253 | return 0xf << get_mb_tx_shift(priv); |
79008997 MKB |
254 | } |
255 | ||
256 | static inline unsigned int get_next_mb_mask(const struct at91_priv *priv) | |
257 | { | |
d3d47264 | 258 | return AT91_MB_MASK(get_mb_tx_shift(priv)); |
79008997 MKB |
259 | } |
260 | ||
261 | static inline unsigned int get_next_mask(const struct at91_priv *priv) | |
262 | { | |
263 | return get_next_mb_mask(priv) | get_next_prio_mask(priv); | |
264 | } | |
265 | ||
266 | static inline unsigned int get_irq_mb_rx(const struct at91_priv *priv) | |
267 | { | |
d3d47264 MKB |
268 | return AT91_MB_MASK(get_mb_rx_last(priv) + 1) & |
269 | ~AT91_MB_MASK(get_mb_rx_first(priv)); | |
79008997 MKB |
270 | } |
271 | ||
272 | static inline unsigned int get_irq_mb_tx(const struct at91_priv *priv) | |
273 | { | |
274 | return AT91_MB_MASK(get_mb_tx_last(priv) + 1) & | |
275 | ~AT91_MB_MASK(get_mb_tx_first(priv)); | |
276 | } | |
277 | ||
9c2e0a6d | 278 | static inline unsigned int get_tx_next_mb(const struct at91_priv *priv) |
99c4a634 | 279 | { |
79008997 | 280 | return (priv->tx_next & get_next_mb_mask(priv)) + get_mb_tx_first(priv); |
99c4a634 DM |
281 | } |
282 | ||
9c2e0a6d | 283 | static inline unsigned int get_tx_next_prio(const struct at91_priv *priv) |
99c4a634 | 284 | { |
79008997 | 285 | return (priv->tx_next >> get_next_prio_shift(priv)) & 0xf; |
99c4a634 DM |
286 | } |
287 | ||
9c2e0a6d | 288 | static inline unsigned int get_tx_echo_mb(const struct at91_priv *priv) |
99c4a634 | 289 | { |
79008997 | 290 | return (priv->tx_echo & get_next_mb_mask(priv)) + get_mb_tx_first(priv); |
99c4a634 DM |
291 | } |
292 | ||
293 | static inline u32 at91_read(const struct at91_priv *priv, enum at91_reg reg) | |
294 | { | |
7672fe73 | 295 | return __raw_readl(priv->reg_base + reg); |
99c4a634 DM |
296 | } |
297 | ||
298 | static inline void at91_write(const struct at91_priv *priv, enum at91_reg reg, | |
299 | u32 value) | |
300 | { | |
7672fe73 | 301 | __raw_writel(value, priv->reg_base + reg); |
99c4a634 DM |
302 | } |
303 | ||
304 | static inline void set_mb_mode_prio(const struct at91_priv *priv, | |
305 | unsigned int mb, enum at91_mb_mode mode, int prio) | |
306 | { | |
307 | at91_write(priv, AT91_MMR(mb), (mode << 24) | (prio << 16)); | |
308 | } | |
309 | ||
310 | static inline void set_mb_mode(const struct at91_priv *priv, unsigned int mb, | |
311 | enum at91_mb_mode mode) | |
312 | { | |
313 | set_mb_mode_prio(priv, mb, mode, 0); | |
314 | } | |
315 | ||
3a5655a5 MKB |
316 | static inline u32 at91_can_id_to_reg_mid(canid_t can_id) |
317 | { | |
318 | u32 reg_mid; | |
319 | ||
320 | if (can_id & CAN_EFF_FLAG) | |
321 | reg_mid = (can_id & CAN_EFF_MASK) | AT91_MID_MIDE; | |
322 | else | |
323 | reg_mid = (can_id & CAN_SFF_MASK) << 18; | |
324 | ||
325 | return reg_mid; | |
326 | } | |
327 | ||
99c4a634 DM |
328 | /* |
329 | * Swtich transceiver on or off | |
330 | */ | |
331 | static void at91_transceiver_switch(const struct at91_priv *priv, int on) | |
332 | { | |
333 | if (priv->pdata && priv->pdata->transceiver_switch) | |
334 | priv->pdata->transceiver_switch(on); | |
335 | } | |
336 | ||
337 | static void at91_setup_mailboxes(struct net_device *dev) | |
338 | { | |
339 | struct at91_priv *priv = netdev_priv(dev); | |
340 | unsigned int i; | |
3a5655a5 | 341 | u32 reg_mid; |
99c4a634 DM |
342 | |
343 | /* | |
9e0a2d1c MKB |
344 | * Due to a chip bug (errata 50.2.6.3 & 50.3.5.3) the first |
345 | * mailbox is disabled. The next 11 mailboxes are used as a | |
346 | * reception FIFO. The last mailbox is configured with | |
347 | * overwrite option. The overwrite flag indicates a FIFO | |
348 | * overflow. | |
99c4a634 | 349 | */ |
3a5655a5 | 350 | reg_mid = at91_can_id_to_reg_mid(priv->mb0_id); |
d3d47264 | 351 | for (i = 0; i < get_mb_rx_first(priv); i++) { |
9e0a2d1c | 352 | set_mb_mode(priv, i, AT91_MB_MODE_DISABLED); |
3a5655a5 MKB |
353 | at91_write(priv, AT91_MID(i), reg_mid); |
354 | at91_write(priv, AT91_MCR(i), 0x0); /* clear dlc */ | |
355 | } | |
356 | ||
d3d47264 | 357 | for (i = get_mb_rx_first(priv); i < get_mb_rx_last(priv); i++) |
99c4a634 | 358 | set_mb_mode(priv, i, AT91_MB_MODE_RX); |
d3d47264 | 359 | set_mb_mode(priv, get_mb_rx_last(priv), AT91_MB_MODE_RX_OVRWR); |
99c4a634 | 360 | |
8a0e0a49 | 361 | /* reset acceptance mask and id register */ |
d3d47264 | 362 | for (i = get_mb_rx_first(priv); i <= get_mb_rx_last(priv); i++) { |
44d85666 | 363 | at91_write(priv, AT91_MAM(i), 0x0); |
8a0e0a49 MKB |
364 | at91_write(priv, AT91_MID(i), AT91_MID_MIDE); |
365 | } | |
366 | ||
99c4a634 | 367 | /* The last 4 mailboxes are used for transmitting. */ |
79008997 | 368 | for (i = get_mb_tx_first(priv); i <= get_mb_tx_last(priv); i++) |
99c4a634 DM |
369 | set_mb_mode_prio(priv, i, AT91_MB_MODE_TX, 0); |
370 | ||
371 | /* Reset tx and rx helper pointers */ | |
0909c1ec | 372 | priv->tx_next = priv->tx_echo = 0; |
d3d47264 | 373 | priv->rx_next = get_mb_rx_first(priv); |
99c4a634 DM |
374 | } |
375 | ||
376 | static int at91_set_bittiming(struct net_device *dev) | |
377 | { | |
378 | const struct at91_priv *priv = netdev_priv(dev); | |
379 | const struct can_bittiming *bt = &priv->can.bittiming; | |
380 | u32 reg_br; | |
381 | ||
dbe91325 MKB |
382 | reg_br = ((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) ? 1 << 24 : 0) | |
383 | ((bt->brp - 1) << 16) | ((bt->sjw - 1) << 12) | | |
99c4a634 DM |
384 | ((bt->prop_seg - 1) << 8) | ((bt->phase_seg1 - 1) << 4) | |
385 | ((bt->phase_seg2 - 1) << 0); | |
386 | ||
882055c8 | 387 | netdev_info(dev, "writing AT91_BR: 0x%08x\n", reg_br); |
99c4a634 DM |
388 | |
389 | at91_write(priv, AT91_BR, reg_br); | |
390 | ||
391 | return 0; | |
392 | } | |
393 | ||
33a6f298 MKB |
394 | static int at91_get_berr_counter(const struct net_device *dev, |
395 | struct can_berr_counter *bec) | |
396 | { | |
397 | const struct at91_priv *priv = netdev_priv(dev); | |
398 | u32 reg_ecr = at91_read(priv, AT91_ECR); | |
399 | ||
400 | bec->rxerr = reg_ecr & 0xff; | |
401 | bec->txerr = reg_ecr >> 16; | |
402 | ||
403 | return 0; | |
404 | } | |
405 | ||
99c4a634 DM |
406 | static void at91_chip_start(struct net_device *dev) |
407 | { | |
408 | struct at91_priv *priv = netdev_priv(dev); | |
409 | u32 reg_mr, reg_ier; | |
410 | ||
411 | /* disable interrupts */ | |
412 | at91_write(priv, AT91_IDR, AT91_IRQ_ALL); | |
413 | ||
414 | /* disable chip */ | |
415 | reg_mr = at91_read(priv, AT91_MR); | |
416 | at91_write(priv, AT91_MR, reg_mr & ~AT91_MR_CANEN); | |
417 | ||
b156fd04 | 418 | at91_set_bittiming(dev); |
99c4a634 DM |
419 | at91_setup_mailboxes(dev); |
420 | at91_transceiver_switch(priv, 1); | |
421 | ||
422 | /* enable chip */ | |
17a50ee4 YDR |
423 | if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) |
424 | reg_mr = AT91_MR_CANEN | AT91_MR_ABM; | |
425 | else | |
426 | reg_mr = AT91_MR_CANEN; | |
427 | at91_write(priv, AT91_MR, reg_mr); | |
99c4a634 DM |
428 | |
429 | priv->can.state = CAN_STATE_ERROR_ACTIVE; | |
430 | ||
431 | /* Enable interrupts */ | |
79008997 | 432 | reg_ier = get_irq_mb_rx(priv) | AT91_IRQ_ERRP | AT91_IRQ_ERR_FRAME; |
99c4a634 DM |
433 | at91_write(priv, AT91_IDR, AT91_IRQ_ALL); |
434 | at91_write(priv, AT91_IER, reg_ier); | |
435 | } | |
436 | ||
437 | static void at91_chip_stop(struct net_device *dev, enum can_state state) | |
438 | { | |
439 | struct at91_priv *priv = netdev_priv(dev); | |
440 | u32 reg_mr; | |
441 | ||
442 | /* disable interrupts */ | |
443 | at91_write(priv, AT91_IDR, AT91_IRQ_ALL); | |
444 | ||
445 | reg_mr = at91_read(priv, AT91_MR); | |
446 | at91_write(priv, AT91_MR, reg_mr & ~AT91_MR_CANEN); | |
447 | ||
448 | at91_transceiver_switch(priv, 0); | |
449 | priv->can.state = state; | |
450 | } | |
451 | ||
452 | /* | |
453 | * theory of operation: | |
454 | * | |
455 | * According to the datasheet priority 0 is the highest priority, 15 | |
456 | * is the lowest. If two mailboxes have the same priority level the | |
457 | * message of the mailbox with the lowest number is sent first. | |
458 | * | |
459 | * We use the first TX mailbox (AT91_MB_TX_FIRST) with prio 0, then | |
460 | * the next mailbox with prio 0, and so on, until all mailboxes are | |
461 | * used. Then we start from the beginning with mailbox | |
462 | * AT91_MB_TX_FIRST, but with prio 1, mailbox AT91_MB_TX_FIRST + 1 | |
463 | * prio 1. When we reach the last mailbox with prio 15, we have to | |
464 | * stop sending, waiting for all messages to be delivered, then start | |
465 | * again with mailbox AT91_MB_TX_FIRST prio 0. | |
466 | * | |
467 | * We use the priv->tx_next as counter for the next transmission | |
468 | * mailbox, but without the offset AT91_MB_TX_FIRST. The lower bits | |
469 | * encode the mailbox number, the upper 4 bits the mailbox priority: | |
470 | * | |
d3d47264 MKB |
471 | * priv->tx_next = (prio << get_next_prio_shift(priv)) | |
472 | * (mb - get_mb_tx_first(priv)); | |
99c4a634 DM |
473 | * |
474 | */ | |
475 | static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
476 | { | |
477 | struct at91_priv *priv = netdev_priv(dev); | |
478 | struct net_device_stats *stats = &dev->stats; | |
479 | struct can_frame *cf = (struct can_frame *)skb->data; | |
480 | unsigned int mb, prio; | |
481 | u32 reg_mid, reg_mcr; | |
482 | ||
3ccd4c61 OH |
483 | if (can_dropped_invalid_skb(dev, skb)) |
484 | return NETDEV_TX_OK; | |
485 | ||
99c4a634 DM |
486 | mb = get_tx_next_mb(priv); |
487 | prio = get_tx_next_prio(priv); | |
488 | ||
489 | if (unlikely(!(at91_read(priv, AT91_MSR(mb)) & AT91_MSR_MRDY))) { | |
490 | netif_stop_queue(dev); | |
491 | ||
882055c8 | 492 | netdev_err(dev, "BUG! TX buffer full when queue awake!\n"); |
99c4a634 DM |
493 | return NETDEV_TX_BUSY; |
494 | } | |
3a5655a5 | 495 | reg_mid = at91_can_id_to_reg_mid(cf->can_id); |
99c4a634 DM |
496 | reg_mcr = ((cf->can_id & CAN_RTR_FLAG) ? AT91_MCR_MRTR : 0) | |
497 | (cf->can_dlc << 16) | AT91_MCR_MTCR; | |
498 | ||
499 | /* disable MB while writing ID (see datasheet) */ | |
500 | set_mb_mode(priv, mb, AT91_MB_MODE_DISABLED); | |
501 | at91_write(priv, AT91_MID(mb), reg_mid); | |
502 | set_mb_mode_prio(priv, mb, AT91_MB_MODE_TX, prio); | |
503 | ||
504 | at91_write(priv, AT91_MDL(mb), *(u32 *)(cf->data + 0)); | |
505 | at91_write(priv, AT91_MDH(mb), *(u32 *)(cf->data + 4)); | |
506 | ||
507 | /* This triggers transmission */ | |
508 | at91_write(priv, AT91_MCR(mb), reg_mcr); | |
509 | ||
510 | stats->tx_bytes += cf->can_dlc; | |
99c4a634 | 511 | |
25985edc | 512 | /* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */ |
79008997 | 513 | can_put_echo_skb(skb, dev, mb - get_mb_tx_first(priv)); |
99c4a634 DM |
514 | |
515 | /* | |
516 | * we have to stop the queue and deliver all messages in case | |
517 | * of a prio+mb counter wrap around. This is the case if | |
518 | * tx_next buffer prio and mailbox equals 0. | |
519 | * | |
520 | * also stop the queue if next buffer is still in use | |
521 | * (== not ready) | |
522 | */ | |
523 | priv->tx_next++; | |
524 | if (!(at91_read(priv, AT91_MSR(get_tx_next_mb(priv))) & | |
525 | AT91_MSR_MRDY) || | |
79008997 | 526 | (priv->tx_next & get_next_mask(priv)) == 0) |
99c4a634 DM |
527 | netif_stop_queue(dev); |
528 | ||
529 | /* Enable interrupt for this mailbox */ | |
530 | at91_write(priv, AT91_IER, 1 << mb); | |
531 | ||
532 | return NETDEV_TX_OK; | |
533 | } | |
534 | ||
535 | /** | |
536 | * at91_activate_rx_low - activate lower rx mailboxes | |
537 | * @priv: a91 context | |
538 | * | |
539 | * Reenables the lower mailboxes for reception of new CAN messages | |
540 | */ | |
541 | static inline void at91_activate_rx_low(const struct at91_priv *priv) | |
542 | { | |
79008997 | 543 | u32 mask = get_mb_rx_low_mask(priv); |
99c4a634 DM |
544 | at91_write(priv, AT91_TCR, mask); |
545 | } | |
546 | ||
547 | /** | |
548 | * at91_activate_rx_mb - reactive single rx mailbox | |
549 | * @priv: a91 context | |
550 | * @mb: mailbox to reactivate | |
551 | * | |
552 | * Reenables given mailbox for reception of new CAN messages | |
553 | */ | |
554 | static inline void at91_activate_rx_mb(const struct at91_priv *priv, | |
555 | unsigned int mb) | |
556 | { | |
557 | u32 mask = 1 << mb; | |
558 | at91_write(priv, AT91_TCR, mask); | |
559 | } | |
560 | ||
561 | /** | |
562 | * at91_rx_overflow_err - send error frame due to rx overflow | |
563 | * @dev: net device | |
564 | */ | |
565 | static void at91_rx_overflow_err(struct net_device *dev) | |
566 | { | |
567 | struct net_device_stats *stats = &dev->stats; | |
568 | struct sk_buff *skb; | |
569 | struct can_frame *cf; | |
570 | ||
882055c8 | 571 | netdev_dbg(dev, "RX buffer overflow\n"); |
99c4a634 DM |
572 | stats->rx_over_errors++; |
573 | stats->rx_errors++; | |
574 | ||
575 | skb = alloc_can_err_skb(dev, &cf); | |
576 | if (unlikely(!skb)) | |
577 | return; | |
578 | ||
579 | cf->can_id |= CAN_ERR_CRTL; | |
580 | cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; | |
581 | netif_receive_skb(skb); | |
582 | ||
583 | stats->rx_packets++; | |
584 | stats->rx_bytes += cf->can_dlc; | |
585 | } | |
586 | ||
587 | /** | |
588 | * at91_read_mb - read CAN msg from mailbox (lowlevel impl) | |
589 | * @dev: net device | |
590 | * @mb: mailbox number to read from | |
591 | * @cf: can frame where to store message | |
592 | * | |
593 | * Reads a CAN message from the given mailbox and stores data into | |
594 | * given can frame. "mb" and "cf" must be valid. | |
595 | */ | |
596 | static void at91_read_mb(struct net_device *dev, unsigned int mb, | |
597 | struct can_frame *cf) | |
598 | { | |
599 | const struct at91_priv *priv = netdev_priv(dev); | |
600 | u32 reg_msr, reg_mid; | |
601 | ||
602 | reg_mid = at91_read(priv, AT91_MID(mb)); | |
603 | if (reg_mid & AT91_MID_MIDE) | |
604 | cf->can_id = ((reg_mid >> 0) & CAN_EFF_MASK) | CAN_EFF_FLAG; | |
605 | else | |
606 | cf->can_id = (reg_mid >> 18) & CAN_SFF_MASK; | |
607 | ||
608 | reg_msr = at91_read(priv, AT91_MSR(mb)); | |
c7cd606f | 609 | cf->can_dlc = get_can_dlc((reg_msr >> 16) & 0xf); |
99c4a634 | 610 | |
e14ee40b MKB |
611 | if (reg_msr & AT91_MSR_MRTR) |
612 | cf->can_id |= CAN_RTR_FLAG; | |
613 | else { | |
614 | *(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb)); | |
615 | *(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb)); | |
616 | } | |
99c4a634 | 617 | |
8a0e0a49 MKB |
618 | /* allow RX of extended frames */ |
619 | at91_write(priv, AT91_MID(mb), AT91_MID_MIDE); | |
620 | ||
d3d47264 | 621 | if (unlikely(mb == get_mb_rx_last(priv) && reg_msr & AT91_MSR_MMI)) |
99c4a634 DM |
622 | at91_rx_overflow_err(dev); |
623 | } | |
624 | ||
625 | /** | |
626 | * at91_read_msg - read CAN message from mailbox | |
627 | * @dev: net device | |
628 | * @mb: mail box to read from | |
629 | * | |
630 | * Reads a CAN message from given mailbox, and put into linux network | |
631 | * RX queue, does all housekeeping chores (stats, ...) | |
632 | */ | |
633 | static void at91_read_msg(struct net_device *dev, unsigned int mb) | |
634 | { | |
635 | struct net_device_stats *stats = &dev->stats; | |
636 | struct can_frame *cf; | |
637 | struct sk_buff *skb; | |
638 | ||
639 | skb = alloc_can_skb(dev, &cf); | |
640 | if (unlikely(!skb)) { | |
641 | stats->rx_dropped++; | |
642 | return; | |
643 | } | |
644 | ||
645 | at91_read_mb(dev, mb, cf); | |
646 | netif_receive_skb(skb); | |
647 | ||
648 | stats->rx_packets++; | |
649 | stats->rx_bytes += cf->can_dlc; | |
4723f2b8 FB |
650 | |
651 | can_led_event(dev, CAN_LED_EVENT_RX); | |
99c4a634 DM |
652 | } |
653 | ||
654 | /** | |
655 | * at91_poll_rx - read multiple CAN messages from mailboxes | |
656 | * @dev: net device | |
657 | * @quota: max number of pkgs we're allowed to receive | |
658 | * | |
659 | * Theory of Operation: | |
660 | * | |
d3d47264 MKB |
661 | * About 3/4 of the mailboxes (get_mb_rx_first()...get_mb_rx_last()) |
662 | * on the chip are reserved for RX. We split them into 2 groups. The | |
663 | * lower group ranges from get_mb_rx_first() to get_mb_rx_low_last(). | |
99c4a634 DM |
664 | * |
665 | * Like it or not, but the chip always saves a received CAN message | |
666 | * into the first free mailbox it finds (starting with the | |
667 | * lowest). This makes it very difficult to read the messages in the | |
668 | * right order from the chip. This is how we work around that problem: | |
669 | * | |
9e0a2d1c | 670 | * The first message goes into mb nr. 1 and issues an interrupt. All |
99c4a634 DM |
671 | * rx ints are disabled in the interrupt handler and a napi poll is |
672 | * scheduled. We read the mailbox, but do _not_ reenable the mb (to | |
673 | * receive another message). | |
674 | * | |
675 | * lower mbxs upper | |
9e0a2d1c MKB |
676 | * ____^______ __^__ |
677 | * / \ / \ | |
99c4a634 | 678 | * +-+-+-+-+-+-+-+-++-+-+-+-+ |
9e0a2d1c | 679 | * | |x|x|x|x|x|x|x|| | | | | |
99c4a634 DM |
680 | * +-+-+-+-+-+-+-+-++-+-+-+-+ |
681 | * 0 0 0 0 0 0 0 0 0 0 1 1 \ mail | |
682 | * 0 1 2 3 4 5 6 7 8 9 0 1 / box | |
9e0a2d1c MKB |
683 | * ^ |
684 | * | | |
685 | * \ | |
686 | * unused, due to chip bug | |
99c4a634 DM |
687 | * |
688 | * The variable priv->rx_next points to the next mailbox to read a | |
689 | * message from. As long we're in the lower mailboxes we just read the | |
690 | * mailbox but not reenable it. | |
691 | * | |
692 | * With completion of the last of the lower mailboxes, we reenable the | |
693 | * whole first group, but continue to look for filled mailboxes in the | |
694 | * upper mailboxes. Imagine the second group like overflow mailboxes, | |
695 | * which takes CAN messages if the lower goup is full. While in the | |
696 | * upper group we reenable the mailbox right after reading it. Giving | |
697 | * the chip more room to store messages. | |
698 | * | |
699 | * After finishing we look again in the lower group if we've still | |
700 | * quota. | |
701 | * | |
702 | */ | |
703 | static int at91_poll_rx(struct net_device *dev, int quota) | |
704 | { | |
705 | struct at91_priv *priv = netdev_priv(dev); | |
706 | u32 reg_sr = at91_read(priv, AT91_SR); | |
707 | const unsigned long *addr = (unsigned long *)®_sr; | |
708 | unsigned int mb; | |
709 | int received = 0; | |
710 | ||
79008997 MKB |
711 | if (priv->rx_next > get_mb_rx_low_last(priv) && |
712 | reg_sr & get_mb_rx_low_mask(priv)) | |
882055c8 MKB |
713 | netdev_info(dev, |
714 | "order of incoming frames cannot be guaranteed\n"); | |
99c4a634 DM |
715 | |
716 | again: | |
79008997 MKB |
717 | for (mb = find_next_bit(addr, get_mb_tx_first(priv), priv->rx_next); |
718 | mb < get_mb_tx_first(priv) && quota > 0; | |
99c4a634 | 719 | reg_sr = at91_read(priv, AT91_SR), |
79008997 | 720 | mb = find_next_bit(addr, get_mb_tx_first(priv), ++priv->rx_next)) { |
99c4a634 DM |
721 | at91_read_msg(dev, mb); |
722 | ||
723 | /* reactivate mailboxes */ | |
79008997 | 724 | if (mb == get_mb_rx_low_last(priv)) |
99c4a634 DM |
725 | /* all lower mailboxed, if just finished it */ |
726 | at91_activate_rx_low(priv); | |
79008997 | 727 | else if (mb > get_mb_rx_low_last(priv)) |
99c4a634 DM |
728 | /* only the mailbox we read */ |
729 | at91_activate_rx_mb(priv, mb); | |
730 | ||
731 | received++; | |
732 | quota--; | |
733 | } | |
734 | ||
735 | /* upper group completed, look again in lower */ | |
79008997 | 736 | if (priv->rx_next > get_mb_rx_low_last(priv) && |
d3d47264 MKB |
737 | quota > 0 && mb > get_mb_rx_last(priv)) { |
738 | priv->rx_next = get_mb_rx_first(priv); | |
99c4a634 DM |
739 | goto again; |
740 | } | |
741 | ||
742 | return received; | |
743 | } | |
744 | ||
745 | static void at91_poll_err_frame(struct net_device *dev, | |
746 | struct can_frame *cf, u32 reg_sr) | |
747 | { | |
748 | struct at91_priv *priv = netdev_priv(dev); | |
749 | ||
750 | /* CRC error */ | |
751 | if (reg_sr & AT91_IRQ_CERR) { | |
882055c8 | 752 | netdev_dbg(dev, "CERR irq\n"); |
99c4a634 DM |
753 | dev->stats.rx_errors++; |
754 | priv->can.can_stats.bus_error++; | |
755 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; | |
756 | } | |
757 | ||
758 | /* Stuffing Error */ | |
759 | if (reg_sr & AT91_IRQ_SERR) { | |
882055c8 | 760 | netdev_dbg(dev, "SERR irq\n"); |
99c4a634 DM |
761 | dev->stats.rx_errors++; |
762 | priv->can.can_stats.bus_error++; | |
763 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; | |
764 | cf->data[2] |= CAN_ERR_PROT_STUFF; | |
765 | } | |
766 | ||
767 | /* Acknowledgement Error */ | |
768 | if (reg_sr & AT91_IRQ_AERR) { | |
882055c8 | 769 | netdev_dbg(dev, "AERR irq\n"); |
99c4a634 DM |
770 | dev->stats.tx_errors++; |
771 | cf->can_id |= CAN_ERR_ACK; | |
772 | } | |
773 | ||
774 | /* Form error */ | |
775 | if (reg_sr & AT91_IRQ_FERR) { | |
882055c8 | 776 | netdev_dbg(dev, "FERR irq\n"); |
99c4a634 DM |
777 | dev->stats.rx_errors++; |
778 | priv->can.can_stats.bus_error++; | |
779 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; | |
780 | cf->data[2] |= CAN_ERR_PROT_FORM; | |
781 | } | |
782 | ||
783 | /* Bit Error */ | |
784 | if (reg_sr & AT91_IRQ_BERR) { | |
882055c8 | 785 | netdev_dbg(dev, "BERR irq\n"); |
99c4a634 DM |
786 | dev->stats.tx_errors++; |
787 | priv->can.can_stats.bus_error++; | |
788 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; | |
789 | cf->data[2] |= CAN_ERR_PROT_BIT; | |
790 | } | |
791 | } | |
792 | ||
793 | static int at91_poll_err(struct net_device *dev, int quota, u32 reg_sr) | |
794 | { | |
795 | struct sk_buff *skb; | |
796 | struct can_frame *cf; | |
797 | ||
798 | if (quota == 0) | |
799 | return 0; | |
800 | ||
801 | skb = alloc_can_err_skb(dev, &cf); | |
802 | if (unlikely(!skb)) | |
803 | return 0; | |
804 | ||
805 | at91_poll_err_frame(dev, cf, reg_sr); | |
806 | netif_receive_skb(skb); | |
807 | ||
99c4a634 DM |
808 | dev->stats.rx_packets++; |
809 | dev->stats.rx_bytes += cf->can_dlc; | |
810 | ||
811 | return 1; | |
812 | } | |
813 | ||
814 | static int at91_poll(struct napi_struct *napi, int quota) | |
815 | { | |
816 | struct net_device *dev = napi->dev; | |
817 | const struct at91_priv *priv = netdev_priv(dev); | |
818 | u32 reg_sr = at91_read(priv, AT91_SR); | |
819 | int work_done = 0; | |
820 | ||
79008997 | 821 | if (reg_sr & get_irq_mb_rx(priv)) |
99c4a634 DM |
822 | work_done += at91_poll_rx(dev, quota - work_done); |
823 | ||
824 | /* | |
825 | * The error bits are clear on read, | |
826 | * so use saved value from irq handler. | |
827 | */ | |
828 | reg_sr |= priv->reg_sr; | |
829 | if (reg_sr & AT91_IRQ_ERR_FRAME) | |
830 | work_done += at91_poll_err(dev, quota - work_done, reg_sr); | |
831 | ||
832 | if (work_done < quota) { | |
833 | /* enable IRQs for frame errors and all mailboxes >= rx_next */ | |
834 | u32 reg_ier = AT91_IRQ_ERR_FRAME; | |
79008997 | 835 | reg_ier |= get_irq_mb_rx(priv) & ~AT91_MB_MASK(priv->rx_next); |
99c4a634 DM |
836 | |
837 | napi_complete(napi); | |
838 | at91_write(priv, AT91_IER, reg_ier); | |
839 | } | |
840 | ||
841 | return work_done; | |
842 | } | |
843 | ||
844 | /* | |
845 | * theory of operation: | |
846 | * | |
847 | * priv->tx_echo holds the number of the oldest can_frame put for | |
848 | * transmission into the hardware, but not yet ACKed by the CAN tx | |
849 | * complete IRQ. | |
850 | * | |
851 | * We iterate from priv->tx_echo to priv->tx_next and check if the | |
852 | * packet has been transmitted, echo it back to the CAN framework. If | |
853 | * we discover a not yet transmitted package, stop looking for more. | |
854 | * | |
855 | */ | |
856 | static void at91_irq_tx(struct net_device *dev, u32 reg_sr) | |
857 | { | |
858 | struct at91_priv *priv = netdev_priv(dev); | |
859 | u32 reg_msr; | |
860 | unsigned int mb; | |
861 | ||
862 | /* masking of reg_sr not needed, already done by at91_irq */ | |
863 | ||
864 | for (/* nix */; (priv->tx_next - priv->tx_echo) > 0; priv->tx_echo++) { | |
865 | mb = get_tx_echo_mb(priv); | |
866 | ||
867 | /* no event in mailbox? */ | |
868 | if (!(reg_sr & (1 << mb))) | |
869 | break; | |
870 | ||
871 | /* Disable irq for this TX mailbox */ | |
872 | at91_write(priv, AT91_IDR, 1 << mb); | |
873 | ||
874 | /* | |
875 | * only echo if mailbox signals us a transfer | |
876 | * complete (MSR_MRDY). Otherwise it's a tansfer | |
877 | * abort. "can_bus_off()" takes care about the skbs | |
878 | * parked in the echo queue. | |
879 | */ | |
880 | reg_msr = at91_read(priv, AT91_MSR(mb)); | |
881 | if (likely(reg_msr & AT91_MSR_MRDY && | |
882 | ~reg_msr & AT91_MSR_MABT)) { | |
25985edc | 883 | /* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */ |
79008997 | 884 | can_get_echo_skb(dev, mb - get_mb_tx_first(priv)); |
99c4a634 | 885 | dev->stats.tx_packets++; |
4723f2b8 | 886 | can_led_event(dev, CAN_LED_EVENT_TX); |
99c4a634 DM |
887 | } |
888 | } | |
889 | ||
890 | /* | |
891 | * restart queue if we don't have a wrap around but restart if | |
892 | * we get a TX int for the last can frame directly before a | |
893 | * wrap around. | |
894 | */ | |
79008997 MKB |
895 | if ((priv->tx_next & get_next_mask(priv)) != 0 || |
896 | (priv->tx_echo & get_next_mask(priv)) == 0) | |
99c4a634 DM |
897 | netif_wake_queue(dev); |
898 | } | |
899 | ||
900 | static void at91_irq_err_state(struct net_device *dev, | |
901 | struct can_frame *cf, enum can_state new_state) | |
902 | { | |
903 | struct at91_priv *priv = netdev_priv(dev); | |
33a6f298 MKB |
904 | u32 reg_idr = 0, reg_ier = 0; |
905 | struct can_berr_counter bec; | |
99c4a634 | 906 | |
33a6f298 | 907 | at91_get_berr_counter(dev, &bec); |
99c4a634 DM |
908 | |
909 | switch (priv->can.state) { | |
910 | case CAN_STATE_ERROR_ACTIVE: | |
911 | /* | |
912 | * from: ERROR_ACTIVE | |
913 | * to : ERROR_WARNING, ERROR_PASSIVE, BUS_OFF | |
914 | * => : there was a warning int | |
915 | */ | |
916 | if (new_state >= CAN_STATE_ERROR_WARNING && | |
917 | new_state <= CAN_STATE_BUS_OFF) { | |
882055c8 | 918 | netdev_dbg(dev, "Error Warning IRQ\n"); |
99c4a634 DM |
919 | priv->can.can_stats.error_warning++; |
920 | ||
921 | cf->can_id |= CAN_ERR_CRTL; | |
33a6f298 | 922 | cf->data[1] = (bec.txerr > bec.rxerr) ? |
99c4a634 DM |
923 | CAN_ERR_CRTL_TX_WARNING : |
924 | CAN_ERR_CRTL_RX_WARNING; | |
925 | } | |
926 | case CAN_STATE_ERROR_WARNING: /* fallthrough */ | |
927 | /* | |
928 | * from: ERROR_ACTIVE, ERROR_WARNING | |
929 | * to : ERROR_PASSIVE, BUS_OFF | |
930 | * => : error passive int | |
931 | */ | |
932 | if (new_state >= CAN_STATE_ERROR_PASSIVE && | |
933 | new_state <= CAN_STATE_BUS_OFF) { | |
882055c8 | 934 | netdev_dbg(dev, "Error Passive IRQ\n"); |
99c4a634 DM |
935 | priv->can.can_stats.error_passive++; |
936 | ||
937 | cf->can_id |= CAN_ERR_CRTL; | |
33a6f298 | 938 | cf->data[1] = (bec.txerr > bec.rxerr) ? |
99c4a634 DM |
939 | CAN_ERR_CRTL_TX_PASSIVE : |
940 | CAN_ERR_CRTL_RX_PASSIVE; | |
941 | } | |
942 | break; | |
943 | case CAN_STATE_BUS_OFF: | |
944 | /* | |
945 | * from: BUS_OFF | |
946 | * to : ERROR_ACTIVE, ERROR_WARNING, ERROR_PASSIVE | |
947 | */ | |
948 | if (new_state <= CAN_STATE_ERROR_PASSIVE) { | |
949 | cf->can_id |= CAN_ERR_RESTARTED; | |
950 | ||
882055c8 | 951 | netdev_dbg(dev, "restarted\n"); |
99c4a634 DM |
952 | priv->can.can_stats.restarts++; |
953 | ||
954 | netif_carrier_on(dev); | |
955 | netif_wake_queue(dev); | |
956 | } | |
957 | break; | |
958 | default: | |
959 | break; | |
960 | } | |
961 | ||
962 | ||
963 | /* process state changes depending on the new state */ | |
964 | switch (new_state) { | |
965 | case CAN_STATE_ERROR_ACTIVE: | |
966 | /* | |
967 | * actually we want to enable AT91_IRQ_WARN here, but | |
968 | * it screws up the system under certain | |
969 | * circumstances. so just enable AT91_IRQ_ERRP, thus | |
970 | * the "fallthrough" | |
971 | */ | |
882055c8 | 972 | netdev_dbg(dev, "Error Active\n"); |
99c4a634 DM |
973 | cf->can_id |= CAN_ERR_PROT; |
974 | cf->data[2] = CAN_ERR_PROT_ACTIVE; | |
975 | case CAN_STATE_ERROR_WARNING: /* fallthrough */ | |
976 | reg_idr = AT91_IRQ_ERRA | AT91_IRQ_WARN | AT91_IRQ_BOFF; | |
977 | reg_ier = AT91_IRQ_ERRP; | |
978 | break; | |
979 | case CAN_STATE_ERROR_PASSIVE: | |
980 | reg_idr = AT91_IRQ_ERRA | AT91_IRQ_WARN | AT91_IRQ_ERRP; | |
981 | reg_ier = AT91_IRQ_BOFF; | |
982 | break; | |
983 | case CAN_STATE_BUS_OFF: | |
984 | reg_idr = AT91_IRQ_ERRA | AT91_IRQ_ERRP | | |
985 | AT91_IRQ_WARN | AT91_IRQ_BOFF; | |
986 | reg_ier = 0; | |
987 | ||
988 | cf->can_id |= CAN_ERR_BUSOFF; | |
989 | ||
882055c8 | 990 | netdev_dbg(dev, "bus-off\n"); |
99c4a634 DM |
991 | netif_carrier_off(dev); |
992 | priv->can.can_stats.bus_off++; | |
993 | ||
994 | /* turn off chip, if restart is disabled */ | |
995 | if (!priv->can.restart_ms) { | |
996 | at91_chip_stop(dev, CAN_STATE_BUS_OFF); | |
997 | return; | |
998 | } | |
999 | break; | |
1000 | default: | |
1001 | break; | |
1002 | } | |
1003 | ||
1004 | at91_write(priv, AT91_IDR, reg_idr); | |
1005 | at91_write(priv, AT91_IER, reg_ier); | |
1006 | } | |
1007 | ||
6388b396 MKB |
1008 | static int at91_get_state_by_bec(const struct net_device *dev, |
1009 | enum can_state *state) | |
1010 | { | |
1011 | struct can_berr_counter bec; | |
1012 | int err; | |
1013 | ||
1014 | err = at91_get_berr_counter(dev, &bec); | |
1015 | if (err) | |
1016 | return err; | |
1017 | ||
1018 | if (bec.txerr < 96 && bec.rxerr < 96) | |
1019 | *state = CAN_STATE_ERROR_ACTIVE; | |
1020 | else if (bec.txerr < 128 && bec.rxerr < 128) | |
1021 | *state = CAN_STATE_ERROR_WARNING; | |
1022 | else if (bec.txerr < 256 && bec.rxerr < 256) | |
1023 | *state = CAN_STATE_ERROR_PASSIVE; | |
1024 | else | |
1025 | *state = CAN_STATE_BUS_OFF; | |
1026 | ||
1027 | return 0; | |
1028 | } | |
1029 | ||
1030 | ||
99c4a634 DM |
1031 | static void at91_irq_err(struct net_device *dev) |
1032 | { | |
1033 | struct at91_priv *priv = netdev_priv(dev); | |
1034 | struct sk_buff *skb; | |
1035 | struct can_frame *cf; | |
1036 | enum can_state new_state; | |
1037 | u32 reg_sr; | |
6388b396 | 1038 | int err; |
99c4a634 | 1039 | |
6388b396 MKB |
1040 | if (at91_is_sam9263(priv)) { |
1041 | reg_sr = at91_read(priv, AT91_SR); | |
1042 | ||
1043 | /* we need to look at the unmasked reg_sr */ | |
1044 | if (unlikely(reg_sr & AT91_IRQ_BOFF)) | |
1045 | new_state = CAN_STATE_BUS_OFF; | |
1046 | else if (unlikely(reg_sr & AT91_IRQ_ERRP)) | |
1047 | new_state = CAN_STATE_ERROR_PASSIVE; | |
1048 | else if (unlikely(reg_sr & AT91_IRQ_WARN)) | |
1049 | new_state = CAN_STATE_ERROR_WARNING; | |
1050 | else if (likely(reg_sr & AT91_IRQ_ERRA)) | |
1051 | new_state = CAN_STATE_ERROR_ACTIVE; | |
1052 | else { | |
1053 | netdev_err(dev, "BUG! hardware in undefined state\n"); | |
1054 | return; | |
1055 | } | |
1056 | } else { | |
1057 | err = at91_get_state_by_bec(dev, &new_state); | |
1058 | if (err) | |
1059 | return; | |
99c4a634 DM |
1060 | } |
1061 | ||
1062 | /* state hasn't changed */ | |
1063 | if (likely(new_state == priv->can.state)) | |
1064 | return; | |
1065 | ||
1066 | skb = alloc_can_err_skb(dev, &cf); | |
1067 | if (unlikely(!skb)) | |
1068 | return; | |
1069 | ||
1070 | at91_irq_err_state(dev, cf, new_state); | |
1071 | netif_rx(skb); | |
1072 | ||
99c4a634 DM |
1073 | dev->stats.rx_packets++; |
1074 | dev->stats.rx_bytes += cf->can_dlc; | |
1075 | ||
1076 | priv->can.state = new_state; | |
1077 | } | |
1078 | ||
1079 | /* | |
1080 | * interrupt handler | |
1081 | */ | |
1082 | static irqreturn_t at91_irq(int irq, void *dev_id) | |
1083 | { | |
1084 | struct net_device *dev = dev_id; | |
1085 | struct at91_priv *priv = netdev_priv(dev); | |
1086 | irqreturn_t handled = IRQ_NONE; | |
1087 | u32 reg_sr, reg_imr; | |
1088 | ||
1089 | reg_sr = at91_read(priv, AT91_SR); | |
1090 | reg_imr = at91_read(priv, AT91_IMR); | |
1091 | ||
1092 | /* Ignore masked interrupts */ | |
1093 | reg_sr &= reg_imr; | |
1094 | if (!reg_sr) | |
1095 | goto exit; | |
1096 | ||
1097 | handled = IRQ_HANDLED; | |
1098 | ||
1099 | /* Receive or error interrupt? -> napi */ | |
79008997 | 1100 | if (reg_sr & (get_irq_mb_rx(priv) | AT91_IRQ_ERR_FRAME)) { |
99c4a634 DM |
1101 | /* |
1102 | * The error bits are clear on read, | |
1103 | * save for later use. | |
1104 | */ | |
1105 | priv->reg_sr = reg_sr; | |
1106 | at91_write(priv, AT91_IDR, | |
79008997 | 1107 | get_irq_mb_rx(priv) | AT91_IRQ_ERR_FRAME); |
99c4a634 DM |
1108 | napi_schedule(&priv->napi); |
1109 | } | |
1110 | ||
1111 | /* Transmission complete interrupt */ | |
79008997 | 1112 | if (reg_sr & get_irq_mb_tx(priv)) |
99c4a634 DM |
1113 | at91_irq_tx(dev, reg_sr); |
1114 | ||
1115 | at91_irq_err(dev); | |
1116 | ||
1117 | exit: | |
1118 | return handled; | |
1119 | } | |
1120 | ||
1121 | static int at91_open(struct net_device *dev) | |
1122 | { | |
1123 | struct at91_priv *priv = netdev_priv(dev); | |
1124 | int err; | |
1125 | ||
1126 | clk_enable(priv->clk); | |
1127 | ||
1128 | /* check or determine and set bittime */ | |
1129 | err = open_candev(dev); | |
1130 | if (err) | |
1131 | goto out; | |
1132 | ||
1133 | /* register interrupt handler */ | |
1134 | if (request_irq(dev->irq, at91_irq, IRQF_SHARED, | |
1135 | dev->name, dev)) { | |
1136 | err = -EAGAIN; | |
1137 | goto out_close; | |
1138 | } | |
1139 | ||
4723f2b8 FB |
1140 | can_led_event(dev, CAN_LED_EVENT_OPEN); |
1141 | ||
99c4a634 DM |
1142 | /* start chip and queuing */ |
1143 | at91_chip_start(dev); | |
1144 | napi_enable(&priv->napi); | |
1145 | netif_start_queue(dev); | |
1146 | ||
1147 | return 0; | |
1148 | ||
1149 | out_close: | |
1150 | close_candev(dev); | |
1151 | out: | |
1152 | clk_disable(priv->clk); | |
1153 | ||
1154 | return err; | |
1155 | } | |
1156 | ||
1157 | /* | |
1158 | * stop CAN bus activity | |
1159 | */ | |
1160 | static int at91_close(struct net_device *dev) | |
1161 | { | |
1162 | struct at91_priv *priv = netdev_priv(dev); | |
1163 | ||
1164 | netif_stop_queue(dev); | |
1165 | napi_disable(&priv->napi); | |
1166 | at91_chip_stop(dev, CAN_STATE_STOPPED); | |
1167 | ||
1168 | free_irq(dev->irq, dev); | |
1169 | clk_disable(priv->clk); | |
1170 | ||
1171 | close_candev(dev); | |
1172 | ||
4723f2b8 FB |
1173 | can_led_event(dev, CAN_LED_EVENT_STOP); |
1174 | ||
99c4a634 DM |
1175 | return 0; |
1176 | } | |
1177 | ||
1178 | static int at91_set_mode(struct net_device *dev, enum can_mode mode) | |
1179 | { | |
1180 | switch (mode) { | |
1181 | case CAN_MODE_START: | |
1182 | at91_chip_start(dev); | |
1183 | netif_wake_queue(dev); | |
1184 | break; | |
1185 | ||
1186 | default: | |
1187 | return -EOPNOTSUPP; | |
1188 | } | |
1189 | ||
1190 | return 0; | |
1191 | } | |
1192 | ||
1193 | static const struct net_device_ops at91_netdev_ops = { | |
1194 | .ndo_open = at91_open, | |
1195 | .ndo_stop = at91_close, | |
1196 | .ndo_start_xmit = at91_start_xmit, | |
1197 | }; | |
1198 | ||
3a5655a5 MKB |
1199 | static ssize_t at91_sysfs_show_mb0_id(struct device *dev, |
1200 | struct device_attribute *attr, char *buf) | |
1201 | { | |
1202 | struct at91_priv *priv = netdev_priv(to_net_dev(dev)); | |
1203 | ||
1204 | if (priv->mb0_id & CAN_EFF_FLAG) | |
1205 | return snprintf(buf, PAGE_SIZE, "0x%08x\n", priv->mb0_id); | |
1206 | else | |
1207 | return snprintf(buf, PAGE_SIZE, "0x%03x\n", priv->mb0_id); | |
1208 | } | |
1209 | ||
1210 | static ssize_t at91_sysfs_set_mb0_id(struct device *dev, | |
1211 | struct device_attribute *attr, const char *buf, size_t count) | |
1212 | { | |
1213 | struct net_device *ndev = to_net_dev(dev); | |
1214 | struct at91_priv *priv = netdev_priv(ndev); | |
1215 | unsigned long can_id; | |
1216 | ssize_t ret; | |
1217 | int err; | |
1218 | ||
1219 | rtnl_lock(); | |
1220 | ||
1221 | if (ndev->flags & IFF_UP) { | |
1222 | ret = -EBUSY; | |
1223 | goto out; | |
1224 | } | |
1225 | ||
0672f0ab | 1226 | err = kstrtoul(buf, 0, &can_id); |
3a5655a5 MKB |
1227 | if (err) { |
1228 | ret = err; | |
1229 | goto out; | |
1230 | } | |
1231 | ||
1232 | if (can_id & CAN_EFF_FLAG) | |
1233 | can_id &= CAN_EFF_MASK | CAN_EFF_FLAG; | |
1234 | else | |
1235 | can_id &= CAN_SFF_MASK; | |
1236 | ||
1237 | priv->mb0_id = can_id; | |
1238 | ret = count; | |
1239 | ||
1240 | out: | |
1241 | rtnl_unlock(); | |
1242 | return ret; | |
1243 | } | |
1244 | ||
fef52b01 | 1245 | static DEVICE_ATTR(mb0_id, S_IWUSR | S_IRUGO, |
3a5655a5 MKB |
1246 | at91_sysfs_show_mb0_id, at91_sysfs_set_mb0_id); |
1247 | ||
1248 | static struct attribute *at91_sysfs_attrs[] = { | |
1249 | &dev_attr_mb0_id.attr, | |
1250 | NULL, | |
1251 | }; | |
1252 | ||
1253 | static struct attribute_group at91_sysfs_attr_group = { | |
1254 | .attrs = at91_sysfs_attrs, | |
1255 | }; | |
1256 | ||
3078cde7 LD |
1257 | #if defined(CONFIG_OF) |
1258 | static const struct of_device_id at91_can_dt_ids[] = { | |
1259 | { | |
1260 | .compatible = "atmel,at91sam9x5-can", | |
1261 | .data = &at91_at91sam9x5_data, | |
1262 | }, { | |
1263 | .compatible = "atmel,at91sam9263-can", | |
1264 | .data = &at91_at91sam9263_data, | |
1265 | }, { | |
1266 | /* sentinel */ | |
1267 | } | |
1268 | }; | |
1269 | MODULE_DEVICE_TABLE(of, at91_can_dt_ids); | |
3078cde7 LD |
1270 | #endif |
1271 | ||
1272 | static const struct at91_devtype_data *at91_can_get_driver_data(struct platform_device *pdev) | |
1273 | { | |
1274 | if (pdev->dev.of_node) { | |
1275 | const struct of_device_id *match; | |
1276 | ||
1277 | match = of_match_node(at91_can_dt_ids, pdev->dev.of_node); | |
1278 | if (!match) { | |
1279 | dev_err(&pdev->dev, "no matching node found in dtb\n"); | |
1280 | return NULL; | |
1281 | } | |
1282 | return (const struct at91_devtype_data *)match->data; | |
1283 | } | |
1284 | return (const struct at91_devtype_data *) | |
1285 | platform_get_device_id(pdev)->driver_data; | |
1286 | } | |
1287 | ||
3c8ac0f2 | 1288 | static int at91_can_probe(struct platform_device *pdev) |
99c4a634 | 1289 | { |
d3d47264 | 1290 | const struct at91_devtype_data *devtype_data; |
99c4a634 DM |
1291 | struct net_device *dev; |
1292 | struct at91_priv *priv; | |
1293 | struct resource *res; | |
1294 | struct clk *clk; | |
1295 | void __iomem *addr; | |
1296 | int err, irq; | |
1297 | ||
3078cde7 LD |
1298 | devtype_data = at91_can_get_driver_data(pdev); |
1299 | if (!devtype_data) { | |
1300 | dev_err(&pdev->dev, "no driver data\n"); | |
1301 | err = -ENODEV; | |
1302 | goto exit; | |
1303 | } | |
d3d47264 | 1304 | |
99c4a634 DM |
1305 | clk = clk_get(&pdev->dev, "can_clk"); |
1306 | if (IS_ERR(clk)) { | |
1307 | dev_err(&pdev->dev, "no clock defined\n"); | |
1308 | err = -ENODEV; | |
1309 | goto exit; | |
1310 | } | |
1311 | ||
1312 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1313 | irq = platform_get_irq(pdev, 0); | |
4773a47d | 1314 | if (!res || irq <= 0) { |
99c4a634 DM |
1315 | err = -ENODEV; |
1316 | goto exit_put; | |
1317 | } | |
1318 | ||
1319 | if (!request_mem_region(res->start, | |
1320 | resource_size(res), | |
1321 | pdev->name)) { | |
1322 | err = -EBUSY; | |
1323 | goto exit_put; | |
1324 | } | |
1325 | ||
1326 | addr = ioremap_nocache(res->start, resource_size(res)); | |
1327 | if (!addr) { | |
1328 | err = -ENOMEM; | |
1329 | goto exit_release; | |
1330 | } | |
1331 | ||
d3d47264 MKB |
1332 | dev = alloc_candev(sizeof(struct at91_priv), |
1333 | 1 << devtype_data->tx_shift); | |
99c4a634 DM |
1334 | if (!dev) { |
1335 | err = -ENOMEM; | |
1336 | goto exit_iounmap; | |
1337 | } | |
1338 | ||
1339 | dev->netdev_ops = &at91_netdev_ops; | |
1340 | dev->irq = irq; | |
1341 | dev->flags |= IFF_ECHO; | |
1342 | ||
1343 | priv = netdev_priv(dev); | |
1344 | priv->can.clock.freq = clk_get_rate(clk); | |
1345 | priv->can.bittiming_const = &at91_bittiming_const; | |
99c4a634 | 1346 | priv->can.do_set_mode = at91_set_mode; |
33a6f298 | 1347 | priv->can.do_get_berr_counter = at91_get_berr_counter; |
17a50ee4 YDR |
1348 | priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES | |
1349 | CAN_CTRLMODE_LISTENONLY; | |
99c4a634 | 1350 | priv->dev = dev; |
d3d47264 MKB |
1351 | priv->reg_base = addr; |
1352 | priv->devtype_data = *devtype_data; | |
99c4a634 | 1353 | priv->clk = clk; |
6cbdb918 | 1354 | priv->pdata = dev_get_platdata(&pdev->dev); |
3a5655a5 | 1355 | priv->mb0_id = 0x7ff; |
99c4a634 | 1356 | |
d3d47264 | 1357 | netif_napi_add(dev, &priv->napi, at91_poll, get_mb_rx_num(priv)); |
99c4a634 | 1358 | |
07a648e6 MKB |
1359 | if (at91_is_sam9263(priv)) |
1360 | dev->sysfs_groups[0] = &at91_sysfs_attr_group; | |
1361 | ||
40f7e0dd | 1362 | platform_set_drvdata(pdev, dev); |
99c4a634 DM |
1363 | SET_NETDEV_DEV(dev, &pdev->dev); |
1364 | ||
1365 | err = register_candev(dev); | |
1366 | if (err) { | |
1367 | dev_err(&pdev->dev, "registering netdev failed\n"); | |
1368 | goto exit_free; | |
1369 | } | |
1370 | ||
4723f2b8 FB |
1371 | devm_can_led_init(dev); |
1372 | ||
99c4a634 DM |
1373 | dev_info(&pdev->dev, "device registered (reg_base=%p, irq=%d)\n", |
1374 | priv->reg_base, dev->irq); | |
1375 | ||
1376 | return 0; | |
1377 | ||
1378 | exit_free: | |
759a6c76 | 1379 | free_candev(dev); |
99c4a634 DM |
1380 | exit_iounmap: |
1381 | iounmap(addr); | |
1382 | exit_release: | |
1383 | release_mem_region(res->start, resource_size(res)); | |
1384 | exit_put: | |
1385 | clk_put(clk); | |
1386 | exit: | |
1387 | return err; | |
1388 | } | |
1389 | ||
3c8ac0f2 | 1390 | static int at91_can_remove(struct platform_device *pdev) |
99c4a634 DM |
1391 | { |
1392 | struct net_device *dev = platform_get_drvdata(pdev); | |
1393 | struct at91_priv *priv = netdev_priv(dev); | |
1394 | struct resource *res; | |
1395 | ||
1396 | unregister_netdev(dev); | |
1397 | ||
99c4a634 DM |
1398 | iounmap(priv->reg_base); |
1399 | ||
1400 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1401 | release_mem_region(res->start, resource_size(res)); | |
1402 | ||
1403 | clk_put(priv->clk); | |
1404 | ||
759a6c76 MKB |
1405 | free_candev(dev); |
1406 | ||
99c4a634 DM |
1407 | return 0; |
1408 | } | |
1409 | ||
d3d47264 MKB |
1410 | static const struct platform_device_id at91_can_id_table[] = { |
1411 | { | |
5abbeea5 | 1412 | .name = "at91sam9x5_can", |
3078cde7 | 1413 | .driver_data = (kernel_ulong_t)&at91_at91sam9x5_data, |
6388b396 | 1414 | }, { |
5abbeea5 | 1415 | .name = "at91_can", |
3078cde7 | 1416 | .driver_data = (kernel_ulong_t)&at91_at91sam9263_data, |
d3d47264 MKB |
1417 | }, { |
1418 | /* sentinel */ | |
1419 | } | |
1420 | }; | |
09ca71ca | 1421 | MODULE_DEVICE_TABLE(platform, at91_can_id_table); |
d3d47264 | 1422 | |
99c4a634 | 1423 | static struct platform_driver at91_can_driver = { |
44d85666 | 1424 | .probe = at91_can_probe, |
3c8ac0f2 | 1425 | .remove = at91_can_remove, |
44d85666 MKB |
1426 | .driver = { |
1427 | .name = KBUILD_MODNAME, | |
1428 | .owner = THIS_MODULE, | |
1f3e4b0c | 1429 | .of_match_table = of_match_ptr(at91_can_dt_ids), |
99c4a634 | 1430 | }, |
d3d47264 | 1431 | .id_table = at91_can_id_table, |
99c4a634 DM |
1432 | }; |
1433 | ||
871d3372 | 1434 | module_platform_driver(at91_can_driver); |
99c4a634 DM |
1435 | |
1436 | MODULE_AUTHOR("Marc Kleine-Budde <mkl@pengutronix.de>"); | |
1437 | MODULE_LICENSE("GPL v2"); | |
00389b08 | 1438 | MODULE_DESCRIPTION(KBUILD_MODNAME " CAN netdevice driver"); |