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631eb227
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1/*
2 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
3 *
4 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
631eb227
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14#include <linux/interrupt.h>
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17
18#include <linux/netdevice.h>
19#include <linux/can.h>
20#include <linux/can/dev.h>
0ae89beb 21#include <linux/can/skb.h>
631eb227
IS
22#include <linux/can/error.h>
23
24#include <linux/mfd/janz.h>
b7f080cf 25#include <asm/io.h>
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IS
26
27/* the DPM has 64k of memory, organized into 256x 256 byte pages */
28#define DPM_NUM_PAGES 256
29#define DPM_PAGE_SIZE 256
30#define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
31
32/* JANZ ICAN3 "old-style" host interface queue page numbers */
33#define QUEUE_OLD_CONTROL 0
34#define QUEUE_OLD_RB0 1
35#define QUEUE_OLD_RB1 2
36#define QUEUE_OLD_WB0 3
37#define QUEUE_OLD_WB1 4
38
39/* Janz ICAN3 "old-style" host interface control registers */
40#define MSYNC_PEER 0x00 /* ICAN only */
41#define MSYNC_LOCL 0x01 /* host only */
42#define TARGET_RUNNING 0x02
43
44#define MSYNC_RB0 0x01
45#define MSYNC_RB1 0x02
46#define MSYNC_RBLW 0x04
47#define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
48
49#define MSYNC_WB0 0x10
50#define MSYNC_WB1 0x20
51#define MSYNC_WBLW 0x40
52#define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
53
54/* Janz ICAN3 "new-style" host interface queue page numbers */
55#define QUEUE_TOHOST 5
56#define QUEUE_FROMHOST_MID 6
57#define QUEUE_FROMHOST_HIGH 7
58#define QUEUE_FROMHOST_LOW 8
59
60/* The first free page in the DPM is #9 */
61#define DPM_FREE_START 9
62
63/* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
64#define DESC_VALID 0x80
65#define DESC_WRAP 0x40
66#define DESC_INTERRUPT 0x20
67#define DESC_IVALID 0x10
68#define DESC_LEN(len) (len)
69
70/* Janz ICAN3 Firmware Messages */
71#define MSG_CONNECTI 0x02
72#define MSG_DISCONNECT 0x03
73#define MSG_IDVERS 0x04
74#define MSG_MSGLOST 0x05
75#define MSG_NEWHOSTIF 0x08
76#define MSG_INQUIRY 0x0a
77#define MSG_SETAFILMASK 0x10
78#define MSG_INITFDPMQUEUE 0x11
79#define MSG_HWCONF 0x12
80#define MSG_FMSGLOST 0x15
81#define MSG_CEVTIND 0x37
82#define MSG_CBTRREQ 0x41
83#define MSG_COFFREQ 0x42
84#define MSG_CONREQ 0x43
85#define MSG_CCONFREQ 0x47
86
87/*
88 * Janz ICAN3 CAN Inquiry Message Types
89 *
90 * NOTE: there appears to be a firmware bug here. You must send
91 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
92 * NOTE: response. The controller never responds to a message with
93 * NOTE: the INQUIRY_EXTENDED subspec :(
94 */
95#define INQUIRY_STATUS 0x00
96#define INQUIRY_TERMINATION 0x01
97#define INQUIRY_EXTENDED 0x04
98
99/* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
100#define SETAFILMASK_REJECT 0x00
101#define SETAFILMASK_FASTIF 0x02
102
103/* Janz ICAN3 CAN Hardware Configuration Message Types */
104#define HWCONF_TERMINATE_ON 0x01
105#define HWCONF_TERMINATE_OFF 0x00
106
107/* Janz ICAN3 CAN Event Indication Message Types */
108#define CEVTIND_EI 0x01
109#define CEVTIND_DOI 0x02
110#define CEVTIND_LOST 0x04
111#define CEVTIND_FULL 0x08
112#define CEVTIND_BEI 0x10
113
114#define CEVTIND_CHIP_SJA1000 0x02
115
116#define ICAN3_BUSERR_QUOTA_MAX 255
117
118/* Janz ICAN3 CAN Frame Conversion */
3b5c6b9e 119#define ICAN3_SNGL 0x02
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120#define ICAN3_ECHO 0x10
121#define ICAN3_EFF_RTR 0x40
122#define ICAN3_SFF_RTR 0x10
123#define ICAN3_EFF 0x80
124
125#define ICAN3_CAN_TYPE_MASK 0x0f
126#define ICAN3_CAN_TYPE_SFF 0x00
127#define ICAN3_CAN_TYPE_EFF 0x01
128
129#define ICAN3_CAN_DLC_MASK 0x0f
130
131/*
132 * SJA1000 Status and Error Register Definitions
133 *
134 * Copied from drivers/net/can/sja1000/sja1000.h
135 */
136
137/* status register content */
138#define SR_BS 0x80
139#define SR_ES 0x40
140#define SR_TS 0x20
141#define SR_RS 0x10
142#define SR_TCS 0x08
143#define SR_TBS 0x04
144#define SR_DOS 0x02
145#define SR_RBS 0x01
146
147#define SR_CRIT (SR_BS|SR_ES)
148
149/* ECC register */
150#define ECC_SEG 0x1F
151#define ECC_DIR 0x20
152#define ECC_ERR 6
153#define ECC_BIT 0x00
154#define ECC_FORM 0x40
155#define ECC_STUFF 0x80
156#define ECC_MASK 0xc0
157
158/* Number of buffers for use in the "new-style" host interface */
159#define ICAN3_NEW_BUFFERS 16
160
161/* Number of buffers for use in the "fast" host interface */
162#define ICAN3_TX_BUFFERS 512
163#define ICAN3_RX_BUFFERS 1024
164
165/* SJA1000 Clock Input */
166#define ICAN3_CAN_CLOCK 8000000
167
168/* Driver Name */
169#define DRV_NAME "janz-ican3"
170
171/* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
172struct ican3_dpm_control {
173 /* window address register */
174 u8 window_address;
175 u8 unused1;
176
177 /*
178 * Read access: clear interrupt from microcontroller
179 * Write access: send interrupt to microcontroller
180 */
181 u8 interrupt;
182 u8 unused2;
183
184 /* write-only: reset all hardware on the module */
185 u8 hwreset;
186 u8 unused3;
187
188 /* write-only: generate an interrupt to the TPU */
189 u8 tpuinterrupt;
190};
191
192struct ican3_dev {
193
194 /* must be the first member */
195 struct can_priv can;
196
197 /* CAN network device */
198 struct net_device *ndev;
199 struct napi_struct napi;
200
201 /* Device for printing */
202 struct device *dev;
203
204 /* module number */
205 unsigned int num;
206
207 /* base address of registers and IRQ */
208 struct janz_cmodio_onboard_regs __iomem *ctrl;
209 struct ican3_dpm_control __iomem *dpmctrl;
210 void __iomem *dpm;
211 int irq;
212
213 /* CAN bus termination status */
214 struct completion termination_comp;
215 bool termination_enabled;
216
217 /* CAN bus error status registers */
218 struct completion buserror_comp;
219 struct can_berr_counter bec;
220
221 /* old and new style host interface */
222 unsigned int iftype;
223
83702f69
IS
224 /* queue for echo packets */
225 struct sk_buff_head echoq;
226
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IS
227 /*
228 * Any function which changes the current DPM page must hold this
229 * lock while it is performing data accesses. This ensures that the
230 * function will not be preempted and end up reading data from a
231 * different DPM page than it expects.
232 */
233 spinlock_t lock;
234
235 /* new host interface */
236 unsigned int rx_int;
237 unsigned int rx_num;
238 unsigned int tx_num;
239
240 /* fast host interface */
241 unsigned int fastrx_start;
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IS
242 unsigned int fastrx_num;
243 unsigned int fasttx_start;
244 unsigned int fasttx_num;
245
246 /* first free DPM page */
247 unsigned int free_page;
248};
249
250struct ican3_msg {
251 u8 control;
252 u8 spec;
253 __le16 len;
254 u8 data[252];
255};
256
257struct ican3_new_desc {
258 u8 control;
259 u8 pointer;
260};
261
262struct ican3_fast_desc {
263 u8 control;
264 u8 command;
265 u8 data[14];
266};
267
268/* write to the window basic address register */
269static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
270{
271 BUG_ON(page >= DPM_NUM_PAGES);
272 iowrite8(page, &mod->dpmctrl->window_address);
273}
274
275/*
276 * ICAN3 "old-style" host interface
277 */
278
279/*
25985edc 280 * Receive a message from the ICAN3 "old-style" firmware interface
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281 *
282 * LOCKING: must hold mod->lock
283 *
284 * returns 0 on success, -ENOMEM when no message exists
285 */
286static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
287{
288 unsigned int mbox, mbox_page;
289 u8 locl, peer, xord;
290
291 /* get the MSYNC registers */
292 ican3_set_page(mod, QUEUE_OLD_CONTROL);
293 peer = ioread8(mod->dpm + MSYNC_PEER);
294 locl = ioread8(mod->dpm + MSYNC_LOCL);
295 xord = locl ^ peer;
296
297 if ((xord & MSYNC_RB_MASK) == 0x00) {
298 dev_dbg(mod->dev, "no mbox for reading\n");
299 return -ENOMEM;
300 }
301
302 /* find the first free mbox to read */
303 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
304 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
305 else
306 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
307
308 /* copy the message */
309 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
310 ican3_set_page(mod, mbox_page);
311 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
312
313 /*
314 * notify the firmware that the read buffer is available
315 * for it to fill again
316 */
317 locl ^= mbox;
318
319 ican3_set_page(mod, QUEUE_OLD_CONTROL);
320 iowrite8(locl, mod->dpm + MSYNC_LOCL);
321 return 0;
322}
323
324/*
325 * Send a message through the "old-style" firmware interface
326 *
327 * LOCKING: must hold mod->lock
328 *
329 * returns 0 on success, -ENOMEM when no free space exists
330 */
331static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
332{
333 unsigned int mbox, mbox_page;
334 u8 locl, peer, xord;
335
336 /* get the MSYNC registers */
337 ican3_set_page(mod, QUEUE_OLD_CONTROL);
338 peer = ioread8(mod->dpm + MSYNC_PEER);
339 locl = ioread8(mod->dpm + MSYNC_LOCL);
340 xord = locl ^ peer;
341
342 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
343 dev_err(mod->dev, "no mbox for writing\n");
344 return -ENOMEM;
345 }
346
347 /* calculate a free mbox to use */
348 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
349
350 /* copy the message to the DPM */
351 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
352 ican3_set_page(mod, mbox_page);
353 memcpy_toio(mod->dpm, msg, sizeof(*msg));
354
355 locl ^= mbox;
356 if (mbox == MSYNC_WB1)
357 locl |= MSYNC_WBLW;
358
359 ican3_set_page(mod, QUEUE_OLD_CONTROL);
360 iowrite8(locl, mod->dpm + MSYNC_LOCL);
361 return 0;
362}
363
364/*
365 * ICAN3 "new-style" Host Interface Setup
366 */
367
3c8ac0f2 368static void ican3_init_new_host_interface(struct ican3_dev *mod)
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369{
370 struct ican3_new_desc desc;
371 unsigned long flags;
372 void __iomem *dst;
373 int i;
374
375 spin_lock_irqsave(&mod->lock, flags);
376
377 /* setup the internal datastructures for RX */
378 mod->rx_num = 0;
379 mod->rx_int = 0;
380
381 /* tohost queue descriptors are in page 5 */
382 ican3_set_page(mod, QUEUE_TOHOST);
383 dst = mod->dpm;
384
385 /* initialize the tohost (rx) queue descriptors: pages 9-24 */
386 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
387 desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
388 desc.pointer = mod->free_page;
389
390 /* set wrap flag on last buffer */
391 if (i == ICAN3_NEW_BUFFERS - 1)
392 desc.control |= DESC_WRAP;
393
394 memcpy_toio(dst, &desc, sizeof(desc));
395 dst += sizeof(desc);
396 mod->free_page++;
397 }
398
399 /* fromhost (tx) mid queue descriptors are in page 6 */
400 ican3_set_page(mod, QUEUE_FROMHOST_MID);
401 dst = mod->dpm;
402
403 /* setup the internal datastructures for TX */
404 mod->tx_num = 0;
405
406 /* initialize the fromhost mid queue descriptors: pages 25-40 */
407 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
408 desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
409 desc.pointer = mod->free_page;
410
411 /* set wrap flag on last buffer */
412 if (i == ICAN3_NEW_BUFFERS - 1)
413 desc.control |= DESC_WRAP;
414
415 memcpy_toio(dst, &desc, sizeof(desc));
416 dst += sizeof(desc);
417 mod->free_page++;
418 }
419
420 /* fromhost hi queue descriptors are in page 7 */
421 ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
422 dst = mod->dpm;
423
424 /* initialize only a single buffer in the fromhost hi queue (unused) */
425 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
426 desc.pointer = mod->free_page;
427 memcpy_toio(dst, &desc, sizeof(desc));
428 mod->free_page++;
429
430 /* fromhost low queue descriptors are in page 8 */
431 ican3_set_page(mod, QUEUE_FROMHOST_LOW);
432 dst = mod->dpm;
433
434 /* initialize only a single buffer in the fromhost low queue (unused) */
435 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
436 desc.pointer = mod->free_page;
437 memcpy_toio(dst, &desc, sizeof(desc));
438 mod->free_page++;
439
440 spin_unlock_irqrestore(&mod->lock, flags);
441}
442
443/*
444 * ICAN3 Fast Host Interface Setup
445 */
446
3c8ac0f2 447static void ican3_init_fast_host_interface(struct ican3_dev *mod)
631eb227
IS
448{
449 struct ican3_fast_desc desc;
450 unsigned long flags;
451 unsigned int addr;
452 void __iomem *dst;
453 int i;
454
455 spin_lock_irqsave(&mod->lock, flags);
456
457 /* save the start recv page */
458 mod->fastrx_start = mod->free_page;
459 mod->fastrx_num = 0;
631eb227
IS
460
461 /* build a single fast tohost queue descriptor */
462 memset(&desc, 0, sizeof(desc));
463 desc.control = 0x00;
464 desc.command = 1;
465
466 /* build the tohost queue descriptor ring in memory */
467 addr = 0;
468 for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
469
470 /* set the wrap bit on the last buffer */
471 if (i == ICAN3_RX_BUFFERS - 1)
472 desc.control |= DESC_WRAP;
473
474 /* switch to the correct page */
475 ican3_set_page(mod, mod->free_page);
476
477 /* copy the descriptor to the DPM */
478 dst = mod->dpm + addr;
479 memcpy_toio(dst, &desc, sizeof(desc));
480 addr += sizeof(desc);
481
482 /* move to the next page if necessary */
483 if (addr >= DPM_PAGE_SIZE) {
484 addr = 0;
485 mod->free_page++;
486 }
487 }
488
489 /* make sure we page-align the next queue */
490 if (addr != 0)
491 mod->free_page++;
492
493 /* save the start xmit page */
494 mod->fasttx_start = mod->free_page;
495 mod->fasttx_num = 0;
496
497 /* build a single fast fromhost queue descriptor */
498 memset(&desc, 0, sizeof(desc));
499 desc.control = DESC_VALID;
500 desc.command = 1;
501
502 /* build the fromhost queue descriptor ring in memory */
503 addr = 0;
504 for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
505
506 /* set the wrap bit on the last buffer */
507 if (i == ICAN3_TX_BUFFERS - 1)
508 desc.control |= DESC_WRAP;
509
510 /* switch to the correct page */
511 ican3_set_page(mod, mod->free_page);
512
513 /* copy the descriptor to the DPM */
514 dst = mod->dpm + addr;
515 memcpy_toio(dst, &desc, sizeof(desc));
516 addr += sizeof(desc);
517
518 /* move to the next page if necessary */
519 if (addr >= DPM_PAGE_SIZE) {
520 addr = 0;
521 mod->free_page++;
522 }
523 }
524
525 spin_unlock_irqrestore(&mod->lock, flags);
526}
527
528/*
529 * ICAN3 "new-style" Host Interface Message Helpers
530 */
531
532/*
533 * LOCKING: must hold mod->lock
534 */
535static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
536{
537 struct ican3_new_desc desc;
538 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
539
540 /* switch to the fromhost mid queue, and read the buffer descriptor */
541 ican3_set_page(mod, QUEUE_FROMHOST_MID);
542 memcpy_fromio(&desc, desc_addr, sizeof(desc));
543
544 if (!(desc.control & DESC_VALID)) {
545 dev_dbg(mod->dev, "%s: no free buffers\n", __func__);
546 return -ENOMEM;
547 }
548
549 /* switch to the data page, copy the data */
550 ican3_set_page(mod, desc.pointer);
551 memcpy_toio(mod->dpm, msg, sizeof(*msg));
552
553 /* switch back to the descriptor, set the valid bit, write it back */
554 ican3_set_page(mod, QUEUE_FROMHOST_MID);
555 desc.control ^= DESC_VALID;
556 memcpy_toio(desc_addr, &desc, sizeof(desc));
557
558 /* update the tx number */
559 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
560 return 0;
561}
562
563/*
564 * LOCKING: must hold mod->lock
565 */
566static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
567{
568 struct ican3_new_desc desc;
569 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
570
571 /* switch to the tohost queue, and read the buffer descriptor */
572 ican3_set_page(mod, QUEUE_TOHOST);
573 memcpy_fromio(&desc, desc_addr, sizeof(desc));
574
575 if (!(desc.control & DESC_VALID)) {
576 dev_dbg(mod->dev, "%s: no buffers to recv\n", __func__);
577 return -ENOMEM;
578 }
579
580 /* switch to the data page, copy the data */
581 ican3_set_page(mod, desc.pointer);
582 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
583
584 /* switch back to the descriptor, toggle the valid bit, write it back */
585 ican3_set_page(mod, QUEUE_TOHOST);
586 desc.control ^= DESC_VALID;
587 memcpy_toio(desc_addr, &desc, sizeof(desc));
588
589 /* update the rx number */
590 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
591 return 0;
592}
593
594/*
595 * Message Send / Recv Helpers
596 */
597
598static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
599{
600 unsigned long flags;
601 int ret;
602
603 spin_lock_irqsave(&mod->lock, flags);
604
605 if (mod->iftype == 0)
606 ret = ican3_old_send_msg(mod, msg);
607 else
608 ret = ican3_new_send_msg(mod, msg);
609
610 spin_unlock_irqrestore(&mod->lock, flags);
611 return ret;
612}
613
614static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
615{
616 unsigned long flags;
617 int ret;
618
619 spin_lock_irqsave(&mod->lock, flags);
620
621 if (mod->iftype == 0)
622 ret = ican3_old_recv_msg(mod, msg);
623 else
624 ret = ican3_new_recv_msg(mod, msg);
625
626 spin_unlock_irqrestore(&mod->lock, flags);
627 return ret;
628}
629
630/*
631 * Quick Pre-constructed Messages
632 */
633
3c8ac0f2 634static int ican3_msg_connect(struct ican3_dev *mod)
631eb227
IS
635{
636 struct ican3_msg msg;
637
638 memset(&msg, 0, sizeof(msg));
639 msg.spec = MSG_CONNECTI;
640 msg.len = cpu_to_le16(0);
641
642 return ican3_send_msg(mod, &msg);
643}
644
3c8ac0f2 645static int ican3_msg_disconnect(struct ican3_dev *mod)
631eb227
IS
646{
647 struct ican3_msg msg;
648
649 memset(&msg, 0, sizeof(msg));
650 msg.spec = MSG_DISCONNECT;
651 msg.len = cpu_to_le16(0);
652
653 return ican3_send_msg(mod, &msg);
654}
655
3c8ac0f2 656static int ican3_msg_newhostif(struct ican3_dev *mod)
631eb227
IS
657{
658 struct ican3_msg msg;
659 int ret;
660
661 memset(&msg, 0, sizeof(msg));
662 msg.spec = MSG_NEWHOSTIF;
663 msg.len = cpu_to_le16(0);
664
665 /* If we're not using the old interface, switching seems bogus */
666 WARN_ON(mod->iftype != 0);
667
668 ret = ican3_send_msg(mod, &msg);
669 if (ret)
670 return ret;
671
672 /* mark the module as using the new host interface */
673 mod->iftype = 1;
674 return 0;
675}
676
3c8ac0f2 677static int ican3_msg_fasthostif(struct ican3_dev *mod)
631eb227
IS
678{
679 struct ican3_msg msg;
680 unsigned int addr;
681
682 memset(&msg, 0, sizeof(msg));
683 msg.spec = MSG_INITFDPMQUEUE;
684 msg.len = cpu_to_le16(8);
685
686 /* write the tohost queue start address */
687 addr = DPM_PAGE_ADDR(mod->fastrx_start);
688 msg.data[0] = addr & 0xff;
689 msg.data[1] = (addr >> 8) & 0xff;
690 msg.data[2] = (addr >> 16) & 0xff;
691 msg.data[3] = (addr >> 24) & 0xff;
692
693 /* write the fromhost queue start address */
694 addr = DPM_PAGE_ADDR(mod->fasttx_start);
695 msg.data[4] = addr & 0xff;
696 msg.data[5] = (addr >> 8) & 0xff;
697 msg.data[6] = (addr >> 16) & 0xff;
698 msg.data[7] = (addr >> 24) & 0xff;
699
700 /* If we're not using the new interface yet, we cannot do this */
701 WARN_ON(mod->iftype != 1);
702
703 return ican3_send_msg(mod, &msg);
704}
705
706/*
707 * Setup the CAN filter to either accept or reject all
708 * messages from the CAN bus.
709 */
3c8ac0f2 710static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
631eb227
IS
711{
712 struct ican3_msg msg;
713 int ret;
714
715 /* Standard Frame Format */
716 memset(&msg, 0, sizeof(msg));
717 msg.spec = MSG_SETAFILMASK;
718 msg.len = cpu_to_le16(5);
719 msg.data[0] = 0x00; /* IDLo LSB */
720 msg.data[1] = 0x00; /* IDLo MSB */
721 msg.data[2] = 0xff; /* IDHi LSB */
722 msg.data[3] = 0x07; /* IDHi MSB */
723
724 /* accept all frames for fast host if, or reject all frames */
725 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
726
727 ret = ican3_send_msg(mod, &msg);
728 if (ret)
729 return ret;
730
731 /* Extended Frame Format */
732 memset(&msg, 0, sizeof(msg));
733 msg.spec = MSG_SETAFILMASK;
734 msg.len = cpu_to_le16(13);
735 msg.data[0] = 0; /* MUX = 0 */
736 msg.data[1] = 0x00; /* IDLo LSB */
737 msg.data[2] = 0x00;
738 msg.data[3] = 0x00;
739 msg.data[4] = 0x20; /* IDLo MSB */
740 msg.data[5] = 0xff; /* IDHi LSB */
741 msg.data[6] = 0xff;
742 msg.data[7] = 0xff;
743 msg.data[8] = 0x3f; /* IDHi MSB */
744
745 /* accept all frames for fast host if, or reject all frames */
746 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
747
748 return ican3_send_msg(mod, &msg);
749}
750
751/*
752 * Bring the CAN bus online or offline
753 */
754static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
755{
756 struct ican3_msg msg;
757
758 memset(&msg, 0, sizeof(msg));
759 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
760 msg.len = cpu_to_le16(0);
761
762 return ican3_send_msg(mod, &msg);
763}
764
765static int ican3_set_termination(struct ican3_dev *mod, bool on)
766{
767 struct ican3_msg msg;
768
769 memset(&msg, 0, sizeof(msg));
770 msg.spec = MSG_HWCONF;
771 msg.len = cpu_to_le16(2);
772 msg.data[0] = 0x00;
773 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
774
775 return ican3_send_msg(mod, &msg);
776}
777
778static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
779{
780 struct ican3_msg msg;
781
782 memset(&msg, 0, sizeof(msg));
783 msg.spec = MSG_INQUIRY;
784 msg.len = cpu_to_le16(2);
785 msg.data[0] = subspec;
786 msg.data[1] = 0x00;
787
788 return ican3_send_msg(mod, &msg);
789}
790
791static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
792{
793 struct ican3_msg msg;
794
795 memset(&msg, 0, sizeof(msg));
796 msg.spec = MSG_CCONFREQ;
797 msg.len = cpu_to_le16(2);
798 msg.data[0] = 0x00;
799 msg.data[1] = quota;
800
801 return ican3_send_msg(mod, &msg);
802}
803
804/*
805 * ICAN3 to Linux CAN Frame Conversion
806 */
807
808static void ican3_to_can_frame(struct ican3_dev *mod,
809 struct ican3_fast_desc *desc,
810 struct can_frame *cf)
811{
812 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
813 if (desc->data[1] & ICAN3_SFF_RTR)
814 cf->can_id |= CAN_RTR_FLAG;
815
816 cf->can_id |= desc->data[0] << 3;
817 cf->can_id |= (desc->data[1] & 0xe0) >> 5;
9e4d6909
MKB
818 cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
819 memcpy(cf->data, &desc->data[2], cf->can_dlc);
631eb227 820 } else {
9e4d6909 821 cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
631eb227
IS
822 if (desc->data[0] & ICAN3_EFF_RTR)
823 cf->can_id |= CAN_RTR_FLAG;
824
825 if (desc->data[0] & ICAN3_EFF) {
826 cf->can_id |= CAN_EFF_FLAG;
827 cf->can_id |= desc->data[2] << 21; /* 28-21 */
828 cf->can_id |= desc->data[3] << 13; /* 20-13 */
829 cf->can_id |= desc->data[4] << 5; /* 12-5 */
830 cf->can_id |= (desc->data[5] & 0xf8) >> 3;
831 } else {
832 cf->can_id |= desc->data[2] << 3; /* 10-3 */
833 cf->can_id |= desc->data[3] >> 5; /* 2-0 */
834 }
835
9e4d6909 836 memcpy(cf->data, &desc->data[6], cf->can_dlc);
631eb227
IS
837 }
838}
839
840static void can_frame_to_ican3(struct ican3_dev *mod,
841 struct can_frame *cf,
842 struct ican3_fast_desc *desc)
843{
844 /* clear out any stale data in the descriptor */
845 memset(desc->data, 0, sizeof(desc->data));
846
847 /* we always use the extended format, with the ECHO flag set */
848 desc->command = ICAN3_CAN_TYPE_EFF;
849 desc->data[0] |= cf->can_dlc;
850 desc->data[1] |= ICAN3_ECHO;
851
3b5c6b9e
IS
852 /* support single transmission (no retries) mode */
853 if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
854 desc->data[1] |= ICAN3_SNGL;
855
631eb227
IS
856 if (cf->can_id & CAN_RTR_FLAG)
857 desc->data[0] |= ICAN3_EFF_RTR;
858
859 /* pack the id into the correct places */
860 if (cf->can_id & CAN_EFF_FLAG) {
861 desc->data[0] |= ICAN3_EFF;
862 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
863 desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
864 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
865 desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
866 } else {
867 desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
868 desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
869 }
870
871 /* copy the data bits into the descriptor */
9e4d6909 872 memcpy(&desc->data[6], cf->data, cf->can_dlc);
631eb227
IS
873}
874
875/*
876 * Interrupt Handling
877 */
878
879/*
880 * Handle an ID + Version message response from the firmware. We never generate
881 * this message in production code, but it is very useful when debugging to be
882 * able to display this message.
883 */
884static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
885{
886 dev_dbg(mod->dev, "IDVERS response: %s\n", msg->data);
887}
888
889static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
890{
891 struct net_device *dev = mod->ndev;
892 struct net_device_stats *stats = &dev->stats;
893 struct can_frame *cf;
894 struct sk_buff *skb;
895
896 /*
897 * Report that communication messages with the microcontroller firmware
898 * are being lost. These are never CAN frames, so we do not generate an
899 * error frame for userspace
900 */
901 if (msg->spec == MSG_MSGLOST) {
902 dev_err(mod->dev, "lost %d control messages\n", msg->data[0]);
903 return;
904 }
905
906 /*
907 * Oops, this indicates that we have lost messages in the fast queue,
908 * which are exclusively CAN messages. Our driver isn't reading CAN
909 * frames fast enough.
910 *
911 * We'll pretend that the SJA1000 told us that it ran out of buffer
912 * space, because there is not a better message for this.
913 */
914 skb = alloc_can_err_skb(dev, &cf);
915 if (skb) {
916 cf->can_id |= CAN_ERR_CRTL;
917 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
88b58703 918 stats->rx_over_errors++;
631eb227 919 stats->rx_errors++;
631eb227
IS
920 netif_rx(skb);
921 }
922}
923
924/*
925 * Handle CAN Event Indication Messages from the firmware
926 *
927 * The ICAN3 firmware provides the values of some SJA1000 registers when it
928 * generates this message. The code below is largely copied from the
929 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
930 */
931static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
932{
933 struct net_device *dev = mod->ndev;
934 struct net_device_stats *stats = &dev->stats;
935 enum can_state state = mod->can.state;
83702f69 936 u8 isrc, ecc, status, rxerr, txerr;
631eb227
IS
937 struct can_frame *cf;
938 struct sk_buff *skb;
939
940 /* we can only handle the SJA1000 part */
941 if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
942 dev_err(mod->dev, "unable to handle errors on non-SJA1000\n");
943 return -ENODEV;
944 }
945
946 /* check the message length for sanity */
947 if (le16_to_cpu(msg->len) < 6) {
948 dev_err(mod->dev, "error message too short\n");
949 return -EINVAL;
950 }
951
631eb227 952 isrc = msg->data[0];
83702f69 953 ecc = msg->data[2];
631eb227
IS
954 status = msg->data[3];
955 rxerr = msg->data[4];
956 txerr = msg->data[5];
957
83702f69
IS
958 /*
959 * This hardware lacks any support other than bus error messages to
960 * determine if packet transmission has failed.
961 *
962 * When TX errors happen, one echo skb needs to be dropped from the
963 * front of the queue.
964 *
965 * A small bit of code is duplicated here and below, to avoid error
966 * skb allocation when it will just be freed immediately.
967 */
968 if (isrc == CEVTIND_BEI) {
969 int ret;
970 dev_dbg(mod->dev, "bus error interrupt\n");
971
972 /* TX error */
973 if (!(ecc & ECC_DIR)) {
974 kfree_skb(skb_dequeue(&mod->echoq));
975 stats->tx_errors++;
976 } else {
977 stats->rx_errors++;
978 }
979
30df5888
IS
980 /*
981 * The controller automatically disables bus-error interrupts
982 * and therefore we must re-enable them.
983 */
984 ret = ican3_set_buserror(mod, 1);
985 if (ret) {
986 dev_err(mod->dev, "unable to re-enable bus-error\n");
987 return ret;
988 }
989
83702f69
IS
990 /* bus error reporting is off, return immediately */
991 if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
992 return 0;
993 }
994
995 skb = alloc_can_err_skb(dev, &cf);
996 if (skb == NULL)
997 return -ENOMEM;
998
631eb227
IS
999 /* data overrun interrupt */
1000 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
1001 dev_dbg(mod->dev, "data overrun interrupt\n");
1002 cf->can_id |= CAN_ERR_CRTL;
1003 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1004 stats->rx_over_errors++;
1005 stats->rx_errors++;
1006 }
1007
1008 /* error warning + passive interrupt */
1009 if (isrc == CEVTIND_EI) {
1010 dev_dbg(mod->dev, "error warning + passive interrupt\n");
1011 if (status & SR_BS) {
1012 state = CAN_STATE_BUS_OFF;
1013 cf->can_id |= CAN_ERR_BUSOFF;
1014 can_bus_off(dev);
1015 } else if (status & SR_ES) {
1016 if (rxerr >= 128 || txerr >= 128)
1017 state = CAN_STATE_ERROR_PASSIVE;
1018 else
1019 state = CAN_STATE_ERROR_WARNING;
1020 } else {
1021 state = CAN_STATE_ERROR_ACTIVE;
1022 }
1023 }
1024
1025 /* bus error interrupt */
1026 if (isrc == CEVTIND_BEI) {
631eb227 1027 mod->can.can_stats.bus_error++;
631eb227
IS
1028 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
1029
1030 switch (ecc & ECC_MASK) {
1031 case ECC_BIT:
1032 cf->data[2] |= CAN_ERR_PROT_BIT;
1033 break;
1034 case ECC_FORM:
1035 cf->data[2] |= CAN_ERR_PROT_FORM;
1036 break;
1037 case ECC_STUFF:
1038 cf->data[2] |= CAN_ERR_PROT_STUFF;
1039 break;
1040 default:
1041 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
1042 cf->data[3] = ecc & ECC_SEG;
1043 break;
1044 }
1045
83702f69 1046 if (!(ecc & ECC_DIR))
631eb227
IS
1047 cf->data[2] |= CAN_ERR_PROT_TX;
1048
1049 cf->data[6] = txerr;
1050 cf->data[7] = rxerr;
1051 }
1052
1053 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1054 state == CAN_STATE_ERROR_PASSIVE)) {
1055 cf->can_id |= CAN_ERR_CRTL;
1056 if (state == CAN_STATE_ERROR_WARNING) {
1057 mod->can.can_stats.error_warning++;
1058 cf->data[1] = (txerr > rxerr) ?
1059 CAN_ERR_CRTL_TX_WARNING :
1060 CAN_ERR_CRTL_RX_WARNING;
1061 } else {
1062 mod->can.can_stats.error_passive++;
1063 cf->data[1] = (txerr > rxerr) ?
1064 CAN_ERR_CRTL_TX_PASSIVE :
1065 CAN_ERR_CRTL_RX_PASSIVE;
1066 }
1067
1068 cf->data[6] = txerr;
1069 cf->data[7] = rxerr;
1070 }
1071
1072 mod->can.state = state;
631eb227
IS
1073 netif_rx(skb);
1074 return 0;
1075}
1076
1077static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1078{
1079 switch (msg->data[0]) {
1080 case INQUIRY_STATUS:
1081 case INQUIRY_EXTENDED:
1082 mod->bec.rxerr = msg->data[5];
1083 mod->bec.txerr = msg->data[6];
1084 complete(&mod->buserror_comp);
1085 break;
1086 case INQUIRY_TERMINATION:
1087 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1088 complete(&mod->termination_comp);
1089 break;
1090 default:
25985edc 1091 dev_err(mod->dev, "received an unknown inquiry response\n");
631eb227
IS
1092 break;
1093 }
1094}
1095
1096static void ican3_handle_unknown_message(struct ican3_dev *mod,
1097 struct ican3_msg *msg)
1098{
25985edc 1099 dev_warn(mod->dev, "received unknown message: spec 0x%.2x length %d\n",
631eb227
IS
1100 msg->spec, le16_to_cpu(msg->len));
1101}
1102
1103/*
1104 * Handle a control message from the firmware
1105 */
1106static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1107{
1108 dev_dbg(mod->dev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
1109 mod->num, msg->spec, le16_to_cpu(msg->len));
1110
1111 switch (msg->spec) {
1112 case MSG_IDVERS:
1113 ican3_handle_idvers(mod, msg);
1114 break;
1115 case MSG_MSGLOST:
1116 case MSG_FMSGLOST:
1117 ican3_handle_msglost(mod, msg);
1118 break;
1119 case MSG_CEVTIND:
1120 ican3_handle_cevtind(mod, msg);
1121 break;
1122 case MSG_INQUIRY:
1123 ican3_handle_inquiry(mod, msg);
1124 break;
1125 default:
1126 ican3_handle_unknown_message(mod, msg);
1127 break;
1128 }
1129}
1130
83702f69
IS
1131/*
1132 * The ican3 needs to store all echo skbs, and therefore cannot
1133 * use the generic infrastructure for this.
1134 */
1135static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
1136{
0ae89beb
OH
1137 skb = can_create_echo_skb(skb);
1138 if (!skb)
1139 return;
83702f69
IS
1140
1141 /* save this skb for tx interrupt echo handling */
1142 skb_queue_tail(&mod->echoq, skb);
1143}
1144
1145static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
1146{
1147 struct sk_buff *skb = skb_dequeue(&mod->echoq);
1148 struct can_frame *cf;
1149 u8 dlc;
1150
1151 /* this should never trigger unless there is a driver bug */
1152 if (!skb) {
1153 netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
1154 return 0;
1155 }
1156
1157 cf = (struct can_frame *)skb->data;
1158 dlc = cf->can_dlc;
1159
1160 /* check flag whether this packet has to be looped back */
1161 if (skb->pkt_type != PACKET_LOOPBACK) {
1162 kfree_skb(skb);
1163 return dlc;
1164 }
1165
1166 skb->protocol = htons(ETH_P_CAN);
1167 skb->pkt_type = PACKET_BROADCAST;
1168 skb->ip_summed = CHECKSUM_UNNECESSARY;
1169 skb->dev = mod->ndev;
1170 netif_receive_skb(skb);
1171 return dlc;
1172}
1173
1174/*
1175 * Compare an skb with an existing echo skb
1176 *
1177 * This function will be used on devices which have a hardware loopback.
1178 * On these devices, this function can be used to compare a received skb
1179 * with the saved echo skbs so that the hardware echo skb can be dropped.
1180 *
1181 * Returns true if the skb's are identical, false otherwise.
1182 */
1183static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
1184{
1185 struct can_frame *cf = (struct can_frame *)skb->data;
1186 struct sk_buff *echo_skb = skb_peek(&mod->echoq);
1187 struct can_frame *echo_cf;
1188
1189 if (!echo_skb)
1190 return false;
1191
1192 echo_cf = (struct can_frame *)echo_skb->data;
1193 if (cf->can_id != echo_cf->can_id)
1194 return false;
1195
1196 if (cf->can_dlc != echo_cf->can_dlc)
1197 return false;
1198
1199 return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
1200}
1201
631eb227
IS
1202/*
1203 * Check that there is room in the TX ring to transmit another skb
1204 *
1205 * LOCKING: must hold mod->lock
1206 */
1207static bool ican3_txok(struct ican3_dev *mod)
1208{
1209 struct ican3_fast_desc __iomem *desc;
1210 u8 control;
1211
83702f69
IS
1212 /* check that we have echo queue space */
1213 if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
1214 return false;
1215
631eb227
IS
1216 /* copy the control bits of the descriptor */
1217 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1218 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1219 control = ioread8(&desc->control);
1220
1221 /* if the control bits are not valid, then we have no more space */
1222 if (!(control & DESC_VALID))
1223 return false;
1224
1225 return true;
1226}
1227
1228/*
25985edc 1229 * Receive one CAN frame from the hardware
631eb227 1230 *
631eb227
IS
1231 * CONTEXT: must be called from user context
1232 */
1233static int ican3_recv_skb(struct ican3_dev *mod)
1234{
1235 struct net_device *ndev = mod->ndev;
1236 struct net_device_stats *stats = &ndev->stats;
1237 struct ican3_fast_desc desc;
1238 void __iomem *desc_addr;
1239 struct can_frame *cf;
1240 struct sk_buff *skb;
1241 unsigned long flags;
1242
1243 spin_lock_irqsave(&mod->lock, flags);
1244
1245 /* copy the whole descriptor */
1246 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1247 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1248 memcpy_fromio(&desc, desc_addr, sizeof(desc));
1249
1250 spin_unlock_irqrestore(&mod->lock, flags);
1251
1252 /* check that we actually have a CAN frame */
1253 if (!(desc.control & DESC_VALID))
1254 return -ENOBUFS;
1255
1256 /* allocate an skb */
1257 skb = alloc_can_skb(ndev, &cf);
1258 if (unlikely(skb == NULL)) {
1259 stats->rx_dropped++;
1260 goto err_noalloc;
1261 }
1262
1263 /* convert the ICAN3 frame into Linux CAN format */
1264 ican3_to_can_frame(mod, &desc, cf);
1265
83702f69
IS
1266 /*
1267 * If this is an ECHO frame received from the hardware loopback
1268 * feature, use the skb saved in the ECHO stack instead. This allows
1269 * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
1270 *
1271 * Since this is a confirmation of a successfully transmitted packet
1272 * sent from this host, update the transmit statistics.
1273 *
1274 * Also, the netdevice queue needs to be allowed to send packets again.
1275 */
1276 if (ican3_echo_skb_matches(mod, skb)) {
1277 stats->tx_packets++;
1278 stats->tx_bytes += ican3_get_echo_skb(mod);
1279 kfree_skb(skb);
1280 goto err_noalloc;
1281 }
1282
1283 /* update statistics, receive the skb */
631eb227
IS
1284 stats->rx_packets++;
1285 stats->rx_bytes += cf->can_dlc;
83702f69 1286 netif_receive_skb(skb);
631eb227
IS
1287
1288err_noalloc:
1289 /* toggle the valid bit and return the descriptor to the ring */
1290 desc.control ^= DESC_VALID;
1291
1292 spin_lock_irqsave(&mod->lock, flags);
1293
1294 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1295 memcpy_toio(desc_addr, &desc, 1);
1296
1297 /* update the next buffer pointer */
1298 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1299 : (mod->fastrx_num + 1);
1300
1301 /* there are still more buffers to process */
1302 spin_unlock_irqrestore(&mod->lock, flags);
1303 return 0;
1304}
1305
1306static int ican3_napi(struct napi_struct *napi, int budget)
1307{
1308 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
631eb227
IS
1309 unsigned long flags;
1310 int received = 0;
1311 int ret;
1312
1313 /* process all communication messages */
1314 while (true) {
73615c86 1315 struct ican3_msg uninitialized_var(msg);
631eb227
IS
1316 ret = ican3_recv_msg(mod, &msg);
1317 if (ret)
1318 break;
1319
1320 ican3_handle_message(mod, &msg);
1321 }
1322
1323 /* process all CAN frames from the fast interface */
1324 while (received < budget) {
1325 ret = ican3_recv_skb(mod);
1326 if (ret)
1327 break;
1328
1329 received++;
1330 }
1331
1332 /* We have processed all packets that the adapter had, but it
1333 * was less than our budget, stop polling */
1334 if (received < budget)
1335 napi_complete(napi);
1336
1337 spin_lock_irqsave(&mod->lock, flags);
1338
1339 /* Wake up the transmit queue if necessary */
1340 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1341 netif_wake_queue(mod->ndev);
1342
1343 spin_unlock_irqrestore(&mod->lock, flags);
1344
1345 /* re-enable interrupt generation */
1346 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1347 return received;
1348}
1349
1350static irqreturn_t ican3_irq(int irq, void *dev_id)
1351{
1352 struct ican3_dev *mod = dev_id;
1353 u8 stat;
1354
1355 /*
1356 * The interrupt status register on this device reports interrupts
1357 * as zeroes instead of using ones like most other devices
1358 */
1359 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1360 if (stat == (1 << mod->num))
1361 return IRQ_NONE;
1362
1363 /* clear the MODULbus interrupt from the microcontroller */
1364 ioread8(&mod->dpmctrl->interrupt);
1365
1366 /* disable interrupt generation, schedule the NAPI poller */
1367 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1368 napi_schedule(&mod->napi);
1369 return IRQ_HANDLED;
1370}
1371
1372/*
1373 * Firmware reset, startup, and shutdown
1374 */
1375
1376/*
1377 * Reset an ICAN module to its power-on state
1378 *
1379 * CONTEXT: no network device registered
631eb227
IS
1380 */
1381static int ican3_reset_module(struct ican3_dev *mod)
1382{
631eb227
IS
1383 unsigned long start;
1384 u8 runold, runnew;
1385
1386 /* disable interrupts so no more work is scheduled */
1387 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1388
631eb227
IS
1389 /* the first unallocated page in the DPM is #9 */
1390 mod->free_page = DPM_FREE_START;
1391
1392 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1393 runold = ioread8(mod->dpm + TARGET_RUNNING);
1394
1395 /* reset the module */
e21093ef 1396 iowrite8(0x00, &mod->dpmctrl->hwreset);
631eb227
IS
1397
1398 /* wait until the module has finished resetting and is running */
1399 start = jiffies;
1400 do {
1401 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1402 runnew = ioread8(mod->dpm + TARGET_RUNNING);
1403 if (runnew == (runold ^ 0xff))
1404 return 0;
1405
1406 msleep(10);
1407 } while (time_before(jiffies, start + HZ / 4));
1408
1409 dev_err(mod->dev, "failed to reset CAN module\n");
1410 return -ETIMEDOUT;
1411}
1412
3c8ac0f2 1413static void ican3_shutdown_module(struct ican3_dev *mod)
631eb227
IS
1414{
1415 ican3_msg_disconnect(mod);
1416 ican3_reset_module(mod);
1417}
1418
1419/*
1420 * Startup an ICAN module, bringing it into fast mode
1421 */
3c8ac0f2 1422static int ican3_startup_module(struct ican3_dev *mod)
631eb227
IS
1423{
1424 int ret;
1425
1426 ret = ican3_reset_module(mod);
1427 if (ret) {
1428 dev_err(mod->dev, "unable to reset module\n");
1429 return ret;
1430 }
1431
1432 /* re-enable interrupts so we can send messages */
1433 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1434
1435 ret = ican3_msg_connect(mod);
1436 if (ret) {
1437 dev_err(mod->dev, "unable to connect to module\n");
1438 return ret;
1439 }
1440
1441 ican3_init_new_host_interface(mod);
1442 ret = ican3_msg_newhostif(mod);
1443 if (ret) {
1444 dev_err(mod->dev, "unable to switch to new-style interface\n");
1445 return ret;
1446 }
1447
1448 /* default to "termination on" */
1449 ret = ican3_set_termination(mod, true);
1450 if (ret) {
1451 dev_err(mod->dev, "unable to enable termination\n");
1452 return ret;
1453 }
1454
1455 /* default to "bus errors enabled" */
30df5888 1456 ret = ican3_set_buserror(mod, 1);
631eb227
IS
1457 if (ret) {
1458 dev_err(mod->dev, "unable to set bus-error\n");
1459 return ret;
1460 }
1461
1462 ican3_init_fast_host_interface(mod);
1463 ret = ican3_msg_fasthostif(mod);
1464 if (ret) {
1465 dev_err(mod->dev, "unable to switch to fast host interface\n");
1466 return ret;
1467 }
1468
1469 ret = ican3_set_id_filter(mod, true);
1470 if (ret) {
1471 dev_err(mod->dev, "unable to set acceptance filter\n");
1472 return ret;
1473 }
1474
1475 return 0;
1476}
1477
1478/*
1479 * CAN Network Device
1480 */
1481
1482static int ican3_open(struct net_device *ndev)
1483{
1484 struct ican3_dev *mod = netdev_priv(ndev);
631eb227
IS
1485 int ret;
1486
1487 /* open the CAN layer */
1488 ret = open_candev(ndev);
1489 if (ret) {
1490 dev_err(mod->dev, "unable to start CAN layer\n");
1491 return ret;
1492 }
1493
631eb227
IS
1494 /* bring the bus online */
1495 ret = ican3_set_bus_state(mod, true);
1496 if (ret) {
1497 dev_err(mod->dev, "unable to set bus-on\n");
1498 close_candev(ndev);
1499 return ret;
1500 }
1501
1502 /* start up the network device */
1503 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1504 netif_start_queue(ndev);
1505
1506 return 0;
1507}
1508
1509static int ican3_stop(struct net_device *ndev)
1510{
1511 struct ican3_dev *mod = netdev_priv(ndev);
1512 int ret;
1513
1514 /* stop the network device xmit routine */
1515 netif_stop_queue(ndev);
1516 mod->can.state = CAN_STATE_STOPPED;
1517
1518 /* bring the bus offline, stop receiving packets */
1519 ret = ican3_set_bus_state(mod, false);
1520 if (ret) {
1521 dev_err(mod->dev, "unable to set bus-off\n");
1522 return ret;
1523 }
1524
83702f69
IS
1525 /* drop all outstanding echo skbs */
1526 skb_queue_purge(&mod->echoq);
1527
631eb227
IS
1528 /* close the CAN layer */
1529 close_candev(ndev);
1530 return 0;
1531}
1532
1533static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1534{
1535 struct ican3_dev *mod = netdev_priv(ndev);
631eb227
IS
1536 struct can_frame *cf = (struct can_frame *)skb->data;
1537 struct ican3_fast_desc desc;
1538 void __iomem *desc_addr;
1539 unsigned long flags;
1540
007890d7
IS
1541 if (can_dropped_invalid_skb(ndev, skb))
1542 return NETDEV_TX_OK;
1543
631eb227
IS
1544 spin_lock_irqsave(&mod->lock, flags);
1545
1546 /* check that we can actually transmit */
1547 if (!ican3_txok(mod)) {
83702f69 1548 dev_err(mod->dev, "BUG: no free descriptors\n");
631eb227
IS
1549 spin_unlock_irqrestore(&mod->lock, flags);
1550 return NETDEV_TX_BUSY;
1551 }
1552
1553 /* copy the control bits of the descriptor */
1554 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1555 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1556 memset(&desc, 0, sizeof(desc));
1557 memcpy_fromio(&desc, desc_addr, 1);
1558
1559 /* convert the Linux CAN frame into ICAN3 format */
1560 can_frame_to_ican3(mod, cf, &desc);
1561
83702f69
IS
1562 /*
1563 * This hardware doesn't have TX-done notifications, so we'll try and
1564 * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
1565 * stack. Upon packet reception, check if the ECHO skb and received
1566 * skb match, and use that to wake the queue.
1567 */
1568 ican3_put_echo_skb(mod, skb);
1569
631eb227
IS
1570 /*
1571 * the programming manual says that you must set the IVALID bit, then
1572 * interrupt, then set the valid bit. Quite weird, but it seems to be
1573 * required for this to work
1574 */
1575 desc.control |= DESC_IVALID;
1576 memcpy_toio(desc_addr, &desc, sizeof(desc));
1577
1578 /* generate a MODULbus interrupt to the microcontroller */
1579 iowrite8(0x01, &mod->dpmctrl->interrupt);
1580
1581 desc.control ^= DESC_VALID;
1582 memcpy_toio(desc_addr, &desc, sizeof(desc));
1583
1584 /* update the next buffer pointer */
1585 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1586 : (mod->fasttx_num + 1);
1587
83702f69 1588 /* if there is no free descriptor space, stop the transmit queue */
631eb227
IS
1589 if (!ican3_txok(mod))
1590 netif_stop_queue(ndev);
1591
1592 spin_unlock_irqrestore(&mod->lock, flags);
1593 return NETDEV_TX_OK;
1594}
1595
1596static const struct net_device_ops ican3_netdev_ops = {
1597 .ndo_open = ican3_open,
1598 .ndo_stop = ican3_stop,
1599 .ndo_start_xmit = ican3_xmit,
1600};
1601
1602/*
1603 * Low-level CAN Device
1604 */
1605
1606/* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
194b9a4c 1607static const struct can_bittiming_const ican3_bittiming_const = {
631eb227
IS
1608 .name = DRV_NAME,
1609 .tseg1_min = 1,
1610 .tseg1_max = 16,
1611 .tseg2_min = 1,
1612 .tseg2_max = 8,
1613 .sjw_max = 4,
1614 .brp_min = 1,
1615 .brp_max = 64,
1616 .brp_inc = 1,
1617};
1618
1619/*
1620 * This routine was stolen from drivers/net/can/sja1000/sja1000.c
1621 *
1622 * The bittiming register command for the ICAN3 just sets the bit timing
1623 * registers on the SJA1000 chip directly
1624 */
1625static int ican3_set_bittiming(struct net_device *ndev)
1626{
1627 struct ican3_dev *mod = netdev_priv(ndev);
1628 struct can_bittiming *bt = &mod->can.bittiming;
1629 struct ican3_msg msg;
1630 u8 btr0, btr1;
1631
1632 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
1633 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
1634 (((bt->phase_seg2 - 1) & 0x7) << 4);
1635 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
1636 btr1 |= 0x80;
1637
1638 memset(&msg, 0, sizeof(msg));
1639 msg.spec = MSG_CBTRREQ;
1640 msg.len = cpu_to_le16(4);
1641 msg.data[0] = 0x00;
1642 msg.data[1] = 0x00;
1643 msg.data[2] = btr0;
1644 msg.data[3] = btr1;
1645
1646 return ican3_send_msg(mod, &msg);
1647}
1648
1649static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1650{
1651 struct ican3_dev *mod = netdev_priv(ndev);
1652 int ret;
1653
1654 if (mode != CAN_MODE_START)
1655 return -ENOTSUPP;
1656
1657 /* bring the bus online */
1658 ret = ican3_set_bus_state(mod, true);
1659 if (ret) {
1660 dev_err(mod->dev, "unable to set bus-on\n");
1661 return ret;
1662 }
1663
1664 /* start up the network device */
1665 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1666
1667 if (netif_queue_stopped(ndev))
1668 netif_wake_queue(ndev);
1669
1670 return 0;
1671}
1672
1673static int ican3_get_berr_counter(const struct net_device *ndev,
1674 struct can_berr_counter *bec)
1675{
1676 struct ican3_dev *mod = netdev_priv(ndev);
1677 int ret;
1678
1679 ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1680 if (ret)
1681 return ret;
1682
1683 ret = wait_for_completion_timeout(&mod->buserror_comp, HZ);
c70edb9e 1684 if (ret == 0) {
631eb227
IS
1685 dev_info(mod->dev, "%s timed out\n", __func__);
1686 return -ETIMEDOUT;
1687 }
1688
1689 bec->rxerr = mod->bec.rxerr;
1690 bec->txerr = mod->bec.txerr;
1691 return 0;
1692}
1693
1694/*
1695 * Sysfs Attributes
1696 */
1697
1698static ssize_t ican3_sysfs_show_term(struct device *dev,
1699 struct device_attribute *attr,
1700 char *buf)
1701{
1702 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1703 int ret;
1704
1705 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1706 if (ret)
1707 return ret;
1708
1709 ret = wait_for_completion_timeout(&mod->termination_comp, HZ);
c70edb9e 1710 if (ret == 0) {
631eb227
IS
1711 dev_info(mod->dev, "%s timed out\n", __func__);
1712 return -ETIMEDOUT;
1713 }
1714
1715 return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
1716}
1717
1718static ssize_t ican3_sysfs_set_term(struct device *dev,
1719 struct device_attribute *attr,
1720 const char *buf, size_t count)
1721{
1722 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1723 unsigned long enable;
1724 int ret;
1725
0672f0ab 1726 if (kstrtoul(buf, 0, &enable))
631eb227
IS
1727 return -EINVAL;
1728
1729 ret = ican3_set_termination(mod, enable);
1730 if (ret)
1731 return ret;
1732
1733 return count;
1734}
1735
1e6d93e4 1736static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
631eb227
IS
1737 ican3_sysfs_set_term);
1738
1739static struct attribute *ican3_sysfs_attrs[] = {
1740 &dev_attr_termination.attr,
1741 NULL,
1742};
1743
1744static struct attribute_group ican3_sysfs_attr_group = {
1745 .attrs = ican3_sysfs_attrs,
1746};
1747
1748/*
1749 * PCI Subsystem
1750 */
1751
3c8ac0f2 1752static int ican3_probe(struct platform_device *pdev)
631eb227
IS
1753{
1754 struct janz_platform_data *pdata;
1755 struct net_device *ndev;
1756 struct ican3_dev *mod;
1757 struct resource *res;
1758 struct device *dev;
1759 int ret;
1760
c91a319c 1761 pdata = dev_get_platdata(&pdev->dev);
631eb227
IS
1762 if (!pdata)
1763 return -ENXIO;
1764
1765 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1766
1767 /* save the struct device for printing */
1768 dev = &pdev->dev;
1769
1770 /* allocate the CAN device and private data */
1771 ndev = alloc_candev(sizeof(*mod), 0);
1772 if (!ndev) {
1773 dev_err(dev, "unable to allocate CANdev\n");
1774 ret = -ENOMEM;
1775 goto out_return;
1776 }
1777
1778 platform_set_drvdata(pdev, ndev);
1779 mod = netdev_priv(ndev);
1780 mod->ndev = ndev;
1781 mod->dev = &pdev->dev;
1782 mod->num = pdata->modno;
1783 netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
83702f69 1784 skb_queue_head_init(&mod->echoq);
631eb227
IS
1785 spin_lock_init(&mod->lock);
1786 init_completion(&mod->termination_comp);
1787 init_completion(&mod->buserror_comp);
1788
1789 /* setup device-specific sysfs attributes */
1790 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1791
1792 /* the first unallocated page in the DPM is 9 */
1793 mod->free_page = DPM_FREE_START;
1794
1795 ndev->netdev_ops = &ican3_netdev_ops;
1796 ndev->flags |= IFF_ECHO;
1797 SET_NETDEV_DEV(ndev, &pdev->dev);
1798
1799 mod->can.clock.freq = ICAN3_CAN_CLOCK;
1800 mod->can.bittiming_const = &ican3_bittiming_const;
1801 mod->can.do_set_bittiming = ican3_set_bittiming;
1802 mod->can.do_set_mode = ican3_set_mode;
1803 mod->can.do_get_berr_counter = ican3_get_berr_counter;
1804 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
3b5c6b9e
IS
1805 | CAN_CTRLMODE_BERR_REPORTING
1806 | CAN_CTRLMODE_ONE_SHOT;
631eb227
IS
1807
1808 /* find our IRQ number */
1809 mod->irq = platform_get_irq(pdev, 0);
1810 if (mod->irq < 0) {
1811 dev_err(dev, "IRQ line not found\n");
1812 ret = -ENODEV;
1813 goto out_free_ndev;
1814 }
1815
1816 ndev->irq = mod->irq;
1817
1818 /* get access to the MODULbus registers for this module */
1819 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1820 if (!res) {
1821 dev_err(dev, "MODULbus registers not found\n");
1822 ret = -ENODEV;
1823 goto out_free_ndev;
1824 }
1825
1826 mod->dpm = ioremap(res->start, resource_size(res));
1827 if (!mod->dpm) {
1828 dev_err(dev, "MODULbus registers not ioremap\n");
1829 ret = -ENOMEM;
1830 goto out_free_ndev;
1831 }
1832
1833 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1834
1835 /* get access to the control registers for this module */
1836 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1837 if (!res) {
1838 dev_err(dev, "CONTROL registers not found\n");
1839 ret = -ENODEV;
1840 goto out_iounmap_dpm;
1841 }
1842
1843 mod->ctrl = ioremap(res->start, resource_size(res));
1844 if (!mod->ctrl) {
1845 dev_err(dev, "CONTROL registers not ioremap\n");
1846 ret = -ENOMEM;
1847 goto out_iounmap_dpm;
1848 }
1849
1850 /* disable our IRQ, then hookup the IRQ handler */
1851 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1852 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1853 if (ret) {
1854 dev_err(dev, "unable to request IRQ\n");
1855 goto out_iounmap_ctrl;
1856 }
1857
1858 /* reset and initialize the CAN controller into fast mode */
1859 napi_enable(&mod->napi);
1860 ret = ican3_startup_module(mod);
1861 if (ret) {
1862 dev_err(dev, "%s: unable to start CANdev\n", __func__);
1863 goto out_free_irq;
1864 }
1865
1866 /* register with the Linux CAN layer */
1867 ret = register_candev(ndev);
1868 if (ret) {
1869 dev_err(dev, "%s: unable to register CANdev\n", __func__);
1870 goto out_free_irq;
1871 }
1872
1873 dev_info(dev, "module %d: registered CAN device\n", pdata->modno);
1874 return 0;
1875
1876out_free_irq:
1877 napi_disable(&mod->napi);
1878 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1879 free_irq(mod->irq, mod);
1880out_iounmap_ctrl:
1881 iounmap(mod->ctrl);
1882out_iounmap_dpm:
1883 iounmap(mod->dpm);
1884out_free_ndev:
1885 free_candev(ndev);
1886out_return:
1887 return ret;
1888}
1889
3c8ac0f2 1890static int ican3_remove(struct platform_device *pdev)
631eb227
IS
1891{
1892 struct net_device *ndev = platform_get_drvdata(pdev);
1893 struct ican3_dev *mod = netdev_priv(ndev);
1894
1895 /* unregister the netdevice, stop interrupts */
1896 unregister_netdev(ndev);
1897 napi_disable(&mod->napi);
1898 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1899 free_irq(mod->irq, mod);
1900
1901 /* put the module into reset */
1902 ican3_shutdown_module(mod);
1903
1904 /* unmap all registers */
1905 iounmap(mod->ctrl);
1906 iounmap(mod->dpm);
1907
1908 free_candev(ndev);
1909
1910 return 0;
1911}
1912
1913static struct platform_driver ican3_driver = {
1914 .driver = {
1915 .name = DRV_NAME,
1916 .owner = THIS_MODULE,
1917 },
1918 .probe = ican3_probe,
3c8ac0f2 1919 .remove = ican3_remove,
631eb227
IS
1920};
1921
871d3372 1922module_platform_driver(ican3_driver);
631eb227
IS
1923
1924MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
1925MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
1926MODULE_LICENSE("GPL");
1927MODULE_ALIAS("platform:janz-ican3");