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aaa7cb26 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
2b61972b SG |
2 | /* |
3 | * Copyright (C) 2010-2012 Stephane Grosjean <s.grosjean@peak-system.com> | |
4 | * | |
5 | * CAN driver for PEAK-System PCAN-PC Card | |
6 | * Derived from the PCAN project file driver/src/pcan_pccard.c | |
7 | * Copyright (C) 2006-2010 PEAK System-Technik GmbH | |
2b61972b SG |
8 | */ |
9 | #include <linux/kernel.h> | |
10 | #include <linux/module.h> | |
11 | #include <linux/interrupt.h> | |
12 | #include <linux/netdevice.h> | |
13 | #include <linux/delay.h> | |
14 | #include <linux/timer.h> | |
15 | #include <linux/io.h> | |
16 | #include <pcmcia/cistpl.h> | |
17 | #include <pcmcia/ds.h> | |
18 | #include <linux/can.h> | |
19 | #include <linux/can/dev.h> | |
20 | #include "sja1000.h" | |
21 | ||
22 | MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>"); | |
23 | MODULE_DESCRIPTION("CAN driver for PEAK-System PCAN-PC Cards"); | |
24 | MODULE_LICENSE("GPL v2"); | |
2b61972b SG |
25 | |
26 | /* PEAK-System PCMCIA driver name */ | |
27 | #define PCC_NAME "peak_pcmcia" | |
28 | ||
29 | #define PCC_CHAN_MAX 2 | |
30 | ||
31 | #define PCC_CAN_CLOCK (16000000 / 2) | |
32 | ||
33 | #define PCC_MANF_ID 0x0377 | |
34 | #define PCC_CARD_ID 0x0001 | |
35 | ||
36 | #define PCC_CHAN_SIZE 0x20 | |
37 | #define PCC_CHAN_OFF(c) ((c) * PCC_CHAN_SIZE) | |
38 | #define PCC_COMN_OFF (PCC_CHAN_OFF(PCC_CHAN_MAX)) | |
39 | #define PCC_COMN_SIZE 0x40 | |
40 | ||
41 | /* common area registers */ | |
42 | #define PCC_CCR 0x00 | |
43 | #define PCC_CSR 0x02 | |
44 | #define PCC_CPR 0x04 | |
45 | #define PCC_SPI_DIR 0x06 | |
46 | #define PCC_SPI_DOR 0x08 | |
47 | #define PCC_SPI_ADR 0x0a | |
48 | #define PCC_SPI_IR 0x0c | |
49 | #define PCC_FW_MAJOR 0x10 | |
50 | #define PCC_FW_MINOR 0x12 | |
51 | ||
52 | /* CCR bits */ | |
53 | #define PCC_CCR_CLK_16 0x00 | |
54 | #define PCC_CCR_CLK_10 0x01 | |
55 | #define PCC_CCR_CLK_21 0x02 | |
56 | #define PCC_CCR_CLK_8 0x03 | |
57 | #define PCC_CCR_CLK_MASK PCC_CCR_CLK_8 | |
58 | ||
59 | #define PCC_CCR_RST_CHAN(c) (0x01 << ((c) + 2)) | |
60 | #define PCC_CCR_RST_ALL (PCC_CCR_RST_CHAN(0) | PCC_CCR_RST_CHAN(1)) | |
61 | #define PCC_CCR_RST_MASK PCC_CCR_RST_ALL | |
62 | ||
63 | /* led selection bits */ | |
64 | #define PCC_LED(c) (1 << (c)) | |
65 | #define PCC_LED_ALL (PCC_LED(0) | PCC_LED(1)) | |
66 | ||
67 | /* led state value */ | |
68 | #define PCC_LED_ON 0x00 | |
69 | #define PCC_LED_FAST 0x01 | |
70 | #define PCC_LED_SLOW 0x02 | |
71 | #define PCC_LED_OFF 0x03 | |
72 | ||
73 | #define PCC_CCR_LED_CHAN(s, c) ((s) << (((c) + 2) << 1)) | |
74 | ||
75 | #define PCC_CCR_LED_ON_CHAN(c) PCC_CCR_LED_CHAN(PCC_LED_ON, c) | |
76 | #define PCC_CCR_LED_FAST_CHAN(c) PCC_CCR_LED_CHAN(PCC_LED_FAST, c) | |
77 | #define PCC_CCR_LED_SLOW_CHAN(c) PCC_CCR_LED_CHAN(PCC_LED_SLOW, c) | |
78 | #define PCC_CCR_LED_OFF_CHAN(c) PCC_CCR_LED_CHAN(PCC_LED_OFF, c) | |
79 | #define PCC_CCR_LED_MASK_CHAN(c) PCC_CCR_LED_OFF_CHAN(c) | |
80 | #define PCC_CCR_LED_OFF_ALL (PCC_CCR_LED_OFF_CHAN(0) | \ | |
81 | PCC_CCR_LED_OFF_CHAN(1)) | |
82 | #define PCC_CCR_LED_MASK PCC_CCR_LED_OFF_ALL | |
83 | ||
84 | #define PCC_CCR_INIT (PCC_CCR_CLK_16 | PCC_CCR_RST_ALL | PCC_CCR_LED_OFF_ALL) | |
85 | ||
86 | /* CSR bits */ | |
87 | #define PCC_CSR_SPI_BUSY 0x04 | |
88 | ||
89 | /* time waiting for SPI busy (prevent from infinite loop) */ | |
90 | #define PCC_SPI_MAX_BUSY_WAIT_MS 3 | |
91 | ||
92 | /* max count of reading the SPI status register waiting for a change */ | |
93 | /* (prevent from infinite loop) */ | |
94 | #define PCC_WRITE_MAX_LOOP 1000 | |
95 | ||
96 | /* max nb of int handled by that isr in one shot (prevent from infinite loop) */ | |
97 | #define PCC_ISR_MAX_LOOP 10 | |
98 | ||
99 | /* EEPROM chip instruction set */ | |
100 | /* note: EEPROM Read/Write instructions include A8 bit */ | |
101 | #define PCC_EEP_WRITE(a) (0x02 | (((a) & 0x100) >> 5)) | |
102 | #define PCC_EEP_READ(a) (0x03 | (((a) & 0x100) >> 5)) | |
103 | #define PCC_EEP_WRDI 0x04 /* EEPROM Write Disable */ | |
104 | #define PCC_EEP_RDSR 0x05 /* EEPROM Read Status Register */ | |
105 | #define PCC_EEP_WREN 0x06 /* EEPROM Write Enable */ | |
106 | ||
107 | /* EEPROM Status Register bits */ | |
108 | #define PCC_EEP_SR_WEN 0x02 /* EEPROM SR Write Enable bit */ | |
109 | #define PCC_EEP_SR_WIP 0x01 /* EEPROM SR Write In Progress bit */ | |
110 | ||
111 | /* | |
112 | * The board configuration is probably following: | |
113 | * RX1 is connected to ground. | |
114 | * TX1 is not connected. | |
115 | * CLKO is not connected. | |
116 | * Setting the OCR register to 0xDA is a good idea. | |
117 | * This means normal output mode, push-pull and the correct polarity. | |
118 | */ | |
119 | #define PCC_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL) | |
120 | ||
121 | /* | |
122 | * In the CDR register, you should set CBP to 1. | |
123 | * You will probably also want to set the clock divider value to 7 | |
124 | * (meaning direct oscillator output) because the second SJA1000 chip | |
125 | * is driven by the first one CLKOUT output. | |
126 | */ | |
127 | #define PCC_CDR (CDR_CBP | CDR_CLKOUT_MASK) | |
128 | ||
129 | struct pcan_channel { | |
130 | struct net_device *netdev; | |
131 | unsigned long prev_rx_bytes; | |
132 | unsigned long prev_tx_bytes; | |
133 | }; | |
134 | ||
135 | /* PCAN-PC Card private structure */ | |
136 | struct pcan_pccard { | |
137 | struct pcmcia_device *pdev; | |
138 | int chan_count; | |
139 | struct pcan_channel channel[PCC_CHAN_MAX]; | |
140 | u8 ccr; | |
141 | u8 fw_major; | |
142 | u8 fw_minor; | |
143 | void __iomem *ioport_addr; | |
144 | struct timer_list led_timer; | |
145 | }; | |
146 | ||
147 | static struct pcmcia_device_id pcan_table[] = { | |
148 | PCMCIA_DEVICE_MANF_CARD(PCC_MANF_ID, PCC_CARD_ID), | |
149 | PCMCIA_DEVICE_NULL, | |
150 | }; | |
151 | ||
152 | MODULE_DEVICE_TABLE(pcmcia, pcan_table); | |
153 | ||
154 | static void pcan_set_leds(struct pcan_pccard *card, u8 mask, u8 state); | |
155 | ||
156 | /* | |
157 | * start timer which controls leds state | |
158 | */ | |
159 | static void pcan_start_led_timer(struct pcan_pccard *card) | |
160 | { | |
161 | if (!timer_pending(&card->led_timer)) | |
162 | mod_timer(&card->led_timer, jiffies + HZ); | |
163 | } | |
164 | ||
165 | /* | |
166 | * stop the timer which controls leds state | |
167 | */ | |
168 | static void pcan_stop_led_timer(struct pcan_pccard *card) | |
169 | { | |
170 | del_timer_sync(&card->led_timer); | |
171 | } | |
172 | ||
173 | /* | |
174 | * read a sja1000 register | |
175 | */ | |
176 | static u8 pcan_read_canreg(const struct sja1000_priv *priv, int port) | |
177 | { | |
178 | return ioread8(priv->reg_base + port); | |
179 | } | |
180 | ||
181 | /* | |
182 | * write a sja1000 register | |
183 | */ | |
184 | static void pcan_write_canreg(const struct sja1000_priv *priv, int port, u8 v) | |
185 | { | |
186 | struct pcan_pccard *card = priv->priv; | |
187 | int c = (priv->reg_base - card->ioport_addr) / PCC_CHAN_SIZE; | |
188 | ||
189 | /* sja1000 register changes control the leds state */ | |
06e1d1d7 | 190 | if (port == SJA1000_MOD) |
2b61972b SG |
191 | switch (v) { |
192 | case MOD_RM: | |
193 | /* Reset Mode: set led on */ | |
194 | pcan_set_leds(card, PCC_LED(c), PCC_LED_ON); | |
195 | break; | |
196 | case 0x00: | |
197 | /* Normal Mode: led slow blinking and start led timer */ | |
198 | pcan_set_leds(card, PCC_LED(c), PCC_LED_SLOW); | |
199 | pcan_start_led_timer(card); | |
200 | break; | |
201 | default: | |
202 | break; | |
203 | } | |
204 | ||
205 | iowrite8(v, priv->reg_base + port); | |
206 | } | |
207 | ||
208 | /* | |
209 | * read a register from the common area | |
210 | */ | |
211 | static u8 pcan_read_reg(struct pcan_pccard *card, int port) | |
212 | { | |
213 | return ioread8(card->ioport_addr + PCC_COMN_OFF + port); | |
214 | } | |
215 | ||
216 | /* | |
217 | * write a register into the common area | |
218 | */ | |
219 | static void pcan_write_reg(struct pcan_pccard *card, int port, u8 v) | |
220 | { | |
221 | /* cache ccr value */ | |
222 | if (port == PCC_CCR) { | |
223 | if (card->ccr == v) | |
224 | return; | |
225 | card->ccr = v; | |
226 | } | |
227 | ||
228 | iowrite8(v, card->ioport_addr + PCC_COMN_OFF + port); | |
229 | } | |
230 | ||
231 | /* | |
232 | * check whether the card is present by checking its fw version numbers | |
233 | * against values read at probing time. | |
234 | */ | |
235 | static inline int pcan_pccard_present(struct pcan_pccard *card) | |
236 | { | |
237 | return ((pcan_read_reg(card, PCC_FW_MAJOR) == card->fw_major) && | |
238 | (pcan_read_reg(card, PCC_FW_MINOR) == card->fw_minor)); | |
239 | } | |
240 | ||
241 | /* | |
242 | * wait for SPI engine while it is busy | |
243 | */ | |
244 | static int pcan_wait_spi_busy(struct pcan_pccard *card) | |
245 | { | |
246 | unsigned long timeout = jiffies + | |
247 | msecs_to_jiffies(PCC_SPI_MAX_BUSY_WAIT_MS) + 1; | |
248 | ||
249 | /* be sure to read status at least once after sleeping */ | |
250 | while (pcan_read_reg(card, PCC_CSR) & PCC_CSR_SPI_BUSY) { | |
251 | if (time_after(jiffies, timeout)) | |
252 | return -EBUSY; | |
253 | schedule(); | |
254 | } | |
255 | ||
256 | return 0; | |
257 | } | |
258 | ||
259 | /* | |
260 | * write data in device eeprom | |
261 | */ | |
262 | static int pcan_write_eeprom(struct pcan_pccard *card, u16 addr, u8 v) | |
263 | { | |
264 | u8 status; | |
265 | int err, i; | |
266 | ||
267 | /* write instruction enabling write */ | |
268 | pcan_write_reg(card, PCC_SPI_IR, PCC_EEP_WREN); | |
269 | err = pcan_wait_spi_busy(card); | |
270 | if (err) | |
271 | goto we_spi_err; | |
272 | ||
273 | /* wait until write enabled */ | |
274 | for (i = 0; i < PCC_WRITE_MAX_LOOP; i++) { | |
275 | /* write instruction reading the status register */ | |
276 | pcan_write_reg(card, PCC_SPI_IR, PCC_EEP_RDSR); | |
277 | err = pcan_wait_spi_busy(card); | |
278 | if (err) | |
279 | goto we_spi_err; | |
280 | ||
281 | /* get status register value and check write enable bit */ | |
282 | status = pcan_read_reg(card, PCC_SPI_DIR); | |
283 | if (status & PCC_EEP_SR_WEN) | |
284 | break; | |
285 | } | |
286 | ||
287 | if (i >= PCC_WRITE_MAX_LOOP) { | |
288 | dev_err(&card->pdev->dev, | |
289 | "stop waiting to be allowed to write in eeprom\n"); | |
290 | return -EIO; | |
291 | } | |
292 | ||
293 | /* set address and data */ | |
294 | pcan_write_reg(card, PCC_SPI_ADR, addr & 0xff); | |
295 | pcan_write_reg(card, PCC_SPI_DOR, v); | |
296 | ||
297 | /* | |
298 | * write instruction with bit[3] set according to address value: | |
299 | * if addr refers to upper half of the memory array: bit[3] = 1 | |
300 | */ | |
301 | pcan_write_reg(card, PCC_SPI_IR, PCC_EEP_WRITE(addr)); | |
302 | err = pcan_wait_spi_busy(card); | |
303 | if (err) | |
304 | goto we_spi_err; | |
305 | ||
306 | /* wait while write in progress */ | |
307 | for (i = 0; i < PCC_WRITE_MAX_LOOP; i++) { | |
308 | /* write instruction reading the status register */ | |
309 | pcan_write_reg(card, PCC_SPI_IR, PCC_EEP_RDSR); | |
310 | err = pcan_wait_spi_busy(card); | |
311 | if (err) | |
312 | goto we_spi_err; | |
313 | ||
314 | /* get status register value and check write in progress bit */ | |
315 | status = pcan_read_reg(card, PCC_SPI_DIR); | |
316 | if (!(status & PCC_EEP_SR_WIP)) | |
317 | break; | |
318 | } | |
319 | ||
320 | if (i >= PCC_WRITE_MAX_LOOP) { | |
321 | dev_err(&card->pdev->dev, | |
322 | "stop waiting for write in eeprom to complete\n"); | |
323 | return -EIO; | |
324 | } | |
325 | ||
326 | /* write instruction disabling write */ | |
327 | pcan_write_reg(card, PCC_SPI_IR, PCC_EEP_WRDI); | |
328 | err = pcan_wait_spi_busy(card); | |
329 | if (err) | |
330 | goto we_spi_err; | |
331 | ||
332 | return 0; | |
333 | ||
334 | we_spi_err: | |
335 | dev_err(&card->pdev->dev, | |
336 | "stop waiting (spi engine always busy) err %d\n", err); | |
337 | ||
338 | return err; | |
339 | } | |
340 | ||
341 | static void pcan_set_leds(struct pcan_pccard *card, u8 led_mask, u8 state) | |
342 | { | |
343 | u8 ccr = card->ccr; | |
344 | int i; | |
345 | ||
346 | for (i = 0; i < card->chan_count; i++) | |
347 | if (led_mask & PCC_LED(i)) { | |
348 | /* clear corresponding led bits in ccr */ | |
349 | ccr &= ~PCC_CCR_LED_MASK_CHAN(i); | |
350 | /* then set new bits */ | |
351 | ccr |= PCC_CCR_LED_CHAN(state, i); | |
352 | } | |
353 | ||
354 | /* real write only if something has changed in ccr */ | |
355 | pcan_write_reg(card, PCC_CCR, ccr); | |
356 | } | |
357 | ||
358 | /* | |
359 | * enable/disable CAN connectors power | |
360 | */ | |
361 | static inline void pcan_set_can_power(struct pcan_pccard *card, int onoff) | |
362 | { | |
363 | int err; | |
364 | ||
365 | err = pcan_write_eeprom(card, 0, !!onoff); | |
366 | if (err) | |
367 | dev_err(&card->pdev->dev, | |
368 | "failed setting power %s to can connectors (err %d)\n", | |
369 | (onoff) ? "on" : "off", err); | |
370 | } | |
371 | ||
372 | /* | |
373 | * set leds state according to channel activity | |
374 | */ | |
550acfb3 | 375 | static void pcan_led_timer(struct timer_list *t) |
2b61972b | 376 | { |
550acfb3 | 377 | struct pcan_pccard *card = from_timer(card, t, led_timer); |
2b61972b SG |
378 | struct net_device *netdev; |
379 | int i, up_count = 0; | |
380 | u8 ccr; | |
381 | ||
382 | ccr = card->ccr; | |
383 | for (i = 0; i < card->chan_count; i++) { | |
384 | /* default is: not configured */ | |
385 | ccr &= ~PCC_CCR_LED_MASK_CHAN(i); | |
386 | ccr |= PCC_CCR_LED_ON_CHAN(i); | |
387 | ||
388 | netdev = card->channel[i].netdev; | |
389 | if (!netdev || !(netdev->flags & IFF_UP)) | |
390 | continue; | |
391 | ||
392 | up_count++; | |
393 | ||
394 | /* no activity (but configured) */ | |
395 | ccr &= ~PCC_CCR_LED_MASK_CHAN(i); | |
396 | ccr |= PCC_CCR_LED_SLOW_CHAN(i); | |
397 | ||
398 | /* if bytes counters changed, set fast blinking led */ | |
399 | if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) { | |
400 | card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes; | |
401 | ccr &= ~PCC_CCR_LED_MASK_CHAN(i); | |
402 | ccr |= PCC_CCR_LED_FAST_CHAN(i); | |
403 | } | |
404 | if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) { | |
405 | card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes; | |
406 | ccr &= ~PCC_CCR_LED_MASK_CHAN(i); | |
407 | ccr |= PCC_CCR_LED_FAST_CHAN(i); | |
408 | } | |
409 | } | |
410 | ||
411 | /* write the new leds state */ | |
412 | pcan_write_reg(card, PCC_CCR, ccr); | |
413 | ||
414 | /* restart timer (except if no more configured channels) */ | |
415 | if (up_count) | |
416 | mod_timer(&card->led_timer, jiffies + HZ); | |
417 | } | |
418 | ||
419 | /* | |
420 | * interrupt service routine | |
421 | */ | |
422 | static irqreturn_t pcan_isr(int irq, void *dev_id) | |
423 | { | |
424 | struct pcan_pccard *card = dev_id; | |
425 | int irq_handled; | |
426 | ||
427 | /* prevent from infinite loop */ | |
428 | for (irq_handled = 0; irq_handled < PCC_ISR_MAX_LOOP; irq_handled++) { | |
429 | /* handle shared interrupt and next loop */ | |
430 | int nothing_to_handle = 1; | |
431 | int i; | |
432 | ||
433 | /* check interrupt for each channel */ | |
434 | for (i = 0; i < card->chan_count; i++) { | |
435 | struct net_device *netdev; | |
436 | ||
437 | /* | |
438 | * check whether the card is present before calling | |
439 | * sja1000_interrupt() to speed up hotplug detection | |
440 | */ | |
441 | if (!pcan_pccard_present(card)) { | |
442 | /* card unplugged during isr */ | |
443 | return IRQ_NONE; | |
444 | } | |
445 | ||
446 | /* | |
447 | * should check whether all or SJA1000_MAX_IRQ | |
448 | * interrupts have been handled: loop again to be sure. | |
449 | */ | |
450 | netdev = card->channel[i].netdev; | |
451 | if (netdev && | |
452 | sja1000_interrupt(irq, netdev) == IRQ_HANDLED) | |
453 | nothing_to_handle = 0; | |
454 | } | |
455 | ||
456 | if (nothing_to_handle) | |
457 | break; | |
458 | } | |
459 | ||
460 | return (irq_handled) ? IRQ_HANDLED : IRQ_NONE; | |
461 | } | |
462 | ||
463 | /* | |
464 | * free all resources used by the channels and switch off leds and can power | |
465 | */ | |
466 | static void pcan_free_channels(struct pcan_pccard *card) | |
467 | { | |
468 | int i; | |
469 | u8 led_mask = 0; | |
470 | ||
471 | for (i = 0; i < card->chan_count; i++) { | |
472 | struct net_device *netdev; | |
473 | char name[IFNAMSIZ]; | |
474 | ||
475 | led_mask |= PCC_LED(i); | |
476 | ||
477 | netdev = card->channel[i].netdev; | |
478 | if (!netdev) | |
479 | continue; | |
480 | ||
cd28aa2e | 481 | strlcpy(name, netdev->name, IFNAMSIZ); |
2b61972b SG |
482 | |
483 | unregister_sja1000dev(netdev); | |
484 | ||
485 | free_sja1000dev(netdev); | |
486 | ||
487 | dev_info(&card->pdev->dev, "%s removed\n", name); | |
488 | } | |
489 | ||
490 | /* do it only if device not removed */ | |
491 | if (pcan_pccard_present(card)) { | |
492 | pcan_set_leds(card, led_mask, PCC_LED_OFF); | |
493 | pcan_set_can_power(card, 0); | |
494 | } | |
495 | } | |
496 | ||
497 | /* | |
498 | * check if a CAN controller is present at the specified location | |
499 | */ | |
500 | static inline int pcan_channel_present(struct sja1000_priv *priv) | |
501 | { | |
502 | /* make sure SJA1000 is in reset mode */ | |
06e1d1d7 OH |
503 | pcan_write_canreg(priv, SJA1000_MOD, 1); |
504 | pcan_write_canreg(priv, SJA1000_CDR, CDR_PELICAN); | |
2b61972b SG |
505 | |
506 | /* read reset-values */ | |
06e1d1d7 | 507 | if (pcan_read_canreg(priv, SJA1000_CDR) == CDR_PELICAN) |
2b61972b SG |
508 | return 1; |
509 | ||
510 | return 0; | |
511 | } | |
512 | ||
513 | static int pcan_add_channels(struct pcan_pccard *card) | |
514 | { | |
515 | struct pcmcia_device *pdev = card->pdev; | |
516 | int i, err = 0; | |
517 | u8 ccr = PCC_CCR_INIT; | |
518 | ||
519 | /* init common registers (reset channels and leds off) */ | |
520 | card->ccr = ~ccr; | |
521 | pcan_write_reg(card, PCC_CCR, ccr); | |
522 | ||
523 | /* wait 2ms before unresetting channels */ | |
c8d4dea2 | 524 | usleep_range(2000, 3000); |
2b61972b SG |
525 | |
526 | ccr &= ~PCC_CCR_RST_ALL; | |
527 | pcan_write_reg(card, PCC_CCR, ccr); | |
528 | ||
529 | /* create one network device per channel detected */ | |
530 | for (i = 0; i < ARRAY_SIZE(card->channel); i++) { | |
531 | struct net_device *netdev; | |
532 | struct sja1000_priv *priv; | |
533 | ||
534 | netdev = alloc_sja1000dev(0); | |
535 | if (!netdev) { | |
536 | err = -ENOMEM; | |
537 | break; | |
538 | } | |
539 | ||
540 | /* update linkages */ | |
541 | priv = netdev_priv(netdev); | |
542 | priv->priv = card; | |
543 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
3e66d013 | 544 | netdev->dev_id = i; |
2b61972b SG |
545 | |
546 | priv->irq_flags = IRQF_SHARED; | |
547 | netdev->irq = pdev->irq; | |
548 | priv->reg_base = card->ioport_addr + PCC_CHAN_OFF(i); | |
549 | ||
550 | /* check if channel is present */ | |
551 | if (!pcan_channel_present(priv)) { | |
552 | dev_err(&pdev->dev, "channel %d not present\n", i); | |
553 | free_sja1000dev(netdev); | |
554 | continue; | |
555 | } | |
556 | ||
557 | priv->read_reg = pcan_read_canreg; | |
558 | priv->write_reg = pcan_write_canreg; | |
559 | priv->can.clock.freq = PCC_CAN_CLOCK; | |
560 | priv->ocr = PCC_OCR; | |
561 | priv->cdr = PCC_CDR; | |
562 | ||
563 | /* Neither a slave device distributes the clock */ | |
564 | if (i > 0) | |
565 | priv->cdr |= CDR_CLK_OFF; | |
566 | ||
567 | priv->flags |= SJA1000_CUSTOM_IRQ_HANDLER; | |
568 | ||
569 | /* register SJA1000 device */ | |
570 | err = register_sja1000dev(netdev); | |
571 | if (err) { | |
572 | free_sja1000dev(netdev); | |
573 | continue; | |
574 | } | |
575 | ||
576 | card->channel[i].netdev = netdev; | |
577 | card->chan_count++; | |
578 | ||
579 | /* set corresponding led on in the new ccr */ | |
580 | ccr &= ~PCC_CCR_LED_OFF_CHAN(i); | |
581 | ||
582 | dev_info(&pdev->dev, | |
583 | "%s on channel %d at 0x%p irq %d\n", | |
584 | netdev->name, i, priv->reg_base, pdev->irq); | |
585 | } | |
586 | ||
587 | /* write new ccr (change leds state) */ | |
588 | pcan_write_reg(card, PCC_CCR, ccr); | |
589 | ||
590 | return err; | |
591 | } | |
592 | ||
593 | static int pcan_conf_check(struct pcmcia_device *pdev, void *priv_data) | |
594 | { | |
595 | pdev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH; | |
596 | pdev->resource[0]->flags |= IO_DATA_PATH_WIDTH_8; /* only */ | |
597 | pdev->io_lines = 10; | |
598 | ||
599 | /* This reserves IO space but doesn't actually enable it */ | |
600 | return pcmcia_request_io(pdev); | |
601 | } | |
602 | ||
603 | /* | |
604 | * free all resources used by the device | |
605 | */ | |
606 | static void pcan_free(struct pcmcia_device *pdev) | |
607 | { | |
608 | struct pcan_pccard *card = pdev->priv; | |
609 | ||
610 | if (!card) | |
611 | return; | |
612 | ||
613 | free_irq(pdev->irq, card); | |
614 | pcan_stop_led_timer(card); | |
615 | ||
616 | pcan_free_channels(card); | |
617 | ||
618 | ioport_unmap(card->ioport_addr); | |
619 | ||
620 | kfree(card); | |
621 | pdev->priv = NULL; | |
622 | } | |
623 | ||
624 | /* | |
625 | * setup PCMCIA socket and probe for PEAK-System PC-CARD | |
626 | */ | |
3c8ac0f2 | 627 | static int pcan_probe(struct pcmcia_device *pdev) |
2b61972b SG |
628 | { |
629 | struct pcan_pccard *card; | |
630 | int err; | |
631 | ||
632 | pdev->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO; | |
633 | ||
634 | err = pcmcia_loop_config(pdev, pcan_conf_check, NULL); | |
635 | if (err) { | |
636 | dev_err(&pdev->dev, "pcmcia_loop_config() error %d\n", err); | |
637 | goto probe_err_1; | |
638 | } | |
639 | ||
640 | if (!pdev->irq) { | |
641 | dev_err(&pdev->dev, "no irq assigned\n"); | |
642 | err = -ENODEV; | |
643 | goto probe_err_1; | |
644 | } | |
645 | ||
646 | err = pcmcia_enable_device(pdev); | |
647 | if (err) { | |
648 | dev_err(&pdev->dev, "pcmcia_enable_device failed err=%d\n", | |
649 | err); | |
650 | goto probe_err_1; | |
651 | } | |
652 | ||
653 | card = kzalloc(sizeof(struct pcan_pccard), GFP_KERNEL); | |
654 | if (!card) { | |
2b61972b SG |
655 | err = -ENOMEM; |
656 | goto probe_err_2; | |
657 | } | |
658 | ||
659 | card->pdev = pdev; | |
660 | pdev->priv = card; | |
661 | ||
662 | /* sja1000 api uses iomem */ | |
663 | card->ioport_addr = ioport_map(pdev->resource[0]->start, | |
664 | resource_size(pdev->resource[0])); | |
665 | if (!card->ioport_addr) { | |
666 | dev_err(&pdev->dev, "couldn't map io port into io memory\n"); | |
667 | err = -ENOMEM; | |
668 | goto probe_err_3; | |
669 | } | |
670 | card->fw_major = pcan_read_reg(card, PCC_FW_MAJOR); | |
671 | card->fw_minor = pcan_read_reg(card, PCC_FW_MINOR); | |
672 | ||
88bfb9a7 | 673 | /* display board name and firmware version */ |
2b61972b SG |
674 | dev_info(&pdev->dev, "PEAK-System pcmcia card %s fw %d.%d\n", |
675 | pdev->prod_id[1] ? pdev->prod_id[1] : "PCAN-PC Card", | |
676 | card->fw_major, card->fw_minor); | |
677 | ||
678 | /* detect available channels */ | |
679 | pcan_add_channels(card); | |
ba9b6f9f PST |
680 | if (!card->chan_count) { |
681 | err = -ENOMEM; | |
2b61972b | 682 | goto probe_err_4; |
ba9b6f9f | 683 | } |
2b61972b SG |
684 | |
685 | /* init the timer which controls the leds */ | |
550acfb3 | 686 | timer_setup(&card->led_timer, pcan_led_timer, 0); |
2b61972b SG |
687 | |
688 | /* request the given irq */ | |
689 | err = request_irq(pdev->irq, &pcan_isr, IRQF_SHARED, PCC_NAME, card); | |
690 | if (err) { | |
691 | dev_err(&pdev->dev, "couldn't request irq%d\n", pdev->irq); | |
692 | goto probe_err_5; | |
693 | } | |
694 | ||
695 | /* power on the connectors */ | |
696 | pcan_set_can_power(card, 1); | |
697 | ||
698 | return 0; | |
699 | ||
700 | probe_err_5: | |
701 | /* unregister can devices from network */ | |
702 | pcan_free_channels(card); | |
703 | ||
704 | probe_err_4: | |
705 | ioport_unmap(card->ioport_addr); | |
706 | ||
707 | probe_err_3: | |
708 | kfree(card); | |
709 | pdev->priv = NULL; | |
710 | ||
711 | probe_err_2: | |
712 | pcmcia_disable_device(pdev); | |
713 | ||
714 | probe_err_1: | |
715 | return err; | |
716 | } | |
717 | ||
718 | /* | |
719 | * release claimed resources | |
720 | */ | |
721 | static void pcan_remove(struct pcmcia_device *pdev) | |
722 | { | |
723 | pcan_free(pdev); | |
724 | pcmcia_disable_device(pdev); | |
725 | } | |
726 | ||
727 | static struct pcmcia_driver pcan_driver = { | |
728 | .name = PCC_NAME, | |
729 | .probe = pcan_probe, | |
730 | .remove = pcan_remove, | |
731 | .id_table = pcan_table, | |
732 | }; | |
fdd3f29e | 733 | module_pcmcia_driver(pcan_driver); |