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1da177e4
LT
1/* $Id: ethernet.c,v 1.31 2004/10/18 14:49:03 starvik Exp $
2 *
3 * e100net.c: A network driver for the ETRAX 100LX network controller.
4 *
5 * Copyright (c) 1998-2002 Axis Communications AB.
6 *
7 * The outline of this driver comes from skeleton.c.
8 *
9 * $Log: ethernet.c,v $
10 * Revision 1.31 2004/10/18 14:49:03 starvik
11 * Use RX interrupt as random source
12 *
13 * Revision 1.30 2004/09/29 10:44:04 starvik
14 * Enabed MAC-address output again
15 *
16 * Revision 1.29 2004/08/24 07:14:05 starvik
17 * Make use of generic MDIO interface and constants.
18 *
19 * Revision 1.28 2004/08/20 09:37:11 starvik
20 * Added support for Intel LXT972A. Creds to Randy Scarborough.
21 *
22 * Revision 1.27 2004/08/16 12:37:22 starvik
23 * Merge of Linux 2.6.8
24 *
25 * Revision 1.25 2004/06/21 10:29:57 starvik
26 * Merge of Linux 2.6.7
27 *
28 * Revision 1.23 2004/06/09 05:29:22 starvik
29 * Avoid any race where R_DMA_CH1_FIRST is NULL (may trigger cache bug).
30 *
31 * Revision 1.22 2004/05/14 07:58:03 starvik
32 * Merge of changes from 2.4
33 *
34 * Revision 1.20 2004/03/11 11:38:40 starvik
35 * Merge of Linux 2.6.4
36 *
37 * Revision 1.18 2003/12/03 13:45:46 starvik
38 * Use hardware pad for short packets to prevent information leakage.
39 *
40 * Revision 1.17 2003/07/04 08:27:37 starvik
41 * Merge of Linux 2.5.74
42 *
43 * Revision 1.16 2003/04/24 08:28:22 starvik
44 * New LED behaviour: LED off when no link
45 *
46 * Revision 1.15 2003/04/09 05:20:47 starvik
47 * Merge of Linux 2.5.67
48 *
49 * Revision 1.13 2003/03/06 16:11:01 henriken
50 * Off by one error in group address register setting.
51 *
52 * Revision 1.12 2003/02/27 17:24:19 starvik
53 * Corrected Rev to Revision
54 *
55 * Revision 1.11 2003/01/24 09:53:21 starvik
56 * Oops. Initialize GA to 0, not to 1
57 *
58 * Revision 1.10 2003/01/24 09:50:55 starvik
59 * Initialize GA_0 and GA_1 to 0 to avoid matching of unwanted packets
60 *
61 * Revision 1.9 2002/12/13 07:40:58 starvik
62 * Added basic ethtool interface
63 * Handled out of memory when allocating new buffers
64 *
65 * Revision 1.8 2002/12/11 13:13:57 starvik
66 * Added arch/ to v10 specific includes
67 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
68 *
69 * Revision 1.7 2002/11/26 09:41:42 starvik
70 * Added e100_set_config (standard interface to set media type)
71 * Added protection against preemptive scheduling
72 * Added standard MII ioctls
73 *
74 * Revision 1.6 2002/11/21 07:18:18 starvik
75 * Timers must be initialized in 2.5.48
76 *
77 * Revision 1.5 2002/11/20 11:56:11 starvik
78 * Merge of Linux 2.5.48
79 *
80 * Revision 1.4 2002/11/18 07:26:46 starvik
81 * Linux 2.5 port of latest Linux 2.4 ethernet driver
82 *
83 * Revision 1.33 2002/10/02 20:16:17 hp
84 * SETF, SETS: Use underscored IO_x_ macros rather than incorrect token concatenation
85 *
86 * Revision 1.32 2002/09/16 06:05:58 starvik
87 * Align memory returned by dev_alloc_skb
88 * Moved handling of sent packets to interrupt to avoid reference counting problem
89 *
90 * Revision 1.31 2002/09/10 13:28:23 larsv
91 * Return -EINVAL for unknown ioctls to avoid confusing tools that tests
92 * for supported functionality by issuing special ioctls, i.e. wireless
93 * extensions.
94 *
95 * Revision 1.30 2002/05/07 18:50:08 johana
96 * Correct spelling in comments.
97 *
98 * Revision 1.29 2002/05/06 05:38:49 starvik
99 * Performance improvements:
100 * Large packets are not copied (breakpoint set to 256 bytes)
101 * The cache bug workaround is delayed until half of the receive list
102 * has been used
103 * Added transmit list
104 * Transmit interrupts are only enabled when transmit queue is full
105 *
106 * Revision 1.28.2.1 2002/04/30 08:15:51 starvik
107 * Performance improvements:
108 * Large packets are not copied (breakpoint set to 256 bytes)
109 * The cache bug workaround is delayed until half of the receive list
110 * has been used.
111 * Added transmit list
112 * Transmit interrupts are only enabled when transmit queue is full
113 *
114 * Revision 1.28 2002/04/22 11:47:21 johana
115 * Fix according to 2.4.19-pre7. time_after/time_before and
116 * missing end of comment.
117 * The patch has a typo for ethernet.c in e100_clear_network_leds(),
118 * that is fixed here.
119 *
120 * Revision 1.27 2002/04/12 11:55:11 bjornw
121 * Added TODO
122 *
123 * Revision 1.26 2002/03/15 17:11:02 bjornw
124 * Use prepare_rx_descriptor after the CPU has touched the receiving descs
125 *
126 * Revision 1.25 2002/03/08 13:07:53 bjornw
127 * Unnecessary spinlock removed
128 *
129 * Revision 1.24 2002/02/20 12:57:43 fredriks
130 * Replaced MIN() with min().
131 *
132 * Revision 1.23 2002/02/20 10:58:14 fredriks
133 * Strip the Ethernet checksum (4 bytes) before forwarding a frame to upper layers.
134 *
135 * Revision 1.22 2002/01/30 07:48:22 matsfg
136 * Initiate R_NETWORK_TR_CTRL
137 *
138 * Revision 1.21 2001/11/23 11:54:49 starvik
139 * Added IFF_PROMISC and IFF_ALLMULTI handling in set_multicast_list
140 * Removed compiler warnings
141 *
142 * Revision 1.20 2001/11/12 19:26:00 pkj
143 * * Corrected e100_negotiate() to not assign half to current_duplex when
144 * it was supposed to compare them...
145 * * Cleaned up failure handling in e100_open().
146 * * Fixed compiler warnings.
147 *
148 * Revision 1.19 2001/11/09 07:43:09 starvik
149 * Added full duplex support
150 * Added ioctl to set speed and duplex
151 * Clear LED timer only runs when LED is lit
152 *
153 * Revision 1.18 2001/10/03 14:40:43 jonashg
154 * Update rx_bytes counter.
155 *
156 * Revision 1.17 2001/06/11 12:43:46 olof
157 * Modified defines for network LED behavior
158 *
159 * Revision 1.16 2001/05/30 06:12:46 markusl
160 * TxDesc.next should not be set to NULL
161 *
162 * Revision 1.15 2001/05/29 10:27:04 markusl
163 * Updated after review remarks:
164 * +Use IO_EXTRACT
165 * +Handle underrun
166 *
167 * Revision 1.14 2001/05/29 09:20:14 jonashg
168 * Use driver name on printk output so one can tell which driver that complains.
169 *
170 * Revision 1.13 2001/05/09 12:35:59 johana
171 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
172 *
173 * Revision 1.12 2001/04/05 11:43:11 tobiasa
174 * Check dev before panic.
175 *
176 * Revision 1.11 2001/04/04 11:21:05 markusl
177 * Updated according to review remarks
178 *
179 * Revision 1.10 2001/03/26 16:03:06 bjornw
180 * Needs linux/config.h
181 *
182 * Revision 1.9 2001/03/19 14:47:48 pkj
183 * * Make sure there is always a pause after the network LEDs are
184 * changed so they will not look constantly lit during heavy traffic.
185 * * Always use HZ when setting times relative to jiffies.
186 * * Use LED_NETWORK_SET() when setting the network LEDs.
187 *
188 * Revision 1.8 2001/02/27 13:52:48 bjornw
189 * malloc.h -> slab.h
190 *
191 * Revision 1.7 2001/02/23 13:46:38 bjornw
192 * Spellling check
193 *
194 * Revision 1.6 2001/01/26 15:21:04 starvik
195 * Don't disable interrupts while reading MDIO registers (MDIO is slow)
196 * Corrected promiscuous mode
197 * Improved deallocation of IRQs ("ifconfig eth0 down" now works)
198 *
199 * Revision 1.5 2000/11/29 17:22:22 bjornw
200 * Get rid of the udword types legacy stuff
201 *
202 * Revision 1.4 2000/11/22 16:36:09 bjornw
203 * Please marketing by using the correct case when spelling Etrax.
204 *
205 * Revision 1.3 2000/11/21 16:43:04 bjornw
206 * Minor short->int change
207 *
208 * Revision 1.2 2000/11/08 14:27:57 bjornw
209 * 2.4 port
210 *
211 * Revision 1.1 2000/11/06 13:56:00 bjornw
212 * Verbatim copy of the 1.24 version of e100net.c from elinux
213 *
214 * Revision 1.24 2000/10/04 15:55:23 bjornw
215 * * Use virt_to_phys etc. for DMA addresses
216 * * Removed bogus CHECKSUM_UNNECESSARY
217 *
218 *
219 */
220
1da177e4
LT
221
222#include <linux/module.h>
223
224#include <linux/kernel.h>
1da177e4
LT
225#include <linux/delay.h>
226#include <linux/types.h>
227#include <linux/fcntl.h>
228#include <linux/interrupt.h>
229#include <linux/ptrace.h>
230#include <linux/ioport.h>
231#include <linux/in.h>
232#include <linux/slab.h>
233#include <linux/string.h>
234#include <linux/spinlock.h>
235#include <linux/errno.h>
236#include <linux/init.h>
237
238#include <linux/if.h>
239#include <linux/mii.h>
240#include <linux/netdevice.h>
241#include <linux/etherdevice.h>
242#include <linux/skbuff.h>
243#include <linux/ethtool.h>
244
245#include <asm/arch/svinto.h>/* DMA and register descriptions */
246#include <asm/io.h> /* LED_* I/O functions */
247#include <asm/irq.h>
248#include <asm/dma.h>
249#include <asm/system.h>
250#include <asm/bitops.h>
251#include <asm/ethernet.h>
252#include <asm/cache.h>
253
254//#define ETHDEBUG
255#define D(x)
256
257/*
258 * The name of the card. Is used for messages and in the requests for
259 * io regions, irqs and dma channels
260 */
261
262static const char* cardname = "ETRAX 100LX built-in ethernet controller";
263
264/* A default ethernet address. Highlevel SW will set the real one later */
265
266static struct sockaddr default_mac = {
267 0,
268 { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
269};
270
271/* Information that need to be kept for each board. */
272struct net_local {
273 struct net_device_stats stats;
274 struct mii_if_info mii_if;
275
276 /* Tx control lock. This protects the transmit buffer ring
277 * state along with the "tx full" state of the driver. This
278 * means all netif_queue flow control actions are protected
279 * by this lock as well.
280 */
281 spinlock_t lock;
282};
283
284typedef struct etrax_eth_descr
285{
286 etrax_dma_descr descr;
287 struct sk_buff* skb;
288} etrax_eth_descr;
289
290/* Some transceivers requires special handling */
291struct transceiver_ops
292{
293 unsigned int oui;
294 void (*check_speed)(struct net_device* dev);
295 void (*check_duplex)(struct net_device* dev);
296};
297
298struct transceiver_ops* transceiver;
299
300/* Duplex settings */
301enum duplex
302{
303 half,
304 full,
305 autoneg
306};
307
308/* Dma descriptors etc. */
309
310#define MAX_MEDIA_DATA_SIZE 1518
311
312#define MIN_PACKET_LEN 46
313#define ETHER_HEAD_LEN 14
314
315/*
316** MDIO constants.
317*/
318#define MDIO_START 0x1
319#define MDIO_READ 0x2
320#define MDIO_WRITE 0x1
321#define MDIO_PREAMBLE 0xfffffffful
322
323/* Broadcom specific */
324#define MDIO_AUX_CTRL_STATUS_REG 0x18
325#define MDIO_BC_FULL_DUPLEX_IND 0x1
326#define MDIO_BC_SPEED 0x2
327
328/* TDK specific */
329#define MDIO_TDK_DIAGNOSTIC_REG 18
330#define MDIO_TDK_DIAGNOSTIC_RATE 0x400
331#define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
332
333/*Intel LXT972A specific*/
334#define MDIO_INT_STATUS_REG_2 0x0011
335#define MDIO_INT_FULL_DUPLEX_IND ( 1 << 9 )
336#define MDIO_INT_SPEED ( 1 << 14 )
337
338/* Network flash constants */
339#define NET_FLASH_TIME (HZ/50) /* 20 ms */
340#define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
341#define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
342#define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
343
344#define NO_NETWORK_ACTIVITY 0
345#define NETWORK_ACTIVITY 1
346
347#define NBR_OF_RX_DESC 64
348#define NBR_OF_TX_DESC 256
349
350/* Large packets are sent directly to upper layers while small packets are */
351/* copied (to reduce memory waste). The following constant decides the breakpoint */
352#define RX_COPYBREAK 256
353
354/* Due to a chip bug we need to flush the cache when descriptors are returned */
355/* to the DMA. To decrease performance impact we return descriptors in chunks. */
356/* The following constant determines the number of descriptors to return. */
357#define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
358
359#define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
360
361/* Define some macros to access ETRAX 100 registers */
362#define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
363 IO_FIELD_(reg##_, field##_, val)
364#define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
365 IO_STATE_(reg##_, field##_, _##val)
366
367static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
368 to be processed */
369static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
370static etrax_eth_descr *myPrevRxDesc; /* The descriptor right before myNextRxDesc */
371
372static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
373
374static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
375static etrax_eth_descr* myLastTxDesc; /* End of send queue */
376static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
377static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
378
379static unsigned int network_rec_config_shadow = 0;
380static unsigned int mdio_phy_addr; /* Transciever address */
381
382static unsigned int network_tr_ctrl_shadow = 0;
383
384/* Network speed indication. */
8d06afab
IM
385static DEFINE_TIMER(speed_timer, NULL, 0, 0);
386static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);
1da177e4
LT
387static int current_speed; /* Speed read from transceiver */
388static int current_speed_selection; /* Speed selected by user */
389static unsigned long led_next_time;
390static int led_active;
391static int rx_queue_len;
392
393/* Duplex */
8d06afab 394static DEFINE_TIMER(duplex_timer, NULL, 0, 0);
1da177e4
LT
395static int full_duplex;
396static enum duplex current_duplex;
397
398/* Index to functions, as function prototypes. */
399
400static int etrax_ethernet_init(void);
401
402static int e100_open(struct net_device *dev);
403static int e100_set_mac_address(struct net_device *dev, void *addr);
404static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
7d12e780
DH
405static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id);
406static irqreturn_t e100nw_interrupt(int irq, void *dev_id);
1da177e4
LT
407static void e100_rx(struct net_device *dev);
408static int e100_close(struct net_device *dev);
409static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1da177e4
LT
410static int e100_set_config(struct net_device* dev, struct ifmap* map);
411static void e100_tx_timeout(struct net_device *dev);
412static struct net_device_stats *e100_get_stats(struct net_device *dev);
413static void set_multicast_list(struct net_device *dev);
414static void e100_hardware_send_packet(char *buf, int length);
415static void update_rx_stats(struct net_device_stats *);
416static void update_tx_stats(struct net_device_stats *);
417static int e100_probe_transceiver(struct net_device* dev);
418
419static void e100_check_speed(unsigned long priv);
420static void e100_set_speed(struct net_device* dev, unsigned long speed);
421static void e100_check_duplex(unsigned long priv);
422static void e100_set_duplex(struct net_device* dev, enum duplex);
423static void e100_negotiate(struct net_device* dev);
424
425static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);
426static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);
427
428static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
429static void e100_send_mdio_bit(unsigned char bit);
430static unsigned char e100_receive_mdio_bit(void);
431static void e100_reset_transceiver(struct net_device* net);
432
433static void e100_clear_network_leds(unsigned long dummy);
434static void e100_set_network_leds(int active);
435
7282d491 436static const struct ethtool_ops e100_ethtool_ops;
76f2b4d9 437
1da177e4
LT
438static void broadcom_check_speed(struct net_device* dev);
439static void broadcom_check_duplex(struct net_device* dev);
440static void tdk_check_speed(struct net_device* dev);
441static void tdk_check_duplex(struct net_device* dev);
442static void intel_check_speed(struct net_device* dev);
443static void intel_check_duplex(struct net_device* dev);
444static void generic_check_speed(struct net_device* dev);
445static void generic_check_duplex(struct net_device* dev);
446
447struct transceiver_ops transceivers[] =
448{
449 {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
450 {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
451 {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
452 {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
453 {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
454};
455
456#define tx_done(dev) (*R_DMA_CH0_CMD == 0)
457
458/*
459 * Check for a network adaptor of this type, and return '0' if one exists.
460 * If dev->base_addr == 0, probe all likely locations.
461 * If dev->base_addr == 1, always return failure.
462 * If dev->base_addr == 2, allocate space for the device and return success
463 * (detachable devices only).
464 */
465
466static int __init
467etrax_ethernet_init(void)
468{
469 struct net_device *dev;
470 struct net_local* np;
471 int i, err;
472
473 printk(KERN_INFO
474 "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 2000-2003 Axis Communications AB\n");
475
476 dev = alloc_etherdev(sizeof(struct net_local));
477 np = dev->priv;
478
479 if (!dev)
480 return -ENOMEM;
481
482 dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
483
484 /* now setup our etrax specific stuff */
485
486 dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
487 dev->dma = NETWORK_RX_DMA_NBR;
488
489 /* fill in our handlers so the network layer can talk to us in the future */
490
491 dev->open = e100_open;
492 dev->hard_start_xmit = e100_send_packet;
493 dev->stop = e100_close;
494 dev->get_stats = e100_get_stats;
495 dev->set_multicast_list = set_multicast_list;
496 dev->set_mac_address = e100_set_mac_address;
76f2b4d9 497 dev->ethtool_ops = &e100_ethtool_ops;
1da177e4
LT
498 dev->do_ioctl = e100_ioctl;
499 dev->set_config = e100_set_config;
500 dev->tx_timeout = e100_tx_timeout;
501
502 /* Initialise the list of Etrax DMA-descriptors */
503
504 /* Initialise receive descriptors */
505
506 for (i = 0; i < NBR_OF_RX_DESC; i++) {
507 /* Allocate two extra cachelines to make sure that buffer used by DMA
508 * does not share cacheline with any other data (to avoid cache bug)
509 */
510 RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
92b1f905
DR
511 if (!RxDescList[i].skb)
512 return -ENOMEM;
1da177e4
LT
513 RxDescList[i].descr.ctrl = 0;
514 RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
515 RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
516 RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
517 RxDescList[i].descr.status = 0;
518 RxDescList[i].descr.hw_len = 0;
519 prepare_rx_descriptor(&RxDescList[i].descr);
520 }
521
522 RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
523 RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
524 rx_queue_len = 0;
525
526 /* Initialize transmit descriptors */
527 for (i = 0; i < NBR_OF_TX_DESC; i++) {
528 TxDescList[i].descr.ctrl = 0;
529 TxDescList[i].descr.sw_len = 0;
530 TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
531 TxDescList[i].descr.buf = 0;
532 TxDescList[i].descr.status = 0;
533 TxDescList[i].descr.hw_len = 0;
534 TxDescList[i].skb = 0;
535 }
536
537 TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
538 TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
539
540 /* Initialise initial pointers */
541
542 myNextRxDesc = &RxDescList[0];
543 myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
544 myPrevRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
545 myFirstTxDesc = &TxDescList[0];
546 myNextTxDesc = &TxDescList[0];
547 myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
548
549 /* Register device */
550 err = register_netdev(dev);
551 if (err) {
552 free_netdev(dev);
553 return err;
554 }
555
556 /* set the default MAC address */
557
558 e100_set_mac_address(dev, &default_mac);
559
560 /* Initialize speed indicator stuff. */
561
562 current_speed = 10;
563 current_speed_selection = 0; /* Auto */
564 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
565 duplex_timer.data = (unsigned long)dev;
566 speed_timer.function = e100_check_speed;
567
568 clear_led_timer.function = e100_clear_network_leds;
569
570 full_duplex = 0;
571 current_duplex = autoneg;
572 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
573 duplex_timer.data = (unsigned long)dev;
574 duplex_timer.function = e100_check_duplex;
575
576 /* Initialize mii interface */
577 np->mii_if.phy_id = mdio_phy_addr;
578 np->mii_if.phy_id_mask = 0x1f;
579 np->mii_if.reg_num_mask = 0x1f;
580 np->mii_if.dev = dev;
581 np->mii_if.mdio_read = e100_get_mdio_reg;
582 np->mii_if.mdio_write = e100_set_mdio_reg;
583
584 /* Initialize group address registers to make sure that no */
585 /* unwanted addresses are matched */
586 *R_NETWORK_GA_0 = 0x00000000;
587 *R_NETWORK_GA_1 = 0x00000000;
588 return 0;
589}
590
591/* set MAC address of the interface. called from the core after a
592 * SIOCSIFADDR ioctl, and from the bootup above.
593 */
594
595static int
596e100_set_mac_address(struct net_device *dev, void *p)
597{
598 struct net_local *np = (struct net_local *)dev->priv;
599 struct sockaddr *addr = p;
600 int i;
601
602 spin_lock(&np->lock); /* preemption protection */
603
604 /* remember it */
605
606 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
607
608 /* Write it to the hardware.
609 * Note the way the address is wrapped:
610 * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
611 * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
612 */
613
614 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
615 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
616 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
617 *R_NETWORK_SA_2 = 0;
618
619 /* show it in the log as well */
620
0795af57
JP
621 printk(KERN_INFO "%s: changed MAC to %s\n",
622 dev->name, print_mac(mac, dev->dev_addr));
1da177e4
LT
623
624 spin_unlock(&np->lock);
625
626 return 0;
627}
628
629/*
630 * Open/initialize the board. This is called (in the current kernel)
631 * sometime after booting when the 'ifconfig' program is run.
632 *
633 * This routine should set everything up anew at each open, even
634 * registers that "should" only need to be set once at boot, so that
635 * there is non-reboot way to recover if something goes wrong.
636 */
637
638static int
639e100_open(struct net_device *dev)
640{
641 unsigned long flags;
642
643 /* enable the MDIO output pin */
644
645 *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
646
647 *R_IRQ_MASK0_CLR =
648 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
649 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
650 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
651
652 /* clear dma0 and 1 eop and descr irq masks */
653 *R_IRQ_MASK2_CLR =
654 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
655 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
656 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
657 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
658
659 /* Reset and wait for the DMA channels */
660
661 RESET_DMA(NETWORK_TX_DMA_NBR);
662 RESET_DMA(NETWORK_RX_DMA_NBR);
663 WAIT_DMA(NETWORK_TX_DMA_NBR);
664 WAIT_DMA(NETWORK_RX_DMA_NBR);
665
666 /* Initialise the etrax network controller */
667
668 /* allocate the irq corresponding to the receiving DMA */
669
670 if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt,
1fb9df5d 671 IRQF_SAMPLE_RANDOM, cardname, (void *)dev)) {
1da177e4
LT
672 goto grace_exit0;
673 }
674
675 /* allocate the irq corresponding to the transmitting DMA */
676
677 if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
678 cardname, (void *)dev)) {
679 goto grace_exit1;
680 }
681
682 /* allocate the irq corresponding to the network errors etc */
683
684 if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
685 cardname, (void *)dev)) {
686 goto grace_exit2;
687 }
688
689 /* give the HW an idea of what MAC address we want */
690
691 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
692 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
693 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
694 *R_NETWORK_SA_2 = 0;
695
696#if 0
697 /* use promiscuous mode for testing */
698 *R_NETWORK_GA_0 = 0xffffffff;
699 *R_NETWORK_GA_1 = 0xffffffff;
700
701 *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
702#else
703 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
704 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
705 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
706 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
707#endif
708
709 *R_NETWORK_GEN_CONFIG =
710 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
711 IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
712
713 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
714 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
715 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
716 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
717 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
718 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
719 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
720 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
721
722 save_flags(flags);
723 cli();
724
725 /* enable the irq's for ethernet DMA */
726
727 *R_IRQ_MASK2_SET =
728 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
729 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
730
731 *R_IRQ_MASK0_SET =
732 IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
733 IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
734 IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
735
736 /* make sure the irqs are cleared */
737
738 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
739 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
740
741 /* make sure the rec and transmit error counters are cleared */
742
743 (void)*R_REC_COUNTERS; /* dummy read */
744 (void)*R_TR_COUNTERS; /* dummy read */
745
746 /* start the receiving DMA channel so we can receive packets from now on */
747
748 *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
749 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
750
751 /* Set up transmit DMA channel so it can be restarted later */
752
753 *R_DMA_CH0_FIRST = 0;
754 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
755
756 restore_flags(flags);
757
758 /* Probe for transceiver */
759 if (e100_probe_transceiver(dev))
760 goto grace_exit3;
761
762 /* Start duplex/speed timers */
763 add_timer(&speed_timer);
764 add_timer(&duplex_timer);
765
766 /* We are now ready to accept transmit requeusts from
767 * the queueing layer of the networking.
768 */
769 netif_start_queue(dev);
770
771 return 0;
772
773grace_exit3:
774 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
775grace_exit2:
776 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
777grace_exit1:
778 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
779grace_exit0:
780 return -EAGAIN;
781}
782
783
784static void
785generic_check_speed(struct net_device* dev)
786{
787 unsigned long data;
788 data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE);
789 if ((data & ADVERTISE_100FULL) ||
790 (data & ADVERTISE_100HALF))
791 current_speed = 100;
792 else
793 current_speed = 10;
794}
795
796static void
797tdk_check_speed(struct net_device* dev)
798{
799 unsigned long data;
800 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_TDK_DIAGNOSTIC_REG);
801 current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
802}
803
804static void
805broadcom_check_speed(struct net_device* dev)
806{
807 unsigned long data;
808 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_AUX_CTRL_STATUS_REG);
809 current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
810}
811
812static void
813intel_check_speed(struct net_device* dev)
814{
815 unsigned long data;
816 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_INT_STATUS_REG_2);
817 current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
818}
819
820static void
821e100_check_speed(unsigned long priv)
822{
823 struct net_device* dev = (struct net_device*)priv;
824 static int led_initiated = 0;
825 unsigned long data;
826 int old_speed = current_speed;
827
828 data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMSR);
829 if (!(data & BMSR_LSTATUS)) {
830 current_speed = 0;
831 } else {
832 transceiver->check_speed(dev);
833 }
834
835 if ((old_speed != current_speed) || !led_initiated) {
836 led_initiated = 1;
837 e100_set_network_leds(NO_NETWORK_ACTIVITY);
838 }
839
840 /* Reinitialize the timer. */
841 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
842 add_timer(&speed_timer);
843}
844
845static void
846e100_negotiate(struct net_device* dev)
847{
848 unsigned short data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE);
849
850 /* Discard old speed and duplex settings */
851 data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |
852 ADVERTISE_10HALF | ADVERTISE_10FULL);
853
854 switch (current_speed_selection) {
855 case 10 :
856 if (current_duplex == full)
857 data |= ADVERTISE_10FULL;
858 else if (current_duplex == half)
859 data |= ADVERTISE_10HALF;
860 else
861 data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
862 break;
863
864 case 100 :
865 if (current_duplex == full)
866 data |= ADVERTISE_100FULL;
867 else if (current_duplex == half)
868 data |= ADVERTISE_100HALF;
869 else
870 data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
871 break;
872
873 case 0 : /* Auto */
874 if (current_duplex == full)
875 data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
876 else if (current_duplex == half)
877 data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
878 else
879 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
880 ADVERTISE_100HALF | ADVERTISE_100FULL;
881 break;
882
883 default : /* assume autoneg speed and duplex */
884 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
885 ADVERTISE_100HALF | ADVERTISE_100FULL;
886 }
887
888 e100_set_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE, data);
889
890 /* Renegotiate with link partner */
891 data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMCR);
892 data |= BMCR_ANENABLE | BMCR_ANRESTART;
893
894 e100_set_mdio_reg(dev, mdio_phy_addr, MII_BMCR, data);
895}
896
897static void
898e100_set_speed(struct net_device* dev, unsigned long speed)
899{
900 if (speed != current_speed_selection) {
901 current_speed_selection = speed;
902 e100_negotiate(dev);
903 }
904}
905
906static void
907e100_check_duplex(unsigned long priv)
908{
909 struct net_device *dev = (struct net_device *)priv;
910 struct net_local *np = (struct net_local *)dev->priv;
911 int old_duplex = full_duplex;
912 transceiver->check_duplex(dev);
913 if (old_duplex != full_duplex) {
914 /* Duplex changed */
915 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
916 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
917 }
918
919 /* Reinitialize the timer. */
920 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
921 add_timer(&duplex_timer);
922 np->mii_if.full_duplex = full_duplex;
923}
924
925static void
926generic_check_duplex(struct net_device* dev)
927{
928 unsigned long data;
929 data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE);
930 if ((data & ADVERTISE_10FULL) ||
931 (data & ADVERTISE_100FULL))
932 full_duplex = 1;
933 else
934 full_duplex = 0;
935}
936
937static void
938tdk_check_duplex(struct net_device* dev)
939{
940 unsigned long data;
941 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_TDK_DIAGNOSTIC_REG);
942 full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
943}
944
945static void
946broadcom_check_duplex(struct net_device* dev)
947{
948 unsigned long data;
949 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_AUX_CTRL_STATUS_REG);
950 full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
951}
952
953static void
954intel_check_duplex(struct net_device* dev)
955{
956 unsigned long data;
957 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_INT_STATUS_REG_2);
958 full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
959}
960
961static void
962e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
963{
964 if (new_duplex != current_duplex) {
965 current_duplex = new_duplex;
966 e100_negotiate(dev);
967 }
968}
969
970static int
971e100_probe_transceiver(struct net_device* dev)
972{
973 unsigned int phyid_high;
974 unsigned int phyid_low;
975 unsigned int oui;
976 struct transceiver_ops* ops = NULL;
977
978 /* Probe MDIO physical address */
979 for (mdio_phy_addr = 0; mdio_phy_addr <= 31; mdio_phy_addr++) {
980 if (e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMSR) != 0xffff)
981 break;
982 }
983 if (mdio_phy_addr == 32)
984 return -ENODEV;
985
986 /* Get manufacturer */
987 phyid_high = e100_get_mdio_reg(dev, mdio_phy_addr, MII_PHYSID1);
988 phyid_low = e100_get_mdio_reg(dev, mdio_phy_addr, MII_PHYSID2);
989 oui = (phyid_high << 6) | (phyid_low >> 10);
990
991 for (ops = &transceivers[0]; ops->oui; ops++) {
992 if (ops->oui == oui)
993 break;
994 }
995 transceiver = ops;
996
997 return 0;
998}
999
1000static int
1001e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
1002{
1003 unsigned short cmd; /* Data to be sent on MDIO port */
1004 int data; /* Data read from MDIO */
1005 int bitCounter;
1006
1007 /* Start of frame, OP Code, Physical Address, Register Address */
1008 cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) |
1009 (location << 2);
1010
1011 e100_send_mdio_cmd(cmd, 0);
1012
1013 data = 0;
1014
1015 /* Data... */
1016 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
1017 data |= (e100_receive_mdio_bit() << bitCounter);
1018 }
1019
1020 return data;
1021}
1022
1023static void
1024e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)
1025{
1026 int bitCounter;
1027 unsigned short cmd;
1028
1029 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) |
1030 (location << 2);
1031
1032 e100_send_mdio_cmd(cmd, 1);
1033
1034 /* Data... */
1035 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
1036 e100_send_mdio_bit(GET_BIT(bitCounter, value));
1037 }
1038
1039}
1040
1041static void
1042e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
1043{
1044 int bitCounter;
1045 unsigned char data = 0x2;
1046
1047 /* Preamble */
1048 for (bitCounter = 31; bitCounter>= 0; bitCounter--)
1049 e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
1050
1051 for (bitCounter = 15; bitCounter >= 2; bitCounter--)
1052 e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
1053
1054 /* Turnaround */
1055 for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
1056 if (write_cmd)
1057 e100_send_mdio_bit(GET_BIT(bitCounter, data));
1058 else
1059 e100_receive_mdio_bit();
1060}
1061
1062static void
1063e100_send_mdio_bit(unsigned char bit)
1064{
1065 *R_NETWORK_MGM_CTRL =
1066 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
1067 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
1068 udelay(1);
1069 *R_NETWORK_MGM_CTRL =
1070 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
1071 IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
1072 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
1073 udelay(1);
1074}
1075
1076static unsigned char
1077e100_receive_mdio_bit()
1078{
1079 unsigned char bit;
1080 *R_NETWORK_MGM_CTRL = 0;
1081 bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
1082 udelay(1);
1083 *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
1084 udelay(1);
1085 return bit;
1086}
1087
1088static void
1089e100_reset_transceiver(struct net_device* dev)
1090{
1091 unsigned short cmd;
1092 unsigned short data;
1093 int bitCounter;
1094
1095 data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMCR);
1096
1097 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (mdio_phy_addr << 7) | (MII_BMCR << 2);
1098
1099 e100_send_mdio_cmd(cmd, 1);
1100
1101 data |= 0x8000;
1102
1103 for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
1104 e100_send_mdio_bit(GET_BIT(bitCounter, data));
1105 }
1106}
1107
1108/* Called by upper layers if they decide it took too long to complete
1109 * sending a packet - we need to reset and stuff.
1110 */
1111
1112static void
1113e100_tx_timeout(struct net_device *dev)
1114{
1115 struct net_local *np = (struct net_local *)dev->priv;
1116 unsigned long flags;
1117
1118 spin_lock_irqsave(&np->lock, flags);
1119
1120 printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
1121 tx_done(dev) ? "IRQ problem" : "network cable problem");
1122
1123 /* remember we got an error */
1124
1125 np->stats.tx_errors++;
1126
1127 /* reset the TX DMA in case it has hung on something */
1128
1129 RESET_DMA(NETWORK_TX_DMA_NBR);
1130 WAIT_DMA(NETWORK_TX_DMA_NBR);
1131
1132 /* Reset the transceiver. */
1133
1134 e100_reset_transceiver(dev);
1135
1136 /* and get rid of the packets that never got an interrupt */
1137 while (myFirstTxDesc != myNextTxDesc)
1138 {
1139 dev_kfree_skb(myFirstTxDesc->skb);
1140 myFirstTxDesc->skb = 0;
1141 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1142 }
1143
1144 /* Set up transmit DMA channel so it can be restarted later */
1145 *R_DMA_CH0_FIRST = 0;
1146 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
1147
1148 /* tell the upper layers we're ok again */
1149
1150 netif_wake_queue(dev);
1151 spin_unlock_irqrestore(&np->lock, flags);
1152}
1153
1154
1155/* This will only be invoked if the driver is _not_ in XOFF state.
1156 * What this means is that we need not check it, and that this
1157 * invariant will hold if we make sure that the netif_*_queue()
1158 * calls are done at the proper times.
1159 */
1160
1161static int
1162e100_send_packet(struct sk_buff *skb, struct net_device *dev)
1163{
1164 struct net_local *np = (struct net_local *)dev->priv;
1165 unsigned char *buf = skb->data;
1166 unsigned long flags;
1167
1168#ifdef ETHDEBUG
1169 printk("send packet len %d\n", length);
1170#endif
1171 spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
1172
1173 myNextTxDesc->skb = skb;
1174
1175 dev->trans_start = jiffies;
1176
1177 e100_hardware_send_packet(buf, skb->len);
1178
1179 myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
1180
1181 /* Stop queue if full */
1182 if (myNextTxDesc == myFirstTxDesc) {
1183 netif_stop_queue(dev);
1184 }
1185
1186 spin_unlock_irqrestore(&np->lock, flags);
1187
1188 return 0;
1189}
1190
1191/*
1192 * The typical workload of the driver:
1193 * Handle the network interface interrupts.
1194 */
1195
1196static irqreturn_t
7d12e780 1197e100rxtx_interrupt(int irq, void *dev_id)
1da177e4
LT
1198{
1199 struct net_device *dev = (struct net_device *)dev_id;
1200 struct net_local *np = (struct net_local *)dev->priv;
1201 unsigned long irqbits = *R_IRQ_MASK2_RD;
1202
1203 /* Disable RX/TX IRQs to avoid reentrancy */
1204 *R_IRQ_MASK2_CLR =
1205 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
1206 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
1207
1208 /* Handle received packets */
1209 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
1210 /* acknowledge the eop interrupt */
1211
1212 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
1213
1214 /* check if one or more complete packets were indeed received */
1215
1216 while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &&
1217 (myNextRxDesc != myLastRxDesc)) {
1218 /* Take out the buffer and give it to the OS, then
1219 * allocate a new buffer to put a packet in.
1220 */
1221 e100_rx(dev);
1222 ((struct net_local *)dev->priv)->stats.rx_packets++;
1223 /* restart/continue on the channel, for safety */
1224 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
1225 /* clear dma channel 1 eop/descr irq bits */
1226 *R_DMA_CH1_CLR_INTR =
1227 IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
1228 IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
1229
1230 /* now, we might have gotten another packet
1231 so we have to loop back and check if so */
1232 }
1233 }
1234
1235 /* Report any packets that have been sent */
1236 while (myFirstTxDesc != phys_to_virt(*R_DMA_CH0_FIRST) &&
1237 myFirstTxDesc != myNextTxDesc)
1238 {
1239 np->stats.tx_bytes += myFirstTxDesc->skb->len;
1240 np->stats.tx_packets++;
1241
1242 /* dma is ready with the transmission of the data in tx_skb, so now
1243 we can release the skb memory */
1244 dev_kfree_skb_irq(myFirstTxDesc->skb);
1245 myFirstTxDesc->skb = 0;
1246 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1247 }
1248
1249 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
1250 /* acknowledge the eop interrupt and wake up queue */
1251 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
1252 netif_wake_queue(dev);
1253 }
1254
1255 /* Enable RX/TX IRQs again */
1256 *R_IRQ_MASK2_SET =
1257 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
1258 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
1259
1260 return IRQ_HANDLED;
1261}
1262
1263static irqreturn_t
7d12e780 1264e100nw_interrupt(int irq, void *dev_id)
1da177e4
LT
1265{
1266 struct net_device *dev = (struct net_device *)dev_id;
1267 struct net_local *np = (struct net_local *)dev->priv;
1268 unsigned long irqbits = *R_IRQ_MASK0_RD;
1269
1270 /* check for underrun irq */
1271 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
1272 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1273 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1274 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1275 np->stats.tx_errors++;
1276 D(printk("ethernet receiver underrun!\n"));
1277 }
1278
1279 /* check for overrun irq */
1280 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
1281 update_rx_stats(&np->stats); /* this will ack the irq */
1282 D(printk("ethernet receiver overrun!\n"));
1283 }
1284 /* check for excessive collision irq */
1285 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
1286 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1287 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1288 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1289 *R_NETWORK_TR_CTRL = IO_STATE(R_NETWORK_TR_CTRL, clr_error, clr);
1290 np->stats.tx_errors++;
1291 D(printk("ethernet excessive collisions!\n"));
1292 }
1293 return IRQ_HANDLED;
1294}
1295
1296/* We have a good packet(s), get it/them out of the buffers. */
1297static void
1298e100_rx(struct net_device *dev)
1299{
1300 struct sk_buff *skb;
1301 int length = 0;
1302 struct net_local *np = (struct net_local *)dev->priv;
1303 unsigned char *skb_data_ptr;
1304#ifdef ETHDEBUG
1305 int i;
1306#endif
1307
1308 if (!led_active && time_after(jiffies, led_next_time)) {
1309 /* light the network leds depending on the current speed. */
1310 e100_set_network_leds(NETWORK_ACTIVITY);
1311
1312 /* Set the earliest time we may clear the LED */
1313 led_next_time = jiffies + NET_FLASH_TIME;
1314 led_active = 1;
1315 mod_timer(&clear_led_timer, jiffies + HZ/10);
1316 }
1317
1318 length = myNextRxDesc->descr.hw_len - 4;
1319 ((struct net_local *)dev->priv)->stats.rx_bytes += length;
1320
1321#ifdef ETHDEBUG
1322 printk("Got a packet of length %d:\n", length);
1323 /* dump the first bytes in the packet */
1324 skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
1325 for (i = 0; i < 8; i++) {
1326 printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
1327 skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
1328 skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
1329 skb_data_ptr += 8;
1330 }
1331#endif
1332
1333 if (length < RX_COPYBREAK) {
1334 /* Small packet, copy data */
1335 skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
1336 if (!skb) {
1337 np->stats.rx_errors++;
1338 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1339 return;
1340 }
1341
1342 skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
1343 skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
1344
1345#ifdef ETHDEBUG
1346 printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
4305b541
ACM
1347 skb->head, skb->data, skb_tail_pointer(skb),
1348 skb_end_pointer(skb));
1da177e4
LT
1349 printk("copying packet to 0x%x.\n", skb_data_ptr);
1350#endif
1351
1352 memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
1353 }
1354 else {
1355 /* Large packet, send directly to upper layers and allocate new
1356 * memory (aligned to cache line boundary to avoid bug).
1357 * Before sending the skb to upper layers we must make sure that
1358 * skb->data points to the aligned start of the packet.
1359 */
1360 int align;
1361 struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
1362 if (!new_skb) {
1363 np->stats.rx_errors++;
1364 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1365 return;
1366 }
1367 skb = myNextRxDesc->skb;
1368 align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
1369 skb_put(skb, length + align);
1370 skb_pull(skb, align); /* Remove alignment bytes */
1371 myNextRxDesc->skb = new_skb;
1372 myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
1373 }
1374
1da177e4
LT
1375 skb->protocol = eth_type_trans(skb, dev);
1376
1377 /* Send the packet to the upper layers */
1378 netif_rx(skb);
1379
1380 /* Prepare for next packet */
1381 myNextRxDesc->descr.status = 0;
1382 myPrevRxDesc = myNextRxDesc;
1383 myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
1384
1385 rx_queue_len++;
1386
1387 /* Check if descriptors should be returned */
1388 if (rx_queue_len == RX_QUEUE_THRESHOLD) {
1389 flush_etrax_cache();
1390 myPrevRxDesc->descr.ctrl |= d_eol;
1391 myLastRxDesc->descr.ctrl &= ~d_eol;
1392 myLastRxDesc = myPrevRxDesc;
1393 rx_queue_len = 0;
1394 }
1395}
1396
1397/* The inverse routine to net_open(). */
1398static int
1399e100_close(struct net_device *dev)
1400{
1401 struct net_local *np = (struct net_local *)dev->priv;
1402
1403 printk(KERN_INFO "Closing %s.\n", dev->name);
1404
1405 netif_stop_queue(dev);
1406
1407 *R_IRQ_MASK0_CLR =
1408 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
1409 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
1410 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
1411
1412 *R_IRQ_MASK2_CLR =
1413 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
1414 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
1415 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
1416 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
1417
1418 /* Stop the receiver and the transmitter */
1419
1420 RESET_DMA(NETWORK_TX_DMA_NBR);
1421 RESET_DMA(NETWORK_RX_DMA_NBR);
1422
1423 /* Flush the Tx and disable Rx here. */
1424
1425 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
1426 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
1427 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
1428
1429 /* Update the statistics here. */
1430
1431 update_rx_stats(&np->stats);
1432 update_tx_stats(&np->stats);
1433
1434 /* Stop speed/duplex timers */
1435 del_timer(&speed_timer);
1436 del_timer(&duplex_timer);
1437
1438 return 0;
1439}
1440
1441static int
1442e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1443{
1444 struct mii_ioctl_data *data = if_mii(ifr);
1445 struct net_local *np = netdev_priv(dev);
1446
1447 spin_lock(&np->lock); /* Preempt protection */
1448 switch (cmd) {
1da177e4
LT
1449 case SIOCGMIIPHY: /* Get PHY address */
1450 data->phy_id = mdio_phy_addr;
1451 break;
1452 case SIOCGMIIREG: /* Read MII register */
1453 data->val_out = e100_get_mdio_reg(dev, mdio_phy_addr, data->reg_num);
1454 break;
1455 case SIOCSMIIREG: /* Write MII register */
1456 e100_set_mdio_reg(dev, mdio_phy_addr, data->reg_num, data->val_in);
1457 break;
1458 /* The ioctls below should be considered obsolete but are */
1459 /* still present for compatability with old scripts/apps */
1460 case SET_ETH_SPEED_10: /* 10 Mbps */
1461 e100_set_speed(dev, 10);
1462 break;
1463 case SET_ETH_SPEED_100: /* 100 Mbps */
1464 e100_set_speed(dev, 100);
1465 break;
1466 case SET_ETH_SPEED_AUTO: /* Auto negotiate speed */
1467 e100_set_speed(dev, 0);
1468 break;
1469 case SET_ETH_DUPLEX_HALF: /* Half duplex. */
1470 e100_set_duplex(dev, half);
1471 break;
1472 case SET_ETH_DUPLEX_FULL: /* Full duplex. */
1473 e100_set_duplex(dev, full);
1474 break;
1475 case SET_ETH_DUPLEX_AUTO: /* Autonegotiate duplex*/
1476 e100_set_duplex(dev, autoneg);
1477 break;
1478 default:
1479 return -EINVAL;
1480 }
1481 spin_unlock(&np->lock);
1482 return 0;
1483}
1484
76f2b4d9
CH
1485static int e100_set_settings(struct net_device *dev,
1486 struct ethtool_cmd *ecmd)
1da177e4 1487{
76f2b4d9 1488 ecmd->supported = SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII |
1da177e4
LT
1489 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
1490 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
76f2b4d9
CH
1491 ecmd->port = PORT_TP;
1492 ecmd->transceiver = XCVR_EXTERNAL;
1493 ecmd->phy_address = mdio_phy_addr;
1494 ecmd->speed = current_speed;
1495 ecmd->duplex = full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
1496 ecmd->advertising = ADVERTISED_TP;
1497
1498 if (current_duplex == autoneg && current_speed_selection == 0)
1499 ecmd->advertising |= ADVERTISED_Autoneg;
1500 else {
1501 ecmd->advertising |=
1502 ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
1503 ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
1504 if (current_speed_selection == 10)
1505 ecmd->advertising &= ~(ADVERTISED_100baseT_Half |
1506 ADVERTISED_100baseT_Full);
1507 else if (current_speed_selection == 100)
1508 ecmd->advertising &= ~(ADVERTISED_10baseT_Half |
1509 ADVERTISED_10baseT_Full);
1510 if (current_duplex == half)
1511 ecmd->advertising &= ~(ADVERTISED_10baseT_Full |
1512 ADVERTISED_100baseT_Full);
1513 else if (current_duplex == full)
1514 ecmd->advertising &= ~(ADVERTISED_10baseT_Half |
1515 ADVERTISED_100baseT_Half);
1516 }
1517
1518 ecmd->autoneg = AUTONEG_ENABLE;
1519 return 0;
1520}
1521
1522static int e100_set_settings(struct net_device *dev,
1523 struct ethtool_cmd *ecmd)
1524{
1525 if (ecmd->autoneg == AUTONEG_ENABLE) {
1526 e100_set_duplex(dev, autoneg);
1527 e100_set_speed(dev, 0);
1528 } else {
1529 e100_set_duplex(dev, ecmd->duplex == DUPLEX_HALF ? half : full);
1530 e100_set_speed(dev, ecmd->speed == SPEED_10 ? 10: 100);
1da177e4 1531 }
76f2b4d9
CH
1532
1533 return 0;
1534}
1535
1536static void e100_get_drvinfo(struct net_device *dev,
1537 struct ethtool_drvinfo *info)
1538{
1539 strncpy(info->driver, "ETRAX 100LX", sizeof(info->driver) - 1);
1540 strncpy(info->version, "$Revision: 1.31 $", sizeof(info->version) - 1);
1541 strncpy(info->fw_version, "N/A", sizeof(info->fw_version) - 1);
1542 strncpy(info->bus_info, "N/A", sizeof(info->bus_info) - 1);
1543}
1544
1545static int e100_nway_reset(struct net_device *dev)
1546{
1547 if (current_duplex == autoneg && current_speed_selection == 0)
1548 e100_negotiate(dev);
1da177e4
LT
1549 return 0;
1550}
1551
7282d491 1552static const struct ethtool_ops e100_ethtool_ops = {
76f2b4d9
CH
1553 .get_settings = e100_get_settings,
1554 .set_settings = e100_set_settings,
1555 .get_drvinfo = e100_get_drvinfo,
1556 .nway_reset = e100_nway_reset,
1557 .get_link = ethtool_op_get_link,
1558};
1559
1da177e4
LT
1560static int
1561e100_set_config(struct net_device *dev, struct ifmap *map)
1562{
1563 struct net_local *np = (struct net_local *)dev->priv;
1564 spin_lock(&np->lock); /* Preempt protection */
1565
1566 switch(map->port) {
1567 case IF_PORT_UNKNOWN:
1568 /* Use autoneg */
1569 e100_set_speed(dev, 0);
1570 e100_set_duplex(dev, autoneg);
1571 break;
1572 case IF_PORT_10BASET:
1573 e100_set_speed(dev, 10);
1574 e100_set_duplex(dev, autoneg);
1575 break;
1576 case IF_PORT_100BASET:
1577 case IF_PORT_100BASETX:
1578 e100_set_speed(dev, 100);
1579 e100_set_duplex(dev, autoneg);
1580 break;
1581 case IF_PORT_100BASEFX:
1582 case IF_PORT_10BASE2:
1583 case IF_PORT_AUI:
1584 spin_unlock(&np->lock);
1585 return -EOPNOTSUPP;
1586 break;
1587 default:
1588 printk(KERN_ERR "%s: Invalid media selected", dev->name);
1589 spin_unlock(&np->lock);
1590 return -EINVAL;
1591 }
1592 spin_unlock(&np->lock);
1593 return 0;
1594}
1595
1596static void
1597update_rx_stats(struct net_device_stats *es)
1598{
1599 unsigned long r = *R_REC_COUNTERS;
1600 /* update stats relevant to reception errors */
1601 es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
1602 es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
1603 es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
1604 es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
1605}
1606
1607static void
1608update_tx_stats(struct net_device_stats *es)
1609{
1610 unsigned long r = *R_TR_COUNTERS;
1611 /* update stats relevant to transmission errors */
1612 es->collisions +=
1613 IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
1614 IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
1615 es->tx_errors += IO_EXTRACT(R_TR_COUNTERS, deferred, r);
1616}
1617
1618/*
1619 * Get the current statistics.
1620 * This may be called with the card open or closed.
1621 */
1622static struct net_device_stats *
1623e100_get_stats(struct net_device *dev)
1624{
1625 struct net_local *lp = (struct net_local *)dev->priv;
1626 unsigned long flags;
1627 spin_lock_irqsave(&lp->lock, flags);
1628
1629 update_rx_stats(&lp->stats);
1630 update_tx_stats(&lp->stats);
1631
1632 spin_unlock_irqrestore(&lp->lock, flags);
1633 return &lp->stats;
1634}
1635
1636/*
1637 * Set or clear the multicast filter for this adaptor.
1638 * num_addrs == -1 Promiscuous mode, receive all packets
1639 * num_addrs == 0 Normal mode, clear multicast list
1640 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1641 * and do best-effort filtering.
1642 */
1643static void
1644set_multicast_list(struct net_device *dev)
1645{
1646 struct net_local *lp = (struct net_local *)dev->priv;
1647 int num_addr = dev->mc_count;
1648 unsigned long int lo_bits;
1649 unsigned long int hi_bits;
1650 spin_lock(&lp->lock);
1651 if (dev->flags & IFF_PROMISC)
1652 {
1653 /* promiscuous mode */
1654 lo_bits = 0xfffffffful;
1655 hi_bits = 0xfffffffful;
1656
1657 /* Enable individual receive */
1658 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
1659 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1660 } else if (dev->flags & IFF_ALLMULTI) {
1661 /* enable all multicasts */
1662 lo_bits = 0xfffffffful;
1663 hi_bits = 0xfffffffful;
1664
1665 /* Disable individual receive */
1666 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1667 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1668 } else if (num_addr == 0) {
1669 /* Normal, clear the mc list */
1670 lo_bits = 0x00000000ul;
1671 hi_bits = 0x00000000ul;
1672
1673 /* Disable individual receive */
1674 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1675 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1676 } else {
1677 /* MC mode, receive normal and MC packets */
1678 char hash_ix;
1679 struct dev_mc_list *dmi = dev->mc_list;
1680 int i;
1681 char *baddr;
1682 lo_bits = 0x00000000ul;
1683 hi_bits = 0x00000000ul;
1684 for (i=0; i<num_addr; i++) {
1685 /* Calculate the hash index for the GA registers */
1686
1687 hash_ix = 0;
1688 baddr = dmi->dmi_addr;
1689 hash_ix ^= (*baddr) & 0x3f;
1690 hash_ix ^= ((*baddr) >> 6) & 0x03;
1691 ++baddr;
1692 hash_ix ^= ((*baddr) << 2) & 0x03c;
1693 hash_ix ^= ((*baddr) >> 4) & 0xf;
1694 ++baddr;
1695 hash_ix ^= ((*baddr) << 4) & 0x30;
1696 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1697 ++baddr;
1698 hash_ix ^= (*baddr) & 0x3f;
1699 hash_ix ^= ((*baddr) >> 6) & 0x03;
1700 ++baddr;
1701 hash_ix ^= ((*baddr) << 2) & 0x03c;
1702 hash_ix ^= ((*baddr) >> 4) & 0xf;
1703 ++baddr;
1704 hash_ix ^= ((*baddr) << 4) & 0x30;
1705 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1706
1707 hash_ix &= 0x3f;
1708
1709 if (hash_ix >= 32) {
1710 hi_bits |= (1 << (hash_ix-32));
1711 }
1712 else {
1713 lo_bits |= (1 << hash_ix);
1714 }
1715 dmi = dmi->next;
1716 }
1717 /* Disable individual receive */
1718 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1719 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1720 }
1721 *R_NETWORK_GA_0 = lo_bits;
1722 *R_NETWORK_GA_1 = hi_bits;
1723 spin_unlock(&lp->lock);
1724}
1725
1726void
1727e100_hardware_send_packet(char *buf, int length)
1728{
1729 D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
1730
1731 if (!led_active && time_after(jiffies, led_next_time)) {
1732 /* light the network leds depending on the current speed. */
1733 e100_set_network_leds(NETWORK_ACTIVITY);
1734
1735 /* Set the earliest time we may clear the LED */
1736 led_next_time = jiffies + NET_FLASH_TIME;
1737 led_active = 1;
1738 mod_timer(&clear_led_timer, jiffies + HZ/10);
1739 }
1740
1741 /* configure the tx dma descriptor */
1742 myNextTxDesc->descr.sw_len = length;
1743 myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
1744 myNextTxDesc->descr.buf = virt_to_phys(buf);
1745
1746 /* Move end of list */
1747 myLastTxDesc->descr.ctrl &= ~d_eol;
1748 myLastTxDesc = myNextTxDesc;
1749
1750 /* Restart DMA channel */
1751 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
1752}
1753
1754static void
1755e100_clear_network_leds(unsigned long dummy)
1756{
1757 if (led_active && time_after(jiffies, led_next_time)) {
1758 e100_set_network_leds(NO_NETWORK_ACTIVITY);
1759
1760 /* Set the earliest time we may set the LED */
1761 led_next_time = jiffies + NET_FLASH_PAUSE;
1762 led_active = 0;
1763 }
1764}
1765
1766static void
1767e100_set_network_leds(int active)
1768{
1769#if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
1770 int light_leds = (active == NO_NETWORK_ACTIVITY);
1771#elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
1772 int light_leds = (active == NETWORK_ACTIVITY);
1773#else
1774#error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
1775#endif
1776
1777 if (!current_speed) {
1778 /* Make LED red, link is down */
1779#if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION)
1780 LED_NETWORK_SET(LED_RED);
1781#else
1782 LED_NETWORK_SET(LED_OFF);
1783#endif
1784 }
1785 else if (light_leds) {
1786 if (current_speed == 10) {
1787 LED_NETWORK_SET(LED_ORANGE);
1788 } else {
1789 LED_NETWORK_SET(LED_GREEN);
1790 }
1791 }
1792 else {
1793 LED_NETWORK_SET(LED_OFF);
1794 }
1795}
1796
1797static int
1798etrax_init_module(void)
1799{
1800 return etrax_ethernet_init();
1801}
1802
1803static int __init
1804e100_boot_setup(char* str)
1805{
1806 struct sockaddr sa = {0};
1807 int i;
1808
1809 /* Parse the colon separated Ethernet station address */
1810 for (i = 0; i < ETH_ALEN; i++) {
1811 unsigned int tmp;
1812 if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
1813 printk(KERN_WARNING "Malformed station address");
1814 return 0;
1815 }
1816 sa.sa_data[i] = (char)tmp;
1817 }
1818
1819 default_mac = sa;
1820 return 1;
1821}
1822
1823__setup("etrax100_eth=", e100_boot_setup);
1824
1825module_init(etrax_init_module);