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a1365275 SH |
1 | /* |
2 | * dm9000.c: Version 1.2 03/18/2003 | |
3 | * | |
4 | * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux. | |
5 | * Copyright (C) 1997 Sten Wang | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version 2 | |
10 | * of the License, or (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved. | |
18 | * | |
19 | * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match | |
20 | * 06/22/2001 Support DM9801 progrmming | |
21 | * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000 | |
22 | * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200 | |
23 | * R17 = (R17 & 0xfff0) | NF + 3 | |
24 | * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200 | |
25 | * R17 = (R17 & 0xfff0) | NF | |
26 | * | |
27 | * v1.00 modify by simon 2001.9.5 | |
28 | * change for kernel 2.4.x | |
29 | * | |
30 | * v1.1 11/09/2001 fix force mode bug | |
31 | * | |
32 | * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>: | |
33 | * Fixed phy reset. | |
34 | * Added tx/rx 32 bit mode. | |
35 | * Cleaned up for kernel merge. | |
36 | * | |
37 | * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de> | |
38 | * Port to 2.6 kernel | |
39 | * | |
40 | * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk> | |
41 | * Cleanup of code to remove ifdefs | |
42 | * Allowed platform device data to influence access width | |
43 | * Reformatting areas of code | |
44 | * | |
45 | * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de> | |
46 | * * removed 2.4 style module parameters | |
47 | * * removed removed unused stat counter and fixed | |
48 | * net_device_stats | |
49 | * * introduced tx_timeout function | |
50 | * * reworked locking | |
9ef9ac51 BD |
51 | * |
52 | * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk> | |
53 | * * fixed spinlock call without pointer | |
54 | * * ensure spinlock is initialised | |
a1365275 SH |
55 | */ |
56 | ||
57 | #include <linux/module.h> | |
58 | #include <linux/ioport.h> | |
59 | #include <linux/netdevice.h> | |
60 | #include <linux/etherdevice.h> | |
61 | #include <linux/init.h> | |
62 | #include <linux/skbuff.h> | |
a1365275 SH |
63 | #include <linux/spinlock.h> |
64 | #include <linux/crc32.h> | |
65 | #include <linux/mii.h> | |
66 | #include <linux/dm9000.h> | |
67 | #include <linux/delay.h> | |
d052d1be | 68 | #include <linux/platform_device.h> |
a1365275 SH |
69 | |
70 | #include <asm/delay.h> | |
71 | #include <asm/irq.h> | |
72 | #include <asm/io.h> | |
73 | ||
74 | #include "dm9000.h" | |
75 | ||
76 | /* Board/System/Debug information/definition ---------------- */ | |
77 | ||
78 | #define DM9000_PHY 0x40 /* PHY address 0x01 */ | |
79 | ||
a1365275 SH |
80 | #define CARDNAME "dm9000" |
81 | #define PFX CARDNAME ": " | |
82 | ||
83 | #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */ | |
84 | ||
85 | #define DM9000_DEBUG 0 | |
86 | ||
87 | #if DM9000_DEBUG > 2 | |
88 | #define PRINTK3(args...) printk(CARDNAME ": " args) | |
89 | #else | |
90 | #define PRINTK3(args...) do { } while(0) | |
91 | #endif | |
92 | ||
93 | #if DM9000_DEBUG > 1 | |
94 | #define PRINTK2(args...) printk(CARDNAME ": " args) | |
95 | #else | |
96 | #define PRINTK2(args...) do { } while(0) | |
97 | #endif | |
98 | ||
99 | #if DM9000_DEBUG > 0 | |
100 | #define PRINTK1(args...) printk(CARDNAME ": " args) | |
101 | #define PRINTK(args...) printk(CARDNAME ": " args) | |
102 | #else | |
103 | #define PRINTK1(args...) do { } while(0) | |
104 | #define PRINTK(args...) printk(KERN_DEBUG args) | |
105 | #endif | |
106 | ||
f40d24d9 AL |
107 | #ifdef CONFIG_BLACKFIN |
108 | #define readsb insb | |
109 | #define readsw insw | |
110 | #define readsl insl | |
111 | #define writesb outsb | |
112 | #define writesw outsw | |
113 | #define writesl outsl | |
114 | #define DM9000_IRQ_FLAGS (IRQF_SHARED | IRQF_TRIGGER_HIGH) | |
115 | #else | |
116 | #define DM9000_IRQ_FLAGS IRQF_SHARED | |
117 | #endif | |
118 | ||
a1365275 SH |
119 | /* |
120 | * Transmit timeout, default 5 seconds. | |
121 | */ | |
122 | static int watchdog = 5000; | |
123 | module_param(watchdog, int, 0400); | |
124 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); | |
125 | ||
126 | /* Structure/enum declaration ------------------------------- */ | |
127 | typedef struct board_info { | |
128 | ||
129 | void __iomem *io_addr; /* Register I/O base address */ | |
130 | void __iomem *io_data; /* Data I/O address */ | |
131 | u16 irq; /* IRQ */ | |
132 | ||
133 | u16 tx_pkt_cnt; | |
134 | u16 queue_pkt_len; | |
135 | u16 queue_start_addr; | |
136 | u16 dbug_cnt; | |
137 | u8 io_mode; /* 0:word, 2:byte */ | |
138 | u8 phy_addr; | |
139 | ||
140 | void (*inblk)(void __iomem *port, void *data, int length); | |
141 | void (*outblk)(void __iomem *port, void *data, int length); | |
142 | void (*dumpblk)(void __iomem *port, int length); | |
143 | ||
144 | struct resource *addr_res; /* resources found */ | |
145 | struct resource *data_res; | |
146 | struct resource *addr_req; /* resources requested */ | |
147 | struct resource *data_req; | |
148 | struct resource *irq_res; | |
149 | ||
150 | struct timer_list timer; | |
151 | struct net_device_stats stats; | |
152 | unsigned char srom[128]; | |
153 | spinlock_t lock; | |
154 | ||
155 | struct mii_if_info mii; | |
156 | u32 msg_enable; | |
157 | } board_info_t; | |
158 | ||
159 | /* function declaration ------------------------------------- */ | |
3ae5eaec | 160 | static int dm9000_probe(struct platform_device *); |
a1365275 SH |
161 | static int dm9000_open(struct net_device *); |
162 | static int dm9000_start_xmit(struct sk_buff *, struct net_device *); | |
163 | static int dm9000_stop(struct net_device *); | |
a1365275 SH |
164 | |
165 | ||
166 | static void dm9000_timer(unsigned long); | |
167 | static void dm9000_init_dm9000(struct net_device *); | |
168 | ||
169 | static struct net_device_stats *dm9000_get_stats(struct net_device *); | |
170 | ||
7d12e780 | 171 | static irqreturn_t dm9000_interrupt(int, void *); |
a1365275 SH |
172 | |
173 | static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg); | |
174 | static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, | |
175 | int value); | |
176 | static u16 read_srom_word(board_info_t *, int); | |
177 | static void dm9000_rx(struct net_device *); | |
178 | static void dm9000_hash_table(struct net_device *); | |
179 | ||
180 | //#define DM9000_PROGRAM_EEPROM | |
181 | #ifdef DM9000_PROGRAM_EEPROM | |
182 | static void program_eeprom(board_info_t * db); | |
183 | #endif | |
184 | /* DM9000 network board routine ---------------------------- */ | |
185 | ||
186 | static void | |
187 | dm9000_reset(board_info_t * db) | |
188 | { | |
189 | PRINTK1("dm9000x: resetting\n"); | |
190 | /* RESET device */ | |
191 | writeb(DM9000_NCR, db->io_addr); | |
192 | udelay(200); | |
193 | writeb(NCR_RST, db->io_data); | |
194 | udelay(200); | |
195 | } | |
196 | ||
197 | /* | |
198 | * Read a byte from I/O port | |
199 | */ | |
200 | static u8 | |
201 | ior(board_info_t * db, int reg) | |
202 | { | |
203 | writeb(reg, db->io_addr); | |
204 | return readb(db->io_data); | |
205 | } | |
206 | ||
207 | /* | |
208 | * Write a byte to I/O port | |
209 | */ | |
210 | ||
211 | static void | |
212 | iow(board_info_t * db, int reg, int value) | |
213 | { | |
214 | writeb(reg, db->io_addr); | |
215 | writeb(value, db->io_data); | |
216 | } | |
217 | ||
218 | /* routines for sending block to chip */ | |
219 | ||
220 | static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count) | |
221 | { | |
222 | writesb(reg, data, count); | |
223 | } | |
224 | ||
225 | static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count) | |
226 | { | |
227 | writesw(reg, data, (count+1) >> 1); | |
228 | } | |
229 | ||
230 | static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count) | |
231 | { | |
232 | writesl(reg, data, (count+3) >> 2); | |
233 | } | |
234 | ||
235 | /* input block from chip to memory */ | |
236 | ||
237 | static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count) | |
238 | { | |
5f6b5517 | 239 | readsb(reg, data, count); |
a1365275 SH |
240 | } |
241 | ||
242 | ||
243 | static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count) | |
244 | { | |
245 | readsw(reg, data, (count+1) >> 1); | |
246 | } | |
247 | ||
248 | static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count) | |
249 | { | |
250 | readsl(reg, data, (count+3) >> 2); | |
251 | } | |
252 | ||
253 | /* dump block from chip to null */ | |
254 | ||
255 | static void dm9000_dumpblk_8bit(void __iomem *reg, int count) | |
256 | { | |
257 | int i; | |
258 | int tmp; | |
259 | ||
260 | for (i = 0; i < count; i++) | |
261 | tmp = readb(reg); | |
262 | } | |
263 | ||
264 | static void dm9000_dumpblk_16bit(void __iomem *reg, int count) | |
265 | { | |
266 | int i; | |
267 | int tmp; | |
268 | ||
269 | count = (count + 1) >> 1; | |
270 | ||
271 | for (i = 0; i < count; i++) | |
272 | tmp = readw(reg); | |
273 | } | |
274 | ||
275 | static void dm9000_dumpblk_32bit(void __iomem *reg, int count) | |
276 | { | |
277 | int i; | |
278 | int tmp; | |
279 | ||
280 | count = (count + 3) >> 2; | |
281 | ||
282 | for (i = 0; i < count; i++) | |
283 | tmp = readl(reg); | |
284 | } | |
285 | ||
286 | /* dm9000_set_io | |
287 | * | |
288 | * select the specified set of io routines to use with the | |
289 | * device | |
290 | */ | |
291 | ||
292 | static void dm9000_set_io(struct board_info *db, int byte_width) | |
293 | { | |
294 | /* use the size of the data resource to work out what IO | |
295 | * routines we want to use | |
296 | */ | |
297 | ||
298 | switch (byte_width) { | |
299 | case 1: | |
300 | db->dumpblk = dm9000_dumpblk_8bit; | |
301 | db->outblk = dm9000_outblk_8bit; | |
302 | db->inblk = dm9000_inblk_8bit; | |
303 | break; | |
304 | ||
305 | case 2: | |
306 | db->dumpblk = dm9000_dumpblk_16bit; | |
307 | db->outblk = dm9000_outblk_16bit; | |
308 | db->inblk = dm9000_inblk_16bit; | |
309 | break; | |
310 | ||
311 | case 3: | |
312 | printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n"); | |
313 | db->dumpblk = dm9000_dumpblk_16bit; | |
314 | db->outblk = dm9000_outblk_16bit; | |
315 | db->inblk = dm9000_inblk_16bit; | |
316 | break; | |
317 | ||
318 | case 4: | |
319 | default: | |
320 | db->dumpblk = dm9000_dumpblk_32bit; | |
321 | db->outblk = dm9000_outblk_32bit; | |
322 | db->inblk = dm9000_inblk_32bit; | |
323 | break; | |
324 | } | |
325 | } | |
326 | ||
327 | ||
328 | /* Our watchdog timed out. Called by the networking layer */ | |
329 | static void dm9000_timeout(struct net_device *dev) | |
330 | { | |
331 | board_info_t *db = (board_info_t *) dev->priv; | |
332 | u8 reg_save; | |
333 | unsigned long flags; | |
334 | ||
335 | /* Save previous register address */ | |
336 | reg_save = readb(db->io_addr); | |
9ef9ac51 | 337 | spin_lock_irqsave(&db->lock,flags); |
a1365275 SH |
338 | |
339 | netif_stop_queue(dev); | |
340 | dm9000_reset(db); | |
341 | dm9000_init_dm9000(dev); | |
342 | /* We can accept TX packets again */ | |
343 | dev->trans_start = jiffies; | |
344 | netif_wake_queue(dev); | |
345 | ||
346 | /* Restore previous register address */ | |
347 | writeb(reg_save, db->io_addr); | |
9ef9ac51 | 348 | spin_unlock_irqrestore(&db->lock,flags); |
a1365275 SH |
349 | } |
350 | ||
2fd0e33f KH |
351 | #ifdef CONFIG_NET_POLL_CONTROLLER |
352 | /* | |
353 | *Used by netconsole | |
354 | */ | |
355 | static void dm9000_poll_controller(struct net_device *dev) | |
356 | { | |
357 | disable_irq(dev->irq); | |
28431146 | 358 | dm9000_interrupt(dev->irq,dev); |
2fd0e33f KH |
359 | enable_irq(dev->irq); |
360 | } | |
361 | #endif | |
a1365275 SH |
362 | |
363 | /* dm9000_release_board | |
364 | * | |
365 | * release a board, and any mapped resources | |
366 | */ | |
367 | ||
368 | static void | |
369 | dm9000_release_board(struct platform_device *pdev, struct board_info *db) | |
370 | { | |
371 | if (db->data_res == NULL) { | |
372 | if (db->addr_res != NULL) | |
373 | release_mem_region((unsigned long)db->io_addr, 4); | |
374 | return; | |
375 | } | |
376 | ||
377 | /* unmap our resources */ | |
378 | ||
379 | iounmap(db->io_addr); | |
380 | iounmap(db->io_data); | |
381 | ||
382 | /* release the resources */ | |
383 | ||
384 | if (db->data_req != NULL) { | |
385 | release_resource(db->data_req); | |
386 | kfree(db->data_req); | |
387 | } | |
388 | ||
51985487 DO |
389 | if (db->addr_req != NULL) { |
390 | release_resource(db->addr_req); | |
a1365275 SH |
391 | kfree(db->addr_req); |
392 | } | |
393 | } | |
394 | ||
395 | #define res_size(_r) (((_r)->end - (_r)->start) + 1) | |
396 | ||
397 | /* | |
398 | * Search DM9000 board, allocate space and register it | |
399 | */ | |
400 | static int | |
3ae5eaec | 401 | dm9000_probe(struct platform_device *pdev) |
a1365275 | 402 | { |
a1365275 SH |
403 | struct dm9000_plat_data *pdata = pdev->dev.platform_data; |
404 | struct board_info *db; /* Point a board information structure */ | |
405 | struct net_device *ndev; | |
406 | unsigned long base; | |
407 | int ret = 0; | |
408 | int iosize; | |
409 | int i; | |
410 | u32 id_val; | |
411 | ||
a1365275 SH |
412 | /* Init network device */ |
413 | ndev = alloc_etherdev(sizeof (struct board_info)); | |
414 | if (!ndev) { | |
415 | printk("%s: could not allocate device.\n", CARDNAME); | |
416 | return -ENOMEM; | |
417 | } | |
418 | ||
419 | SET_MODULE_OWNER(ndev); | |
3ae5eaec | 420 | SET_NETDEV_DEV(ndev, &pdev->dev); |
a1365275 SH |
421 | |
422 | PRINTK2("dm9000_probe()"); | |
423 | ||
424 | /* setup board info structure */ | |
425 | db = (struct board_info *) ndev->priv; | |
426 | memset(db, 0, sizeof (*db)); | |
427 | ||
9ef9ac51 BD |
428 | spin_lock_init(&db->lock); |
429 | ||
a1365275 SH |
430 | if (pdev->num_resources < 2) { |
431 | ret = -ENODEV; | |
432 | goto out; | |
b4ed03ff | 433 | } else if (pdev->num_resources == 2) { |
a1365275 SH |
434 | base = pdev->resource[0].start; |
435 | ||
436 | if (!request_mem_region(base, 4, ndev->name)) { | |
437 | ret = -EBUSY; | |
438 | goto out; | |
439 | } | |
440 | ||
441 | ndev->base_addr = base; | |
442 | ndev->irq = pdev->resource[1].start; | |
b4ed03ff BD |
443 | db->io_addr = (void __iomem *)base; |
444 | db->io_data = (void __iomem *)(base + 4); | |
a1365275 | 445 | |
f40d24d9 AL |
446 | /* ensure at least we have a default set of IO routines */ |
447 | dm9000_set_io(db, 2); | |
448 | ||
b4ed03ff | 449 | } else { |
a1365275 SH |
450 | db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
451 | db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
452 | db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
453 | ||
b4ed03ff BD |
454 | if (db->addr_res == NULL || db->data_res == NULL || |
455 | db->irq_res == NULL) { | |
a1365275 SH |
456 | printk(KERN_ERR PFX "insufficient resources\n"); |
457 | ret = -ENOENT; | |
458 | goto out; | |
459 | } | |
460 | ||
461 | i = res_size(db->addr_res); | |
462 | db->addr_req = request_mem_region(db->addr_res->start, i, | |
463 | pdev->name); | |
464 | ||
465 | if (db->addr_req == NULL) { | |
466 | printk(KERN_ERR PFX "cannot claim address reg area\n"); | |
467 | ret = -EIO; | |
468 | goto out; | |
469 | } | |
470 | ||
471 | db->io_addr = ioremap(db->addr_res->start, i); | |
472 | ||
473 | if (db->io_addr == NULL) { | |
474 | printk(KERN_ERR "failed to ioremap address reg\n"); | |
475 | ret = -EINVAL; | |
476 | goto out; | |
477 | } | |
478 | ||
479 | iosize = res_size(db->data_res); | |
480 | db->data_req = request_mem_region(db->data_res->start, iosize, | |
481 | pdev->name); | |
482 | ||
483 | if (db->data_req == NULL) { | |
484 | printk(KERN_ERR PFX "cannot claim data reg area\n"); | |
485 | ret = -EIO; | |
486 | goto out; | |
487 | } | |
488 | ||
489 | db->io_data = ioremap(db->data_res->start, iosize); | |
490 | ||
491 | if (db->io_data == NULL) { | |
492 | printk(KERN_ERR "failed to ioremap data reg\n"); | |
493 | ret = -EINVAL; | |
494 | goto out; | |
495 | } | |
496 | ||
497 | /* fill in parameters for net-dev structure */ | |
498 | ||
499 | ndev->base_addr = (unsigned long)db->io_addr; | |
500 | ndev->irq = db->irq_res->start; | |
501 | ||
502 | /* ensure at least we have a default set of IO routines */ | |
503 | dm9000_set_io(db, iosize); | |
a1365275 SH |
504 | } |
505 | ||
506 | /* check to see if anything is being over-ridden */ | |
507 | if (pdata != NULL) { | |
508 | /* check to see if the driver wants to over-ride the | |
509 | * default IO width */ | |
510 | ||
511 | if (pdata->flags & DM9000_PLATF_8BITONLY) | |
512 | dm9000_set_io(db, 1); | |
513 | ||
514 | if (pdata->flags & DM9000_PLATF_16BITONLY) | |
515 | dm9000_set_io(db, 2); | |
516 | ||
517 | if (pdata->flags & DM9000_PLATF_32BITONLY) | |
518 | dm9000_set_io(db, 4); | |
519 | ||
520 | /* check to see if there are any IO routine | |
521 | * over-rides */ | |
522 | ||
523 | if (pdata->inblk != NULL) | |
524 | db->inblk = pdata->inblk; | |
525 | ||
526 | if (pdata->outblk != NULL) | |
527 | db->outblk = pdata->outblk; | |
528 | ||
529 | if (pdata->dumpblk != NULL) | |
530 | db->dumpblk = pdata->dumpblk; | |
531 | } | |
532 | ||
533 | dm9000_reset(db); | |
534 | ||
535 | /* try two times, DM9000 sometimes gets the first read wrong */ | |
536 | for (i = 0; i < 2; i++) { | |
537 | id_val = ior(db, DM9000_VIDL); | |
538 | id_val |= (u32)ior(db, DM9000_VIDH) << 8; | |
539 | id_val |= (u32)ior(db, DM9000_PIDL) << 16; | |
540 | id_val |= (u32)ior(db, DM9000_PIDH) << 24; | |
541 | ||
542 | if (id_val == DM9000_ID) | |
543 | break; | |
544 | printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val); | |
545 | } | |
546 | ||
547 | if (id_val != DM9000_ID) { | |
548 | printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val); | |
549 | goto release; | |
550 | } | |
551 | ||
552 | /* from this point we assume that we have found a DM9000 */ | |
553 | ||
554 | /* driver system function */ | |
555 | ether_setup(ndev); | |
556 | ||
557 | ndev->open = &dm9000_open; | |
558 | ndev->hard_start_xmit = &dm9000_start_xmit; | |
559 | ndev->tx_timeout = &dm9000_timeout; | |
560 | ndev->watchdog_timeo = msecs_to_jiffies(watchdog); | |
561 | ndev->stop = &dm9000_stop; | |
562 | ndev->get_stats = &dm9000_get_stats; | |
563 | ndev->set_multicast_list = &dm9000_hash_table; | |
2fd0e33f KH |
564 | #ifdef CONFIG_NET_POLL_CONTROLLER |
565 | ndev->poll_controller = &dm9000_poll_controller; | |
566 | #endif | |
a1365275 SH |
567 | |
568 | #ifdef DM9000_PROGRAM_EEPROM | |
569 | program_eeprom(db); | |
570 | #endif | |
571 | db->msg_enable = NETIF_MSG_LINK; | |
572 | db->mii.phy_id_mask = 0x1f; | |
573 | db->mii.reg_num_mask = 0x1f; | |
574 | db->mii.force_media = 0; | |
575 | db->mii.full_duplex = 0; | |
576 | db->mii.dev = ndev; | |
577 | db->mii.mdio_read = dm9000_phy_read; | |
578 | db->mii.mdio_write = dm9000_phy_write; | |
579 | ||
580 | /* Read SROM content */ | |
581 | for (i = 0; i < 64; i++) | |
582 | ((u16 *) db->srom)[i] = read_srom_word(db, i); | |
583 | ||
584 | /* Set Node Address */ | |
585 | for (i = 0; i < 6; i++) | |
586 | ndev->dev_addr[i] = db->srom[i]; | |
587 | ||
5b55dda6 BD |
588 | if (!is_valid_ether_addr(ndev->dev_addr)) { |
589 | /* try reading from mac */ | |
590 | ||
591 | for (i = 0; i < 6; i++) | |
592 | ndev->dev_addr[i] = ior(db, i+DM9000_PAR); | |
593 | } | |
594 | ||
a1365275 SH |
595 | if (!is_valid_ether_addr(ndev->dev_addr)) |
596 | printk("%s: Invalid ethernet MAC address. Please " | |
597 | "set using ifconfig\n", ndev->name); | |
598 | ||
3ae5eaec | 599 | platform_set_drvdata(pdev, ndev); |
a1365275 SH |
600 | ret = register_netdev(ndev); |
601 | ||
602 | if (ret == 0) { | |
603 | printk("%s: dm9000 at %p,%p IRQ %d MAC: ", | |
604 | ndev->name, db->io_addr, db->io_data, ndev->irq); | |
605 | for (i = 0; i < 5; i++) | |
606 | printk("%02x:", ndev->dev_addr[i]); | |
607 | printk("%02x\n", ndev->dev_addr[5]); | |
608 | } | |
609 | return 0; | |
610 | ||
611 | release: | |
612 | out: | |
613 | printk("%s: not found (%d).\n", CARDNAME, ret); | |
614 | ||
615 | dm9000_release_board(pdev, db); | |
9fd9f9b6 | 616 | free_netdev(ndev); |
a1365275 SH |
617 | |
618 | return ret; | |
619 | } | |
620 | ||
621 | /* | |
622 | * Open the interface. | |
623 | * The interface is opened whenever "ifconfig" actives it. | |
624 | */ | |
625 | static int | |
626 | dm9000_open(struct net_device *dev) | |
627 | { | |
628 | board_info_t *db = (board_info_t *) dev->priv; | |
629 | ||
630 | PRINTK2("entering dm9000_open\n"); | |
631 | ||
f40d24d9 | 632 | if (request_irq(dev->irq, &dm9000_interrupt, DM9000_IRQ_FLAGS, dev->name, dev)) |
a1365275 SH |
633 | return -EAGAIN; |
634 | ||
635 | /* Initialize DM9000 board */ | |
636 | dm9000_reset(db); | |
637 | dm9000_init_dm9000(dev); | |
638 | ||
639 | /* Init driver variable */ | |
640 | db->dbug_cnt = 0; | |
641 | ||
642 | /* set and active a timer process */ | |
643 | init_timer(&db->timer); | |
9ef9ac51 | 644 | db->timer.expires = DM9000_TIMER_WUT; |
a1365275 SH |
645 | db->timer.data = (unsigned long) dev; |
646 | db->timer.function = &dm9000_timer; | |
647 | add_timer(&db->timer); | |
648 | ||
649 | mii_check_media(&db->mii, netif_msg_link(db), 1); | |
650 | netif_start_queue(dev); | |
651 | ||
652 | return 0; | |
653 | } | |
654 | ||
655 | /* | |
656 | * Initilize dm9000 board | |
657 | */ | |
658 | static void | |
659 | dm9000_init_dm9000(struct net_device *dev) | |
660 | { | |
661 | board_info_t *db = (board_info_t *) dev->priv; | |
662 | ||
663 | PRINTK1("entering %s\n",__FUNCTION__); | |
664 | ||
665 | /* I/O mode */ | |
666 | db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */ | |
667 | ||
668 | /* GPIO0 on pre-activate PHY */ | |
669 | iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */ | |
670 | iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ | |
671 | iow(db, DM9000_GPR, 0); /* Enable PHY */ | |
672 | ||
673 | /* Program operating register */ | |
674 | iow(db, DM9000_TCR, 0); /* TX Polling clear */ | |
675 | iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */ | |
676 | iow(db, DM9000_FCR, 0xff); /* Flow Control */ | |
677 | iow(db, DM9000_SMCR, 0); /* Special Mode */ | |
678 | /* clear TX status */ | |
679 | iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END); | |
680 | iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */ | |
681 | ||
682 | /* Set address filter table */ | |
683 | dm9000_hash_table(dev); | |
684 | ||
685 | /* Activate DM9000 */ | |
686 | iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN); | |
687 | /* Enable TX/RX interrupt mask */ | |
688 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | |
689 | ||
690 | /* Init Driver variable */ | |
691 | db->tx_pkt_cnt = 0; | |
692 | db->queue_pkt_len = 0; | |
693 | dev->trans_start = 0; | |
a1365275 SH |
694 | } |
695 | ||
696 | /* | |
697 | * Hardware start transmission. | |
698 | * Send a packet to media from the upper layer. | |
699 | */ | |
700 | static int | |
701 | dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
702 | { | |
703 | board_info_t *db = (board_info_t *) dev->priv; | |
704 | ||
705 | PRINTK3("dm9000_start_xmit\n"); | |
706 | ||
707 | if (db->tx_pkt_cnt > 1) | |
708 | return 1; | |
709 | ||
710 | netif_stop_queue(dev); | |
711 | ||
712 | /* Disable all interrupts */ | |
713 | iow(db, DM9000_IMR, IMR_PAR); | |
714 | ||
715 | /* Move data to DM9000 TX RAM */ | |
716 | writeb(DM9000_MWCMD, db->io_addr); | |
717 | ||
718 | (db->outblk)(db->io_data, skb->data, skb->len); | |
719 | db->stats.tx_bytes += skb->len; | |
720 | ||
721 | /* TX control: First packet immediately send, second packet queue */ | |
722 | if (db->tx_pkt_cnt == 0) { | |
723 | ||
724 | /* First Packet */ | |
725 | db->tx_pkt_cnt++; | |
726 | ||
727 | /* Set TX length to DM9000 */ | |
728 | iow(db, DM9000_TXPLL, skb->len & 0xff); | |
729 | iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff); | |
730 | ||
731 | /* Issue TX polling command */ | |
732 | iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */ | |
733 | ||
734 | dev->trans_start = jiffies; /* save the time stamp */ | |
735 | ||
736 | } else { | |
737 | /* Second packet */ | |
738 | db->tx_pkt_cnt++; | |
739 | db->queue_pkt_len = skb->len; | |
740 | } | |
741 | ||
742 | /* free this SKB */ | |
743 | dev_kfree_skb(skb); | |
744 | ||
745 | /* Re-enable resource check */ | |
746 | if (db->tx_pkt_cnt == 1) | |
747 | netif_wake_queue(dev); | |
748 | ||
749 | /* Re-enable interrupt */ | |
750 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | |
751 | ||
752 | return 0; | |
753 | } | |
754 | ||
755 | static void | |
756 | dm9000_shutdown(struct net_device *dev) | |
757 | { | |
758 | board_info_t *db = (board_info_t *) dev->priv; | |
759 | ||
760 | /* RESET device */ | |
761 | dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */ | |
762 | iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */ | |
763 | iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */ | |
764 | iow(db, DM9000_RCR, 0x00); /* Disable RX */ | |
765 | } | |
766 | ||
767 | /* | |
768 | * Stop the interface. | |
769 | * The interface is stopped when it is brought. | |
770 | */ | |
771 | static int | |
772 | dm9000_stop(struct net_device *ndev) | |
773 | { | |
774 | board_info_t *db = (board_info_t *) ndev->priv; | |
775 | ||
776 | PRINTK1("entering %s\n",__FUNCTION__); | |
777 | ||
778 | /* deleted timer */ | |
779 | del_timer(&db->timer); | |
780 | ||
781 | netif_stop_queue(ndev); | |
782 | netif_carrier_off(ndev); | |
783 | ||
784 | /* free interrupt */ | |
785 | free_irq(ndev->irq, ndev); | |
786 | ||
787 | dm9000_shutdown(ndev); | |
788 | ||
789 | return 0; | |
790 | } | |
791 | ||
792 | /* | |
793 | * DM9000 interrupt handler | |
794 | * receive the packet to upper layer, free the transmitted packet | |
795 | */ | |
796 | ||
5d22a312 | 797 | static void |
a1365275 SH |
798 | dm9000_tx_done(struct net_device *dev, board_info_t * db) |
799 | { | |
800 | int tx_status = ior(db, DM9000_NSR); /* Got TX status */ | |
801 | ||
802 | if (tx_status & (NSR_TX2END | NSR_TX1END)) { | |
803 | /* One packet sent complete */ | |
804 | db->tx_pkt_cnt--; | |
805 | db->stats.tx_packets++; | |
806 | ||
807 | /* Queue packet check & send */ | |
808 | if (db->tx_pkt_cnt > 0) { | |
809 | iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff); | |
810 | iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff); | |
811 | iow(db, DM9000_TCR, TCR_TXREQ); | |
812 | dev->trans_start = jiffies; | |
813 | } | |
814 | netif_wake_queue(dev); | |
815 | } | |
816 | } | |
817 | ||
818 | static irqreturn_t | |
7d12e780 | 819 | dm9000_interrupt(int irq, void *dev_id) |
a1365275 SH |
820 | { |
821 | struct net_device *dev = dev_id; | |
822 | board_info_t *db; | |
823 | int int_status; | |
824 | u8 reg_save; | |
825 | ||
826 | PRINTK3("entering %s\n",__FUNCTION__); | |
827 | ||
828 | if (!dev) { | |
829 | PRINTK1("dm9000_interrupt() without DEVICE arg\n"); | |
830 | return IRQ_HANDLED; | |
831 | } | |
832 | ||
833 | /* A real interrupt coming */ | |
834 | db = (board_info_t *) dev->priv; | |
835 | spin_lock(&db->lock); | |
836 | ||
837 | /* Save previous register address */ | |
838 | reg_save = readb(db->io_addr); | |
839 | ||
840 | /* Disable all interrupts */ | |
841 | iow(db, DM9000_IMR, IMR_PAR); | |
842 | ||
843 | /* Got DM9000 interrupt status */ | |
844 | int_status = ior(db, DM9000_ISR); /* Got ISR */ | |
845 | iow(db, DM9000_ISR, int_status); /* Clear ISR status */ | |
846 | ||
847 | /* Received the coming packet */ | |
848 | if (int_status & ISR_PRS) | |
849 | dm9000_rx(dev); | |
850 | ||
851 | /* Trnasmit Interrupt check */ | |
852 | if (int_status & ISR_PTS) | |
853 | dm9000_tx_done(dev, db); | |
854 | ||
855 | /* Re-enable interrupt mask */ | |
856 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | |
857 | ||
858 | /* Restore previous register address */ | |
859 | writeb(reg_save, db->io_addr); | |
860 | ||
861 | spin_unlock(&db->lock); | |
862 | ||
863 | return IRQ_HANDLED; | |
864 | } | |
865 | ||
866 | /* | |
867 | * Get statistics from driver. | |
868 | */ | |
869 | static struct net_device_stats * | |
870 | dm9000_get_stats(struct net_device *dev) | |
871 | { | |
872 | board_info_t *db = (board_info_t *) dev->priv; | |
873 | return &db->stats; | |
874 | } | |
875 | ||
a1365275 SH |
876 | |
877 | /* | |
878 | * A periodic timer routine | |
879 | * Dynamic media sense, allocated Rx buffer... | |
880 | */ | |
881 | static void | |
882 | dm9000_timer(unsigned long data) | |
883 | { | |
884 | struct net_device *dev = (struct net_device *) data; | |
885 | board_info_t *db = (board_info_t *) dev->priv; | |
a1365275 SH |
886 | |
887 | PRINTK3("dm9000_timer()\n"); | |
888 | ||
a1365275 SH |
889 | mii_check_media(&db->mii, netif_msg_link(db), 0); |
890 | ||
a1365275 SH |
891 | /* Set timer again */ |
892 | db->timer.expires = DM9000_TIMER_WUT; | |
893 | add_timer(&db->timer); | |
894 | } | |
895 | ||
896 | struct dm9000_rxhdr { | |
897 | u16 RxStatus; | |
898 | u16 RxLen; | |
899 | } __attribute__((__packed__)); | |
900 | ||
901 | /* | |
902 | * Received a packet and pass to upper layer | |
903 | */ | |
904 | static void | |
905 | dm9000_rx(struct net_device *dev) | |
906 | { | |
907 | board_info_t *db = (board_info_t *) dev->priv; | |
908 | struct dm9000_rxhdr rxhdr; | |
909 | struct sk_buff *skb; | |
910 | u8 rxbyte, *rdptr; | |
6478fac6 | 911 | bool GoodPacket; |
a1365275 SH |
912 | int RxLen; |
913 | ||
914 | /* Check packet ready or not */ | |
915 | do { | |
916 | ior(db, DM9000_MRCMDX); /* Dummy read */ | |
917 | ||
918 | /* Get most updated data */ | |
919 | rxbyte = readb(db->io_data); | |
920 | ||
921 | /* Status check: this byte must be 0 or 1 */ | |
922 | if (rxbyte > DM9000_PKT_RDY) { | |
923 | printk("status check failed: %d\n", rxbyte); | |
924 | iow(db, DM9000_RCR, 0x00); /* Stop Device */ | |
925 | iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */ | |
926 | return; | |
927 | } | |
928 | ||
929 | if (rxbyte != DM9000_PKT_RDY) | |
930 | return; | |
931 | ||
932 | /* A packet ready now & Get status/length */ | |
6478fac6 | 933 | GoodPacket = true; |
a1365275 SH |
934 | writeb(DM9000_MRCMD, db->io_addr); |
935 | ||
936 | (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr)); | |
937 | ||
938 | RxLen = rxhdr.RxLen; | |
939 | ||
940 | /* Packet Status check */ | |
941 | if (RxLen < 0x40) { | |
6478fac6 | 942 | GoodPacket = false; |
a1365275 SH |
943 | PRINTK1("Bad Packet received (runt)\n"); |
944 | } | |
945 | ||
946 | if (RxLen > DM9000_PKT_MAX) { | |
947 | PRINTK1("RST: RX Len:%x\n", RxLen); | |
948 | } | |
949 | ||
950 | if (rxhdr.RxStatus & 0xbf00) { | |
6478fac6 | 951 | GoodPacket = false; |
a1365275 SH |
952 | if (rxhdr.RxStatus & 0x100) { |
953 | PRINTK1("fifo error\n"); | |
954 | db->stats.rx_fifo_errors++; | |
955 | } | |
956 | if (rxhdr.RxStatus & 0x200) { | |
957 | PRINTK1("crc error\n"); | |
958 | db->stats.rx_crc_errors++; | |
959 | } | |
960 | if (rxhdr.RxStatus & 0x8000) { | |
961 | PRINTK1("length error\n"); | |
962 | db->stats.rx_length_errors++; | |
963 | } | |
964 | } | |
965 | ||
966 | /* Move data from DM9000 */ | |
967 | if (GoodPacket | |
968 | && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) { | |
a1365275 SH |
969 | skb_reserve(skb, 2); |
970 | rdptr = (u8 *) skb_put(skb, RxLen - 4); | |
971 | ||
972 | /* Read received packet from RX SRAM */ | |
973 | ||
974 | (db->inblk)(db->io_data, rdptr, RxLen); | |
975 | db->stats.rx_bytes += RxLen; | |
976 | ||
977 | /* Pass to upper layer */ | |
978 | skb->protocol = eth_type_trans(skb, dev); | |
979 | netif_rx(skb); | |
980 | db->stats.rx_packets++; | |
981 | ||
982 | } else { | |
983 | /* need to dump the packet's data */ | |
984 | ||
985 | (db->dumpblk)(db->io_data, RxLen); | |
986 | } | |
987 | } while (rxbyte == DM9000_PKT_RDY); | |
988 | } | |
989 | ||
990 | /* | |
991 | * Read a word data from SROM | |
992 | */ | |
993 | static u16 | |
994 | read_srom_word(board_info_t * db, int offset) | |
995 | { | |
996 | iow(db, DM9000_EPAR, offset); | |
997 | iow(db, DM9000_EPCR, EPCR_ERPRR); | |
998 | mdelay(8); /* according to the datasheet 200us should be enough, | |
999 | but it doesn't work */ | |
1000 | iow(db, DM9000_EPCR, 0x0); | |
1001 | return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8)); | |
1002 | } | |
1003 | ||
1004 | #ifdef DM9000_PROGRAM_EEPROM | |
1005 | /* | |
1006 | * Write a word data to SROM | |
1007 | */ | |
1008 | static void | |
1009 | write_srom_word(board_info_t * db, int offset, u16 val) | |
1010 | { | |
1011 | iow(db, DM9000_EPAR, offset); | |
1012 | iow(db, DM9000_EPDRH, ((val >> 8) & 0xff)); | |
1013 | iow(db, DM9000_EPDRL, (val & 0xff)); | |
1014 | iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW); | |
1015 | mdelay(8); /* same shit */ | |
1016 | iow(db, DM9000_EPCR, 0); | |
1017 | } | |
1018 | ||
1019 | /* | |
1020 | * Only for development: | |
1021 | * Here we write static data to the eeprom in case | |
1022 | * we don't have valid content on a new board | |
1023 | */ | |
1024 | static void | |
1025 | program_eeprom(board_info_t * db) | |
1026 | { | |
1027 | u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */ | |
1028 | 0x0000, /* Autoload: accept nothing */ | |
1029 | 0x0a46, 0x9000, /* Vendor / Product ID */ | |
1030 | 0x0000, /* pin control */ | |
1031 | 0x0000, | |
1032 | }; /* Wake-up mode control */ | |
1033 | int i; | |
1034 | for (i = 0; i < 8; i++) | |
1035 | write_srom_word(db, i, eeprom[i]); | |
1036 | } | |
1037 | #endif | |
1038 | ||
1039 | ||
1040 | /* | |
1041 | * Calculate the CRC valude of the Rx packet | |
1042 | * flag = 1 : return the reverse CRC (for the received packet CRC) | |
1043 | * 0 : return the normal CRC (for Hash Table index) | |
1044 | */ | |
1045 | ||
1046 | static unsigned long | |
1047 | cal_CRC(unsigned char *Data, unsigned int Len, u8 flag) | |
1048 | { | |
1049 | ||
1050 | u32 crc = ether_crc_le(Len, Data); | |
1051 | ||
1052 | if (flag) | |
1053 | return ~crc; | |
1054 | ||
1055 | return crc; | |
1056 | } | |
1057 | ||
1058 | /* | |
1059 | * Set DM9000 multicast address | |
1060 | */ | |
1061 | static void | |
1062 | dm9000_hash_table(struct net_device *dev) | |
1063 | { | |
1064 | board_info_t *db = (board_info_t *) dev->priv; | |
1065 | struct dev_mc_list *mcptr = dev->mc_list; | |
1066 | int mc_cnt = dev->mc_count; | |
1067 | u32 hash_val; | |
1068 | u16 i, oft, hash_table[4]; | |
1069 | unsigned long flags; | |
1070 | ||
1071 | PRINTK2("dm9000_hash_table()\n"); | |
1072 | ||
1073 | spin_lock_irqsave(&db->lock,flags); | |
1074 | ||
1075 | for (i = 0, oft = 0x10; i < 6; i++, oft++) | |
1076 | iow(db, oft, dev->dev_addr[i]); | |
1077 | ||
1078 | /* Clear Hash Table */ | |
1079 | for (i = 0; i < 4; i++) | |
1080 | hash_table[i] = 0x0; | |
1081 | ||
1082 | /* broadcast address */ | |
1083 | hash_table[3] = 0x8000; | |
1084 | ||
1085 | /* the multicast address in Hash Table : 64 bits */ | |
1086 | for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) { | |
1087 | hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f; | |
1088 | hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16); | |
1089 | } | |
1090 | ||
1091 | /* Write the hash table to MAC MD table */ | |
1092 | for (i = 0, oft = 0x16; i < 4; i++) { | |
1093 | iow(db, oft++, hash_table[i] & 0xff); | |
1094 | iow(db, oft++, (hash_table[i] >> 8) & 0xff); | |
1095 | } | |
1096 | ||
1097 | spin_unlock_irqrestore(&db->lock,flags); | |
1098 | } | |
1099 | ||
1100 | ||
1101 | /* | |
1102 | * Read a word from phyxcer | |
1103 | */ | |
1104 | static int | |
1105 | dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg) | |
1106 | { | |
1107 | board_info_t *db = (board_info_t *) dev->priv; | |
1108 | unsigned long flags; | |
9ef9ac51 | 1109 | unsigned int reg_save; |
a1365275 SH |
1110 | int ret; |
1111 | ||
1112 | spin_lock_irqsave(&db->lock,flags); | |
9ef9ac51 BD |
1113 | |
1114 | /* Save previous register address */ | |
1115 | reg_save = readb(db->io_addr); | |
1116 | ||
a1365275 SH |
1117 | /* Fill the phyxcer register into REG_0C */ |
1118 | iow(db, DM9000_EPAR, DM9000_PHY | reg); | |
1119 | ||
1120 | iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */ | |
1121 | udelay(100); /* Wait read complete */ | |
1122 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */ | |
1123 | ||
1124 | /* The read data keeps on REG_0D & REG_0E */ | |
1125 | ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL); | |
1126 | ||
9ef9ac51 BD |
1127 | /* restore the previous address */ |
1128 | writeb(reg_save, db->io_addr); | |
1129 | ||
a1365275 SH |
1130 | spin_unlock_irqrestore(&db->lock,flags); |
1131 | ||
1132 | return ret; | |
1133 | } | |
1134 | ||
1135 | /* | |
1136 | * Write a word to phyxcer | |
1137 | */ | |
1138 | static void | |
1139 | dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value) | |
1140 | { | |
1141 | board_info_t *db = (board_info_t *) dev->priv; | |
1142 | unsigned long flags; | |
9ef9ac51 | 1143 | unsigned long reg_save; |
a1365275 SH |
1144 | |
1145 | spin_lock_irqsave(&db->lock,flags); | |
1146 | ||
9ef9ac51 BD |
1147 | /* Save previous register address */ |
1148 | reg_save = readb(db->io_addr); | |
1149 | ||
a1365275 SH |
1150 | /* Fill the phyxcer register into REG_0C */ |
1151 | iow(db, DM9000_EPAR, DM9000_PHY | reg); | |
1152 | ||
1153 | /* Fill the written data into REG_0D & REG_0E */ | |
1154 | iow(db, DM9000_EPDRL, (value & 0xff)); | |
1155 | iow(db, DM9000_EPDRH, ((value >> 8) & 0xff)); | |
1156 | ||
1157 | iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */ | |
1158 | udelay(500); /* Wait write complete */ | |
1159 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */ | |
1160 | ||
9ef9ac51 BD |
1161 | /* restore the previous address */ |
1162 | writeb(reg_save, db->io_addr); | |
1163 | ||
a1365275 SH |
1164 | spin_unlock_irqrestore(&db->lock,flags); |
1165 | } | |
1166 | ||
1167 | static int | |
3ae5eaec | 1168 | dm9000_drv_suspend(struct platform_device *dev, pm_message_t state) |
a1365275 | 1169 | { |
3ae5eaec | 1170 | struct net_device *ndev = platform_get_drvdata(dev); |
a1365275 | 1171 | |
9480e307 | 1172 | if (ndev) { |
a1365275 SH |
1173 | if (netif_running(ndev)) { |
1174 | netif_device_detach(ndev); | |
1175 | dm9000_shutdown(ndev); | |
1176 | } | |
1177 | } | |
1178 | return 0; | |
1179 | } | |
1180 | ||
1181 | static int | |
3ae5eaec | 1182 | dm9000_drv_resume(struct platform_device *dev) |
a1365275 | 1183 | { |
3ae5eaec | 1184 | struct net_device *ndev = platform_get_drvdata(dev); |
a1365275 SH |
1185 | board_info_t *db = (board_info_t *) ndev->priv; |
1186 | ||
9480e307 | 1187 | if (ndev) { |
a1365275 SH |
1188 | |
1189 | if (netif_running(ndev)) { | |
1190 | dm9000_reset(db); | |
1191 | dm9000_init_dm9000(ndev); | |
1192 | ||
1193 | netif_device_attach(ndev); | |
1194 | } | |
1195 | } | |
1196 | return 0; | |
1197 | } | |
1198 | ||
1199 | static int | |
3ae5eaec | 1200 | dm9000_drv_remove(struct platform_device *pdev) |
a1365275 | 1201 | { |
3ae5eaec | 1202 | struct net_device *ndev = platform_get_drvdata(pdev); |
a1365275 | 1203 | |
3ae5eaec | 1204 | platform_set_drvdata(pdev, NULL); |
a1365275 SH |
1205 | |
1206 | unregister_netdev(ndev); | |
1207 | dm9000_release_board(pdev, (board_info_t *) ndev->priv); | |
9fd9f9b6 | 1208 | free_netdev(ndev); /* free device structure */ |
a1365275 SH |
1209 | |
1210 | PRINTK1("clean_module() exit\n"); | |
1211 | ||
1212 | return 0; | |
1213 | } | |
1214 | ||
3ae5eaec | 1215 | static struct platform_driver dm9000_driver = { |
5d22a312 BD |
1216 | .driver = { |
1217 | .name = "dm9000", | |
1218 | .owner = THIS_MODULE, | |
1219 | }, | |
a1365275 SH |
1220 | .probe = dm9000_probe, |
1221 | .remove = dm9000_drv_remove, | |
1222 | .suspend = dm9000_drv_suspend, | |
1223 | .resume = dm9000_drv_resume, | |
1224 | }; | |
1225 | ||
1226 | static int __init | |
1227 | dm9000_init(void) | |
1228 | { | |
2ae2d77c BD |
1229 | printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME); |
1230 | ||
3ae5eaec | 1231 | return platform_driver_register(&dm9000_driver); /* search board and register */ |
a1365275 SH |
1232 | } |
1233 | ||
1234 | static void __exit | |
1235 | dm9000_cleanup(void) | |
1236 | { | |
3ae5eaec | 1237 | platform_driver_unregister(&dm9000_driver); |
a1365275 SH |
1238 | } |
1239 | ||
1240 | module_init(dm9000_init); | |
1241 | module_exit(dm9000_cleanup); | |
1242 | ||
1243 | MODULE_AUTHOR("Sascha Hauer, Ben Dooks"); | |
1244 | MODULE_DESCRIPTION("Davicom DM9000 network driver"); | |
1245 | MODULE_LICENSE("GPL"); |