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DM9000: Add ethtool support for reading and writing EEPROM
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CommitLineData
a1365275
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1/*
2 * dm9000.c: Version 1.2 03/18/2003
3 *
4 * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
5 * Copyright (C) 1997 Sten Wang
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
18 *
19 * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
20 * 06/22/2001 Support DM9801 progrmming
21 * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
22 * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
23 * R17 = (R17 & 0xfff0) | NF + 3
24 * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
25 * R17 = (R17 & 0xfff0) | NF
26 *
27 * v1.00 modify by simon 2001.9.5
28 * change for kernel 2.4.x
29 *
30 * v1.1 11/09/2001 fix force mode bug
31 *
32 * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
33 * Fixed phy reset.
34 * Added tx/rx 32 bit mode.
35 * Cleaned up for kernel merge.
36 *
37 * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
38 * Port to 2.6 kernel
39 *
40 * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
41 * Cleanup of code to remove ifdefs
42 * Allowed platform device data to influence access width
43 * Reformatting areas of code
44 *
45 * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
46 * * removed 2.4 style module parameters
47 * * removed removed unused stat counter and fixed
48 * net_device_stats
49 * * introduced tx_timeout function
50 * * reworked locking
9ef9ac51
BD
51 *
52 * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
53 * * fixed spinlock call without pointer
54 * * ensure spinlock is initialised
a1365275
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55 */
56
57#include <linux/module.h>
58#include <linux/ioport.h>
59#include <linux/netdevice.h>
60#include <linux/etherdevice.h>
61#include <linux/init.h>
62#include <linux/skbuff.h>
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63#include <linux/spinlock.h>
64#include <linux/crc32.h>
65#include <linux/mii.h>
7da99859 66#include <linux/ethtool.h>
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67#include <linux/dm9000.h>
68#include <linux/delay.h>
d052d1be 69#include <linux/platform_device.h>
4e4fc05a 70#include <linux/irq.h>
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71
72#include <asm/delay.h>
73#include <asm/irq.h>
74#include <asm/io.h>
75
76#include "dm9000.h"
77
78/* Board/System/Debug information/definition ---------------- */
79
80#define DM9000_PHY 0x40 /* PHY address 0x01 */
81
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82#define CARDNAME "dm9000"
83#define PFX CARDNAME ": "
7da99859 84#define DRV_VERSION "1.30"
a1365275 85
f40d24d9
AL
86#ifdef CONFIG_BLACKFIN
87#define readsb insb
88#define readsw insw
89#define readsl insl
90#define writesb outsb
91#define writesw outsw
92#define writesl outsl
1a5f1c4f 93#define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
f40d24d9 94#else
1a5f1c4f 95#define DEFAULT_TRIGGER (0)
f40d24d9
AL
96#endif
97
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98/*
99 * Transmit timeout, default 5 seconds.
100 */
101static int watchdog = 5000;
102module_param(watchdog, int, 0400);
103MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
104
9a2f037c
BD
105/* DM9000 register address locking.
106 *
107 * The DM9000 uses an address register to control where data written
108 * to the data register goes. This means that the address register
109 * must be preserved over interrupts or similar calls.
110 *
111 * During interrupt and other critical calls, a spinlock is used to
112 * protect the system, but the calls themselves save the address
113 * in the address register in case they are interrupting another
114 * access to the device.
115 *
116 * For general accesses a lock is provided so that calls which are
117 * allowed to sleep are serialised so that the address register does
118 * not need to be saved. This lock also serves to serialise access
119 * to the EEPROM and PHY access registers which are shared between
120 * these two devices.
121 */
122
a1365275
SH
123/* Structure/enum declaration ------------------------------- */
124typedef struct board_info {
125
126 void __iomem *io_addr; /* Register I/O base address */
127 void __iomem *io_data; /* Data I/O address */
128 u16 irq; /* IRQ */
129
130 u16 tx_pkt_cnt;
131 u16 queue_pkt_len;
132 u16 queue_start_addr;
133 u16 dbug_cnt;
134 u8 io_mode; /* 0:word, 2:byte */
135 u8 phy_addr;
33ba5091 136 unsigned int flags;
321f69a4 137 unsigned int in_suspend :1;
a1365275 138
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BD
139 int debug_level;
140
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141 void (*inblk)(void __iomem *port, void *data, int length);
142 void (*outblk)(void __iomem *port, void *data, int length);
143 void (*dumpblk)(void __iomem *port, int length);
144
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145 struct device *dev; /* parent device */
146
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147 struct resource *addr_res; /* resources found */
148 struct resource *data_res;
149 struct resource *addr_req; /* resources requested */
150 struct resource *data_req;
151 struct resource *irq_res;
152
9a2f037c
BD
153 struct mutex addr_lock; /* phy and eeprom access lock */
154
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155 spinlock_t lock;
156
157 struct mii_if_info mii;
158 u32 msg_enable;
159} board_info_t;
160
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BD
161/* debug code */
162
163#define dm9000_dbg(db, lev, msg...) do { \
164 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
165 (lev) < db->debug_level) { \
166 dev_dbg(db->dev, msg); \
167 } \
168} while (0)
169
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170static inline board_info_t *to_dm9000_board(struct net_device *dev)
171{
172 return dev->priv;
173}
174
a1365275 175/* function declaration ------------------------------------- */
3ae5eaec 176static int dm9000_probe(struct platform_device *);
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177static int dm9000_open(struct net_device *);
178static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
179static int dm9000_stop(struct net_device *);
a1365275 180
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181static void dm9000_init_dm9000(struct net_device *);
182
7d12e780 183static irqreturn_t dm9000_interrupt(int, void *);
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184
185static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
186static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
187 int value);
86c62fab 188
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BD
189static void dm9000_read_eeprom(board_info_t *, int addr, u8 *to);
190static void dm9000_write_eeprom(board_info_t *, int addr, u8 *dp);
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191static void dm9000_rx(struct net_device *);
192static void dm9000_hash_table(struct net_device *);
193
194//#define DM9000_PROGRAM_EEPROM
195#ifdef DM9000_PROGRAM_EEPROM
196static void program_eeprom(board_info_t * db);
197#endif
198/* DM9000 network board routine ---------------------------- */
199
200static void
201dm9000_reset(board_info_t * db)
202{
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BD
203 dev_dbg(db->dev, "resetting device\n");
204
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205 /* RESET device */
206 writeb(DM9000_NCR, db->io_addr);
207 udelay(200);
208 writeb(NCR_RST, db->io_data);
209 udelay(200);
210}
211
212/*
213 * Read a byte from I/O port
214 */
215static u8
216ior(board_info_t * db, int reg)
217{
218 writeb(reg, db->io_addr);
219 return readb(db->io_data);
220}
221
222/*
223 * Write a byte to I/O port
224 */
225
226static void
227iow(board_info_t * db, int reg, int value)
228{
229 writeb(reg, db->io_addr);
230 writeb(value, db->io_data);
231}
232
233/* routines for sending block to chip */
234
235static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
236{
237 writesb(reg, data, count);
238}
239
240static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
241{
242 writesw(reg, data, (count+1) >> 1);
243}
244
245static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
246{
247 writesl(reg, data, (count+3) >> 2);
248}
249
250/* input block from chip to memory */
251
252static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
253{
5f6b5517 254 readsb(reg, data, count);
a1365275
SH
255}
256
257
258static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
259{
260 readsw(reg, data, (count+1) >> 1);
261}
262
263static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
264{
265 readsl(reg, data, (count+3) >> 2);
266}
267
268/* dump block from chip to null */
269
270static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
271{
272 int i;
273 int tmp;
274
275 for (i = 0; i < count; i++)
276 tmp = readb(reg);
277}
278
279static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
280{
281 int i;
282 int tmp;
283
284 count = (count + 1) >> 1;
285
286 for (i = 0; i < count; i++)
287 tmp = readw(reg);
288}
289
290static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
291{
292 int i;
293 int tmp;
294
295 count = (count + 3) >> 2;
296
297 for (i = 0; i < count; i++)
298 tmp = readl(reg);
299}
300
301/* dm9000_set_io
302 *
303 * select the specified set of io routines to use with the
304 * device
305 */
306
307static void dm9000_set_io(struct board_info *db, int byte_width)
308{
309 /* use the size of the data resource to work out what IO
310 * routines we want to use
311 */
312
313 switch (byte_width) {
314 case 1:
315 db->dumpblk = dm9000_dumpblk_8bit;
316 db->outblk = dm9000_outblk_8bit;
317 db->inblk = dm9000_inblk_8bit;
318 break;
319
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320
321 case 3:
a76836f9
BD
322 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
323 case 2:
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324 db->dumpblk = dm9000_dumpblk_16bit;
325 db->outblk = dm9000_outblk_16bit;
326 db->inblk = dm9000_inblk_16bit;
327 break;
328
329 case 4:
330 default:
331 db->dumpblk = dm9000_dumpblk_32bit;
332 db->outblk = dm9000_outblk_32bit;
333 db->inblk = dm9000_inblk_32bit;
334 break;
335 }
336}
337
338
339/* Our watchdog timed out. Called by the networking layer */
340static void dm9000_timeout(struct net_device *dev)
341{
342 board_info_t *db = (board_info_t *) dev->priv;
343 u8 reg_save;
344 unsigned long flags;
345
346 /* Save previous register address */
347 reg_save = readb(db->io_addr);
9ef9ac51 348 spin_lock_irqsave(&db->lock,flags);
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SH
349
350 netif_stop_queue(dev);
351 dm9000_reset(db);
352 dm9000_init_dm9000(dev);
353 /* We can accept TX packets again */
354 dev->trans_start = jiffies;
355 netif_wake_queue(dev);
356
357 /* Restore previous register address */
358 writeb(reg_save, db->io_addr);
9ef9ac51 359 spin_unlock_irqrestore(&db->lock,flags);
a1365275
SH
360}
361
2fd0e33f
KH
362#ifdef CONFIG_NET_POLL_CONTROLLER
363/*
364 *Used by netconsole
365 */
366static void dm9000_poll_controller(struct net_device *dev)
367{
368 disable_irq(dev->irq);
28431146 369 dm9000_interrupt(dev->irq,dev);
2fd0e33f
KH
370 enable_irq(dev->irq);
371}
372#endif
a1365275 373
7da99859
BD
374/* ethtool ops */
375
376static void dm9000_get_drvinfo(struct net_device *dev,
377 struct ethtool_drvinfo *info)
378{
379 board_info_t *dm = to_dm9000_board(dev);
380
381 strcpy(info->driver, CARDNAME);
382 strcpy(info->version, DRV_VERSION);
383 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
384}
385
386static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
387{
388 board_info_t *dm = to_dm9000_board(dev);
7da99859 389
7da99859 390 mii_ethtool_gset(&dm->mii, cmd);
7da99859
BD
391 return 0;
392}
393
394static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
395{
396 board_info_t *dm = to_dm9000_board(dev);
7da99859 397
9a2f037c 398 return mii_ethtool_sset(&dm->mii, cmd);
7da99859
BD
399}
400
401static int dm9000_nway_reset(struct net_device *dev)
402{
403 board_info_t *dm = to_dm9000_board(dev);
404 return mii_nway_restart(&dm->mii);
405}
406
407static u32 dm9000_get_link(struct net_device *dev)
408{
409 board_info_t *dm = to_dm9000_board(dev);
410 return mii_link_ok(&dm->mii);
411}
412
29d52e54
BD
413#define DM_EEPROM_MAGIC (0x444D394B)
414
415static int dm9000_get_eeprom_len(struct net_device *dev)
416{
417 return 128;
418}
419
420static int dm9000_get_eeprom(struct net_device *dev,
421 struct ethtool_eeprom *ee, u8 *data)
422{
423 board_info_t *dm = to_dm9000_board(dev);
424 int offset = ee->offset;
425 int len = ee->len;
426 int i;
427
428 /* EEPROM access is aligned to two bytes */
429
430 if ((len & 1) != 0 || (offset & 1) != 0)
431 return -EINVAL;
432
433 ee->magic = DM_EEPROM_MAGIC;
434
435 for (i = 0; i < len; i += 2)
436 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
437
438 return 0;
439}
440
441static int dm9000_set_eeprom(struct net_device *dev,
442 struct ethtool_eeprom *ee, u8 *data)
443{
444 board_info_t *dm = to_dm9000_board(dev);
445 int offset = ee->offset;
446 int len = ee->len;
447 int i;
448
449 /* EEPROM access is aligned to two bytes */
450
451 if ((len & 1) != 0 || (offset & 1) != 0)
452 return -EINVAL;
453
454 if (ee->magic != DM_EEPROM_MAGIC)
455 return -EINVAL;
456
457 for (i = 0; i < len; i += 2)
458 dm9000_write_eeprom(dm, (offset + i) / 2, data + i);
459
460 return 0;
461}
462
7da99859
BD
463static const struct ethtool_ops dm9000_ethtool_ops = {
464 .get_drvinfo = dm9000_get_drvinfo,
465 .get_settings = dm9000_get_settings,
466 .set_settings = dm9000_set_settings,
467 .nway_reset = dm9000_nway_reset,
468 .get_link = dm9000_get_link,
29d52e54
BD
469 .get_eeprom_len = dm9000_get_eeprom_len,
470 .get_eeprom = dm9000_get_eeprom,
471 .set_eeprom = dm9000_set_eeprom,
7da99859
BD
472};
473
474
a1365275
SH
475/* dm9000_release_board
476 *
477 * release a board, and any mapped resources
478 */
479
480static void
481dm9000_release_board(struct platform_device *pdev, struct board_info *db)
482{
483 if (db->data_res == NULL) {
484 if (db->addr_res != NULL)
485 release_mem_region((unsigned long)db->io_addr, 4);
486 return;
487 }
488
489 /* unmap our resources */
490
491 iounmap(db->io_addr);
492 iounmap(db->io_data);
493
494 /* release the resources */
495
496 if (db->data_req != NULL) {
497 release_resource(db->data_req);
498 kfree(db->data_req);
499 }
500
51985487
DO
501 if (db->addr_req != NULL) {
502 release_resource(db->addr_req);
a1365275
SH
503 kfree(db->addr_req);
504 }
505}
506
507#define res_size(_r) (((_r)->end - (_r)->start) + 1)
508
509/*
510 * Search DM9000 board, allocate space and register it
511 */
512static int
3ae5eaec 513dm9000_probe(struct platform_device *pdev)
a1365275 514{
a1365275
SH
515 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
516 struct board_info *db; /* Point a board information structure */
517 struct net_device *ndev;
518 unsigned long base;
519 int ret = 0;
520 int iosize;
521 int i;
522 u32 id_val;
523
a1365275
SH
524 /* Init network device */
525 ndev = alloc_etherdev(sizeof (struct board_info));
526 if (!ndev) {
a76836f9 527 dev_err(&pdev->dev, "could not allocate device.\n");
a1365275
SH
528 return -ENOMEM;
529 }
530
3ae5eaec 531 SET_NETDEV_DEV(ndev, &pdev->dev);
a1365275 532
a76836f9 533 dev_dbg(&pdev->dev, "dm9000_probe()");
a1365275
SH
534
535 /* setup board info structure */
536 db = (struct board_info *) ndev->priv;
537 memset(db, 0, sizeof (*db));
538
a76836f9
BD
539 db->dev = &pdev->dev;
540
9ef9ac51 541 spin_lock_init(&db->lock);
9a2f037c 542 mutex_init(&db->addr_lock);
9ef9ac51 543
a1365275
SH
544 if (pdev->num_resources < 2) {
545 ret = -ENODEV;
546 goto out;
b4ed03ff 547 } else if (pdev->num_resources == 2) {
a1365275
SH
548 base = pdev->resource[0].start;
549
550 if (!request_mem_region(base, 4, ndev->name)) {
551 ret = -EBUSY;
552 goto out;
553 }
554
555 ndev->base_addr = base;
556 ndev->irq = pdev->resource[1].start;
b4ed03ff
BD
557 db->io_addr = (void __iomem *)base;
558 db->io_data = (void __iomem *)(base + 4);
a1365275 559
f40d24d9
AL
560 /* ensure at least we have a default set of IO routines */
561 dm9000_set_io(db, 2);
562
b4ed03ff 563 } else {
a1365275
SH
564 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
565 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
566 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
567
b4ed03ff
BD
568 if (db->addr_res == NULL || db->data_res == NULL ||
569 db->irq_res == NULL) {
a76836f9 570 dev_err(db->dev, "insufficient resources\n");
a1365275
SH
571 ret = -ENOENT;
572 goto out;
573 }
574
575 i = res_size(db->addr_res);
576 db->addr_req = request_mem_region(db->addr_res->start, i,
577 pdev->name);
578
579 if (db->addr_req == NULL) {
a76836f9 580 dev_err(db->dev, "cannot claim address reg area\n");
a1365275
SH
581 ret = -EIO;
582 goto out;
583 }
584
585 db->io_addr = ioremap(db->addr_res->start, i);
586
587 if (db->io_addr == NULL) {
a76836f9 588 dev_err(db->dev, "failed to ioremap address reg\n");
a1365275
SH
589 ret = -EINVAL;
590 goto out;
591 }
592
593 iosize = res_size(db->data_res);
594 db->data_req = request_mem_region(db->data_res->start, iosize,
595 pdev->name);
596
597 if (db->data_req == NULL) {
a76836f9 598 dev_err(db->dev, "cannot claim data reg area\n");
a1365275
SH
599 ret = -EIO;
600 goto out;
601 }
602
603 db->io_data = ioremap(db->data_res->start, iosize);
604
605 if (db->io_data == NULL) {
a76836f9 606 dev_err(db->dev,"failed to ioremap data reg\n");
a1365275
SH
607 ret = -EINVAL;
608 goto out;
609 }
610
611 /* fill in parameters for net-dev structure */
612
613 ndev->base_addr = (unsigned long)db->io_addr;
614 ndev->irq = db->irq_res->start;
615
616 /* ensure at least we have a default set of IO routines */
617 dm9000_set_io(db, iosize);
a1365275
SH
618 }
619
620 /* check to see if anything is being over-ridden */
621 if (pdata != NULL) {
622 /* check to see if the driver wants to over-ride the
623 * default IO width */
624
625 if (pdata->flags & DM9000_PLATF_8BITONLY)
626 dm9000_set_io(db, 1);
627
628 if (pdata->flags & DM9000_PLATF_16BITONLY)
629 dm9000_set_io(db, 2);
630
631 if (pdata->flags & DM9000_PLATF_32BITONLY)
632 dm9000_set_io(db, 4);
633
634 /* check to see if there are any IO routine
635 * over-rides */
636
637 if (pdata->inblk != NULL)
638 db->inblk = pdata->inblk;
639
640 if (pdata->outblk != NULL)
641 db->outblk = pdata->outblk;
642
643 if (pdata->dumpblk != NULL)
644 db->dumpblk = pdata->dumpblk;
33ba5091
BD
645
646 db->flags = pdata->flags;
a1365275
SH
647 }
648
649 dm9000_reset(db);
650
651 /* try two times, DM9000 sometimes gets the first read wrong */
652 for (i = 0; i < 2; i++) {
653 id_val = ior(db, DM9000_VIDL);
654 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
655 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
656 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
657
658 if (id_val == DM9000_ID)
659 break;
a76836f9 660 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
a1365275
SH
661 }
662
663 if (id_val != DM9000_ID) {
a76836f9 664 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
418d6f87
MR
665 ret = -ENODEV;
666 goto out;
a1365275
SH
667 }
668
669 /* from this point we assume that we have found a DM9000 */
670
671 /* driver system function */
672 ether_setup(ndev);
673
674 ndev->open = &dm9000_open;
675 ndev->hard_start_xmit = &dm9000_start_xmit;
676 ndev->tx_timeout = &dm9000_timeout;
677 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
678 ndev->stop = &dm9000_stop;
a1365275 679 ndev->set_multicast_list = &dm9000_hash_table;
7da99859
BD
680 ndev->ethtool_ops = &dm9000_ethtool_ops;
681
2fd0e33f
KH
682#ifdef CONFIG_NET_POLL_CONTROLLER
683 ndev->poll_controller = &dm9000_poll_controller;
684#endif
a1365275
SH
685
686#ifdef DM9000_PROGRAM_EEPROM
687 program_eeprom(db);
688#endif
689 db->msg_enable = NETIF_MSG_LINK;
690 db->mii.phy_id_mask = 0x1f;
691 db->mii.reg_num_mask = 0x1f;
692 db->mii.force_media = 0;
693 db->mii.full_duplex = 0;
694 db->mii.dev = ndev;
695 db->mii.mdio_read = dm9000_phy_read;
696 db->mii.mdio_write = dm9000_phy_write;
697
86c62fab
BD
698 /* try reading the node address from the attached EEPROM */
699 for (i = 0; i < 6; i += 2)
700 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
a1365275 701
5b55dda6
BD
702 if (!is_valid_ether_addr(ndev->dev_addr)) {
703 /* try reading from mac */
704
705 for (i = 0; i < 6; i++)
706 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
707 }
708
a1365275 709 if (!is_valid_ether_addr(ndev->dev_addr))
a76836f9
BD
710 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
711 "set using ifconfig\n", ndev->name);
a1365275 712
3ae5eaec 713 platform_set_drvdata(pdev, ndev);
a1365275
SH
714 ret = register_netdev(ndev);
715
716 if (ret == 0) {
0795af57
JP
717 DECLARE_MAC_BUF(mac);
718 printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n",
719 ndev->name, db->io_addr, db->io_data, ndev->irq,
720 print_mac(mac, ndev->dev_addr));
a1365275
SH
721 }
722 return 0;
723
418d6f87 724out:
a76836f9 725 dev_err(db->dev, "not found (%d).\n", ret);
a1365275
SH
726
727 dm9000_release_board(pdev, db);
9fd9f9b6 728 free_netdev(ndev);
a1365275
SH
729
730 return ret;
731}
732
733/*
734 * Open the interface.
735 * The interface is opened whenever "ifconfig" actives it.
736 */
737static int
738dm9000_open(struct net_device *dev)
739{
740 board_info_t *db = (board_info_t *) dev->priv;
1a5f1c4f 741 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
a1365275 742
a76836f9 743 dev_dbg(db->dev, "entering %s\n", __func__);
a1365275 744
1a5f1c4f
BD
745 /* If there is no IRQ type specified, default to something that
746 * may work, and tell the user that this is a problem */
747
748 if (irqflags == IRQF_TRIGGER_NONE) {
749 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
750 irqflags = DEFAULT_TRIGGER;
751 }
752
753 irqflags |= IRQF_SHARED;
754
755 if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
a1365275
SH
756 return -EAGAIN;
757
758 /* Initialize DM9000 board */
759 dm9000_reset(db);
760 dm9000_init_dm9000(dev);
761
762 /* Init driver variable */
763 db->dbug_cnt = 0;
764
a1365275
SH
765 mii_check_media(&db->mii, netif_msg_link(db), 1);
766 netif_start_queue(dev);
767
768 return 0;
769}
770
771/*
772 * Initilize dm9000 board
773 */
774static void
775dm9000_init_dm9000(struct net_device *dev)
776{
777 board_info_t *db = (board_info_t *) dev->priv;
778
5b2b4ff0 779 dm9000_dbg(db, 1, "entering %s\n", __func__);
a1365275
SH
780
781 /* I/O mode */
782 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
783
784 /* GPIO0 on pre-activate PHY */
785 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
786 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
787 iow(db, DM9000_GPR, 0); /* Enable PHY */
788
33ba5091
BD
789 if (db->flags & DM9000_PLATF_EXT_PHY)
790 iow(db, DM9000_NCR, NCR_EXT_PHY);
791
a1365275
SH
792 /* Program operating register */
793 iow(db, DM9000_TCR, 0); /* TX Polling clear */
794 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
795 iow(db, DM9000_FCR, 0xff); /* Flow Control */
796 iow(db, DM9000_SMCR, 0); /* Special Mode */
797 /* clear TX status */
798 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
799 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
800
801 /* Set address filter table */
802 dm9000_hash_table(dev);
803
804 /* Activate DM9000 */
805 iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
806 /* Enable TX/RX interrupt mask */
807 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
808
809 /* Init Driver variable */
810 db->tx_pkt_cnt = 0;
811 db->queue_pkt_len = 0;
812 dev->trans_start = 0;
a1365275
SH
813}
814
815/*
816 * Hardware start transmission.
817 * Send a packet to media from the upper layer.
818 */
819static int
820dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
821{
c46ac946 822 unsigned long flags;
a1365275
SH
823 board_info_t *db = (board_info_t *) dev->priv;
824
5b2b4ff0 825 dm9000_dbg(db, 3, "%s:\n", __func__);
a1365275
SH
826
827 if (db->tx_pkt_cnt > 1)
828 return 1;
829
c46ac946 830 spin_lock_irqsave(&db->lock, flags);
a1365275
SH
831
832 /* Move data to DM9000 TX RAM */
833 writeb(DM9000_MWCMD, db->io_addr);
834
835 (db->outblk)(db->io_data, skb->data, skb->len);
09f75cd7 836 dev->stats.tx_bytes += skb->len;
a1365275 837
c46ac946 838 db->tx_pkt_cnt++;
a1365275 839 /* TX control: First packet immediately send, second packet queue */
c46ac946 840 if (db->tx_pkt_cnt == 1) {
a1365275
SH
841 /* Set TX length to DM9000 */
842 iow(db, DM9000_TXPLL, skb->len & 0xff);
843 iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
844
845 /* Issue TX polling command */
846 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
847
848 dev->trans_start = jiffies; /* save the time stamp */
a1365275
SH
849 } else {
850 /* Second packet */
a1365275 851 db->queue_pkt_len = skb->len;
c46ac946 852 netif_stop_queue(dev);
a1365275
SH
853 }
854
c46ac946
FW
855 spin_unlock_irqrestore(&db->lock, flags);
856
a1365275
SH
857 /* free this SKB */
858 dev_kfree_skb(skb);
859
a1365275
SH
860 return 0;
861}
862
863static void
864dm9000_shutdown(struct net_device *dev)
865{
866 board_info_t *db = (board_info_t *) dev->priv;
867
868 /* RESET device */
869 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
870 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
871 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
872 iow(db, DM9000_RCR, 0x00); /* Disable RX */
873}
874
875/*
876 * Stop the interface.
877 * The interface is stopped when it is brought.
878 */
879static int
880dm9000_stop(struct net_device *ndev)
881{
882 board_info_t *db = (board_info_t *) ndev->priv;
883
5b2b4ff0 884 dm9000_dbg(db, 1, "entering %s\n", __func__);
a1365275 885
a1365275
SH
886 netif_stop_queue(ndev);
887 netif_carrier_off(ndev);
888
889 /* free interrupt */
890 free_irq(ndev->irq, ndev);
891
892 dm9000_shutdown(ndev);
893
894 return 0;
895}
896
897/*
898 * DM9000 interrupt handler
899 * receive the packet to upper layer, free the transmitted packet
900 */
901
5d22a312 902static void
a1365275
SH
903dm9000_tx_done(struct net_device *dev, board_info_t * db)
904{
905 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
906
907 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
908 /* One packet sent complete */
909 db->tx_pkt_cnt--;
09f75cd7 910 dev->stats.tx_packets++;
a1365275
SH
911
912 /* Queue packet check & send */
913 if (db->tx_pkt_cnt > 0) {
914 iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
915 iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
916 iow(db, DM9000_TCR, TCR_TXREQ);
917 dev->trans_start = jiffies;
918 }
919 netif_wake_queue(dev);
920 }
921}
922
923static irqreturn_t
7d12e780 924dm9000_interrupt(int irq, void *dev_id)
a1365275
SH
925{
926 struct net_device *dev = dev_id;
5b2b4ff0 927 board_info_t *db = (board_info_t *) dev->priv;
a1365275
SH
928 int int_status;
929 u8 reg_save;
930
5b2b4ff0 931 dm9000_dbg(db, 3, "entering %s\n", __func__);
a1365275
SH
932
933 /* A real interrupt coming */
5b2b4ff0 934
a1365275
SH
935 spin_lock(&db->lock);
936
937 /* Save previous register address */
938 reg_save = readb(db->io_addr);
939
940 /* Disable all interrupts */
941 iow(db, DM9000_IMR, IMR_PAR);
942
943 /* Got DM9000 interrupt status */
944 int_status = ior(db, DM9000_ISR); /* Got ISR */
945 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
946
947 /* Received the coming packet */
948 if (int_status & ISR_PRS)
949 dm9000_rx(dev);
950
951 /* Trnasmit Interrupt check */
952 if (int_status & ISR_PTS)
953 dm9000_tx_done(dev, db);
954
955 /* Re-enable interrupt mask */
956 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
957
958 /* Restore previous register address */
959 writeb(reg_save, db->io_addr);
960
961 spin_unlock(&db->lock);
962
963 return IRQ_HANDLED;
964}
965
a1365275 966struct dm9000_rxhdr {
93116573
BD
967 u8 RxPktReady;
968 u8 RxStatus;
a1365275
SH
969 u16 RxLen;
970} __attribute__((__packed__));
971
972/*
973 * Received a packet and pass to upper layer
974 */
975static void
976dm9000_rx(struct net_device *dev)
977{
978 board_info_t *db = (board_info_t *) dev->priv;
979 struct dm9000_rxhdr rxhdr;
980 struct sk_buff *skb;
981 u8 rxbyte, *rdptr;
6478fac6 982 bool GoodPacket;
a1365275
SH
983 int RxLen;
984
985 /* Check packet ready or not */
986 do {
987 ior(db, DM9000_MRCMDX); /* Dummy read */
988
989 /* Get most updated data */
990 rxbyte = readb(db->io_data);
991
992 /* Status check: this byte must be 0 or 1 */
993 if (rxbyte > DM9000_PKT_RDY) {
a76836f9 994 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
a1365275
SH
995 iow(db, DM9000_RCR, 0x00); /* Stop Device */
996 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
997 return;
998 }
999
1000 if (rxbyte != DM9000_PKT_RDY)
1001 return;
1002
1003 /* A packet ready now & Get status/length */
6478fac6 1004 GoodPacket = true;
a1365275
SH
1005 writeb(DM9000_MRCMD, db->io_addr);
1006
1007 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
1008
93116573 1009 RxLen = le16_to_cpu(rxhdr.RxLen);
a1365275
SH
1010
1011 /* Packet Status check */
1012 if (RxLen < 0x40) {
6478fac6 1013 GoodPacket = false;
a76836f9 1014 dev_dbg(db->dev, "Bad Packet received (runt)\n");
a1365275
SH
1015 }
1016
1017 if (RxLen > DM9000_PKT_MAX) {
a76836f9 1018 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
a1365275
SH
1019 }
1020
93116573 1021 if (rxhdr.RxStatus & 0xbf) {
6478fac6 1022 GoodPacket = false;
93116573 1023 if (rxhdr.RxStatus & 0x01) {
a76836f9 1024 dev_dbg(db->dev, "fifo error\n");
09f75cd7 1025 dev->stats.rx_fifo_errors++;
a1365275 1026 }
93116573 1027 if (rxhdr.RxStatus & 0x02) {
a76836f9 1028 dev_dbg(db->dev, "crc error\n");
09f75cd7 1029 dev->stats.rx_crc_errors++;
a1365275 1030 }
93116573 1031 if (rxhdr.RxStatus & 0x80) {
a76836f9 1032 dev_dbg(db->dev, "length error\n");
09f75cd7 1033 dev->stats.rx_length_errors++;
a1365275
SH
1034 }
1035 }
1036
1037 /* Move data from DM9000 */
1038 if (GoodPacket
1039 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
a1365275
SH
1040 skb_reserve(skb, 2);
1041 rdptr = (u8 *) skb_put(skb, RxLen - 4);
1042
1043 /* Read received packet from RX SRAM */
1044
1045 (db->inblk)(db->io_data, rdptr, RxLen);
09f75cd7 1046 dev->stats.rx_bytes += RxLen;
a1365275
SH
1047
1048 /* Pass to upper layer */
1049 skb->protocol = eth_type_trans(skb, dev);
1050 netif_rx(skb);
09f75cd7 1051 dev->stats.rx_packets++;
a1365275
SH
1052
1053 } else {
1054 /* need to dump the packet's data */
1055
1056 (db->dumpblk)(db->io_data, RxLen);
1057 }
1058 } while (rxbyte == DM9000_PKT_RDY);
1059}
1060
1061/*
86c62fab 1062 * Read a word data from EEPROM
a1365275 1063 */
86c62fab 1064static void
29d52e54 1065dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
a1365275 1066{
9a2f037c
BD
1067 mutex_lock(&db->addr_lock);
1068
a1365275
SH
1069 iow(db, DM9000_EPAR, offset);
1070 iow(db, DM9000_EPCR, EPCR_ERPRR);
1071 mdelay(8); /* according to the datasheet 200us should be enough,
1072 but it doesn't work */
1073 iow(db, DM9000_EPCR, 0x0);
86c62fab
BD
1074
1075 to[0] = ior(db, DM9000_EPDRL);
1076 to[1] = ior(db, DM9000_EPDRH);
9a2f037c
BD
1077
1078 mutex_unlock(&db->addr_lock);
a1365275
SH
1079}
1080
a1365275
SH
1081/*
1082 * Write a word data to SROM
1083 */
1084static void
29d52e54 1085dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
a1365275 1086{
9a2f037c
BD
1087 mutex_lock(&db->addr_lock);
1088
a1365275 1089 iow(db, DM9000_EPAR, offset);
29d52e54
BD
1090 iow(db, DM9000_EPDRH, data[1]);
1091 iow(db, DM9000_EPDRL, data[0]);
a1365275
SH
1092 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
1093 mdelay(8); /* same shit */
1094 iow(db, DM9000_EPCR, 0);
9a2f037c
BD
1095
1096 mutex_unlock(&db->addr_lock);
a1365275
SH
1097}
1098
29d52e54 1099#ifdef DM9000_PROGRAM_EEPROM
a1365275
SH
1100/*
1101 * Only for development:
1102 * Here we write static data to the eeprom in case
1103 * we don't have valid content on a new board
1104 */
1105static void
1106program_eeprom(board_info_t * db)
1107{
1108 u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
1109 0x0000, /* Autoload: accept nothing */
1110 0x0a46, 0x9000, /* Vendor / Product ID */
1111 0x0000, /* pin control */
1112 0x0000,
1113 }; /* Wake-up mode control */
1114 int i;
1115 for (i = 0; i < 8; i++)
1116 write_srom_word(db, i, eeprom[i]);
1117}
1118#endif
1119
1120
1121/*
1122 * Calculate the CRC valude of the Rx packet
1123 * flag = 1 : return the reverse CRC (for the received packet CRC)
1124 * 0 : return the normal CRC (for Hash Table index)
1125 */
1126
1127static unsigned long
1128cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
1129{
1130
1131 u32 crc = ether_crc_le(Len, Data);
1132
1133 if (flag)
1134 return ~crc;
1135
1136 return crc;
1137}
1138
1139/*
1140 * Set DM9000 multicast address
1141 */
1142static void
1143dm9000_hash_table(struct net_device *dev)
1144{
1145 board_info_t *db = (board_info_t *) dev->priv;
1146 struct dev_mc_list *mcptr = dev->mc_list;
1147 int mc_cnt = dev->mc_count;
1148 u32 hash_val;
1149 u16 i, oft, hash_table[4];
1150 unsigned long flags;
1151
5b2b4ff0 1152 dm9000_dbg(db, 1, "entering %s\n", __func__);
a1365275
SH
1153
1154 spin_lock_irqsave(&db->lock,flags);
1155
1156 for (i = 0, oft = 0x10; i < 6; i++, oft++)
1157 iow(db, oft, dev->dev_addr[i]);
1158
1159 /* Clear Hash Table */
1160 for (i = 0; i < 4; i++)
1161 hash_table[i] = 0x0;
1162
1163 /* broadcast address */
1164 hash_table[3] = 0x8000;
1165
1166 /* the multicast address in Hash Table : 64 bits */
1167 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1168 hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
1169 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
1170 }
1171
1172 /* Write the hash table to MAC MD table */
1173 for (i = 0, oft = 0x16; i < 4; i++) {
1174 iow(db, oft++, hash_table[i] & 0xff);
1175 iow(db, oft++, (hash_table[i] >> 8) & 0xff);
1176 }
1177
1178 spin_unlock_irqrestore(&db->lock,flags);
1179}
1180
1181
321f69a4
BD
1182/*
1183 * Sleep, either by using msleep() or if we are suspending, then
1184 * use mdelay() to sleep.
1185 */
1186static void dm9000_msleep(board_info_t *db, unsigned int ms)
1187{
1188 if (db->in_suspend)
1189 mdelay(ms);
1190 else
1191 msleep(ms);
1192}
1193
a1365275
SH
1194/*
1195 * Read a word from phyxcer
1196 */
1197static int
1198dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1199{
1200 board_info_t *db = (board_info_t *) dev->priv;
1201 unsigned long flags;
9ef9ac51 1202 unsigned int reg_save;
a1365275
SH
1203 int ret;
1204
9a2f037c
BD
1205 mutex_lock(&db->addr_lock);
1206
a1365275 1207 spin_lock_irqsave(&db->lock,flags);
9ef9ac51
BD
1208
1209 /* Save previous register address */
1210 reg_save = readb(db->io_addr);
1211
a1365275
SH
1212 /* Fill the phyxcer register into REG_0C */
1213 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1214
1215 iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
89c8b0e6
BD
1216
1217 writeb(reg_save, db->io_addr);
1218 spin_unlock_irqrestore(&db->lock,flags);
1219
321f69a4 1220 dm9000_msleep(db, 1); /* Wait read complete */
89c8b0e6
BD
1221
1222 spin_lock_irqsave(&db->lock,flags);
1223 reg_save = readb(db->io_addr);
1224
a1365275
SH
1225 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1226
1227 /* The read data keeps on REG_0D & REG_0E */
1228 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1229
9ef9ac51
BD
1230 /* restore the previous address */
1231 writeb(reg_save, db->io_addr);
a1365275
SH
1232 spin_unlock_irqrestore(&db->lock,flags);
1233
9a2f037c 1234 mutex_unlock(&db->addr_lock);
a1365275
SH
1235 return ret;
1236}
1237
1238/*
1239 * Write a word to phyxcer
1240 */
1241static void
1242dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
1243{
1244 board_info_t *db = (board_info_t *) dev->priv;
1245 unsigned long flags;
9ef9ac51 1246 unsigned long reg_save;
a1365275 1247
9a2f037c
BD
1248 mutex_lock(&db->addr_lock);
1249
a1365275
SH
1250 spin_lock_irqsave(&db->lock,flags);
1251
9ef9ac51
BD
1252 /* Save previous register address */
1253 reg_save = readb(db->io_addr);
1254
a1365275
SH
1255 /* Fill the phyxcer register into REG_0C */
1256 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1257
1258 /* Fill the written data into REG_0D & REG_0E */
1259 iow(db, DM9000_EPDRL, (value & 0xff));
1260 iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
1261
1262 iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
89c8b0e6
BD
1263
1264 writeb(reg_save, db->io_addr);
9a2f037c 1265 spin_unlock_irqrestore(&db->lock, flags);
89c8b0e6 1266
321f69a4 1267 dm9000_msleep(db, 1); /* Wait write complete */
89c8b0e6
BD
1268
1269 spin_lock_irqsave(&db->lock,flags);
1270 reg_save = readb(db->io_addr);
1271
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SH
1272 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1273
9ef9ac51
BD
1274 /* restore the previous address */
1275 writeb(reg_save, db->io_addr);
1276
9a2f037c
BD
1277 spin_unlock_irqrestore(&db->lock, flags);
1278 mutex_unlock(&db->addr_lock);
a1365275
SH
1279}
1280
1281static int
3ae5eaec 1282dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
a1365275 1283{
3ae5eaec 1284 struct net_device *ndev = platform_get_drvdata(dev);
321f69a4 1285 board_info_t *db;
a1365275 1286
9480e307 1287 if (ndev) {
321f69a4
BD
1288 db = (board_info_t *) ndev->priv;
1289 db->in_suspend = 1;
1290
a1365275
SH
1291 if (netif_running(ndev)) {
1292 netif_device_detach(ndev);
1293 dm9000_shutdown(ndev);
1294 }
1295 }
1296 return 0;
1297}
1298
1299static int
3ae5eaec 1300dm9000_drv_resume(struct platform_device *dev)
a1365275 1301{
3ae5eaec 1302 struct net_device *ndev = platform_get_drvdata(dev);
a1365275
SH
1303 board_info_t *db = (board_info_t *) ndev->priv;
1304
9480e307 1305 if (ndev) {
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SH
1306
1307 if (netif_running(ndev)) {
1308 dm9000_reset(db);
1309 dm9000_init_dm9000(ndev);
1310
1311 netif_device_attach(ndev);
1312 }
321f69a4
BD
1313
1314 db->in_suspend = 0;
a1365275
SH
1315 }
1316 return 0;
1317}
1318
1319static int
3ae5eaec 1320dm9000_drv_remove(struct platform_device *pdev)
a1365275 1321{
3ae5eaec 1322 struct net_device *ndev = platform_get_drvdata(pdev);
a1365275 1323
3ae5eaec 1324 platform_set_drvdata(pdev, NULL);
a1365275
SH
1325
1326 unregister_netdev(ndev);
1327 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
9fd9f9b6 1328 free_netdev(ndev); /* free device structure */
a1365275 1329
a76836f9 1330 dev_dbg(&pdev->dev, "released and freed device\n");
a1365275
SH
1331 return 0;
1332}
1333
3ae5eaec 1334static struct platform_driver dm9000_driver = {
5d22a312
BD
1335 .driver = {
1336 .name = "dm9000",
1337 .owner = THIS_MODULE,
1338 },
a1365275
SH
1339 .probe = dm9000_probe,
1340 .remove = dm9000_drv_remove,
1341 .suspend = dm9000_drv_suspend,
1342 .resume = dm9000_drv_resume,
1343};
1344
1345static int __init
1346dm9000_init(void)
1347{
7da99859 1348 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
2ae2d77c 1349
3ae5eaec 1350 return platform_driver_register(&dm9000_driver); /* search board and register */
a1365275
SH
1351}
1352
1353static void __exit
1354dm9000_cleanup(void)
1355{
3ae5eaec 1356 platform_driver_unregister(&dm9000_driver);
a1365275
SH
1357}
1358
1359module_init(dm9000_init);
1360module_exit(dm9000_cleanup);
1361
1362MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1363MODULE_DESCRIPTION("Davicom DM9000 network driver");
1364MODULE_LICENSE("GPL");