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DM9000: Remove old timer based poll routines
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a1365275
SH
1/*
2 * dm9000.c: Version 1.2 03/18/2003
3 *
4 * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
5 * Copyright (C) 1997 Sten Wang
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
18 *
19 * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
20 * 06/22/2001 Support DM9801 progrmming
21 * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
22 * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
23 * R17 = (R17 & 0xfff0) | NF + 3
24 * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
25 * R17 = (R17 & 0xfff0) | NF
26 *
27 * v1.00 modify by simon 2001.9.5
28 * change for kernel 2.4.x
29 *
30 * v1.1 11/09/2001 fix force mode bug
31 *
32 * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
33 * Fixed phy reset.
34 * Added tx/rx 32 bit mode.
35 * Cleaned up for kernel merge.
36 *
37 * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
38 * Port to 2.6 kernel
39 *
40 * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
41 * Cleanup of code to remove ifdefs
42 * Allowed platform device data to influence access width
43 * Reformatting areas of code
44 *
45 * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
46 * * removed 2.4 style module parameters
47 * * removed removed unused stat counter and fixed
48 * net_device_stats
49 * * introduced tx_timeout function
50 * * reworked locking
9ef9ac51
BD
51 *
52 * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
53 * * fixed spinlock call without pointer
54 * * ensure spinlock is initialised
a1365275
SH
55 */
56
57#include <linux/module.h>
58#include <linux/ioport.h>
59#include <linux/netdevice.h>
60#include <linux/etherdevice.h>
61#include <linux/init.h>
62#include <linux/skbuff.h>
a1365275
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63#include <linux/spinlock.h>
64#include <linux/crc32.h>
65#include <linux/mii.h>
66#include <linux/dm9000.h>
67#include <linux/delay.h>
d052d1be 68#include <linux/platform_device.h>
4e4fc05a 69#include <linux/irq.h>
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70
71#include <asm/delay.h>
72#include <asm/irq.h>
73#include <asm/io.h>
74
75#include "dm9000.h"
76
77/* Board/System/Debug information/definition ---------------- */
78
79#define DM9000_PHY 0x40 /* PHY address 0x01 */
80
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81#define CARDNAME "dm9000"
82#define PFX CARDNAME ": "
83
f40d24d9
AL
84#ifdef CONFIG_BLACKFIN
85#define readsb insb
86#define readsw insw
87#define readsl insl
88#define writesb outsb
89#define writesw outsw
90#define writesl outsl
1a5f1c4f 91#define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
f40d24d9 92#else
1a5f1c4f 93#define DEFAULT_TRIGGER (0)
f40d24d9
AL
94#endif
95
a1365275
SH
96/*
97 * Transmit timeout, default 5 seconds.
98 */
99static int watchdog = 5000;
100module_param(watchdog, int, 0400);
101MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
102
103/* Structure/enum declaration ------------------------------- */
104typedef struct board_info {
105
106 void __iomem *io_addr; /* Register I/O base address */
107 void __iomem *io_data; /* Data I/O address */
108 u16 irq; /* IRQ */
109
110 u16 tx_pkt_cnt;
111 u16 queue_pkt_len;
112 u16 queue_start_addr;
113 u16 dbug_cnt;
114 u8 io_mode; /* 0:word, 2:byte */
115 u8 phy_addr;
33ba5091 116 unsigned int flags;
a1365275 117
5b2b4ff0
BD
118 int debug_level;
119
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SH
120 void (*inblk)(void __iomem *port, void *data, int length);
121 void (*outblk)(void __iomem *port, void *data, int length);
122 void (*dumpblk)(void __iomem *port, int length);
123
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BD
124 struct device *dev; /* parent device */
125
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126 struct resource *addr_res; /* resources found */
127 struct resource *data_res;
128 struct resource *addr_req; /* resources requested */
129 struct resource *data_req;
130 struct resource *irq_res;
131
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132 unsigned char srom[128];
133 spinlock_t lock;
134
135 struct mii_if_info mii;
136 u32 msg_enable;
137} board_info_t;
138
5b2b4ff0
BD
139/* debug code */
140
141#define dm9000_dbg(db, lev, msg...) do { \
142 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
143 (lev) < db->debug_level) { \
144 dev_dbg(db->dev, msg); \
145 } \
146} while (0)
147
a1365275 148/* function declaration ------------------------------------- */
3ae5eaec 149static int dm9000_probe(struct platform_device *);
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150static int dm9000_open(struct net_device *);
151static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
152static int dm9000_stop(struct net_device *);
a1365275 153
a1365275
SH
154static void dm9000_init_dm9000(struct net_device *);
155
7d12e780 156static irqreturn_t dm9000_interrupt(int, void *);
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157
158static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
159static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
160 int value);
161static u16 read_srom_word(board_info_t *, int);
162static void dm9000_rx(struct net_device *);
163static void dm9000_hash_table(struct net_device *);
164
165//#define DM9000_PROGRAM_EEPROM
166#ifdef DM9000_PROGRAM_EEPROM
167static void program_eeprom(board_info_t * db);
168#endif
169/* DM9000 network board routine ---------------------------- */
170
171static void
172dm9000_reset(board_info_t * db)
173{
a76836f9
BD
174 dev_dbg(db->dev, "resetting device\n");
175
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SH
176 /* RESET device */
177 writeb(DM9000_NCR, db->io_addr);
178 udelay(200);
179 writeb(NCR_RST, db->io_data);
180 udelay(200);
181}
182
183/*
184 * Read a byte from I/O port
185 */
186static u8
187ior(board_info_t * db, int reg)
188{
189 writeb(reg, db->io_addr);
190 return readb(db->io_data);
191}
192
193/*
194 * Write a byte to I/O port
195 */
196
197static void
198iow(board_info_t * db, int reg, int value)
199{
200 writeb(reg, db->io_addr);
201 writeb(value, db->io_data);
202}
203
204/* routines for sending block to chip */
205
206static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
207{
208 writesb(reg, data, count);
209}
210
211static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
212{
213 writesw(reg, data, (count+1) >> 1);
214}
215
216static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
217{
218 writesl(reg, data, (count+3) >> 2);
219}
220
221/* input block from chip to memory */
222
223static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
224{
5f6b5517 225 readsb(reg, data, count);
a1365275
SH
226}
227
228
229static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
230{
231 readsw(reg, data, (count+1) >> 1);
232}
233
234static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
235{
236 readsl(reg, data, (count+3) >> 2);
237}
238
239/* dump block from chip to null */
240
241static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
242{
243 int i;
244 int tmp;
245
246 for (i = 0; i < count; i++)
247 tmp = readb(reg);
248}
249
250static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
251{
252 int i;
253 int tmp;
254
255 count = (count + 1) >> 1;
256
257 for (i = 0; i < count; i++)
258 tmp = readw(reg);
259}
260
261static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
262{
263 int i;
264 int tmp;
265
266 count = (count + 3) >> 2;
267
268 for (i = 0; i < count; i++)
269 tmp = readl(reg);
270}
271
272/* dm9000_set_io
273 *
274 * select the specified set of io routines to use with the
275 * device
276 */
277
278static void dm9000_set_io(struct board_info *db, int byte_width)
279{
280 /* use the size of the data resource to work out what IO
281 * routines we want to use
282 */
283
284 switch (byte_width) {
285 case 1:
286 db->dumpblk = dm9000_dumpblk_8bit;
287 db->outblk = dm9000_outblk_8bit;
288 db->inblk = dm9000_inblk_8bit;
289 break;
290
a1365275
SH
291
292 case 3:
a76836f9
BD
293 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
294 case 2:
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SH
295 db->dumpblk = dm9000_dumpblk_16bit;
296 db->outblk = dm9000_outblk_16bit;
297 db->inblk = dm9000_inblk_16bit;
298 break;
299
300 case 4:
301 default:
302 db->dumpblk = dm9000_dumpblk_32bit;
303 db->outblk = dm9000_outblk_32bit;
304 db->inblk = dm9000_inblk_32bit;
305 break;
306 }
307}
308
309
310/* Our watchdog timed out. Called by the networking layer */
311static void dm9000_timeout(struct net_device *dev)
312{
313 board_info_t *db = (board_info_t *) dev->priv;
314 u8 reg_save;
315 unsigned long flags;
316
317 /* Save previous register address */
318 reg_save = readb(db->io_addr);
9ef9ac51 319 spin_lock_irqsave(&db->lock,flags);
a1365275
SH
320
321 netif_stop_queue(dev);
322 dm9000_reset(db);
323 dm9000_init_dm9000(dev);
324 /* We can accept TX packets again */
325 dev->trans_start = jiffies;
326 netif_wake_queue(dev);
327
328 /* Restore previous register address */
329 writeb(reg_save, db->io_addr);
9ef9ac51 330 spin_unlock_irqrestore(&db->lock,flags);
a1365275
SH
331}
332
2fd0e33f
KH
333#ifdef CONFIG_NET_POLL_CONTROLLER
334/*
335 *Used by netconsole
336 */
337static void dm9000_poll_controller(struct net_device *dev)
338{
339 disable_irq(dev->irq);
28431146 340 dm9000_interrupt(dev->irq,dev);
2fd0e33f
KH
341 enable_irq(dev->irq);
342}
343#endif
a1365275
SH
344
345/* dm9000_release_board
346 *
347 * release a board, and any mapped resources
348 */
349
350static void
351dm9000_release_board(struct platform_device *pdev, struct board_info *db)
352{
353 if (db->data_res == NULL) {
354 if (db->addr_res != NULL)
355 release_mem_region((unsigned long)db->io_addr, 4);
356 return;
357 }
358
359 /* unmap our resources */
360
361 iounmap(db->io_addr);
362 iounmap(db->io_data);
363
364 /* release the resources */
365
366 if (db->data_req != NULL) {
367 release_resource(db->data_req);
368 kfree(db->data_req);
369 }
370
51985487
DO
371 if (db->addr_req != NULL) {
372 release_resource(db->addr_req);
a1365275
SH
373 kfree(db->addr_req);
374 }
375}
376
377#define res_size(_r) (((_r)->end - (_r)->start) + 1)
378
379/*
380 * Search DM9000 board, allocate space and register it
381 */
382static int
3ae5eaec 383dm9000_probe(struct platform_device *pdev)
a1365275 384{
a1365275
SH
385 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
386 struct board_info *db; /* Point a board information structure */
387 struct net_device *ndev;
388 unsigned long base;
389 int ret = 0;
390 int iosize;
391 int i;
392 u32 id_val;
393
a1365275
SH
394 /* Init network device */
395 ndev = alloc_etherdev(sizeof (struct board_info));
396 if (!ndev) {
a76836f9 397 dev_err(&pdev->dev, "could not allocate device.\n");
a1365275
SH
398 return -ENOMEM;
399 }
400
3ae5eaec 401 SET_NETDEV_DEV(ndev, &pdev->dev);
a1365275 402
a76836f9 403 dev_dbg(&pdev->dev, "dm9000_probe()");
a1365275
SH
404
405 /* setup board info structure */
406 db = (struct board_info *) ndev->priv;
407 memset(db, 0, sizeof (*db));
408
a76836f9
BD
409 db->dev = &pdev->dev;
410
9ef9ac51
BD
411 spin_lock_init(&db->lock);
412
a1365275
SH
413 if (pdev->num_resources < 2) {
414 ret = -ENODEV;
415 goto out;
b4ed03ff 416 } else if (pdev->num_resources == 2) {
a1365275
SH
417 base = pdev->resource[0].start;
418
419 if (!request_mem_region(base, 4, ndev->name)) {
420 ret = -EBUSY;
421 goto out;
422 }
423
424 ndev->base_addr = base;
425 ndev->irq = pdev->resource[1].start;
b4ed03ff
BD
426 db->io_addr = (void __iomem *)base;
427 db->io_data = (void __iomem *)(base + 4);
a1365275 428
f40d24d9
AL
429 /* ensure at least we have a default set of IO routines */
430 dm9000_set_io(db, 2);
431
b4ed03ff 432 } else {
a1365275
SH
433 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
434 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
435 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
436
b4ed03ff
BD
437 if (db->addr_res == NULL || db->data_res == NULL ||
438 db->irq_res == NULL) {
a76836f9 439 dev_err(db->dev, "insufficient resources\n");
a1365275
SH
440 ret = -ENOENT;
441 goto out;
442 }
443
444 i = res_size(db->addr_res);
445 db->addr_req = request_mem_region(db->addr_res->start, i,
446 pdev->name);
447
448 if (db->addr_req == NULL) {
a76836f9 449 dev_err(db->dev, "cannot claim address reg area\n");
a1365275
SH
450 ret = -EIO;
451 goto out;
452 }
453
454 db->io_addr = ioremap(db->addr_res->start, i);
455
456 if (db->io_addr == NULL) {
a76836f9 457 dev_err(db->dev, "failed to ioremap address reg\n");
a1365275
SH
458 ret = -EINVAL;
459 goto out;
460 }
461
462 iosize = res_size(db->data_res);
463 db->data_req = request_mem_region(db->data_res->start, iosize,
464 pdev->name);
465
466 if (db->data_req == NULL) {
a76836f9 467 dev_err(db->dev, "cannot claim data reg area\n");
a1365275
SH
468 ret = -EIO;
469 goto out;
470 }
471
472 db->io_data = ioremap(db->data_res->start, iosize);
473
474 if (db->io_data == NULL) {
a76836f9 475 dev_err(db->dev,"failed to ioremap data reg\n");
a1365275
SH
476 ret = -EINVAL;
477 goto out;
478 }
479
480 /* fill in parameters for net-dev structure */
481
482 ndev->base_addr = (unsigned long)db->io_addr;
483 ndev->irq = db->irq_res->start;
484
485 /* ensure at least we have a default set of IO routines */
486 dm9000_set_io(db, iosize);
a1365275
SH
487 }
488
489 /* check to see if anything is being over-ridden */
490 if (pdata != NULL) {
491 /* check to see if the driver wants to over-ride the
492 * default IO width */
493
494 if (pdata->flags & DM9000_PLATF_8BITONLY)
495 dm9000_set_io(db, 1);
496
497 if (pdata->flags & DM9000_PLATF_16BITONLY)
498 dm9000_set_io(db, 2);
499
500 if (pdata->flags & DM9000_PLATF_32BITONLY)
501 dm9000_set_io(db, 4);
502
503 /* check to see if there are any IO routine
504 * over-rides */
505
506 if (pdata->inblk != NULL)
507 db->inblk = pdata->inblk;
508
509 if (pdata->outblk != NULL)
510 db->outblk = pdata->outblk;
511
512 if (pdata->dumpblk != NULL)
513 db->dumpblk = pdata->dumpblk;
33ba5091
BD
514
515 db->flags = pdata->flags;
a1365275
SH
516 }
517
518 dm9000_reset(db);
519
520 /* try two times, DM9000 sometimes gets the first read wrong */
521 for (i = 0; i < 2; i++) {
522 id_val = ior(db, DM9000_VIDL);
523 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
524 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
525 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
526
527 if (id_val == DM9000_ID)
528 break;
a76836f9 529 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
a1365275
SH
530 }
531
532 if (id_val != DM9000_ID) {
a76836f9 533 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
418d6f87
MR
534 ret = -ENODEV;
535 goto out;
a1365275
SH
536 }
537
538 /* from this point we assume that we have found a DM9000 */
539
540 /* driver system function */
541 ether_setup(ndev);
542
543 ndev->open = &dm9000_open;
544 ndev->hard_start_xmit = &dm9000_start_xmit;
545 ndev->tx_timeout = &dm9000_timeout;
546 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
547 ndev->stop = &dm9000_stop;
a1365275 548 ndev->set_multicast_list = &dm9000_hash_table;
2fd0e33f
KH
549#ifdef CONFIG_NET_POLL_CONTROLLER
550 ndev->poll_controller = &dm9000_poll_controller;
551#endif
a1365275
SH
552
553#ifdef DM9000_PROGRAM_EEPROM
554 program_eeprom(db);
555#endif
556 db->msg_enable = NETIF_MSG_LINK;
557 db->mii.phy_id_mask = 0x1f;
558 db->mii.reg_num_mask = 0x1f;
559 db->mii.force_media = 0;
560 db->mii.full_duplex = 0;
561 db->mii.dev = ndev;
562 db->mii.mdio_read = dm9000_phy_read;
563 db->mii.mdio_write = dm9000_phy_write;
564
565 /* Read SROM content */
566 for (i = 0; i < 64; i++)
567 ((u16 *) db->srom)[i] = read_srom_word(db, i);
568
569 /* Set Node Address */
570 for (i = 0; i < 6; i++)
571 ndev->dev_addr[i] = db->srom[i];
572
5b55dda6
BD
573 if (!is_valid_ether_addr(ndev->dev_addr)) {
574 /* try reading from mac */
575
576 for (i = 0; i < 6; i++)
577 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
578 }
579
a1365275 580 if (!is_valid_ether_addr(ndev->dev_addr))
a76836f9
BD
581 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
582 "set using ifconfig\n", ndev->name);
a1365275 583
3ae5eaec 584 platform_set_drvdata(pdev, ndev);
a1365275
SH
585 ret = register_netdev(ndev);
586
587 if (ret == 0) {
0795af57
JP
588 DECLARE_MAC_BUF(mac);
589 printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n",
590 ndev->name, db->io_addr, db->io_data, ndev->irq,
591 print_mac(mac, ndev->dev_addr));
a1365275
SH
592 }
593 return 0;
594
418d6f87 595out:
a76836f9 596 dev_err(db->dev, "not found (%d).\n", ret);
a1365275
SH
597
598 dm9000_release_board(pdev, db);
9fd9f9b6 599 free_netdev(ndev);
a1365275
SH
600
601 return ret;
602}
603
604/*
605 * Open the interface.
606 * The interface is opened whenever "ifconfig" actives it.
607 */
608static int
609dm9000_open(struct net_device *dev)
610{
611 board_info_t *db = (board_info_t *) dev->priv;
1a5f1c4f 612 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
a1365275 613
a76836f9 614 dev_dbg(db->dev, "entering %s\n", __func__);
a1365275 615
1a5f1c4f
BD
616 /* If there is no IRQ type specified, default to something that
617 * may work, and tell the user that this is a problem */
618
619 if (irqflags == IRQF_TRIGGER_NONE) {
620 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
621 irqflags = DEFAULT_TRIGGER;
622 }
623
624 irqflags |= IRQF_SHARED;
625
626 if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
a1365275
SH
627 return -EAGAIN;
628
629 /* Initialize DM9000 board */
630 dm9000_reset(db);
631 dm9000_init_dm9000(dev);
632
633 /* Init driver variable */
634 db->dbug_cnt = 0;
635
a1365275
SH
636 mii_check_media(&db->mii, netif_msg_link(db), 1);
637 netif_start_queue(dev);
638
639 return 0;
640}
641
642/*
643 * Initilize dm9000 board
644 */
645static void
646dm9000_init_dm9000(struct net_device *dev)
647{
648 board_info_t *db = (board_info_t *) dev->priv;
649
5b2b4ff0 650 dm9000_dbg(db, 1, "entering %s\n", __func__);
a1365275
SH
651
652 /* I/O mode */
653 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
654
655 /* GPIO0 on pre-activate PHY */
656 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
657 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
658 iow(db, DM9000_GPR, 0); /* Enable PHY */
659
33ba5091
BD
660 if (db->flags & DM9000_PLATF_EXT_PHY)
661 iow(db, DM9000_NCR, NCR_EXT_PHY);
662
a1365275
SH
663 /* Program operating register */
664 iow(db, DM9000_TCR, 0); /* TX Polling clear */
665 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
666 iow(db, DM9000_FCR, 0xff); /* Flow Control */
667 iow(db, DM9000_SMCR, 0); /* Special Mode */
668 /* clear TX status */
669 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
670 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
671
672 /* Set address filter table */
673 dm9000_hash_table(dev);
674
675 /* Activate DM9000 */
676 iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
677 /* Enable TX/RX interrupt mask */
678 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
679
680 /* Init Driver variable */
681 db->tx_pkt_cnt = 0;
682 db->queue_pkt_len = 0;
683 dev->trans_start = 0;
a1365275
SH
684}
685
686/*
687 * Hardware start transmission.
688 * Send a packet to media from the upper layer.
689 */
690static int
691dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
692{
c46ac946 693 unsigned long flags;
a1365275
SH
694 board_info_t *db = (board_info_t *) dev->priv;
695
5b2b4ff0 696 dm9000_dbg(db, 3, "%s:\n", __func__);
a1365275
SH
697
698 if (db->tx_pkt_cnt > 1)
699 return 1;
700
c46ac946 701 spin_lock_irqsave(&db->lock, flags);
a1365275
SH
702
703 /* Move data to DM9000 TX RAM */
704 writeb(DM9000_MWCMD, db->io_addr);
705
706 (db->outblk)(db->io_data, skb->data, skb->len);
09f75cd7 707 dev->stats.tx_bytes += skb->len;
a1365275 708
c46ac946 709 db->tx_pkt_cnt++;
a1365275 710 /* TX control: First packet immediately send, second packet queue */
c46ac946 711 if (db->tx_pkt_cnt == 1) {
a1365275
SH
712 /* Set TX length to DM9000 */
713 iow(db, DM9000_TXPLL, skb->len & 0xff);
714 iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
715
716 /* Issue TX polling command */
717 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
718
719 dev->trans_start = jiffies; /* save the time stamp */
a1365275
SH
720 } else {
721 /* Second packet */
a1365275 722 db->queue_pkt_len = skb->len;
c46ac946 723 netif_stop_queue(dev);
a1365275
SH
724 }
725
c46ac946
FW
726 spin_unlock_irqrestore(&db->lock, flags);
727
a1365275
SH
728 /* free this SKB */
729 dev_kfree_skb(skb);
730
a1365275
SH
731 return 0;
732}
733
734static void
735dm9000_shutdown(struct net_device *dev)
736{
737 board_info_t *db = (board_info_t *) dev->priv;
738
739 /* RESET device */
740 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
741 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
742 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
743 iow(db, DM9000_RCR, 0x00); /* Disable RX */
744}
745
746/*
747 * Stop the interface.
748 * The interface is stopped when it is brought.
749 */
750static int
751dm9000_stop(struct net_device *ndev)
752{
753 board_info_t *db = (board_info_t *) ndev->priv;
754
5b2b4ff0 755 dm9000_dbg(db, 1, "entering %s\n", __func__);
a1365275 756
a1365275
SH
757 netif_stop_queue(ndev);
758 netif_carrier_off(ndev);
759
760 /* free interrupt */
761 free_irq(ndev->irq, ndev);
762
763 dm9000_shutdown(ndev);
764
765 return 0;
766}
767
768/*
769 * DM9000 interrupt handler
770 * receive the packet to upper layer, free the transmitted packet
771 */
772
5d22a312 773static void
a1365275
SH
774dm9000_tx_done(struct net_device *dev, board_info_t * db)
775{
776 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
777
778 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
779 /* One packet sent complete */
780 db->tx_pkt_cnt--;
09f75cd7 781 dev->stats.tx_packets++;
a1365275
SH
782
783 /* Queue packet check & send */
784 if (db->tx_pkt_cnt > 0) {
785 iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
786 iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
787 iow(db, DM9000_TCR, TCR_TXREQ);
788 dev->trans_start = jiffies;
789 }
790 netif_wake_queue(dev);
791 }
792}
793
794static irqreturn_t
7d12e780 795dm9000_interrupt(int irq, void *dev_id)
a1365275
SH
796{
797 struct net_device *dev = dev_id;
5b2b4ff0 798 board_info_t *db = (board_info_t *) dev->priv;
a1365275
SH
799 int int_status;
800 u8 reg_save;
801
5b2b4ff0 802 dm9000_dbg(db, 3, "entering %s\n", __func__);
a1365275
SH
803
804 /* A real interrupt coming */
5b2b4ff0 805
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SH
806 spin_lock(&db->lock);
807
808 /* Save previous register address */
809 reg_save = readb(db->io_addr);
810
811 /* Disable all interrupts */
812 iow(db, DM9000_IMR, IMR_PAR);
813
814 /* Got DM9000 interrupt status */
815 int_status = ior(db, DM9000_ISR); /* Got ISR */
816 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
817
818 /* Received the coming packet */
819 if (int_status & ISR_PRS)
820 dm9000_rx(dev);
821
822 /* Trnasmit Interrupt check */
823 if (int_status & ISR_PTS)
824 dm9000_tx_done(dev, db);
825
826 /* Re-enable interrupt mask */
827 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
828
829 /* Restore previous register address */
830 writeb(reg_save, db->io_addr);
831
832 spin_unlock(&db->lock);
833
834 return IRQ_HANDLED;
835}
836
a1365275 837struct dm9000_rxhdr {
93116573
BD
838 u8 RxPktReady;
839 u8 RxStatus;
a1365275
SH
840 u16 RxLen;
841} __attribute__((__packed__));
842
843/*
844 * Received a packet and pass to upper layer
845 */
846static void
847dm9000_rx(struct net_device *dev)
848{
849 board_info_t *db = (board_info_t *) dev->priv;
850 struct dm9000_rxhdr rxhdr;
851 struct sk_buff *skb;
852 u8 rxbyte, *rdptr;
6478fac6 853 bool GoodPacket;
a1365275
SH
854 int RxLen;
855
856 /* Check packet ready or not */
857 do {
858 ior(db, DM9000_MRCMDX); /* Dummy read */
859
860 /* Get most updated data */
861 rxbyte = readb(db->io_data);
862
863 /* Status check: this byte must be 0 or 1 */
864 if (rxbyte > DM9000_PKT_RDY) {
a76836f9 865 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
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SH
866 iow(db, DM9000_RCR, 0x00); /* Stop Device */
867 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
868 return;
869 }
870
871 if (rxbyte != DM9000_PKT_RDY)
872 return;
873
874 /* A packet ready now & Get status/length */
6478fac6 875 GoodPacket = true;
a1365275
SH
876 writeb(DM9000_MRCMD, db->io_addr);
877
878 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
879
93116573 880 RxLen = le16_to_cpu(rxhdr.RxLen);
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SH
881
882 /* Packet Status check */
883 if (RxLen < 0x40) {
6478fac6 884 GoodPacket = false;
a76836f9 885 dev_dbg(db->dev, "Bad Packet received (runt)\n");
a1365275
SH
886 }
887
888 if (RxLen > DM9000_PKT_MAX) {
a76836f9 889 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
a1365275
SH
890 }
891
93116573 892 if (rxhdr.RxStatus & 0xbf) {
6478fac6 893 GoodPacket = false;
93116573 894 if (rxhdr.RxStatus & 0x01) {
a76836f9 895 dev_dbg(db->dev, "fifo error\n");
09f75cd7 896 dev->stats.rx_fifo_errors++;
a1365275 897 }
93116573 898 if (rxhdr.RxStatus & 0x02) {
a76836f9 899 dev_dbg(db->dev, "crc error\n");
09f75cd7 900 dev->stats.rx_crc_errors++;
a1365275 901 }
93116573 902 if (rxhdr.RxStatus & 0x80) {
a76836f9 903 dev_dbg(db->dev, "length error\n");
09f75cd7 904 dev->stats.rx_length_errors++;
a1365275
SH
905 }
906 }
907
908 /* Move data from DM9000 */
909 if (GoodPacket
910 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
a1365275
SH
911 skb_reserve(skb, 2);
912 rdptr = (u8 *) skb_put(skb, RxLen - 4);
913
914 /* Read received packet from RX SRAM */
915
916 (db->inblk)(db->io_data, rdptr, RxLen);
09f75cd7 917 dev->stats.rx_bytes += RxLen;
a1365275
SH
918
919 /* Pass to upper layer */
920 skb->protocol = eth_type_trans(skb, dev);
921 netif_rx(skb);
09f75cd7 922 dev->stats.rx_packets++;
a1365275
SH
923
924 } else {
925 /* need to dump the packet's data */
926
927 (db->dumpblk)(db->io_data, RxLen);
928 }
929 } while (rxbyte == DM9000_PKT_RDY);
930}
931
932/*
933 * Read a word data from SROM
934 */
935static u16
936read_srom_word(board_info_t * db, int offset)
937{
938 iow(db, DM9000_EPAR, offset);
939 iow(db, DM9000_EPCR, EPCR_ERPRR);
940 mdelay(8); /* according to the datasheet 200us should be enough,
941 but it doesn't work */
942 iow(db, DM9000_EPCR, 0x0);
943 return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
944}
945
946#ifdef DM9000_PROGRAM_EEPROM
947/*
948 * Write a word data to SROM
949 */
950static void
951write_srom_word(board_info_t * db, int offset, u16 val)
952{
953 iow(db, DM9000_EPAR, offset);
954 iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
955 iow(db, DM9000_EPDRL, (val & 0xff));
956 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
957 mdelay(8); /* same shit */
958 iow(db, DM9000_EPCR, 0);
959}
960
961/*
962 * Only for development:
963 * Here we write static data to the eeprom in case
964 * we don't have valid content on a new board
965 */
966static void
967program_eeprom(board_info_t * db)
968{
969 u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
970 0x0000, /* Autoload: accept nothing */
971 0x0a46, 0x9000, /* Vendor / Product ID */
972 0x0000, /* pin control */
973 0x0000,
974 }; /* Wake-up mode control */
975 int i;
976 for (i = 0; i < 8; i++)
977 write_srom_word(db, i, eeprom[i]);
978}
979#endif
980
981
982/*
983 * Calculate the CRC valude of the Rx packet
984 * flag = 1 : return the reverse CRC (for the received packet CRC)
985 * 0 : return the normal CRC (for Hash Table index)
986 */
987
988static unsigned long
989cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
990{
991
992 u32 crc = ether_crc_le(Len, Data);
993
994 if (flag)
995 return ~crc;
996
997 return crc;
998}
999
1000/*
1001 * Set DM9000 multicast address
1002 */
1003static void
1004dm9000_hash_table(struct net_device *dev)
1005{
1006 board_info_t *db = (board_info_t *) dev->priv;
1007 struct dev_mc_list *mcptr = dev->mc_list;
1008 int mc_cnt = dev->mc_count;
1009 u32 hash_val;
1010 u16 i, oft, hash_table[4];
1011 unsigned long flags;
1012
5b2b4ff0 1013 dm9000_dbg(db, 1, "entering %s\n", __func__);
a1365275
SH
1014
1015 spin_lock_irqsave(&db->lock,flags);
1016
1017 for (i = 0, oft = 0x10; i < 6; i++, oft++)
1018 iow(db, oft, dev->dev_addr[i]);
1019
1020 /* Clear Hash Table */
1021 for (i = 0; i < 4; i++)
1022 hash_table[i] = 0x0;
1023
1024 /* broadcast address */
1025 hash_table[3] = 0x8000;
1026
1027 /* the multicast address in Hash Table : 64 bits */
1028 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1029 hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
1030 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
1031 }
1032
1033 /* Write the hash table to MAC MD table */
1034 for (i = 0, oft = 0x16; i < 4; i++) {
1035 iow(db, oft++, hash_table[i] & 0xff);
1036 iow(db, oft++, (hash_table[i] >> 8) & 0xff);
1037 }
1038
1039 spin_unlock_irqrestore(&db->lock,flags);
1040}
1041
1042
1043/*
1044 * Read a word from phyxcer
1045 */
1046static int
1047dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1048{
1049 board_info_t *db = (board_info_t *) dev->priv;
1050 unsigned long flags;
9ef9ac51 1051 unsigned int reg_save;
a1365275
SH
1052 int ret;
1053
1054 spin_lock_irqsave(&db->lock,flags);
9ef9ac51
BD
1055
1056 /* Save previous register address */
1057 reg_save = readb(db->io_addr);
1058
a1365275
SH
1059 /* Fill the phyxcer register into REG_0C */
1060 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1061
1062 iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
1063 udelay(100); /* Wait read complete */
1064 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1065
1066 /* The read data keeps on REG_0D & REG_0E */
1067 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1068
9ef9ac51
BD
1069 /* restore the previous address */
1070 writeb(reg_save, db->io_addr);
1071
a1365275
SH
1072 spin_unlock_irqrestore(&db->lock,flags);
1073
1074 return ret;
1075}
1076
1077/*
1078 * Write a word to phyxcer
1079 */
1080static void
1081dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
1082{
1083 board_info_t *db = (board_info_t *) dev->priv;
1084 unsigned long flags;
9ef9ac51 1085 unsigned long reg_save;
a1365275
SH
1086
1087 spin_lock_irqsave(&db->lock,flags);
1088
9ef9ac51
BD
1089 /* Save previous register address */
1090 reg_save = readb(db->io_addr);
1091
a1365275
SH
1092 /* Fill the phyxcer register into REG_0C */
1093 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1094
1095 /* Fill the written data into REG_0D & REG_0E */
1096 iow(db, DM9000_EPDRL, (value & 0xff));
1097 iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
1098
1099 iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
1100 udelay(500); /* Wait write complete */
1101 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1102
9ef9ac51
BD
1103 /* restore the previous address */
1104 writeb(reg_save, db->io_addr);
1105
a1365275
SH
1106 spin_unlock_irqrestore(&db->lock,flags);
1107}
1108
1109static int
3ae5eaec 1110dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
a1365275 1111{
3ae5eaec 1112 struct net_device *ndev = platform_get_drvdata(dev);
a1365275 1113
9480e307 1114 if (ndev) {
a1365275
SH
1115 if (netif_running(ndev)) {
1116 netif_device_detach(ndev);
1117 dm9000_shutdown(ndev);
1118 }
1119 }
1120 return 0;
1121}
1122
1123static int
3ae5eaec 1124dm9000_drv_resume(struct platform_device *dev)
a1365275 1125{
3ae5eaec 1126 struct net_device *ndev = platform_get_drvdata(dev);
a1365275
SH
1127 board_info_t *db = (board_info_t *) ndev->priv;
1128
9480e307 1129 if (ndev) {
a1365275
SH
1130
1131 if (netif_running(ndev)) {
1132 dm9000_reset(db);
1133 dm9000_init_dm9000(ndev);
1134
1135 netif_device_attach(ndev);
1136 }
1137 }
1138 return 0;
1139}
1140
1141static int
3ae5eaec 1142dm9000_drv_remove(struct platform_device *pdev)
a1365275 1143{
3ae5eaec 1144 struct net_device *ndev = platform_get_drvdata(pdev);
a1365275 1145
3ae5eaec 1146 platform_set_drvdata(pdev, NULL);
a1365275
SH
1147
1148 unregister_netdev(ndev);
1149 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
9fd9f9b6 1150 free_netdev(ndev); /* free device structure */
a1365275 1151
a76836f9 1152 dev_dbg(&pdev->dev, "released and freed device\n");
a1365275
SH
1153 return 0;
1154}
1155
3ae5eaec 1156static struct platform_driver dm9000_driver = {
5d22a312
BD
1157 .driver = {
1158 .name = "dm9000",
1159 .owner = THIS_MODULE,
1160 },
a1365275
SH
1161 .probe = dm9000_probe,
1162 .remove = dm9000_drv_remove,
1163 .suspend = dm9000_drv_suspend,
1164 .resume = dm9000_drv_resume,
1165};
1166
1167static int __init
1168dm9000_init(void)
1169{
2ae2d77c
BD
1170 printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
1171
3ae5eaec 1172 return platform_driver_register(&dm9000_driver); /* search board and register */
a1365275
SH
1173}
1174
1175static void __exit
1176dm9000_cleanup(void)
1177{
3ae5eaec 1178 platform_driver_unregister(&dm9000_driver);
a1365275
SH
1179}
1180
1181module_init(dm9000_init);
1182module_exit(dm9000_cleanup);
1183
1184MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1185MODULE_DESCRIPTION("Davicom DM9000 network driver");
1186MODULE_LICENSE("GPL");