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3ad50cca GR |
1 | /* |
2 | * net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support | |
3 | * | |
4 | * Copyright (c) 2014 Guenter Roeck | |
5 | * | |
6 | * Derived from mv88e6123_61_65.c | |
7 | * Copyright (c) 2008-2009 Marvell Semiconductor | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | */ | |
14 | ||
15 | #include <linux/delay.h> | |
16 | #include <linux/jiffies.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/netdevice.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/phy.h> | |
22 | #include <net/dsa.h> | |
23 | #include "mv88e6xxx.h" | |
24 | ||
f6271e67 VD |
25 | static const struct mv88e6xxx_info mv88e6352_table[] = { |
26 | { | |
27 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6320, | |
22356476 | 28 | .family = MV88E6XXX_FAMILY_6320, |
f6271e67 | 29 | .name = "Marvell 88E6320", |
cd5a2c82 | 30 | .num_databases = 4096, |
009a2b98 | 31 | .num_ports = 7, |
b5058d7a | 32 | .flags = MV88E6XXX_FLAGS_FAMILY_6320, |
f6271e67 VD |
33 | }, { |
34 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6321, | |
22356476 | 35 | .family = MV88E6XXX_FAMILY_6320, |
f6271e67 | 36 | .name = "Marvell 88E6321", |
cd5a2c82 | 37 | .num_databases = 4096, |
009a2b98 | 38 | .num_ports = 7, |
b5058d7a | 39 | .flags = MV88E6XXX_FLAGS_FAMILY_6320, |
f6271e67 VD |
40 | }, { |
41 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6172, | |
22356476 | 42 | .family = MV88E6XXX_FAMILY_6352, |
f6271e67 | 43 | .name = "Marvell 88E6172", |
cd5a2c82 | 44 | .num_databases = 4096, |
009a2b98 | 45 | .num_ports = 7, |
b5058d7a | 46 | .flags = MV88E6XXX_FLAGS_FAMILY_6352, |
f6271e67 VD |
47 | }, { |
48 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6176, | |
22356476 | 49 | .family = MV88E6XXX_FAMILY_6352, |
f6271e67 | 50 | .name = "Marvell 88E6176", |
cd5a2c82 | 51 | .num_databases = 4096, |
009a2b98 | 52 | .num_ports = 7, |
b5058d7a | 53 | .flags = MV88E6XXX_FLAGS_FAMILY_6352, |
f6271e67 VD |
54 | }, { |
55 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6240, | |
22356476 | 56 | .family = MV88E6XXX_FAMILY_6352, |
f6271e67 | 57 | .name = "Marvell 88E6240", |
cd5a2c82 | 58 | .num_databases = 4096, |
009a2b98 | 59 | .num_ports = 7, |
b5058d7a | 60 | .flags = MV88E6XXX_FLAGS_FAMILY_6352, |
f6271e67 VD |
61 | }, { |
62 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6352, | |
22356476 | 63 | .family = MV88E6XXX_FAMILY_6352, |
f6271e67 | 64 | .name = "Marvell 88E6352", |
cd5a2c82 | 65 | .num_databases = 4096, |
009a2b98 | 66 | .num_ports = 7, |
b5058d7a | 67 | .flags = MV88E6XXX_FLAGS_FAMILY_6352, |
f6271e67 | 68 | } |
b9b37713 VD |
69 | }; |
70 | ||
0209d144 VD |
71 | static const char *mv88e6352_drv_probe(struct device *dsa_dev, |
72 | struct device *host_dev, int sw_addr, | |
73 | void **priv) | |
3ad50cca | 74 | { |
a77d43f1 AL |
75 | return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv, |
76 | mv88e6352_table, | |
77 | ARRAY_SIZE(mv88e6352_table)); | |
3ad50cca GR |
78 | } |
79 | ||
3ad50cca GR |
80 | static int mv88e6352_setup_global(struct dsa_switch *ds) |
81 | { | |
158bc065 | 82 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); |
15966a2a | 83 | u32 upstream_port = dsa_upstream_port(ds); |
3ad50cca | 84 | int ret; |
15966a2a | 85 | u32 reg; |
54d792f2 | 86 | |
3ad50cca GR |
87 | /* Discard packets with excessive collisions, |
88 | * mask all interrupt sources, enable PPU (bit 14, undocumented). | |
89 | */ | |
158bc065 | 90 | ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL, |
48ace4ef AL |
91 | GLOBAL_CONTROL_PPU_ENABLE | |
92 | GLOBAL_CONTROL_DISCARD_EXCESS); | |
93 | if (ret) | |
94 | return ret; | |
3ad50cca | 95 | |
3ad50cca GR |
96 | /* Configure the upstream port, and configure the upstream |
97 | * port as the port to which ingress and egress monitor frames | |
98 | * are to be sent. | |
99 | */ | |
15966a2a AL |
100 | reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT | |
101 | upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT | | |
102 | upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT; | |
158bc065 | 103 | ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg); |
48ace4ef AL |
104 | if (ret) |
105 | return ret; | |
3ad50cca GR |
106 | |
107 | /* Disable remote management for now, and set the switch's | |
108 | * DSA device number. | |
109 | */ | |
158bc065 | 110 | return mv88e6xxx_reg_write(ps, REG_GLOBAL, 0x1c, ds->index & 0x1f); |
3ad50cca GR |
111 | } |
112 | ||
3ad50cca GR |
113 | static int mv88e6352_setup(struct dsa_switch *ds) |
114 | { | |
115 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); | |
116 | int ret; | |
3ad50cca | 117 | |
158bc065 AL |
118 | ps->ds = ds; |
119 | ||
120 | ret = mv88e6xxx_setup_common(ps); | |
acdaffcc GR |
121 | if (ret < 0) |
122 | return ret; | |
123 | ||
3ad50cca GR |
124 | ret = mv88e6352_setup_global(ds); |
125 | if (ret < 0) | |
126 | return ret; | |
127 | ||
dbde9e66 | 128 | return mv88e6xxx_setup_ports(ds); |
3ad50cca GR |
129 | } |
130 | ||
3ad50cca GR |
131 | struct dsa_switch_driver mv88e6352_switch_driver = { |
132 | .tag_protocol = DSA_TAG_PROTO_EDSA, | |
e49bad31 | 133 | .probe = mv88e6352_drv_probe, |
3ad50cca | 134 | .setup = mv88e6352_setup, |
1d13a06e | 135 | .set_addr = mv88e6xxx_set_addr, |
6d5834a1 VD |
136 | .phy_read = mv88e6xxx_phy_read, |
137 | .phy_write = mv88e6xxx_phy_write, | |
e413e7e1 AL |
138 | .get_strings = mv88e6xxx_get_strings, |
139 | .get_ethtool_stats = mv88e6xxx_get_ethtool_stats, | |
140 | .get_sset_count = mv88e6xxx_get_sset_count, | |
dea87024 | 141 | .adjust_link = mv88e6xxx_adjust_link, |
04b0a80b GR |
142 | .set_eee = mv88e6xxx_set_eee, |
143 | .get_eee = mv88e6xxx_get_eee, | |
276db3b1 | 144 | #ifdef CONFIG_NET_DSA_HWMON |
c22995c5 GR |
145 | .get_temp = mv88e6xxx_get_temp, |
146 | .get_temp_limit = mv88e6xxx_get_temp_limit, | |
147 | .set_temp_limit = mv88e6xxx_set_temp_limit, | |
148 | .get_temp_alarm = mv88e6xxx_get_temp_alarm, | |
276db3b1 | 149 | #endif |
d24645be VD |
150 | .get_eeprom = mv88e6xxx_get_eeprom, |
151 | .set_eeprom = mv88e6xxx_set_eeprom, | |
95d08b5a GR |
152 | .get_regs_len = mv88e6xxx_get_regs_len, |
153 | .get_regs = mv88e6xxx_get_regs, | |
71327a4e VD |
154 | .port_bridge_join = mv88e6xxx_port_bridge_join, |
155 | .port_bridge_leave = mv88e6xxx_port_bridge_leave, | |
43c44a9f | 156 | .port_stp_state_set = mv88e6xxx_port_stp_state_set, |
214cdb99 | 157 | .port_vlan_filtering = mv88e6xxx_port_vlan_filtering, |
76e398a6 | 158 | .port_vlan_prepare = mv88e6xxx_port_vlan_prepare, |
0d3b33e6 | 159 | .port_vlan_add = mv88e6xxx_port_vlan_add, |
7dad08d7 | 160 | .port_vlan_del = mv88e6xxx_port_vlan_del, |
ceff5eff | 161 | .port_vlan_dump = mv88e6xxx_port_vlan_dump, |
146a3206 | 162 | .port_fdb_prepare = mv88e6xxx_port_fdb_prepare, |
2a778e1b VD |
163 | .port_fdb_add = mv88e6xxx_port_fdb_add, |
164 | .port_fdb_del = mv88e6xxx_port_fdb_del, | |
f33475bd | 165 | .port_fdb_dump = mv88e6xxx_port_fdb_dump, |
3ad50cca GR |
166 | }; |
167 | ||
1636d883 | 168 | MODULE_ALIAS("platform:mv88e6172"); |
7c3d0d67 AK |
169 | MODULE_ALIAS("platform:mv88e6176"); |
170 | MODULE_ALIAS("platform:mv88e6320"); | |
171 | MODULE_ALIAS("platform:mv88e6321"); | |
172 | MODULE_ALIAS("platform:mv88e6352"); |