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10fa5bfc AL |
1 | /* |
2 | * Marvell 88e6xxx Ethernet switch PHY and PPU support | |
3 | * | |
4 | * Copyright (c) 2008 Marvell Semiconductor | |
5 | * | |
6 | * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/mdio.h> | |
15 | #include <linux/module.h> | |
16 | #include <net/dsa.h> | |
17 | ||
18 | #include "mv88e6xxx.h" | |
19 | #include "phy.h" | |
20 | ||
21 | int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, | |
22 | int addr, int reg, u16 *val) | |
23 | { | |
24 | return mv88e6xxx_read(chip, addr, reg, val); | |
25 | } | |
26 | ||
27 | int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, | |
28 | int addr, int reg, u16 val) | |
29 | { | |
30 | return mv88e6xxx_write(chip, addr, reg, val); | |
31 | } | |
32 | ||
33 | int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val) | |
34 | { | |
35 | int addr = phy; /* PHY devices addresses start at 0x0 */ | |
36 | struct mii_bus *bus; | |
37 | ||
38 | bus = mv88e6xxx_default_mdio_bus(chip); | |
39 | if (!bus) | |
40 | return -EOPNOTSUPP; | |
41 | ||
42 | if (!chip->info->ops->phy_read) | |
43 | return -EOPNOTSUPP; | |
44 | ||
45 | return chip->info->ops->phy_read(chip, bus, addr, reg, val); | |
46 | } | |
47 | ||
48 | int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val) | |
49 | { | |
50 | int addr = phy; /* PHY devices addresses start at 0x0 */ | |
51 | struct mii_bus *bus; | |
52 | ||
53 | bus = mv88e6xxx_default_mdio_bus(chip); | |
54 | if (!bus) | |
55 | return -EOPNOTSUPP; | |
56 | ||
57 | if (!chip->info->ops->phy_write) | |
58 | return -EOPNOTSUPP; | |
59 | ||
60 | return chip->info->ops->phy_write(chip, bus, addr, reg, val); | |
61 | } | |
62 | ||
63 | static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page) | |
64 | { | |
65 | if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_PHY_PAGE)) | |
66 | return -EOPNOTSUPP; | |
67 | ||
68 | return mv88e6xxx_phy_write(chip, phy, PHY_PAGE, page); | |
69 | } | |
70 | ||
71 | static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy) | |
72 | { | |
73 | int err; | |
74 | ||
75 | /* Restore PHY page Copper 0x0 for access via the registered | |
76 | * MDIO bus | |
77 | */ | |
78 | err = mv88e6xxx_phy_write(chip, phy, PHY_PAGE, PHY_PAGE_COPPER); | |
79 | if (unlikely(err)) { | |
80 | dev_err(chip->dev, | |
81 | "failed to restore PHY %d page Copper (%d)\n", | |
82 | phy, err); | |
83 | } | |
84 | } | |
85 | ||
86 | int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy, | |
87 | u8 page, int reg, u16 *val) | |
88 | { | |
89 | int err; | |
90 | ||
91 | /* There is no paging for registers 22 */ | |
92 | if (reg == PHY_PAGE) | |
93 | return -EINVAL; | |
94 | ||
95 | err = mv88e6xxx_phy_page_get(chip, phy, page); | |
96 | if (!err) { | |
97 | err = mv88e6xxx_phy_read(chip, phy, reg, val); | |
98 | mv88e6xxx_phy_page_put(chip, phy); | |
99 | } | |
100 | ||
101 | return err; | |
102 | } | |
103 | ||
104 | int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy, | |
105 | u8 page, int reg, u16 val) | |
106 | { | |
107 | int err; | |
108 | ||
109 | /* There is no paging for registers 22 */ | |
110 | if (reg == PHY_PAGE) | |
111 | return -EINVAL; | |
112 | ||
113 | err = mv88e6xxx_phy_page_get(chip, phy, page); | |
114 | if (!err) { | |
115 | err = mv88e6xxx_phy_write(chip, phy, PHY_PAGE, page); | |
116 | mv88e6xxx_phy_page_put(chip, phy); | |
117 | } | |
118 | ||
119 | return err; | |
120 | } | |
121 | ||
122 | static int mv88e6xxx_ppu_disable(struct mv88e6xxx_chip *chip) | |
123 | { | |
124 | if (!chip->info->ops->ppu_disable) | |
125 | return 0; | |
126 | ||
127 | return chip->info->ops->ppu_disable(chip); | |
128 | } | |
129 | ||
130 | int mv88e6xxx_ppu_enable(struct mv88e6xxx_chip *chip) | |
131 | { | |
132 | if (!chip->info->ops->ppu_enable) | |
133 | return 0; | |
134 | ||
135 | return chip->info->ops->ppu_enable(chip); | |
136 | } | |
137 | ||
138 | static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly) | |
139 | { | |
140 | struct mv88e6xxx_chip *chip; | |
141 | ||
142 | chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work); | |
143 | ||
144 | mutex_lock(&chip->reg_lock); | |
145 | ||
146 | if (mutex_trylock(&chip->ppu_mutex)) { | |
147 | if (mv88e6xxx_ppu_enable(chip) == 0) | |
148 | chip->ppu_disabled = 0; | |
149 | mutex_unlock(&chip->ppu_mutex); | |
150 | } | |
151 | ||
152 | mutex_unlock(&chip->reg_lock); | |
153 | } | |
154 | ||
155 | static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps) | |
156 | { | |
157 | struct mv88e6xxx_chip *chip = (void *)_ps; | |
158 | ||
159 | schedule_work(&chip->ppu_work); | |
160 | } | |
161 | ||
162 | static int mv88e6xxx_ppu_access_get(struct mv88e6xxx_chip *chip) | |
163 | { | |
164 | int ret; | |
165 | ||
166 | mutex_lock(&chip->ppu_mutex); | |
167 | ||
168 | /* If the PHY polling unit is enabled, disable it so that | |
169 | * we can access the PHY registers. If it was already | |
170 | * disabled, cancel the timer that is going to re-enable | |
171 | * it. | |
172 | */ | |
173 | if (!chip->ppu_disabled) { | |
174 | ret = mv88e6xxx_ppu_disable(chip); | |
175 | if (ret < 0) { | |
176 | mutex_unlock(&chip->ppu_mutex); | |
177 | return ret; | |
178 | } | |
179 | chip->ppu_disabled = 1; | |
180 | } else { | |
181 | del_timer(&chip->ppu_timer); | |
182 | ret = 0; | |
183 | } | |
184 | ||
185 | return ret; | |
186 | } | |
187 | ||
188 | static void mv88e6xxx_ppu_access_put(struct mv88e6xxx_chip *chip) | |
189 | { | |
190 | /* Schedule a timer to re-enable the PHY polling unit. */ | |
191 | mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10)); | |
192 | mutex_unlock(&chip->ppu_mutex); | |
193 | } | |
194 | ||
195 | static void mv88e6xxx_ppu_state_init(struct mv88e6xxx_chip *chip) | |
196 | { | |
197 | mutex_init(&chip->ppu_mutex); | |
198 | INIT_WORK(&chip->ppu_work, mv88e6xxx_ppu_reenable_work); | |
199 | setup_timer(&chip->ppu_timer, mv88e6xxx_ppu_reenable_timer, | |
200 | (unsigned long)chip); | |
201 | } | |
202 | ||
203 | static void mv88e6xxx_ppu_state_destroy(struct mv88e6xxx_chip *chip) | |
204 | { | |
205 | del_timer_sync(&chip->ppu_timer); | |
206 | } | |
207 | ||
208 | int mv88e6xxx_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, | |
209 | int addr, int reg, u16 *val) | |
210 | { | |
211 | int err; | |
212 | ||
213 | err = mv88e6xxx_ppu_access_get(chip); | |
214 | if (!err) { | |
215 | err = mv88e6xxx_read(chip, addr, reg, val); | |
216 | mv88e6xxx_ppu_access_put(chip); | |
217 | } | |
218 | ||
219 | return err; | |
220 | } | |
221 | ||
222 | int mv88e6xxx_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, | |
223 | int addr, int reg, u16 val) | |
224 | { | |
225 | int err; | |
226 | ||
227 | err = mv88e6xxx_ppu_access_get(chip); | |
228 | if (!err) { | |
229 | err = mv88e6xxx_write(chip, addr, reg, val); | |
230 | mv88e6xxx_ppu_access_put(chip); | |
231 | } | |
232 | ||
233 | return err; | |
234 | } | |
235 | ||
236 | void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip) | |
237 | { | |
238 | if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable) | |
239 | mv88e6xxx_ppu_state_init(chip); | |
240 | } | |
241 | ||
242 | void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip) | |
243 | { | |
244 | if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable) | |
245 | mv88e6xxx_ppu_state_destroy(chip); | |
246 | } |