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net: dsa: mv88e6xxx: Move switch product IDs into common include file
[mirror_ubuntu-zesty-kernel.git] / drivers / net / dsa / mv88e6xxx.h
CommitLineData
91da11f8
LB		 1/*
2 * net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
3 * Copyright (c) 2008 Marvell Semiconductor
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#ifndef __MV88E6XXX_H
12#define __MV88E6XXX_H
13
b2eb0662
GR		 14/* switch product IDs */
15
16#define ID_6085 0x04a0
17#define ID_6095 0x0950
18
19#define ID_6123 0x1210
20#define ID_6123_A1 0x1212
21#define ID_6123_A2 0x1213
22
23#define ID_6131 0x1060
24#define ID_6131_B2 0x1066
25
26#define ID_6152 0x1a40
27#define ID_6155 0x1a50
28
29#define ID_6161 0x1610
30#define ID_6161_A1 0x1612
31#define ID_6161_A2 0x1613
32
33#define ID_6165 0x1650
34#define ID_6165_A1 0x1652
35#define ID_6165_A2 0x1653
36
37#define ID_6171 0x1710
38#define ID_6172 0x1720
39#define ID_6176 0x1760
40
41#define ID_6182 0x1a60
42#define ID_6185 0x1a70
43
44#define ID_6352 0x3520
45#define ID_6352_A0 0x3521
46#define ID_6352_A1 0x3522
47
48/* Registers */
49
91da11f8
LB		 50#define REG_PORT(p) (0x10 + (p))
51#define REG_GLOBAL 0x1b
52#define REG_GLOBAL2 0x1c
53
facd95b2
GR		 54/* ATU commands */
55
56#define ATU_BUSY 0x8000
57
defb05b9
GR		 58#define ATU_CMD_LOAD_FID (ATU_BUSY | 0x3000)
59#define ATU_CMD_GETNEXT_FID (ATU_BUSY | 0x4000)
facd95b2
GR		 60#define ATU_CMD_FLUSH_NONSTATIC_FID (ATU_BUSY | 0x6000)
61
62/* port states */
63
64#define PSTATE_MASK 0x03
65#define PSTATE_DISABLED 0x00
66#define PSTATE_BLOCKING 0x01
67#define PSTATE_LEARNING 0x02
68#define PSTATE_FORWARDING 0x03
69
defb05b9
GR		 70/* FDB states */
71
72#define FDB_STATE_MASK 0x0f
73
74#define FDB_STATE_UNUSED 0x00
75#define FDB_STATE_MC_STATIC 0x07 /* static multicast */
76#define FDB_STATE_STATIC 0x0e /* static unicast */
77
91da11f8 78struct mv88e6xxx_priv_state {
3675c8d7 79 /* When using multi-chip addressing, this mutex protects
91da11f8
LB		 80 * access to the indirect access registers. (In single-chip
81 * mode, this mutex is effectively useless.)
82 */
83 struct mutex smi_mutex;
84
2e5f0320 85#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
3675c8d7 86 /* Handles automatic disabling and re-enabling of the PHY
2e5f0320
LB		 87 * polling unit.
88 */
89 struct mutex ppu_mutex;
90 int ppu_disabled;
91 struct work_struct ppu_work;
92 struct timer_list ppu_timer;
93#endif
94
3675c8d7 95 /* This mutex serialises access to the statistics unit.
91da11f8
LB		 96 * Hold this mutex over snapshot + dump sequences.
97 */
98 struct mutex stats_mutex;
ec80bfcb 99
3ad50cca
GR		 100 /* This mutex serializes phy access for chips with
101 * indirect phy addressing. It is unused for chips
102 * with direct phy access.
103 */
104 struct mutex phy_mutex;
105
33b43df4
GR		 106 /* This mutex serializes eeprom access for chips with
107 * eeprom support.
108 */
109 struct mutex eeprom_mutex;
110
ec80bfcb 111 int id; /* switch product id */
facd95b2
GR		 112
113 /* hw bridging */
114
115 u32 fid_mask;
116 u8 fid[DSA_MAX_PORTS];
117 u16 bridge_mask[DSA_MAX_PORTS];
118
119 unsigned long port_state_update_mask;
120 u8 port_state[DSA_MAX_PORTS];
121
122 struct work_struct bridge_work;
91da11f8
LB		 123};
124
125struct mv88e6xxx_hw_stat {
126 char string[ETH_GSTRING_LEN];
127 int sizeof_stat;
128 int reg;
129};
130
d827e88a 131int mv88e6xxx_setup_port_common(struct dsa_switch *ds, int port);
acdaffcc 132int mv88e6xxx_setup_common(struct dsa_switch *ds);
91da11f8
LB		 133int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
134int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
135int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
85686581 136 int reg, u16 val);
91da11f8
LB		 137int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
138int mv88e6xxx_config_prio(struct dsa_switch *ds);
2e5f0320 139int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
91da11f8
LB		 140int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
141int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
142int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
2e5f0320
LB		 143void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);
144int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
145int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
146 int regnum, u16 val);
91da11f8
LB		 147void mv88e6xxx_poll_link(struct dsa_switch *ds);
148void mv88e6xxx_get_strings(struct dsa_switch *ds,
149 int nr_stats, struct mv88e6xxx_hw_stat *stats,
150 int port, uint8_t *data);
151void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
152 int nr_stats, struct mv88e6xxx_hw_stat *stats,
153 int port, uint64_t *data);
a1ab91f3
GR		 154int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port);
155void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
156 struct ethtool_regs *regs, void *_p);
eaa23765 157int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp);
f3044683
AL		 158int mv88e6xxx_phy_wait(struct dsa_switch *ds);
159int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds);
160int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds);
161int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, int regnum);
162int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, int regnum,
163 u16 val);
11b3b45d
GR		 164int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e);
165int mv88e6xxx_set_eee(struct dsa_switch *ds, int port,
166 struct phy_device *phydev, struct ethtool_eee *e);
facd95b2
GR		 167int mv88e6xxx_join_bridge(struct dsa_switch *ds, int port, u32 br_port_mask);
168int mv88e6xxx_leave_bridge(struct dsa_switch *ds, int port, u32 br_port_mask);
169int mv88e6xxx_port_stp_update(struct dsa_switch *ds, int port, u8 state);
defb05b9
GR		 170int mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,
171 const unsigned char *addr, u16 vid);
172int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,
173 const unsigned char *addr, u16 vid);
174int mv88e6xxx_port_fdb_getnext(struct dsa_switch *ds, int port,
175 unsigned char *addr, bool *is_static);
91da11f8 176
98e67308
BH		 177extern struct dsa_switch_driver mv88e6131_switch_driver;
178extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
3ad50cca 179extern struct dsa_switch_driver mv88e6352_switch_driver;
42f27253 180extern struct dsa_switch_driver mv88e6171_switch_driver;
98e67308 181
91da11f8
LB		 182#define REG_READ(addr, reg) \
183 ({ \
184 int __ret; \
185 \
186 __ret = mv88e6xxx_reg_read(ds, addr, reg); \
187 if (__ret < 0) \
188 return __ret; \
189 __ret; \
190 })
191
192#define REG_WRITE(addr, reg, val) \
193 ({ \
194 int __ret; \
195 \
196 __ret = mv88e6xxx_reg_write(ds, addr, reg, val); \
197 if (__ret < 0) \
198 return __ret; \
199 })
200
201
202
203#endif
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