]>
Commit | Line | Data |
---|---|---|
56051948 | 1 | // SPDX-License-Identifier: GPL-2.0 |
adb3dccf | 2 | /* Copyright 2019-2021 NXP Semiconductors |
375e1314 VO |
3 | * |
4 | * This is an umbrella module for all network switches that are | |
5 | * register-compatible with Ocelot and that perform I/O to their host CPU | |
6 | * through an NPI (Node Processor Interface) Ethernet port. | |
56051948 VO |
7 | */ |
8 | #include <uapi/linux/if_bridge.h> | |
07d985ee | 9 | #include <soc/mscc/ocelot_vcap.h> |
bdeced75 VO |
10 | #include <soc/mscc/ocelot_qsys.h> |
11 | #include <soc/mscc/ocelot_sys.h> | |
12 | #include <soc/mscc/ocelot_dev.h> | |
13 | #include <soc/mscc/ocelot_ana.h> | |
2b49d128 | 14 | #include <soc/mscc/ocelot_ptp.h> |
56051948 | 15 | #include <soc/mscc/ocelot.h> |
84705fc1 | 16 | #include <linux/platform_device.h> |
c0bcf537 | 17 | #include <linux/packing.h> |
56051948 | 18 | #include <linux/module.h> |
bdeced75 | 19 | #include <linux/of_net.h> |
56051948 VO |
20 | #include <linux/pci.h> |
21 | #include <linux/of.h> | |
588d0550 | 22 | #include <linux/pcs-lynx.h> |
fc411eaa | 23 | #include <net/pkt_sched.h> |
56051948 VO |
24 | #include <net/dsa.h> |
25 | #include "felix.h" | |
26 | ||
adb3dccf VO |
27 | /* The CPU port module is connected to the Node Processor Interface (NPI). This |
28 | * is the mode through which frames can be injected from and extracted to an | |
29 | * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU | |
30 | * running Linux, and this forms a DSA setup together with the enetc or fman | |
31 | * DSA master. | |
32 | */ | |
33 | static void felix_npi_port_init(struct ocelot *ocelot, int port) | |
34 | { | |
35 | ocelot->npi = port; | |
36 | ||
37 | ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M | | |
38 | QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port), | |
39 | QSYS_EXT_CPU_CFG); | |
40 | ||
41 | /* NPI port Injection/Extraction configuration */ | |
42 | ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR, | |
43 | ocelot->npi_xtr_prefix); | |
44 | ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR, | |
45 | ocelot->npi_inj_prefix); | |
46 | ||
47 | /* Disable transmission of pause frames */ | |
48 | ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0); | |
49 | } | |
50 | ||
51 | static void felix_npi_port_deinit(struct ocelot *ocelot, int port) | |
52 | { | |
53 | /* Restore hardware defaults */ | |
54 | int unused_port = ocelot->num_phys_ports + 2; | |
55 | ||
56 | ocelot->npi = -1; | |
57 | ||
58 | ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port), | |
59 | QSYS_EXT_CPU_CFG); | |
60 | ||
61 | ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR, | |
62 | OCELOT_TAG_PREFIX_DISABLED); | |
63 | ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR, | |
64 | OCELOT_TAG_PREFIX_DISABLED); | |
65 | ||
66 | /* Enable transmission of pause frames */ | |
67 | ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1); | |
68 | } | |
69 | ||
70 | static int felix_setup_tag_npi(struct dsa_switch *ds, int cpu) | |
71 | { | |
72 | struct ocelot *ocelot = ds->priv; | |
73 | unsigned long cpu_flood; | |
74 | ||
75 | felix_npi_port_init(ocelot, cpu); | |
76 | ||
77 | /* Include the CPU port module (and indirectly, the NPI port) | |
78 | * in the forwarding mask for unknown unicast - the hardware | |
79 | * default value for ANA_FLOODING_FLD_UNICAST excludes | |
80 | * BIT(ocelot->num_phys_ports), and so does ocelot_init, | |
81 | * since Ocelot relies on whitelisting MAC addresses towards | |
82 | * PGID_CPU. | |
83 | * We do this because DSA does not yet perform RX filtering, | |
84 | * and the NPI port does not perform source address learning, | |
85 | * so traffic sent to Linux is effectively unknown from the | |
86 | * switch's perspective. | |
87 | */ | |
88 | cpu_flood = ANA_PGID_PGID_PGID(BIT(ocelot->num_phys_ports)); | |
89 | ocelot_rmw_rix(ocelot, cpu_flood, cpu_flood, ANA_PGID_PGID, PGID_UC); | |
90 | ||
91 | return 0; | |
92 | } | |
93 | ||
94 | static void felix_teardown_tag_npi(struct dsa_switch *ds, int cpu) | |
95 | { | |
96 | struct ocelot *ocelot = ds->priv; | |
97 | ||
98 | felix_npi_port_deinit(ocelot, cpu); | |
99 | } | |
100 | ||
101 | static int felix_set_tag_protocol(struct dsa_switch *ds, int cpu, | |
102 | enum dsa_tag_protocol proto) | |
103 | { | |
104 | int err; | |
105 | ||
106 | switch (proto) { | |
107 | case DSA_TAG_PROTO_OCELOT: | |
108 | err = felix_setup_tag_npi(ds, cpu); | |
109 | break; | |
110 | default: | |
111 | err = -EPROTONOSUPPORT; | |
112 | } | |
113 | ||
114 | return err; | |
115 | } | |
116 | ||
117 | static void felix_del_tag_protocol(struct dsa_switch *ds, int cpu, | |
118 | enum dsa_tag_protocol proto) | |
119 | { | |
120 | switch (proto) { | |
121 | case DSA_TAG_PROTO_OCELOT: | |
122 | felix_teardown_tag_npi(ds, cpu); | |
123 | break; | |
124 | default: | |
125 | break; | |
126 | } | |
127 | } | |
128 | ||
129 | static int felix_change_tag_protocol(struct dsa_switch *ds, int cpu, | |
130 | enum dsa_tag_protocol proto) | |
131 | { | |
132 | struct ocelot *ocelot = ds->priv; | |
133 | struct felix *felix = ocelot_to_felix(ocelot); | |
134 | enum dsa_tag_protocol old_proto = felix->tag_proto; | |
135 | int err; | |
136 | ||
137 | if (proto != DSA_TAG_PROTO_OCELOT) | |
138 | return -EPROTONOSUPPORT; | |
139 | ||
140 | felix_del_tag_protocol(ds, cpu, old_proto); | |
141 | ||
142 | err = felix_set_tag_protocol(ds, cpu, proto); | |
143 | if (err) { | |
144 | felix_set_tag_protocol(ds, cpu, old_proto); | |
145 | return err; | |
146 | } | |
147 | ||
148 | felix->tag_proto = proto; | |
149 | ||
150 | return 0; | |
151 | } | |
152 | ||
56051948 | 153 | static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, |
4d776482 FF |
154 | int port, |
155 | enum dsa_tag_protocol mp) | |
56051948 | 156 | { |
adb3dccf VO |
157 | struct ocelot *ocelot = ds->priv; |
158 | struct felix *felix = ocelot_to_felix(ocelot); | |
159 | ||
160 | return felix->tag_proto; | |
56051948 VO |
161 | } |
162 | ||
163 | static int felix_set_ageing_time(struct dsa_switch *ds, | |
164 | unsigned int ageing_time) | |
165 | { | |
166 | struct ocelot *ocelot = ds->priv; | |
167 | ||
168 | ocelot_set_ageing_time(ocelot, ageing_time); | |
169 | ||
170 | return 0; | |
171 | } | |
172 | ||
56051948 VO |
173 | static int felix_fdb_dump(struct dsa_switch *ds, int port, |
174 | dsa_fdb_dump_cb_t *cb, void *data) | |
175 | { | |
176 | struct ocelot *ocelot = ds->priv; | |
177 | ||
178 | return ocelot_fdb_dump(ocelot, port, cb, data); | |
179 | } | |
180 | ||
181 | static int felix_fdb_add(struct dsa_switch *ds, int port, | |
182 | const unsigned char *addr, u16 vid) | |
183 | { | |
184 | struct ocelot *ocelot = ds->priv; | |
56051948 | 185 | |
87b0f983 | 186 | return ocelot_fdb_add(ocelot, port, addr, vid); |
56051948 VO |
187 | } |
188 | ||
189 | static int felix_fdb_del(struct dsa_switch *ds, int port, | |
190 | const unsigned char *addr, u16 vid) | |
191 | { | |
192 | struct ocelot *ocelot = ds->priv; | |
193 | ||
194 | return ocelot_fdb_del(ocelot, port, addr, vid); | |
195 | } | |
196 | ||
a52b2da7 VO |
197 | static int felix_mdb_add(struct dsa_switch *ds, int port, |
198 | const struct switchdev_obj_port_mdb *mdb) | |
209edf95 VO |
199 | { |
200 | struct ocelot *ocelot = ds->priv; | |
201 | ||
a52b2da7 | 202 | return ocelot_port_mdb_add(ocelot, port, mdb); |
209edf95 VO |
203 | } |
204 | ||
205 | static int felix_mdb_del(struct dsa_switch *ds, int port, | |
206 | const struct switchdev_obj_port_mdb *mdb) | |
207 | { | |
208 | struct ocelot *ocelot = ds->priv; | |
209 | ||
210 | return ocelot_port_mdb_del(ocelot, port, mdb); | |
211 | } | |
212 | ||
56051948 VO |
213 | static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port, |
214 | u8 state) | |
215 | { | |
216 | struct ocelot *ocelot = ds->priv; | |
217 | ||
218 | return ocelot_bridge_stp_state_set(ocelot, port, state); | |
219 | } | |
220 | ||
221 | static int felix_bridge_join(struct dsa_switch *ds, int port, | |
222 | struct net_device *br) | |
223 | { | |
224 | struct ocelot *ocelot = ds->priv; | |
225 | ||
226 | return ocelot_port_bridge_join(ocelot, port, br); | |
227 | } | |
228 | ||
229 | static void felix_bridge_leave(struct dsa_switch *ds, int port, | |
230 | struct net_device *br) | |
231 | { | |
232 | struct ocelot *ocelot = ds->priv; | |
233 | ||
234 | ocelot_port_bridge_leave(ocelot, port, br); | |
235 | } | |
236 | ||
56051948 VO |
237 | static int felix_vlan_prepare(struct dsa_switch *ds, int port, |
238 | const struct switchdev_obj_port_vlan *vlan) | |
239 | { | |
2f0402fe | 240 | struct ocelot *ocelot = ds->priv; |
b7a9e0da | 241 | u16 flags = vlan->flags; |
2f0402fe | 242 | |
9a720680 VO |
243 | /* Ocelot switches copy frames as-is to the CPU, so the flags: |
244 | * egress-untagged or not, pvid or not, make no difference. This | |
245 | * behavior is already better than what DSA just tries to approximate | |
246 | * when it installs the VLAN with the same flags on the CPU port. | |
247 | * Just accept any configuration, and don't let ocelot deny installing | |
248 | * multiple native VLANs on the NPI port, because the switch doesn't | |
249 | * look at the port tag settings towards the NPI interface anyway. | |
250 | */ | |
251 | if (port == ocelot->npi) | |
252 | return 0; | |
253 | ||
b7a9e0da VO |
254 | return ocelot_vlan_prepare(ocelot, port, vlan->vid, |
255 | flags & BRIDGE_VLAN_INFO_PVID, | |
256 | flags & BRIDGE_VLAN_INFO_UNTAGGED); | |
56051948 VO |
257 | } |
258 | ||
bae33f2b | 259 | static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled) |
56051948 VO |
260 | { |
261 | struct ocelot *ocelot = ds->priv; | |
262 | ||
bae33f2b | 263 | return ocelot_port_vlan_filtering(ocelot, port, enabled); |
56051948 VO |
264 | } |
265 | ||
1958d581 VO |
266 | static int felix_vlan_add(struct dsa_switch *ds, int port, |
267 | const struct switchdev_obj_port_vlan *vlan) | |
56051948 VO |
268 | { |
269 | struct ocelot *ocelot = ds->priv; | |
183be6f9 | 270 | u16 flags = vlan->flags; |
1958d581 VO |
271 | int err; |
272 | ||
273 | err = felix_vlan_prepare(ds, port, vlan); | |
274 | if (err) | |
275 | return err; | |
56051948 | 276 | |
1958d581 VO |
277 | return ocelot_vlan_add(ocelot, port, vlan->vid, |
278 | flags & BRIDGE_VLAN_INFO_PVID, | |
279 | flags & BRIDGE_VLAN_INFO_UNTAGGED); | |
56051948 VO |
280 | } |
281 | ||
282 | static int felix_vlan_del(struct dsa_switch *ds, int port, | |
283 | const struct switchdev_obj_port_vlan *vlan) | |
284 | { | |
285 | struct ocelot *ocelot = ds->priv; | |
b7a9e0da VO |
286 | |
287 | return ocelot_vlan_del(ocelot, port, vlan->vid); | |
56051948 VO |
288 | } |
289 | ||
290 | static int felix_port_enable(struct dsa_switch *ds, int port, | |
291 | struct phy_device *phy) | |
292 | { | |
293 | struct ocelot *ocelot = ds->priv; | |
294 | ||
295 | ocelot_port_enable(ocelot, port, phy); | |
296 | ||
297 | return 0; | |
298 | } | |
299 | ||
300 | static void felix_port_disable(struct dsa_switch *ds, int port) | |
301 | { | |
302 | struct ocelot *ocelot = ds->priv; | |
303 | ||
304 | return ocelot_port_disable(ocelot, port); | |
305 | } | |
306 | ||
bdeced75 VO |
307 | static void felix_phylink_validate(struct dsa_switch *ds, int port, |
308 | unsigned long *supported, | |
309 | struct phylink_link_state *state) | |
310 | { | |
311 | struct ocelot *ocelot = ds->priv; | |
375e1314 | 312 | struct felix *felix = ocelot_to_felix(ocelot); |
bdeced75 | 313 | |
375e1314 VO |
314 | if (felix->info->phylink_validate) |
315 | felix->info->phylink_validate(ocelot, port, supported, state); | |
bdeced75 VO |
316 | } |
317 | ||
bdeced75 VO |
318 | static void felix_phylink_mac_config(struct dsa_switch *ds, int port, |
319 | unsigned int link_an_mode, | |
320 | const struct phylink_link_state *state) | |
7e14a2dc VO |
321 | { |
322 | struct ocelot *ocelot = ds->priv; | |
323 | struct felix *felix = ocelot_to_felix(ocelot); | |
588d0550 | 324 | struct dsa_port *dp = dsa_to_port(ds, port); |
7e14a2dc | 325 | |
588d0550 IC |
326 | if (felix->pcs[port]) |
327 | phylink_set_pcs(dp->pl, &felix->pcs[port]->pcs); | |
7e14a2dc VO |
328 | } |
329 | ||
330 | static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port, | |
331 | unsigned int link_an_mode, | |
332 | phy_interface_t interface) | |
333 | { | |
334 | struct ocelot *ocelot = ds->priv; | |
335 | struct ocelot_port *ocelot_port = ocelot->ports[port]; | |
336 | ||
337 | ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG); | |
886e1387 | 338 | ocelot_fields_write(ocelot, port, QSYS_SWITCH_PORT_MODE_PORT_ENA, 0); |
7e14a2dc VO |
339 | } |
340 | ||
341 | static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port, | |
342 | unsigned int link_an_mode, | |
343 | phy_interface_t interface, | |
344 | struct phy_device *phydev, | |
345 | int speed, int duplex, | |
346 | bool tx_pause, bool rx_pause) | |
bdeced75 VO |
347 | { |
348 | struct ocelot *ocelot = ds->priv; | |
349 | struct ocelot_port *ocelot_port = ocelot->ports[port]; | |
350 | struct felix *felix = ocelot_to_felix(ocelot); | |
351 | u32 mac_fc_cfg; | |
352 | ||
353 | /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and | |
da1c4ba1 VO |
354 | * PORT_RST bits in DEV_CLOCK_CFG. Note that the way this system is |
355 | * integrated is that the MAC speed is fixed and it's the PCS who is | |
356 | * performing the rate adaptation, so we have to write "1000Mbps" into | |
357 | * the LINK_SPEED field of DEV_CLOCK_CFG (which is also its default | |
358 | * value). | |
bdeced75 | 359 | */ |
da1c4ba1 VO |
360 | ocelot_port_writel(ocelot_port, |
361 | DEV_CLOCK_CFG_LINK_SPEED(OCELOT_SPEED_1000), | |
bdeced75 VO |
362 | DEV_CLOCK_CFG); |
363 | ||
7e14a2dc | 364 | switch (speed) { |
151a7cee VO |
365 | case SPEED_10: |
366 | mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(3); | |
367 | break; | |
368 | case SPEED_100: | |
369 | mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(2); | |
370 | break; | |
371 | case SPEED_1000: | |
372 | case SPEED_2500: | |
373 | mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(1); | |
374 | break; | |
151a7cee VO |
375 | default: |
376 | dev_err(ocelot->dev, "Unsupported speed on port %d: %d\n", | |
7e14a2dc | 377 | port, speed); |
151a7cee VO |
378 | return; |
379 | } | |
f3660937 AM |
380 | |
381 | /* handle Rx pause in all cases, with 2500base-X this is used for rate | |
382 | * adaptation. | |
383 | */ | |
384 | mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA; | |
385 | ||
7e14a2dc | 386 | if (tx_pause) |
bdeced75 VO |
387 | mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA | |
388 | SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) | | |
389 | SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) | | |
390 | SYS_MAC_FC_CFG_ZERO_PAUSE_ENA; | |
151a7cee VO |
391 | |
392 | /* Flow control. Link speed is only used here to evaluate the time | |
393 | * specification in incoming pause frames. | |
394 | */ | |
bdeced75 VO |
395 | ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port); |
396 | ||
397 | ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port); | |
398 | ||
7e14a2dc VO |
399 | /* Undo the effects of felix_phylink_mac_link_down: |
400 | * enable MAC module | |
401 | */ | |
bdeced75 VO |
402 | ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA | |
403 | DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG); | |
404 | ||
405 | /* Enable receiving frames on the port, and activate auto-learning of | |
406 | * MAC addresses. | |
407 | */ | |
408 | ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO | | |
409 | ANA_PORT_PORT_CFG_RECV_ENA | | |
410 | ANA_PORT_PORT_CFG_PORTID_VAL(port), | |
411 | ANA_PORT_PORT_CFG, port); | |
412 | ||
413 | /* Core: Enable port for frame transfer */ | |
886e1387 VO |
414 | ocelot_fields_write(ocelot, port, |
415 | QSYS_SWITCH_PORT_MODE_PORT_ENA, 1); | |
7e14a2dc | 416 | |
7e14a2dc VO |
417 | if (felix->info->port_sched_speed_set) |
418 | felix->info->port_sched_speed_set(ocelot, port, speed); | |
bdeced75 VO |
419 | } |
420 | ||
bd2b3161 XY |
421 | static void felix_port_qos_map_init(struct ocelot *ocelot, int port) |
422 | { | |
423 | int i; | |
424 | ||
425 | ocelot_rmw_gix(ocelot, | |
426 | ANA_PORT_QOS_CFG_QOS_PCP_ENA, | |
427 | ANA_PORT_QOS_CFG_QOS_PCP_ENA, | |
428 | ANA_PORT_QOS_CFG, | |
429 | port); | |
430 | ||
70d39a6e | 431 | for (i = 0; i < OCELOT_NUM_TC * 2; i++) { |
bd2b3161 XY |
432 | ocelot_rmw_ix(ocelot, |
433 | (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) | | |
434 | ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i), | |
435 | ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL | | |
436 | ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M, | |
437 | ANA_PORT_PCP_DEI_MAP, | |
438 | port, i); | |
439 | } | |
440 | } | |
441 | ||
56051948 VO |
442 | static void felix_get_strings(struct dsa_switch *ds, int port, |
443 | u32 stringset, u8 *data) | |
444 | { | |
445 | struct ocelot *ocelot = ds->priv; | |
446 | ||
447 | return ocelot_get_strings(ocelot, port, stringset, data); | |
448 | } | |
449 | ||
450 | static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data) | |
451 | { | |
452 | struct ocelot *ocelot = ds->priv; | |
453 | ||
454 | ocelot_get_ethtool_stats(ocelot, port, data); | |
455 | } | |
456 | ||
457 | static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset) | |
458 | { | |
459 | struct ocelot *ocelot = ds->priv; | |
460 | ||
461 | return ocelot_get_sset_count(ocelot, port, sset); | |
462 | } | |
463 | ||
464 | static int felix_get_ts_info(struct dsa_switch *ds, int port, | |
465 | struct ethtool_ts_info *info) | |
466 | { | |
467 | struct ocelot *ocelot = ds->priv; | |
468 | ||
469 | return ocelot_get_ts_info(ocelot, port, info); | |
470 | } | |
471 | ||
bdeced75 VO |
472 | static int felix_parse_ports_node(struct felix *felix, |
473 | struct device_node *ports_node, | |
474 | phy_interface_t *port_phy_modes) | |
475 | { | |
476 | struct ocelot *ocelot = &felix->ocelot; | |
477 | struct device *dev = felix->ocelot.dev; | |
478 | struct device_node *child; | |
479 | ||
37fe45ad | 480 | for_each_available_child_of_node(ports_node, child) { |
bdeced75 VO |
481 | phy_interface_t phy_mode; |
482 | u32 port; | |
483 | int err; | |
484 | ||
485 | /* Get switch port number from DT */ | |
486 | if (of_property_read_u32(child, "reg", &port) < 0) { | |
487 | dev_err(dev, "Port number not defined in device tree " | |
488 | "(property \"reg\")\n"); | |
489 | of_node_put(child); | |
490 | return -ENODEV; | |
491 | } | |
492 | ||
493 | /* Get PHY mode from DT */ | |
494 | err = of_get_phy_mode(child, &phy_mode); | |
495 | if (err) { | |
496 | dev_err(dev, "Failed to read phy-mode or " | |
497 | "phy-interface-type property for port %d\n", | |
498 | port); | |
499 | of_node_put(child); | |
500 | return -ENODEV; | |
501 | } | |
502 | ||
503 | err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode); | |
504 | if (err < 0) { | |
505 | dev_err(dev, "Unsupported PHY mode %s on port %d\n", | |
506 | phy_modes(phy_mode), port); | |
59ebb430 | 507 | of_node_put(child); |
bdeced75 VO |
508 | return err; |
509 | } | |
510 | ||
511 | port_phy_modes[port] = phy_mode; | |
512 | } | |
513 | ||
514 | return 0; | |
515 | } | |
516 | ||
517 | static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes) | |
518 | { | |
519 | struct device *dev = felix->ocelot.dev; | |
520 | struct device_node *switch_node; | |
521 | struct device_node *ports_node; | |
522 | int err; | |
523 | ||
524 | switch_node = dev->of_node; | |
525 | ||
526 | ports_node = of_get_child_by_name(switch_node, "ports"); | |
527 | if (!ports_node) { | |
528 | dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); | |
529 | return -ENODEV; | |
530 | } | |
531 | ||
532 | err = felix_parse_ports_node(felix, ports_node, port_phy_modes); | |
533 | of_node_put(ports_node); | |
534 | ||
535 | return err; | |
536 | } | |
537 | ||
56051948 VO |
538 | static int felix_init_structs(struct felix *felix, int num_phys_ports) |
539 | { | |
540 | struct ocelot *ocelot = &felix->ocelot; | |
bdeced75 | 541 | phy_interface_t *port_phy_modes; |
b4024c9e | 542 | struct resource res; |
56051948 VO |
543 | int port, i, err; |
544 | ||
545 | ocelot->num_phys_ports = num_phys_ports; | |
546 | ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports, | |
547 | sizeof(struct ocelot_port *), GFP_KERNEL); | |
548 | if (!ocelot->ports) | |
549 | return -ENOMEM; | |
550 | ||
551 | ocelot->map = felix->info->map; | |
552 | ocelot->stats_layout = felix->info->stats_layout; | |
553 | ocelot->num_stats = felix->info->num_stats; | |
21ce7f3e | 554 | ocelot->num_mact_rows = felix->info->num_mact_rows; |
07d985ee | 555 | ocelot->vcap = felix->info->vcap; |
56051948 | 556 | ocelot->ops = felix->info->ops; |
cacea62f VO |
557 | ocelot->npi_inj_prefix = OCELOT_TAG_PREFIX_SHORT; |
558 | ocelot->npi_xtr_prefix = OCELOT_TAG_PREFIX_SHORT; | |
f59fd9ca | 559 | ocelot->devlink = felix->ds->devlink; |
56051948 | 560 | |
bdeced75 VO |
561 | port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t), |
562 | GFP_KERNEL); | |
563 | if (!port_phy_modes) | |
564 | return -ENOMEM; | |
565 | ||
566 | err = felix_parse_dt(felix, port_phy_modes); | |
567 | if (err) { | |
568 | kfree(port_phy_modes); | |
569 | return err; | |
570 | } | |
571 | ||
56051948 VO |
572 | for (i = 0; i < TARGET_MAX; i++) { |
573 | struct regmap *target; | |
56051948 VO |
574 | |
575 | if (!felix->info->target_io_res[i].name) | |
576 | continue; | |
577 | ||
b4024c9e CM |
578 | memcpy(&res, &felix->info->target_io_res[i], sizeof(res)); |
579 | res.flags = IORESOURCE_MEM; | |
375e1314 VO |
580 | res.start += felix->switch_base; |
581 | res.end += felix->switch_base; | |
56051948 | 582 | |
b4024c9e | 583 | target = ocelot_regmap_init(ocelot, &res); |
56051948 VO |
584 | if (IS_ERR(target)) { |
585 | dev_err(ocelot->dev, | |
586 | "Failed to map device memory space\n"); | |
bdeced75 | 587 | kfree(port_phy_modes); |
56051948 VO |
588 | return PTR_ERR(target); |
589 | } | |
590 | ||
591 | ocelot->targets[i] = target; | |
592 | } | |
593 | ||
594 | err = ocelot_regfields_init(ocelot, felix->info->regfields); | |
595 | if (err) { | |
596 | dev_err(ocelot->dev, "failed to init reg fields map\n"); | |
bdeced75 | 597 | kfree(port_phy_modes); |
56051948 VO |
598 | return err; |
599 | } | |
600 | ||
601 | for (port = 0; port < num_phys_ports; port++) { | |
602 | struct ocelot_port *ocelot_port; | |
91c724cf | 603 | struct regmap *target; |
67c24049 | 604 | u8 *template; |
56051948 VO |
605 | |
606 | ocelot_port = devm_kzalloc(ocelot->dev, | |
607 | sizeof(struct ocelot_port), | |
608 | GFP_KERNEL); | |
609 | if (!ocelot_port) { | |
610 | dev_err(ocelot->dev, | |
611 | "failed to allocate port memory\n"); | |
bdeced75 | 612 | kfree(port_phy_modes); |
56051948 VO |
613 | return -ENOMEM; |
614 | } | |
615 | ||
b4024c9e CM |
616 | memcpy(&res, &felix->info->port_io_res[port], sizeof(res)); |
617 | res.flags = IORESOURCE_MEM; | |
375e1314 VO |
618 | res.start += felix->switch_base; |
619 | res.end += felix->switch_base; | |
56051948 | 620 | |
91c724cf VO |
621 | target = ocelot_regmap_init(ocelot, &res); |
622 | if (IS_ERR(target)) { | |
56051948 | 623 | dev_err(ocelot->dev, |
91c724cf VO |
624 | "Failed to map memory space for port %d\n", |
625 | port); | |
bdeced75 | 626 | kfree(port_phy_modes); |
91c724cf | 627 | return PTR_ERR(target); |
56051948 VO |
628 | } |
629 | ||
5124197c | 630 | template = devm_kzalloc(ocelot->dev, OCELOT_TOTAL_TAG_LEN, |
67c24049 VO |
631 | GFP_KERNEL); |
632 | if (!template) { | |
633 | dev_err(ocelot->dev, | |
634 | "Failed to allocate memory for DSA tag\n"); | |
635 | kfree(port_phy_modes); | |
636 | return -ENOMEM; | |
637 | } | |
638 | ||
bdeced75 | 639 | ocelot_port->phy_mode = port_phy_modes[port]; |
56051948 | 640 | ocelot_port->ocelot = ocelot; |
91c724cf | 641 | ocelot_port->target = target; |
67c24049 | 642 | ocelot_port->xmit_template = template; |
56051948 | 643 | ocelot->ports[port] = ocelot_port; |
67c24049 VO |
644 | |
645 | felix->info->xmit_template_populate(ocelot, port); | |
56051948 VO |
646 | } |
647 | ||
bdeced75 VO |
648 | kfree(port_phy_modes); |
649 | ||
650 | if (felix->info->mdio_bus_alloc) { | |
651 | err = felix->info->mdio_bus_alloc(ocelot); | |
652 | if (err < 0) | |
653 | return err; | |
654 | } | |
655 | ||
56051948 VO |
656 | return 0; |
657 | } | |
658 | ||
659 | /* Hardware initialization done here so that we can allocate structures with | |
660 | * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing | |
661 | * us to allocate structures twice (leak memory) and map PCI memory twice | |
662 | * (which will not work). | |
663 | */ | |
664 | static int felix_setup(struct dsa_switch *ds) | |
665 | { | |
666 | struct ocelot *ocelot = ds->priv; | |
667 | struct felix *felix = ocelot_to_felix(ocelot); | |
668 | int port, err; | |
669 | ||
670 | err = felix_init_structs(felix, ds->num_ports); | |
671 | if (err) | |
672 | return err; | |
673 | ||
d1cc0e93 VO |
674 | err = ocelot_init(ocelot); |
675 | if (err) | |
676 | return err; | |
677 | ||
2b49d128 | 678 | if (ocelot->ptp) { |
2ac7c6c5 | 679 | err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps); |
2b49d128 YL |
680 | if (err) { |
681 | dev_err(ocelot->dev, | |
682 | "Timestamp initialization failed\n"); | |
683 | ocelot->ptp = 0; | |
684 | } | |
685 | } | |
56051948 VO |
686 | |
687 | for (port = 0; port < ds->num_ports; port++) { | |
adb3dccf VO |
688 | if (dsa_is_unused_port(ds, port)) |
689 | continue; | |
56051948 | 690 | |
adb3dccf | 691 | ocelot_init_port(ocelot, port); |
bd2b3161 XY |
692 | |
693 | /* Set the default QoS Classification based on PCP and DEI | |
694 | * bits of vlan tag. | |
695 | */ | |
696 | felix_port_qos_map_init(ocelot, port); | |
56051948 VO |
697 | } |
698 | ||
f59fd9ca VO |
699 | err = ocelot_devlink_sb_register(ocelot); |
700 | if (err) | |
701 | return err; | |
702 | ||
adb3dccf VO |
703 | for (port = 0; port < ds->num_ports; port++) { |
704 | if (!dsa_is_cpu_port(ds, port)) | |
705 | continue; | |
706 | ||
707 | /* The initial tag protocol is NPI which always returns 0, so | |
708 | * there's no real point in checking for errors. | |
709 | */ | |
710 | felix_set_tag_protocol(ds, port, felix->tag_proto); | |
711 | } | |
1cf3299b | 712 | |
0b912fc9 | 713 | ds->mtu_enforcement_ingress = true; |
c54913c1 | 714 | ds->assisted_learning_on_cpu_port = true; |
bdeced75 | 715 | |
56051948 VO |
716 | return 0; |
717 | } | |
718 | ||
719 | static void felix_teardown(struct dsa_switch *ds) | |
720 | { | |
721 | struct ocelot *ocelot = ds->priv; | |
bdeced75 | 722 | struct felix *felix = ocelot_to_felix(ocelot); |
e5fb512d | 723 | int port; |
bdeced75 | 724 | |
adb3dccf VO |
725 | for (port = 0; port < ds->num_ports; port++) { |
726 | if (!dsa_is_cpu_port(ds, port)) | |
727 | continue; | |
728 | ||
729 | felix_del_tag_protocol(ds, port, felix->tag_proto); | |
730 | } | |
731 | ||
f59fd9ca | 732 | ocelot_devlink_sb_unregister(ocelot); |
d19741b0 VO |
733 | ocelot_deinit_timestamp(ocelot); |
734 | ocelot_deinit(ocelot); | |
56051948 | 735 | |
e5fb512d VO |
736 | for (port = 0; port < ocelot->num_phys_ports; port++) |
737 | ocelot_deinit_port(ocelot, port); | |
d19741b0 VO |
738 | |
739 | if (felix->info->mdio_bus_free) | |
740 | felix->info->mdio_bus_free(ocelot); | |
56051948 VO |
741 | } |
742 | ||
c0bcf537 YL |
743 | static int felix_hwtstamp_get(struct dsa_switch *ds, int port, |
744 | struct ifreq *ifr) | |
745 | { | |
746 | struct ocelot *ocelot = ds->priv; | |
747 | ||
748 | return ocelot_hwstamp_get(ocelot, port, ifr); | |
749 | } | |
750 | ||
751 | static int felix_hwtstamp_set(struct dsa_switch *ds, int port, | |
752 | struct ifreq *ifr) | |
753 | { | |
754 | struct ocelot *ocelot = ds->priv; | |
755 | ||
756 | return ocelot_hwstamp_set(ocelot, port, ifr); | |
757 | } | |
758 | ||
759 | static bool felix_rxtstamp(struct dsa_switch *ds, int port, | |
760 | struct sk_buff *skb, unsigned int type) | |
761 | { | |
762 | struct skb_shared_hwtstamps *shhwtstamps; | |
763 | struct ocelot *ocelot = ds->priv; | |
764 | u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN; | |
765 | u32 tstamp_lo, tstamp_hi; | |
766 | struct timespec64 ts; | |
767 | u64 tstamp, val; | |
768 | ||
769 | ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); | |
770 | tstamp = ktime_set(ts.tv_sec, ts.tv_nsec); | |
771 | ||
772 | packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0); | |
773 | tstamp_lo = (u32)val; | |
774 | ||
775 | tstamp_hi = tstamp >> 32; | |
776 | if ((tstamp & 0xffffffff) < tstamp_lo) | |
777 | tstamp_hi--; | |
778 | ||
779 | tstamp = ((u64)tstamp_hi << 32) | tstamp_lo; | |
780 | ||
781 | shhwtstamps = skb_hwtstamps(skb); | |
782 | memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); | |
783 | shhwtstamps->hwtstamp = tstamp; | |
784 | return false; | |
785 | } | |
786 | ||
3243e04a CW |
787 | static bool felix_txtstamp(struct dsa_switch *ds, int port, |
788 | struct sk_buff *clone, unsigned int type) | |
c0bcf537 YL |
789 | { |
790 | struct ocelot *ocelot = ds->priv; | |
791 | struct ocelot_port *ocelot_port = ocelot->ports[port]; | |
792 | ||
e2f9a8fe VO |
793 | if (ocelot->ptp && (skb_shinfo(clone)->tx_flags & SKBTX_HW_TSTAMP) && |
794 | ocelot_port->ptp_cmd == IFH_REW_OP_TWO_STEP_PTP) { | |
795 | ocelot_port_add_txtstamp_skb(ocelot, port, clone); | |
c0bcf537 | 796 | return true; |
e2f9a8fe | 797 | } |
c0bcf537 YL |
798 | |
799 | return false; | |
800 | } | |
801 | ||
0b912fc9 VO |
802 | static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu) |
803 | { | |
804 | struct ocelot *ocelot = ds->priv; | |
805 | ||
806 | ocelot_port_set_maxlen(ocelot, port, new_mtu); | |
807 | ||
808 | return 0; | |
809 | } | |
810 | ||
811 | static int felix_get_max_mtu(struct dsa_switch *ds, int port) | |
812 | { | |
813 | struct ocelot *ocelot = ds->priv; | |
814 | ||
815 | return ocelot_get_max_mtu(ocelot, port); | |
816 | } | |
817 | ||
07d985ee VO |
818 | static int felix_cls_flower_add(struct dsa_switch *ds, int port, |
819 | struct flow_cls_offload *cls, bool ingress) | |
820 | { | |
821 | struct ocelot *ocelot = ds->priv; | |
822 | ||
823 | return ocelot_cls_flower_replace(ocelot, port, cls, ingress); | |
824 | } | |
825 | ||
826 | static int felix_cls_flower_del(struct dsa_switch *ds, int port, | |
827 | struct flow_cls_offload *cls, bool ingress) | |
828 | { | |
829 | struct ocelot *ocelot = ds->priv; | |
830 | ||
831 | return ocelot_cls_flower_destroy(ocelot, port, cls, ingress); | |
832 | } | |
833 | ||
834 | static int felix_cls_flower_stats(struct dsa_switch *ds, int port, | |
835 | struct flow_cls_offload *cls, bool ingress) | |
836 | { | |
837 | struct ocelot *ocelot = ds->priv; | |
838 | ||
839 | return ocelot_cls_flower_stats(ocelot, port, cls, ingress); | |
840 | } | |
841 | ||
fc411eaa VO |
842 | static int felix_port_policer_add(struct dsa_switch *ds, int port, |
843 | struct dsa_mall_policer_tc_entry *policer) | |
844 | { | |
845 | struct ocelot *ocelot = ds->priv; | |
846 | struct ocelot_policer pol = { | |
847 | .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8, | |
5f035af7 | 848 | .burst = policer->burst, |
fc411eaa VO |
849 | }; |
850 | ||
851 | return ocelot_port_policer_add(ocelot, port, &pol); | |
852 | } | |
853 | ||
854 | static void felix_port_policer_del(struct dsa_switch *ds, int port) | |
855 | { | |
856 | struct ocelot *ocelot = ds->priv; | |
857 | ||
858 | ocelot_port_policer_del(ocelot, port); | |
859 | } | |
860 | ||
de143c0e XY |
861 | static int felix_port_setup_tc(struct dsa_switch *ds, int port, |
862 | enum tc_setup_type type, | |
863 | void *type_data) | |
864 | { | |
865 | struct ocelot *ocelot = ds->priv; | |
866 | struct felix *felix = ocelot_to_felix(ocelot); | |
867 | ||
868 | if (felix->info->port_setup_tc) | |
869 | return felix->info->port_setup_tc(ds, port, type, type_data); | |
870 | else | |
871 | return -EOPNOTSUPP; | |
872 | } | |
873 | ||
f59fd9ca VO |
874 | static int felix_sb_pool_get(struct dsa_switch *ds, unsigned int sb_index, |
875 | u16 pool_index, | |
876 | struct devlink_sb_pool_info *pool_info) | |
877 | { | |
878 | struct ocelot *ocelot = ds->priv; | |
879 | ||
880 | return ocelot_sb_pool_get(ocelot, sb_index, pool_index, pool_info); | |
881 | } | |
882 | ||
883 | static int felix_sb_pool_set(struct dsa_switch *ds, unsigned int sb_index, | |
884 | u16 pool_index, u32 size, | |
885 | enum devlink_sb_threshold_type threshold_type, | |
886 | struct netlink_ext_ack *extack) | |
887 | { | |
888 | struct ocelot *ocelot = ds->priv; | |
889 | ||
890 | return ocelot_sb_pool_set(ocelot, sb_index, pool_index, size, | |
891 | threshold_type, extack); | |
892 | } | |
893 | ||
894 | static int felix_sb_port_pool_get(struct dsa_switch *ds, int port, | |
895 | unsigned int sb_index, u16 pool_index, | |
896 | u32 *p_threshold) | |
897 | { | |
898 | struct ocelot *ocelot = ds->priv; | |
899 | ||
900 | return ocelot_sb_port_pool_get(ocelot, port, sb_index, pool_index, | |
901 | p_threshold); | |
902 | } | |
903 | ||
904 | static int felix_sb_port_pool_set(struct dsa_switch *ds, int port, | |
905 | unsigned int sb_index, u16 pool_index, | |
906 | u32 threshold, struct netlink_ext_ack *extack) | |
907 | { | |
908 | struct ocelot *ocelot = ds->priv; | |
909 | ||
910 | return ocelot_sb_port_pool_set(ocelot, port, sb_index, pool_index, | |
911 | threshold, extack); | |
912 | } | |
913 | ||
914 | static int felix_sb_tc_pool_bind_get(struct dsa_switch *ds, int port, | |
915 | unsigned int sb_index, u16 tc_index, | |
916 | enum devlink_sb_pool_type pool_type, | |
917 | u16 *p_pool_index, u32 *p_threshold) | |
918 | { | |
919 | struct ocelot *ocelot = ds->priv; | |
920 | ||
921 | return ocelot_sb_tc_pool_bind_get(ocelot, port, sb_index, tc_index, | |
922 | pool_type, p_pool_index, | |
923 | p_threshold); | |
924 | } | |
925 | ||
926 | static int felix_sb_tc_pool_bind_set(struct dsa_switch *ds, int port, | |
927 | unsigned int sb_index, u16 tc_index, | |
928 | enum devlink_sb_pool_type pool_type, | |
929 | u16 pool_index, u32 threshold, | |
930 | struct netlink_ext_ack *extack) | |
931 | { | |
932 | struct ocelot *ocelot = ds->priv; | |
933 | ||
934 | return ocelot_sb_tc_pool_bind_set(ocelot, port, sb_index, tc_index, | |
935 | pool_type, pool_index, threshold, | |
936 | extack); | |
937 | } | |
938 | ||
939 | static int felix_sb_occ_snapshot(struct dsa_switch *ds, | |
940 | unsigned int sb_index) | |
941 | { | |
942 | struct ocelot *ocelot = ds->priv; | |
943 | ||
944 | return ocelot_sb_occ_snapshot(ocelot, sb_index); | |
945 | } | |
946 | ||
947 | static int felix_sb_occ_max_clear(struct dsa_switch *ds, | |
948 | unsigned int sb_index) | |
949 | { | |
950 | struct ocelot *ocelot = ds->priv; | |
951 | ||
952 | return ocelot_sb_occ_max_clear(ocelot, sb_index); | |
953 | } | |
954 | ||
955 | static int felix_sb_occ_port_pool_get(struct dsa_switch *ds, int port, | |
956 | unsigned int sb_index, u16 pool_index, | |
957 | u32 *p_cur, u32 *p_max) | |
958 | { | |
959 | struct ocelot *ocelot = ds->priv; | |
960 | ||
961 | return ocelot_sb_occ_port_pool_get(ocelot, port, sb_index, pool_index, | |
962 | p_cur, p_max); | |
963 | } | |
964 | ||
965 | static int felix_sb_occ_tc_port_bind_get(struct dsa_switch *ds, int port, | |
966 | unsigned int sb_index, u16 tc_index, | |
967 | enum devlink_sb_pool_type pool_type, | |
968 | u32 *p_cur, u32 *p_max) | |
969 | { | |
970 | struct ocelot *ocelot = ds->priv; | |
971 | ||
972 | return ocelot_sb_occ_tc_port_bind_get(ocelot, port, sb_index, tc_index, | |
973 | pool_type, p_cur, p_max); | |
974 | } | |
975 | ||
375e1314 | 976 | const struct dsa_switch_ops felix_switch_ops = { |
a7096915 | 977 | .get_tag_protocol = felix_get_tag_protocol, |
adb3dccf | 978 | .change_tag_protocol = felix_change_tag_protocol, |
a7096915 VO |
979 | .setup = felix_setup, |
980 | .teardown = felix_teardown, | |
981 | .set_ageing_time = felix_set_ageing_time, | |
982 | .get_strings = felix_get_strings, | |
983 | .get_ethtool_stats = felix_get_ethtool_stats, | |
984 | .get_sset_count = felix_get_sset_count, | |
985 | .get_ts_info = felix_get_ts_info, | |
986 | .phylink_validate = felix_phylink_validate, | |
987 | .phylink_mac_config = felix_phylink_mac_config, | |
988 | .phylink_mac_link_down = felix_phylink_mac_link_down, | |
989 | .phylink_mac_link_up = felix_phylink_mac_link_up, | |
990 | .port_enable = felix_port_enable, | |
991 | .port_disable = felix_port_disable, | |
992 | .port_fdb_dump = felix_fdb_dump, | |
993 | .port_fdb_add = felix_fdb_add, | |
994 | .port_fdb_del = felix_fdb_del, | |
995 | .port_mdb_add = felix_mdb_add, | |
996 | .port_mdb_del = felix_mdb_del, | |
997 | .port_bridge_join = felix_bridge_join, | |
998 | .port_bridge_leave = felix_bridge_leave, | |
999 | .port_stp_state_set = felix_bridge_stp_state_set, | |
1000 | .port_vlan_filtering = felix_vlan_filtering, | |
1001 | .port_vlan_add = felix_vlan_add, | |
1002 | .port_vlan_del = felix_vlan_del, | |
1003 | .port_hwtstamp_get = felix_hwtstamp_get, | |
1004 | .port_hwtstamp_set = felix_hwtstamp_set, | |
1005 | .port_rxtstamp = felix_rxtstamp, | |
1006 | .port_txtstamp = felix_txtstamp, | |
1007 | .port_change_mtu = felix_change_mtu, | |
1008 | .port_max_mtu = felix_get_max_mtu, | |
1009 | .port_policer_add = felix_port_policer_add, | |
1010 | .port_policer_del = felix_port_policer_del, | |
1011 | .cls_flower_add = felix_cls_flower_add, | |
1012 | .cls_flower_del = felix_cls_flower_del, | |
1013 | .cls_flower_stats = felix_cls_flower_stats, | |
1014 | .port_setup_tc = felix_port_setup_tc, | |
f59fd9ca VO |
1015 | .devlink_sb_pool_get = felix_sb_pool_get, |
1016 | .devlink_sb_pool_set = felix_sb_pool_set, | |
1017 | .devlink_sb_port_pool_get = felix_sb_port_pool_get, | |
1018 | .devlink_sb_port_pool_set = felix_sb_port_pool_set, | |
1019 | .devlink_sb_tc_pool_bind_get = felix_sb_tc_pool_bind_get, | |
1020 | .devlink_sb_tc_pool_bind_set = felix_sb_tc_pool_bind_set, | |
1021 | .devlink_sb_occ_snapshot = felix_sb_occ_snapshot, | |
1022 | .devlink_sb_occ_max_clear = felix_sb_occ_max_clear, | |
1023 | .devlink_sb_occ_port_pool_get = felix_sb_occ_port_pool_get, | |
1024 | .devlink_sb_occ_tc_port_bind_get= felix_sb_occ_tc_port_bind_get, | |
56051948 | 1025 | }; |
319e4dd1 VO |
1026 | |
1027 | struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port) | |
1028 | { | |
1029 | struct felix *felix = ocelot_to_felix(ocelot); | |
1030 | struct dsa_switch *ds = felix->ds; | |
1031 | ||
1032 | if (!dsa_is_user_port(ds, port)) | |
1033 | return NULL; | |
1034 | ||
1035 | return dsa_to_port(ds, port)->slave; | |
1036 | } | |
1037 | ||
1038 | int felix_netdev_to_port(struct net_device *dev) | |
1039 | { | |
1040 | struct dsa_port *dp; | |
1041 | ||
1042 | dp = dsa_port_from_netdev(dev); | |
1043 | if (IS_ERR(dp)) | |
1044 | return -EINVAL; | |
1045 | ||
1046 | return dp->index; | |
1047 | } |