]>
Commit | Line | Data |
---|---|---|
56051948 VO |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* Copyright 2019 NXP Semiconductors | |
3 | */ | |
4 | #include <uapi/linux/if_bridge.h> | |
07d985ee | 5 | #include <soc/mscc/ocelot_vcap.h> |
bdeced75 VO |
6 | #include <soc/mscc/ocelot_qsys.h> |
7 | #include <soc/mscc/ocelot_sys.h> | |
8 | #include <soc/mscc/ocelot_dev.h> | |
9 | #include <soc/mscc/ocelot_ana.h> | |
56051948 | 10 | #include <soc/mscc/ocelot.h> |
c0bcf537 | 11 | #include <linux/packing.h> |
56051948 | 12 | #include <linux/module.h> |
bdeced75 | 13 | #include <linux/of_net.h> |
56051948 VO |
14 | #include <linux/pci.h> |
15 | #include <linux/of.h> | |
16 | #include <net/dsa.h> | |
17 | #include "felix.h" | |
18 | ||
19 | static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, | |
4d776482 FF |
20 | int port, |
21 | enum dsa_tag_protocol mp) | |
56051948 VO |
22 | { |
23 | return DSA_TAG_PROTO_OCELOT; | |
24 | } | |
25 | ||
26 | static int felix_set_ageing_time(struct dsa_switch *ds, | |
27 | unsigned int ageing_time) | |
28 | { | |
29 | struct ocelot *ocelot = ds->priv; | |
30 | ||
31 | ocelot_set_ageing_time(ocelot, ageing_time); | |
32 | ||
33 | return 0; | |
34 | } | |
35 | ||
56051948 VO |
36 | static int felix_fdb_dump(struct dsa_switch *ds, int port, |
37 | dsa_fdb_dump_cb_t *cb, void *data) | |
38 | { | |
39 | struct ocelot *ocelot = ds->priv; | |
40 | ||
41 | return ocelot_fdb_dump(ocelot, port, cb, data); | |
42 | } | |
43 | ||
44 | static int felix_fdb_add(struct dsa_switch *ds, int port, | |
45 | const unsigned char *addr, u16 vid) | |
46 | { | |
47 | struct ocelot *ocelot = ds->priv; | |
48 | bool vlan_aware; | |
49 | ||
50 | vlan_aware = dsa_port_is_vlan_filtering(dsa_to_port(ds, port)); | |
51 | ||
52 | return ocelot_fdb_add(ocelot, port, addr, vid, vlan_aware); | |
53 | } | |
54 | ||
55 | static int felix_fdb_del(struct dsa_switch *ds, int port, | |
56 | const unsigned char *addr, u16 vid) | |
57 | { | |
58 | struct ocelot *ocelot = ds->priv; | |
59 | ||
60 | return ocelot_fdb_del(ocelot, port, addr, vid); | |
61 | } | |
62 | ||
63 | static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port, | |
64 | u8 state) | |
65 | { | |
66 | struct ocelot *ocelot = ds->priv; | |
67 | ||
68 | return ocelot_bridge_stp_state_set(ocelot, port, state); | |
69 | } | |
70 | ||
71 | static int felix_bridge_join(struct dsa_switch *ds, int port, | |
72 | struct net_device *br) | |
73 | { | |
74 | struct ocelot *ocelot = ds->priv; | |
75 | ||
76 | return ocelot_port_bridge_join(ocelot, port, br); | |
77 | } | |
78 | ||
79 | static void felix_bridge_leave(struct dsa_switch *ds, int port, | |
80 | struct net_device *br) | |
81 | { | |
82 | struct ocelot *ocelot = ds->priv; | |
83 | ||
84 | ocelot_port_bridge_leave(ocelot, port, br); | |
85 | } | |
86 | ||
87 | /* This callback needs to be present */ | |
88 | static int felix_vlan_prepare(struct dsa_switch *ds, int port, | |
89 | const struct switchdev_obj_port_vlan *vlan) | |
90 | { | |
91 | return 0; | |
92 | } | |
93 | ||
94 | static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled) | |
95 | { | |
96 | struct ocelot *ocelot = ds->priv; | |
97 | ||
98 | ocelot_port_vlan_filtering(ocelot, port, enabled); | |
99 | ||
100 | return 0; | |
101 | } | |
102 | ||
103 | static void felix_vlan_add(struct dsa_switch *ds, int port, | |
104 | const struct switchdev_obj_port_vlan *vlan) | |
105 | { | |
106 | struct ocelot *ocelot = ds->priv; | |
107 | u16 vid; | |
108 | int err; | |
109 | ||
110 | for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { | |
111 | err = ocelot_vlan_add(ocelot, port, vid, | |
112 | vlan->flags & BRIDGE_VLAN_INFO_PVID, | |
113 | vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED); | |
114 | if (err) { | |
115 | dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n", | |
116 | vid, port, err); | |
117 | return; | |
118 | } | |
119 | } | |
120 | } | |
121 | ||
122 | static int felix_vlan_del(struct dsa_switch *ds, int port, | |
123 | const struct switchdev_obj_port_vlan *vlan) | |
124 | { | |
125 | struct ocelot *ocelot = ds->priv; | |
126 | u16 vid; | |
127 | int err; | |
128 | ||
129 | for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { | |
130 | err = ocelot_vlan_del(ocelot, port, vid); | |
131 | if (err) { | |
132 | dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n", | |
133 | vid, port, err); | |
134 | return err; | |
135 | } | |
136 | } | |
137 | return 0; | |
138 | } | |
139 | ||
140 | static int felix_port_enable(struct dsa_switch *ds, int port, | |
141 | struct phy_device *phy) | |
142 | { | |
143 | struct ocelot *ocelot = ds->priv; | |
144 | ||
145 | ocelot_port_enable(ocelot, port, phy); | |
146 | ||
147 | return 0; | |
148 | } | |
149 | ||
150 | static void felix_port_disable(struct dsa_switch *ds, int port) | |
151 | { | |
152 | struct ocelot *ocelot = ds->priv; | |
153 | ||
154 | return ocelot_port_disable(ocelot, port); | |
155 | } | |
156 | ||
bdeced75 VO |
157 | static void felix_phylink_validate(struct dsa_switch *ds, int port, |
158 | unsigned long *supported, | |
159 | struct phylink_link_state *state) | |
160 | { | |
161 | struct ocelot *ocelot = ds->priv; | |
162 | struct ocelot_port *ocelot_port = ocelot->ports[port]; | |
163 | __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; | |
164 | ||
165 | if (state->interface != PHY_INTERFACE_MODE_NA && | |
166 | state->interface != ocelot_port->phy_mode) { | |
167 | bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); | |
168 | return; | |
169 | } | |
170 | ||
171 | /* No half-duplex. */ | |
172 | phylink_set_port_modes(mask); | |
173 | phylink_set(mask, Autoneg); | |
174 | phylink_set(mask, Pause); | |
175 | phylink_set(mask, Asym_Pause); | |
74984a19 AM |
176 | phylink_set(mask, 10baseT_Full); |
177 | phylink_set(mask, 100baseT_Full); | |
178 | phylink_set(mask, 1000baseT_Full); | |
179 | ||
28a134f5 | 180 | if (state->interface == PHY_INTERFACE_MODE_INTERNAL || |
bdeced75 VO |
181 | state->interface == PHY_INTERFACE_MODE_2500BASEX || |
182 | state->interface == PHY_INTERFACE_MODE_USXGMII) { | |
183 | phylink_set(mask, 2500baseT_Full); | |
184 | phylink_set(mask, 2500baseX_Full); | |
185 | } | |
186 | ||
187 | bitmap_and(supported, supported, mask, | |
188 | __ETHTOOL_LINK_MODE_MASK_NBITS); | |
189 | bitmap_and(state->advertising, state->advertising, mask, | |
190 | __ETHTOOL_LINK_MODE_MASK_NBITS); | |
191 | } | |
192 | ||
193 | static int felix_phylink_mac_pcs_get_state(struct dsa_switch *ds, int port, | |
194 | struct phylink_link_state *state) | |
195 | { | |
196 | struct ocelot *ocelot = ds->priv; | |
197 | struct felix *felix = ocelot_to_felix(ocelot); | |
198 | ||
199 | if (felix->info->pcs_link_state) | |
200 | felix->info->pcs_link_state(ocelot, port, state); | |
201 | ||
202 | return 0; | |
203 | } | |
204 | ||
205 | static void felix_phylink_mac_config(struct dsa_switch *ds, int port, | |
206 | unsigned int link_an_mode, | |
207 | const struct phylink_link_state *state) | |
208 | { | |
209 | struct ocelot *ocelot = ds->priv; | |
210 | struct ocelot_port *ocelot_port = ocelot->ports[port]; | |
211 | struct felix *felix = ocelot_to_felix(ocelot); | |
212 | u32 mac_fc_cfg; | |
213 | ||
214 | /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and | |
215 | * PORT_RST bits in CLOCK_CFG | |
216 | */ | |
217 | ocelot_port_writel(ocelot_port, DEV_CLOCK_CFG_LINK_SPEED(state->speed), | |
218 | DEV_CLOCK_CFG); | |
219 | ||
220 | /* Flow control. Link speed is only used here to evaluate the time | |
221 | * specification in incoming pause frames. | |
222 | */ | |
223 | mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(state->speed); | |
f3660937 AM |
224 | |
225 | /* handle Rx pause in all cases, with 2500base-X this is used for rate | |
226 | * adaptation. | |
227 | */ | |
228 | mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA; | |
229 | ||
bdeced75 VO |
230 | if (state->pause & MLO_PAUSE_TX) |
231 | mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA | | |
232 | SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) | | |
233 | SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) | | |
234 | SYS_MAC_FC_CFG_ZERO_PAUSE_ENA; | |
235 | ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port); | |
236 | ||
237 | ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port); | |
238 | ||
239 | if (felix->info->pcs_init) | |
240 | felix->info->pcs_init(ocelot, port, link_an_mode, state); | |
241 | } | |
242 | ||
243 | static void felix_phylink_mac_an_restart(struct dsa_switch *ds, int port) | |
244 | { | |
245 | struct ocelot *ocelot = ds->priv; | |
246 | struct felix *felix = ocelot_to_felix(ocelot); | |
247 | ||
248 | if (felix->info->pcs_an_restart) | |
249 | felix->info->pcs_an_restart(ocelot, port); | |
250 | } | |
251 | ||
252 | static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port, | |
253 | unsigned int link_an_mode, | |
254 | phy_interface_t interface) | |
255 | { | |
256 | struct ocelot *ocelot = ds->priv; | |
257 | struct ocelot_port *ocelot_port = ocelot->ports[port]; | |
258 | ||
259 | ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG); | |
260 | ocelot_rmw_rix(ocelot, 0, QSYS_SWITCH_PORT_MODE_PORT_ENA, | |
261 | QSYS_SWITCH_PORT_MODE, port); | |
262 | } | |
263 | ||
264 | static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port, | |
265 | unsigned int link_an_mode, | |
266 | phy_interface_t interface, | |
5b502a7b RK |
267 | struct phy_device *phydev, |
268 | int speed, int duplex, | |
269 | bool tx_pause, bool rx_pause) | |
bdeced75 VO |
270 | { |
271 | struct ocelot *ocelot = ds->priv; | |
272 | struct ocelot_port *ocelot_port = ocelot->ports[port]; | |
273 | ||
274 | /* Enable MAC module */ | |
275 | ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA | | |
276 | DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG); | |
277 | ||
278 | /* Enable receiving frames on the port, and activate auto-learning of | |
279 | * MAC addresses. | |
280 | */ | |
281 | ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO | | |
282 | ANA_PORT_PORT_CFG_RECV_ENA | | |
283 | ANA_PORT_PORT_CFG_PORTID_VAL(port), | |
284 | ANA_PORT_PORT_CFG, port); | |
285 | ||
286 | /* Core: Enable port for frame transfer */ | |
287 | ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE | | |
288 | QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG(1) | | |
289 | QSYS_SWITCH_PORT_MODE_PORT_ENA, | |
290 | QSYS_SWITCH_PORT_MODE, port); | |
291 | } | |
292 | ||
56051948 VO |
293 | static void felix_get_strings(struct dsa_switch *ds, int port, |
294 | u32 stringset, u8 *data) | |
295 | { | |
296 | struct ocelot *ocelot = ds->priv; | |
297 | ||
298 | return ocelot_get_strings(ocelot, port, stringset, data); | |
299 | } | |
300 | ||
301 | static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data) | |
302 | { | |
303 | struct ocelot *ocelot = ds->priv; | |
304 | ||
305 | ocelot_get_ethtool_stats(ocelot, port, data); | |
306 | } | |
307 | ||
308 | static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset) | |
309 | { | |
310 | struct ocelot *ocelot = ds->priv; | |
311 | ||
312 | return ocelot_get_sset_count(ocelot, port, sset); | |
313 | } | |
314 | ||
315 | static int felix_get_ts_info(struct dsa_switch *ds, int port, | |
316 | struct ethtool_ts_info *info) | |
317 | { | |
318 | struct ocelot *ocelot = ds->priv; | |
319 | ||
320 | return ocelot_get_ts_info(ocelot, port, info); | |
321 | } | |
322 | ||
bdeced75 VO |
323 | static int felix_parse_ports_node(struct felix *felix, |
324 | struct device_node *ports_node, | |
325 | phy_interface_t *port_phy_modes) | |
326 | { | |
327 | struct ocelot *ocelot = &felix->ocelot; | |
328 | struct device *dev = felix->ocelot.dev; | |
329 | struct device_node *child; | |
330 | ||
37fe45ad | 331 | for_each_available_child_of_node(ports_node, child) { |
bdeced75 VO |
332 | phy_interface_t phy_mode; |
333 | u32 port; | |
334 | int err; | |
335 | ||
336 | /* Get switch port number from DT */ | |
337 | if (of_property_read_u32(child, "reg", &port) < 0) { | |
338 | dev_err(dev, "Port number not defined in device tree " | |
339 | "(property \"reg\")\n"); | |
340 | of_node_put(child); | |
341 | return -ENODEV; | |
342 | } | |
343 | ||
344 | /* Get PHY mode from DT */ | |
345 | err = of_get_phy_mode(child, &phy_mode); | |
346 | if (err) { | |
347 | dev_err(dev, "Failed to read phy-mode or " | |
348 | "phy-interface-type property for port %d\n", | |
349 | port); | |
350 | of_node_put(child); | |
351 | return -ENODEV; | |
352 | } | |
353 | ||
354 | err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode); | |
355 | if (err < 0) { | |
356 | dev_err(dev, "Unsupported PHY mode %s on port %d\n", | |
357 | phy_modes(phy_mode), port); | |
358 | return err; | |
359 | } | |
360 | ||
361 | port_phy_modes[port] = phy_mode; | |
362 | } | |
363 | ||
364 | return 0; | |
365 | } | |
366 | ||
367 | static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes) | |
368 | { | |
369 | struct device *dev = felix->ocelot.dev; | |
370 | struct device_node *switch_node; | |
371 | struct device_node *ports_node; | |
372 | int err; | |
373 | ||
374 | switch_node = dev->of_node; | |
375 | ||
376 | ports_node = of_get_child_by_name(switch_node, "ports"); | |
377 | if (!ports_node) { | |
378 | dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); | |
379 | return -ENODEV; | |
380 | } | |
381 | ||
382 | err = felix_parse_ports_node(felix, ports_node, port_phy_modes); | |
383 | of_node_put(ports_node); | |
384 | ||
385 | return err; | |
386 | } | |
387 | ||
56051948 VO |
388 | static int felix_init_structs(struct felix *felix, int num_phys_ports) |
389 | { | |
390 | struct ocelot *ocelot = &felix->ocelot; | |
bdeced75 VO |
391 | phy_interface_t *port_phy_modes; |
392 | resource_size_t switch_base; | |
56051948 VO |
393 | int port, i, err; |
394 | ||
395 | ocelot->num_phys_ports = num_phys_ports; | |
396 | ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports, | |
397 | sizeof(struct ocelot_port *), GFP_KERNEL); | |
398 | if (!ocelot->ports) | |
399 | return -ENOMEM; | |
400 | ||
401 | ocelot->map = felix->info->map; | |
402 | ocelot->stats_layout = felix->info->stats_layout; | |
403 | ocelot->num_stats = felix->info->num_stats; | |
404 | ocelot->shared_queue_sz = felix->info->shared_queue_sz; | |
07d985ee VO |
405 | ocelot->vcap_is2_keys = felix->info->vcap_is2_keys; |
406 | ocelot->vcap_is2_actions= felix->info->vcap_is2_actions; | |
407 | ocelot->vcap = felix->info->vcap; | |
56051948 VO |
408 | ocelot->ops = felix->info->ops; |
409 | ||
bdeced75 VO |
410 | port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t), |
411 | GFP_KERNEL); | |
412 | if (!port_phy_modes) | |
413 | return -ENOMEM; | |
414 | ||
415 | err = felix_parse_dt(felix, port_phy_modes); | |
416 | if (err) { | |
417 | kfree(port_phy_modes); | |
418 | return err; | |
419 | } | |
420 | ||
421 | switch_base = pci_resource_start(felix->pdev, | |
422 | felix->info->switch_pci_bar); | |
56051948 VO |
423 | |
424 | for (i = 0; i < TARGET_MAX; i++) { | |
425 | struct regmap *target; | |
426 | struct resource *res; | |
427 | ||
428 | if (!felix->info->target_io_res[i].name) | |
429 | continue; | |
430 | ||
431 | res = &felix->info->target_io_res[i]; | |
432 | res->flags = IORESOURCE_MEM; | |
bdeced75 VO |
433 | res->start += switch_base; |
434 | res->end += switch_base; | |
56051948 VO |
435 | |
436 | target = ocelot_regmap_init(ocelot, res); | |
437 | if (IS_ERR(target)) { | |
438 | dev_err(ocelot->dev, | |
439 | "Failed to map device memory space\n"); | |
bdeced75 | 440 | kfree(port_phy_modes); |
56051948 VO |
441 | return PTR_ERR(target); |
442 | } | |
443 | ||
444 | ocelot->targets[i] = target; | |
445 | } | |
446 | ||
447 | err = ocelot_regfields_init(ocelot, felix->info->regfields); | |
448 | if (err) { | |
449 | dev_err(ocelot->dev, "failed to init reg fields map\n"); | |
bdeced75 | 450 | kfree(port_phy_modes); |
56051948 VO |
451 | return err; |
452 | } | |
453 | ||
454 | for (port = 0; port < num_phys_ports; port++) { | |
455 | struct ocelot_port *ocelot_port; | |
456 | void __iomem *port_regs; | |
457 | struct resource *res; | |
458 | ||
459 | ocelot_port = devm_kzalloc(ocelot->dev, | |
460 | sizeof(struct ocelot_port), | |
461 | GFP_KERNEL); | |
462 | if (!ocelot_port) { | |
463 | dev_err(ocelot->dev, | |
464 | "failed to allocate port memory\n"); | |
bdeced75 | 465 | kfree(port_phy_modes); |
56051948 VO |
466 | return -ENOMEM; |
467 | } | |
468 | ||
469 | res = &felix->info->port_io_res[port]; | |
470 | res->flags = IORESOURCE_MEM; | |
bdeced75 VO |
471 | res->start += switch_base; |
472 | res->end += switch_base; | |
56051948 VO |
473 | |
474 | port_regs = devm_ioremap_resource(ocelot->dev, res); | |
475 | if (IS_ERR(port_regs)) { | |
476 | dev_err(ocelot->dev, | |
477 | "failed to map registers for port %d\n", port); | |
bdeced75 | 478 | kfree(port_phy_modes); |
56051948 VO |
479 | return PTR_ERR(port_regs); |
480 | } | |
481 | ||
bdeced75 | 482 | ocelot_port->phy_mode = port_phy_modes[port]; |
56051948 VO |
483 | ocelot_port->ocelot = ocelot; |
484 | ocelot_port->regs = port_regs; | |
485 | ocelot->ports[port] = ocelot_port; | |
486 | } | |
487 | ||
bdeced75 VO |
488 | kfree(port_phy_modes); |
489 | ||
490 | if (felix->info->mdio_bus_alloc) { | |
491 | err = felix->info->mdio_bus_alloc(ocelot); | |
492 | if (err < 0) | |
493 | return err; | |
494 | } | |
495 | ||
56051948 VO |
496 | return 0; |
497 | } | |
498 | ||
499 | /* Hardware initialization done here so that we can allocate structures with | |
500 | * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing | |
501 | * us to allocate structures twice (leak memory) and map PCI memory twice | |
502 | * (which will not work). | |
503 | */ | |
504 | static int felix_setup(struct dsa_switch *ds) | |
505 | { | |
506 | struct ocelot *ocelot = ds->priv; | |
507 | struct felix *felix = ocelot_to_felix(ocelot); | |
508 | int port, err; | |
509 | ||
510 | err = felix_init_structs(felix, ds->num_ports); | |
511 | if (err) | |
512 | return err; | |
513 | ||
514 | ocelot_init(ocelot); | |
515 | ||
516 | for (port = 0; port < ds->num_ports; port++) { | |
517 | ocelot_init_port(ocelot, port); | |
518 | ||
69df578c | 519 | /* Bring up the CPU port module and configure the NPI port */ |
b8fc7177 | 520 | if (dsa_is_cpu_port(ds, port)) |
69df578c VO |
521 | ocelot_configure_cpu(ocelot, port, |
522 | OCELOT_TAG_PREFIX_NONE, | |
523 | OCELOT_TAG_PREFIX_LONG); | |
56051948 VO |
524 | } |
525 | ||
1cf3299b VO |
526 | /* Include the CPU port module in the forwarding mask for unknown |
527 | * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST | |
528 | * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since | |
529 | * Ocelot relies on whitelisting MAC addresses towards PGID_CPU. | |
530 | */ | |
531 | ocelot_write_rix(ocelot, | |
532 | ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), | |
533 | ANA_PGID_PGID, PGID_UC); | |
534 | ||
bdeced75 VO |
535 | /* It looks like the MAC/PCS interrupt register - PM0_IEVENT (0x8040) |
536 | * isn't instantiated for the Felix PF. | |
537 | * In-band AN may take a few ms to complete, so we need to poll. | |
538 | */ | |
539 | ds->pcs_poll = true; | |
540 | ||
56051948 VO |
541 | return 0; |
542 | } | |
543 | ||
544 | static void felix_teardown(struct dsa_switch *ds) | |
545 | { | |
546 | struct ocelot *ocelot = ds->priv; | |
bdeced75 VO |
547 | struct felix *felix = ocelot_to_felix(ocelot); |
548 | ||
549 | if (felix->info->mdio_bus_free) | |
550 | felix->info->mdio_bus_free(ocelot); | |
56051948 VO |
551 | |
552 | /* stop workqueue thread */ | |
553 | ocelot_deinit(ocelot); | |
554 | } | |
555 | ||
c0bcf537 YL |
556 | static int felix_hwtstamp_get(struct dsa_switch *ds, int port, |
557 | struct ifreq *ifr) | |
558 | { | |
559 | struct ocelot *ocelot = ds->priv; | |
560 | ||
561 | return ocelot_hwstamp_get(ocelot, port, ifr); | |
562 | } | |
563 | ||
564 | static int felix_hwtstamp_set(struct dsa_switch *ds, int port, | |
565 | struct ifreq *ifr) | |
566 | { | |
567 | struct ocelot *ocelot = ds->priv; | |
568 | ||
569 | return ocelot_hwstamp_set(ocelot, port, ifr); | |
570 | } | |
571 | ||
572 | static bool felix_rxtstamp(struct dsa_switch *ds, int port, | |
573 | struct sk_buff *skb, unsigned int type) | |
574 | { | |
575 | struct skb_shared_hwtstamps *shhwtstamps; | |
576 | struct ocelot *ocelot = ds->priv; | |
577 | u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN; | |
578 | u32 tstamp_lo, tstamp_hi; | |
579 | struct timespec64 ts; | |
580 | u64 tstamp, val; | |
581 | ||
582 | ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); | |
583 | tstamp = ktime_set(ts.tv_sec, ts.tv_nsec); | |
584 | ||
585 | packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0); | |
586 | tstamp_lo = (u32)val; | |
587 | ||
588 | tstamp_hi = tstamp >> 32; | |
589 | if ((tstamp & 0xffffffff) < tstamp_lo) | |
590 | tstamp_hi--; | |
591 | ||
592 | tstamp = ((u64)tstamp_hi << 32) | tstamp_lo; | |
593 | ||
594 | shhwtstamps = skb_hwtstamps(skb); | |
595 | memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); | |
596 | shhwtstamps->hwtstamp = tstamp; | |
597 | return false; | |
598 | } | |
599 | ||
3243e04a CW |
600 | static bool felix_txtstamp(struct dsa_switch *ds, int port, |
601 | struct sk_buff *clone, unsigned int type) | |
c0bcf537 YL |
602 | { |
603 | struct ocelot *ocelot = ds->priv; | |
604 | struct ocelot_port *ocelot_port = ocelot->ports[port]; | |
605 | ||
606 | if (!ocelot_port_add_txtstamp_skb(ocelot_port, clone)) | |
607 | return true; | |
608 | ||
609 | return false; | |
610 | } | |
611 | ||
07d985ee VO |
612 | static int felix_cls_flower_add(struct dsa_switch *ds, int port, |
613 | struct flow_cls_offload *cls, bool ingress) | |
614 | { | |
615 | struct ocelot *ocelot = ds->priv; | |
616 | ||
617 | return ocelot_cls_flower_replace(ocelot, port, cls, ingress); | |
618 | } | |
619 | ||
620 | static int felix_cls_flower_del(struct dsa_switch *ds, int port, | |
621 | struct flow_cls_offload *cls, bool ingress) | |
622 | { | |
623 | struct ocelot *ocelot = ds->priv; | |
624 | ||
625 | return ocelot_cls_flower_destroy(ocelot, port, cls, ingress); | |
626 | } | |
627 | ||
628 | static int felix_cls_flower_stats(struct dsa_switch *ds, int port, | |
629 | struct flow_cls_offload *cls, bool ingress) | |
630 | { | |
631 | struct ocelot *ocelot = ds->priv; | |
632 | ||
633 | return ocelot_cls_flower_stats(ocelot, port, cls, ingress); | |
634 | } | |
635 | ||
56051948 VO |
636 | static const struct dsa_switch_ops felix_switch_ops = { |
637 | .get_tag_protocol = felix_get_tag_protocol, | |
638 | .setup = felix_setup, | |
639 | .teardown = felix_teardown, | |
640 | .set_ageing_time = felix_set_ageing_time, | |
641 | .get_strings = felix_get_strings, | |
642 | .get_ethtool_stats = felix_get_ethtool_stats, | |
643 | .get_sset_count = felix_get_sset_count, | |
644 | .get_ts_info = felix_get_ts_info, | |
bdeced75 VO |
645 | .phylink_validate = felix_phylink_validate, |
646 | .phylink_mac_link_state = felix_phylink_mac_pcs_get_state, | |
647 | .phylink_mac_config = felix_phylink_mac_config, | |
648 | .phylink_mac_an_restart = felix_phylink_mac_an_restart, | |
649 | .phylink_mac_link_down = felix_phylink_mac_link_down, | |
650 | .phylink_mac_link_up = felix_phylink_mac_link_up, | |
56051948 VO |
651 | .port_enable = felix_port_enable, |
652 | .port_disable = felix_port_disable, | |
653 | .port_fdb_dump = felix_fdb_dump, | |
654 | .port_fdb_add = felix_fdb_add, | |
655 | .port_fdb_del = felix_fdb_del, | |
656 | .port_bridge_join = felix_bridge_join, | |
657 | .port_bridge_leave = felix_bridge_leave, | |
658 | .port_stp_state_set = felix_bridge_stp_state_set, | |
659 | .port_vlan_prepare = felix_vlan_prepare, | |
660 | .port_vlan_filtering = felix_vlan_filtering, | |
661 | .port_vlan_add = felix_vlan_add, | |
662 | .port_vlan_del = felix_vlan_del, | |
c0bcf537 YL |
663 | .port_hwtstamp_get = felix_hwtstamp_get, |
664 | .port_hwtstamp_set = felix_hwtstamp_set, | |
665 | .port_rxtstamp = felix_rxtstamp, | |
666 | .port_txtstamp = felix_txtstamp, | |
07d985ee VO |
667 | .cls_flower_add = felix_cls_flower_add, |
668 | .cls_flower_del = felix_cls_flower_del, | |
669 | .cls_flower_stats = felix_cls_flower_stats, | |
56051948 VO |
670 | }; |
671 | ||
672 | static struct felix_info *felix_instance_tbl[] = { | |
673 | [FELIX_INSTANCE_VSC9959] = &felix_info_vsc9959, | |
674 | }; | |
675 | ||
c0bcf537 YL |
676 | static irqreturn_t felix_irq_handler(int irq, void *data) |
677 | { | |
678 | struct ocelot *ocelot = (struct ocelot *)data; | |
679 | ||
680 | /* The INTB interrupt is used for both PTP TX timestamp interrupt | |
681 | * and preemption status change interrupt on each port. | |
682 | * | |
683 | * - Get txtstamp if have | |
684 | * - TODO: handle preemption. Without handling it, driver may get | |
685 | * interrupt storm. | |
686 | */ | |
687 | ||
688 | ocelot_get_txtstamp(ocelot); | |
689 | ||
690 | return IRQ_HANDLED; | |
691 | } | |
692 | ||
56051948 VO |
693 | static int felix_pci_probe(struct pci_dev *pdev, |
694 | const struct pci_device_id *id) | |
695 | { | |
696 | enum felix_instance instance = id->driver_data; | |
697 | struct dsa_switch *ds; | |
698 | struct ocelot *ocelot; | |
699 | struct felix *felix; | |
700 | int err; | |
701 | ||
702 | err = pci_enable_device(pdev); | |
703 | if (err) { | |
704 | dev_err(&pdev->dev, "device enable failed\n"); | |
705 | goto err_pci_enable; | |
706 | } | |
707 | ||
708 | /* set up for high or low dma */ | |
709 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); | |
710 | if (err) { | |
711 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); | |
712 | if (err) { | |
713 | dev_err(&pdev->dev, | |
714 | "DMA configuration failed: 0x%x\n", err); | |
715 | goto err_dma; | |
716 | } | |
717 | } | |
718 | ||
719 | felix = kzalloc(sizeof(struct felix), GFP_KERNEL); | |
720 | if (!felix) { | |
721 | err = -ENOMEM; | |
722 | dev_err(&pdev->dev, "Failed to allocate driver memory\n"); | |
723 | goto err_alloc_felix; | |
724 | } | |
725 | ||
726 | pci_set_drvdata(pdev, felix); | |
727 | ocelot = &felix->ocelot; | |
728 | ocelot->dev = &pdev->dev; | |
729 | felix->pdev = pdev; | |
730 | felix->info = felix_instance_tbl[instance]; | |
731 | ||
732 | pci_set_master(pdev); | |
733 | ||
c0bcf537 YL |
734 | err = devm_request_threaded_irq(&pdev->dev, pdev->irq, NULL, |
735 | &felix_irq_handler, IRQF_ONESHOT, | |
736 | "felix-intb", ocelot); | |
737 | if (err) { | |
738 | dev_err(&pdev->dev, "Failed to request irq\n"); | |
739 | goto err_alloc_irq; | |
740 | } | |
741 | ||
742 | ocelot->ptp = 1; | |
743 | ||
56051948 VO |
744 | ds = kzalloc(sizeof(struct dsa_switch), GFP_KERNEL); |
745 | if (!ds) { | |
746 | err = -ENOMEM; | |
747 | dev_err(&pdev->dev, "Failed to allocate DSA switch\n"); | |
748 | goto err_alloc_ds; | |
749 | } | |
750 | ||
751 | ds->dev = &pdev->dev; | |
752 | ds->num_ports = felix->info->num_ports; | |
753 | ds->ops = &felix_switch_ops; | |
754 | ds->priv = ocelot; | |
755 | felix->ds = ds; | |
756 | ||
757 | err = dsa_register_switch(ds); | |
758 | if (err) { | |
759 | dev_err(&pdev->dev, "Failed to register DSA switch: %d\n", err); | |
760 | goto err_register_ds; | |
761 | } | |
762 | ||
763 | return 0; | |
764 | ||
765 | err_register_ds: | |
766 | kfree(ds); | |
767 | err_alloc_ds: | |
c0bcf537 | 768 | err_alloc_irq: |
56051948 VO |
769 | err_alloc_felix: |
770 | kfree(felix); | |
771 | err_dma: | |
772 | pci_disable_device(pdev); | |
773 | err_pci_enable: | |
774 | return err; | |
775 | } | |
776 | ||
777 | static void felix_pci_remove(struct pci_dev *pdev) | |
778 | { | |
779 | struct felix *felix; | |
780 | ||
781 | felix = pci_get_drvdata(pdev); | |
782 | ||
783 | dsa_unregister_switch(felix->ds); | |
784 | ||
785 | kfree(felix->ds); | |
786 | kfree(felix); | |
787 | ||
788 | pci_disable_device(pdev); | |
789 | } | |
790 | ||
791 | static struct pci_device_id felix_ids[] = { | |
792 | { | |
793 | /* NXP LS1028A */ | |
794 | PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0xEEF0), | |
795 | .driver_data = FELIX_INSTANCE_VSC9959, | |
796 | }, | |
797 | { 0, } | |
798 | }; | |
799 | MODULE_DEVICE_TABLE(pci, felix_ids); | |
800 | ||
801 | static struct pci_driver felix_pci_driver = { | |
802 | .name = KBUILD_MODNAME, | |
803 | .id_table = felix_ids, | |
804 | .probe = felix_pci_probe, | |
805 | .remove = felix_pci_remove, | |
806 | }; | |
807 | ||
808 | module_pci_driver(felix_pci_driver); | |
809 | ||
810 | MODULE_DESCRIPTION("Felix Switch driver"); | |
811 | MODULE_LICENSE("GPL v2"); |