]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
0abb6eb1 AK |
3 | Intel PRO/1000 Linux driver |
4 | Copyright(c) 1999 - 2006 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
1da177e4 | 13 | more details. |
0abb6eb1 | 14 | |
1da177e4 | 15 | You should have received a copy of the GNU General Public License along with |
0abb6eb1 AK |
16 | this program; if not, write to the Free Software Foundation, Inc., |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
1da177e4 LT |
22 | Contact Information: |
23 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | /* ethtool support for e1000 */ | |
30 | ||
31 | #include "e1000.h" | |
1da177e4 LT |
32 | #include <asm/uaccess.h> |
33 | ||
8328c38f AK |
34 | enum {NETDEV_STATS, E1000_STATS}; |
35 | ||
1da177e4 LT |
36 | struct e1000_stats { |
37 | char stat_string[ETH_GSTRING_LEN]; | |
8328c38f | 38 | int type; |
1da177e4 LT |
39 | int sizeof_stat; |
40 | int stat_offset; | |
41 | }; | |
42 | ||
8328c38f AK |
43 | #define E1000_STAT(m) E1000_STATS, \ |
44 | sizeof(((struct e1000_adapter *)0)->m), \ | |
45 | offsetof(struct e1000_adapter, m) | |
46 | #define E1000_NETDEV_STAT(m) NETDEV_STATS, \ | |
47 | sizeof(((struct net_device *)0)->m), \ | |
48 | offsetof(struct net_device, m) | |
49 | ||
1da177e4 | 50 | static const struct e1000_stats e1000_gstrings_stats[] = { |
49559854 MW |
51 | { "rx_packets", E1000_STAT(stats.gprc) }, |
52 | { "tx_packets", E1000_STAT(stats.gptc) }, | |
53 | { "rx_bytes", E1000_STAT(stats.gorcl) }, | |
54 | { "tx_bytes", E1000_STAT(stats.gotcl) }, | |
55 | { "rx_broadcast", E1000_STAT(stats.bprc) }, | |
56 | { "tx_broadcast", E1000_STAT(stats.bptc) }, | |
57 | { "rx_multicast", E1000_STAT(stats.mprc) }, | |
58 | { "tx_multicast", E1000_STAT(stats.mptc) }, | |
59 | { "rx_errors", E1000_STAT(stats.rxerrc) }, | |
60 | { "tx_errors", E1000_STAT(stats.txerrc) }, | |
5fe31def | 61 | { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) }, |
49559854 MW |
62 | { "multicast", E1000_STAT(stats.mprc) }, |
63 | { "collisions", E1000_STAT(stats.colc) }, | |
64 | { "rx_length_errors", E1000_STAT(stats.rlerrc) }, | |
5fe31def | 65 | { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) }, |
49559854 | 66 | { "rx_crc_errors", E1000_STAT(stats.crcerrs) }, |
5fe31def | 67 | { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) }, |
2648345f | 68 | { "rx_no_buffer_count", E1000_STAT(stats.rnbc) }, |
49559854 MW |
69 | { "rx_missed_errors", E1000_STAT(stats.mpc) }, |
70 | { "tx_aborted_errors", E1000_STAT(stats.ecol) }, | |
71 | { "tx_carrier_errors", E1000_STAT(stats.tncrs) }, | |
5fe31def AK |
72 | { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) }, |
73 | { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) }, | |
49559854 | 74 | { "tx_window_errors", E1000_STAT(stats.latecol) }, |
1da177e4 LT |
75 | { "tx_abort_late_coll", E1000_STAT(stats.latecol) }, |
76 | { "tx_deferred_ok", E1000_STAT(stats.dc) }, | |
77 | { "tx_single_coll_ok", E1000_STAT(stats.scc) }, | |
78 | { "tx_multi_coll_ok", E1000_STAT(stats.mcc) }, | |
6b7660cd | 79 | { "tx_timeout_count", E1000_STAT(tx_timeout_count) }, |
fcfb1224 | 80 | { "tx_restart_queue", E1000_STAT(restart_queue) }, |
1da177e4 LT |
81 | { "rx_long_length_errors", E1000_STAT(stats.roc) }, |
82 | { "rx_short_length_errors", E1000_STAT(stats.ruc) }, | |
83 | { "rx_align_errors", E1000_STAT(stats.algnerrc) }, | |
84 | { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) }, | |
85 | { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) }, | |
86 | { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) }, | |
87 | { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) }, | |
88 | { "tx_flow_control_xon", E1000_STAT(stats.xontxc) }, | |
89 | { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) }, | |
90 | { "rx_long_byte_count", E1000_STAT(stats.gorcl) }, | |
91 | { "rx_csum_offload_good", E1000_STAT(hw_csum_good) }, | |
e4c811c9 | 92 | { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }, |
6b7660cd | 93 | { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) }, |
15e376b4 JG |
94 | { "tx_smbus", E1000_STAT(stats.mgptc) }, |
95 | { "rx_smbus", E1000_STAT(stats.mgprc) }, | |
96 | { "dropped_smbus", E1000_STAT(stats.mgpdc) }, | |
1da177e4 | 97 | }; |
7bfa4816 | 98 | |
7bfa4816 | 99 | #define E1000_QUEUE_STATS_LEN 0 |
ff8ac609 | 100 | #define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats) |
7bfa4816 | 101 | #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN) |
1da177e4 LT |
102 | static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = { |
103 | "Register test (offline)", "Eeprom test (offline)", | |
104 | "Interrupt test (offline)", "Loopback test (offline)", | |
105 | "Link test (on/offline)" | |
106 | }; | |
4c3616cd | 107 | #define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test) |
1da177e4 | 108 | |
64798845 JP |
109 | static int e1000_get_settings(struct net_device *netdev, |
110 | struct ethtool_cmd *ecmd) | |
1da177e4 | 111 | { |
60490fe0 | 112 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
113 | struct e1000_hw *hw = &adapter->hw; |
114 | ||
96838a40 | 115 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
116 | |
117 | ecmd->supported = (SUPPORTED_10baseT_Half | | |
118 | SUPPORTED_10baseT_Full | | |
119 | SUPPORTED_100baseT_Half | | |
120 | SUPPORTED_100baseT_Full | | |
121 | SUPPORTED_1000baseT_Full| | |
122 | SUPPORTED_Autoneg | | |
123 | SUPPORTED_TP); | |
1da177e4 LT |
124 | ecmd->advertising = ADVERTISED_TP; |
125 | ||
96838a40 | 126 | if (hw->autoneg == 1) { |
1da177e4 | 127 | ecmd->advertising |= ADVERTISED_Autoneg; |
1da177e4 | 128 | /* the e1000 autoneg seems to match ethtool nicely */ |
1da177e4 LT |
129 | ecmd->advertising |= hw->autoneg_advertised; |
130 | } | |
131 | ||
132 | ecmd->port = PORT_TP; | |
133 | ecmd->phy_address = hw->phy_addr; | |
134 | ||
96838a40 | 135 | if (hw->mac_type == e1000_82543) |
1da177e4 LT |
136 | ecmd->transceiver = XCVR_EXTERNAL; |
137 | else | |
138 | ecmd->transceiver = XCVR_INTERNAL; | |
139 | ||
140 | } else { | |
141 | ecmd->supported = (SUPPORTED_1000baseT_Full | | |
142 | SUPPORTED_FIBRE | | |
143 | SUPPORTED_Autoneg); | |
144 | ||
012609a8 MC |
145 | ecmd->advertising = (ADVERTISED_1000baseT_Full | |
146 | ADVERTISED_FIBRE | | |
147 | ADVERTISED_Autoneg); | |
1da177e4 LT |
148 | |
149 | ecmd->port = PORT_FIBRE; | |
150 | ||
96838a40 | 151 | if (hw->mac_type >= e1000_82545) |
1da177e4 LT |
152 | ecmd->transceiver = XCVR_INTERNAL; |
153 | else | |
154 | ecmd->transceiver = XCVR_EXTERNAL; | |
155 | } | |
156 | ||
1dc32918 | 157 | if (er32(STATUS) & E1000_STATUS_LU) { |
1da177e4 LT |
158 | |
159 | e1000_get_speed_and_duplex(hw, &adapter->link_speed, | |
160 | &adapter->link_duplex); | |
161 | ecmd->speed = adapter->link_speed; | |
162 | ||
163 | /* unfortunatly FULL_DUPLEX != DUPLEX_FULL | |
164 | * and HALF_DUPLEX != DUPLEX_HALF */ | |
165 | ||
96838a40 | 166 | if (adapter->link_duplex == FULL_DUPLEX) |
1da177e4 LT |
167 | ecmd->duplex = DUPLEX_FULL; |
168 | else | |
169 | ecmd->duplex = DUPLEX_HALF; | |
170 | } else { | |
171 | ecmd->speed = -1; | |
172 | ecmd->duplex = -1; | |
173 | } | |
174 | ||
175 | ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) || | |
176 | hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE; | |
177 | return 0; | |
178 | } | |
179 | ||
64798845 JP |
180 | static int e1000_set_settings(struct net_device *netdev, |
181 | struct ethtool_cmd *ecmd) | |
1da177e4 | 182 | { |
60490fe0 | 183 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
184 | struct e1000_hw *hw = &adapter->hw; |
185 | ||
1a821ca5 JB |
186 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
187 | msleep(1); | |
188 | ||
57128197 | 189 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
1da177e4 | 190 | hw->autoneg = 1; |
96838a40 | 191 | if (hw->media_type == e1000_media_type_fiber) |
012609a8 MC |
192 | hw->autoneg_advertised = ADVERTISED_1000baseT_Full | |
193 | ADVERTISED_FIBRE | | |
194 | ADVERTISED_Autoneg; | |
96838a40 | 195 | else |
2f2ca263 JK |
196 | hw->autoneg_advertised = ecmd->advertising | |
197 | ADVERTISED_TP | | |
198 | ADVERTISED_Autoneg; | |
012609a8 | 199 | ecmd->advertising = hw->autoneg_advertised; |
1da177e4 | 200 | } else |
1a821ca5 JB |
201 | if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) { |
202 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 | 203 | return -EINVAL; |
1a821ca5 | 204 | } |
1da177e4 LT |
205 | |
206 | /* reset the link */ | |
207 | ||
1a821ca5 JB |
208 | if (netif_running(adapter->netdev)) { |
209 | e1000_down(adapter); | |
210 | e1000_up(adapter); | |
211 | } else | |
1da177e4 LT |
212 | e1000_reset(adapter); |
213 | ||
1a821ca5 | 214 | clear_bit(__E1000_RESETTING, &adapter->flags); |
1da177e4 LT |
215 | return 0; |
216 | } | |
217 | ||
b548192a NN |
218 | static u32 e1000_get_link(struct net_device *netdev) |
219 | { | |
220 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
221 | ||
222 | /* | |
223 | * If the link is not reported up to netdev, interrupts are disabled, | |
224 | * and so the physical link state may have changed since we last | |
225 | * looked. Set get_link_status to make sure that the true link | |
226 | * state is interrogated, rather than pulling a cached and possibly | |
227 | * stale link state from the driver. | |
228 | */ | |
229 | if (!netif_carrier_ok(netdev)) | |
230 | adapter->hw.get_link_status = 1; | |
231 | ||
232 | return e1000_has_link(adapter); | |
233 | } | |
234 | ||
64798845 JP |
235 | static void e1000_get_pauseparam(struct net_device *netdev, |
236 | struct ethtool_pauseparam *pause) | |
1da177e4 | 237 | { |
60490fe0 | 238 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
239 | struct e1000_hw *hw = &adapter->hw; |
240 | ||
96838a40 | 241 | pause->autoneg = |
1da177e4 | 242 | (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE); |
96838a40 | 243 | |
11241b10 | 244 | if (hw->fc == E1000_FC_RX_PAUSE) |
1da177e4 | 245 | pause->rx_pause = 1; |
11241b10 | 246 | else if (hw->fc == E1000_FC_TX_PAUSE) |
1da177e4 | 247 | pause->tx_pause = 1; |
11241b10 | 248 | else if (hw->fc == E1000_FC_FULL) { |
1da177e4 LT |
249 | pause->rx_pause = 1; |
250 | pause->tx_pause = 1; | |
251 | } | |
252 | } | |
253 | ||
64798845 JP |
254 | static int e1000_set_pauseparam(struct net_device *netdev, |
255 | struct ethtool_pauseparam *pause) | |
1da177e4 | 256 | { |
60490fe0 | 257 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 258 | struct e1000_hw *hw = &adapter->hw; |
1a821ca5 | 259 | int retval = 0; |
96838a40 | 260 | |
1da177e4 LT |
261 | adapter->fc_autoneg = pause->autoneg; |
262 | ||
1a821ca5 JB |
263 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
264 | msleep(1); | |
265 | ||
96838a40 | 266 | if (pause->rx_pause && pause->tx_pause) |
11241b10 | 267 | hw->fc = E1000_FC_FULL; |
96838a40 | 268 | else if (pause->rx_pause && !pause->tx_pause) |
11241b10 | 269 | hw->fc = E1000_FC_RX_PAUSE; |
96838a40 | 270 | else if (!pause->rx_pause && pause->tx_pause) |
11241b10 | 271 | hw->fc = E1000_FC_TX_PAUSE; |
96838a40 | 272 | else if (!pause->rx_pause && !pause->tx_pause) |
11241b10 | 273 | hw->fc = E1000_FC_NONE; |
1da177e4 LT |
274 | |
275 | hw->original_fc = hw->fc; | |
276 | ||
96838a40 | 277 | if (adapter->fc_autoneg == AUTONEG_ENABLE) { |
1a821ca5 JB |
278 | if (netif_running(adapter->netdev)) { |
279 | e1000_down(adapter); | |
280 | e1000_up(adapter); | |
281 | } else | |
1da177e4 | 282 | e1000_reset(adapter); |
96838a40 | 283 | } else |
1a821ca5 | 284 | retval = ((hw->media_type == e1000_media_type_fiber) ? |
90fb5135 | 285 | e1000_setup_link(hw) : e1000_force_mac_fc(hw)); |
96838a40 | 286 | |
1a821ca5 JB |
287 | clear_bit(__E1000_RESETTING, &adapter->flags); |
288 | return retval; | |
1da177e4 LT |
289 | } |
290 | ||
64798845 | 291 | static u32 e1000_get_rx_csum(struct net_device *netdev) |
1da177e4 | 292 | { |
60490fe0 | 293 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
294 | return adapter->rx_csum; |
295 | } | |
296 | ||
64798845 | 297 | static int e1000_set_rx_csum(struct net_device *netdev, u32 data) |
1da177e4 | 298 | { |
60490fe0 | 299 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
300 | adapter->rx_csum = data; |
301 | ||
2db10a08 AK |
302 | if (netif_running(netdev)) |
303 | e1000_reinit_locked(adapter); | |
304 | else | |
1da177e4 LT |
305 | e1000_reset(adapter); |
306 | return 0; | |
307 | } | |
96838a40 | 308 | |
64798845 | 309 | static u32 e1000_get_tx_csum(struct net_device *netdev) |
1da177e4 LT |
310 | { |
311 | return (netdev->features & NETIF_F_HW_CSUM) != 0; | |
312 | } | |
313 | ||
64798845 | 314 | static int e1000_set_tx_csum(struct net_device *netdev, u32 data) |
1da177e4 | 315 | { |
60490fe0 | 316 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 317 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 318 | |
1dc32918 | 319 | if (hw->mac_type < e1000_82543) { |
1da177e4 LT |
320 | if (!data) |
321 | return -EINVAL; | |
322 | return 0; | |
323 | } | |
324 | ||
325 | if (data) | |
326 | netdev->features |= NETIF_F_HW_CSUM; | |
327 | else | |
328 | netdev->features &= ~NETIF_F_HW_CSUM; | |
329 | ||
330 | return 0; | |
331 | } | |
332 | ||
64798845 | 333 | static int e1000_set_tso(struct net_device *netdev, u32 data) |
1da177e4 | 334 | { |
60490fe0 | 335 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 JP |
336 | struct e1000_hw *hw = &adapter->hw; |
337 | ||
338 | if ((hw->mac_type < e1000_82544) || | |
339 | (hw->mac_type == e1000_82547)) | |
1da177e4 LT |
340 | return data ? -EINVAL : 0; |
341 | ||
342 | if (data) | |
343 | netdev->features |= NETIF_F_TSO; | |
344 | else | |
345 | netdev->features &= ~NETIF_F_TSO; | |
7e6c9861 | 346 | |
1532ecea | 347 | netdev->features &= ~NETIF_F_TSO6; |
87ca4e5b | 348 | |
7e6c9861 | 349 | DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled"); |
c3033b01 | 350 | adapter->tso_force = true; |
1da177e4 | 351 | return 0; |
96838a40 | 352 | } |
1da177e4 | 353 | |
64798845 | 354 | static u32 e1000_get_msglevel(struct net_device *netdev) |
1da177e4 | 355 | { |
60490fe0 | 356 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
357 | return adapter->msg_enable; |
358 | } | |
359 | ||
64798845 | 360 | static void e1000_set_msglevel(struct net_device *netdev, u32 data) |
1da177e4 | 361 | { |
60490fe0 | 362 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
363 | adapter->msg_enable = data; |
364 | } | |
365 | ||
64798845 | 366 | static int e1000_get_regs_len(struct net_device *netdev) |
1da177e4 LT |
367 | { |
368 | #define E1000_REGS_LEN 32 | |
406874a7 | 369 | return E1000_REGS_LEN * sizeof(u32); |
1da177e4 LT |
370 | } |
371 | ||
64798845 JP |
372 | static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs, |
373 | void *p) | |
1da177e4 | 374 | { |
60490fe0 | 375 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 376 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
377 | u32 *regs_buff = p; |
378 | u16 phy_data; | |
1da177e4 | 379 | |
406874a7 | 380 | memset(p, 0, E1000_REGS_LEN * sizeof(u32)); |
1da177e4 LT |
381 | |
382 | regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id; | |
383 | ||
1dc32918 JP |
384 | regs_buff[0] = er32(CTRL); |
385 | regs_buff[1] = er32(STATUS); | |
1da177e4 | 386 | |
1dc32918 JP |
387 | regs_buff[2] = er32(RCTL); |
388 | regs_buff[3] = er32(RDLEN); | |
389 | regs_buff[4] = er32(RDH); | |
390 | regs_buff[5] = er32(RDT); | |
391 | regs_buff[6] = er32(RDTR); | |
1da177e4 | 392 | |
1dc32918 JP |
393 | regs_buff[7] = er32(TCTL); |
394 | regs_buff[8] = er32(TDLEN); | |
395 | regs_buff[9] = er32(TDH); | |
396 | regs_buff[10] = er32(TDT); | |
397 | regs_buff[11] = er32(TIDV); | |
1da177e4 | 398 | |
1dc32918 | 399 | regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */ |
96838a40 | 400 | if (hw->phy_type == e1000_phy_igp) { |
1da177e4 LT |
401 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
402 | IGP01E1000_PHY_AGC_A); | |
403 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A & | |
404 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 405 | regs_buff[13] = (u32)phy_data; /* cable length */ |
1da177e4 LT |
406 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
407 | IGP01E1000_PHY_AGC_B); | |
408 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B & | |
409 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 410 | regs_buff[14] = (u32)phy_data; /* cable length */ |
1da177e4 LT |
411 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
412 | IGP01E1000_PHY_AGC_C); | |
413 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C & | |
414 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 415 | regs_buff[15] = (u32)phy_data; /* cable length */ |
1da177e4 LT |
416 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
417 | IGP01E1000_PHY_AGC_D); | |
418 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D & | |
419 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 420 | regs_buff[16] = (u32)phy_data; /* cable length */ |
1da177e4 LT |
421 | regs_buff[17] = 0; /* extended 10bt distance (not needed) */ |
422 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0); | |
423 | e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS & | |
424 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 425 | regs_buff[18] = (u32)phy_data; /* cable polarity */ |
1da177e4 LT |
426 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
427 | IGP01E1000_PHY_PCS_INIT_REG); | |
428 | e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG & | |
429 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 430 | regs_buff[19] = (u32)phy_data; /* cable polarity */ |
1da177e4 LT |
431 | regs_buff[20] = 0; /* polarity correction enabled (always) */ |
432 | regs_buff[22] = 0; /* phy receive errors (unavailable) */ | |
433 | regs_buff[23] = regs_buff[18]; /* mdix mode */ | |
434 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0); | |
435 | } else { | |
8fc897b0 | 436 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); |
406874a7 | 437 | regs_buff[13] = (u32)phy_data; /* cable length */ |
1da177e4 LT |
438 | regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */ |
439 | regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
440 | regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
8fc897b0 | 441 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); |
406874a7 | 442 | regs_buff[17] = (u32)phy_data; /* extended 10bt distance */ |
1da177e4 LT |
443 | regs_buff[18] = regs_buff[13]; /* cable polarity */ |
444 | regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
445 | regs_buff[20] = regs_buff[17]; /* polarity correction */ | |
446 | /* phy receive errors */ | |
447 | regs_buff[22] = adapter->phy_stats.receive_errors; | |
448 | regs_buff[23] = regs_buff[13]; /* mdix mode */ | |
449 | } | |
450 | regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */ | |
451 | e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data); | |
406874a7 | 452 | regs_buff[24] = (u32)phy_data; /* phy local receiver status */ |
1da177e4 | 453 | regs_buff[25] = regs_buff[24]; /* phy remote receiver status */ |
96838a40 | 454 | if (hw->mac_type >= e1000_82540 && |
4ccc12ae | 455 | hw->media_type == e1000_media_type_copper) { |
1dc32918 | 456 | regs_buff[26] = er32(MANC); |
1da177e4 LT |
457 | } |
458 | } | |
459 | ||
64798845 | 460 | static int e1000_get_eeprom_len(struct net_device *netdev) |
1da177e4 | 461 | { |
60490fe0 | 462 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 JP |
463 | struct e1000_hw *hw = &adapter->hw; |
464 | ||
465 | return hw->eeprom.word_size * 2; | |
1da177e4 LT |
466 | } |
467 | ||
64798845 JP |
468 | static int e1000_get_eeprom(struct net_device *netdev, |
469 | struct ethtool_eeprom *eeprom, u8 *bytes) | |
1da177e4 | 470 | { |
60490fe0 | 471 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 472 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 473 | u16 *eeprom_buff; |
1da177e4 LT |
474 | int first_word, last_word; |
475 | int ret_val = 0; | |
406874a7 | 476 | u16 i; |
1da177e4 | 477 | |
96838a40 | 478 | if (eeprom->len == 0) |
1da177e4 LT |
479 | return -EINVAL; |
480 | ||
481 | eeprom->magic = hw->vendor_id | (hw->device_id << 16); | |
482 | ||
483 | first_word = eeprom->offset >> 1; | |
484 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
485 | ||
406874a7 | 486 | eeprom_buff = kmalloc(sizeof(u16) * |
1da177e4 | 487 | (last_word - first_word + 1), GFP_KERNEL); |
96838a40 | 488 | if (!eeprom_buff) |
1da177e4 LT |
489 | return -ENOMEM; |
490 | ||
96838a40 | 491 | if (hw->eeprom.type == e1000_eeprom_spi) |
1da177e4 LT |
492 | ret_val = e1000_read_eeprom(hw, first_word, |
493 | last_word - first_word + 1, | |
494 | eeprom_buff); | |
495 | else { | |
c7be73bc JP |
496 | for (i = 0; i < last_word - first_word + 1; i++) { |
497 | ret_val = e1000_read_eeprom(hw, first_word + i, 1, | |
498 | &eeprom_buff[i]); | |
499 | if (ret_val) | |
1da177e4 | 500 | break; |
c7be73bc | 501 | } |
1da177e4 LT |
502 | } |
503 | ||
504 | /* Device's eeprom is always little-endian, word addressable */ | |
505 | for (i = 0; i < last_word - first_word + 1; i++) | |
506 | le16_to_cpus(&eeprom_buff[i]); | |
507 | ||
406874a7 | 508 | memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), |
1da177e4 LT |
509 | eeprom->len); |
510 | kfree(eeprom_buff); | |
511 | ||
512 | return ret_val; | |
513 | } | |
514 | ||
64798845 JP |
515 | static int e1000_set_eeprom(struct net_device *netdev, |
516 | struct ethtool_eeprom *eeprom, u8 *bytes) | |
1da177e4 | 517 | { |
60490fe0 | 518 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 519 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 520 | u16 *eeprom_buff; |
1da177e4 LT |
521 | void *ptr; |
522 | int max_len, first_word, last_word, ret_val = 0; | |
406874a7 | 523 | u16 i; |
1da177e4 | 524 | |
96838a40 | 525 | if (eeprom->len == 0) |
1da177e4 LT |
526 | return -EOPNOTSUPP; |
527 | ||
96838a40 | 528 | if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) |
1da177e4 LT |
529 | return -EFAULT; |
530 | ||
531 | max_len = hw->eeprom.word_size * 2; | |
532 | ||
533 | first_word = eeprom->offset >> 1; | |
534 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
535 | eeprom_buff = kmalloc(max_len, GFP_KERNEL); | |
96838a40 | 536 | if (!eeprom_buff) |
1da177e4 LT |
537 | return -ENOMEM; |
538 | ||
539 | ptr = (void *)eeprom_buff; | |
540 | ||
96838a40 | 541 | if (eeprom->offset & 1) { |
1da177e4 LT |
542 | /* need read/modify/write of first changed EEPROM word */ |
543 | /* only the second byte of the word is being modified */ | |
544 | ret_val = e1000_read_eeprom(hw, first_word, 1, | |
545 | &eeprom_buff[0]); | |
546 | ptr++; | |
547 | } | |
96838a40 | 548 | if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) { |
1da177e4 LT |
549 | /* need read/modify/write of last changed EEPROM word */ |
550 | /* only the first byte of the word is being modified */ | |
551 | ret_val = e1000_read_eeprom(hw, last_word, 1, | |
552 | &eeprom_buff[last_word - first_word]); | |
553 | } | |
554 | ||
555 | /* Device's eeprom is always little-endian, word addressable */ | |
556 | for (i = 0; i < last_word - first_word + 1; i++) | |
557 | le16_to_cpus(&eeprom_buff[i]); | |
558 | ||
559 | memcpy(ptr, bytes, eeprom->len); | |
560 | ||
561 | for (i = 0; i < last_word - first_word + 1; i++) | |
562 | eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]); | |
563 | ||
564 | ret_val = e1000_write_eeprom(hw, first_word, | |
565 | last_word - first_word + 1, eeprom_buff); | |
566 | ||
1532ecea JB |
567 | /* Update the checksum over the first part of the EEPROM if needed */ |
568 | if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG)) | |
1da177e4 LT |
569 | e1000_update_eeprom_checksum(hw); |
570 | ||
571 | kfree(eeprom_buff); | |
572 | return ret_val; | |
573 | } | |
574 | ||
64798845 JP |
575 | static void e1000_get_drvinfo(struct net_device *netdev, |
576 | struct ethtool_drvinfo *drvinfo) | |
1da177e4 | 577 | { |
60490fe0 | 578 | struct e1000_adapter *adapter = netdev_priv(netdev); |
a2917e22 | 579 | char firmware_version[32]; |
1da177e4 LT |
580 | |
581 | strncpy(drvinfo->driver, e1000_driver_name, 32); | |
582 | strncpy(drvinfo->version, e1000_driver_version, 32); | |
a2917e22 | 583 | |
1532ecea | 584 | sprintf(firmware_version, "N/A"); |
a2917e22 | 585 | strncpy(drvinfo->fw_version, firmware_version, 32); |
1da177e4 | 586 | strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32); |
1da177e4 LT |
587 | drvinfo->regdump_len = e1000_get_regs_len(netdev); |
588 | drvinfo->eedump_len = e1000_get_eeprom_len(netdev); | |
589 | } | |
590 | ||
64798845 JP |
591 | static void e1000_get_ringparam(struct net_device *netdev, |
592 | struct ethtool_ringparam *ring) | |
1da177e4 | 593 | { |
60490fe0 | 594 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 JP |
595 | struct e1000_hw *hw = &adapter->hw; |
596 | e1000_mac_type mac_type = hw->mac_type; | |
581d708e MC |
597 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
598 | struct e1000_rx_ring *rxdr = adapter->rx_ring; | |
1da177e4 LT |
599 | |
600 | ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD : | |
601 | E1000_MAX_82544_RXD; | |
602 | ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD : | |
603 | E1000_MAX_82544_TXD; | |
604 | ring->rx_mini_max_pending = 0; | |
605 | ring->rx_jumbo_max_pending = 0; | |
606 | ring->rx_pending = rxdr->count; | |
607 | ring->tx_pending = txdr->count; | |
608 | ring->rx_mini_pending = 0; | |
609 | ring->rx_jumbo_pending = 0; | |
610 | } | |
611 | ||
64798845 JP |
612 | static int e1000_set_ringparam(struct net_device *netdev, |
613 | struct ethtool_ringparam *ring) | |
1da177e4 | 614 | { |
60490fe0 | 615 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 JP |
616 | struct e1000_hw *hw = &adapter->hw; |
617 | e1000_mac_type mac_type = hw->mac_type; | |
793fab72 VA |
618 | struct e1000_tx_ring *txdr, *tx_old; |
619 | struct e1000_rx_ring *rxdr, *rx_old; | |
1c7e5b12 | 620 | int i, err; |
581d708e | 621 | |
0989aa43 JK |
622 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) |
623 | return -EINVAL; | |
624 | ||
2db10a08 AK |
625 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
626 | msleep(1); | |
627 | ||
581d708e MC |
628 | if (netif_running(adapter->netdev)) |
629 | e1000_down(adapter); | |
1da177e4 LT |
630 | |
631 | tx_old = adapter->tx_ring; | |
632 | rx_old = adapter->rx_ring; | |
633 | ||
793fab72 | 634 | err = -ENOMEM; |
1c7e5b12 | 635 | txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL); |
793fab72 VA |
636 | if (!txdr) |
637 | goto err_alloc_tx; | |
581d708e | 638 | |
1c7e5b12 | 639 | rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL); |
793fab72 VA |
640 | if (!rxdr) |
641 | goto err_alloc_rx; | |
581d708e | 642 | |
793fab72 VA |
643 | adapter->tx_ring = txdr; |
644 | adapter->rx_ring = rxdr; | |
581d708e | 645 | |
406874a7 JP |
646 | rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD); |
647 | rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ? | |
1da177e4 | 648 | E1000_MAX_RXD : E1000_MAX_82544_RXD)); |
9099cfb9 | 649 | rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE); |
1da177e4 | 650 | |
406874a7 JP |
651 | txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD); |
652 | txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ? | |
1da177e4 | 653 | E1000_MAX_TXD : E1000_MAX_82544_TXD)); |
9099cfb9 | 654 | txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE); |
1da177e4 | 655 | |
f56799ea | 656 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 657 | txdr[i].count = txdr->count; |
f56799ea | 658 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 659 | rxdr[i].count = rxdr->count; |
581d708e | 660 | |
96838a40 | 661 | if (netif_running(adapter->netdev)) { |
1da177e4 | 662 | /* Try to get new resources before deleting old */ |
c7be73bc JP |
663 | err = e1000_setup_all_rx_resources(adapter); |
664 | if (err) | |
1da177e4 | 665 | goto err_setup_rx; |
c7be73bc JP |
666 | err = e1000_setup_all_tx_resources(adapter); |
667 | if (err) | |
1da177e4 LT |
668 | goto err_setup_tx; |
669 | ||
670 | /* save the new, restore the old in order to free it, | |
671 | * then restore the new back again */ | |
672 | ||
1da177e4 LT |
673 | adapter->rx_ring = rx_old; |
674 | adapter->tx_ring = tx_old; | |
581d708e MC |
675 | e1000_free_all_rx_resources(adapter); |
676 | e1000_free_all_tx_resources(adapter); | |
677 | kfree(tx_old); | |
678 | kfree(rx_old); | |
793fab72 VA |
679 | adapter->rx_ring = rxdr; |
680 | adapter->tx_ring = txdr; | |
c7be73bc JP |
681 | err = e1000_up(adapter); |
682 | if (err) | |
2db10a08 | 683 | goto err_setup; |
1da177e4 LT |
684 | } |
685 | ||
2db10a08 | 686 | clear_bit(__E1000_RESETTING, &adapter->flags); |
1da177e4 LT |
687 | return 0; |
688 | err_setup_tx: | |
581d708e | 689 | e1000_free_all_rx_resources(adapter); |
1da177e4 LT |
690 | err_setup_rx: |
691 | adapter->rx_ring = rx_old; | |
692 | adapter->tx_ring = tx_old; | |
793fab72 VA |
693 | kfree(rxdr); |
694 | err_alloc_rx: | |
695 | kfree(txdr); | |
696 | err_alloc_tx: | |
1da177e4 | 697 | e1000_up(adapter); |
2db10a08 AK |
698 | err_setup: |
699 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 LT |
700 | return err; |
701 | } | |
702 | ||
64798845 JP |
703 | static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg, |
704 | u32 mask, u32 write) | |
7e64300a | 705 | { |
1dc32918 | 706 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 707 | static const u32 test[] = |
7e64300a | 708 | {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; |
1dc32918 | 709 | u8 __iomem *address = hw->hw_addr + reg; |
406874a7 | 710 | u32 read; |
7e64300a JP |
711 | int i; |
712 | ||
713 | for (i = 0; i < ARRAY_SIZE(test); i++) { | |
714 | writel(write & test[i], address); | |
715 | read = readl(address); | |
716 | if (read != (write & test[i] & mask)) { | |
717 | DPRINTK(DRV, ERR, "pattern test reg %04X failed: " | |
718 | "got 0x%08X expected 0x%08X\n", | |
cba0516d | 719 | reg, read, (write & test[i] & mask)); |
7e64300a JP |
720 | *data = reg; |
721 | return true; | |
722 | } | |
723 | } | |
724 | return false; | |
1da177e4 LT |
725 | } |
726 | ||
64798845 JP |
727 | static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg, |
728 | u32 mask, u32 write) | |
7e64300a | 729 | { |
1dc32918 JP |
730 | struct e1000_hw *hw = &adapter->hw; |
731 | u8 __iomem *address = hw->hw_addr + reg; | |
406874a7 | 732 | u32 read; |
7e64300a JP |
733 | |
734 | writel(write & mask, address); | |
735 | read = readl(address); | |
736 | if ((read & mask) != (write & mask)) { | |
737 | DPRINTK(DRV, ERR, "set/check reg %04X test failed: " | |
738 | "got 0x%08X expected 0x%08X\n", | |
739 | reg, (read & mask), (write & mask)); | |
740 | *data = reg; | |
741 | return true; | |
742 | } | |
743 | return false; | |
1da177e4 LT |
744 | } |
745 | ||
7e64300a JP |
746 | #define REG_PATTERN_TEST(reg, mask, write) \ |
747 | do { \ | |
748 | if (reg_pattern_test(adapter, data, \ | |
1dc32918 | 749 | (hw->mac_type >= e1000_82543) \ |
7e64300a JP |
750 | ? E1000_##reg : E1000_82542_##reg, \ |
751 | mask, write)) \ | |
752 | return 1; \ | |
753 | } while (0) | |
754 | ||
755 | #define REG_SET_AND_CHECK(reg, mask, write) \ | |
756 | do { \ | |
757 | if (reg_set_and_check(adapter, data, \ | |
1dc32918 | 758 | (hw->mac_type >= e1000_82543) \ |
7e64300a JP |
759 | ? E1000_##reg : E1000_82542_##reg, \ |
760 | mask, write)) \ | |
761 | return 1; \ | |
762 | } while (0) | |
763 | ||
64798845 | 764 | static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data) |
1da177e4 | 765 | { |
406874a7 JP |
766 | u32 value, before, after; |
767 | u32 i, toggle; | |
1dc32918 | 768 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
769 | |
770 | /* The status register is Read Only, so a write should fail. | |
771 | * Some bits that get toggled are ignored. | |
772 | */ | |
1532ecea | 773 | |
868d5309 | 774 | /* there are several bits on newer hardware that are r/w */ |
1532ecea | 775 | toggle = 0xFFFFF833; |
b01f6691 | 776 | |
1dc32918 JP |
777 | before = er32(STATUS); |
778 | value = (er32(STATUS) & toggle); | |
779 | ew32(STATUS, toggle); | |
780 | after = er32(STATUS) & toggle; | |
96838a40 | 781 | if (value != after) { |
b01f6691 MC |
782 | DPRINTK(DRV, ERR, "failed STATUS register test got: " |
783 | "0x%08X expected: 0x%08X\n", after, value); | |
1da177e4 LT |
784 | *data = 1; |
785 | return 1; | |
786 | } | |
b01f6691 | 787 | /* restore previous status */ |
1dc32918 | 788 | ew32(STATUS, before); |
90fb5135 | 789 | |
1532ecea JB |
790 | REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF); |
791 | REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF); | |
792 | REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF); | |
793 | REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF); | |
90fb5135 | 794 | |
1da177e4 LT |
795 | REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF); |
796 | REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF); | |
797 | REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF); | |
798 | REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF); | |
799 | REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF); | |
800 | REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8); | |
801 | REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF); | |
802 | REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF); | |
803 | REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF); | |
804 | REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF); | |
805 | ||
806 | REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000); | |
90fb5135 | 807 | |
1532ecea | 808 | before = 0x06DFB3FE; |
cd94dd0b | 809 | REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB); |
1da177e4 LT |
810 | REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000); |
811 | ||
1dc32918 | 812 | if (hw->mac_type >= e1000_82543) { |
1da177e4 | 813 | |
cd94dd0b | 814 | REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF); |
1da177e4 | 815 | REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF); |
1532ecea | 816 | REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF); |
1da177e4 LT |
817 | REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF); |
818 | REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF); | |
1532ecea | 819 | value = E1000_RAR_ENTRIES; |
cd94dd0b | 820 | for (i = 0; i < value; i++) { |
1da177e4 | 821 | REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF, |
90fb5135 | 822 | 0xFFFFFFFF); |
1da177e4 LT |
823 | } |
824 | ||
825 | } else { | |
826 | ||
827 | REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF); | |
828 | REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF); | |
829 | REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF); | |
830 | REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF); | |
831 | ||
832 | } | |
833 | ||
1532ecea | 834 | value = E1000_MC_TBL_SIZE; |
cd94dd0b | 835 | for (i = 0; i < value; i++) |
1da177e4 LT |
836 | REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF); |
837 | ||
838 | *data = 0; | |
839 | return 0; | |
840 | } | |
841 | ||
64798845 | 842 | static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data) |
1da177e4 | 843 | { |
1dc32918 | 844 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
845 | u16 temp; |
846 | u16 checksum = 0; | |
847 | u16 i; | |
1da177e4 LT |
848 | |
849 | *data = 0; | |
850 | /* Read and add up the contents of the EEPROM */ | |
96838a40 | 851 | for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) { |
1dc32918 | 852 | if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) { |
1da177e4 LT |
853 | *data = 1; |
854 | break; | |
855 | } | |
856 | checksum += temp; | |
857 | } | |
858 | ||
859 | /* If Checksum is not Correct return error else test passed */ | |
e982f17c | 860 | if ((checksum != (u16)EEPROM_SUM) && !(*data)) |
1da177e4 LT |
861 | *data = 2; |
862 | ||
863 | return *data; | |
864 | } | |
865 | ||
64798845 | 866 | static irqreturn_t e1000_test_intr(int irq, void *data) |
1da177e4 | 867 | { |
e982f17c | 868 | struct net_device *netdev = (struct net_device *)data; |
60490fe0 | 869 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 870 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 871 | |
1dc32918 | 872 | adapter->test_icr |= er32(ICR); |
1da177e4 LT |
873 | |
874 | return IRQ_HANDLED; | |
875 | } | |
876 | ||
64798845 | 877 | static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) |
1da177e4 LT |
878 | { |
879 | struct net_device *netdev = adapter->netdev; | |
406874a7 | 880 | u32 mask, i = 0; |
c3033b01 | 881 | bool shared_int = true; |
406874a7 | 882 | u32 irq = adapter->pdev->irq; |
1dc32918 | 883 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
884 | |
885 | *data = 0; | |
886 | ||
8fc897b0 | 887 | /* NOTE: we don't test MSI interrupts here, yet */ |
1da177e4 | 888 | /* Hook up test interrupt handler just for this test */ |
a0607fd3 | 889 | if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name, |
90fb5135 | 890 | netdev)) |
c3033b01 | 891 | shared_int = false; |
a0607fd3 | 892 | else if (request_irq(irq, e1000_test_intr, IRQF_SHARED, |
90fb5135 | 893 | netdev->name, netdev)) { |
1da177e4 LT |
894 | *data = 1; |
895 | return -1; | |
896 | } | |
8fc897b0 | 897 | DPRINTK(HW, INFO, "testing %s interrupt\n", |
b9b6e78b | 898 | (shared_int ? "shared" : "unshared")); |
1da177e4 LT |
899 | |
900 | /* Disable all the interrupts */ | |
1dc32918 | 901 | ew32(IMC, 0xFFFFFFFF); |
f8ec4733 | 902 | msleep(10); |
1da177e4 LT |
903 | |
904 | /* Test each interrupt */ | |
96838a40 | 905 | for (; i < 10; i++) { |
1da177e4 LT |
906 | |
907 | /* Interrupt to test */ | |
908 | mask = 1 << i; | |
909 | ||
76c224bc AK |
910 | if (!shared_int) { |
911 | /* Disable the interrupt to be reported in | |
912 | * the cause register and then force the same | |
913 | * interrupt and see if one gets posted. If | |
914 | * an interrupt was posted to the bus, the | |
915 | * test failed. | |
916 | */ | |
917 | adapter->test_icr = 0; | |
1dc32918 JP |
918 | ew32(IMC, mask); |
919 | ew32(ICS, mask); | |
f8ec4733 | 920 | msleep(10); |
76c224bc AK |
921 | |
922 | if (adapter->test_icr & mask) { | |
923 | *data = 3; | |
924 | break; | |
925 | } | |
1da177e4 LT |
926 | } |
927 | ||
928 | /* Enable the interrupt to be reported in | |
929 | * the cause register and then force the same | |
930 | * interrupt and see if one gets posted. If | |
931 | * an interrupt was not posted to the bus, the | |
932 | * test failed. | |
933 | */ | |
934 | adapter->test_icr = 0; | |
1dc32918 JP |
935 | ew32(IMS, mask); |
936 | ew32(ICS, mask); | |
f8ec4733 | 937 | msleep(10); |
1da177e4 | 938 | |
96838a40 | 939 | if (!(adapter->test_icr & mask)) { |
1da177e4 LT |
940 | *data = 4; |
941 | break; | |
942 | } | |
943 | ||
76c224bc | 944 | if (!shared_int) { |
1da177e4 LT |
945 | /* Disable the other interrupts to be reported in |
946 | * the cause register and then force the other | |
947 | * interrupts and see if any get posted. If | |
948 | * an interrupt was posted to the bus, the | |
949 | * test failed. | |
950 | */ | |
951 | adapter->test_icr = 0; | |
1dc32918 JP |
952 | ew32(IMC, ~mask & 0x00007FFF); |
953 | ew32(ICS, ~mask & 0x00007FFF); | |
f8ec4733 | 954 | msleep(10); |
1da177e4 | 955 | |
96838a40 | 956 | if (adapter->test_icr) { |
1da177e4 LT |
957 | *data = 5; |
958 | break; | |
959 | } | |
960 | } | |
961 | } | |
962 | ||
963 | /* Disable all the interrupts */ | |
1dc32918 | 964 | ew32(IMC, 0xFFFFFFFF); |
f8ec4733 | 965 | msleep(10); |
1da177e4 LT |
966 | |
967 | /* Unhook test interrupt handler */ | |
968 | free_irq(irq, netdev); | |
969 | ||
970 | return *data; | |
971 | } | |
972 | ||
64798845 | 973 | static void e1000_free_desc_rings(struct e1000_adapter *adapter) |
1da177e4 | 974 | { |
581d708e MC |
975 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
976 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 LT |
977 | struct pci_dev *pdev = adapter->pdev; |
978 | int i; | |
979 | ||
96838a40 JB |
980 | if (txdr->desc && txdr->buffer_info) { |
981 | for (i = 0; i < txdr->count; i++) { | |
982 | if (txdr->buffer_info[i].dma) | |
b16f53be NN |
983 | dma_unmap_single(&pdev->dev, |
984 | txdr->buffer_info[i].dma, | |
1da177e4 | 985 | txdr->buffer_info[i].length, |
b16f53be | 986 | DMA_TO_DEVICE); |
96838a40 | 987 | if (txdr->buffer_info[i].skb) |
1da177e4 LT |
988 | dev_kfree_skb(txdr->buffer_info[i].skb); |
989 | } | |
990 | } | |
991 | ||
96838a40 JB |
992 | if (rxdr->desc && rxdr->buffer_info) { |
993 | for (i = 0; i < rxdr->count; i++) { | |
994 | if (rxdr->buffer_info[i].dma) | |
b16f53be NN |
995 | dma_unmap_single(&pdev->dev, |
996 | rxdr->buffer_info[i].dma, | |
1da177e4 | 997 | rxdr->buffer_info[i].length, |
b16f53be | 998 | DMA_FROM_DEVICE); |
96838a40 | 999 | if (rxdr->buffer_info[i].skb) |
1da177e4 LT |
1000 | dev_kfree_skb(rxdr->buffer_info[i].skb); |
1001 | } | |
1002 | } | |
1003 | ||
f5645110 | 1004 | if (txdr->desc) { |
b16f53be NN |
1005 | dma_free_coherent(&pdev->dev, txdr->size, txdr->desc, |
1006 | txdr->dma); | |
6b27adb6 JL |
1007 | txdr->desc = NULL; |
1008 | } | |
f5645110 | 1009 | if (rxdr->desc) { |
b16f53be NN |
1010 | dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc, |
1011 | rxdr->dma); | |
6b27adb6 JL |
1012 | rxdr->desc = NULL; |
1013 | } | |
1da177e4 | 1014 | |
b4558ea9 | 1015 | kfree(txdr->buffer_info); |
6b27adb6 | 1016 | txdr->buffer_info = NULL; |
b4558ea9 | 1017 | kfree(rxdr->buffer_info); |
6b27adb6 | 1018 | rxdr->buffer_info = NULL; |
f5645110 | 1019 | |
1da177e4 LT |
1020 | return; |
1021 | } | |
1022 | ||
64798845 | 1023 | static int e1000_setup_desc_rings(struct e1000_adapter *adapter) |
1da177e4 | 1024 | { |
1dc32918 | 1025 | struct e1000_hw *hw = &adapter->hw; |
581d708e MC |
1026 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
1027 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 | 1028 | struct pci_dev *pdev = adapter->pdev; |
406874a7 | 1029 | u32 rctl; |
1c7e5b12 | 1030 | int i, ret_val; |
1da177e4 LT |
1031 | |
1032 | /* Setup Tx descriptor ring and Tx buffers */ | |
1033 | ||
96838a40 JB |
1034 | if (!txdr->count) |
1035 | txdr->count = E1000_DEFAULT_TXD; | |
1da177e4 | 1036 | |
c7be73bc JP |
1037 | txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_buffer), |
1038 | GFP_KERNEL); | |
1039 | if (!txdr->buffer_info) { | |
1da177e4 LT |
1040 | ret_val = 1; |
1041 | goto err_nomem; | |
1042 | } | |
1da177e4 LT |
1043 | |
1044 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
9099cfb9 | 1045 | txdr->size = ALIGN(txdr->size, 4096); |
b16f53be NN |
1046 | txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma, |
1047 | GFP_KERNEL); | |
c7be73bc | 1048 | if (!txdr->desc) { |
1da177e4 LT |
1049 | ret_val = 2; |
1050 | goto err_nomem; | |
1051 | } | |
1052 | memset(txdr->desc, 0, txdr->size); | |
1053 | txdr->next_to_use = txdr->next_to_clean = 0; | |
1054 | ||
e982f17c JP |
1055 | ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF)); |
1056 | ew32(TDBAH, ((u64)txdr->dma >> 32)); | |
1dc32918 JP |
1057 | ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc)); |
1058 | ew32(TDH, 0); | |
1059 | ew32(TDT, 0); | |
1060 | ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | | |
1061 | E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT | | |
1062 | E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT); | |
1da177e4 | 1063 | |
96838a40 | 1064 | for (i = 0; i < txdr->count; i++) { |
1da177e4 LT |
1065 | struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i); |
1066 | struct sk_buff *skb; | |
1067 | unsigned int size = 1024; | |
1068 | ||
c7be73bc JP |
1069 | skb = alloc_skb(size, GFP_KERNEL); |
1070 | if (!skb) { | |
1da177e4 LT |
1071 | ret_val = 3; |
1072 | goto err_nomem; | |
1073 | } | |
1074 | skb_put(skb, size); | |
1075 | txdr->buffer_info[i].skb = skb; | |
1076 | txdr->buffer_info[i].length = skb->len; | |
1077 | txdr->buffer_info[i].dma = | |
b16f53be NN |
1078 | dma_map_single(&pdev->dev, skb->data, skb->len, |
1079 | DMA_TO_DEVICE); | |
1da177e4 LT |
1080 | tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma); |
1081 | tx_desc->lower.data = cpu_to_le32(skb->len); | |
1082 | tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP | | |
1083 | E1000_TXD_CMD_IFCS | | |
1084 | E1000_TXD_CMD_RPS); | |
1085 | tx_desc->upper.data = 0; | |
1086 | } | |
1087 | ||
1088 | /* Setup Rx descriptor ring and Rx buffers */ | |
1089 | ||
96838a40 JB |
1090 | if (!rxdr->count) |
1091 | rxdr->count = E1000_DEFAULT_RXD; | |
1da177e4 | 1092 | |
c7be73bc JP |
1093 | rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_buffer), |
1094 | GFP_KERNEL); | |
1095 | if (!rxdr->buffer_info) { | |
1da177e4 LT |
1096 | ret_val = 4; |
1097 | goto err_nomem; | |
1098 | } | |
1da177e4 LT |
1099 | |
1100 | rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc); | |
b16f53be NN |
1101 | rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma, |
1102 | GFP_KERNEL); | |
c7be73bc | 1103 | if (!rxdr->desc) { |
1da177e4 LT |
1104 | ret_val = 5; |
1105 | goto err_nomem; | |
1106 | } | |
1107 | memset(rxdr->desc, 0, rxdr->size); | |
1108 | rxdr->next_to_use = rxdr->next_to_clean = 0; | |
1109 | ||
1dc32918 JP |
1110 | rctl = er32(RCTL); |
1111 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
e982f17c JP |
1112 | ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF)); |
1113 | ew32(RDBAH, ((u64)rxdr->dma >> 32)); | |
1dc32918 JP |
1114 | ew32(RDLEN, rxdr->size); |
1115 | ew32(RDH, 0); | |
1116 | ew32(RDT, 0); | |
1da177e4 LT |
1117 | rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 | |
1118 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1dc32918 JP |
1119 | (hw->mc_filter_type << E1000_RCTL_MO_SHIFT); |
1120 | ew32(RCTL, rctl); | |
1da177e4 | 1121 | |
96838a40 | 1122 | for (i = 0; i < rxdr->count; i++) { |
1da177e4 LT |
1123 | struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i); |
1124 | struct sk_buff *skb; | |
1125 | ||
c7be73bc JP |
1126 | skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, GFP_KERNEL); |
1127 | if (!skb) { | |
1da177e4 LT |
1128 | ret_val = 6; |
1129 | goto err_nomem; | |
1130 | } | |
1131 | skb_reserve(skb, NET_IP_ALIGN); | |
1132 | rxdr->buffer_info[i].skb = skb; | |
1133 | rxdr->buffer_info[i].length = E1000_RXBUFFER_2048; | |
1134 | rxdr->buffer_info[i].dma = | |
b16f53be NN |
1135 | dma_map_single(&pdev->dev, skb->data, |
1136 | E1000_RXBUFFER_2048, DMA_FROM_DEVICE); | |
1da177e4 LT |
1137 | rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma); |
1138 | memset(skb->data, 0x00, skb->len); | |
1139 | } | |
1140 | ||
1141 | return 0; | |
1142 | ||
1143 | err_nomem: | |
1144 | e1000_free_desc_rings(adapter); | |
1145 | return ret_val; | |
1146 | } | |
1147 | ||
64798845 | 1148 | static void e1000_phy_disable_receiver(struct e1000_adapter *adapter) |
1da177e4 | 1149 | { |
1dc32918 JP |
1150 | struct e1000_hw *hw = &adapter->hw; |
1151 | ||
1da177e4 | 1152 | /* Write out to PHY registers 29 and 30 to disable the Receiver. */ |
1dc32918 JP |
1153 | e1000_write_phy_reg(hw, 29, 0x001F); |
1154 | e1000_write_phy_reg(hw, 30, 0x8FFC); | |
1155 | e1000_write_phy_reg(hw, 29, 0x001A); | |
1156 | e1000_write_phy_reg(hw, 30, 0x8FF0); | |
1da177e4 LT |
1157 | } |
1158 | ||
64798845 | 1159 | static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter) |
1da177e4 | 1160 | { |
1dc32918 | 1161 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 1162 | u16 phy_reg; |
1da177e4 LT |
1163 | |
1164 | /* Because we reset the PHY above, we need to re-force TX_CLK in the | |
1165 | * Extended PHY Specific Control Register to 25MHz clock. This | |
1166 | * value defaults back to a 2.5MHz clock when the PHY is reset. | |
1167 | */ | |
1dc32918 | 1168 | e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); |
1da177e4 | 1169 | phy_reg |= M88E1000_EPSCR_TX_CLK_25; |
1dc32918 | 1170 | e1000_write_phy_reg(hw, |
1da177e4 LT |
1171 | M88E1000_EXT_PHY_SPEC_CTRL, phy_reg); |
1172 | ||
1173 | /* In addition, because of the s/w reset above, we need to enable | |
1174 | * CRS on TX. This must be set for both full and half duplex | |
1175 | * operation. | |
1176 | */ | |
1dc32918 | 1177 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); |
1da177e4 | 1178 | phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX; |
1dc32918 | 1179 | e1000_write_phy_reg(hw, |
1da177e4 LT |
1180 | M88E1000_PHY_SPEC_CTRL, phy_reg); |
1181 | } | |
1182 | ||
64798845 | 1183 | static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter) |
1da177e4 | 1184 | { |
1dc32918 | 1185 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
1186 | u32 ctrl_reg; |
1187 | u16 phy_reg; | |
1da177e4 LT |
1188 | |
1189 | /* Setup the Device Control Register for PHY loopback test. */ | |
1190 | ||
1dc32918 | 1191 | ctrl_reg = er32(CTRL); |
1da177e4 LT |
1192 | ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */ |
1193 | E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ | |
1194 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | |
1195 | E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */ | |
1196 | E1000_CTRL_FD); /* Force Duplex to FULL */ | |
1197 | ||
1dc32918 | 1198 | ew32(CTRL, ctrl_reg); |
1da177e4 LT |
1199 | |
1200 | /* Read the PHY Specific Control Register (0x10) */ | |
1dc32918 | 1201 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); |
1da177e4 LT |
1202 | |
1203 | /* Clear Auto-Crossover bits in PHY Specific Control Register | |
1204 | * (bits 6:5). | |
1205 | */ | |
1206 | phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE; | |
1dc32918 | 1207 | e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg); |
1da177e4 LT |
1208 | |
1209 | /* Perform software reset on the PHY */ | |
1dc32918 | 1210 | e1000_phy_reset(hw); |
1da177e4 LT |
1211 | |
1212 | /* Have to setup TX_CLK and TX_CRS after software reset */ | |
1213 | e1000_phy_reset_clk_and_crs(adapter); | |
1214 | ||
1dc32918 | 1215 | e1000_write_phy_reg(hw, PHY_CTRL, 0x8100); |
1da177e4 LT |
1216 | |
1217 | /* Wait for reset to complete. */ | |
1218 | udelay(500); | |
1219 | ||
1220 | /* Have to setup TX_CLK and TX_CRS after software reset */ | |
1221 | e1000_phy_reset_clk_and_crs(adapter); | |
1222 | ||
1223 | /* Write out to PHY registers 29 and 30 to disable the Receiver. */ | |
1224 | e1000_phy_disable_receiver(adapter); | |
1225 | ||
1226 | /* Set the loopback bit in the PHY control register. */ | |
1dc32918 | 1227 | e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); |
1da177e4 | 1228 | phy_reg |= MII_CR_LOOPBACK; |
1dc32918 | 1229 | e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); |
1da177e4 LT |
1230 | |
1231 | /* Setup TX_CLK and TX_CRS one more time. */ | |
1232 | e1000_phy_reset_clk_and_crs(adapter); | |
1233 | ||
1234 | /* Check Phy Configuration */ | |
1dc32918 | 1235 | e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); |
96838a40 | 1236 | if (phy_reg != 0x4100) |
1da177e4 LT |
1237 | return 9; |
1238 | ||
1dc32918 | 1239 | e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); |
96838a40 | 1240 | if (phy_reg != 0x0070) |
1da177e4 LT |
1241 | return 10; |
1242 | ||
1dc32918 | 1243 | e1000_read_phy_reg(hw, 29, &phy_reg); |
96838a40 | 1244 | if (phy_reg != 0x001A) |
1da177e4 LT |
1245 | return 11; |
1246 | ||
1247 | return 0; | |
1248 | } | |
1249 | ||
64798845 | 1250 | static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter) |
1da177e4 | 1251 | { |
1dc32918 | 1252 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
1253 | u32 ctrl_reg = 0; |
1254 | u32 stat_reg = 0; | |
1da177e4 | 1255 | |
1dc32918 | 1256 | hw->autoneg = false; |
1da177e4 | 1257 | |
1dc32918 | 1258 | if (hw->phy_type == e1000_phy_m88) { |
1da177e4 | 1259 | /* Auto-MDI/MDIX Off */ |
1dc32918 | 1260 | e1000_write_phy_reg(hw, |
1da177e4 LT |
1261 | M88E1000_PHY_SPEC_CTRL, 0x0808); |
1262 | /* reset to update Auto-MDI/MDIX */ | |
1dc32918 | 1263 | e1000_write_phy_reg(hw, PHY_CTRL, 0x9140); |
1da177e4 | 1264 | /* autoneg off */ |
1dc32918 | 1265 | e1000_write_phy_reg(hw, PHY_CTRL, 0x8140); |
1532ecea | 1266 | } |
1da177e4 | 1267 | |
1dc32918 | 1268 | ctrl_reg = er32(CTRL); |
cd94dd0b | 1269 | |
1532ecea JB |
1270 | /* force 1000, set loopback */ |
1271 | e1000_write_phy_reg(hw, PHY_CTRL, 0x4140); | |
cd94dd0b | 1272 | |
1532ecea JB |
1273 | /* Now set up the MAC to the same speed/duplex as the PHY. */ |
1274 | ctrl_reg = er32(CTRL); | |
1275 | ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ | |
1276 | ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ | |
1277 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | |
1278 | E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */ | |
1279 | E1000_CTRL_FD); /* Force Duplex to FULL */ | |
1da177e4 | 1280 | |
1dc32918 JP |
1281 | if (hw->media_type == e1000_media_type_copper && |
1282 | hw->phy_type == e1000_phy_m88) | |
1da177e4 | 1283 | ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ |
8fc897b0 | 1284 | else { |
1da177e4 LT |
1285 | /* Set the ILOS bit on the fiber Nic is half |
1286 | * duplex link is detected. */ | |
1dc32918 | 1287 | stat_reg = er32(STATUS); |
96838a40 | 1288 | if ((stat_reg & E1000_STATUS_FD) == 0) |
1da177e4 LT |
1289 | ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU); |
1290 | } | |
1291 | ||
1dc32918 | 1292 | ew32(CTRL, ctrl_reg); |
1da177e4 LT |
1293 | |
1294 | /* Disable the receiver on the PHY so when a cable is plugged in, the | |
1295 | * PHY does not begin to autoneg when a cable is reconnected to the NIC. | |
1296 | */ | |
1dc32918 | 1297 | if (hw->phy_type == e1000_phy_m88) |
1da177e4 LT |
1298 | e1000_phy_disable_receiver(adapter); |
1299 | ||
1300 | udelay(500); | |
1301 | ||
1302 | return 0; | |
1303 | } | |
1304 | ||
64798845 | 1305 | static int e1000_set_phy_loopback(struct e1000_adapter *adapter) |
1da177e4 | 1306 | { |
1dc32918 | 1307 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
1308 | u16 phy_reg = 0; |
1309 | u16 count = 0; | |
1da177e4 | 1310 | |
1dc32918 | 1311 | switch (hw->mac_type) { |
1da177e4 | 1312 | case e1000_82543: |
1dc32918 | 1313 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
1314 | /* Attempt to setup Loopback mode on Non-integrated PHY. |
1315 | * Some PHY registers get corrupted at random, so | |
1316 | * attempt this 10 times. | |
1317 | */ | |
96838a40 | 1318 | while (e1000_nonintegrated_phy_loopback(adapter) && |
1da177e4 | 1319 | count++ < 10); |
96838a40 | 1320 | if (count < 11) |
1da177e4 LT |
1321 | return 0; |
1322 | } | |
1323 | break; | |
1324 | ||
1325 | case e1000_82544: | |
1326 | case e1000_82540: | |
1327 | case e1000_82545: | |
1328 | case e1000_82545_rev_3: | |
1329 | case e1000_82546: | |
1330 | case e1000_82546_rev_3: | |
1331 | case e1000_82541: | |
1332 | case e1000_82541_rev_2: | |
1333 | case e1000_82547: | |
1334 | case e1000_82547_rev_2: | |
1335 | return e1000_integrated_phy_loopback(adapter); | |
1336 | break; | |
1da177e4 LT |
1337 | default: |
1338 | /* Default PHY loopback work is to read the MII | |
1339 | * control register and assert bit 14 (loopback mode). | |
1340 | */ | |
1dc32918 | 1341 | e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); |
1da177e4 | 1342 | phy_reg |= MII_CR_LOOPBACK; |
1dc32918 | 1343 | e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); |
1da177e4 LT |
1344 | return 0; |
1345 | break; | |
1346 | } | |
1347 | ||
1348 | return 8; | |
1349 | } | |
1350 | ||
64798845 | 1351 | static int e1000_setup_loopback_test(struct e1000_adapter *adapter) |
1da177e4 | 1352 | { |
49273163 | 1353 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 1354 | u32 rctl; |
1da177e4 | 1355 | |
49273163 JK |
1356 | if (hw->media_type == e1000_media_type_fiber || |
1357 | hw->media_type == e1000_media_type_internal_serdes) { | |
1358 | switch (hw->mac_type) { | |
1359 | case e1000_82545: | |
1360 | case e1000_82546: | |
1361 | case e1000_82545_rev_3: | |
1362 | case e1000_82546_rev_3: | |
1da177e4 | 1363 | return e1000_set_phy_loopback(adapter); |
49273163 | 1364 | break; |
49273163 | 1365 | default: |
1dc32918 | 1366 | rctl = er32(RCTL); |
1da177e4 | 1367 | rctl |= E1000_RCTL_LBM_TCVR; |
1dc32918 | 1368 | ew32(RCTL, rctl); |
1da177e4 LT |
1369 | return 0; |
1370 | } | |
49273163 | 1371 | } else if (hw->media_type == e1000_media_type_copper) |
1da177e4 LT |
1372 | return e1000_set_phy_loopback(adapter); |
1373 | ||
1374 | return 7; | |
1375 | } | |
1376 | ||
64798845 | 1377 | static void e1000_loopback_cleanup(struct e1000_adapter *adapter) |
1da177e4 | 1378 | { |
49273163 | 1379 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
1380 | u32 rctl; |
1381 | u16 phy_reg; | |
1da177e4 | 1382 | |
1dc32918 | 1383 | rctl = er32(RCTL); |
1da177e4 | 1384 | rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC); |
1dc32918 | 1385 | ew32(RCTL, rctl); |
1da177e4 | 1386 | |
49273163 | 1387 | switch (hw->mac_type) { |
49273163 JK |
1388 | case e1000_82545: |
1389 | case e1000_82546: | |
1390 | case e1000_82545_rev_3: | |
1391 | case e1000_82546_rev_3: | |
1392 | default: | |
c3033b01 | 1393 | hw->autoneg = true; |
49273163 JK |
1394 | e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); |
1395 | if (phy_reg & MII_CR_LOOPBACK) { | |
1da177e4 | 1396 | phy_reg &= ~MII_CR_LOOPBACK; |
49273163 JK |
1397 | e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); |
1398 | e1000_phy_reset(hw); | |
1da177e4 | 1399 | } |
49273163 | 1400 | break; |
1da177e4 LT |
1401 | } |
1402 | } | |
1403 | ||
64798845 JP |
1404 | static void e1000_create_lbtest_frame(struct sk_buff *skb, |
1405 | unsigned int frame_size) | |
1da177e4 LT |
1406 | { |
1407 | memset(skb->data, 0xFF, frame_size); | |
ce7393b9 | 1408 | frame_size &= ~1; |
1da177e4 LT |
1409 | memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1); |
1410 | memset(&skb->data[frame_size / 2 + 10], 0xBE, 1); | |
1411 | memset(&skb->data[frame_size / 2 + 12], 0xAF, 1); | |
1412 | } | |
1413 | ||
64798845 JP |
1414 | static int e1000_check_lbtest_frame(struct sk_buff *skb, |
1415 | unsigned int frame_size) | |
1da177e4 | 1416 | { |
ce7393b9 | 1417 | frame_size &= ~1; |
96838a40 JB |
1418 | if (*(skb->data + 3) == 0xFF) { |
1419 | if ((*(skb->data + frame_size / 2 + 10) == 0xBE) && | |
1da177e4 LT |
1420 | (*(skb->data + frame_size / 2 + 12) == 0xAF)) { |
1421 | return 0; | |
1422 | } | |
1423 | } | |
1424 | return 13; | |
1425 | } | |
1426 | ||
64798845 | 1427 | static int e1000_run_loopback_test(struct e1000_adapter *adapter) |
1da177e4 | 1428 | { |
1dc32918 | 1429 | struct e1000_hw *hw = &adapter->hw; |
581d708e MC |
1430 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
1431 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 | 1432 | struct pci_dev *pdev = adapter->pdev; |
e4eff729 MC |
1433 | int i, j, k, l, lc, good_cnt, ret_val=0; |
1434 | unsigned long time; | |
1da177e4 | 1435 | |
1dc32918 | 1436 | ew32(RDT, rxdr->count - 1); |
1da177e4 | 1437 | |
96838a40 | 1438 | /* Calculate the loop count based on the largest descriptor ring |
e4eff729 MC |
1439 | * The idea is to wrap the largest ring a number of times using 64 |
1440 | * send/receive pairs during each loop | |
1441 | */ | |
1da177e4 | 1442 | |
96838a40 | 1443 | if (rxdr->count <= txdr->count) |
e4eff729 MC |
1444 | lc = ((txdr->count / 64) * 2) + 1; |
1445 | else | |
1446 | lc = ((rxdr->count / 64) * 2) + 1; | |
1447 | ||
1448 | k = l = 0; | |
96838a40 JB |
1449 | for (j = 0; j <= lc; j++) { /* loop count loop */ |
1450 | for (i = 0; i < 64; i++) { /* send the packets */ | |
1451 | e1000_create_lbtest_frame(txdr->buffer_info[i].skb, | |
e4eff729 | 1452 | 1024); |
b16f53be NN |
1453 | dma_sync_single_for_device(&pdev->dev, |
1454 | txdr->buffer_info[k].dma, | |
1455 | txdr->buffer_info[k].length, | |
1456 | DMA_TO_DEVICE); | |
96838a40 | 1457 | if (unlikely(++k == txdr->count)) k = 0; |
e4eff729 | 1458 | } |
1dc32918 | 1459 | ew32(TDT, k); |
f8ec4733 | 1460 | msleep(200); |
e4eff729 MC |
1461 | time = jiffies; /* set the start time for the receive */ |
1462 | good_cnt = 0; | |
1463 | do { /* receive the sent packets */ | |
b16f53be NN |
1464 | dma_sync_single_for_cpu(&pdev->dev, |
1465 | rxdr->buffer_info[l].dma, | |
1466 | rxdr->buffer_info[l].length, | |
1467 | DMA_FROM_DEVICE); | |
96838a40 | 1468 | |
e4eff729 MC |
1469 | ret_val = e1000_check_lbtest_frame( |
1470 | rxdr->buffer_info[l].skb, | |
1471 | 1024); | |
96838a40 | 1472 | if (!ret_val) |
e4eff729 | 1473 | good_cnt++; |
96838a40 JB |
1474 | if (unlikely(++l == rxdr->count)) l = 0; |
1475 | /* time + 20 msecs (200 msecs on 2.4) is more than | |
1476 | * enough time to complete the receives, if it's | |
e4eff729 MC |
1477 | * exceeded, break and error off |
1478 | */ | |
1479 | } while (good_cnt < 64 && jiffies < (time + 20)); | |
96838a40 | 1480 | if (good_cnt != 64) { |
e4eff729 | 1481 | ret_val = 13; /* ret_val is the same as mis-compare */ |
96838a40 | 1482 | break; |
e4eff729 | 1483 | } |
96838a40 | 1484 | if (jiffies >= (time + 2)) { |
e4eff729 MC |
1485 | ret_val = 14; /* error code for time out error */ |
1486 | break; | |
1487 | } | |
1488 | } /* end loop count loop */ | |
1da177e4 LT |
1489 | return ret_val; |
1490 | } | |
1491 | ||
64798845 | 1492 | static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data) |
1da177e4 | 1493 | { |
c7be73bc JP |
1494 | *data = e1000_setup_desc_rings(adapter); |
1495 | if (*data) | |
57128197 | 1496 | goto out; |
c7be73bc JP |
1497 | *data = e1000_setup_loopback_test(adapter); |
1498 | if (*data) | |
57128197 | 1499 | goto err_loopback; |
1da177e4 LT |
1500 | *data = e1000_run_loopback_test(adapter); |
1501 | e1000_loopback_cleanup(adapter); | |
57128197 | 1502 | |
1da177e4 | 1503 | err_loopback: |
57128197 JK |
1504 | e1000_free_desc_rings(adapter); |
1505 | out: | |
1da177e4 LT |
1506 | return *data; |
1507 | } | |
1508 | ||
64798845 | 1509 | static int e1000_link_test(struct e1000_adapter *adapter, u64 *data) |
1da177e4 | 1510 | { |
1dc32918 | 1511 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 1512 | *data = 0; |
1dc32918 | 1513 | if (hw->media_type == e1000_media_type_internal_serdes) { |
1da177e4 | 1514 | int i = 0; |
be0f0719 | 1515 | hw->serdes_has_link = false; |
1da177e4 | 1516 | |
2648345f MC |
1517 | /* On some blade server designs, link establishment |
1518 | * could take as long as 2-3 minutes */ | |
1da177e4 | 1519 | do { |
1dc32918 | 1520 | e1000_check_for_link(hw); |
be0f0719 | 1521 | if (hw->serdes_has_link) |
1da177e4 | 1522 | return *data; |
f8ec4733 | 1523 | msleep(20); |
1da177e4 LT |
1524 | } while (i++ < 3750); |
1525 | ||
2648345f | 1526 | *data = 1; |
1da177e4 | 1527 | } else { |
1dc32918 JP |
1528 | e1000_check_for_link(hw); |
1529 | if (hw->autoneg) /* if auto_neg is set wait for it */ | |
f8ec4733 | 1530 | msleep(4000); |
1da177e4 | 1531 | |
1dc32918 | 1532 | if (!(er32(STATUS) & E1000_STATUS_LU)) { |
1da177e4 LT |
1533 | *data = 1; |
1534 | } | |
1535 | } | |
1536 | return *data; | |
1537 | } | |
1538 | ||
64798845 | 1539 | static int e1000_get_sset_count(struct net_device *netdev, int sset) |
1da177e4 | 1540 | { |
b9f2c044 JG |
1541 | switch (sset) { |
1542 | case ETH_SS_TEST: | |
1543 | return E1000_TEST_LEN; | |
1544 | case ETH_SS_STATS: | |
1545 | return E1000_STATS_LEN; | |
1546 | default: | |
1547 | return -EOPNOTSUPP; | |
1548 | } | |
1da177e4 LT |
1549 | } |
1550 | ||
64798845 JP |
1551 | static void e1000_diag_test(struct net_device *netdev, |
1552 | struct ethtool_test *eth_test, u64 *data) | |
1da177e4 | 1553 | { |
60490fe0 | 1554 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 1555 | struct e1000_hw *hw = &adapter->hw; |
c3033b01 | 1556 | bool if_running = netif_running(netdev); |
1da177e4 | 1557 | |
1314bbf3 | 1558 | set_bit(__E1000_TESTING, &adapter->flags); |
96838a40 | 1559 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { |
1da177e4 LT |
1560 | /* Offline tests */ |
1561 | ||
1562 | /* save speed, duplex, autoneg settings */ | |
1dc32918 JP |
1563 | u16 autoneg_advertised = hw->autoneg_advertised; |
1564 | u8 forced_speed_duplex = hw->forced_speed_duplex; | |
1565 | u8 autoneg = hw->autoneg; | |
1da177e4 | 1566 | |
d658266e JB |
1567 | DPRINTK(HW, INFO, "offline testing starting\n"); |
1568 | ||
1da177e4 LT |
1569 | /* Link test performed before hardware reset so autoneg doesn't |
1570 | * interfere with test result */ | |
96838a40 | 1571 | if (e1000_link_test(adapter, &data[4])) |
1da177e4 LT |
1572 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1573 | ||
96838a40 | 1574 | if (if_running) |
2db10a08 AK |
1575 | /* indicate we're in test mode */ |
1576 | dev_close(netdev); | |
1da177e4 LT |
1577 | else |
1578 | e1000_reset(adapter); | |
1579 | ||
96838a40 | 1580 | if (e1000_reg_test(adapter, &data[0])) |
1da177e4 LT |
1581 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1582 | ||
1583 | e1000_reset(adapter); | |
96838a40 | 1584 | if (e1000_eeprom_test(adapter, &data[1])) |
1da177e4 LT |
1585 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1586 | ||
1587 | e1000_reset(adapter); | |
96838a40 | 1588 | if (e1000_intr_test(adapter, &data[2])) |
1da177e4 LT |
1589 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1590 | ||
1591 | e1000_reset(adapter); | |
d658266e JB |
1592 | /* make sure the phy is powered up */ |
1593 | e1000_power_up_phy(adapter); | |
96838a40 | 1594 | if (e1000_loopback_test(adapter, &data[3])) |
1da177e4 LT |
1595 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1596 | ||
1597 | /* restore speed, duplex, autoneg settings */ | |
1dc32918 JP |
1598 | hw->autoneg_advertised = autoneg_advertised; |
1599 | hw->forced_speed_duplex = forced_speed_duplex; | |
1600 | hw->autoneg = autoneg; | |
1da177e4 LT |
1601 | |
1602 | e1000_reset(adapter); | |
1314bbf3 | 1603 | clear_bit(__E1000_TESTING, &adapter->flags); |
96838a40 | 1604 | if (if_running) |
2db10a08 | 1605 | dev_open(netdev); |
1da177e4 | 1606 | } else { |
d658266e | 1607 | DPRINTK(HW, INFO, "online testing starting\n"); |
1da177e4 | 1608 | /* Online tests */ |
96838a40 | 1609 | if (e1000_link_test(adapter, &data[4])) |
1da177e4 LT |
1610 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1611 | ||
90fb5135 | 1612 | /* Online tests aren't run; pass by default */ |
1da177e4 LT |
1613 | data[0] = 0; |
1614 | data[1] = 0; | |
1615 | data[2] = 0; | |
1616 | data[3] = 0; | |
2db10a08 | 1617 | |
1314bbf3 | 1618 | clear_bit(__E1000_TESTING, &adapter->flags); |
1da177e4 | 1619 | } |
352c9f85 | 1620 | msleep_interruptible(4 * 1000); |
1da177e4 LT |
1621 | } |
1622 | ||
64798845 JP |
1623 | static int e1000_wol_exclusion(struct e1000_adapter *adapter, |
1624 | struct ethtool_wolinfo *wol) | |
1da177e4 | 1625 | { |
1da177e4 | 1626 | struct e1000_hw *hw = &adapter->hw; |
120cd576 | 1627 | int retval = 1; /* fail by default */ |
1da177e4 | 1628 | |
120cd576 | 1629 | switch (hw->device_id) { |
dc1f71f6 | 1630 | case E1000_DEV_ID_82542: |
1da177e4 LT |
1631 | case E1000_DEV_ID_82543GC_FIBER: |
1632 | case E1000_DEV_ID_82543GC_COPPER: | |
1633 | case E1000_DEV_ID_82544EI_FIBER: | |
1634 | case E1000_DEV_ID_82546EB_QUAD_COPPER: | |
1635 | case E1000_DEV_ID_82545EM_FIBER: | |
1636 | case E1000_DEV_ID_82545EM_COPPER: | |
84916829 | 1637 | case E1000_DEV_ID_82546GB_QUAD_COPPER: |
120cd576 JB |
1638 | case E1000_DEV_ID_82546GB_PCIE: |
1639 | /* these don't support WoL at all */ | |
1da177e4 | 1640 | wol->supported = 0; |
120cd576 | 1641 | break; |
1da177e4 LT |
1642 | case E1000_DEV_ID_82546EB_FIBER: |
1643 | case E1000_DEV_ID_82546GB_FIBER: | |
120cd576 | 1644 | /* Wake events not supported on port B */ |
1dc32918 | 1645 | if (er32(STATUS) & E1000_STATUS_FUNC_1) { |
1da177e4 | 1646 | wol->supported = 0; |
120cd576 | 1647 | break; |
1da177e4 | 1648 | } |
120cd576 JB |
1649 | /* return success for non excluded adapter ports */ |
1650 | retval = 0; | |
1651 | break; | |
1652 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: | |
1653 | /* quad port adapters only support WoL on port A */ | |
1654 | if (!adapter->quad_port_a) { | |
1655 | wol->supported = 0; | |
1656 | break; | |
1657 | } | |
1658 | /* return success for non excluded adapter ports */ | |
1659 | retval = 0; | |
1660 | break; | |
1da177e4 | 1661 | default: |
120cd576 JB |
1662 | /* dual port cards only support WoL on port A from now on |
1663 | * unless it was enabled in the eeprom for port B | |
1664 | * so exclude FUNC_1 ports from having WoL enabled */ | |
1dc32918 | 1665 | if (er32(STATUS) & E1000_STATUS_FUNC_1 && |
120cd576 JB |
1666 | !adapter->eeprom_wol) { |
1667 | wol->supported = 0; | |
1668 | break; | |
1669 | } | |
84916829 | 1670 | |
120cd576 JB |
1671 | retval = 0; |
1672 | } | |
1673 | ||
1674 | return retval; | |
1675 | } | |
1676 | ||
64798845 JP |
1677 | static void e1000_get_wol(struct net_device *netdev, |
1678 | struct ethtool_wolinfo *wol) | |
120cd576 JB |
1679 | { |
1680 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1dc32918 | 1681 | struct e1000_hw *hw = &adapter->hw; |
120cd576 JB |
1682 | |
1683 | wol->supported = WAKE_UCAST | WAKE_MCAST | | |
1684 | WAKE_BCAST | WAKE_MAGIC; | |
1685 | wol->wolopts = 0; | |
1686 | ||
1687 | /* this function will set ->supported = 0 and return 1 if wol is not | |
1688 | * supported by this hardware */ | |
de126489 RW |
1689 | if (e1000_wol_exclusion(adapter, wol) || |
1690 | !device_can_wakeup(&adapter->pdev->dev)) | |
1da177e4 | 1691 | return; |
120cd576 JB |
1692 | |
1693 | /* apply any specific unsupported masks here */ | |
1dc32918 | 1694 | switch (hw->device_id) { |
120cd576 JB |
1695 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: |
1696 | /* KSP3 does not suppport UCAST wake-ups */ | |
1697 | wol->supported &= ~WAKE_UCAST; | |
1698 | ||
1699 | if (adapter->wol & E1000_WUFC_EX) | |
1700 | DPRINTK(DRV, ERR, "Interface does not support " | |
1701 | "directed (unicast) frame wake-up packets\n"); | |
1702 | break; | |
1703 | default: | |
1704 | break; | |
1da177e4 | 1705 | } |
120cd576 JB |
1706 | |
1707 | if (adapter->wol & E1000_WUFC_EX) | |
1708 | wol->wolopts |= WAKE_UCAST; | |
1709 | if (adapter->wol & E1000_WUFC_MC) | |
1710 | wol->wolopts |= WAKE_MCAST; | |
1711 | if (adapter->wol & E1000_WUFC_BC) | |
1712 | wol->wolopts |= WAKE_BCAST; | |
1713 | if (adapter->wol & E1000_WUFC_MAG) | |
1714 | wol->wolopts |= WAKE_MAGIC; | |
1715 | ||
1716 | return; | |
1da177e4 LT |
1717 | } |
1718 | ||
64798845 | 1719 | static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) |
1da177e4 | 1720 | { |
60490fe0 | 1721 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1722 | struct e1000_hw *hw = &adapter->hw; |
1723 | ||
120cd576 JB |
1724 | if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE)) |
1725 | return -EOPNOTSUPP; | |
1726 | ||
de126489 RW |
1727 | if (e1000_wol_exclusion(adapter, wol) || |
1728 | !device_can_wakeup(&adapter->pdev->dev)) | |
1da177e4 LT |
1729 | return wol->wolopts ? -EOPNOTSUPP : 0; |
1730 | ||
120cd576 | 1731 | switch (hw->device_id) { |
84916829 | 1732 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: |
84916829 JK |
1733 | if (wol->wolopts & WAKE_UCAST) { |
1734 | DPRINTK(DRV, ERR, "Interface does not support " | |
1735 | "directed (unicast) frame wake-up packets\n"); | |
1736 | return -EOPNOTSUPP; | |
1737 | } | |
120cd576 | 1738 | break; |
1da177e4 | 1739 | default: |
120cd576 | 1740 | break; |
1da177e4 LT |
1741 | } |
1742 | ||
120cd576 JB |
1743 | /* these settings will always override what we currently have */ |
1744 | adapter->wol = 0; | |
1745 | ||
1746 | if (wol->wolopts & WAKE_UCAST) | |
1747 | adapter->wol |= E1000_WUFC_EX; | |
1748 | if (wol->wolopts & WAKE_MCAST) | |
1749 | adapter->wol |= E1000_WUFC_MC; | |
1750 | if (wol->wolopts & WAKE_BCAST) | |
1751 | adapter->wol |= E1000_WUFC_BC; | |
1752 | if (wol->wolopts & WAKE_MAGIC) | |
1753 | adapter->wol |= E1000_WUFC_MAG; | |
1754 | ||
de126489 RW |
1755 | device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); |
1756 | ||
1da177e4 LT |
1757 | return 0; |
1758 | } | |
1759 | ||
1760 | /* toggle LED 4 times per second = 2 "blinks" per second */ | |
1761 | #define E1000_ID_INTERVAL (HZ/4) | |
1762 | ||
1763 | /* bit defines for adapter->led_status */ | |
1764 | #define E1000_LED_ON 0 | |
1765 | ||
64798845 | 1766 | static void e1000_led_blink_callback(unsigned long data) |
1da177e4 LT |
1767 | { |
1768 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
1dc32918 | 1769 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 1770 | |
96838a40 | 1771 | if (test_and_change_bit(E1000_LED_ON, &adapter->led_status)) |
1dc32918 | 1772 | e1000_led_off(hw); |
1da177e4 | 1773 | else |
1dc32918 | 1774 | e1000_led_on(hw); |
1da177e4 LT |
1775 | |
1776 | mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL); | |
1777 | } | |
1778 | ||
64798845 | 1779 | static int e1000_phys_id(struct net_device *netdev, u32 data) |
1da177e4 | 1780 | { |
60490fe0 | 1781 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 1782 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 1783 | |
abec42a4 SH |
1784 | if (!data) |
1785 | data = INT_MAX; | |
1da177e4 | 1786 | |
1532ecea JB |
1787 | if (!adapter->blink_timer.function) { |
1788 | init_timer(&adapter->blink_timer); | |
1789 | adapter->blink_timer.function = e1000_led_blink_callback; | |
1790 | adapter->blink_timer.data = (unsigned long)adapter; | |
1da177e4 | 1791 | } |
1532ecea JB |
1792 | e1000_setup_led(hw); |
1793 | mod_timer(&adapter->blink_timer, jiffies); | |
1794 | msleep_interruptible(data * 1000); | |
1795 | del_timer_sync(&adapter->blink_timer); | |
1da177e4 | 1796 | |
1dc32918 | 1797 | e1000_led_off(hw); |
1da177e4 | 1798 | clear_bit(E1000_LED_ON, &adapter->led_status); |
1dc32918 | 1799 | e1000_cleanup_led(hw); |
1da177e4 LT |
1800 | |
1801 | return 0; | |
1802 | } | |
1803 | ||
94c9e5a8 JB |
1804 | static int e1000_get_coalesce(struct net_device *netdev, |
1805 | struct ethtool_coalesce *ec) | |
1806 | { | |
1807 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1808 | ||
1809 | if (adapter->hw.mac_type < e1000_82545) | |
1810 | return -EOPNOTSUPP; | |
1811 | ||
1812 | if (adapter->itr_setting <= 3) | |
1813 | ec->rx_coalesce_usecs = adapter->itr_setting; | |
1814 | else | |
1815 | ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting; | |
1816 | ||
1817 | return 0; | |
1818 | } | |
1819 | ||
1820 | static int e1000_set_coalesce(struct net_device *netdev, | |
1821 | struct ethtool_coalesce *ec) | |
1822 | { | |
1823 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1824 | struct e1000_hw *hw = &adapter->hw; | |
1825 | ||
1826 | if (hw->mac_type < e1000_82545) | |
1827 | return -EOPNOTSUPP; | |
1828 | ||
1829 | if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) || | |
1830 | ((ec->rx_coalesce_usecs > 3) && | |
1831 | (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) || | |
1832 | (ec->rx_coalesce_usecs == 2)) | |
1833 | return -EINVAL; | |
1834 | ||
1835 | if (ec->rx_coalesce_usecs <= 3) { | |
1836 | adapter->itr = 20000; | |
1837 | adapter->itr_setting = ec->rx_coalesce_usecs; | |
1838 | } else { | |
1839 | adapter->itr = (1000000 / ec->rx_coalesce_usecs); | |
1840 | adapter->itr_setting = adapter->itr & ~3; | |
1841 | } | |
1842 | ||
1843 | if (adapter->itr_setting != 0) | |
1844 | ew32(ITR, 1000000000 / (adapter->itr * 256)); | |
1845 | else | |
1846 | ew32(ITR, 0); | |
1847 | ||
1848 | return 0; | |
1849 | } | |
1850 | ||
64798845 | 1851 | static int e1000_nway_reset(struct net_device *netdev) |
1da177e4 | 1852 | { |
60490fe0 | 1853 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2db10a08 AK |
1854 | if (netif_running(netdev)) |
1855 | e1000_reinit_locked(adapter); | |
1da177e4 LT |
1856 | return 0; |
1857 | } | |
1858 | ||
64798845 JP |
1859 | static void e1000_get_ethtool_stats(struct net_device *netdev, |
1860 | struct ethtool_stats *stats, u64 *data) | |
1da177e4 | 1861 | { |
60490fe0 | 1862 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 1863 | int i; |
8328c38f | 1864 | char *p = NULL; |
1da177e4 LT |
1865 | |
1866 | e1000_update_stats(adapter); | |
7bfa4816 | 1867 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { |
8328c38f AK |
1868 | switch (e1000_gstrings_stats[i].type) { |
1869 | case NETDEV_STATS: | |
1870 | p = (char *) netdev + | |
1871 | e1000_gstrings_stats[i].stat_offset; | |
1872 | break; | |
1873 | case E1000_STATS: | |
1874 | p = (char *) adapter + | |
1875 | e1000_gstrings_stats[i].stat_offset; | |
1876 | break; | |
1877 | } | |
1878 | ||
7bfa4816 | 1879 | data[i] = (e1000_gstrings_stats[i].sizeof_stat == |
406874a7 | 1880 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; |
1da177e4 | 1881 | } |
7bfa4816 | 1882 | /* BUG_ON(i != E1000_STATS_LEN); */ |
1da177e4 LT |
1883 | } |
1884 | ||
64798845 JP |
1885 | static void e1000_get_strings(struct net_device *netdev, u32 stringset, |
1886 | u8 *data) | |
1da177e4 | 1887 | { |
406874a7 | 1888 | u8 *p = data; |
1da177e4 LT |
1889 | int i; |
1890 | ||
96838a40 | 1891 | switch (stringset) { |
1da177e4 | 1892 | case ETH_SS_TEST: |
96838a40 | 1893 | memcpy(data, *e1000_gstrings_test, |
c32bc6e9 | 1894 | sizeof(e1000_gstrings_test)); |
1da177e4 LT |
1895 | break; |
1896 | case ETH_SS_STATS: | |
7bfa4816 JK |
1897 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { |
1898 | memcpy(p, e1000_gstrings_stats[i].stat_string, | |
1899 | ETH_GSTRING_LEN); | |
1900 | p += ETH_GSTRING_LEN; | |
1901 | } | |
7bfa4816 | 1902 | /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */ |
1da177e4 LT |
1903 | break; |
1904 | } | |
1905 | } | |
1906 | ||
7282d491 | 1907 | static const struct ethtool_ops e1000_ethtool_ops = { |
1da177e4 LT |
1908 | .get_settings = e1000_get_settings, |
1909 | .set_settings = e1000_set_settings, | |
1910 | .get_drvinfo = e1000_get_drvinfo, | |
1911 | .get_regs_len = e1000_get_regs_len, | |
1912 | .get_regs = e1000_get_regs, | |
1913 | .get_wol = e1000_get_wol, | |
1914 | .set_wol = e1000_set_wol, | |
8fc897b0 AK |
1915 | .get_msglevel = e1000_get_msglevel, |
1916 | .set_msglevel = e1000_set_msglevel, | |
1da177e4 | 1917 | .nway_reset = e1000_nway_reset, |
b548192a | 1918 | .get_link = e1000_get_link, |
1da177e4 LT |
1919 | .get_eeprom_len = e1000_get_eeprom_len, |
1920 | .get_eeprom = e1000_get_eeprom, | |
1921 | .set_eeprom = e1000_set_eeprom, | |
1922 | .get_ringparam = e1000_get_ringparam, | |
1923 | .set_ringparam = e1000_set_ringparam, | |
8fc897b0 AK |
1924 | .get_pauseparam = e1000_get_pauseparam, |
1925 | .set_pauseparam = e1000_set_pauseparam, | |
1926 | .get_rx_csum = e1000_get_rx_csum, | |
1927 | .set_rx_csum = e1000_set_rx_csum, | |
1928 | .get_tx_csum = e1000_get_tx_csum, | |
1929 | .set_tx_csum = e1000_set_tx_csum, | |
8fc897b0 | 1930 | .set_sg = ethtool_op_set_sg, |
8fc897b0 | 1931 | .set_tso = e1000_set_tso, |
1da177e4 LT |
1932 | .self_test = e1000_diag_test, |
1933 | .get_strings = e1000_get_strings, | |
1934 | .phys_id = e1000_phys_id, | |
1da177e4 | 1935 | .get_ethtool_stats = e1000_get_ethtool_stats, |
94c9e5a8 JB |
1936 | .get_sset_count = e1000_get_sset_count, |
1937 | .get_coalesce = e1000_get_coalesce, | |
1938 | .set_coalesce = e1000_set_coalesce, | |
1da177e4 LT |
1939 | }; |
1940 | ||
1941 | void e1000_set_ethtool_ops(struct net_device *netdev) | |
1942 | { | |
1943 | SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops); | |
1944 | } |