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e1000: Support for 82571 and 82572 controllers
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1da177e4
LT
1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
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5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
32
33#include <asm/uaccess.h>
34
35extern char e1000_driver_name[];
36extern char e1000_driver_version[];
37
38extern int e1000_up(struct e1000_adapter *adapter);
39extern void e1000_down(struct e1000_adapter *adapter);
40extern void e1000_reset(struct e1000_adapter *adapter);
41extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
42extern int e1000_setup_rx_resources(struct e1000_adapter *adapter);
43extern int e1000_setup_tx_resources(struct e1000_adapter *adapter);
44extern void e1000_free_rx_resources(struct e1000_adapter *adapter);
45extern void e1000_free_tx_resources(struct e1000_adapter *adapter);
46extern void e1000_update_stats(struct e1000_adapter *adapter);
47
48struct e1000_stats {
49 char stat_string[ETH_GSTRING_LEN];
50 int sizeof_stat;
51 int stat_offset;
52};
53
54#define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
55 offsetof(struct e1000_adapter, m)
56static const struct e1000_stats e1000_gstrings_stats[] = {
57 { "rx_packets", E1000_STAT(net_stats.rx_packets) },
58 { "tx_packets", E1000_STAT(net_stats.tx_packets) },
59 { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
60 { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
61 { "rx_errors", E1000_STAT(net_stats.rx_errors) },
62 { "tx_errors", E1000_STAT(net_stats.tx_errors) },
63 { "rx_dropped", E1000_STAT(net_stats.rx_dropped) },
64 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
65 { "multicast", E1000_STAT(net_stats.multicast) },
66 { "collisions", E1000_STAT(net_stats.collisions) },
67 { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
68 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
69 { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
70 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
71 { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
2648345f 72 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
1da177e4
LT
73 { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
74 { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
75 { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
76 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
77 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
78 { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
79 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
80 { "tx_deferred_ok", E1000_STAT(stats.dc) },
81 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
82 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
83 { "rx_long_length_errors", E1000_STAT(stats.roc) },
84 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
85 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
86 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
87 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
88 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
89 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
90 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
91 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
92 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
93 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
94 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }
95};
96#define E1000_STATS_LEN \
97 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
98static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
99 "Register test (offline)", "Eeprom test (offline)",
100 "Interrupt test (offline)", "Loopback test (offline)",
101 "Link test (on/offline)"
102};
103#define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
104
105static int
106e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
107{
60490fe0 108 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
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109 struct e1000_hw *hw = &adapter->hw;
110
111 if(hw->media_type == e1000_media_type_copper) {
112
113 ecmd->supported = (SUPPORTED_10baseT_Half |
114 SUPPORTED_10baseT_Full |
115 SUPPORTED_100baseT_Half |
116 SUPPORTED_100baseT_Full |
117 SUPPORTED_1000baseT_Full|
118 SUPPORTED_Autoneg |
119 SUPPORTED_TP);
120
121 ecmd->advertising = ADVERTISED_TP;
122
123 if(hw->autoneg == 1) {
124 ecmd->advertising |= ADVERTISED_Autoneg;
125
126 /* the e1000 autoneg seems to match ethtool nicely */
127
128 ecmd->advertising |= hw->autoneg_advertised;
129 }
130
131 ecmd->port = PORT_TP;
132 ecmd->phy_address = hw->phy_addr;
133
134 if(hw->mac_type == e1000_82543)
135 ecmd->transceiver = XCVR_EXTERNAL;
136 else
137 ecmd->transceiver = XCVR_INTERNAL;
138
139 } else {
140 ecmd->supported = (SUPPORTED_1000baseT_Full |
141 SUPPORTED_FIBRE |
142 SUPPORTED_Autoneg);
143
012609a8
MC
144 ecmd->advertising = (ADVERTISED_1000baseT_Full |
145 ADVERTISED_FIBRE |
146 ADVERTISED_Autoneg);
1da177e4
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147
148 ecmd->port = PORT_FIBRE;
149
150 if(hw->mac_type >= e1000_82545)
151 ecmd->transceiver = XCVR_INTERNAL;
152 else
153 ecmd->transceiver = XCVR_EXTERNAL;
154 }
155
156 if(netif_carrier_ok(adapter->netdev)) {
157
158 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
159 &adapter->link_duplex);
160 ecmd->speed = adapter->link_speed;
161
162 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
163 * and HALF_DUPLEX != DUPLEX_HALF */
164
165 if(adapter->link_duplex == FULL_DUPLEX)
166 ecmd->duplex = DUPLEX_FULL;
167 else
168 ecmd->duplex = DUPLEX_HALF;
169 } else {
170 ecmd->speed = -1;
171 ecmd->duplex = -1;
172 }
173
174 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
175 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
176 return 0;
177}
178
179static int
180e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
181{
60490fe0 182 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
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183 struct e1000_hw *hw = &adapter->hw;
184
185 if(ecmd->autoneg == AUTONEG_ENABLE) {
186 hw->autoneg = 1;
012609a8
MC
187 if(hw->media_type == e1000_media_type_fiber)
188 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
189 ADVERTISED_FIBRE |
190 ADVERTISED_Autoneg;
191 else
192 hw->autoneg_advertised = ADVERTISED_10baseT_Half |
193 ADVERTISED_10baseT_Full |
194 ADVERTISED_100baseT_Half |
195 ADVERTISED_100baseT_Full |
196 ADVERTISED_1000baseT_Full|
197 ADVERTISED_Autoneg |
198 ADVERTISED_TP;
199 ecmd->advertising = hw->autoneg_advertised;
1da177e4
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200 } else
201 if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
202 return -EINVAL;
203
204 /* reset the link */
205
206 if(netif_running(adapter->netdev)) {
207 e1000_down(adapter);
208 e1000_reset(adapter);
209 e1000_up(adapter);
210 } else
211 e1000_reset(adapter);
212
213 return 0;
214}
215
216static void
217e1000_get_pauseparam(struct net_device *netdev,
218 struct ethtool_pauseparam *pause)
219{
60490fe0 220 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
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221 struct e1000_hw *hw = &adapter->hw;
222
223 pause->autoneg =
224 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
225
226 if(hw->fc == e1000_fc_rx_pause)
227 pause->rx_pause = 1;
228 else if(hw->fc == e1000_fc_tx_pause)
229 pause->tx_pause = 1;
230 else if(hw->fc == e1000_fc_full) {
231 pause->rx_pause = 1;
232 pause->tx_pause = 1;
233 }
234}
235
236static int
237e1000_set_pauseparam(struct net_device *netdev,
238 struct ethtool_pauseparam *pause)
239{
60490fe0 240 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
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241 struct e1000_hw *hw = &adapter->hw;
242
243 adapter->fc_autoneg = pause->autoneg;
244
245 if(pause->rx_pause && pause->tx_pause)
246 hw->fc = e1000_fc_full;
247 else if(pause->rx_pause && !pause->tx_pause)
248 hw->fc = e1000_fc_rx_pause;
249 else if(!pause->rx_pause && pause->tx_pause)
250 hw->fc = e1000_fc_tx_pause;
251 else if(!pause->rx_pause && !pause->tx_pause)
252 hw->fc = e1000_fc_none;
253
254 hw->original_fc = hw->fc;
255
256 if(adapter->fc_autoneg == AUTONEG_ENABLE) {
257 if(netif_running(adapter->netdev)) {
258 e1000_down(adapter);
259 e1000_up(adapter);
260 } else
261 e1000_reset(adapter);
262 }
263 else
264 return ((hw->media_type == e1000_media_type_fiber) ?
265 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
266
267 return 0;
268}
269
270static uint32_t
271e1000_get_rx_csum(struct net_device *netdev)
272{
60490fe0 273 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
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274 return adapter->rx_csum;
275}
276
277static int
278e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
279{
60490fe0 280 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
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281 adapter->rx_csum = data;
282
283 if(netif_running(netdev)) {
284 e1000_down(adapter);
285 e1000_up(adapter);
286 } else
287 e1000_reset(adapter);
288 return 0;
289}
290
291static uint32_t
292e1000_get_tx_csum(struct net_device *netdev)
293{
294 return (netdev->features & NETIF_F_HW_CSUM) != 0;
295}
296
297static int
298e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
299{
60490fe0 300 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
301
302 if(adapter->hw.mac_type < e1000_82543) {
303 if (!data)
304 return -EINVAL;
305 return 0;
306 }
307
308 if (data)
309 netdev->features |= NETIF_F_HW_CSUM;
310 else
311 netdev->features &= ~NETIF_F_HW_CSUM;
312
313 return 0;
314}
315
316#ifdef NETIF_F_TSO
317static int
318e1000_set_tso(struct net_device *netdev, uint32_t data)
319{
60490fe0
MC
320 struct e1000_adapter *adapter = netdev_priv(netdev);
321 if((adapter->hw.mac_type < e1000_82544) ||
1da177e4
LT
322 (adapter->hw.mac_type == e1000_82547))
323 return data ? -EINVAL : 0;
324
325 if (data)
326 netdev->features |= NETIF_F_TSO;
327 else
328 netdev->features &= ~NETIF_F_TSO;
329 return 0;
330}
331#endif /* NETIF_F_TSO */
332
333static uint32_t
334e1000_get_msglevel(struct net_device *netdev)
335{
60490fe0 336 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
337 return adapter->msg_enable;
338}
339
340static void
341e1000_set_msglevel(struct net_device *netdev, uint32_t data)
342{
60490fe0 343 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
344 adapter->msg_enable = data;
345}
346
347static int
348e1000_get_regs_len(struct net_device *netdev)
349{
350#define E1000_REGS_LEN 32
351 return E1000_REGS_LEN * sizeof(uint32_t);
352}
353
354static void
355e1000_get_regs(struct net_device *netdev,
356 struct ethtool_regs *regs, void *p)
357{
60490fe0 358 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
359 struct e1000_hw *hw = &adapter->hw;
360 uint32_t *regs_buff = p;
361 uint16_t phy_data;
362
363 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
364
365 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
366
367 regs_buff[0] = E1000_READ_REG(hw, CTRL);
368 regs_buff[1] = E1000_READ_REG(hw, STATUS);
369
370 regs_buff[2] = E1000_READ_REG(hw, RCTL);
371 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
372 regs_buff[4] = E1000_READ_REG(hw, RDH);
373 regs_buff[5] = E1000_READ_REG(hw, RDT);
374 regs_buff[6] = E1000_READ_REG(hw, RDTR);
375
376 regs_buff[7] = E1000_READ_REG(hw, TCTL);
377 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
378 regs_buff[9] = E1000_READ_REG(hw, TDH);
379 regs_buff[10] = E1000_READ_REG(hw, TDT);
380 regs_buff[11] = E1000_READ_REG(hw, TIDV);
381
382 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
383 if(hw->phy_type == e1000_phy_igp) {
384 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
385 IGP01E1000_PHY_AGC_A);
386 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
387 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
388 regs_buff[13] = (uint32_t)phy_data; /* cable length */
389 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
390 IGP01E1000_PHY_AGC_B);
391 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
392 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
393 regs_buff[14] = (uint32_t)phy_data; /* cable length */
394 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
395 IGP01E1000_PHY_AGC_C);
396 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
397 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
398 regs_buff[15] = (uint32_t)phy_data; /* cable length */
399 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
400 IGP01E1000_PHY_AGC_D);
401 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
402 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
403 regs_buff[16] = (uint32_t)phy_data; /* cable length */
404 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
405 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
406 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
407 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
408 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
409 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
410 IGP01E1000_PHY_PCS_INIT_REG);
411 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
412 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
413 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
414 regs_buff[20] = 0; /* polarity correction enabled (always) */
415 regs_buff[22] = 0; /* phy receive errors (unavailable) */
416 regs_buff[23] = regs_buff[18]; /* mdix mode */
417 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
418 } else {
419 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
420 regs_buff[13] = (uint32_t)phy_data; /* cable length */
421 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
422 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
423 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
424 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
425 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
426 regs_buff[18] = regs_buff[13]; /* cable polarity */
427 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
428 regs_buff[20] = regs_buff[17]; /* polarity correction */
429 /* phy receive errors */
430 regs_buff[22] = adapter->phy_stats.receive_errors;
431 regs_buff[23] = regs_buff[13]; /* mdix mode */
432 }
433 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
434 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
435 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
436 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
437 if(hw->mac_type >= e1000_82540 &&
438 hw->media_type == e1000_media_type_copper) {
439 regs_buff[26] = E1000_READ_REG(hw, MANC);
440 }
441}
442
443static int
444e1000_get_eeprom_len(struct net_device *netdev)
445{
60490fe0 446 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
447 return adapter->hw.eeprom.word_size * 2;
448}
449
450static int
451e1000_get_eeprom(struct net_device *netdev,
452 struct ethtool_eeprom *eeprom, uint8_t *bytes)
453{
60490fe0 454 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
455 struct e1000_hw *hw = &adapter->hw;
456 uint16_t *eeprom_buff;
457 int first_word, last_word;
458 int ret_val = 0;
459 uint16_t i;
460
461 if(eeprom->len == 0)
462 return -EINVAL;
463
464 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
465
466 first_word = eeprom->offset >> 1;
467 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
468
469 eeprom_buff = kmalloc(sizeof(uint16_t) *
470 (last_word - first_word + 1), GFP_KERNEL);
471 if(!eeprom_buff)
472 return -ENOMEM;
473
474 if(hw->eeprom.type == e1000_eeprom_spi)
475 ret_val = e1000_read_eeprom(hw, first_word,
476 last_word - first_word + 1,
477 eeprom_buff);
478 else {
479 for (i = 0; i < last_word - first_word + 1; i++)
480 if((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
481 &eeprom_buff[i])))
482 break;
483 }
484
485 /* Device's eeprom is always little-endian, word addressable */
486 for (i = 0; i < last_word - first_word + 1; i++)
487 le16_to_cpus(&eeprom_buff[i]);
488
489 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
490 eeprom->len);
491 kfree(eeprom_buff);
492
493 return ret_val;
494}
495
496static int
497e1000_set_eeprom(struct net_device *netdev,
498 struct ethtool_eeprom *eeprom, uint8_t *bytes)
499{
60490fe0 500 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
501 struct e1000_hw *hw = &adapter->hw;
502 uint16_t *eeprom_buff;
503 void *ptr;
504 int max_len, first_word, last_word, ret_val = 0;
505 uint16_t i;
506
507 if(eeprom->len == 0)
508 return -EOPNOTSUPP;
509
510 if(eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
511 return -EFAULT;
512
513 max_len = hw->eeprom.word_size * 2;
514
515 first_word = eeprom->offset >> 1;
516 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
517 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
518 if(!eeprom_buff)
519 return -ENOMEM;
520
521 ptr = (void *)eeprom_buff;
522
523 if(eeprom->offset & 1) {
524 /* need read/modify/write of first changed EEPROM word */
525 /* only the second byte of the word is being modified */
526 ret_val = e1000_read_eeprom(hw, first_word, 1,
527 &eeprom_buff[0]);
528 ptr++;
529 }
530 if(((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
531 /* need read/modify/write of last changed EEPROM word */
532 /* only the first byte of the word is being modified */
533 ret_val = e1000_read_eeprom(hw, last_word, 1,
534 &eeprom_buff[last_word - first_word]);
535 }
536
537 /* Device's eeprom is always little-endian, word addressable */
538 for (i = 0; i < last_word - first_word + 1; i++)
539 le16_to_cpus(&eeprom_buff[i]);
540
541 memcpy(ptr, bytes, eeprom->len);
542
543 for (i = 0; i < last_word - first_word + 1; i++)
544 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
545
546 ret_val = e1000_write_eeprom(hw, first_word,
547 last_word - first_word + 1, eeprom_buff);
548
549 /* Update the checksum over the first part of the EEPROM if needed */
550 if((ret_val == 0) && first_word <= EEPROM_CHECKSUM_REG)
551 e1000_update_eeprom_checksum(hw);
552
553 kfree(eeprom_buff);
554 return ret_val;
555}
556
557static void
558e1000_get_drvinfo(struct net_device *netdev,
559 struct ethtool_drvinfo *drvinfo)
560{
60490fe0 561 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
562
563 strncpy(drvinfo->driver, e1000_driver_name, 32);
564 strncpy(drvinfo->version, e1000_driver_version, 32);
565 strncpy(drvinfo->fw_version, "N/A", 32);
566 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
567 drvinfo->n_stats = E1000_STATS_LEN;
568 drvinfo->testinfo_len = E1000_TEST_LEN;
569 drvinfo->regdump_len = e1000_get_regs_len(netdev);
570 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
571}
572
573static void
574e1000_get_ringparam(struct net_device *netdev,
575 struct ethtool_ringparam *ring)
576{
60490fe0 577 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
578 e1000_mac_type mac_type = adapter->hw.mac_type;
579 struct e1000_desc_ring *txdr = &adapter->tx_ring;
580 struct e1000_desc_ring *rxdr = &adapter->rx_ring;
581
582 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
583 E1000_MAX_82544_RXD;
584 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
585 E1000_MAX_82544_TXD;
586 ring->rx_mini_max_pending = 0;
587 ring->rx_jumbo_max_pending = 0;
588 ring->rx_pending = rxdr->count;
589 ring->tx_pending = txdr->count;
590 ring->rx_mini_pending = 0;
591 ring->rx_jumbo_pending = 0;
592}
593
594static int
595e1000_set_ringparam(struct net_device *netdev,
596 struct ethtool_ringparam *ring)
597{
60490fe0 598 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
599 e1000_mac_type mac_type = adapter->hw.mac_type;
600 struct e1000_desc_ring *txdr = &adapter->tx_ring;
601 struct e1000_desc_ring *rxdr = &adapter->rx_ring;
602 struct e1000_desc_ring tx_old, tx_new, rx_old, rx_new;
603 int err;
604
605 tx_old = adapter->tx_ring;
606 rx_old = adapter->rx_ring;
607
2648345f 608 if((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1da177e4
LT
609 return -EINVAL;
610
611 if(netif_running(adapter->netdev))
612 e1000_down(adapter);
613
614 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
615 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
616 E1000_MAX_RXD : E1000_MAX_82544_RXD));
617 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
618
619 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
620 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
621 E1000_MAX_TXD : E1000_MAX_82544_TXD));
622 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
623
624 if(netif_running(adapter->netdev)) {
625 /* Try to get new resources before deleting old */
626 if((err = e1000_setup_rx_resources(adapter)))
627 goto err_setup_rx;
628 if((err = e1000_setup_tx_resources(adapter)))
629 goto err_setup_tx;
630
631 /* save the new, restore the old in order to free it,
632 * then restore the new back again */
633
634 rx_new = adapter->rx_ring;
635 tx_new = adapter->tx_ring;
636 adapter->rx_ring = rx_old;
637 adapter->tx_ring = tx_old;
638 e1000_free_rx_resources(adapter);
639 e1000_free_tx_resources(adapter);
640 adapter->rx_ring = rx_new;
641 adapter->tx_ring = tx_new;
642 if((err = e1000_up(adapter)))
643 return err;
644 }
645
646 return 0;
647err_setup_tx:
648 e1000_free_rx_resources(adapter);
649err_setup_rx:
650 adapter->rx_ring = rx_old;
651 adapter->tx_ring = tx_old;
652 e1000_up(adapter);
653 return err;
654}
655
656#define REG_PATTERN_TEST(R, M, W) \
657{ \
658 uint32_t pat, value; \
659 uint32_t test[] = \
660 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
661 for(pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
662 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
663 value = E1000_READ_REG(&adapter->hw, R); \
664 if(value != (test[pat] & W & M)) { \
b01f6691
MC
665 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
666 "0x%08X expected 0x%08X\n", \
667 E1000_##R, value, (test[pat] & W & M)); \
1da177e4
LT
668 *data = (adapter->hw.mac_type < e1000_82543) ? \
669 E1000_82542_##R : E1000_##R; \
670 return 1; \
671 } \
672 } \
673}
674
675#define REG_SET_AND_CHECK(R, M, W) \
676{ \
677 uint32_t value; \
678 E1000_WRITE_REG(&adapter->hw, R, W & M); \
679 value = E1000_READ_REG(&adapter->hw, R); \
b01f6691
MC
680 if((W & M) != (value & M)) { \
681 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
682 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
1da177e4
LT
683 *data = (adapter->hw.mac_type < e1000_82543) ? \
684 E1000_82542_##R : E1000_##R; \
685 return 1; \
686 } \
687}
688
689static int
690e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
691{
b01f6691
MC
692 uint32_t value, before, after;
693 uint32_t i, toggle;
1da177e4
LT
694
695 /* The status register is Read Only, so a write should fail.
696 * Some bits that get toggled are ignored.
697 */
b01f6691 698 switch (adapter->hw.mac_type) {
868d5309
MC
699 /* there are several bits on newer hardware that are r/w */
700 case e1000_82571:
701 case e1000_82572:
702 toggle = 0x7FFFF3FF;
703 break;
b01f6691
MC
704 case e1000_82573:
705 toggle = 0x7FFFF033;
706 break;
707 default:
708 toggle = 0xFFFFF833;
709 break;
710 }
711
712 before = E1000_READ_REG(&adapter->hw, STATUS);
713 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
714 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
715 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
716 if(value != after) {
717 DPRINTK(DRV, ERR, "failed STATUS register test got: "
718 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT
719 *data = 1;
720 return 1;
721 }
b01f6691
MC
722 /* restore previous status */
723 E1000_WRITE_REG(&adapter->hw, STATUS, before);
1da177e4
LT
724
725 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
726 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
727 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
728 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
729 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
730 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
731 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
732 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
733 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
734 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
735 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
736 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
737 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
738 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
739
740 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
741 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
742 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
743
744 if(adapter->hw.mac_type >= e1000_82543) {
745
746 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
747 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
748 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
749 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
750 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
751
752 for(i = 0; i < E1000_RAR_ENTRIES; i++) {
753 REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
754 0xFFFFFFFF);
755 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
756 0xFFFFFFFF);
757 }
758
759 } else {
760
761 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
762 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
763 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
764 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
765
766 }
767
768 for(i = 0; i < E1000_MC_TBL_SIZE; i++)
769 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
770
771 *data = 0;
772 return 0;
773}
774
775static int
776e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
777{
778 uint16_t temp;
779 uint16_t checksum = 0;
780 uint16_t i;
781
782 *data = 0;
783 /* Read and add up the contents of the EEPROM */
784 for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
785 if((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
786 *data = 1;
787 break;
788 }
789 checksum += temp;
790 }
791
792 /* If Checksum is not Correct return error else test passed */
793 if((checksum != (uint16_t) EEPROM_SUM) && !(*data))
794 *data = 2;
795
796 return *data;
797}
798
799static irqreturn_t
800e1000_test_intr(int irq,
801 void *data,
802 struct pt_regs *regs)
803{
804 struct net_device *netdev = (struct net_device *) data;
60490fe0 805 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
806
807 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
808
809 return IRQ_HANDLED;
810}
811
812static int
813e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
814{
815 struct net_device *netdev = adapter->netdev;
816 uint32_t mask, i=0, shared_int = TRUE;
817 uint32_t irq = adapter->pdev->irq;
818
819 *data = 0;
820
821 /* Hook up test interrupt handler just for this test */
822 if(!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
823 shared_int = FALSE;
2648345f
MC
824 } else if(request_irq(irq, &e1000_test_intr, SA_SHIRQ,
825 netdev->name, netdev)){
1da177e4
LT
826 *data = 1;
827 return -1;
828 }
829
830 /* Disable all the interrupts */
831 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
832 msec_delay(10);
833
834 /* Test each interrupt */
835 for(; i < 10; i++) {
836
837 /* Interrupt to test */
838 mask = 1 << i;
839
840 if(!shared_int) {
841 /* Disable the interrupt to be reported in
842 * the cause register and then force the same
843 * interrupt and see if one gets posted. If
844 * an interrupt was posted to the bus, the
845 * test failed.
846 */
847 adapter->test_icr = 0;
848 E1000_WRITE_REG(&adapter->hw, IMC, mask);
849 E1000_WRITE_REG(&adapter->hw, ICS, mask);
850 msec_delay(10);
851
852 if(adapter->test_icr & mask) {
853 *data = 3;
854 break;
855 }
856 }
857
858 /* Enable the interrupt to be reported in
859 * the cause register and then force the same
860 * interrupt and see if one gets posted. If
861 * an interrupt was not posted to the bus, the
862 * test failed.
863 */
864 adapter->test_icr = 0;
865 E1000_WRITE_REG(&adapter->hw, IMS, mask);
866 E1000_WRITE_REG(&adapter->hw, ICS, mask);
867 msec_delay(10);
868
869 if(!(adapter->test_icr & mask)) {
870 *data = 4;
871 break;
872 }
873
874 if(!shared_int) {
875 /* Disable the other interrupts to be reported in
876 * the cause register and then force the other
877 * interrupts and see if any get posted. If
878 * an interrupt was posted to the bus, the
879 * test failed.
880 */
881 adapter->test_icr = 0;
2648345f
MC
882 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
883 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
1da177e4
LT
884 msec_delay(10);
885
886 if(adapter->test_icr) {
887 *data = 5;
888 break;
889 }
890 }
891 }
892
893 /* Disable all the interrupts */
894 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
895 msec_delay(10);
896
897 /* Unhook test interrupt handler */
898 free_irq(irq, netdev);
899
900 return *data;
901}
902
903static void
904e1000_free_desc_rings(struct e1000_adapter *adapter)
905{
906 struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
907 struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
908 struct pci_dev *pdev = adapter->pdev;
909 int i;
910
911 if(txdr->desc && txdr->buffer_info) {
912 for(i = 0; i < txdr->count; i++) {
913 if(txdr->buffer_info[i].dma)
914 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
915 txdr->buffer_info[i].length,
916 PCI_DMA_TODEVICE);
917 if(txdr->buffer_info[i].skb)
918 dev_kfree_skb(txdr->buffer_info[i].skb);
919 }
920 }
921
922 if(rxdr->desc && rxdr->buffer_info) {
923 for(i = 0; i < rxdr->count; i++) {
924 if(rxdr->buffer_info[i].dma)
925 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
926 rxdr->buffer_info[i].length,
927 PCI_DMA_FROMDEVICE);
928 if(rxdr->buffer_info[i].skb)
929 dev_kfree_skb(rxdr->buffer_info[i].skb);
930 }
931 }
932
933 if(txdr->desc)
934 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
935 if(rxdr->desc)
936 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
937
938 if(txdr->buffer_info)
939 kfree(txdr->buffer_info);
940 if(rxdr->buffer_info)
941 kfree(rxdr->buffer_info);
942
943 return;
944}
945
946static int
947e1000_setup_desc_rings(struct e1000_adapter *adapter)
948{
949 struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
950 struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
951 struct pci_dev *pdev = adapter->pdev;
952 uint32_t rctl;
953 int size, i, ret_val;
954
955 /* Setup Tx descriptor ring and Tx buffers */
956
e4eff729
MC
957 if(!txdr->count)
958 txdr->count = E1000_DEFAULT_TXD;
1da177e4
LT
959
960 size = txdr->count * sizeof(struct e1000_buffer);
961 if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
962 ret_val = 1;
963 goto err_nomem;
964 }
965 memset(txdr->buffer_info, 0, size);
966
967 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
968 E1000_ROUNDUP(txdr->size, 4096);
969 if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
970 ret_val = 2;
971 goto err_nomem;
972 }
973 memset(txdr->desc, 0, txdr->size);
974 txdr->next_to_use = txdr->next_to_clean = 0;
975
976 E1000_WRITE_REG(&adapter->hw, TDBAL,
977 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
978 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
979 E1000_WRITE_REG(&adapter->hw, TDLEN,
980 txdr->count * sizeof(struct e1000_tx_desc));
981 E1000_WRITE_REG(&adapter->hw, TDH, 0);
982 E1000_WRITE_REG(&adapter->hw, TDT, 0);
983 E1000_WRITE_REG(&adapter->hw, TCTL,
984 E1000_TCTL_PSP | E1000_TCTL_EN |
985 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
986 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
987
988 for(i = 0; i < txdr->count; i++) {
989 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
990 struct sk_buff *skb;
991 unsigned int size = 1024;
992
993 if(!(skb = alloc_skb(size, GFP_KERNEL))) {
994 ret_val = 3;
995 goto err_nomem;
996 }
997 skb_put(skb, size);
998 txdr->buffer_info[i].skb = skb;
999 txdr->buffer_info[i].length = skb->len;
1000 txdr->buffer_info[i].dma =
1001 pci_map_single(pdev, skb->data, skb->len,
1002 PCI_DMA_TODEVICE);
1003 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1004 tx_desc->lower.data = cpu_to_le32(skb->len);
1005 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1006 E1000_TXD_CMD_IFCS |
1007 E1000_TXD_CMD_RPS);
1008 tx_desc->upper.data = 0;
1009 }
1010
1011 /* Setup Rx descriptor ring and Rx buffers */
1012
e4eff729
MC
1013 if(!rxdr->count)
1014 rxdr->count = E1000_DEFAULT_RXD;
1da177e4
LT
1015
1016 size = rxdr->count * sizeof(struct e1000_buffer);
1017 if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1018 ret_val = 4;
1019 goto err_nomem;
1020 }
1021 memset(rxdr->buffer_info, 0, size);
1022
1023 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
1024 if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1025 ret_val = 5;
1026 goto err_nomem;
1027 }
1028 memset(rxdr->desc, 0, rxdr->size);
1029 rxdr->next_to_use = rxdr->next_to_clean = 0;
1030
1031 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1032 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1033 E1000_WRITE_REG(&adapter->hw, RDBAL,
1034 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1035 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1036 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1037 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1038 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1039 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1040 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1041 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1042 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1043
1044 for(i = 0; i < rxdr->count; i++) {
1045 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1046 struct sk_buff *skb;
1047
2648345f 1048 if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1da177e4
LT
1049 GFP_KERNEL))) {
1050 ret_val = 6;
1051 goto err_nomem;
1052 }
1053 skb_reserve(skb, NET_IP_ALIGN);
1054 rxdr->buffer_info[i].skb = skb;
1055 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1056 rxdr->buffer_info[i].dma =
1057 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1058 PCI_DMA_FROMDEVICE);
1059 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1060 memset(skb->data, 0x00, skb->len);
1061 }
1062
1063 return 0;
1064
1065err_nomem:
1066 e1000_free_desc_rings(adapter);
1067 return ret_val;
1068}
1069
1070static void
1071e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1072{
1073 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1074 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1075 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1076 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1077 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1078}
1079
1080static void
1081e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1082{
1083 uint16_t phy_reg;
1084
1085 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1086 * Extended PHY Specific Control Register to 25MHz clock. This
1087 * value defaults back to a 2.5MHz clock when the PHY is reset.
1088 */
1089 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1090 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1091 e1000_write_phy_reg(&adapter->hw,
1092 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1093
1094 /* In addition, because of the s/w reset above, we need to enable
1095 * CRS on TX. This must be set for both full and half duplex
1096 * operation.
1097 */
1098 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1099 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1100 e1000_write_phy_reg(&adapter->hw,
1101 M88E1000_PHY_SPEC_CTRL, phy_reg);
1102}
1103
1104static int
1105e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1106{
1107 uint32_t ctrl_reg;
1108 uint16_t phy_reg;
1109
1110 /* Setup the Device Control Register for PHY loopback test. */
1111
1112 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1113 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1114 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1115 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1116 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1117 E1000_CTRL_FD); /* Force Duplex to FULL */
1118
1119 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1120
1121 /* Read the PHY Specific Control Register (0x10) */
1122 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1123
1124 /* Clear Auto-Crossover bits in PHY Specific Control Register
1125 * (bits 6:5).
1126 */
1127 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1128 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1129
1130 /* Perform software reset on the PHY */
1131 e1000_phy_reset(&adapter->hw);
1132
1133 /* Have to setup TX_CLK and TX_CRS after software reset */
1134 e1000_phy_reset_clk_and_crs(adapter);
1135
1136 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1137
1138 /* Wait for reset to complete. */
1139 udelay(500);
1140
1141 /* Have to setup TX_CLK and TX_CRS after software reset */
1142 e1000_phy_reset_clk_and_crs(adapter);
1143
1144 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1145 e1000_phy_disable_receiver(adapter);
1146
1147 /* Set the loopback bit in the PHY control register. */
1148 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1149 phy_reg |= MII_CR_LOOPBACK;
1150 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1151
1152 /* Setup TX_CLK and TX_CRS one more time. */
1153 e1000_phy_reset_clk_and_crs(adapter);
1154
1155 /* Check Phy Configuration */
1156 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1157 if(phy_reg != 0x4100)
1158 return 9;
1159
1160 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1161 if(phy_reg != 0x0070)
1162 return 10;
1163
1164 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
1165 if(phy_reg != 0x001A)
1166 return 11;
1167
1168 return 0;
1169}
1170
1171static int
1172e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1173{
1174 uint32_t ctrl_reg = 0;
1175 uint32_t stat_reg = 0;
1176
1177 adapter->hw.autoneg = FALSE;
1178
1179 if(adapter->hw.phy_type == e1000_phy_m88) {
1180 /* Auto-MDI/MDIX Off */
1181 e1000_write_phy_reg(&adapter->hw,
1182 M88E1000_PHY_SPEC_CTRL, 0x0808);
1183 /* reset to update Auto-MDI/MDIX */
1184 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1185 /* autoneg off */
1186 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1187 }
1188 /* force 1000, set loopback */
1189 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1190
1191 /* Now set up the MAC to the same speed/duplex as the PHY. */
1192 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1193 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1194 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1195 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1196 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1197 E1000_CTRL_FD); /* Force Duplex to FULL */
1198
1199 if(adapter->hw.media_type == e1000_media_type_copper &&
1200 adapter->hw.phy_type == e1000_phy_m88) {
1201 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1202 } else {
1203 /* Set the ILOS bit on the fiber Nic is half
1204 * duplex link is detected. */
1205 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
1206 if((stat_reg & E1000_STATUS_FD) == 0)
1207 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1208 }
1209
1210 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1211
1212 /* Disable the receiver on the PHY so when a cable is plugged in, the
1213 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1214 */
1215 if(adapter->hw.phy_type == e1000_phy_m88)
1216 e1000_phy_disable_receiver(adapter);
1217
1218 udelay(500);
1219
1220 return 0;
1221}
1222
1223static int
1224e1000_set_phy_loopback(struct e1000_adapter *adapter)
1225{
1226 uint16_t phy_reg = 0;
1227 uint16_t count = 0;
1228
1229 switch (adapter->hw.mac_type) {
1230 case e1000_82543:
1231 if(adapter->hw.media_type == e1000_media_type_copper) {
1232 /* Attempt to setup Loopback mode on Non-integrated PHY.
1233 * Some PHY registers get corrupted at random, so
1234 * attempt this 10 times.
1235 */
1236 while(e1000_nonintegrated_phy_loopback(adapter) &&
1237 count++ < 10);
1238 if(count < 11)
1239 return 0;
1240 }
1241 break;
1242
1243 case e1000_82544:
1244 case e1000_82540:
1245 case e1000_82545:
1246 case e1000_82545_rev_3:
1247 case e1000_82546:
1248 case e1000_82546_rev_3:
1249 case e1000_82541:
1250 case e1000_82541_rev_2:
1251 case e1000_82547:
1252 case e1000_82547_rev_2:
868d5309
MC
1253 case e1000_82571:
1254 case e1000_82572:
4564327b 1255 case e1000_82573:
1da177e4
LT
1256 return e1000_integrated_phy_loopback(adapter);
1257 break;
1258
1259 default:
1260 /* Default PHY loopback work is to read the MII
1261 * control register and assert bit 14 (loopback mode).
1262 */
1263 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1264 phy_reg |= MII_CR_LOOPBACK;
1265 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1266 return 0;
1267 break;
1268 }
1269
1270 return 8;
1271}
1272
1273static int
1274e1000_setup_loopback_test(struct e1000_adapter *adapter)
1275{
1276 uint32_t rctl;
1277
1278 if(adapter->hw.media_type == e1000_media_type_fiber ||
1279 adapter->hw.media_type == e1000_media_type_internal_serdes) {
1280 if(adapter->hw.mac_type == e1000_82545 ||
1281 adapter->hw.mac_type == e1000_82546 ||
1282 adapter->hw.mac_type == e1000_82545_rev_3 ||
1283 adapter->hw.mac_type == e1000_82546_rev_3)
1284 return e1000_set_phy_loopback(adapter);
1285 else {
1286 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1287 rctl |= E1000_RCTL_LBM_TCVR;
1288 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1289 return 0;
1290 }
1291 } else if(adapter->hw.media_type == e1000_media_type_copper)
1292 return e1000_set_phy_loopback(adapter);
1293
1294 return 7;
1295}
1296
1297static void
1298e1000_loopback_cleanup(struct e1000_adapter *adapter)
1299{
1300 uint32_t rctl;
1301 uint16_t phy_reg;
1302
1303 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1304 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1305 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1306
1307 if(adapter->hw.media_type == e1000_media_type_copper ||
1308 ((adapter->hw.media_type == e1000_media_type_fiber ||
1309 adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1310 (adapter->hw.mac_type == e1000_82545 ||
1311 adapter->hw.mac_type == e1000_82546 ||
1312 adapter->hw.mac_type == e1000_82545_rev_3 ||
1313 adapter->hw.mac_type == e1000_82546_rev_3))) {
1314 adapter->hw.autoneg = TRUE;
1315 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1316 if(phy_reg & MII_CR_LOOPBACK) {
1317 phy_reg &= ~MII_CR_LOOPBACK;
1318 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1319 e1000_phy_reset(&adapter->hw);
1320 }
1321 }
1322}
1323
1324static void
1325e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1326{
1327 memset(skb->data, 0xFF, frame_size);
1328 frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
1329 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1330 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1331 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1332}
1333
1334static int
1335e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1336{
1337 frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
1338 if(*(skb->data + 3) == 0xFF) {
1339 if((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1340 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1341 return 0;
1342 }
1343 }
1344 return 13;
1345}
1346
1347static int
1348e1000_run_loopback_test(struct e1000_adapter *adapter)
1349{
1350 struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
1351 struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
1352 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC
1353 int i, j, k, l, lc, good_cnt, ret_val=0;
1354 unsigned long time;
1da177e4
LT
1355
1356 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1357
e4eff729
MC
1358 /* Calculate the loop count based on the largest descriptor ring
1359 * The idea is to wrap the largest ring a number of times using 64
1360 * send/receive pairs during each loop
1361 */
1da177e4 1362
e4eff729
MC
1363 if(rxdr->count <= txdr->count)
1364 lc = ((txdr->count / 64) * 2) + 1;
1365 else
1366 lc = ((rxdr->count / 64) * 2) + 1;
1367
1368 k = l = 0;
1369 for(j = 0; j <= lc; j++) { /* loop count loop */
1370 for(i = 0; i < 64; i++) { /* send the packets */
1371 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1372 1024);
1373 pci_dma_sync_single_for_device(pdev,
1374 txdr->buffer_info[k].dma,
1375 txdr->buffer_info[k].length,
1376 PCI_DMA_TODEVICE);
1377 if(unlikely(++k == txdr->count)) k = 0;
1378 }
1379 E1000_WRITE_REG(&adapter->hw, TDT, k);
1380 msec_delay(200);
1381 time = jiffies; /* set the start time for the receive */
1382 good_cnt = 0;
1383 do { /* receive the sent packets */
1384 pci_dma_sync_single_for_cpu(pdev,
1385 rxdr->buffer_info[l].dma,
1386 rxdr->buffer_info[l].length,
1387 PCI_DMA_FROMDEVICE);
1388
1389 ret_val = e1000_check_lbtest_frame(
1390 rxdr->buffer_info[l].skb,
1391 1024);
1392 if(!ret_val)
1393 good_cnt++;
1394 if(unlikely(++l == rxdr->count)) l = 0;
1395 /* time + 20 msecs (200 msecs on 2.4) is more than
1396 * enough time to complete the receives, if it's
1397 * exceeded, break and error off
1398 */
1399 } while (good_cnt < 64 && jiffies < (time + 20));
1400 if(good_cnt != 64) {
1401 ret_val = 13; /* ret_val is the same as mis-compare */
1402 break;
1403 }
1404 if(jiffies >= (time + 2)) {
1405 ret_val = 14; /* error code for time out error */
1406 break;
1407 }
1408 } /* end loop count loop */
1da177e4
LT
1409 return ret_val;
1410}
1411
1412static int
1413e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1414{
1415 if((*data = e1000_setup_desc_rings(adapter))) goto err_loopback;
1416 if((*data = e1000_setup_loopback_test(adapter))) goto err_loopback;
1417 *data = e1000_run_loopback_test(adapter);
1418 e1000_loopback_cleanup(adapter);
1419 e1000_free_desc_rings(adapter);
1420err_loopback:
1421 return *data;
1422}
1423
1424static int
1425e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1426{
1427 *data = 0;
1da177e4
LT
1428 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1429 int i = 0;
1430 adapter->hw.serdes_link_down = TRUE;
1431
2648345f
MC
1432 /* On some blade server designs, link establishment
1433 * could take as long as 2-3 minutes */
1da177e4
LT
1434 do {
1435 e1000_check_for_link(&adapter->hw);
1436 if (adapter->hw.serdes_link_down == FALSE)
1437 return *data;
1438 msec_delay(20);
1439 } while (i++ < 3750);
1440
2648345f 1441 *data = 1;
1da177e4
LT
1442 } else {
1443 e1000_check_for_link(&adapter->hw);
e4eff729
MC
1444 if(adapter->hw.autoneg) /* if auto_neg is set wait for it */
1445 msec_delay(4000);
1da177e4
LT
1446
1447 if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1448 *data = 1;
1449 }
1450 }
1451 return *data;
1452}
1453
1454static int
1455e1000_diag_test_count(struct net_device *netdev)
1456{
1457 return E1000_TEST_LEN;
1458}
1459
1460static void
1461e1000_diag_test(struct net_device *netdev,
1462 struct ethtool_test *eth_test, uint64_t *data)
1463{
60490fe0 1464 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1465 boolean_t if_running = netif_running(netdev);
1466
1467 if(eth_test->flags == ETH_TEST_FL_OFFLINE) {
1468 /* Offline tests */
1469
1470 /* save speed, duplex, autoneg settings */
1471 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1472 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1473 uint8_t autoneg = adapter->hw.autoneg;
1474
1475 /* Link test performed before hardware reset so autoneg doesn't
1476 * interfere with test result */
1477 if(e1000_link_test(adapter, &data[4]))
1478 eth_test->flags |= ETH_TEST_FL_FAILED;
1479
1480 if(if_running)
1481 e1000_down(adapter);
1482 else
1483 e1000_reset(adapter);
1484
1485 if(e1000_reg_test(adapter, &data[0]))
1486 eth_test->flags |= ETH_TEST_FL_FAILED;
1487
1488 e1000_reset(adapter);
1489 if(e1000_eeprom_test(adapter, &data[1]))
1490 eth_test->flags |= ETH_TEST_FL_FAILED;
1491
1492 e1000_reset(adapter);
1493 if(e1000_intr_test(adapter, &data[2]))
1494 eth_test->flags |= ETH_TEST_FL_FAILED;
1495
1496 e1000_reset(adapter);
1497 if(e1000_loopback_test(adapter, &data[3]))
1498 eth_test->flags |= ETH_TEST_FL_FAILED;
1499
1500 /* restore speed, duplex, autoneg settings */
1501 adapter->hw.autoneg_advertised = autoneg_advertised;
1502 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1503 adapter->hw.autoneg = autoneg;
1504
1505 e1000_reset(adapter);
1506 if(if_running)
1507 e1000_up(adapter);
1508 } else {
1509 /* Online tests */
1510 if(e1000_link_test(adapter, &data[4]))
1511 eth_test->flags |= ETH_TEST_FL_FAILED;
1512
1513 /* Offline tests aren't run; pass by default */
1514 data[0] = 0;
1515 data[1] = 0;
1516 data[2] = 0;
1517 data[3] = 0;
1518 }
1519}
1520
1521static void
1522e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1523{
60490fe0 1524 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1525 struct e1000_hw *hw = &adapter->hw;
1526
1527 switch(adapter->hw.device_id) {
1528 case E1000_DEV_ID_82542:
1529 case E1000_DEV_ID_82543GC_FIBER:
1530 case E1000_DEV_ID_82543GC_COPPER:
1531 case E1000_DEV_ID_82544EI_FIBER:
1532 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1533 case E1000_DEV_ID_82545EM_FIBER:
1534 case E1000_DEV_ID_82545EM_COPPER:
1535 wol->supported = 0;
1536 wol->wolopts = 0;
1537 return;
1538
1539 case E1000_DEV_ID_82546EB_FIBER:
1540 case E1000_DEV_ID_82546GB_FIBER:
1541 /* Wake events only supported on port A for dual fiber */
1542 if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1543 wol->supported = 0;
1544 wol->wolopts = 0;
1545 return;
1546 }
1547 /* Fall Through */
1548
1549 default:
1550 wol->supported = WAKE_UCAST | WAKE_MCAST |
1551 WAKE_BCAST | WAKE_MAGIC;
1552
1553 wol->wolopts = 0;
1554 if(adapter->wol & E1000_WUFC_EX)
1555 wol->wolopts |= WAKE_UCAST;
1556 if(adapter->wol & E1000_WUFC_MC)
1557 wol->wolopts |= WAKE_MCAST;
1558 if(adapter->wol & E1000_WUFC_BC)
1559 wol->wolopts |= WAKE_BCAST;
1560 if(adapter->wol & E1000_WUFC_MAG)
1561 wol->wolopts |= WAKE_MAGIC;
1562 return;
1563 }
1564}
1565
1566static int
1567e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1568{
60490fe0 1569 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1570 struct e1000_hw *hw = &adapter->hw;
1571
1572 switch(adapter->hw.device_id) {
1573 case E1000_DEV_ID_82542:
1574 case E1000_DEV_ID_82543GC_FIBER:
1575 case E1000_DEV_ID_82543GC_COPPER:
1576 case E1000_DEV_ID_82544EI_FIBER:
1577 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1578 case E1000_DEV_ID_82545EM_FIBER:
1579 case E1000_DEV_ID_82545EM_COPPER:
1580 return wol->wolopts ? -EOPNOTSUPP : 0;
1581
1582 case E1000_DEV_ID_82546EB_FIBER:
1583 case E1000_DEV_ID_82546GB_FIBER:
1584 /* Wake events only supported on port A for dual fiber */
1585 if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
1586 return wol->wolopts ? -EOPNOTSUPP : 0;
1587 /* Fall Through */
1588
1589 default:
1590 if(wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1591 return -EOPNOTSUPP;
1592
1593 adapter->wol = 0;
1594
1595 if(wol->wolopts & WAKE_UCAST)
1596 adapter->wol |= E1000_WUFC_EX;
1597 if(wol->wolopts & WAKE_MCAST)
1598 adapter->wol |= E1000_WUFC_MC;
1599 if(wol->wolopts & WAKE_BCAST)
1600 adapter->wol |= E1000_WUFC_BC;
1601 if(wol->wolopts & WAKE_MAGIC)
1602 adapter->wol |= E1000_WUFC_MAG;
1603 }
1604
1605 return 0;
1606}
1607
1608/* toggle LED 4 times per second = 2 "blinks" per second */
1609#define E1000_ID_INTERVAL (HZ/4)
1610
1611/* bit defines for adapter->led_status */
1612#define E1000_LED_ON 0
1613
1614static void
1615e1000_led_blink_callback(unsigned long data)
1616{
1617 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1618
1619 if(test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1620 e1000_led_off(&adapter->hw);
1621 else
1622 e1000_led_on(&adapter->hw);
1623
1624 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1625}
1626
1627static int
1628e1000_phys_id(struct net_device *netdev, uint32_t data)
1629{
60490fe0 1630 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1631
1632 if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1633 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1634
868d5309 1635 if(adapter->hw.mac_type < e1000_82571) {
d439d4b7
MC
1636 if(!adapter->blink_timer.function) {
1637 init_timer(&adapter->blink_timer);
1638 adapter->blink_timer.function = e1000_led_blink_callback;
1639 adapter->blink_timer.data = (unsigned long) adapter;
1640 }
1641 e1000_setup_led(&adapter->hw);
1642 mod_timer(&adapter->blink_timer, jiffies);
1643 msleep_interruptible(data * 1000);
1644 del_timer_sync(&adapter->blink_timer);
1645 }
1646 else {
1647 E1000_WRITE_REG(&adapter->hw, LEDCTL, (E1000_LEDCTL_LED2_BLINK_RATE |
1648 E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
1649 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1650 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
1651 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
1652 msleep_interruptible(data * 1000);
1da177e4
LT
1653 }
1654
1da177e4
LT
1655 e1000_led_off(&adapter->hw);
1656 clear_bit(E1000_LED_ON, &adapter->led_status);
1657 e1000_cleanup_led(&adapter->hw);
1658
1659 return 0;
1660}
1661
1662static int
1663e1000_nway_reset(struct net_device *netdev)
1664{
60490fe0 1665 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1666 if(netif_running(netdev)) {
1667 e1000_down(adapter);
1668 e1000_up(adapter);
1669 }
1670 return 0;
1671}
1672
1673static int
1674e1000_get_stats_count(struct net_device *netdev)
1675{
1676 return E1000_STATS_LEN;
1677}
1678
1679static void
1680e1000_get_ethtool_stats(struct net_device *netdev,
1681 struct ethtool_stats *stats, uint64_t *data)
1682{
60490fe0 1683 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1684 int i;
1685
1686 e1000_update_stats(adapter);
1687 for(i = 0; i < E1000_STATS_LEN; i++) {
1688 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1689 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1690 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1691 }
1692}
1693
1694static void
1695e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1696{
1697 int i;
1698
1699 switch(stringset) {
1700 case ETH_SS_TEST:
1701 memcpy(data, *e1000_gstrings_test,
1702 E1000_TEST_LEN*ETH_GSTRING_LEN);
1703 break;
1704 case ETH_SS_STATS:
1705 for (i=0; i < E1000_STATS_LEN; i++) {
1706 memcpy(data + i * ETH_GSTRING_LEN,
1707 e1000_gstrings_stats[i].stat_string,
1708 ETH_GSTRING_LEN);
1709 }
1710 break;
1711 }
1712}
1713
1714struct ethtool_ops e1000_ethtool_ops = {
1715 .get_settings = e1000_get_settings,
1716 .set_settings = e1000_set_settings,
1717 .get_drvinfo = e1000_get_drvinfo,
1718 .get_regs_len = e1000_get_regs_len,
1719 .get_regs = e1000_get_regs,
1720 .get_wol = e1000_get_wol,
1721 .set_wol = e1000_set_wol,
1722 .get_msglevel = e1000_get_msglevel,
1723 .set_msglevel = e1000_set_msglevel,
1724 .nway_reset = e1000_nway_reset,
1725 .get_link = ethtool_op_get_link,
1726 .get_eeprom_len = e1000_get_eeprom_len,
1727 .get_eeprom = e1000_get_eeprom,
1728 .set_eeprom = e1000_set_eeprom,
1729 .get_ringparam = e1000_get_ringparam,
1730 .set_ringparam = e1000_set_ringparam,
1731 .get_pauseparam = e1000_get_pauseparam,
1732 .set_pauseparam = e1000_set_pauseparam,
1733 .get_rx_csum = e1000_get_rx_csum,
1734 .set_rx_csum = e1000_set_rx_csum,
1735 .get_tx_csum = e1000_get_tx_csum,
1736 .set_tx_csum = e1000_set_tx_csum,
1737 .get_sg = ethtool_op_get_sg,
1738 .set_sg = ethtool_op_set_sg,
1739#ifdef NETIF_F_TSO
1740 .get_tso = ethtool_op_get_tso,
1741 .set_tso = e1000_set_tso,
1742#endif
1743 .self_test_count = e1000_diag_test_count,
1744 .self_test = e1000_diag_test,
1745 .get_strings = e1000_get_strings,
1746 .phys_id = e1000_phys_id,
1747 .get_stats_count = e1000_get_stats_count,
1748 .get_ethtool_stats = e1000_get_ethtool_stats,
9beb0ac1 1749 .get_perm_addr = ethtool_op_get_perm_addr,
1da177e4
LT
1750};
1751
1752void e1000_set_ethtool_ops(struct net_device *netdev)
1753{
1754 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1755}