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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
0abb6eb1 AK |
3 | Intel PRO/1000 Linux driver |
4 | Copyright(c) 1999 - 2006 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
1da177e4 | 13 | more details. |
0abb6eb1 | 14 | |
1da177e4 | 15 | You should have received a copy of the GNU General Public License along with |
0abb6eb1 AK |
16 | this program; if not, write to the Free Software Foundation, Inc., |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
1da177e4 LT |
22 | Contact Information: |
23 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | /* ethtool support for e1000 */ | |
30 | ||
31 | #include "e1000.h" | |
32 | ||
33 | #include <asm/uaccess.h> | |
34 | ||
35574764 NN |
35 | extern char e1000_driver_name[]; |
36 | extern char e1000_driver_version[]; | |
37 | ||
38 | extern int e1000_up(struct e1000_adapter *adapter); | |
39 | extern void e1000_down(struct e1000_adapter *adapter); | |
40 | extern void e1000_reinit_locked(struct e1000_adapter *adapter); | |
41 | extern void e1000_reset(struct e1000_adapter *adapter); | |
42 | extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); | |
43 | extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); | |
44 | extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); | |
45 | extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | |
46 | extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | |
47 | extern void e1000_update_stats(struct e1000_adapter *adapter); | |
48 | ||
49 | ||
1da177e4 LT |
50 | struct e1000_stats { |
51 | char stat_string[ETH_GSTRING_LEN]; | |
52 | int sizeof_stat; | |
53 | int stat_offset; | |
54 | }; | |
55 | ||
56 | #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \ | |
57 | offsetof(struct e1000_adapter, m) | |
58 | static const struct e1000_stats e1000_gstrings_stats[] = { | |
49559854 MW |
59 | { "rx_packets", E1000_STAT(stats.gprc) }, |
60 | { "tx_packets", E1000_STAT(stats.gptc) }, | |
61 | { "rx_bytes", E1000_STAT(stats.gorcl) }, | |
62 | { "tx_bytes", E1000_STAT(stats.gotcl) }, | |
63 | { "rx_broadcast", E1000_STAT(stats.bprc) }, | |
64 | { "tx_broadcast", E1000_STAT(stats.bptc) }, | |
65 | { "rx_multicast", E1000_STAT(stats.mprc) }, | |
66 | { "tx_multicast", E1000_STAT(stats.mptc) }, | |
67 | { "rx_errors", E1000_STAT(stats.rxerrc) }, | |
68 | { "tx_errors", E1000_STAT(stats.txerrc) }, | |
1da177e4 | 69 | { "tx_dropped", E1000_STAT(net_stats.tx_dropped) }, |
49559854 MW |
70 | { "multicast", E1000_STAT(stats.mprc) }, |
71 | { "collisions", E1000_STAT(stats.colc) }, | |
72 | { "rx_length_errors", E1000_STAT(stats.rlerrc) }, | |
1da177e4 | 73 | { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) }, |
49559854 | 74 | { "rx_crc_errors", E1000_STAT(stats.crcerrs) }, |
1da177e4 | 75 | { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) }, |
2648345f | 76 | { "rx_no_buffer_count", E1000_STAT(stats.rnbc) }, |
49559854 MW |
77 | { "rx_missed_errors", E1000_STAT(stats.mpc) }, |
78 | { "tx_aborted_errors", E1000_STAT(stats.ecol) }, | |
79 | { "tx_carrier_errors", E1000_STAT(stats.tncrs) }, | |
1da177e4 LT |
80 | { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) }, |
81 | { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) }, | |
49559854 | 82 | { "tx_window_errors", E1000_STAT(stats.latecol) }, |
1da177e4 LT |
83 | { "tx_abort_late_coll", E1000_STAT(stats.latecol) }, |
84 | { "tx_deferred_ok", E1000_STAT(stats.dc) }, | |
85 | { "tx_single_coll_ok", E1000_STAT(stats.scc) }, | |
86 | { "tx_multi_coll_ok", E1000_STAT(stats.mcc) }, | |
6b7660cd | 87 | { "tx_timeout_count", E1000_STAT(tx_timeout_count) }, |
fcfb1224 | 88 | { "tx_restart_queue", E1000_STAT(restart_queue) }, |
1da177e4 LT |
89 | { "rx_long_length_errors", E1000_STAT(stats.roc) }, |
90 | { "rx_short_length_errors", E1000_STAT(stats.ruc) }, | |
91 | { "rx_align_errors", E1000_STAT(stats.algnerrc) }, | |
92 | { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) }, | |
93 | { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) }, | |
94 | { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) }, | |
95 | { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) }, | |
96 | { "tx_flow_control_xon", E1000_STAT(stats.xontxc) }, | |
97 | { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) }, | |
98 | { "rx_long_byte_count", E1000_STAT(stats.gorcl) }, | |
99 | { "rx_csum_offload_good", E1000_STAT(hw_csum_good) }, | |
e4c811c9 MC |
100 | { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }, |
101 | { "rx_header_split", E1000_STAT(rx_hdr_split) }, | |
6b7660cd | 102 | { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) }, |
15e376b4 JG |
103 | { "tx_smbus", E1000_STAT(stats.mgptc) }, |
104 | { "rx_smbus", E1000_STAT(stats.mgprc) }, | |
105 | { "dropped_smbus", E1000_STAT(stats.mgpdc) }, | |
1da177e4 | 106 | }; |
7bfa4816 | 107 | |
7bfa4816 | 108 | #define E1000_QUEUE_STATS_LEN 0 |
7bfa4816 | 109 | #define E1000_GLOBAL_STATS_LEN \ |
1da177e4 | 110 | sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats) |
7bfa4816 | 111 | #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN) |
1da177e4 LT |
112 | static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = { |
113 | "Register test (offline)", "Eeprom test (offline)", | |
114 | "Interrupt test (offline)", "Loopback test (offline)", | |
115 | "Link test (on/offline)" | |
116 | }; | |
117 | #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN | |
118 | ||
119 | static int | |
120 | e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |
121 | { | |
60490fe0 | 122 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
123 | struct e1000_hw *hw = &adapter->hw; |
124 | ||
96838a40 | 125 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
126 | |
127 | ecmd->supported = (SUPPORTED_10baseT_Half | | |
128 | SUPPORTED_10baseT_Full | | |
129 | SUPPORTED_100baseT_Half | | |
130 | SUPPORTED_100baseT_Full | | |
131 | SUPPORTED_1000baseT_Full| | |
132 | SUPPORTED_Autoneg | | |
133 | SUPPORTED_TP); | |
cd94dd0b AK |
134 | if (hw->phy_type == e1000_phy_ife) |
135 | ecmd->supported &= ~SUPPORTED_1000baseT_Full; | |
1da177e4 LT |
136 | ecmd->advertising = ADVERTISED_TP; |
137 | ||
96838a40 | 138 | if (hw->autoneg == 1) { |
1da177e4 | 139 | ecmd->advertising |= ADVERTISED_Autoneg; |
1da177e4 | 140 | /* the e1000 autoneg seems to match ethtool nicely */ |
1da177e4 LT |
141 | ecmd->advertising |= hw->autoneg_advertised; |
142 | } | |
143 | ||
144 | ecmd->port = PORT_TP; | |
145 | ecmd->phy_address = hw->phy_addr; | |
146 | ||
96838a40 | 147 | if (hw->mac_type == e1000_82543) |
1da177e4 LT |
148 | ecmd->transceiver = XCVR_EXTERNAL; |
149 | else | |
150 | ecmd->transceiver = XCVR_INTERNAL; | |
151 | ||
152 | } else { | |
153 | ecmd->supported = (SUPPORTED_1000baseT_Full | | |
154 | SUPPORTED_FIBRE | | |
155 | SUPPORTED_Autoneg); | |
156 | ||
012609a8 MC |
157 | ecmd->advertising = (ADVERTISED_1000baseT_Full | |
158 | ADVERTISED_FIBRE | | |
159 | ADVERTISED_Autoneg); | |
1da177e4 LT |
160 | |
161 | ecmd->port = PORT_FIBRE; | |
162 | ||
96838a40 | 163 | if (hw->mac_type >= e1000_82545) |
1da177e4 LT |
164 | ecmd->transceiver = XCVR_INTERNAL; |
165 | else | |
166 | ecmd->transceiver = XCVR_EXTERNAL; | |
167 | } | |
168 | ||
ca6efb7d | 169 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) { |
1da177e4 LT |
170 | |
171 | e1000_get_speed_and_duplex(hw, &adapter->link_speed, | |
172 | &adapter->link_duplex); | |
173 | ecmd->speed = adapter->link_speed; | |
174 | ||
175 | /* unfortunatly FULL_DUPLEX != DUPLEX_FULL | |
176 | * and HALF_DUPLEX != DUPLEX_HALF */ | |
177 | ||
96838a40 | 178 | if (adapter->link_duplex == FULL_DUPLEX) |
1da177e4 LT |
179 | ecmd->duplex = DUPLEX_FULL; |
180 | else | |
181 | ecmd->duplex = DUPLEX_HALF; | |
182 | } else { | |
183 | ecmd->speed = -1; | |
184 | ecmd->duplex = -1; | |
185 | } | |
186 | ||
187 | ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) || | |
188 | hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE; | |
189 | return 0; | |
190 | } | |
191 | ||
192 | static int | |
193 | e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |
194 | { | |
60490fe0 | 195 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
196 | struct e1000_hw *hw = &adapter->hw; |
197 | ||
57128197 JK |
198 | /* When SoL/IDER sessions are active, autoneg/speed/duplex |
199 | * cannot be changed */ | |
200 | if (e1000_check_phy_reset_block(hw)) { | |
201 | DPRINTK(DRV, ERR, "Cannot change link characteristics " | |
202 | "when SoL/IDER is active.\n"); | |
203 | return -EINVAL; | |
204 | } | |
205 | ||
1a821ca5 JB |
206 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
207 | msleep(1); | |
208 | ||
57128197 | 209 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
1da177e4 | 210 | hw->autoneg = 1; |
96838a40 | 211 | if (hw->media_type == e1000_media_type_fiber) |
012609a8 MC |
212 | hw->autoneg_advertised = ADVERTISED_1000baseT_Full | |
213 | ADVERTISED_FIBRE | | |
214 | ADVERTISED_Autoneg; | |
96838a40 | 215 | else |
2f2ca263 JK |
216 | hw->autoneg_advertised = ecmd->advertising | |
217 | ADVERTISED_TP | | |
218 | ADVERTISED_Autoneg; | |
012609a8 | 219 | ecmd->advertising = hw->autoneg_advertised; |
1da177e4 | 220 | } else |
1a821ca5 JB |
221 | if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) { |
222 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 | 223 | return -EINVAL; |
1a821ca5 | 224 | } |
1da177e4 LT |
225 | |
226 | /* reset the link */ | |
227 | ||
1a821ca5 JB |
228 | if (netif_running(adapter->netdev)) { |
229 | e1000_down(adapter); | |
230 | e1000_up(adapter); | |
231 | } else | |
1da177e4 LT |
232 | e1000_reset(adapter); |
233 | ||
1a821ca5 | 234 | clear_bit(__E1000_RESETTING, &adapter->flags); |
1da177e4 LT |
235 | return 0; |
236 | } | |
237 | ||
238 | static void | |
239 | e1000_get_pauseparam(struct net_device *netdev, | |
240 | struct ethtool_pauseparam *pause) | |
241 | { | |
60490fe0 | 242 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
243 | struct e1000_hw *hw = &adapter->hw; |
244 | ||
96838a40 | 245 | pause->autoneg = |
1da177e4 | 246 | (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE); |
96838a40 | 247 | |
11241b10 | 248 | if (hw->fc == E1000_FC_RX_PAUSE) |
1da177e4 | 249 | pause->rx_pause = 1; |
11241b10 | 250 | else if (hw->fc == E1000_FC_TX_PAUSE) |
1da177e4 | 251 | pause->tx_pause = 1; |
11241b10 | 252 | else if (hw->fc == E1000_FC_FULL) { |
1da177e4 LT |
253 | pause->rx_pause = 1; |
254 | pause->tx_pause = 1; | |
255 | } | |
256 | } | |
257 | ||
258 | static int | |
259 | e1000_set_pauseparam(struct net_device *netdev, | |
260 | struct ethtool_pauseparam *pause) | |
261 | { | |
60490fe0 | 262 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 263 | struct e1000_hw *hw = &adapter->hw; |
1a821ca5 | 264 | int retval = 0; |
96838a40 | 265 | |
1da177e4 LT |
266 | adapter->fc_autoneg = pause->autoneg; |
267 | ||
1a821ca5 JB |
268 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
269 | msleep(1); | |
270 | ||
96838a40 | 271 | if (pause->rx_pause && pause->tx_pause) |
11241b10 | 272 | hw->fc = E1000_FC_FULL; |
96838a40 | 273 | else if (pause->rx_pause && !pause->tx_pause) |
11241b10 | 274 | hw->fc = E1000_FC_RX_PAUSE; |
96838a40 | 275 | else if (!pause->rx_pause && pause->tx_pause) |
11241b10 | 276 | hw->fc = E1000_FC_TX_PAUSE; |
96838a40 | 277 | else if (!pause->rx_pause && !pause->tx_pause) |
11241b10 | 278 | hw->fc = E1000_FC_NONE; |
1da177e4 LT |
279 | |
280 | hw->original_fc = hw->fc; | |
281 | ||
96838a40 | 282 | if (adapter->fc_autoneg == AUTONEG_ENABLE) { |
1a821ca5 JB |
283 | if (netif_running(adapter->netdev)) { |
284 | e1000_down(adapter); | |
285 | e1000_up(adapter); | |
286 | } else | |
1da177e4 | 287 | e1000_reset(adapter); |
96838a40 | 288 | } else |
1a821ca5 | 289 | retval = ((hw->media_type == e1000_media_type_fiber) ? |
90fb5135 | 290 | e1000_setup_link(hw) : e1000_force_mac_fc(hw)); |
96838a40 | 291 | |
1a821ca5 JB |
292 | clear_bit(__E1000_RESETTING, &adapter->flags); |
293 | return retval; | |
1da177e4 LT |
294 | } |
295 | ||
296 | static uint32_t | |
297 | e1000_get_rx_csum(struct net_device *netdev) | |
298 | { | |
60490fe0 | 299 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
300 | return adapter->rx_csum; |
301 | } | |
302 | ||
303 | static int | |
304 | e1000_set_rx_csum(struct net_device *netdev, uint32_t data) | |
305 | { | |
60490fe0 | 306 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
307 | adapter->rx_csum = data; |
308 | ||
2db10a08 AK |
309 | if (netif_running(netdev)) |
310 | e1000_reinit_locked(adapter); | |
311 | else | |
1da177e4 LT |
312 | e1000_reset(adapter); |
313 | return 0; | |
314 | } | |
96838a40 | 315 | |
1da177e4 LT |
316 | static uint32_t |
317 | e1000_get_tx_csum(struct net_device *netdev) | |
318 | { | |
319 | return (netdev->features & NETIF_F_HW_CSUM) != 0; | |
320 | } | |
321 | ||
322 | static int | |
323 | e1000_set_tx_csum(struct net_device *netdev, uint32_t data) | |
324 | { | |
60490fe0 | 325 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 326 | |
96838a40 | 327 | if (adapter->hw.mac_type < e1000_82543) { |
1da177e4 LT |
328 | if (!data) |
329 | return -EINVAL; | |
330 | return 0; | |
331 | } | |
332 | ||
333 | if (data) | |
334 | netdev->features |= NETIF_F_HW_CSUM; | |
335 | else | |
336 | netdev->features &= ~NETIF_F_HW_CSUM; | |
337 | ||
338 | return 0; | |
339 | } | |
340 | ||
1da177e4 LT |
341 | static int |
342 | e1000_set_tso(struct net_device *netdev, uint32_t data) | |
343 | { | |
60490fe0 | 344 | struct e1000_adapter *adapter = netdev_priv(netdev); |
96838a40 JB |
345 | if ((adapter->hw.mac_type < e1000_82544) || |
346 | (adapter->hw.mac_type == e1000_82547)) | |
1da177e4 LT |
347 | return data ? -EINVAL : 0; |
348 | ||
349 | if (data) | |
350 | netdev->features |= NETIF_F_TSO; | |
351 | else | |
352 | netdev->features &= ~NETIF_F_TSO; | |
7e6c9861 | 353 | |
87ca4e5b AK |
354 | if (data) |
355 | netdev->features |= NETIF_F_TSO6; | |
356 | else | |
357 | netdev->features &= ~NETIF_F_TSO6; | |
87ca4e5b | 358 | |
7e6c9861 JK |
359 | DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled"); |
360 | adapter->tso_force = TRUE; | |
1da177e4 | 361 | return 0; |
96838a40 | 362 | } |
1da177e4 LT |
363 | |
364 | static uint32_t | |
365 | e1000_get_msglevel(struct net_device *netdev) | |
366 | { | |
60490fe0 | 367 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
368 | return adapter->msg_enable; |
369 | } | |
370 | ||
371 | static void | |
372 | e1000_set_msglevel(struct net_device *netdev, uint32_t data) | |
373 | { | |
60490fe0 | 374 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
375 | adapter->msg_enable = data; |
376 | } | |
377 | ||
96838a40 | 378 | static int |
1da177e4 LT |
379 | e1000_get_regs_len(struct net_device *netdev) |
380 | { | |
381 | #define E1000_REGS_LEN 32 | |
382 | return E1000_REGS_LEN * sizeof(uint32_t); | |
383 | } | |
384 | ||
385 | static void | |
386 | e1000_get_regs(struct net_device *netdev, | |
387 | struct ethtool_regs *regs, void *p) | |
388 | { | |
60490fe0 | 389 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
390 | struct e1000_hw *hw = &adapter->hw; |
391 | uint32_t *regs_buff = p; | |
392 | uint16_t phy_data; | |
393 | ||
394 | memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t)); | |
395 | ||
396 | regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id; | |
397 | ||
398 | regs_buff[0] = E1000_READ_REG(hw, CTRL); | |
399 | regs_buff[1] = E1000_READ_REG(hw, STATUS); | |
400 | ||
401 | regs_buff[2] = E1000_READ_REG(hw, RCTL); | |
402 | regs_buff[3] = E1000_READ_REG(hw, RDLEN); | |
403 | regs_buff[4] = E1000_READ_REG(hw, RDH); | |
404 | regs_buff[5] = E1000_READ_REG(hw, RDT); | |
405 | regs_buff[6] = E1000_READ_REG(hw, RDTR); | |
406 | ||
407 | regs_buff[7] = E1000_READ_REG(hw, TCTL); | |
408 | regs_buff[8] = E1000_READ_REG(hw, TDLEN); | |
409 | regs_buff[9] = E1000_READ_REG(hw, TDH); | |
410 | regs_buff[10] = E1000_READ_REG(hw, TDT); | |
411 | regs_buff[11] = E1000_READ_REG(hw, TIDV); | |
412 | ||
413 | regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */ | |
96838a40 | 414 | if (hw->phy_type == e1000_phy_igp) { |
1da177e4 LT |
415 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
416 | IGP01E1000_PHY_AGC_A); | |
417 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A & | |
418 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
419 | regs_buff[13] = (uint32_t)phy_data; /* cable length */ | |
420 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, | |
421 | IGP01E1000_PHY_AGC_B); | |
422 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B & | |
423 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
424 | regs_buff[14] = (uint32_t)phy_data; /* cable length */ | |
425 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, | |
426 | IGP01E1000_PHY_AGC_C); | |
427 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C & | |
428 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
429 | regs_buff[15] = (uint32_t)phy_data; /* cable length */ | |
430 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, | |
431 | IGP01E1000_PHY_AGC_D); | |
432 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D & | |
433 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
434 | regs_buff[16] = (uint32_t)phy_data; /* cable length */ | |
435 | regs_buff[17] = 0; /* extended 10bt distance (not needed) */ | |
436 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0); | |
437 | e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS & | |
438 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
439 | regs_buff[18] = (uint32_t)phy_data; /* cable polarity */ | |
440 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, | |
441 | IGP01E1000_PHY_PCS_INIT_REG); | |
442 | e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG & | |
443 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
444 | regs_buff[19] = (uint32_t)phy_data; /* cable polarity */ | |
445 | regs_buff[20] = 0; /* polarity correction enabled (always) */ | |
446 | regs_buff[22] = 0; /* phy receive errors (unavailable) */ | |
447 | regs_buff[23] = regs_buff[18]; /* mdix mode */ | |
448 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0); | |
449 | } else { | |
8fc897b0 | 450 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); |
1da177e4 LT |
451 | regs_buff[13] = (uint32_t)phy_data; /* cable length */ |
452 | regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
453 | regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
454 | regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
8fc897b0 | 455 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); |
1da177e4 LT |
456 | regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */ |
457 | regs_buff[18] = regs_buff[13]; /* cable polarity */ | |
458 | regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
459 | regs_buff[20] = regs_buff[17]; /* polarity correction */ | |
460 | /* phy receive errors */ | |
461 | regs_buff[22] = adapter->phy_stats.receive_errors; | |
462 | regs_buff[23] = regs_buff[13]; /* mdix mode */ | |
463 | } | |
464 | regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */ | |
465 | e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data); | |
466 | regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */ | |
467 | regs_buff[25] = regs_buff[24]; /* phy remote receiver status */ | |
96838a40 | 468 | if (hw->mac_type >= e1000_82540 && |
4ccc12ae JB |
469 | hw->mac_type < e1000_82571 && |
470 | hw->media_type == e1000_media_type_copper) { | |
1da177e4 LT |
471 | regs_buff[26] = E1000_READ_REG(hw, MANC); |
472 | } | |
473 | } | |
474 | ||
475 | static int | |
476 | e1000_get_eeprom_len(struct net_device *netdev) | |
477 | { | |
60490fe0 | 478 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
479 | return adapter->hw.eeprom.word_size * 2; |
480 | } | |
481 | ||
482 | static int | |
483 | e1000_get_eeprom(struct net_device *netdev, | |
484 | struct ethtool_eeprom *eeprom, uint8_t *bytes) | |
485 | { | |
60490fe0 | 486 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
487 | struct e1000_hw *hw = &adapter->hw; |
488 | uint16_t *eeprom_buff; | |
489 | int first_word, last_word; | |
490 | int ret_val = 0; | |
491 | uint16_t i; | |
492 | ||
96838a40 | 493 | if (eeprom->len == 0) |
1da177e4 LT |
494 | return -EINVAL; |
495 | ||
496 | eeprom->magic = hw->vendor_id | (hw->device_id << 16); | |
497 | ||
498 | first_word = eeprom->offset >> 1; | |
499 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
500 | ||
501 | eeprom_buff = kmalloc(sizeof(uint16_t) * | |
502 | (last_word - first_word + 1), GFP_KERNEL); | |
96838a40 | 503 | if (!eeprom_buff) |
1da177e4 LT |
504 | return -ENOMEM; |
505 | ||
96838a40 | 506 | if (hw->eeprom.type == e1000_eeprom_spi) |
1da177e4 LT |
507 | ret_val = e1000_read_eeprom(hw, first_word, |
508 | last_word - first_word + 1, | |
509 | eeprom_buff); | |
510 | else { | |
511 | for (i = 0; i < last_word - first_word + 1; i++) | |
96838a40 | 512 | if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1, |
1da177e4 LT |
513 | &eeprom_buff[i]))) |
514 | break; | |
515 | } | |
516 | ||
517 | /* Device's eeprom is always little-endian, word addressable */ | |
518 | for (i = 0; i < last_word - first_word + 1; i++) | |
519 | le16_to_cpus(&eeprom_buff[i]); | |
520 | ||
521 | memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1), | |
522 | eeprom->len); | |
523 | kfree(eeprom_buff); | |
524 | ||
525 | return ret_val; | |
526 | } | |
527 | ||
528 | static int | |
529 | e1000_set_eeprom(struct net_device *netdev, | |
530 | struct ethtool_eeprom *eeprom, uint8_t *bytes) | |
531 | { | |
60490fe0 | 532 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
533 | struct e1000_hw *hw = &adapter->hw; |
534 | uint16_t *eeprom_buff; | |
535 | void *ptr; | |
536 | int max_len, first_word, last_word, ret_val = 0; | |
537 | uint16_t i; | |
538 | ||
96838a40 | 539 | if (eeprom->len == 0) |
1da177e4 LT |
540 | return -EOPNOTSUPP; |
541 | ||
96838a40 | 542 | if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) |
1da177e4 LT |
543 | return -EFAULT; |
544 | ||
545 | max_len = hw->eeprom.word_size * 2; | |
546 | ||
547 | first_word = eeprom->offset >> 1; | |
548 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
549 | eeprom_buff = kmalloc(max_len, GFP_KERNEL); | |
96838a40 | 550 | if (!eeprom_buff) |
1da177e4 LT |
551 | return -ENOMEM; |
552 | ||
553 | ptr = (void *)eeprom_buff; | |
554 | ||
96838a40 | 555 | if (eeprom->offset & 1) { |
1da177e4 LT |
556 | /* need read/modify/write of first changed EEPROM word */ |
557 | /* only the second byte of the word is being modified */ | |
558 | ret_val = e1000_read_eeprom(hw, first_word, 1, | |
559 | &eeprom_buff[0]); | |
560 | ptr++; | |
561 | } | |
96838a40 | 562 | if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) { |
1da177e4 LT |
563 | /* need read/modify/write of last changed EEPROM word */ |
564 | /* only the first byte of the word is being modified */ | |
565 | ret_val = e1000_read_eeprom(hw, last_word, 1, | |
566 | &eeprom_buff[last_word - first_word]); | |
567 | } | |
568 | ||
569 | /* Device's eeprom is always little-endian, word addressable */ | |
570 | for (i = 0; i < last_word - first_word + 1; i++) | |
571 | le16_to_cpus(&eeprom_buff[i]); | |
572 | ||
573 | memcpy(ptr, bytes, eeprom->len); | |
574 | ||
575 | for (i = 0; i < last_word - first_word + 1; i++) | |
576 | eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]); | |
577 | ||
578 | ret_val = e1000_write_eeprom(hw, first_word, | |
579 | last_word - first_word + 1, eeprom_buff); | |
580 | ||
96838a40 | 581 | /* Update the checksum over the first part of the EEPROM if needed |
a7990ba6 | 582 | * and flush shadow RAM for 82573 conrollers */ |
96838a40 | 583 | if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) || |
a7990ba6 | 584 | (hw->mac_type == e1000_82573))) |
1da177e4 LT |
585 | e1000_update_eeprom_checksum(hw); |
586 | ||
587 | kfree(eeprom_buff); | |
588 | return ret_val; | |
589 | } | |
590 | ||
591 | static void | |
592 | e1000_get_drvinfo(struct net_device *netdev, | |
593 | struct ethtool_drvinfo *drvinfo) | |
594 | { | |
60490fe0 | 595 | struct e1000_adapter *adapter = netdev_priv(netdev); |
a2917e22 JK |
596 | char firmware_version[32]; |
597 | uint16_t eeprom_data; | |
1da177e4 LT |
598 | |
599 | strncpy(drvinfo->driver, e1000_driver_name, 32); | |
600 | strncpy(drvinfo->version, e1000_driver_version, 32); | |
a2917e22 JK |
601 | |
602 | /* EEPROM image version # is reported as firmware version # for | |
603 | * 8257{1|2|3} controllers */ | |
604 | e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data); | |
605 | switch (adapter->hw.mac_type) { | |
606 | case e1000_82571: | |
607 | case e1000_82572: | |
608 | case e1000_82573: | |
6418ecc6 | 609 | case e1000_80003es2lan: |
cd94dd0b | 610 | case e1000_ich8lan: |
a2917e22 JK |
611 | sprintf(firmware_version, "%d.%d-%d", |
612 | (eeprom_data & 0xF000) >> 12, | |
613 | (eeprom_data & 0x0FF0) >> 4, | |
614 | eeprom_data & 0x000F); | |
615 | break; | |
616 | default: | |
617 | sprintf(firmware_version, "N/A"); | |
618 | } | |
619 | ||
620 | strncpy(drvinfo->fw_version, firmware_version, 32); | |
1da177e4 LT |
621 | strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32); |
622 | drvinfo->n_stats = E1000_STATS_LEN; | |
623 | drvinfo->testinfo_len = E1000_TEST_LEN; | |
624 | drvinfo->regdump_len = e1000_get_regs_len(netdev); | |
625 | drvinfo->eedump_len = e1000_get_eeprom_len(netdev); | |
626 | } | |
627 | ||
628 | static void | |
629 | e1000_get_ringparam(struct net_device *netdev, | |
630 | struct ethtool_ringparam *ring) | |
631 | { | |
60490fe0 | 632 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 633 | e1000_mac_type mac_type = adapter->hw.mac_type; |
581d708e MC |
634 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
635 | struct e1000_rx_ring *rxdr = adapter->rx_ring; | |
1da177e4 LT |
636 | |
637 | ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD : | |
638 | E1000_MAX_82544_RXD; | |
639 | ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD : | |
640 | E1000_MAX_82544_TXD; | |
641 | ring->rx_mini_max_pending = 0; | |
642 | ring->rx_jumbo_max_pending = 0; | |
643 | ring->rx_pending = rxdr->count; | |
644 | ring->tx_pending = txdr->count; | |
645 | ring->rx_mini_pending = 0; | |
646 | ring->rx_jumbo_pending = 0; | |
647 | } | |
648 | ||
96838a40 | 649 | static int |
1da177e4 LT |
650 | e1000_set_ringparam(struct net_device *netdev, |
651 | struct ethtool_ringparam *ring) | |
652 | { | |
60490fe0 | 653 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 654 | e1000_mac_type mac_type = adapter->hw.mac_type; |
793fab72 VA |
655 | struct e1000_tx_ring *txdr, *tx_old; |
656 | struct e1000_rx_ring *rxdr, *rx_old; | |
1c7e5b12 | 657 | int i, err; |
581d708e | 658 | |
0989aa43 JK |
659 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) |
660 | return -EINVAL; | |
661 | ||
2db10a08 AK |
662 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
663 | msleep(1); | |
664 | ||
581d708e MC |
665 | if (netif_running(adapter->netdev)) |
666 | e1000_down(adapter); | |
1da177e4 LT |
667 | |
668 | tx_old = adapter->tx_ring; | |
669 | rx_old = adapter->rx_ring; | |
670 | ||
793fab72 | 671 | err = -ENOMEM; |
1c7e5b12 | 672 | txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL); |
793fab72 VA |
673 | if (!txdr) |
674 | goto err_alloc_tx; | |
581d708e | 675 | |
1c7e5b12 | 676 | rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL); |
793fab72 VA |
677 | if (!rxdr) |
678 | goto err_alloc_rx; | |
581d708e | 679 | |
793fab72 VA |
680 | adapter->tx_ring = txdr; |
681 | adapter->rx_ring = rxdr; | |
581d708e | 682 | |
1da177e4 LT |
683 | rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD); |
684 | rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ? | |
685 | E1000_MAX_RXD : E1000_MAX_82544_RXD)); | |
96838a40 | 686 | E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE); |
1da177e4 LT |
687 | |
688 | txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD); | |
689 | txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ? | |
690 | E1000_MAX_TXD : E1000_MAX_82544_TXD)); | |
96838a40 | 691 | E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE); |
1da177e4 | 692 | |
f56799ea | 693 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 694 | txdr[i].count = txdr->count; |
f56799ea | 695 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 696 | rxdr[i].count = rxdr->count; |
581d708e | 697 | |
96838a40 | 698 | if (netif_running(adapter->netdev)) { |
1da177e4 | 699 | /* Try to get new resources before deleting old */ |
581d708e | 700 | if ((err = e1000_setup_all_rx_resources(adapter))) |
1da177e4 | 701 | goto err_setup_rx; |
581d708e | 702 | if ((err = e1000_setup_all_tx_resources(adapter))) |
1da177e4 LT |
703 | goto err_setup_tx; |
704 | ||
705 | /* save the new, restore the old in order to free it, | |
706 | * then restore the new back again */ | |
707 | ||
1da177e4 LT |
708 | adapter->rx_ring = rx_old; |
709 | adapter->tx_ring = tx_old; | |
581d708e MC |
710 | e1000_free_all_rx_resources(adapter); |
711 | e1000_free_all_tx_resources(adapter); | |
712 | kfree(tx_old); | |
713 | kfree(rx_old); | |
793fab72 VA |
714 | adapter->rx_ring = rxdr; |
715 | adapter->tx_ring = txdr; | |
96838a40 | 716 | if ((err = e1000_up(adapter))) |
2db10a08 | 717 | goto err_setup; |
1da177e4 LT |
718 | } |
719 | ||
2db10a08 | 720 | clear_bit(__E1000_RESETTING, &adapter->flags); |
1da177e4 LT |
721 | return 0; |
722 | err_setup_tx: | |
581d708e | 723 | e1000_free_all_rx_resources(adapter); |
1da177e4 LT |
724 | err_setup_rx: |
725 | adapter->rx_ring = rx_old; | |
726 | adapter->tx_ring = tx_old; | |
793fab72 VA |
727 | kfree(rxdr); |
728 | err_alloc_rx: | |
729 | kfree(txdr); | |
730 | err_alloc_tx: | |
1da177e4 | 731 | e1000_up(adapter); |
2db10a08 AK |
732 | err_setup: |
733 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 LT |
734 | return err; |
735 | } | |
736 | ||
737 | #define REG_PATTERN_TEST(R, M, W) \ | |
738 | { \ | |
739 | uint32_t pat, value; \ | |
740 | uint32_t test[] = \ | |
741 | {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \ | |
c38db30b | 742 | for (pat = 0; pat < ARRAY_SIZE(test); pat++) { \ |
1da177e4 LT |
743 | E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \ |
744 | value = E1000_READ_REG(&adapter->hw, R); \ | |
96838a40 | 745 | if (value != (test[pat] & W & M)) { \ |
b01f6691 MC |
746 | DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \ |
747 | "0x%08X expected 0x%08X\n", \ | |
748 | E1000_##R, value, (test[pat] & W & M)); \ | |
1da177e4 LT |
749 | *data = (adapter->hw.mac_type < e1000_82543) ? \ |
750 | E1000_82542_##R : E1000_##R; \ | |
751 | return 1; \ | |
752 | } \ | |
753 | } \ | |
754 | } | |
755 | ||
756 | #define REG_SET_AND_CHECK(R, M, W) \ | |
757 | { \ | |
758 | uint32_t value; \ | |
759 | E1000_WRITE_REG(&adapter->hw, R, W & M); \ | |
760 | value = E1000_READ_REG(&adapter->hw, R); \ | |
96838a40 | 761 | if ((W & M) != (value & M)) { \ |
b01f6691 MC |
762 | DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\ |
763 | "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \ | |
1da177e4 LT |
764 | *data = (adapter->hw.mac_type < e1000_82543) ? \ |
765 | E1000_82542_##R : E1000_##R; \ | |
766 | return 1; \ | |
767 | } \ | |
768 | } | |
769 | ||
770 | static int | |
771 | e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data) | |
772 | { | |
b01f6691 MC |
773 | uint32_t value, before, after; |
774 | uint32_t i, toggle; | |
1da177e4 LT |
775 | |
776 | /* The status register is Read Only, so a write should fail. | |
777 | * Some bits that get toggled are ignored. | |
778 | */ | |
90fb5135 | 779 | switch (adapter->hw.mac_type) { |
868d5309 MC |
780 | /* there are several bits on newer hardware that are r/w */ |
781 | case e1000_82571: | |
782 | case e1000_82572: | |
6418ecc6 | 783 | case e1000_80003es2lan: |
868d5309 MC |
784 | toggle = 0x7FFFF3FF; |
785 | break; | |
b01f6691 | 786 | case e1000_82573: |
cd94dd0b | 787 | case e1000_ich8lan: |
b01f6691 MC |
788 | toggle = 0x7FFFF033; |
789 | break; | |
790 | default: | |
791 | toggle = 0xFFFFF833; | |
792 | break; | |
793 | } | |
794 | ||
795 | before = E1000_READ_REG(&adapter->hw, STATUS); | |
796 | value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle); | |
797 | E1000_WRITE_REG(&adapter->hw, STATUS, toggle); | |
798 | after = E1000_READ_REG(&adapter->hw, STATUS) & toggle; | |
96838a40 | 799 | if (value != after) { |
b01f6691 MC |
800 | DPRINTK(DRV, ERR, "failed STATUS register test got: " |
801 | "0x%08X expected: 0x%08X\n", after, value); | |
1da177e4 LT |
802 | *data = 1; |
803 | return 1; | |
804 | } | |
b01f6691 MC |
805 | /* restore previous status */ |
806 | E1000_WRITE_REG(&adapter->hw, STATUS, before); | |
90fb5135 | 807 | |
cd94dd0b AK |
808 | if (adapter->hw.mac_type != e1000_ich8lan) { |
809 | REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF); | |
810 | REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF); | |
811 | REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF); | |
812 | REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF); | |
813 | } | |
90fb5135 | 814 | |
1da177e4 LT |
815 | REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF); |
816 | REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF); | |
817 | REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF); | |
818 | REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF); | |
819 | REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF); | |
820 | REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8); | |
821 | REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF); | |
822 | REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF); | |
823 | REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF); | |
824 | REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF); | |
825 | ||
826 | REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000); | |
90fb5135 | 827 | |
cd94dd0b | 828 | before = (adapter->hw.mac_type == e1000_ich8lan ? |
90fb5135 | 829 | 0x06C3B33E : 0x06DFB3FE); |
cd94dd0b | 830 | REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB); |
1da177e4 LT |
831 | REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000); |
832 | ||
96838a40 | 833 | if (adapter->hw.mac_type >= e1000_82543) { |
1da177e4 | 834 | |
cd94dd0b | 835 | REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF); |
1da177e4 | 836 | REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF); |
cd94dd0b AK |
837 | if (adapter->hw.mac_type != e1000_ich8lan) |
838 | REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF); | |
1da177e4 LT |
839 | REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF); |
840 | REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF); | |
cd94dd0b | 841 | value = (adapter->hw.mac_type == e1000_ich8lan ? |
90fb5135 | 842 | E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES); |
cd94dd0b | 843 | for (i = 0; i < value; i++) { |
1da177e4 | 844 | REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF, |
90fb5135 | 845 | 0xFFFFFFFF); |
1da177e4 LT |
846 | } |
847 | ||
848 | } else { | |
849 | ||
850 | REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF); | |
851 | REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF); | |
852 | REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF); | |
853 | REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF); | |
854 | ||
855 | } | |
856 | ||
cd94dd0b AK |
857 | value = (adapter->hw.mac_type == e1000_ich8lan ? |
858 | E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE); | |
859 | for (i = 0; i < value; i++) | |
1da177e4 LT |
860 | REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF); |
861 | ||
862 | *data = 0; | |
863 | return 0; | |
864 | } | |
865 | ||
866 | static int | |
867 | e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data) | |
868 | { | |
869 | uint16_t temp; | |
870 | uint16_t checksum = 0; | |
871 | uint16_t i; | |
872 | ||
873 | *data = 0; | |
874 | /* Read and add up the contents of the EEPROM */ | |
96838a40 JB |
875 | for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) { |
876 | if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) { | |
1da177e4 LT |
877 | *data = 1; |
878 | break; | |
879 | } | |
880 | checksum += temp; | |
881 | } | |
882 | ||
883 | /* If Checksum is not Correct return error else test passed */ | |
96838a40 | 884 | if ((checksum != (uint16_t) EEPROM_SUM) && !(*data)) |
1da177e4 LT |
885 | *data = 2; |
886 | ||
887 | return *data; | |
888 | } | |
889 | ||
890 | static irqreturn_t | |
90fb5135 | 891 | e1000_test_intr(int irq, void *data) |
1da177e4 LT |
892 | { |
893 | struct net_device *netdev = (struct net_device *) data; | |
60490fe0 | 894 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
895 | |
896 | adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR); | |
897 | ||
898 | return IRQ_HANDLED; | |
899 | } | |
900 | ||
901 | static int | |
902 | e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) | |
903 | { | |
904 | struct net_device *netdev = adapter->netdev; | |
76c224bc AK |
905 | uint32_t mask, i=0, shared_int = TRUE; |
906 | uint32_t irq = adapter->pdev->irq; | |
1da177e4 LT |
907 | |
908 | *data = 0; | |
909 | ||
8fc897b0 | 910 | /* NOTE: we don't test MSI interrupts here, yet */ |
1da177e4 | 911 | /* Hook up test interrupt handler just for this test */ |
90fb5135 AK |
912 | if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name, |
913 | netdev)) | |
8fc897b0 AK |
914 | shared_int = FALSE; |
915 | else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED, | |
90fb5135 | 916 | netdev->name, netdev)) { |
1da177e4 LT |
917 | *data = 1; |
918 | return -1; | |
919 | } | |
8fc897b0 | 920 | DPRINTK(HW, INFO, "testing %s interrupt\n", |
b9b6e78b | 921 | (shared_int ? "shared" : "unshared")); |
1da177e4 LT |
922 | |
923 | /* Disable all the interrupts */ | |
924 | E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF); | |
f8ec4733 | 925 | msleep(10); |
1da177e4 LT |
926 | |
927 | /* Test each interrupt */ | |
96838a40 | 928 | for (; i < 10; i++) { |
1da177e4 | 929 | |
cd94dd0b AK |
930 | if (adapter->hw.mac_type == e1000_ich8lan && i == 8) |
931 | continue; | |
90fb5135 | 932 | |
1da177e4 LT |
933 | /* Interrupt to test */ |
934 | mask = 1 << i; | |
935 | ||
76c224bc AK |
936 | if (!shared_int) { |
937 | /* Disable the interrupt to be reported in | |
938 | * the cause register and then force the same | |
939 | * interrupt and see if one gets posted. If | |
940 | * an interrupt was posted to the bus, the | |
941 | * test failed. | |
942 | */ | |
943 | adapter->test_icr = 0; | |
944 | E1000_WRITE_REG(&adapter->hw, IMC, mask); | |
945 | E1000_WRITE_REG(&adapter->hw, ICS, mask); | |
f8ec4733 | 946 | msleep(10); |
76c224bc AK |
947 | |
948 | if (adapter->test_icr & mask) { | |
949 | *data = 3; | |
950 | break; | |
951 | } | |
1da177e4 LT |
952 | } |
953 | ||
954 | /* Enable the interrupt to be reported in | |
955 | * the cause register and then force the same | |
956 | * interrupt and see if one gets posted. If | |
957 | * an interrupt was not posted to the bus, the | |
958 | * test failed. | |
959 | */ | |
960 | adapter->test_icr = 0; | |
961 | E1000_WRITE_REG(&adapter->hw, IMS, mask); | |
962 | E1000_WRITE_REG(&adapter->hw, ICS, mask); | |
f8ec4733 | 963 | msleep(10); |
1da177e4 | 964 | |
96838a40 | 965 | if (!(adapter->test_icr & mask)) { |
1da177e4 LT |
966 | *data = 4; |
967 | break; | |
968 | } | |
969 | ||
76c224bc | 970 | if (!shared_int) { |
1da177e4 LT |
971 | /* Disable the other interrupts to be reported in |
972 | * the cause register and then force the other | |
973 | * interrupts and see if any get posted. If | |
974 | * an interrupt was posted to the bus, the | |
975 | * test failed. | |
976 | */ | |
977 | adapter->test_icr = 0; | |
2648345f MC |
978 | E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF); |
979 | E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF); | |
f8ec4733 | 980 | msleep(10); |
1da177e4 | 981 | |
96838a40 | 982 | if (adapter->test_icr) { |
1da177e4 LT |
983 | *data = 5; |
984 | break; | |
985 | } | |
986 | } | |
987 | } | |
988 | ||
989 | /* Disable all the interrupts */ | |
990 | E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF); | |
f8ec4733 | 991 | msleep(10); |
1da177e4 LT |
992 | |
993 | /* Unhook test interrupt handler */ | |
994 | free_irq(irq, netdev); | |
995 | ||
996 | return *data; | |
997 | } | |
998 | ||
999 | static void | |
1000 | e1000_free_desc_rings(struct e1000_adapter *adapter) | |
1001 | { | |
581d708e MC |
1002 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
1003 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 LT |
1004 | struct pci_dev *pdev = adapter->pdev; |
1005 | int i; | |
1006 | ||
96838a40 JB |
1007 | if (txdr->desc && txdr->buffer_info) { |
1008 | for (i = 0; i < txdr->count; i++) { | |
1009 | if (txdr->buffer_info[i].dma) | |
1da177e4 LT |
1010 | pci_unmap_single(pdev, txdr->buffer_info[i].dma, |
1011 | txdr->buffer_info[i].length, | |
1012 | PCI_DMA_TODEVICE); | |
96838a40 | 1013 | if (txdr->buffer_info[i].skb) |
1da177e4 LT |
1014 | dev_kfree_skb(txdr->buffer_info[i].skb); |
1015 | } | |
1016 | } | |
1017 | ||
96838a40 JB |
1018 | if (rxdr->desc && rxdr->buffer_info) { |
1019 | for (i = 0; i < rxdr->count; i++) { | |
1020 | if (rxdr->buffer_info[i].dma) | |
1da177e4 LT |
1021 | pci_unmap_single(pdev, rxdr->buffer_info[i].dma, |
1022 | rxdr->buffer_info[i].length, | |
1023 | PCI_DMA_FROMDEVICE); | |
96838a40 | 1024 | if (rxdr->buffer_info[i].skb) |
1da177e4 LT |
1025 | dev_kfree_skb(rxdr->buffer_info[i].skb); |
1026 | } | |
1027 | } | |
1028 | ||
f5645110 | 1029 | if (txdr->desc) { |
1da177e4 | 1030 | pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma); |
6b27adb6 JL |
1031 | txdr->desc = NULL; |
1032 | } | |
f5645110 | 1033 | if (rxdr->desc) { |
1da177e4 | 1034 | pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma); |
6b27adb6 JL |
1035 | rxdr->desc = NULL; |
1036 | } | |
1da177e4 | 1037 | |
b4558ea9 | 1038 | kfree(txdr->buffer_info); |
6b27adb6 | 1039 | txdr->buffer_info = NULL; |
b4558ea9 | 1040 | kfree(rxdr->buffer_info); |
6b27adb6 | 1041 | rxdr->buffer_info = NULL; |
f5645110 | 1042 | |
1da177e4 LT |
1043 | return; |
1044 | } | |
1045 | ||
1046 | static int | |
1047 | e1000_setup_desc_rings(struct e1000_adapter *adapter) | |
1048 | { | |
581d708e MC |
1049 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
1050 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 LT |
1051 | struct pci_dev *pdev = adapter->pdev; |
1052 | uint32_t rctl; | |
1c7e5b12 | 1053 | int i, ret_val; |
1da177e4 LT |
1054 | |
1055 | /* Setup Tx descriptor ring and Tx buffers */ | |
1056 | ||
96838a40 JB |
1057 | if (!txdr->count) |
1058 | txdr->count = E1000_DEFAULT_TXD; | |
1da177e4 | 1059 | |
1c7e5b12 YB |
1060 | if (!(txdr->buffer_info = kcalloc(txdr->count, |
1061 | sizeof(struct e1000_buffer), | |
1062 | GFP_KERNEL))) { | |
1da177e4 LT |
1063 | ret_val = 1; |
1064 | goto err_nomem; | |
1065 | } | |
1da177e4 LT |
1066 | |
1067 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
1068 | E1000_ROUNDUP(txdr->size, 4096); | |
1c7e5b12 YB |
1069 | if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, |
1070 | &txdr->dma))) { | |
1da177e4 LT |
1071 | ret_val = 2; |
1072 | goto err_nomem; | |
1073 | } | |
1074 | memset(txdr->desc, 0, txdr->size); | |
1075 | txdr->next_to_use = txdr->next_to_clean = 0; | |
1076 | ||
1077 | E1000_WRITE_REG(&adapter->hw, TDBAL, | |
1078 | ((uint64_t) txdr->dma & 0x00000000FFFFFFFF)); | |
1079 | E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32)); | |
1080 | E1000_WRITE_REG(&adapter->hw, TDLEN, | |
1081 | txdr->count * sizeof(struct e1000_tx_desc)); | |
1082 | E1000_WRITE_REG(&adapter->hw, TDH, 0); | |
1083 | E1000_WRITE_REG(&adapter->hw, TDT, 0); | |
1084 | E1000_WRITE_REG(&adapter->hw, TCTL, | |
1085 | E1000_TCTL_PSP | E1000_TCTL_EN | | |
1086 | E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT | | |
1087 | E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT); | |
1088 | ||
96838a40 | 1089 | for (i = 0; i < txdr->count; i++) { |
1da177e4 LT |
1090 | struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i); |
1091 | struct sk_buff *skb; | |
1092 | unsigned int size = 1024; | |
1093 | ||
96838a40 | 1094 | if (!(skb = alloc_skb(size, GFP_KERNEL))) { |
1da177e4 LT |
1095 | ret_val = 3; |
1096 | goto err_nomem; | |
1097 | } | |
1098 | skb_put(skb, size); | |
1099 | txdr->buffer_info[i].skb = skb; | |
1100 | txdr->buffer_info[i].length = skb->len; | |
1101 | txdr->buffer_info[i].dma = | |
1102 | pci_map_single(pdev, skb->data, skb->len, | |
1103 | PCI_DMA_TODEVICE); | |
1104 | tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma); | |
1105 | tx_desc->lower.data = cpu_to_le32(skb->len); | |
1106 | tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP | | |
1107 | E1000_TXD_CMD_IFCS | | |
1108 | E1000_TXD_CMD_RPS); | |
1109 | tx_desc->upper.data = 0; | |
1110 | } | |
1111 | ||
1112 | /* Setup Rx descriptor ring and Rx buffers */ | |
1113 | ||
96838a40 JB |
1114 | if (!rxdr->count) |
1115 | rxdr->count = E1000_DEFAULT_RXD; | |
1da177e4 | 1116 | |
1c7e5b12 YB |
1117 | if (!(rxdr->buffer_info = kcalloc(rxdr->count, |
1118 | sizeof(struct e1000_buffer), | |
1119 | GFP_KERNEL))) { | |
1da177e4 LT |
1120 | ret_val = 4; |
1121 | goto err_nomem; | |
1122 | } | |
1da177e4 LT |
1123 | |
1124 | rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc); | |
96838a40 | 1125 | if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) { |
1da177e4 LT |
1126 | ret_val = 5; |
1127 | goto err_nomem; | |
1128 | } | |
1129 | memset(rxdr->desc, 0, rxdr->size); | |
1130 | rxdr->next_to_use = rxdr->next_to_clean = 0; | |
1131 | ||
1132 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1133 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN); | |
1134 | E1000_WRITE_REG(&adapter->hw, RDBAL, | |
1135 | ((uint64_t) rxdr->dma & 0xFFFFFFFF)); | |
1136 | E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32)); | |
1137 | E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size); | |
1138 | E1000_WRITE_REG(&adapter->hw, RDH, 0); | |
1139 | E1000_WRITE_REG(&adapter->hw, RDT, 0); | |
1140 | rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 | | |
1141 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1142 | (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1143 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1144 | ||
96838a40 | 1145 | for (i = 0; i < rxdr->count; i++) { |
1da177e4 LT |
1146 | struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i); |
1147 | struct sk_buff *skb; | |
1148 | ||
96838a40 | 1149 | if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, |
1da177e4 LT |
1150 | GFP_KERNEL))) { |
1151 | ret_val = 6; | |
1152 | goto err_nomem; | |
1153 | } | |
1154 | skb_reserve(skb, NET_IP_ALIGN); | |
1155 | rxdr->buffer_info[i].skb = skb; | |
1156 | rxdr->buffer_info[i].length = E1000_RXBUFFER_2048; | |
1157 | rxdr->buffer_info[i].dma = | |
1158 | pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048, | |
1159 | PCI_DMA_FROMDEVICE); | |
1160 | rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma); | |
1161 | memset(skb->data, 0x00, skb->len); | |
1162 | } | |
1163 | ||
1164 | return 0; | |
1165 | ||
1166 | err_nomem: | |
1167 | e1000_free_desc_rings(adapter); | |
1168 | return ret_val; | |
1169 | } | |
1170 | ||
1171 | static void | |
1172 | e1000_phy_disable_receiver(struct e1000_adapter *adapter) | |
1173 | { | |
1174 | /* Write out to PHY registers 29 and 30 to disable the Receiver. */ | |
1175 | e1000_write_phy_reg(&adapter->hw, 29, 0x001F); | |
1176 | e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC); | |
1177 | e1000_write_phy_reg(&adapter->hw, 29, 0x001A); | |
1178 | e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0); | |
1179 | } | |
1180 | ||
1181 | static void | |
1182 | e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter) | |
1183 | { | |
1184 | uint16_t phy_reg; | |
1185 | ||
1186 | /* Because we reset the PHY above, we need to re-force TX_CLK in the | |
1187 | * Extended PHY Specific Control Register to 25MHz clock. This | |
1188 | * value defaults back to a 2.5MHz clock when the PHY is reset. | |
1189 | */ | |
1190 | e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); | |
1191 | phy_reg |= M88E1000_EPSCR_TX_CLK_25; | |
1192 | e1000_write_phy_reg(&adapter->hw, | |
1193 | M88E1000_EXT_PHY_SPEC_CTRL, phy_reg); | |
1194 | ||
1195 | /* In addition, because of the s/w reset above, we need to enable | |
1196 | * CRS on TX. This must be set for both full and half duplex | |
1197 | * operation. | |
1198 | */ | |
1199 | e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); | |
1200 | phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX; | |
1201 | e1000_write_phy_reg(&adapter->hw, | |
1202 | M88E1000_PHY_SPEC_CTRL, phy_reg); | |
1203 | } | |
1204 | ||
1205 | static int | |
1206 | e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter) | |
1207 | { | |
1208 | uint32_t ctrl_reg; | |
1209 | uint16_t phy_reg; | |
1210 | ||
1211 | /* Setup the Device Control Register for PHY loopback test. */ | |
1212 | ||
1213 | ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL); | |
1214 | ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */ | |
1215 | E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ | |
1216 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | |
1217 | E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */ | |
1218 | E1000_CTRL_FD); /* Force Duplex to FULL */ | |
1219 | ||
1220 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg); | |
1221 | ||
1222 | /* Read the PHY Specific Control Register (0x10) */ | |
1223 | e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); | |
1224 | ||
1225 | /* Clear Auto-Crossover bits in PHY Specific Control Register | |
1226 | * (bits 6:5). | |
1227 | */ | |
1228 | phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE; | |
1229 | e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg); | |
1230 | ||
1231 | /* Perform software reset on the PHY */ | |
1232 | e1000_phy_reset(&adapter->hw); | |
1233 | ||
1234 | /* Have to setup TX_CLK and TX_CRS after software reset */ | |
1235 | e1000_phy_reset_clk_and_crs(adapter); | |
1236 | ||
1237 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100); | |
1238 | ||
1239 | /* Wait for reset to complete. */ | |
1240 | udelay(500); | |
1241 | ||
1242 | /* Have to setup TX_CLK and TX_CRS after software reset */ | |
1243 | e1000_phy_reset_clk_and_crs(adapter); | |
1244 | ||
1245 | /* Write out to PHY registers 29 and 30 to disable the Receiver. */ | |
1246 | e1000_phy_disable_receiver(adapter); | |
1247 | ||
1248 | /* Set the loopback bit in the PHY control register. */ | |
1249 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg); | |
1250 | phy_reg |= MII_CR_LOOPBACK; | |
1251 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg); | |
1252 | ||
1253 | /* Setup TX_CLK and TX_CRS one more time. */ | |
1254 | e1000_phy_reset_clk_and_crs(adapter); | |
1255 | ||
1256 | /* Check Phy Configuration */ | |
1257 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg); | |
96838a40 | 1258 | if (phy_reg != 0x4100) |
1da177e4 LT |
1259 | return 9; |
1260 | ||
1261 | e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); | |
96838a40 | 1262 | if (phy_reg != 0x0070) |
1da177e4 LT |
1263 | return 10; |
1264 | ||
1265 | e1000_read_phy_reg(&adapter->hw, 29, &phy_reg); | |
96838a40 | 1266 | if (phy_reg != 0x001A) |
1da177e4 LT |
1267 | return 11; |
1268 | ||
1269 | return 0; | |
1270 | } | |
1271 | ||
1272 | static int | |
1273 | e1000_integrated_phy_loopback(struct e1000_adapter *adapter) | |
1274 | { | |
1275 | uint32_t ctrl_reg = 0; | |
1276 | uint32_t stat_reg = 0; | |
1277 | ||
1278 | adapter->hw.autoneg = FALSE; | |
1279 | ||
96838a40 | 1280 | if (adapter->hw.phy_type == e1000_phy_m88) { |
1da177e4 LT |
1281 | /* Auto-MDI/MDIX Off */ |
1282 | e1000_write_phy_reg(&adapter->hw, | |
1283 | M88E1000_PHY_SPEC_CTRL, 0x0808); | |
1284 | /* reset to update Auto-MDI/MDIX */ | |
1285 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140); | |
1286 | /* autoneg off */ | |
1287 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140); | |
8fc897b0 | 1288 | } else if (adapter->hw.phy_type == e1000_phy_gg82563) |
87041639 JK |
1289 | e1000_write_phy_reg(&adapter->hw, |
1290 | GG82563_PHY_KMRN_MODE_CTRL, | |
acfbc9fd | 1291 | 0x1CC); |
1da177e4 | 1292 | |
1da177e4 | 1293 | ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL); |
cd94dd0b AK |
1294 | |
1295 | if (adapter->hw.phy_type == e1000_phy_ife) { | |
1296 | /* force 100, set loopback */ | |
1297 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100); | |
1298 | ||
1299 | /* Now set up the MAC to the same speed/duplex as the PHY. */ | |
1300 | ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ | |
1301 | ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ | |
1302 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | |
1303 | E1000_CTRL_SPD_100 |/* Force Speed to 100 */ | |
1304 | E1000_CTRL_FD); /* Force Duplex to FULL */ | |
1305 | } else { | |
1306 | /* force 1000, set loopback */ | |
1307 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140); | |
1308 | ||
1309 | /* Now set up the MAC to the same speed/duplex as the PHY. */ | |
1310 | ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL); | |
1311 | ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ | |
1312 | ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ | |
1313 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | |
1314 | E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */ | |
1315 | E1000_CTRL_FD); /* Force Duplex to FULL */ | |
1316 | } | |
1da177e4 | 1317 | |
96838a40 | 1318 | if (adapter->hw.media_type == e1000_media_type_copper && |
8fc897b0 | 1319 | adapter->hw.phy_type == e1000_phy_m88) |
1da177e4 | 1320 | ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ |
8fc897b0 | 1321 | else { |
1da177e4 LT |
1322 | /* Set the ILOS bit on the fiber Nic is half |
1323 | * duplex link is detected. */ | |
1324 | stat_reg = E1000_READ_REG(&adapter->hw, STATUS); | |
96838a40 | 1325 | if ((stat_reg & E1000_STATUS_FD) == 0) |
1da177e4 LT |
1326 | ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU); |
1327 | } | |
1328 | ||
1329 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg); | |
1330 | ||
1331 | /* Disable the receiver on the PHY so when a cable is plugged in, the | |
1332 | * PHY does not begin to autoneg when a cable is reconnected to the NIC. | |
1333 | */ | |
96838a40 | 1334 | if (adapter->hw.phy_type == e1000_phy_m88) |
1da177e4 LT |
1335 | e1000_phy_disable_receiver(adapter); |
1336 | ||
1337 | udelay(500); | |
1338 | ||
1339 | return 0; | |
1340 | } | |
1341 | ||
1342 | static int | |
1343 | e1000_set_phy_loopback(struct e1000_adapter *adapter) | |
1344 | { | |
1345 | uint16_t phy_reg = 0; | |
1346 | uint16_t count = 0; | |
1347 | ||
1348 | switch (adapter->hw.mac_type) { | |
1349 | case e1000_82543: | |
96838a40 | 1350 | if (adapter->hw.media_type == e1000_media_type_copper) { |
1da177e4 LT |
1351 | /* Attempt to setup Loopback mode on Non-integrated PHY. |
1352 | * Some PHY registers get corrupted at random, so | |
1353 | * attempt this 10 times. | |
1354 | */ | |
96838a40 | 1355 | while (e1000_nonintegrated_phy_loopback(adapter) && |
1da177e4 | 1356 | count++ < 10); |
96838a40 | 1357 | if (count < 11) |
1da177e4 LT |
1358 | return 0; |
1359 | } | |
1360 | break; | |
1361 | ||
1362 | case e1000_82544: | |
1363 | case e1000_82540: | |
1364 | case e1000_82545: | |
1365 | case e1000_82545_rev_3: | |
1366 | case e1000_82546: | |
1367 | case e1000_82546_rev_3: | |
1368 | case e1000_82541: | |
1369 | case e1000_82541_rev_2: | |
1370 | case e1000_82547: | |
1371 | case e1000_82547_rev_2: | |
868d5309 MC |
1372 | case e1000_82571: |
1373 | case e1000_82572: | |
4564327b | 1374 | case e1000_82573: |
6418ecc6 | 1375 | case e1000_80003es2lan: |
cd94dd0b | 1376 | case e1000_ich8lan: |
1da177e4 LT |
1377 | return e1000_integrated_phy_loopback(adapter); |
1378 | break; | |
1379 | ||
1380 | default: | |
1381 | /* Default PHY loopback work is to read the MII | |
1382 | * control register and assert bit 14 (loopback mode). | |
1383 | */ | |
1384 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg); | |
1385 | phy_reg |= MII_CR_LOOPBACK; | |
1386 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg); | |
1387 | return 0; | |
1388 | break; | |
1389 | } | |
1390 | ||
1391 | return 8; | |
1392 | } | |
1393 | ||
1394 | static int | |
1395 | e1000_setup_loopback_test(struct e1000_adapter *adapter) | |
1396 | { | |
49273163 | 1397 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
1398 | uint32_t rctl; |
1399 | ||
49273163 JK |
1400 | if (hw->media_type == e1000_media_type_fiber || |
1401 | hw->media_type == e1000_media_type_internal_serdes) { | |
1402 | switch (hw->mac_type) { | |
1403 | case e1000_82545: | |
1404 | case e1000_82546: | |
1405 | case e1000_82545_rev_3: | |
1406 | case e1000_82546_rev_3: | |
1da177e4 | 1407 | return e1000_set_phy_loopback(adapter); |
49273163 JK |
1408 | break; |
1409 | case e1000_82571: | |
1410 | case e1000_82572: | |
1411 | #define E1000_SERDES_LB_ON 0x410 | |
1412 | e1000_set_phy_loopback(adapter); | |
1413 | E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON); | |
f8ec4733 | 1414 | msleep(10); |
49273163 JK |
1415 | return 0; |
1416 | break; | |
1417 | default: | |
1418 | rctl = E1000_READ_REG(hw, RCTL); | |
1da177e4 | 1419 | rctl |= E1000_RCTL_LBM_TCVR; |
49273163 | 1420 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 LT |
1421 | return 0; |
1422 | } | |
49273163 | 1423 | } else if (hw->media_type == e1000_media_type_copper) |
1da177e4 LT |
1424 | return e1000_set_phy_loopback(adapter); |
1425 | ||
1426 | return 7; | |
1427 | } | |
1428 | ||
1429 | static void | |
1430 | e1000_loopback_cleanup(struct e1000_adapter *adapter) | |
1431 | { | |
49273163 | 1432 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
1433 | uint32_t rctl; |
1434 | uint16_t phy_reg; | |
1435 | ||
49273163 | 1436 | rctl = E1000_READ_REG(hw, RCTL); |
1da177e4 | 1437 | rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC); |
49273163 | 1438 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 | 1439 | |
49273163 JK |
1440 | switch (hw->mac_type) { |
1441 | case e1000_82571: | |
1442 | case e1000_82572: | |
1443 | if (hw->media_type == e1000_media_type_fiber || | |
1444 | hw->media_type == e1000_media_type_internal_serdes) { | |
1445 | #define E1000_SERDES_LB_OFF 0x400 | |
1446 | E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF); | |
f8ec4733 | 1447 | msleep(10); |
49273163 JK |
1448 | break; |
1449 | } | |
1450 | /* Fall Through */ | |
1451 | case e1000_82545: | |
1452 | case e1000_82546: | |
1453 | case e1000_82545_rev_3: | |
1454 | case e1000_82546_rev_3: | |
1455 | default: | |
1456 | hw->autoneg = TRUE; | |
8fc897b0 | 1457 | if (hw->phy_type == e1000_phy_gg82563) |
87041639 JK |
1458 | e1000_write_phy_reg(hw, |
1459 | GG82563_PHY_KMRN_MODE_CTRL, | |
1460 | 0x180); | |
49273163 JK |
1461 | e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); |
1462 | if (phy_reg & MII_CR_LOOPBACK) { | |
1da177e4 | 1463 | phy_reg &= ~MII_CR_LOOPBACK; |
49273163 JK |
1464 | e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); |
1465 | e1000_phy_reset(hw); | |
1da177e4 | 1466 | } |
49273163 | 1467 | break; |
1da177e4 LT |
1468 | } |
1469 | } | |
1470 | ||
1471 | static void | |
1472 | e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size) | |
1473 | { | |
1474 | memset(skb->data, 0xFF, frame_size); | |
ce7393b9 | 1475 | frame_size &= ~1; |
1da177e4 LT |
1476 | memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1); |
1477 | memset(&skb->data[frame_size / 2 + 10], 0xBE, 1); | |
1478 | memset(&skb->data[frame_size / 2 + 12], 0xAF, 1); | |
1479 | } | |
1480 | ||
1481 | static int | |
1482 | e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size) | |
1483 | { | |
ce7393b9 | 1484 | frame_size &= ~1; |
96838a40 JB |
1485 | if (*(skb->data + 3) == 0xFF) { |
1486 | if ((*(skb->data + frame_size / 2 + 10) == 0xBE) && | |
1da177e4 LT |
1487 | (*(skb->data + frame_size / 2 + 12) == 0xAF)) { |
1488 | return 0; | |
1489 | } | |
1490 | } | |
1491 | return 13; | |
1492 | } | |
1493 | ||
1494 | static int | |
1495 | e1000_run_loopback_test(struct e1000_adapter *adapter) | |
1496 | { | |
581d708e MC |
1497 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
1498 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 | 1499 | struct pci_dev *pdev = adapter->pdev; |
e4eff729 MC |
1500 | int i, j, k, l, lc, good_cnt, ret_val=0; |
1501 | unsigned long time; | |
1da177e4 LT |
1502 | |
1503 | E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1); | |
1504 | ||
96838a40 | 1505 | /* Calculate the loop count based on the largest descriptor ring |
e4eff729 MC |
1506 | * The idea is to wrap the largest ring a number of times using 64 |
1507 | * send/receive pairs during each loop | |
1508 | */ | |
1da177e4 | 1509 | |
96838a40 | 1510 | if (rxdr->count <= txdr->count) |
e4eff729 MC |
1511 | lc = ((txdr->count / 64) * 2) + 1; |
1512 | else | |
1513 | lc = ((rxdr->count / 64) * 2) + 1; | |
1514 | ||
1515 | k = l = 0; | |
96838a40 JB |
1516 | for (j = 0; j <= lc; j++) { /* loop count loop */ |
1517 | for (i = 0; i < 64; i++) { /* send the packets */ | |
1518 | e1000_create_lbtest_frame(txdr->buffer_info[i].skb, | |
e4eff729 | 1519 | 1024); |
96838a40 | 1520 | pci_dma_sync_single_for_device(pdev, |
e4eff729 MC |
1521 | txdr->buffer_info[k].dma, |
1522 | txdr->buffer_info[k].length, | |
1523 | PCI_DMA_TODEVICE); | |
96838a40 | 1524 | if (unlikely(++k == txdr->count)) k = 0; |
e4eff729 MC |
1525 | } |
1526 | E1000_WRITE_REG(&adapter->hw, TDT, k); | |
f8ec4733 | 1527 | msleep(200); |
e4eff729 MC |
1528 | time = jiffies; /* set the start time for the receive */ |
1529 | good_cnt = 0; | |
1530 | do { /* receive the sent packets */ | |
96838a40 | 1531 | pci_dma_sync_single_for_cpu(pdev, |
e4eff729 MC |
1532 | rxdr->buffer_info[l].dma, |
1533 | rxdr->buffer_info[l].length, | |
1534 | PCI_DMA_FROMDEVICE); | |
96838a40 | 1535 | |
e4eff729 MC |
1536 | ret_val = e1000_check_lbtest_frame( |
1537 | rxdr->buffer_info[l].skb, | |
1538 | 1024); | |
96838a40 | 1539 | if (!ret_val) |
e4eff729 | 1540 | good_cnt++; |
96838a40 JB |
1541 | if (unlikely(++l == rxdr->count)) l = 0; |
1542 | /* time + 20 msecs (200 msecs on 2.4) is more than | |
1543 | * enough time to complete the receives, if it's | |
e4eff729 MC |
1544 | * exceeded, break and error off |
1545 | */ | |
1546 | } while (good_cnt < 64 && jiffies < (time + 20)); | |
96838a40 | 1547 | if (good_cnt != 64) { |
e4eff729 | 1548 | ret_val = 13; /* ret_val is the same as mis-compare */ |
96838a40 | 1549 | break; |
e4eff729 | 1550 | } |
96838a40 | 1551 | if (jiffies >= (time + 2)) { |
e4eff729 MC |
1552 | ret_val = 14; /* error code for time out error */ |
1553 | break; | |
1554 | } | |
1555 | } /* end loop count loop */ | |
1da177e4 LT |
1556 | return ret_val; |
1557 | } | |
1558 | ||
1559 | static int | |
1560 | e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data) | |
1561 | { | |
57128197 JK |
1562 | /* PHY loopback cannot be performed if SoL/IDER |
1563 | * sessions are active */ | |
1564 | if (e1000_check_phy_reset_block(&adapter->hw)) { | |
1565 | DPRINTK(DRV, ERR, "Cannot do PHY loopback test " | |
1566 | "when SoL/IDER is active.\n"); | |
1567 | *data = 0; | |
1568 | goto out; | |
1569 | } | |
1570 | ||
1571 | if ((*data = e1000_setup_desc_rings(adapter))) | |
1572 | goto out; | |
1573 | if ((*data = e1000_setup_loopback_test(adapter))) | |
1574 | goto err_loopback; | |
1da177e4 LT |
1575 | *data = e1000_run_loopback_test(adapter); |
1576 | e1000_loopback_cleanup(adapter); | |
57128197 | 1577 | |
1da177e4 | 1578 | err_loopback: |
57128197 JK |
1579 | e1000_free_desc_rings(adapter); |
1580 | out: | |
1da177e4 LT |
1581 | return *data; |
1582 | } | |
1583 | ||
1584 | static int | |
1585 | e1000_link_test(struct e1000_adapter *adapter, uint64_t *data) | |
1586 | { | |
1587 | *data = 0; | |
1da177e4 LT |
1588 | if (adapter->hw.media_type == e1000_media_type_internal_serdes) { |
1589 | int i = 0; | |
1590 | adapter->hw.serdes_link_down = TRUE; | |
1591 | ||
2648345f MC |
1592 | /* On some blade server designs, link establishment |
1593 | * could take as long as 2-3 minutes */ | |
1da177e4 LT |
1594 | do { |
1595 | e1000_check_for_link(&adapter->hw); | |
1596 | if (adapter->hw.serdes_link_down == FALSE) | |
1597 | return *data; | |
f8ec4733 | 1598 | msleep(20); |
1da177e4 LT |
1599 | } while (i++ < 3750); |
1600 | ||
2648345f | 1601 | *data = 1; |
1da177e4 LT |
1602 | } else { |
1603 | e1000_check_for_link(&adapter->hw); | |
96838a40 | 1604 | if (adapter->hw.autoneg) /* if auto_neg is set wait for it */ |
f8ec4733 | 1605 | msleep(4000); |
1da177e4 | 1606 | |
96838a40 | 1607 | if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) { |
1da177e4 LT |
1608 | *data = 1; |
1609 | } | |
1610 | } | |
1611 | return *data; | |
1612 | } | |
1613 | ||
96838a40 | 1614 | static int |
1da177e4 LT |
1615 | e1000_diag_test_count(struct net_device *netdev) |
1616 | { | |
1617 | return E1000_TEST_LEN; | |
1618 | } | |
1619 | ||
d658266e JB |
1620 | extern void e1000_power_up_phy(struct e1000_adapter *); |
1621 | ||
1da177e4 LT |
1622 | static void |
1623 | e1000_diag_test(struct net_device *netdev, | |
1624 | struct ethtool_test *eth_test, uint64_t *data) | |
1625 | { | |
60490fe0 | 1626 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1627 | boolean_t if_running = netif_running(netdev); |
1628 | ||
1314bbf3 | 1629 | set_bit(__E1000_TESTING, &adapter->flags); |
96838a40 | 1630 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { |
1da177e4 LT |
1631 | /* Offline tests */ |
1632 | ||
1633 | /* save speed, duplex, autoneg settings */ | |
1634 | uint16_t autoneg_advertised = adapter->hw.autoneg_advertised; | |
1635 | uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex; | |
1636 | uint8_t autoneg = adapter->hw.autoneg; | |
1637 | ||
d658266e JB |
1638 | DPRINTK(HW, INFO, "offline testing starting\n"); |
1639 | ||
1da177e4 LT |
1640 | /* Link test performed before hardware reset so autoneg doesn't |
1641 | * interfere with test result */ | |
96838a40 | 1642 | if (e1000_link_test(adapter, &data[4])) |
1da177e4 LT |
1643 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1644 | ||
96838a40 | 1645 | if (if_running) |
2db10a08 AK |
1646 | /* indicate we're in test mode */ |
1647 | dev_close(netdev); | |
1da177e4 LT |
1648 | else |
1649 | e1000_reset(adapter); | |
1650 | ||
96838a40 | 1651 | if (e1000_reg_test(adapter, &data[0])) |
1da177e4 LT |
1652 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1653 | ||
1654 | e1000_reset(adapter); | |
96838a40 | 1655 | if (e1000_eeprom_test(adapter, &data[1])) |
1da177e4 LT |
1656 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1657 | ||
1658 | e1000_reset(adapter); | |
96838a40 | 1659 | if (e1000_intr_test(adapter, &data[2])) |
1da177e4 LT |
1660 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1661 | ||
1662 | e1000_reset(adapter); | |
d658266e JB |
1663 | /* make sure the phy is powered up */ |
1664 | e1000_power_up_phy(adapter); | |
96838a40 | 1665 | if (e1000_loopback_test(adapter, &data[3])) |
1da177e4 LT |
1666 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1667 | ||
1668 | /* restore speed, duplex, autoneg settings */ | |
1669 | adapter->hw.autoneg_advertised = autoneg_advertised; | |
1670 | adapter->hw.forced_speed_duplex = forced_speed_duplex; | |
1671 | adapter->hw.autoneg = autoneg; | |
1672 | ||
1673 | e1000_reset(adapter); | |
1314bbf3 | 1674 | clear_bit(__E1000_TESTING, &adapter->flags); |
96838a40 | 1675 | if (if_running) |
2db10a08 | 1676 | dev_open(netdev); |
1da177e4 | 1677 | } else { |
d658266e | 1678 | DPRINTK(HW, INFO, "online testing starting\n"); |
1da177e4 | 1679 | /* Online tests */ |
96838a40 | 1680 | if (e1000_link_test(adapter, &data[4])) |
1da177e4 LT |
1681 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1682 | ||
90fb5135 | 1683 | /* Online tests aren't run; pass by default */ |
1da177e4 LT |
1684 | data[0] = 0; |
1685 | data[1] = 0; | |
1686 | data[2] = 0; | |
1687 | data[3] = 0; | |
2db10a08 | 1688 | |
1314bbf3 | 1689 | clear_bit(__E1000_TESTING, &adapter->flags); |
1da177e4 | 1690 | } |
352c9f85 | 1691 | msleep_interruptible(4 * 1000); |
1da177e4 LT |
1692 | } |
1693 | ||
120cd576 | 1694 | static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol) |
1da177e4 | 1695 | { |
1da177e4 | 1696 | struct e1000_hw *hw = &adapter->hw; |
120cd576 | 1697 | int retval = 1; /* fail by default */ |
1da177e4 | 1698 | |
120cd576 | 1699 | switch (hw->device_id) { |
dc1f71f6 | 1700 | case E1000_DEV_ID_82542: |
1da177e4 LT |
1701 | case E1000_DEV_ID_82543GC_FIBER: |
1702 | case E1000_DEV_ID_82543GC_COPPER: | |
1703 | case E1000_DEV_ID_82544EI_FIBER: | |
1704 | case E1000_DEV_ID_82546EB_QUAD_COPPER: | |
1705 | case E1000_DEV_ID_82545EM_FIBER: | |
1706 | case E1000_DEV_ID_82545EM_COPPER: | |
84916829 | 1707 | case E1000_DEV_ID_82546GB_QUAD_COPPER: |
120cd576 JB |
1708 | case E1000_DEV_ID_82546GB_PCIE: |
1709 | /* these don't support WoL at all */ | |
1da177e4 | 1710 | wol->supported = 0; |
120cd576 | 1711 | break; |
1da177e4 LT |
1712 | case E1000_DEV_ID_82546EB_FIBER: |
1713 | case E1000_DEV_ID_82546GB_FIBER: | |
b7ee49db | 1714 | case E1000_DEV_ID_82571EB_FIBER: |
120cd576 JB |
1715 | case E1000_DEV_ID_82571EB_SERDES: |
1716 | case E1000_DEV_ID_82571EB_COPPER: | |
1717 | /* Wake events not supported on port B */ | |
96838a40 | 1718 | if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) { |
1da177e4 | 1719 | wol->supported = 0; |
120cd576 | 1720 | break; |
1da177e4 | 1721 | } |
120cd576 JB |
1722 | /* return success for non excluded adapter ports */ |
1723 | retval = 0; | |
1724 | break; | |
5881cde8 | 1725 | case E1000_DEV_ID_82571EB_QUAD_COPPER: |
fc2307d0 | 1726 | case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE: |
120cd576 JB |
1727 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: |
1728 | /* quad port adapters only support WoL on port A */ | |
1729 | if (!adapter->quad_port_a) { | |
1730 | wol->supported = 0; | |
1731 | break; | |
1732 | } | |
1733 | /* return success for non excluded adapter ports */ | |
1734 | retval = 0; | |
1735 | break; | |
1da177e4 | 1736 | default: |
120cd576 JB |
1737 | /* dual port cards only support WoL on port A from now on |
1738 | * unless it was enabled in the eeprom for port B | |
1739 | * so exclude FUNC_1 ports from having WoL enabled */ | |
1740 | if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 && | |
1741 | !adapter->eeprom_wol) { | |
1742 | wol->supported = 0; | |
1743 | break; | |
1744 | } | |
84916829 | 1745 | |
120cd576 JB |
1746 | retval = 0; |
1747 | } | |
1748 | ||
1749 | return retval; | |
1750 | } | |
1751 | ||
1752 | static void | |
1753 | e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | |
1754 | { | |
1755 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1756 | ||
1757 | wol->supported = WAKE_UCAST | WAKE_MCAST | | |
1758 | WAKE_BCAST | WAKE_MAGIC; | |
1759 | wol->wolopts = 0; | |
1760 | ||
1761 | /* this function will set ->supported = 0 and return 1 if wol is not | |
1762 | * supported by this hardware */ | |
1763 | if (e1000_wol_exclusion(adapter, wol)) | |
1da177e4 | 1764 | return; |
120cd576 JB |
1765 | |
1766 | /* apply any specific unsupported masks here */ | |
1767 | switch (adapter->hw.device_id) { | |
1768 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: | |
1769 | /* KSP3 does not suppport UCAST wake-ups */ | |
1770 | wol->supported &= ~WAKE_UCAST; | |
1771 | ||
1772 | if (adapter->wol & E1000_WUFC_EX) | |
1773 | DPRINTK(DRV, ERR, "Interface does not support " | |
1774 | "directed (unicast) frame wake-up packets\n"); | |
1775 | break; | |
1776 | default: | |
1777 | break; | |
1da177e4 | 1778 | } |
120cd576 JB |
1779 | |
1780 | if (adapter->wol & E1000_WUFC_EX) | |
1781 | wol->wolopts |= WAKE_UCAST; | |
1782 | if (adapter->wol & E1000_WUFC_MC) | |
1783 | wol->wolopts |= WAKE_MCAST; | |
1784 | if (adapter->wol & E1000_WUFC_BC) | |
1785 | wol->wolopts |= WAKE_BCAST; | |
1786 | if (adapter->wol & E1000_WUFC_MAG) | |
1787 | wol->wolopts |= WAKE_MAGIC; | |
1788 | ||
1789 | return; | |
1da177e4 LT |
1790 | } |
1791 | ||
1792 | static int | |
1793 | e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | |
1794 | { | |
60490fe0 | 1795 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1796 | struct e1000_hw *hw = &adapter->hw; |
1797 | ||
120cd576 JB |
1798 | if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE)) |
1799 | return -EOPNOTSUPP; | |
1800 | ||
1801 | if (e1000_wol_exclusion(adapter, wol)) | |
1da177e4 LT |
1802 | return wol->wolopts ? -EOPNOTSUPP : 0; |
1803 | ||
120cd576 | 1804 | switch (hw->device_id) { |
84916829 | 1805 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: |
84916829 JK |
1806 | if (wol->wolopts & WAKE_UCAST) { |
1807 | DPRINTK(DRV, ERR, "Interface does not support " | |
1808 | "directed (unicast) frame wake-up packets\n"); | |
1809 | return -EOPNOTSUPP; | |
1810 | } | |
120cd576 | 1811 | break; |
1da177e4 | 1812 | default: |
120cd576 | 1813 | break; |
1da177e4 LT |
1814 | } |
1815 | ||
120cd576 JB |
1816 | /* these settings will always override what we currently have */ |
1817 | adapter->wol = 0; | |
1818 | ||
1819 | if (wol->wolopts & WAKE_UCAST) | |
1820 | adapter->wol |= E1000_WUFC_EX; | |
1821 | if (wol->wolopts & WAKE_MCAST) | |
1822 | adapter->wol |= E1000_WUFC_MC; | |
1823 | if (wol->wolopts & WAKE_BCAST) | |
1824 | adapter->wol |= E1000_WUFC_BC; | |
1825 | if (wol->wolopts & WAKE_MAGIC) | |
1826 | adapter->wol |= E1000_WUFC_MAG; | |
1827 | ||
1da177e4 LT |
1828 | return 0; |
1829 | } | |
1830 | ||
1831 | /* toggle LED 4 times per second = 2 "blinks" per second */ | |
1832 | #define E1000_ID_INTERVAL (HZ/4) | |
1833 | ||
1834 | /* bit defines for adapter->led_status */ | |
1835 | #define E1000_LED_ON 0 | |
1836 | ||
1837 | static void | |
1838 | e1000_led_blink_callback(unsigned long data) | |
1839 | { | |
1840 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
1841 | ||
96838a40 | 1842 | if (test_and_change_bit(E1000_LED_ON, &adapter->led_status)) |
1da177e4 LT |
1843 | e1000_led_off(&adapter->hw); |
1844 | else | |
1845 | e1000_led_on(&adapter->hw); | |
1846 | ||
1847 | mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL); | |
1848 | } | |
1849 | ||
1850 | static int | |
1851 | e1000_phys_id(struct net_device *netdev, uint32_t data) | |
1852 | { | |
60490fe0 | 1853 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 1854 | |
96838a40 | 1855 | if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ)) |
1da177e4 LT |
1856 | data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ); |
1857 | ||
96838a40 JB |
1858 | if (adapter->hw.mac_type < e1000_82571) { |
1859 | if (!adapter->blink_timer.function) { | |
d439d4b7 MC |
1860 | init_timer(&adapter->blink_timer); |
1861 | adapter->blink_timer.function = e1000_led_blink_callback; | |
1862 | adapter->blink_timer.data = (unsigned long) adapter; | |
1863 | } | |
1864 | e1000_setup_led(&adapter->hw); | |
1865 | mod_timer(&adapter->blink_timer, jiffies); | |
1866 | msleep_interruptible(data * 1000); | |
1867 | del_timer_sync(&adapter->blink_timer); | |
cd94dd0b AK |
1868 | } else if (adapter->hw.phy_type == e1000_phy_ife) { |
1869 | if (!adapter->blink_timer.function) { | |
1870 | init_timer(&adapter->blink_timer); | |
1871 | adapter->blink_timer.function = e1000_led_blink_callback; | |
1872 | adapter->blink_timer.data = (unsigned long) adapter; | |
1873 | } | |
1874 | mod_timer(&adapter->blink_timer, jiffies); | |
d8c2bd3d | 1875 | msleep_interruptible(data * 1000); |
cd94dd0b AK |
1876 | del_timer_sync(&adapter->blink_timer); |
1877 | e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0); | |
d8c2bd3d | 1878 | } else { |
f1b3a853 | 1879 | e1000_blink_led_start(&adapter->hw); |
d439d4b7 | 1880 | msleep_interruptible(data * 1000); |
1da177e4 LT |
1881 | } |
1882 | ||
1da177e4 LT |
1883 | e1000_led_off(&adapter->hw); |
1884 | clear_bit(E1000_LED_ON, &adapter->led_status); | |
1885 | e1000_cleanup_led(&adapter->hw); | |
1886 | ||
1887 | return 0; | |
1888 | } | |
1889 | ||
1890 | static int | |
1891 | e1000_nway_reset(struct net_device *netdev) | |
1892 | { | |
60490fe0 | 1893 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2db10a08 AK |
1894 | if (netif_running(netdev)) |
1895 | e1000_reinit_locked(adapter); | |
1da177e4 LT |
1896 | return 0; |
1897 | } | |
1898 | ||
96838a40 | 1899 | static int |
1da177e4 LT |
1900 | e1000_get_stats_count(struct net_device *netdev) |
1901 | { | |
1902 | return E1000_STATS_LEN; | |
1903 | } | |
1904 | ||
96838a40 JB |
1905 | static void |
1906 | e1000_get_ethtool_stats(struct net_device *netdev, | |
1da177e4 LT |
1907 | struct ethtool_stats *stats, uint64_t *data) |
1908 | { | |
60490fe0 | 1909 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1910 | int i; |
1911 | ||
1912 | e1000_update_stats(adapter); | |
7bfa4816 JK |
1913 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { |
1914 | char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset; | |
1915 | data[i] = (e1000_gstrings_stats[i].sizeof_stat == | |
1da177e4 LT |
1916 | sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p; |
1917 | } | |
7bfa4816 | 1918 | /* BUG_ON(i != E1000_STATS_LEN); */ |
1da177e4 LT |
1919 | } |
1920 | ||
96838a40 | 1921 | static void |
1da177e4 LT |
1922 | e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data) |
1923 | { | |
7bfa4816 | 1924 | uint8_t *p = data; |
1da177e4 LT |
1925 | int i; |
1926 | ||
96838a40 | 1927 | switch (stringset) { |
1da177e4 | 1928 | case ETH_SS_TEST: |
96838a40 | 1929 | memcpy(data, *e1000_gstrings_test, |
1da177e4 LT |
1930 | E1000_TEST_LEN*ETH_GSTRING_LEN); |
1931 | break; | |
1932 | case ETH_SS_STATS: | |
7bfa4816 JK |
1933 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { |
1934 | memcpy(p, e1000_gstrings_stats[i].stat_string, | |
1935 | ETH_GSTRING_LEN); | |
1936 | p += ETH_GSTRING_LEN; | |
1937 | } | |
7bfa4816 | 1938 | /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */ |
1da177e4 LT |
1939 | break; |
1940 | } | |
1941 | } | |
1942 | ||
7282d491 | 1943 | static const struct ethtool_ops e1000_ethtool_ops = { |
1da177e4 LT |
1944 | .get_settings = e1000_get_settings, |
1945 | .set_settings = e1000_set_settings, | |
1946 | .get_drvinfo = e1000_get_drvinfo, | |
1947 | .get_regs_len = e1000_get_regs_len, | |
1948 | .get_regs = e1000_get_regs, | |
1949 | .get_wol = e1000_get_wol, | |
1950 | .set_wol = e1000_set_wol, | |
8fc897b0 AK |
1951 | .get_msglevel = e1000_get_msglevel, |
1952 | .set_msglevel = e1000_set_msglevel, | |
1da177e4 LT |
1953 | .nway_reset = e1000_nway_reset, |
1954 | .get_link = ethtool_op_get_link, | |
1955 | .get_eeprom_len = e1000_get_eeprom_len, | |
1956 | .get_eeprom = e1000_get_eeprom, | |
1957 | .set_eeprom = e1000_set_eeprom, | |
1958 | .get_ringparam = e1000_get_ringparam, | |
1959 | .set_ringparam = e1000_set_ringparam, | |
8fc897b0 AK |
1960 | .get_pauseparam = e1000_get_pauseparam, |
1961 | .set_pauseparam = e1000_set_pauseparam, | |
1962 | .get_rx_csum = e1000_get_rx_csum, | |
1963 | .set_rx_csum = e1000_set_rx_csum, | |
1964 | .get_tx_csum = e1000_get_tx_csum, | |
1965 | .set_tx_csum = e1000_set_tx_csum, | |
1966 | .get_sg = ethtool_op_get_sg, | |
1967 | .set_sg = ethtool_op_set_sg, | |
8fc897b0 AK |
1968 | .get_tso = ethtool_op_get_tso, |
1969 | .set_tso = e1000_set_tso, | |
1da177e4 LT |
1970 | .self_test_count = e1000_diag_test_count, |
1971 | .self_test = e1000_diag_test, | |
1972 | .get_strings = e1000_get_strings, | |
1973 | .phys_id = e1000_phys_id, | |
1974 | .get_stats_count = e1000_get_stats_count, | |
1975 | .get_ethtool_stats = e1000_get_ethtool_stats, | |
8fc897b0 | 1976 | .get_perm_addr = ethtool_op_get_perm_addr, |
1da177e4 LT |
1977 | }; |
1978 | ||
1979 | void e1000_set_ethtool_ops(struct net_device *netdev) | |
1980 | { | |
1981 | SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops); | |
1982 | } |