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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
3 | ||
2648345f | 4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. |
1da177e4 LT |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 2 of the License, or (at your option) | |
9 | any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License along with | |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | ||
20 | The full GNU General Public License is included in this distribution in the | |
21 | file called LICENSE. | |
22 | ||
23 | Contact Information: | |
24 | Linux NICS <linux.nics@intel.com> | |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | /* ethtool support for e1000 */ | |
30 | ||
31 | #include "e1000.h" | |
32 | ||
33 | #include <asm/uaccess.h> | |
34 | ||
35 | extern char e1000_driver_name[]; | |
36 | extern char e1000_driver_version[]; | |
37 | ||
38 | extern int e1000_up(struct e1000_adapter *adapter); | |
39 | extern void e1000_down(struct e1000_adapter *adapter); | |
40 | extern void e1000_reset(struct e1000_adapter *adapter); | |
41 | extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); | |
581d708e MC |
42 | extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); |
43 | extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); | |
44 | extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | |
45 | extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | |
1da177e4 LT |
46 | extern void e1000_update_stats(struct e1000_adapter *adapter); |
47 | ||
48 | struct e1000_stats { | |
49 | char stat_string[ETH_GSTRING_LEN]; | |
50 | int sizeof_stat; | |
51 | int stat_offset; | |
52 | }; | |
53 | ||
54 | #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \ | |
55 | offsetof(struct e1000_adapter, m) | |
56 | static const struct e1000_stats e1000_gstrings_stats[] = { | |
57 | { "rx_packets", E1000_STAT(net_stats.rx_packets) }, | |
58 | { "tx_packets", E1000_STAT(net_stats.tx_packets) }, | |
59 | { "rx_bytes", E1000_STAT(net_stats.rx_bytes) }, | |
60 | { "tx_bytes", E1000_STAT(net_stats.tx_bytes) }, | |
61 | { "rx_errors", E1000_STAT(net_stats.rx_errors) }, | |
62 | { "tx_errors", E1000_STAT(net_stats.tx_errors) }, | |
63 | { "rx_dropped", E1000_STAT(net_stats.rx_dropped) }, | |
64 | { "tx_dropped", E1000_STAT(net_stats.tx_dropped) }, | |
65 | { "multicast", E1000_STAT(net_stats.multicast) }, | |
66 | { "collisions", E1000_STAT(net_stats.collisions) }, | |
67 | { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) }, | |
68 | { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) }, | |
69 | { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) }, | |
70 | { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) }, | |
71 | { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) }, | |
2648345f | 72 | { "rx_no_buffer_count", E1000_STAT(stats.rnbc) }, |
1da177e4 LT |
73 | { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) }, |
74 | { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) }, | |
75 | { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) }, | |
76 | { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) }, | |
77 | { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) }, | |
78 | { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) }, | |
79 | { "tx_abort_late_coll", E1000_STAT(stats.latecol) }, | |
80 | { "tx_deferred_ok", E1000_STAT(stats.dc) }, | |
81 | { "tx_single_coll_ok", E1000_STAT(stats.scc) }, | |
82 | { "tx_multi_coll_ok", E1000_STAT(stats.mcc) }, | |
6b7660cd | 83 | { "tx_timeout_count", E1000_STAT(tx_timeout_count) }, |
1da177e4 LT |
84 | { "rx_long_length_errors", E1000_STAT(stats.roc) }, |
85 | { "rx_short_length_errors", E1000_STAT(stats.ruc) }, | |
86 | { "rx_align_errors", E1000_STAT(stats.algnerrc) }, | |
87 | { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) }, | |
88 | { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) }, | |
89 | { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) }, | |
90 | { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) }, | |
91 | { "tx_flow_control_xon", E1000_STAT(stats.xontxc) }, | |
92 | { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) }, | |
93 | { "rx_long_byte_count", E1000_STAT(stats.gorcl) }, | |
94 | { "rx_csum_offload_good", E1000_STAT(hw_csum_good) }, | |
e4c811c9 MC |
95 | { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }, |
96 | { "rx_header_split", E1000_STAT(rx_hdr_split) }, | |
6b7660cd | 97 | { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) }, |
1da177e4 | 98 | }; |
7bfa4816 JK |
99 | |
100 | #ifdef CONFIG_E1000_MQ | |
101 | #define E1000_QUEUE_STATS_LEN \ | |
102 | (((struct e1000_adapter *)netdev->priv)->num_tx_queues + \ | |
103 | ((struct e1000_adapter *)netdev->priv)->num_rx_queues) \ | |
104 | * (sizeof(struct e1000_queue_stats) / sizeof(uint64_t)) | |
105 | #else | |
106 | #define E1000_QUEUE_STATS_LEN 0 | |
107 | #endif | |
108 | #define E1000_GLOBAL_STATS_LEN \ | |
1da177e4 | 109 | sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats) |
7bfa4816 | 110 | #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN) |
1da177e4 LT |
111 | static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = { |
112 | "Register test (offline)", "Eeprom test (offline)", | |
113 | "Interrupt test (offline)", "Loopback test (offline)", | |
114 | "Link test (on/offline)" | |
115 | }; | |
116 | #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN | |
117 | ||
118 | static int | |
119 | e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |
120 | { | |
60490fe0 | 121 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
122 | struct e1000_hw *hw = &adapter->hw; |
123 | ||
124 | if(hw->media_type == e1000_media_type_copper) { | |
125 | ||
126 | ecmd->supported = (SUPPORTED_10baseT_Half | | |
127 | SUPPORTED_10baseT_Full | | |
128 | SUPPORTED_100baseT_Half | | |
129 | SUPPORTED_100baseT_Full | | |
130 | SUPPORTED_1000baseT_Full| | |
131 | SUPPORTED_Autoneg | | |
132 | SUPPORTED_TP); | |
133 | ||
134 | ecmd->advertising = ADVERTISED_TP; | |
135 | ||
136 | if(hw->autoneg == 1) { | |
137 | ecmd->advertising |= ADVERTISED_Autoneg; | |
138 | ||
139 | /* the e1000 autoneg seems to match ethtool nicely */ | |
140 | ||
141 | ecmd->advertising |= hw->autoneg_advertised; | |
142 | } | |
143 | ||
144 | ecmd->port = PORT_TP; | |
145 | ecmd->phy_address = hw->phy_addr; | |
146 | ||
147 | if(hw->mac_type == e1000_82543) | |
148 | ecmd->transceiver = XCVR_EXTERNAL; | |
149 | else | |
150 | ecmd->transceiver = XCVR_INTERNAL; | |
151 | ||
152 | } else { | |
153 | ecmd->supported = (SUPPORTED_1000baseT_Full | | |
154 | SUPPORTED_FIBRE | | |
155 | SUPPORTED_Autoneg); | |
156 | ||
012609a8 MC |
157 | ecmd->advertising = (ADVERTISED_1000baseT_Full | |
158 | ADVERTISED_FIBRE | | |
159 | ADVERTISED_Autoneg); | |
1da177e4 LT |
160 | |
161 | ecmd->port = PORT_FIBRE; | |
162 | ||
163 | if(hw->mac_type >= e1000_82545) | |
164 | ecmd->transceiver = XCVR_INTERNAL; | |
165 | else | |
166 | ecmd->transceiver = XCVR_EXTERNAL; | |
167 | } | |
168 | ||
169 | if(netif_carrier_ok(adapter->netdev)) { | |
170 | ||
171 | e1000_get_speed_and_duplex(hw, &adapter->link_speed, | |
172 | &adapter->link_duplex); | |
173 | ecmd->speed = adapter->link_speed; | |
174 | ||
175 | /* unfortunatly FULL_DUPLEX != DUPLEX_FULL | |
176 | * and HALF_DUPLEX != DUPLEX_HALF */ | |
177 | ||
178 | if(adapter->link_duplex == FULL_DUPLEX) | |
179 | ecmd->duplex = DUPLEX_FULL; | |
180 | else | |
181 | ecmd->duplex = DUPLEX_HALF; | |
182 | } else { | |
183 | ecmd->speed = -1; | |
184 | ecmd->duplex = -1; | |
185 | } | |
186 | ||
187 | ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) || | |
188 | hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE; | |
189 | return 0; | |
190 | } | |
191 | ||
192 | static int | |
193 | e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |
194 | { | |
60490fe0 | 195 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
196 | struct e1000_hw *hw = &adapter->hw; |
197 | ||
57128197 JK |
198 | /* When SoL/IDER sessions are active, autoneg/speed/duplex |
199 | * cannot be changed */ | |
200 | if (e1000_check_phy_reset_block(hw)) { | |
201 | DPRINTK(DRV, ERR, "Cannot change link characteristics " | |
202 | "when SoL/IDER is active.\n"); | |
203 | return -EINVAL; | |
204 | } | |
205 | ||
206 | if (ecmd->autoneg == AUTONEG_ENABLE) { | |
1da177e4 | 207 | hw->autoneg = 1; |
012609a8 MC |
208 | if(hw->media_type == e1000_media_type_fiber) |
209 | hw->autoneg_advertised = ADVERTISED_1000baseT_Full | | |
210 | ADVERTISED_FIBRE | | |
211 | ADVERTISED_Autoneg; | |
212 | else | |
213 | hw->autoneg_advertised = ADVERTISED_10baseT_Half | | |
214 | ADVERTISED_10baseT_Full | | |
215 | ADVERTISED_100baseT_Half | | |
216 | ADVERTISED_100baseT_Full | | |
217 | ADVERTISED_1000baseT_Full| | |
218 | ADVERTISED_Autoneg | | |
219 | ADVERTISED_TP; | |
220 | ecmd->advertising = hw->autoneg_advertised; | |
1da177e4 LT |
221 | } else |
222 | if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) | |
223 | return -EINVAL; | |
224 | ||
225 | /* reset the link */ | |
226 | ||
227 | if(netif_running(adapter->netdev)) { | |
228 | e1000_down(adapter); | |
229 | e1000_reset(adapter); | |
230 | e1000_up(adapter); | |
231 | } else | |
232 | e1000_reset(adapter); | |
233 | ||
234 | return 0; | |
235 | } | |
236 | ||
237 | static void | |
238 | e1000_get_pauseparam(struct net_device *netdev, | |
239 | struct ethtool_pauseparam *pause) | |
240 | { | |
60490fe0 | 241 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
242 | struct e1000_hw *hw = &adapter->hw; |
243 | ||
244 | pause->autoneg = | |
245 | (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE); | |
246 | ||
247 | if(hw->fc == e1000_fc_rx_pause) | |
248 | pause->rx_pause = 1; | |
249 | else if(hw->fc == e1000_fc_tx_pause) | |
250 | pause->tx_pause = 1; | |
251 | else if(hw->fc == e1000_fc_full) { | |
252 | pause->rx_pause = 1; | |
253 | pause->tx_pause = 1; | |
254 | } | |
255 | } | |
256 | ||
257 | static int | |
258 | e1000_set_pauseparam(struct net_device *netdev, | |
259 | struct ethtool_pauseparam *pause) | |
260 | { | |
60490fe0 | 261 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
262 | struct e1000_hw *hw = &adapter->hw; |
263 | ||
264 | adapter->fc_autoneg = pause->autoneg; | |
265 | ||
266 | if(pause->rx_pause && pause->tx_pause) | |
267 | hw->fc = e1000_fc_full; | |
268 | else if(pause->rx_pause && !pause->tx_pause) | |
269 | hw->fc = e1000_fc_rx_pause; | |
270 | else if(!pause->rx_pause && pause->tx_pause) | |
271 | hw->fc = e1000_fc_tx_pause; | |
272 | else if(!pause->rx_pause && !pause->tx_pause) | |
273 | hw->fc = e1000_fc_none; | |
274 | ||
275 | hw->original_fc = hw->fc; | |
276 | ||
277 | if(adapter->fc_autoneg == AUTONEG_ENABLE) { | |
278 | if(netif_running(adapter->netdev)) { | |
279 | e1000_down(adapter); | |
280 | e1000_up(adapter); | |
281 | } else | |
282 | e1000_reset(adapter); | |
283 | } | |
284 | else | |
285 | return ((hw->media_type == e1000_media_type_fiber) ? | |
286 | e1000_setup_link(hw) : e1000_force_mac_fc(hw)); | |
287 | ||
288 | return 0; | |
289 | } | |
290 | ||
291 | static uint32_t | |
292 | e1000_get_rx_csum(struct net_device *netdev) | |
293 | { | |
60490fe0 | 294 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
295 | return adapter->rx_csum; |
296 | } | |
297 | ||
298 | static int | |
299 | e1000_set_rx_csum(struct net_device *netdev, uint32_t data) | |
300 | { | |
60490fe0 | 301 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
302 | adapter->rx_csum = data; |
303 | ||
304 | if(netif_running(netdev)) { | |
305 | e1000_down(adapter); | |
306 | e1000_up(adapter); | |
307 | } else | |
308 | e1000_reset(adapter); | |
309 | return 0; | |
310 | } | |
311 | ||
312 | static uint32_t | |
313 | e1000_get_tx_csum(struct net_device *netdev) | |
314 | { | |
315 | return (netdev->features & NETIF_F_HW_CSUM) != 0; | |
316 | } | |
317 | ||
318 | static int | |
319 | e1000_set_tx_csum(struct net_device *netdev, uint32_t data) | |
320 | { | |
60490fe0 | 321 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
322 | |
323 | if(adapter->hw.mac_type < e1000_82543) { | |
324 | if (!data) | |
325 | return -EINVAL; | |
326 | return 0; | |
327 | } | |
328 | ||
329 | if (data) | |
330 | netdev->features |= NETIF_F_HW_CSUM; | |
331 | else | |
332 | netdev->features &= ~NETIF_F_HW_CSUM; | |
333 | ||
334 | return 0; | |
335 | } | |
336 | ||
337 | #ifdef NETIF_F_TSO | |
338 | static int | |
339 | e1000_set_tso(struct net_device *netdev, uint32_t data) | |
340 | { | |
60490fe0 MC |
341 | struct e1000_adapter *adapter = netdev_priv(netdev); |
342 | if((adapter->hw.mac_type < e1000_82544) || | |
1da177e4 LT |
343 | (adapter->hw.mac_type == e1000_82547)) |
344 | return data ? -EINVAL : 0; | |
345 | ||
346 | if (data) | |
347 | netdev->features |= NETIF_F_TSO; | |
348 | else | |
349 | netdev->features &= ~NETIF_F_TSO; | |
350 | return 0; | |
351 | } | |
352 | #endif /* NETIF_F_TSO */ | |
353 | ||
354 | static uint32_t | |
355 | e1000_get_msglevel(struct net_device *netdev) | |
356 | { | |
60490fe0 | 357 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
358 | return adapter->msg_enable; |
359 | } | |
360 | ||
361 | static void | |
362 | e1000_set_msglevel(struct net_device *netdev, uint32_t data) | |
363 | { | |
60490fe0 | 364 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
365 | adapter->msg_enable = data; |
366 | } | |
367 | ||
368 | static int | |
369 | e1000_get_regs_len(struct net_device *netdev) | |
370 | { | |
371 | #define E1000_REGS_LEN 32 | |
372 | return E1000_REGS_LEN * sizeof(uint32_t); | |
373 | } | |
374 | ||
375 | static void | |
376 | e1000_get_regs(struct net_device *netdev, | |
377 | struct ethtool_regs *regs, void *p) | |
378 | { | |
60490fe0 | 379 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
380 | struct e1000_hw *hw = &adapter->hw; |
381 | uint32_t *regs_buff = p; | |
382 | uint16_t phy_data; | |
383 | ||
384 | memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t)); | |
385 | ||
386 | regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id; | |
387 | ||
388 | regs_buff[0] = E1000_READ_REG(hw, CTRL); | |
389 | regs_buff[1] = E1000_READ_REG(hw, STATUS); | |
390 | ||
391 | regs_buff[2] = E1000_READ_REG(hw, RCTL); | |
392 | regs_buff[3] = E1000_READ_REG(hw, RDLEN); | |
393 | regs_buff[4] = E1000_READ_REG(hw, RDH); | |
394 | regs_buff[5] = E1000_READ_REG(hw, RDT); | |
395 | regs_buff[6] = E1000_READ_REG(hw, RDTR); | |
396 | ||
397 | regs_buff[7] = E1000_READ_REG(hw, TCTL); | |
398 | regs_buff[8] = E1000_READ_REG(hw, TDLEN); | |
399 | regs_buff[9] = E1000_READ_REG(hw, TDH); | |
400 | regs_buff[10] = E1000_READ_REG(hw, TDT); | |
401 | regs_buff[11] = E1000_READ_REG(hw, TIDV); | |
402 | ||
403 | regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */ | |
404 | if(hw->phy_type == e1000_phy_igp) { | |
405 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, | |
406 | IGP01E1000_PHY_AGC_A); | |
407 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A & | |
408 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
409 | regs_buff[13] = (uint32_t)phy_data; /* cable length */ | |
410 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, | |
411 | IGP01E1000_PHY_AGC_B); | |
412 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B & | |
413 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
414 | regs_buff[14] = (uint32_t)phy_data; /* cable length */ | |
415 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, | |
416 | IGP01E1000_PHY_AGC_C); | |
417 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C & | |
418 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
419 | regs_buff[15] = (uint32_t)phy_data; /* cable length */ | |
420 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, | |
421 | IGP01E1000_PHY_AGC_D); | |
422 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D & | |
423 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
424 | regs_buff[16] = (uint32_t)phy_data; /* cable length */ | |
425 | regs_buff[17] = 0; /* extended 10bt distance (not needed) */ | |
426 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0); | |
427 | e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS & | |
428 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
429 | regs_buff[18] = (uint32_t)phy_data; /* cable polarity */ | |
430 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, | |
431 | IGP01E1000_PHY_PCS_INIT_REG); | |
432 | e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG & | |
433 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
434 | regs_buff[19] = (uint32_t)phy_data; /* cable polarity */ | |
435 | regs_buff[20] = 0; /* polarity correction enabled (always) */ | |
436 | regs_buff[22] = 0; /* phy receive errors (unavailable) */ | |
437 | regs_buff[23] = regs_buff[18]; /* mdix mode */ | |
438 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0); | |
439 | } else { | |
440 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); | |
441 | regs_buff[13] = (uint32_t)phy_data; /* cable length */ | |
442 | regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
443 | regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
444 | regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
445 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); | |
446 | regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */ | |
447 | regs_buff[18] = regs_buff[13]; /* cable polarity */ | |
448 | regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
449 | regs_buff[20] = regs_buff[17]; /* polarity correction */ | |
450 | /* phy receive errors */ | |
451 | regs_buff[22] = adapter->phy_stats.receive_errors; | |
452 | regs_buff[23] = regs_buff[13]; /* mdix mode */ | |
453 | } | |
454 | regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */ | |
455 | e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data); | |
456 | regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */ | |
457 | regs_buff[25] = regs_buff[24]; /* phy remote receiver status */ | |
458 | if(hw->mac_type >= e1000_82540 && | |
459 | hw->media_type == e1000_media_type_copper) { | |
460 | regs_buff[26] = E1000_READ_REG(hw, MANC); | |
461 | } | |
462 | } | |
463 | ||
464 | static int | |
465 | e1000_get_eeprom_len(struct net_device *netdev) | |
466 | { | |
60490fe0 | 467 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
468 | return adapter->hw.eeprom.word_size * 2; |
469 | } | |
470 | ||
471 | static int | |
472 | e1000_get_eeprom(struct net_device *netdev, | |
473 | struct ethtool_eeprom *eeprom, uint8_t *bytes) | |
474 | { | |
60490fe0 | 475 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
476 | struct e1000_hw *hw = &adapter->hw; |
477 | uint16_t *eeprom_buff; | |
478 | int first_word, last_word; | |
479 | int ret_val = 0; | |
480 | uint16_t i; | |
481 | ||
482 | if(eeprom->len == 0) | |
483 | return -EINVAL; | |
484 | ||
485 | eeprom->magic = hw->vendor_id | (hw->device_id << 16); | |
486 | ||
487 | first_word = eeprom->offset >> 1; | |
488 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
489 | ||
490 | eeprom_buff = kmalloc(sizeof(uint16_t) * | |
491 | (last_word - first_word + 1), GFP_KERNEL); | |
492 | if(!eeprom_buff) | |
493 | return -ENOMEM; | |
494 | ||
495 | if(hw->eeprom.type == e1000_eeprom_spi) | |
496 | ret_val = e1000_read_eeprom(hw, first_word, | |
497 | last_word - first_word + 1, | |
498 | eeprom_buff); | |
499 | else { | |
500 | for (i = 0; i < last_word - first_word + 1; i++) | |
501 | if((ret_val = e1000_read_eeprom(hw, first_word + i, 1, | |
502 | &eeprom_buff[i]))) | |
503 | break; | |
504 | } | |
505 | ||
506 | /* Device's eeprom is always little-endian, word addressable */ | |
507 | for (i = 0; i < last_word - first_word + 1; i++) | |
508 | le16_to_cpus(&eeprom_buff[i]); | |
509 | ||
510 | memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1), | |
511 | eeprom->len); | |
512 | kfree(eeprom_buff); | |
513 | ||
514 | return ret_val; | |
515 | } | |
516 | ||
517 | static int | |
518 | e1000_set_eeprom(struct net_device *netdev, | |
519 | struct ethtool_eeprom *eeprom, uint8_t *bytes) | |
520 | { | |
60490fe0 | 521 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
522 | struct e1000_hw *hw = &adapter->hw; |
523 | uint16_t *eeprom_buff; | |
524 | void *ptr; | |
525 | int max_len, first_word, last_word, ret_val = 0; | |
526 | uint16_t i; | |
527 | ||
528 | if(eeprom->len == 0) | |
529 | return -EOPNOTSUPP; | |
530 | ||
531 | if(eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) | |
532 | return -EFAULT; | |
533 | ||
534 | max_len = hw->eeprom.word_size * 2; | |
535 | ||
536 | first_word = eeprom->offset >> 1; | |
537 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
538 | eeprom_buff = kmalloc(max_len, GFP_KERNEL); | |
539 | if(!eeprom_buff) | |
540 | return -ENOMEM; | |
541 | ||
542 | ptr = (void *)eeprom_buff; | |
543 | ||
544 | if(eeprom->offset & 1) { | |
545 | /* need read/modify/write of first changed EEPROM word */ | |
546 | /* only the second byte of the word is being modified */ | |
547 | ret_val = e1000_read_eeprom(hw, first_word, 1, | |
548 | &eeprom_buff[0]); | |
549 | ptr++; | |
550 | } | |
551 | if(((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) { | |
552 | /* need read/modify/write of last changed EEPROM word */ | |
553 | /* only the first byte of the word is being modified */ | |
554 | ret_val = e1000_read_eeprom(hw, last_word, 1, | |
555 | &eeprom_buff[last_word - first_word]); | |
556 | } | |
557 | ||
558 | /* Device's eeprom is always little-endian, word addressable */ | |
559 | for (i = 0; i < last_word - first_word + 1; i++) | |
560 | le16_to_cpus(&eeprom_buff[i]); | |
561 | ||
562 | memcpy(ptr, bytes, eeprom->len); | |
563 | ||
564 | for (i = 0; i < last_word - first_word + 1; i++) | |
565 | eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]); | |
566 | ||
567 | ret_val = e1000_write_eeprom(hw, first_word, | |
568 | last_word - first_word + 1, eeprom_buff); | |
569 | ||
a7990ba6 MC |
570 | /* Update the checksum over the first part of the EEPROM if needed |
571 | * and flush shadow RAM for 82573 conrollers */ | |
572 | if((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) || | |
573 | (hw->mac_type == e1000_82573))) | |
1da177e4 LT |
574 | e1000_update_eeprom_checksum(hw); |
575 | ||
576 | kfree(eeprom_buff); | |
577 | return ret_val; | |
578 | } | |
579 | ||
580 | static void | |
581 | e1000_get_drvinfo(struct net_device *netdev, | |
582 | struct ethtool_drvinfo *drvinfo) | |
583 | { | |
60490fe0 | 584 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
585 | |
586 | strncpy(drvinfo->driver, e1000_driver_name, 32); | |
587 | strncpy(drvinfo->version, e1000_driver_version, 32); | |
57128197 | 588 | strncpy(drvinfo->fw_version, "N/A", 32); |
1da177e4 LT |
589 | strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32); |
590 | drvinfo->n_stats = E1000_STATS_LEN; | |
591 | drvinfo->testinfo_len = E1000_TEST_LEN; | |
592 | drvinfo->regdump_len = e1000_get_regs_len(netdev); | |
593 | drvinfo->eedump_len = e1000_get_eeprom_len(netdev); | |
594 | } | |
595 | ||
596 | static void | |
597 | e1000_get_ringparam(struct net_device *netdev, | |
598 | struct ethtool_ringparam *ring) | |
599 | { | |
60490fe0 | 600 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 601 | e1000_mac_type mac_type = adapter->hw.mac_type; |
581d708e MC |
602 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
603 | struct e1000_rx_ring *rxdr = adapter->rx_ring; | |
1da177e4 LT |
604 | |
605 | ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD : | |
606 | E1000_MAX_82544_RXD; | |
607 | ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD : | |
608 | E1000_MAX_82544_TXD; | |
609 | ring->rx_mini_max_pending = 0; | |
610 | ring->rx_jumbo_max_pending = 0; | |
611 | ring->rx_pending = rxdr->count; | |
612 | ring->tx_pending = txdr->count; | |
613 | ring->rx_mini_pending = 0; | |
614 | ring->rx_jumbo_pending = 0; | |
615 | } | |
616 | ||
617 | static int | |
618 | e1000_set_ringparam(struct net_device *netdev, | |
619 | struct ethtool_ringparam *ring) | |
620 | { | |
60490fe0 | 621 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 622 | e1000_mac_type mac_type = adapter->hw.mac_type; |
581d708e MC |
623 | struct e1000_tx_ring *txdr, *tx_old, *tx_new; |
624 | struct e1000_rx_ring *rxdr, *rx_old, *rx_new; | |
625 | int i, err, tx_ring_size, rx_ring_size; | |
626 | ||
f56799ea JK |
627 | tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues; |
628 | rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues; | |
581d708e MC |
629 | |
630 | if (netif_running(adapter->netdev)) | |
631 | e1000_down(adapter); | |
1da177e4 LT |
632 | |
633 | tx_old = adapter->tx_ring; | |
634 | rx_old = adapter->rx_ring; | |
635 | ||
581d708e MC |
636 | adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL); |
637 | if (!adapter->tx_ring) { | |
638 | err = -ENOMEM; | |
639 | goto err_setup_rx; | |
640 | } | |
641 | memset(adapter->tx_ring, 0, tx_ring_size); | |
642 | ||
643 | adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL); | |
644 | if (!adapter->rx_ring) { | |
645 | kfree(adapter->tx_ring); | |
646 | err = -ENOMEM; | |
647 | goto err_setup_rx; | |
648 | } | |
649 | memset(adapter->rx_ring, 0, rx_ring_size); | |
650 | ||
651 | txdr = adapter->tx_ring; | |
652 | rxdr = adapter->rx_ring; | |
653 | ||
2648345f | 654 | if((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) |
1da177e4 LT |
655 | return -EINVAL; |
656 | ||
1da177e4 LT |
657 | rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD); |
658 | rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ? | |
659 | E1000_MAX_RXD : E1000_MAX_82544_RXD)); | |
660 | E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE); | |
661 | ||
662 | txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD); | |
663 | txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ? | |
664 | E1000_MAX_TXD : E1000_MAX_82544_TXD)); | |
665 | E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE); | |
666 | ||
f56799ea | 667 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 668 | txdr[i].count = txdr->count; |
f56799ea | 669 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 670 | rxdr[i].count = rxdr->count; |
581d708e | 671 | |
1da177e4 LT |
672 | if(netif_running(adapter->netdev)) { |
673 | /* Try to get new resources before deleting old */ | |
581d708e | 674 | if ((err = e1000_setup_all_rx_resources(adapter))) |
1da177e4 | 675 | goto err_setup_rx; |
581d708e | 676 | if ((err = e1000_setup_all_tx_resources(adapter))) |
1da177e4 LT |
677 | goto err_setup_tx; |
678 | ||
679 | /* save the new, restore the old in order to free it, | |
680 | * then restore the new back again */ | |
681 | ||
682 | rx_new = adapter->rx_ring; | |
683 | tx_new = adapter->tx_ring; | |
684 | adapter->rx_ring = rx_old; | |
685 | adapter->tx_ring = tx_old; | |
581d708e MC |
686 | e1000_free_all_rx_resources(adapter); |
687 | e1000_free_all_tx_resources(adapter); | |
688 | kfree(tx_old); | |
689 | kfree(rx_old); | |
1da177e4 LT |
690 | adapter->rx_ring = rx_new; |
691 | adapter->tx_ring = tx_new; | |
692 | if((err = e1000_up(adapter))) | |
693 | return err; | |
694 | } | |
695 | ||
696 | return 0; | |
697 | err_setup_tx: | |
581d708e | 698 | e1000_free_all_rx_resources(adapter); |
1da177e4 LT |
699 | err_setup_rx: |
700 | adapter->rx_ring = rx_old; | |
701 | adapter->tx_ring = tx_old; | |
702 | e1000_up(adapter); | |
703 | return err; | |
704 | } | |
705 | ||
706 | #define REG_PATTERN_TEST(R, M, W) \ | |
707 | { \ | |
708 | uint32_t pat, value; \ | |
709 | uint32_t test[] = \ | |
710 | {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \ | |
711 | for(pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \ | |
712 | E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \ | |
713 | value = E1000_READ_REG(&adapter->hw, R); \ | |
714 | if(value != (test[pat] & W & M)) { \ | |
b01f6691 MC |
715 | DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \ |
716 | "0x%08X expected 0x%08X\n", \ | |
717 | E1000_##R, value, (test[pat] & W & M)); \ | |
1da177e4 LT |
718 | *data = (adapter->hw.mac_type < e1000_82543) ? \ |
719 | E1000_82542_##R : E1000_##R; \ | |
720 | return 1; \ | |
721 | } \ | |
722 | } \ | |
723 | } | |
724 | ||
725 | #define REG_SET_AND_CHECK(R, M, W) \ | |
726 | { \ | |
727 | uint32_t value; \ | |
728 | E1000_WRITE_REG(&adapter->hw, R, W & M); \ | |
729 | value = E1000_READ_REG(&adapter->hw, R); \ | |
b01f6691 MC |
730 | if((W & M) != (value & M)) { \ |
731 | DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\ | |
732 | "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \ | |
1da177e4 LT |
733 | *data = (adapter->hw.mac_type < e1000_82543) ? \ |
734 | E1000_82542_##R : E1000_##R; \ | |
735 | return 1; \ | |
736 | } \ | |
737 | } | |
738 | ||
739 | static int | |
740 | e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data) | |
741 | { | |
b01f6691 MC |
742 | uint32_t value, before, after; |
743 | uint32_t i, toggle; | |
1da177e4 LT |
744 | |
745 | /* The status register is Read Only, so a write should fail. | |
746 | * Some bits that get toggled are ignored. | |
747 | */ | |
b01f6691 | 748 | switch (adapter->hw.mac_type) { |
868d5309 MC |
749 | /* there are several bits on newer hardware that are r/w */ |
750 | case e1000_82571: | |
751 | case e1000_82572: | |
752 | toggle = 0x7FFFF3FF; | |
753 | break; | |
b01f6691 MC |
754 | case e1000_82573: |
755 | toggle = 0x7FFFF033; | |
756 | break; | |
757 | default: | |
758 | toggle = 0xFFFFF833; | |
759 | break; | |
760 | } | |
761 | ||
762 | before = E1000_READ_REG(&adapter->hw, STATUS); | |
763 | value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle); | |
764 | E1000_WRITE_REG(&adapter->hw, STATUS, toggle); | |
765 | after = E1000_READ_REG(&adapter->hw, STATUS) & toggle; | |
766 | if(value != after) { | |
767 | DPRINTK(DRV, ERR, "failed STATUS register test got: " | |
768 | "0x%08X expected: 0x%08X\n", after, value); | |
1da177e4 LT |
769 | *data = 1; |
770 | return 1; | |
771 | } | |
b01f6691 MC |
772 | /* restore previous status */ |
773 | E1000_WRITE_REG(&adapter->hw, STATUS, before); | |
1da177e4 LT |
774 | |
775 | REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF); | |
776 | REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF); | |
777 | REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF); | |
778 | REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF); | |
779 | REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF); | |
780 | REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF); | |
781 | REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF); | |
782 | REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF); | |
783 | REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF); | |
784 | REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8); | |
785 | REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF); | |
786 | REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF); | |
787 | REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF); | |
788 | REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF); | |
789 | ||
790 | REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000); | |
791 | REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB); | |
792 | REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000); | |
793 | ||
794 | if(adapter->hw.mac_type >= e1000_82543) { | |
795 | ||
796 | REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF); | |
797 | REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF); | |
798 | REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF); | |
799 | REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF); | |
800 | REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF); | |
801 | ||
802 | for(i = 0; i < E1000_RAR_ENTRIES; i++) { | |
803 | REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF, | |
804 | 0xFFFFFFFF); | |
805 | REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF, | |
806 | 0xFFFFFFFF); | |
807 | } | |
808 | ||
809 | } else { | |
810 | ||
811 | REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF); | |
812 | REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF); | |
813 | REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF); | |
814 | REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF); | |
815 | ||
816 | } | |
817 | ||
818 | for(i = 0; i < E1000_MC_TBL_SIZE; i++) | |
819 | REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF); | |
820 | ||
821 | *data = 0; | |
822 | return 0; | |
823 | } | |
824 | ||
825 | static int | |
826 | e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data) | |
827 | { | |
828 | uint16_t temp; | |
829 | uint16_t checksum = 0; | |
830 | uint16_t i; | |
831 | ||
832 | *data = 0; | |
833 | /* Read and add up the contents of the EEPROM */ | |
834 | for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) { | |
835 | if((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) { | |
836 | *data = 1; | |
837 | break; | |
838 | } | |
839 | checksum += temp; | |
840 | } | |
841 | ||
842 | /* If Checksum is not Correct return error else test passed */ | |
843 | if((checksum != (uint16_t) EEPROM_SUM) && !(*data)) | |
844 | *data = 2; | |
845 | ||
846 | return *data; | |
847 | } | |
848 | ||
849 | static irqreturn_t | |
850 | e1000_test_intr(int irq, | |
851 | void *data, | |
852 | struct pt_regs *regs) | |
853 | { | |
854 | struct net_device *netdev = (struct net_device *) data; | |
60490fe0 | 855 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
856 | |
857 | adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR); | |
858 | ||
859 | return IRQ_HANDLED; | |
860 | } | |
861 | ||
862 | static int | |
863 | e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) | |
864 | { | |
865 | struct net_device *netdev = adapter->netdev; | |
866 | uint32_t mask, i=0, shared_int = TRUE; | |
867 | uint32_t irq = adapter->pdev->irq; | |
868 | ||
869 | *data = 0; | |
870 | ||
871 | /* Hook up test interrupt handler just for this test */ | |
872 | if(!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) { | |
873 | shared_int = FALSE; | |
2648345f MC |
874 | } else if(request_irq(irq, &e1000_test_intr, SA_SHIRQ, |
875 | netdev->name, netdev)){ | |
1da177e4 LT |
876 | *data = 1; |
877 | return -1; | |
878 | } | |
879 | ||
880 | /* Disable all the interrupts */ | |
881 | E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF); | |
882 | msec_delay(10); | |
883 | ||
884 | /* Test each interrupt */ | |
885 | for(; i < 10; i++) { | |
886 | ||
887 | /* Interrupt to test */ | |
888 | mask = 1 << i; | |
889 | ||
890 | if(!shared_int) { | |
891 | /* Disable the interrupt to be reported in | |
892 | * the cause register and then force the same | |
893 | * interrupt and see if one gets posted. If | |
894 | * an interrupt was posted to the bus, the | |
895 | * test failed. | |
896 | */ | |
897 | adapter->test_icr = 0; | |
898 | E1000_WRITE_REG(&adapter->hw, IMC, mask); | |
899 | E1000_WRITE_REG(&adapter->hw, ICS, mask); | |
900 | msec_delay(10); | |
901 | ||
902 | if(adapter->test_icr & mask) { | |
903 | *data = 3; | |
904 | break; | |
905 | } | |
906 | } | |
907 | ||
908 | /* Enable the interrupt to be reported in | |
909 | * the cause register and then force the same | |
910 | * interrupt and see if one gets posted. If | |
911 | * an interrupt was not posted to the bus, the | |
912 | * test failed. | |
913 | */ | |
914 | adapter->test_icr = 0; | |
915 | E1000_WRITE_REG(&adapter->hw, IMS, mask); | |
916 | E1000_WRITE_REG(&adapter->hw, ICS, mask); | |
917 | msec_delay(10); | |
918 | ||
919 | if(!(adapter->test_icr & mask)) { | |
920 | *data = 4; | |
921 | break; | |
922 | } | |
923 | ||
924 | if(!shared_int) { | |
925 | /* Disable the other interrupts to be reported in | |
926 | * the cause register and then force the other | |
927 | * interrupts and see if any get posted. If | |
928 | * an interrupt was posted to the bus, the | |
929 | * test failed. | |
930 | */ | |
931 | adapter->test_icr = 0; | |
2648345f MC |
932 | E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF); |
933 | E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF); | |
1da177e4 LT |
934 | msec_delay(10); |
935 | ||
936 | if(adapter->test_icr) { | |
937 | *data = 5; | |
938 | break; | |
939 | } | |
940 | } | |
941 | } | |
942 | ||
943 | /* Disable all the interrupts */ | |
944 | E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF); | |
945 | msec_delay(10); | |
946 | ||
947 | /* Unhook test interrupt handler */ | |
948 | free_irq(irq, netdev); | |
949 | ||
950 | return *data; | |
951 | } | |
952 | ||
953 | static void | |
954 | e1000_free_desc_rings(struct e1000_adapter *adapter) | |
955 | { | |
581d708e MC |
956 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
957 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 LT |
958 | struct pci_dev *pdev = adapter->pdev; |
959 | int i; | |
960 | ||
961 | if(txdr->desc && txdr->buffer_info) { | |
962 | for(i = 0; i < txdr->count; i++) { | |
963 | if(txdr->buffer_info[i].dma) | |
964 | pci_unmap_single(pdev, txdr->buffer_info[i].dma, | |
965 | txdr->buffer_info[i].length, | |
966 | PCI_DMA_TODEVICE); | |
967 | if(txdr->buffer_info[i].skb) | |
968 | dev_kfree_skb(txdr->buffer_info[i].skb); | |
969 | } | |
970 | } | |
971 | ||
972 | if(rxdr->desc && rxdr->buffer_info) { | |
973 | for(i = 0; i < rxdr->count; i++) { | |
974 | if(rxdr->buffer_info[i].dma) | |
975 | pci_unmap_single(pdev, rxdr->buffer_info[i].dma, | |
976 | rxdr->buffer_info[i].length, | |
977 | PCI_DMA_FROMDEVICE); | |
978 | if(rxdr->buffer_info[i].skb) | |
979 | dev_kfree_skb(rxdr->buffer_info[i].skb); | |
980 | } | |
981 | } | |
982 | ||
f5645110 | 983 | if (txdr->desc) { |
1da177e4 | 984 | pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma); |
6b27adb6 JL |
985 | txdr->desc = NULL; |
986 | } | |
f5645110 | 987 | if (rxdr->desc) { |
1da177e4 | 988 | pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma); |
6b27adb6 JL |
989 | rxdr->desc = NULL; |
990 | } | |
1da177e4 | 991 | |
b4558ea9 | 992 | kfree(txdr->buffer_info); |
6b27adb6 | 993 | txdr->buffer_info = NULL; |
b4558ea9 | 994 | kfree(rxdr->buffer_info); |
6b27adb6 | 995 | rxdr->buffer_info = NULL; |
f5645110 | 996 | |
1da177e4 LT |
997 | return; |
998 | } | |
999 | ||
1000 | static int | |
1001 | e1000_setup_desc_rings(struct e1000_adapter *adapter) | |
1002 | { | |
581d708e MC |
1003 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
1004 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 LT |
1005 | struct pci_dev *pdev = adapter->pdev; |
1006 | uint32_t rctl; | |
1007 | int size, i, ret_val; | |
1008 | ||
1009 | /* Setup Tx descriptor ring and Tx buffers */ | |
1010 | ||
e4eff729 MC |
1011 | if(!txdr->count) |
1012 | txdr->count = E1000_DEFAULT_TXD; | |
1da177e4 LT |
1013 | |
1014 | size = txdr->count * sizeof(struct e1000_buffer); | |
1015 | if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) { | |
1016 | ret_val = 1; | |
1017 | goto err_nomem; | |
1018 | } | |
1019 | memset(txdr->buffer_info, 0, size); | |
1020 | ||
1021 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
1022 | E1000_ROUNDUP(txdr->size, 4096); | |
1023 | if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) { | |
1024 | ret_val = 2; | |
1025 | goto err_nomem; | |
1026 | } | |
1027 | memset(txdr->desc, 0, txdr->size); | |
1028 | txdr->next_to_use = txdr->next_to_clean = 0; | |
1029 | ||
1030 | E1000_WRITE_REG(&adapter->hw, TDBAL, | |
1031 | ((uint64_t) txdr->dma & 0x00000000FFFFFFFF)); | |
1032 | E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32)); | |
1033 | E1000_WRITE_REG(&adapter->hw, TDLEN, | |
1034 | txdr->count * sizeof(struct e1000_tx_desc)); | |
1035 | E1000_WRITE_REG(&adapter->hw, TDH, 0); | |
1036 | E1000_WRITE_REG(&adapter->hw, TDT, 0); | |
1037 | E1000_WRITE_REG(&adapter->hw, TCTL, | |
1038 | E1000_TCTL_PSP | E1000_TCTL_EN | | |
1039 | E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT | | |
1040 | E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT); | |
1041 | ||
1042 | for(i = 0; i < txdr->count; i++) { | |
1043 | struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i); | |
1044 | struct sk_buff *skb; | |
1045 | unsigned int size = 1024; | |
1046 | ||
1047 | if(!(skb = alloc_skb(size, GFP_KERNEL))) { | |
1048 | ret_val = 3; | |
1049 | goto err_nomem; | |
1050 | } | |
1051 | skb_put(skb, size); | |
1052 | txdr->buffer_info[i].skb = skb; | |
1053 | txdr->buffer_info[i].length = skb->len; | |
1054 | txdr->buffer_info[i].dma = | |
1055 | pci_map_single(pdev, skb->data, skb->len, | |
1056 | PCI_DMA_TODEVICE); | |
1057 | tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma); | |
1058 | tx_desc->lower.data = cpu_to_le32(skb->len); | |
1059 | tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP | | |
1060 | E1000_TXD_CMD_IFCS | | |
1061 | E1000_TXD_CMD_RPS); | |
1062 | tx_desc->upper.data = 0; | |
1063 | } | |
1064 | ||
1065 | /* Setup Rx descriptor ring and Rx buffers */ | |
1066 | ||
e4eff729 MC |
1067 | if(!rxdr->count) |
1068 | rxdr->count = E1000_DEFAULT_RXD; | |
1da177e4 LT |
1069 | |
1070 | size = rxdr->count * sizeof(struct e1000_buffer); | |
1071 | if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) { | |
1072 | ret_val = 4; | |
1073 | goto err_nomem; | |
1074 | } | |
1075 | memset(rxdr->buffer_info, 0, size); | |
1076 | ||
1077 | rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc); | |
1078 | if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) { | |
1079 | ret_val = 5; | |
1080 | goto err_nomem; | |
1081 | } | |
1082 | memset(rxdr->desc, 0, rxdr->size); | |
1083 | rxdr->next_to_use = rxdr->next_to_clean = 0; | |
1084 | ||
1085 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1086 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN); | |
1087 | E1000_WRITE_REG(&adapter->hw, RDBAL, | |
1088 | ((uint64_t) rxdr->dma & 0xFFFFFFFF)); | |
1089 | E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32)); | |
1090 | E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size); | |
1091 | E1000_WRITE_REG(&adapter->hw, RDH, 0); | |
1092 | E1000_WRITE_REG(&adapter->hw, RDT, 0); | |
1093 | rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 | | |
1094 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1095 | (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1096 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1097 | ||
1098 | for(i = 0; i < rxdr->count; i++) { | |
1099 | struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i); | |
1100 | struct sk_buff *skb; | |
1101 | ||
2648345f | 1102 | if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, |
1da177e4 LT |
1103 | GFP_KERNEL))) { |
1104 | ret_val = 6; | |
1105 | goto err_nomem; | |
1106 | } | |
1107 | skb_reserve(skb, NET_IP_ALIGN); | |
1108 | rxdr->buffer_info[i].skb = skb; | |
1109 | rxdr->buffer_info[i].length = E1000_RXBUFFER_2048; | |
1110 | rxdr->buffer_info[i].dma = | |
1111 | pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048, | |
1112 | PCI_DMA_FROMDEVICE); | |
1113 | rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma); | |
1114 | memset(skb->data, 0x00, skb->len); | |
1115 | } | |
1116 | ||
1117 | return 0; | |
1118 | ||
1119 | err_nomem: | |
1120 | e1000_free_desc_rings(adapter); | |
1121 | return ret_val; | |
1122 | } | |
1123 | ||
1124 | static void | |
1125 | e1000_phy_disable_receiver(struct e1000_adapter *adapter) | |
1126 | { | |
1127 | /* Write out to PHY registers 29 and 30 to disable the Receiver. */ | |
1128 | e1000_write_phy_reg(&adapter->hw, 29, 0x001F); | |
1129 | e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC); | |
1130 | e1000_write_phy_reg(&adapter->hw, 29, 0x001A); | |
1131 | e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0); | |
1132 | } | |
1133 | ||
1134 | static void | |
1135 | e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter) | |
1136 | { | |
1137 | uint16_t phy_reg; | |
1138 | ||
1139 | /* Because we reset the PHY above, we need to re-force TX_CLK in the | |
1140 | * Extended PHY Specific Control Register to 25MHz clock. This | |
1141 | * value defaults back to a 2.5MHz clock when the PHY is reset. | |
1142 | */ | |
1143 | e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); | |
1144 | phy_reg |= M88E1000_EPSCR_TX_CLK_25; | |
1145 | e1000_write_phy_reg(&adapter->hw, | |
1146 | M88E1000_EXT_PHY_SPEC_CTRL, phy_reg); | |
1147 | ||
1148 | /* In addition, because of the s/w reset above, we need to enable | |
1149 | * CRS on TX. This must be set for both full and half duplex | |
1150 | * operation. | |
1151 | */ | |
1152 | e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); | |
1153 | phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX; | |
1154 | e1000_write_phy_reg(&adapter->hw, | |
1155 | M88E1000_PHY_SPEC_CTRL, phy_reg); | |
1156 | } | |
1157 | ||
1158 | static int | |
1159 | e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter) | |
1160 | { | |
1161 | uint32_t ctrl_reg; | |
1162 | uint16_t phy_reg; | |
1163 | ||
1164 | /* Setup the Device Control Register for PHY loopback test. */ | |
1165 | ||
1166 | ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL); | |
1167 | ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */ | |
1168 | E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ | |
1169 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | |
1170 | E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */ | |
1171 | E1000_CTRL_FD); /* Force Duplex to FULL */ | |
1172 | ||
1173 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg); | |
1174 | ||
1175 | /* Read the PHY Specific Control Register (0x10) */ | |
1176 | e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); | |
1177 | ||
1178 | /* Clear Auto-Crossover bits in PHY Specific Control Register | |
1179 | * (bits 6:5). | |
1180 | */ | |
1181 | phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE; | |
1182 | e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg); | |
1183 | ||
1184 | /* Perform software reset on the PHY */ | |
1185 | e1000_phy_reset(&adapter->hw); | |
1186 | ||
1187 | /* Have to setup TX_CLK and TX_CRS after software reset */ | |
1188 | e1000_phy_reset_clk_and_crs(adapter); | |
1189 | ||
1190 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100); | |
1191 | ||
1192 | /* Wait for reset to complete. */ | |
1193 | udelay(500); | |
1194 | ||
1195 | /* Have to setup TX_CLK and TX_CRS after software reset */ | |
1196 | e1000_phy_reset_clk_and_crs(adapter); | |
1197 | ||
1198 | /* Write out to PHY registers 29 and 30 to disable the Receiver. */ | |
1199 | e1000_phy_disable_receiver(adapter); | |
1200 | ||
1201 | /* Set the loopback bit in the PHY control register. */ | |
1202 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg); | |
1203 | phy_reg |= MII_CR_LOOPBACK; | |
1204 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg); | |
1205 | ||
1206 | /* Setup TX_CLK and TX_CRS one more time. */ | |
1207 | e1000_phy_reset_clk_and_crs(adapter); | |
1208 | ||
1209 | /* Check Phy Configuration */ | |
1210 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg); | |
1211 | if(phy_reg != 0x4100) | |
1212 | return 9; | |
1213 | ||
1214 | e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); | |
1215 | if(phy_reg != 0x0070) | |
1216 | return 10; | |
1217 | ||
1218 | e1000_read_phy_reg(&adapter->hw, 29, &phy_reg); | |
1219 | if(phy_reg != 0x001A) | |
1220 | return 11; | |
1221 | ||
1222 | return 0; | |
1223 | } | |
1224 | ||
1225 | static int | |
1226 | e1000_integrated_phy_loopback(struct e1000_adapter *adapter) | |
1227 | { | |
1228 | uint32_t ctrl_reg = 0; | |
1229 | uint32_t stat_reg = 0; | |
1230 | ||
1231 | adapter->hw.autoneg = FALSE; | |
1232 | ||
1233 | if(adapter->hw.phy_type == e1000_phy_m88) { | |
1234 | /* Auto-MDI/MDIX Off */ | |
1235 | e1000_write_phy_reg(&adapter->hw, | |
1236 | M88E1000_PHY_SPEC_CTRL, 0x0808); | |
1237 | /* reset to update Auto-MDI/MDIX */ | |
1238 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140); | |
1239 | /* autoneg off */ | |
1240 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140); | |
1241 | } | |
1242 | /* force 1000, set loopback */ | |
1243 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140); | |
1244 | ||
1245 | /* Now set up the MAC to the same speed/duplex as the PHY. */ | |
1246 | ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL); | |
1247 | ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ | |
1248 | ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ | |
1249 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | |
1250 | E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */ | |
1251 | E1000_CTRL_FD); /* Force Duplex to FULL */ | |
1252 | ||
1253 | if(adapter->hw.media_type == e1000_media_type_copper && | |
1254 | adapter->hw.phy_type == e1000_phy_m88) { | |
1255 | ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ | |
1256 | } else { | |
1257 | /* Set the ILOS bit on the fiber Nic is half | |
1258 | * duplex link is detected. */ | |
1259 | stat_reg = E1000_READ_REG(&adapter->hw, STATUS); | |
1260 | if((stat_reg & E1000_STATUS_FD) == 0) | |
1261 | ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU); | |
1262 | } | |
1263 | ||
1264 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg); | |
1265 | ||
1266 | /* Disable the receiver on the PHY so when a cable is plugged in, the | |
1267 | * PHY does not begin to autoneg when a cable is reconnected to the NIC. | |
1268 | */ | |
1269 | if(adapter->hw.phy_type == e1000_phy_m88) | |
1270 | e1000_phy_disable_receiver(adapter); | |
1271 | ||
1272 | udelay(500); | |
1273 | ||
1274 | return 0; | |
1275 | } | |
1276 | ||
1277 | static int | |
1278 | e1000_set_phy_loopback(struct e1000_adapter *adapter) | |
1279 | { | |
1280 | uint16_t phy_reg = 0; | |
1281 | uint16_t count = 0; | |
1282 | ||
1283 | switch (adapter->hw.mac_type) { | |
1284 | case e1000_82543: | |
1285 | if(adapter->hw.media_type == e1000_media_type_copper) { | |
1286 | /* Attempt to setup Loopback mode on Non-integrated PHY. | |
1287 | * Some PHY registers get corrupted at random, so | |
1288 | * attempt this 10 times. | |
1289 | */ | |
1290 | while(e1000_nonintegrated_phy_loopback(adapter) && | |
1291 | count++ < 10); | |
1292 | if(count < 11) | |
1293 | return 0; | |
1294 | } | |
1295 | break; | |
1296 | ||
1297 | case e1000_82544: | |
1298 | case e1000_82540: | |
1299 | case e1000_82545: | |
1300 | case e1000_82545_rev_3: | |
1301 | case e1000_82546: | |
1302 | case e1000_82546_rev_3: | |
1303 | case e1000_82541: | |
1304 | case e1000_82541_rev_2: | |
1305 | case e1000_82547: | |
1306 | case e1000_82547_rev_2: | |
868d5309 MC |
1307 | case e1000_82571: |
1308 | case e1000_82572: | |
4564327b | 1309 | case e1000_82573: |
1da177e4 LT |
1310 | return e1000_integrated_phy_loopback(adapter); |
1311 | break; | |
1312 | ||
1313 | default: | |
1314 | /* Default PHY loopback work is to read the MII | |
1315 | * control register and assert bit 14 (loopback mode). | |
1316 | */ | |
1317 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg); | |
1318 | phy_reg |= MII_CR_LOOPBACK; | |
1319 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg); | |
1320 | return 0; | |
1321 | break; | |
1322 | } | |
1323 | ||
1324 | return 8; | |
1325 | } | |
1326 | ||
1327 | static int | |
1328 | e1000_setup_loopback_test(struct e1000_adapter *adapter) | |
1329 | { | |
49273163 | 1330 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
1331 | uint32_t rctl; |
1332 | ||
49273163 JK |
1333 | if (hw->media_type == e1000_media_type_fiber || |
1334 | hw->media_type == e1000_media_type_internal_serdes) { | |
1335 | switch (hw->mac_type) { | |
1336 | case e1000_82545: | |
1337 | case e1000_82546: | |
1338 | case e1000_82545_rev_3: | |
1339 | case e1000_82546_rev_3: | |
1da177e4 | 1340 | return e1000_set_phy_loopback(adapter); |
49273163 JK |
1341 | break; |
1342 | case e1000_82571: | |
1343 | case e1000_82572: | |
1344 | #define E1000_SERDES_LB_ON 0x410 | |
1345 | e1000_set_phy_loopback(adapter); | |
1346 | E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON); | |
1347 | msec_delay(10); | |
1348 | return 0; | |
1349 | break; | |
1350 | default: | |
1351 | rctl = E1000_READ_REG(hw, RCTL); | |
1da177e4 | 1352 | rctl |= E1000_RCTL_LBM_TCVR; |
49273163 | 1353 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 LT |
1354 | return 0; |
1355 | } | |
49273163 | 1356 | } else if (hw->media_type == e1000_media_type_copper) |
1da177e4 LT |
1357 | return e1000_set_phy_loopback(adapter); |
1358 | ||
1359 | return 7; | |
1360 | } | |
1361 | ||
1362 | static void | |
1363 | e1000_loopback_cleanup(struct e1000_adapter *adapter) | |
1364 | { | |
49273163 | 1365 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
1366 | uint32_t rctl; |
1367 | uint16_t phy_reg; | |
1368 | ||
49273163 | 1369 | rctl = E1000_READ_REG(hw, RCTL); |
1da177e4 | 1370 | rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC); |
49273163 | 1371 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 | 1372 | |
49273163 JK |
1373 | switch (hw->mac_type) { |
1374 | case e1000_82571: | |
1375 | case e1000_82572: | |
1376 | if (hw->media_type == e1000_media_type_fiber || | |
1377 | hw->media_type == e1000_media_type_internal_serdes) { | |
1378 | #define E1000_SERDES_LB_OFF 0x400 | |
1379 | E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF); | |
1380 | msec_delay(10); | |
1381 | break; | |
1382 | } | |
1383 | /* Fall Through */ | |
1384 | case e1000_82545: | |
1385 | case e1000_82546: | |
1386 | case e1000_82545_rev_3: | |
1387 | case e1000_82546_rev_3: | |
1388 | default: | |
1389 | hw->autoneg = TRUE; | |
1390 | e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); | |
1391 | if (phy_reg & MII_CR_LOOPBACK) { | |
1da177e4 | 1392 | phy_reg &= ~MII_CR_LOOPBACK; |
49273163 JK |
1393 | e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); |
1394 | e1000_phy_reset(hw); | |
1da177e4 | 1395 | } |
49273163 | 1396 | break; |
1da177e4 LT |
1397 | } |
1398 | } | |
1399 | ||
1400 | static void | |
1401 | e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size) | |
1402 | { | |
1403 | memset(skb->data, 0xFF, frame_size); | |
ce7393b9 | 1404 | frame_size &= ~1; |
1da177e4 LT |
1405 | memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1); |
1406 | memset(&skb->data[frame_size / 2 + 10], 0xBE, 1); | |
1407 | memset(&skb->data[frame_size / 2 + 12], 0xAF, 1); | |
1408 | } | |
1409 | ||
1410 | static int | |
1411 | e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size) | |
1412 | { | |
ce7393b9 | 1413 | frame_size &= ~1; |
1da177e4 LT |
1414 | if(*(skb->data + 3) == 0xFF) { |
1415 | if((*(skb->data + frame_size / 2 + 10) == 0xBE) && | |
1416 | (*(skb->data + frame_size / 2 + 12) == 0xAF)) { | |
1417 | return 0; | |
1418 | } | |
1419 | } | |
1420 | return 13; | |
1421 | } | |
1422 | ||
1423 | static int | |
1424 | e1000_run_loopback_test(struct e1000_adapter *adapter) | |
1425 | { | |
581d708e MC |
1426 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
1427 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 | 1428 | struct pci_dev *pdev = adapter->pdev; |
e4eff729 MC |
1429 | int i, j, k, l, lc, good_cnt, ret_val=0; |
1430 | unsigned long time; | |
1da177e4 LT |
1431 | |
1432 | E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1); | |
1433 | ||
e4eff729 MC |
1434 | /* Calculate the loop count based on the largest descriptor ring |
1435 | * The idea is to wrap the largest ring a number of times using 64 | |
1436 | * send/receive pairs during each loop | |
1437 | */ | |
1da177e4 | 1438 | |
e4eff729 MC |
1439 | if(rxdr->count <= txdr->count) |
1440 | lc = ((txdr->count / 64) * 2) + 1; | |
1441 | else | |
1442 | lc = ((rxdr->count / 64) * 2) + 1; | |
1443 | ||
1444 | k = l = 0; | |
1445 | for(j = 0; j <= lc; j++) { /* loop count loop */ | |
1446 | for(i = 0; i < 64; i++) { /* send the packets */ | |
1447 | e1000_create_lbtest_frame(txdr->buffer_info[i].skb, | |
1448 | 1024); | |
1449 | pci_dma_sync_single_for_device(pdev, | |
1450 | txdr->buffer_info[k].dma, | |
1451 | txdr->buffer_info[k].length, | |
1452 | PCI_DMA_TODEVICE); | |
1453 | if(unlikely(++k == txdr->count)) k = 0; | |
1454 | } | |
1455 | E1000_WRITE_REG(&adapter->hw, TDT, k); | |
1456 | msec_delay(200); | |
1457 | time = jiffies; /* set the start time for the receive */ | |
1458 | good_cnt = 0; | |
1459 | do { /* receive the sent packets */ | |
1460 | pci_dma_sync_single_for_cpu(pdev, | |
1461 | rxdr->buffer_info[l].dma, | |
1462 | rxdr->buffer_info[l].length, | |
1463 | PCI_DMA_FROMDEVICE); | |
1464 | ||
1465 | ret_val = e1000_check_lbtest_frame( | |
1466 | rxdr->buffer_info[l].skb, | |
1467 | 1024); | |
1468 | if(!ret_val) | |
1469 | good_cnt++; | |
1470 | if(unlikely(++l == rxdr->count)) l = 0; | |
1471 | /* time + 20 msecs (200 msecs on 2.4) is more than | |
1472 | * enough time to complete the receives, if it's | |
1473 | * exceeded, break and error off | |
1474 | */ | |
1475 | } while (good_cnt < 64 && jiffies < (time + 20)); | |
1476 | if(good_cnt != 64) { | |
1477 | ret_val = 13; /* ret_val is the same as mis-compare */ | |
1478 | break; | |
1479 | } | |
1480 | if(jiffies >= (time + 2)) { | |
1481 | ret_val = 14; /* error code for time out error */ | |
1482 | break; | |
1483 | } | |
1484 | } /* end loop count loop */ | |
1da177e4 LT |
1485 | return ret_val; |
1486 | } | |
1487 | ||
1488 | static int | |
1489 | e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data) | |
1490 | { | |
57128197 JK |
1491 | /* PHY loopback cannot be performed if SoL/IDER |
1492 | * sessions are active */ | |
1493 | if (e1000_check_phy_reset_block(&adapter->hw)) { | |
1494 | DPRINTK(DRV, ERR, "Cannot do PHY loopback test " | |
1495 | "when SoL/IDER is active.\n"); | |
1496 | *data = 0; | |
1497 | goto out; | |
1498 | } | |
1499 | ||
1500 | if ((*data = e1000_setup_desc_rings(adapter))) | |
1501 | goto out; | |
1502 | if ((*data = e1000_setup_loopback_test(adapter))) | |
1503 | goto err_loopback; | |
1da177e4 LT |
1504 | *data = e1000_run_loopback_test(adapter); |
1505 | e1000_loopback_cleanup(adapter); | |
57128197 | 1506 | |
1da177e4 | 1507 | err_loopback: |
57128197 JK |
1508 | e1000_free_desc_rings(adapter); |
1509 | out: | |
1da177e4 LT |
1510 | return *data; |
1511 | } | |
1512 | ||
1513 | static int | |
1514 | e1000_link_test(struct e1000_adapter *adapter, uint64_t *data) | |
1515 | { | |
1516 | *data = 0; | |
1da177e4 LT |
1517 | if (adapter->hw.media_type == e1000_media_type_internal_serdes) { |
1518 | int i = 0; | |
1519 | adapter->hw.serdes_link_down = TRUE; | |
1520 | ||
2648345f MC |
1521 | /* On some blade server designs, link establishment |
1522 | * could take as long as 2-3 minutes */ | |
1da177e4 LT |
1523 | do { |
1524 | e1000_check_for_link(&adapter->hw); | |
1525 | if (adapter->hw.serdes_link_down == FALSE) | |
1526 | return *data; | |
1527 | msec_delay(20); | |
1528 | } while (i++ < 3750); | |
1529 | ||
2648345f | 1530 | *data = 1; |
1da177e4 LT |
1531 | } else { |
1532 | e1000_check_for_link(&adapter->hw); | |
e4eff729 MC |
1533 | if(adapter->hw.autoneg) /* if auto_neg is set wait for it */ |
1534 | msec_delay(4000); | |
1da177e4 LT |
1535 | |
1536 | if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) { | |
1537 | *data = 1; | |
1538 | } | |
1539 | } | |
1540 | return *data; | |
1541 | } | |
1542 | ||
1543 | static int | |
1544 | e1000_diag_test_count(struct net_device *netdev) | |
1545 | { | |
1546 | return E1000_TEST_LEN; | |
1547 | } | |
1548 | ||
1549 | static void | |
1550 | e1000_diag_test(struct net_device *netdev, | |
1551 | struct ethtool_test *eth_test, uint64_t *data) | |
1552 | { | |
60490fe0 | 1553 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1554 | boolean_t if_running = netif_running(netdev); |
1555 | ||
1556 | if(eth_test->flags == ETH_TEST_FL_OFFLINE) { | |
1557 | /* Offline tests */ | |
1558 | ||
1559 | /* save speed, duplex, autoneg settings */ | |
1560 | uint16_t autoneg_advertised = adapter->hw.autoneg_advertised; | |
1561 | uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex; | |
1562 | uint8_t autoneg = adapter->hw.autoneg; | |
1563 | ||
1564 | /* Link test performed before hardware reset so autoneg doesn't | |
1565 | * interfere with test result */ | |
1566 | if(e1000_link_test(adapter, &data[4])) | |
1567 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
1568 | ||
1569 | if(if_running) | |
1570 | e1000_down(adapter); | |
1571 | else | |
1572 | e1000_reset(adapter); | |
1573 | ||
1574 | if(e1000_reg_test(adapter, &data[0])) | |
1575 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
1576 | ||
1577 | e1000_reset(adapter); | |
1578 | if(e1000_eeprom_test(adapter, &data[1])) | |
1579 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
1580 | ||
1581 | e1000_reset(adapter); | |
1582 | if(e1000_intr_test(adapter, &data[2])) | |
1583 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
1584 | ||
1585 | e1000_reset(adapter); | |
1586 | if(e1000_loopback_test(adapter, &data[3])) | |
1587 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
1588 | ||
1589 | /* restore speed, duplex, autoneg settings */ | |
1590 | adapter->hw.autoneg_advertised = autoneg_advertised; | |
1591 | adapter->hw.forced_speed_duplex = forced_speed_duplex; | |
1592 | adapter->hw.autoneg = autoneg; | |
1593 | ||
1594 | e1000_reset(adapter); | |
1595 | if(if_running) | |
1596 | e1000_up(adapter); | |
1597 | } else { | |
1598 | /* Online tests */ | |
1599 | if(e1000_link_test(adapter, &data[4])) | |
1600 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
1601 | ||
1602 | /* Offline tests aren't run; pass by default */ | |
1603 | data[0] = 0; | |
1604 | data[1] = 0; | |
1605 | data[2] = 0; | |
1606 | data[3] = 0; | |
1607 | } | |
352c9f85 | 1608 | msleep_interruptible(4 * 1000); |
1da177e4 LT |
1609 | } |
1610 | ||
1611 | static void | |
1612 | e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | |
1613 | { | |
60490fe0 | 1614 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1615 | struct e1000_hw *hw = &adapter->hw; |
1616 | ||
1617 | switch(adapter->hw.device_id) { | |
1618 | case E1000_DEV_ID_82542: | |
1619 | case E1000_DEV_ID_82543GC_FIBER: | |
1620 | case E1000_DEV_ID_82543GC_COPPER: | |
1621 | case E1000_DEV_ID_82544EI_FIBER: | |
1622 | case E1000_DEV_ID_82546EB_QUAD_COPPER: | |
1623 | case E1000_DEV_ID_82545EM_FIBER: | |
1624 | case E1000_DEV_ID_82545EM_COPPER: | |
1625 | wol->supported = 0; | |
1626 | wol->wolopts = 0; | |
1627 | return; | |
1628 | ||
1629 | case E1000_DEV_ID_82546EB_FIBER: | |
1630 | case E1000_DEV_ID_82546GB_FIBER: | |
b7ee49db | 1631 | case E1000_DEV_ID_82571EB_FIBER: |
1da177e4 LT |
1632 | /* Wake events only supported on port A for dual fiber */ |
1633 | if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) { | |
1634 | wol->supported = 0; | |
1635 | wol->wolopts = 0; | |
1636 | return; | |
1637 | } | |
1638 | /* Fall Through */ | |
1639 | ||
1640 | default: | |
1641 | wol->supported = WAKE_UCAST | WAKE_MCAST | | |
1642 | WAKE_BCAST | WAKE_MAGIC; | |
1643 | ||
1644 | wol->wolopts = 0; | |
1645 | if(adapter->wol & E1000_WUFC_EX) | |
1646 | wol->wolopts |= WAKE_UCAST; | |
1647 | if(adapter->wol & E1000_WUFC_MC) | |
1648 | wol->wolopts |= WAKE_MCAST; | |
1649 | if(adapter->wol & E1000_WUFC_BC) | |
1650 | wol->wolopts |= WAKE_BCAST; | |
1651 | if(adapter->wol & E1000_WUFC_MAG) | |
1652 | wol->wolopts |= WAKE_MAGIC; | |
1653 | return; | |
1654 | } | |
1655 | } | |
1656 | ||
1657 | static int | |
1658 | e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | |
1659 | { | |
60490fe0 | 1660 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1661 | struct e1000_hw *hw = &adapter->hw; |
1662 | ||
1663 | switch(adapter->hw.device_id) { | |
1664 | case E1000_DEV_ID_82542: | |
1665 | case E1000_DEV_ID_82543GC_FIBER: | |
1666 | case E1000_DEV_ID_82543GC_COPPER: | |
1667 | case E1000_DEV_ID_82544EI_FIBER: | |
1668 | case E1000_DEV_ID_82546EB_QUAD_COPPER: | |
1669 | case E1000_DEV_ID_82545EM_FIBER: | |
1670 | case E1000_DEV_ID_82545EM_COPPER: | |
1671 | return wol->wolopts ? -EOPNOTSUPP : 0; | |
1672 | ||
1673 | case E1000_DEV_ID_82546EB_FIBER: | |
1674 | case E1000_DEV_ID_82546GB_FIBER: | |
b7ee49db | 1675 | case E1000_DEV_ID_82571EB_FIBER: |
1da177e4 LT |
1676 | /* Wake events only supported on port A for dual fiber */ |
1677 | if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) | |
1678 | return wol->wolopts ? -EOPNOTSUPP : 0; | |
1679 | /* Fall Through */ | |
1680 | ||
1681 | default: | |
1682 | if(wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE)) | |
1683 | return -EOPNOTSUPP; | |
1684 | ||
1685 | adapter->wol = 0; | |
1686 | ||
1687 | if(wol->wolopts & WAKE_UCAST) | |
1688 | adapter->wol |= E1000_WUFC_EX; | |
1689 | if(wol->wolopts & WAKE_MCAST) | |
1690 | adapter->wol |= E1000_WUFC_MC; | |
1691 | if(wol->wolopts & WAKE_BCAST) | |
1692 | adapter->wol |= E1000_WUFC_BC; | |
1693 | if(wol->wolopts & WAKE_MAGIC) | |
1694 | adapter->wol |= E1000_WUFC_MAG; | |
1695 | } | |
1696 | ||
1697 | return 0; | |
1698 | } | |
1699 | ||
1700 | /* toggle LED 4 times per second = 2 "blinks" per second */ | |
1701 | #define E1000_ID_INTERVAL (HZ/4) | |
1702 | ||
1703 | /* bit defines for adapter->led_status */ | |
1704 | #define E1000_LED_ON 0 | |
1705 | ||
1706 | static void | |
1707 | e1000_led_blink_callback(unsigned long data) | |
1708 | { | |
1709 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
1710 | ||
1711 | if(test_and_change_bit(E1000_LED_ON, &adapter->led_status)) | |
1712 | e1000_led_off(&adapter->hw); | |
1713 | else | |
1714 | e1000_led_on(&adapter->hw); | |
1715 | ||
1716 | mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL); | |
1717 | } | |
1718 | ||
1719 | static int | |
1720 | e1000_phys_id(struct net_device *netdev, uint32_t data) | |
1721 | { | |
60490fe0 | 1722 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1723 | |
1724 | if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ)) | |
1725 | data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ); | |
1726 | ||
868d5309 | 1727 | if(adapter->hw.mac_type < e1000_82571) { |
d439d4b7 MC |
1728 | if(!adapter->blink_timer.function) { |
1729 | init_timer(&adapter->blink_timer); | |
1730 | adapter->blink_timer.function = e1000_led_blink_callback; | |
1731 | adapter->blink_timer.data = (unsigned long) adapter; | |
1732 | } | |
1733 | e1000_setup_led(&adapter->hw); | |
1734 | mod_timer(&adapter->blink_timer, jiffies); | |
1735 | msleep_interruptible(data * 1000); | |
1736 | del_timer_sync(&adapter->blink_timer); | |
d8c2bd3d JK |
1737 | } else if (adapter->hw.mac_type < e1000_82573) { |
1738 | E1000_WRITE_REG(&adapter->hw, LEDCTL, | |
1739 | (E1000_LEDCTL_LED2_BLINK_RATE | | |
1740 | E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK | | |
1741 | (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) | | |
1742 | (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) | | |
1743 | (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT))); | |
1744 | msleep_interruptible(data * 1000); | |
1745 | } else { | |
1746 | E1000_WRITE_REG(&adapter->hw, LEDCTL, | |
1747 | (E1000_LEDCTL_LED2_BLINK_RATE | | |
1748 | E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK | | |
1749 | (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) | | |
1750 | (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) | | |
1751 | (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT))); | |
d439d4b7 | 1752 | msleep_interruptible(data * 1000); |
1da177e4 LT |
1753 | } |
1754 | ||
1da177e4 LT |
1755 | e1000_led_off(&adapter->hw); |
1756 | clear_bit(E1000_LED_ON, &adapter->led_status); | |
1757 | e1000_cleanup_led(&adapter->hw); | |
1758 | ||
1759 | return 0; | |
1760 | } | |
1761 | ||
1762 | static int | |
1763 | e1000_nway_reset(struct net_device *netdev) | |
1764 | { | |
60490fe0 | 1765 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1766 | if(netif_running(netdev)) { |
1767 | e1000_down(adapter); | |
1768 | e1000_up(adapter); | |
1769 | } | |
1770 | return 0; | |
1771 | } | |
1772 | ||
1773 | static int | |
1774 | e1000_get_stats_count(struct net_device *netdev) | |
1775 | { | |
1776 | return E1000_STATS_LEN; | |
1777 | } | |
1778 | ||
1779 | static void | |
1780 | e1000_get_ethtool_stats(struct net_device *netdev, | |
1781 | struct ethtool_stats *stats, uint64_t *data) | |
1782 | { | |
60490fe0 | 1783 | struct e1000_adapter *adapter = netdev_priv(netdev); |
7bfa4816 JK |
1784 | #ifdef CONFIG_E1000_MQ |
1785 | uint64_t *queue_stat; | |
1786 | int stat_count = sizeof(struct e1000_queue_stats) / sizeof(uint64_t); | |
1787 | int j, k; | |
1788 | #endif | |
1da177e4 LT |
1789 | int i; |
1790 | ||
1791 | e1000_update_stats(adapter); | |
7bfa4816 JK |
1792 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { |
1793 | char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset; | |
1794 | data[i] = (e1000_gstrings_stats[i].sizeof_stat == | |
1da177e4 LT |
1795 | sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p; |
1796 | } | |
7bfa4816 JK |
1797 | #ifdef CONFIG_E1000_MQ |
1798 | for (j = 0; j < adapter->num_tx_queues; j++) { | |
1799 | queue_stat = (uint64_t *)&adapter->tx_ring[j].tx_stats; | |
1800 | for (k = 0; k < stat_count; k++) | |
1801 | data[i + k] = queue_stat[k]; | |
1802 | i += k; | |
1803 | } | |
1804 | for (j = 0; j < adapter->num_rx_queues; j++) { | |
1805 | queue_stat = (uint64_t *)&adapter->rx_ring[j].rx_stats; | |
1806 | for (k = 0; k < stat_count; k++) | |
1807 | data[i + k] = queue_stat[k]; | |
1808 | i += k; | |
1809 | } | |
1810 | #endif | |
1811 | /* BUG_ON(i != E1000_STATS_LEN); */ | |
1da177e4 LT |
1812 | } |
1813 | ||
1814 | static void | |
1815 | e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data) | |
1816 | { | |
7bfa4816 JK |
1817 | #ifdef CONFIG_E1000_MQ |
1818 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1819 | #endif | |
1820 | uint8_t *p = data; | |
1da177e4 LT |
1821 | int i; |
1822 | ||
1823 | switch(stringset) { | |
1824 | case ETH_SS_TEST: | |
1825 | memcpy(data, *e1000_gstrings_test, | |
1826 | E1000_TEST_LEN*ETH_GSTRING_LEN); | |
1827 | break; | |
1828 | case ETH_SS_STATS: | |
7bfa4816 JK |
1829 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { |
1830 | memcpy(p, e1000_gstrings_stats[i].stat_string, | |
1831 | ETH_GSTRING_LEN); | |
1832 | p += ETH_GSTRING_LEN; | |
1833 | } | |
1834 | #ifdef CONFIG_E1000_MQ | |
1835 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
1836 | sprintf(p, "tx_queue_%u_packets", i); | |
1837 | p += ETH_GSTRING_LEN; | |
1838 | sprintf(p, "tx_queue_%u_bytes", i); | |
1839 | p += ETH_GSTRING_LEN; | |
1840 | } | |
1841 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
1842 | sprintf(p, "rx_queue_%u_packets", i); | |
1843 | p += ETH_GSTRING_LEN; | |
1844 | sprintf(p, "rx_queue_%u_bytes", i); | |
1845 | p += ETH_GSTRING_LEN; | |
1da177e4 | 1846 | } |
7bfa4816 JK |
1847 | #endif |
1848 | /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */ | |
1da177e4 LT |
1849 | break; |
1850 | } | |
1851 | } | |
1852 | ||
3ad2cc67 | 1853 | static struct ethtool_ops e1000_ethtool_ops = { |
1da177e4 LT |
1854 | .get_settings = e1000_get_settings, |
1855 | .set_settings = e1000_set_settings, | |
1856 | .get_drvinfo = e1000_get_drvinfo, | |
1857 | .get_regs_len = e1000_get_regs_len, | |
1858 | .get_regs = e1000_get_regs, | |
1859 | .get_wol = e1000_get_wol, | |
1860 | .set_wol = e1000_set_wol, | |
1861 | .get_msglevel = e1000_get_msglevel, | |
1862 | .set_msglevel = e1000_set_msglevel, | |
1863 | .nway_reset = e1000_nway_reset, | |
1864 | .get_link = ethtool_op_get_link, | |
1865 | .get_eeprom_len = e1000_get_eeprom_len, | |
1866 | .get_eeprom = e1000_get_eeprom, | |
1867 | .set_eeprom = e1000_set_eeprom, | |
1868 | .get_ringparam = e1000_get_ringparam, | |
1869 | .set_ringparam = e1000_set_ringparam, | |
1870 | .get_pauseparam = e1000_get_pauseparam, | |
1871 | .set_pauseparam = e1000_set_pauseparam, | |
1872 | .get_rx_csum = e1000_get_rx_csum, | |
1873 | .set_rx_csum = e1000_set_rx_csum, | |
1874 | .get_tx_csum = e1000_get_tx_csum, | |
1875 | .set_tx_csum = e1000_set_tx_csum, | |
1876 | .get_sg = ethtool_op_get_sg, | |
1877 | .set_sg = ethtool_op_set_sg, | |
1878 | #ifdef NETIF_F_TSO | |
1879 | .get_tso = ethtool_op_get_tso, | |
1880 | .set_tso = e1000_set_tso, | |
1881 | #endif | |
1882 | .self_test_count = e1000_diag_test_count, | |
1883 | .self_test = e1000_diag_test, | |
1884 | .get_strings = e1000_get_strings, | |
1885 | .phys_id = e1000_phys_id, | |
1886 | .get_stats_count = e1000_get_stats_count, | |
1887 | .get_ethtool_stats = e1000_get_ethtool_stats, | |
9beb0ac1 | 1888 | .get_perm_addr = ethtool_op_get_perm_addr, |
1da177e4 LT |
1889 | }; |
1890 | ||
1891 | void e1000_set_ethtool_ops(struct net_device *netdev) | |
1892 | { | |
1893 | SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops); | |
1894 | } |