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[netdrvr] Stop using legacy hooks ->self_test_count, ->get_stats_count
[mirror_ubuntu-zesty-kernel.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
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AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
32
33#include <asm/uaccess.h>
34
35574764
NN
35extern char e1000_driver_name[];
36extern char e1000_driver_version[];
37
38extern int e1000_up(struct e1000_adapter *adapter);
39extern void e1000_down(struct e1000_adapter *adapter);
40extern void e1000_reinit_locked(struct e1000_adapter *adapter);
41extern void e1000_reset(struct e1000_adapter *adapter);
42extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
43extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
44extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
45extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
46extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
47extern void e1000_update_stats(struct e1000_adapter *adapter);
48
49
1da177e4
LT
50struct e1000_stats {
51 char stat_string[ETH_GSTRING_LEN];
52 int sizeof_stat;
53 int stat_offset;
54};
55
56#define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
57 offsetof(struct e1000_adapter, m)
58static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW
59 { "rx_packets", E1000_STAT(stats.gprc) },
60 { "tx_packets", E1000_STAT(stats.gptc) },
61 { "rx_bytes", E1000_STAT(stats.gorcl) },
62 { "tx_bytes", E1000_STAT(stats.gotcl) },
63 { "rx_broadcast", E1000_STAT(stats.bprc) },
64 { "tx_broadcast", E1000_STAT(stats.bptc) },
65 { "rx_multicast", E1000_STAT(stats.mprc) },
66 { "tx_multicast", E1000_STAT(stats.mptc) },
67 { "rx_errors", E1000_STAT(stats.rxerrc) },
68 { "tx_errors", E1000_STAT(stats.txerrc) },
1da177e4 69 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
49559854
MW
70 { "multicast", E1000_STAT(stats.mprc) },
71 { "collisions", E1000_STAT(stats.colc) },
72 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
1da177e4 73 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
49559854 74 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
1da177e4 75 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
2648345f 76 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW
77 { "rx_missed_errors", E1000_STAT(stats.mpc) },
78 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
79 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
1da177e4
LT
80 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
81 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
49559854 82 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT
83 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
84 { "tx_deferred_ok", E1000_STAT(stats.dc) },
85 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
86 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 87 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 88 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT
89 { "rx_long_length_errors", E1000_STAT(stats.roc) },
90 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
91 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
92 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
93 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
94 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
95 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
96 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
97 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
98 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
99 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9
MC
100 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
101 { "rx_header_split", E1000_STAT(rx_hdr_split) },
6b7660cd 102 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
15e376b4
JG
103 { "tx_smbus", E1000_STAT(stats.mgptc) },
104 { "rx_smbus", E1000_STAT(stats.mgprc) },
105 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
1da177e4 106};
7bfa4816 107
7bfa4816 108#define E1000_QUEUE_STATS_LEN 0
ff8ac609 109#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
7bfa4816 110#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT
111static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
112 "Register test (offline)", "Eeprom test (offline)",
113 "Interrupt test (offline)", "Loopback test (offline)",
114 "Link test (on/offline)"
115};
116#define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
117
118static int
119e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
120{
60490fe0 121 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
122 struct e1000_hw *hw = &adapter->hw;
123
96838a40 124 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
125
126 ecmd->supported = (SUPPORTED_10baseT_Half |
127 SUPPORTED_10baseT_Full |
128 SUPPORTED_100baseT_Half |
129 SUPPORTED_100baseT_Full |
130 SUPPORTED_1000baseT_Full|
131 SUPPORTED_Autoneg |
132 SUPPORTED_TP);
cd94dd0b
AK
133 if (hw->phy_type == e1000_phy_ife)
134 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
1da177e4
LT
135 ecmd->advertising = ADVERTISED_TP;
136
96838a40 137 if (hw->autoneg == 1) {
1da177e4 138 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 139 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT
140 ecmd->advertising |= hw->autoneg_advertised;
141 }
142
143 ecmd->port = PORT_TP;
144 ecmd->phy_address = hw->phy_addr;
145
96838a40 146 if (hw->mac_type == e1000_82543)
1da177e4
LT
147 ecmd->transceiver = XCVR_EXTERNAL;
148 else
149 ecmd->transceiver = XCVR_INTERNAL;
150
151 } else {
152 ecmd->supported = (SUPPORTED_1000baseT_Full |
153 SUPPORTED_FIBRE |
154 SUPPORTED_Autoneg);
155
012609a8
MC
156 ecmd->advertising = (ADVERTISED_1000baseT_Full |
157 ADVERTISED_FIBRE |
158 ADVERTISED_Autoneg);
1da177e4
LT
159
160 ecmd->port = PORT_FIBRE;
161
96838a40 162 if (hw->mac_type >= e1000_82545)
1da177e4
LT
163 ecmd->transceiver = XCVR_INTERNAL;
164 else
165 ecmd->transceiver = XCVR_EXTERNAL;
166 }
167
ca6efb7d 168 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
1da177e4
LT
169
170 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
171 &adapter->link_duplex);
172 ecmd->speed = adapter->link_speed;
173
174 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
175 * and HALF_DUPLEX != DUPLEX_HALF */
176
96838a40 177 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT
178 ecmd->duplex = DUPLEX_FULL;
179 else
180 ecmd->duplex = DUPLEX_HALF;
181 } else {
182 ecmd->speed = -1;
183 ecmd->duplex = -1;
184 }
185
186 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
187 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
188 return 0;
189}
190
191static int
192e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
193{
60490fe0 194 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
195 struct e1000_hw *hw = &adapter->hw;
196
57128197
JK
197 /* When SoL/IDER sessions are active, autoneg/speed/duplex
198 * cannot be changed */
199 if (e1000_check_phy_reset_block(hw)) {
200 DPRINTK(DRV, ERR, "Cannot change link characteristics "
201 "when SoL/IDER is active.\n");
202 return -EINVAL;
203 }
204
1a821ca5
JB
205 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
206 msleep(1);
207
57128197 208 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 209 hw->autoneg = 1;
96838a40 210 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC
211 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
212 ADVERTISED_FIBRE |
213 ADVERTISED_Autoneg;
96838a40 214 else
2f2ca263
JK
215 hw->autoneg_advertised = ecmd->advertising |
216 ADVERTISED_TP |
217 ADVERTISED_Autoneg;
012609a8 218 ecmd->advertising = hw->autoneg_advertised;
1da177e4 219 } else
1a821ca5
JB
220 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
221 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 222 return -EINVAL;
1a821ca5 223 }
1da177e4
LT
224
225 /* reset the link */
226
1a821ca5
JB
227 if (netif_running(adapter->netdev)) {
228 e1000_down(adapter);
229 e1000_up(adapter);
230 } else
1da177e4
LT
231 e1000_reset(adapter);
232
1a821ca5 233 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
234 return 0;
235}
236
237static void
238e1000_get_pauseparam(struct net_device *netdev,
239 struct ethtool_pauseparam *pause)
240{
60490fe0 241 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
242 struct e1000_hw *hw = &adapter->hw;
243
96838a40 244 pause->autoneg =
1da177e4 245 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 246
11241b10 247 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 248 pause->rx_pause = 1;
11241b10 249 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 250 pause->tx_pause = 1;
11241b10 251 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT
252 pause->rx_pause = 1;
253 pause->tx_pause = 1;
254 }
255}
256
257static int
258e1000_set_pauseparam(struct net_device *netdev,
259 struct ethtool_pauseparam *pause)
260{
60490fe0 261 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 262 struct e1000_hw *hw = &adapter->hw;
1a821ca5 263 int retval = 0;
96838a40 264
1da177e4
LT
265 adapter->fc_autoneg = pause->autoneg;
266
1a821ca5
JB
267 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
268 msleep(1);
269
96838a40 270 if (pause->rx_pause && pause->tx_pause)
11241b10 271 hw->fc = E1000_FC_FULL;
96838a40 272 else if (pause->rx_pause && !pause->tx_pause)
11241b10 273 hw->fc = E1000_FC_RX_PAUSE;
96838a40 274 else if (!pause->rx_pause && pause->tx_pause)
11241b10 275 hw->fc = E1000_FC_TX_PAUSE;
96838a40 276 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 277 hw->fc = E1000_FC_NONE;
1da177e4
LT
278
279 hw->original_fc = hw->fc;
280
96838a40 281 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB
282 if (netif_running(adapter->netdev)) {
283 e1000_down(adapter);
284 e1000_up(adapter);
285 } else
1da177e4 286 e1000_reset(adapter);
96838a40 287 } else
1a821ca5 288 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 289 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 290
1a821ca5
JB
291 clear_bit(__E1000_RESETTING, &adapter->flags);
292 return retval;
1da177e4
LT
293}
294
295static uint32_t
296e1000_get_rx_csum(struct net_device *netdev)
297{
60490fe0 298 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
299 return adapter->rx_csum;
300}
301
302static int
303e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
304{
60490fe0 305 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
306 adapter->rx_csum = data;
307
2db10a08
AK
308 if (netif_running(netdev))
309 e1000_reinit_locked(adapter);
310 else
1da177e4
LT
311 e1000_reset(adapter);
312 return 0;
313}
96838a40 314
1da177e4
LT
315static uint32_t
316e1000_get_tx_csum(struct net_device *netdev)
317{
318 return (netdev->features & NETIF_F_HW_CSUM) != 0;
319}
320
321static int
322e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
323{
60490fe0 324 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 325
96838a40 326 if (adapter->hw.mac_type < e1000_82543) {
1da177e4
LT
327 if (!data)
328 return -EINVAL;
329 return 0;
330 }
331
332 if (data)
333 netdev->features |= NETIF_F_HW_CSUM;
334 else
335 netdev->features &= ~NETIF_F_HW_CSUM;
336
337 return 0;
338}
339
1da177e4
LT
340static int
341e1000_set_tso(struct net_device *netdev, uint32_t data)
342{
60490fe0 343 struct e1000_adapter *adapter = netdev_priv(netdev);
96838a40
JB
344 if ((adapter->hw.mac_type < e1000_82544) ||
345 (adapter->hw.mac_type == e1000_82547))
1da177e4
LT
346 return data ? -EINVAL : 0;
347
348 if (data)
349 netdev->features |= NETIF_F_TSO;
350 else
351 netdev->features &= ~NETIF_F_TSO;
7e6c9861 352
87ca4e5b
AK
353 if (data)
354 netdev->features |= NETIF_F_TSO6;
355 else
356 netdev->features &= ~NETIF_F_TSO6;
87ca4e5b 357
7e6c9861
JK
358 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
359 adapter->tso_force = TRUE;
1da177e4 360 return 0;
96838a40 361}
1da177e4
LT
362
363static uint32_t
364e1000_get_msglevel(struct net_device *netdev)
365{
60490fe0 366 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
367 return adapter->msg_enable;
368}
369
370static void
371e1000_set_msglevel(struct net_device *netdev, uint32_t data)
372{
60490fe0 373 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
374 adapter->msg_enable = data;
375}
376
96838a40 377static int
1da177e4
LT
378e1000_get_regs_len(struct net_device *netdev)
379{
380#define E1000_REGS_LEN 32
381 return E1000_REGS_LEN * sizeof(uint32_t);
382}
383
384static void
385e1000_get_regs(struct net_device *netdev,
386 struct ethtool_regs *regs, void *p)
387{
60490fe0 388 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
389 struct e1000_hw *hw = &adapter->hw;
390 uint32_t *regs_buff = p;
391 uint16_t phy_data;
392
393 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
394
395 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
396
397 regs_buff[0] = E1000_READ_REG(hw, CTRL);
398 regs_buff[1] = E1000_READ_REG(hw, STATUS);
399
400 regs_buff[2] = E1000_READ_REG(hw, RCTL);
401 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
402 regs_buff[4] = E1000_READ_REG(hw, RDH);
403 regs_buff[5] = E1000_READ_REG(hw, RDT);
404 regs_buff[6] = E1000_READ_REG(hw, RDTR);
405
406 regs_buff[7] = E1000_READ_REG(hw, TCTL);
407 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
408 regs_buff[9] = E1000_READ_REG(hw, TDH);
409 regs_buff[10] = E1000_READ_REG(hw, TDT);
410 regs_buff[11] = E1000_READ_REG(hw, TIDV);
411
412 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 413 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT
414 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
415 IGP01E1000_PHY_AGC_A);
416 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
417 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
418 regs_buff[13] = (uint32_t)phy_data; /* cable length */
419 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
420 IGP01E1000_PHY_AGC_B);
421 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
422 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
423 regs_buff[14] = (uint32_t)phy_data; /* cable length */
424 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
425 IGP01E1000_PHY_AGC_C);
426 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
427 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
428 regs_buff[15] = (uint32_t)phy_data; /* cable length */
429 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
430 IGP01E1000_PHY_AGC_D);
431 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
432 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
433 regs_buff[16] = (uint32_t)phy_data; /* cable length */
434 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
435 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
436 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
437 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
438 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
439 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
440 IGP01E1000_PHY_PCS_INIT_REG);
441 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
442 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
443 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
444 regs_buff[20] = 0; /* polarity correction enabled (always) */
445 regs_buff[22] = 0; /* phy receive errors (unavailable) */
446 regs_buff[23] = regs_buff[18]; /* mdix mode */
447 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
448 } else {
8fc897b0 449 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1da177e4
LT
450 regs_buff[13] = (uint32_t)phy_data; /* cable length */
451 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
452 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
453 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 454 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1da177e4
LT
455 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
456 regs_buff[18] = regs_buff[13]; /* cable polarity */
457 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
458 regs_buff[20] = regs_buff[17]; /* polarity correction */
459 /* phy receive errors */
460 regs_buff[22] = adapter->phy_stats.receive_errors;
461 regs_buff[23] = regs_buff[13]; /* mdix mode */
462 }
463 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
464 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
465 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
466 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 467 if (hw->mac_type >= e1000_82540 &&
4ccc12ae
JB
468 hw->mac_type < e1000_82571 &&
469 hw->media_type == e1000_media_type_copper) {
1da177e4
LT
470 regs_buff[26] = E1000_READ_REG(hw, MANC);
471 }
472}
473
474static int
475e1000_get_eeprom_len(struct net_device *netdev)
476{
60490fe0 477 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
478 return adapter->hw.eeprom.word_size * 2;
479}
480
481static int
482e1000_get_eeprom(struct net_device *netdev,
483 struct ethtool_eeprom *eeprom, uint8_t *bytes)
484{
60490fe0 485 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
486 struct e1000_hw *hw = &adapter->hw;
487 uint16_t *eeprom_buff;
488 int first_word, last_word;
489 int ret_val = 0;
490 uint16_t i;
491
96838a40 492 if (eeprom->len == 0)
1da177e4
LT
493 return -EINVAL;
494
495 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
496
497 first_word = eeprom->offset >> 1;
498 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
499
500 eeprom_buff = kmalloc(sizeof(uint16_t) *
501 (last_word - first_word + 1), GFP_KERNEL);
96838a40 502 if (!eeprom_buff)
1da177e4
LT
503 return -ENOMEM;
504
96838a40 505 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT
506 ret_val = e1000_read_eeprom(hw, first_word,
507 last_word - first_word + 1,
508 eeprom_buff);
509 else {
510 for (i = 0; i < last_word - first_word + 1; i++)
96838a40 511 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
1da177e4
LT
512 &eeprom_buff[i])))
513 break;
514 }
515
516 /* Device's eeprom is always little-endian, word addressable */
517 for (i = 0; i < last_word - first_word + 1; i++)
518 le16_to_cpus(&eeprom_buff[i]);
519
520 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
521 eeprom->len);
522 kfree(eeprom_buff);
523
524 return ret_val;
525}
526
527static int
528e1000_set_eeprom(struct net_device *netdev,
529 struct ethtool_eeprom *eeprom, uint8_t *bytes)
530{
60490fe0 531 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
532 struct e1000_hw *hw = &adapter->hw;
533 uint16_t *eeprom_buff;
534 void *ptr;
535 int max_len, first_word, last_word, ret_val = 0;
536 uint16_t i;
537
96838a40 538 if (eeprom->len == 0)
1da177e4
LT
539 return -EOPNOTSUPP;
540
96838a40 541 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT
542 return -EFAULT;
543
544 max_len = hw->eeprom.word_size * 2;
545
546 first_word = eeprom->offset >> 1;
547 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
548 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 549 if (!eeprom_buff)
1da177e4
LT
550 return -ENOMEM;
551
552 ptr = (void *)eeprom_buff;
553
96838a40 554 if (eeprom->offset & 1) {
1da177e4
LT
555 /* need read/modify/write of first changed EEPROM word */
556 /* only the second byte of the word is being modified */
557 ret_val = e1000_read_eeprom(hw, first_word, 1,
558 &eeprom_buff[0]);
559 ptr++;
560 }
96838a40 561 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT
562 /* need read/modify/write of last changed EEPROM word */
563 /* only the first byte of the word is being modified */
564 ret_val = e1000_read_eeprom(hw, last_word, 1,
565 &eeprom_buff[last_word - first_word]);
566 }
567
568 /* Device's eeprom is always little-endian, word addressable */
569 for (i = 0; i < last_word - first_word + 1; i++)
570 le16_to_cpus(&eeprom_buff[i]);
571
572 memcpy(ptr, bytes, eeprom->len);
573
574 for (i = 0; i < last_word - first_word + 1; i++)
575 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
576
577 ret_val = e1000_write_eeprom(hw, first_word,
578 last_word - first_word + 1, eeprom_buff);
579
96838a40 580 /* Update the checksum over the first part of the EEPROM if needed
a7990ba6 581 * and flush shadow RAM for 82573 conrollers */
96838a40 582 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
a7990ba6 583 (hw->mac_type == e1000_82573)))
1da177e4
LT
584 e1000_update_eeprom_checksum(hw);
585
586 kfree(eeprom_buff);
587 return ret_val;
588}
589
590static void
591e1000_get_drvinfo(struct net_device *netdev,
592 struct ethtool_drvinfo *drvinfo)
593{
60490fe0 594 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22
JK
595 char firmware_version[32];
596 uint16_t eeprom_data;
1da177e4
LT
597
598 strncpy(drvinfo->driver, e1000_driver_name, 32);
599 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22
JK
600
601 /* EEPROM image version # is reported as firmware version # for
602 * 8257{1|2|3} controllers */
603 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
604 switch (adapter->hw.mac_type) {
605 case e1000_82571:
606 case e1000_82572:
607 case e1000_82573:
6418ecc6 608 case e1000_80003es2lan:
cd94dd0b 609 case e1000_ich8lan:
a2917e22
JK
610 sprintf(firmware_version, "%d.%d-%d",
611 (eeprom_data & 0xF000) >> 12,
612 (eeprom_data & 0x0FF0) >> 4,
613 eeprom_data & 0x000F);
614 break;
615 default:
616 sprintf(firmware_version, "N/A");
617 }
618
619 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4 620 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
1da177e4
LT
621 drvinfo->regdump_len = e1000_get_regs_len(netdev);
622 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
623}
624
625static void
626e1000_get_ringparam(struct net_device *netdev,
627 struct ethtool_ringparam *ring)
628{
60490fe0 629 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 630 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC
631 struct e1000_tx_ring *txdr = adapter->tx_ring;
632 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT
633
634 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
635 E1000_MAX_82544_RXD;
636 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
637 E1000_MAX_82544_TXD;
638 ring->rx_mini_max_pending = 0;
639 ring->rx_jumbo_max_pending = 0;
640 ring->rx_pending = rxdr->count;
641 ring->tx_pending = txdr->count;
642 ring->rx_mini_pending = 0;
643 ring->rx_jumbo_pending = 0;
644}
645
96838a40 646static int
1da177e4
LT
647e1000_set_ringparam(struct net_device *netdev,
648 struct ethtool_ringparam *ring)
649{
60490fe0 650 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 651 e1000_mac_type mac_type = adapter->hw.mac_type;
793fab72
VA
652 struct e1000_tx_ring *txdr, *tx_old;
653 struct e1000_rx_ring *rxdr, *rx_old;
1c7e5b12 654 int i, err;
581d708e 655
0989aa43
JK
656 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
657 return -EINVAL;
658
2db10a08
AK
659 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
660 msleep(1);
661
581d708e
MC
662 if (netif_running(adapter->netdev))
663 e1000_down(adapter);
1da177e4
LT
664
665 tx_old = adapter->tx_ring;
666 rx_old = adapter->rx_ring;
667
793fab72 668 err = -ENOMEM;
1c7e5b12 669 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL);
793fab72
VA
670 if (!txdr)
671 goto err_alloc_tx;
581d708e 672
1c7e5b12 673 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL);
793fab72
VA
674 if (!rxdr)
675 goto err_alloc_rx;
581d708e 676
793fab72
VA
677 adapter->tx_ring = txdr;
678 adapter->rx_ring = rxdr;
581d708e 679
1da177e4
LT
680 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
681 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
682 E1000_MAX_RXD : E1000_MAX_82544_RXD));
9099cfb9 683 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4
LT
684
685 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
686 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
687 E1000_MAX_TXD : E1000_MAX_82544_TXD));
9099cfb9 688 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 689
f56799ea 690 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 691 txdr[i].count = txdr->count;
f56799ea 692 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 693 rxdr[i].count = rxdr->count;
581d708e 694
96838a40 695 if (netif_running(adapter->netdev)) {
1da177e4 696 /* Try to get new resources before deleting old */
581d708e 697 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4 698 goto err_setup_rx;
581d708e 699 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT
700 goto err_setup_tx;
701
702 /* save the new, restore the old in order to free it,
703 * then restore the new back again */
704
1da177e4
LT
705 adapter->rx_ring = rx_old;
706 adapter->tx_ring = tx_old;
581d708e
MC
707 e1000_free_all_rx_resources(adapter);
708 e1000_free_all_tx_resources(adapter);
709 kfree(tx_old);
710 kfree(rx_old);
793fab72
VA
711 adapter->rx_ring = rxdr;
712 adapter->tx_ring = txdr;
96838a40 713 if ((err = e1000_up(adapter)))
2db10a08 714 goto err_setup;
1da177e4
LT
715 }
716
2db10a08 717 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
718 return 0;
719err_setup_tx:
581d708e 720 e1000_free_all_rx_resources(adapter);
1da177e4
LT
721err_setup_rx:
722 adapter->rx_ring = rx_old;
723 adapter->tx_ring = tx_old;
793fab72
VA
724 kfree(rxdr);
725err_alloc_rx:
726 kfree(txdr);
727err_alloc_tx:
1da177e4 728 e1000_up(adapter);
2db10a08
AK
729err_setup:
730 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
731 return err;
732}
733
734#define REG_PATTERN_TEST(R, M, W) \
735{ \
736 uint32_t pat, value; \
737 uint32_t test[] = \
738 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
c38db30b 739 for (pat = 0; pat < ARRAY_SIZE(test); pat++) { \
1da177e4
LT
740 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
741 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 742 if (value != (test[pat] & W & M)) { \
b01f6691
MC
743 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
744 "0x%08X expected 0x%08X\n", \
745 E1000_##R, value, (test[pat] & W & M)); \
1da177e4
LT
746 *data = (adapter->hw.mac_type < e1000_82543) ? \
747 E1000_82542_##R : E1000_##R; \
748 return 1; \
749 } \
750 } \
751}
752
753#define REG_SET_AND_CHECK(R, M, W) \
754{ \
755 uint32_t value; \
756 E1000_WRITE_REG(&adapter->hw, R, W & M); \
757 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 758 if ((W & M) != (value & M)) { \
b01f6691
MC
759 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
760 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
1da177e4
LT
761 *data = (adapter->hw.mac_type < e1000_82543) ? \
762 E1000_82542_##R : E1000_##R; \
763 return 1; \
764 } \
765}
766
767static int
768e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
769{
b01f6691
MC
770 uint32_t value, before, after;
771 uint32_t i, toggle;
1da177e4
LT
772
773 /* The status register is Read Only, so a write should fail.
774 * Some bits that get toggled are ignored.
775 */
90fb5135 776 switch (adapter->hw.mac_type) {
868d5309
MC
777 /* there are several bits on newer hardware that are r/w */
778 case e1000_82571:
779 case e1000_82572:
6418ecc6 780 case e1000_80003es2lan:
868d5309
MC
781 toggle = 0x7FFFF3FF;
782 break;
b01f6691 783 case e1000_82573:
cd94dd0b 784 case e1000_ich8lan:
b01f6691
MC
785 toggle = 0x7FFFF033;
786 break;
787 default:
788 toggle = 0xFFFFF833;
789 break;
790 }
791
792 before = E1000_READ_REG(&adapter->hw, STATUS);
793 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
794 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
795 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
96838a40 796 if (value != after) {
b01f6691
MC
797 DPRINTK(DRV, ERR, "failed STATUS register test got: "
798 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT
799 *data = 1;
800 return 1;
801 }
b01f6691
MC
802 /* restore previous status */
803 E1000_WRITE_REG(&adapter->hw, STATUS, before);
90fb5135 804
cd94dd0b
AK
805 if (adapter->hw.mac_type != e1000_ich8lan) {
806 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
807 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
808 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
809 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
810 }
90fb5135 811
1da177e4
LT
812 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
813 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
814 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
815 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
816 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
817 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
818 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
819 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
820 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
821 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
822
823 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 824
cd94dd0b 825 before = (adapter->hw.mac_type == e1000_ich8lan ?
90fb5135 826 0x06C3B33E : 0x06DFB3FE);
cd94dd0b 827 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT
828 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
829
96838a40 830 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4 831
cd94dd0b 832 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 833 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
cd94dd0b
AK
834 if (adapter->hw.mac_type != e1000_ich8lan)
835 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT
836 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
837 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
cd94dd0b 838 value = (adapter->hw.mac_type == e1000_ich8lan ?
90fb5135 839 E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
cd94dd0b 840 for (i = 0; i < value; i++) {
1da177e4 841 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 842 0xFFFFFFFF);
1da177e4
LT
843 }
844
845 } else {
846
847 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
848 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
849 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
850 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
851
852 }
853
cd94dd0b
AK
854 value = (adapter->hw.mac_type == e1000_ich8lan ?
855 E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
856 for (i = 0; i < value; i++)
1da177e4
LT
857 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
858
859 *data = 0;
860 return 0;
861}
862
863static int
864e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
865{
866 uint16_t temp;
867 uint16_t checksum = 0;
868 uint16_t i;
869
870 *data = 0;
871 /* Read and add up the contents of the EEPROM */
96838a40
JB
872 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
873 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
1da177e4
LT
874 *data = 1;
875 break;
876 }
877 checksum += temp;
878 }
879
880 /* If Checksum is not Correct return error else test passed */
96838a40 881 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
1da177e4
LT
882 *data = 2;
883
884 return *data;
885}
886
887static irqreturn_t
90fb5135 888e1000_test_intr(int irq, void *data)
1da177e4
LT
889{
890 struct net_device *netdev = (struct net_device *) data;
60490fe0 891 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
892
893 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
894
895 return IRQ_HANDLED;
896}
897
898static int
899e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
900{
901 struct net_device *netdev = adapter->netdev;
76c224bc
AK
902 uint32_t mask, i=0, shared_int = TRUE;
903 uint32_t irq = adapter->pdev->irq;
1da177e4
LT
904
905 *data = 0;
906
8fc897b0 907 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 908 /* Hook up test interrupt handler just for this test */
90fb5135
AK
909 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
910 netdev))
8fc897b0
AK
911 shared_int = FALSE;
912 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
90fb5135 913 netdev->name, netdev)) {
1da177e4
LT
914 *data = 1;
915 return -1;
916 }
8fc897b0 917 DPRINTK(HW, INFO, "testing %s interrupt\n",
b9b6e78b 918 (shared_int ? "shared" : "unshared"));
1da177e4
LT
919
920 /* Disable all the interrupts */
921 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
f8ec4733 922 msleep(10);
1da177e4
LT
923
924 /* Test each interrupt */
96838a40 925 for (; i < 10; i++) {
1da177e4 926
cd94dd0b
AK
927 if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
928 continue;
90fb5135 929
1da177e4
LT
930 /* Interrupt to test */
931 mask = 1 << i;
932
76c224bc
AK
933 if (!shared_int) {
934 /* Disable the interrupt to be reported in
935 * the cause register and then force the same
936 * interrupt and see if one gets posted. If
937 * an interrupt was posted to the bus, the
938 * test failed.
939 */
940 adapter->test_icr = 0;
941 E1000_WRITE_REG(&adapter->hw, IMC, mask);
942 E1000_WRITE_REG(&adapter->hw, ICS, mask);
f8ec4733 943 msleep(10);
76c224bc
AK
944
945 if (adapter->test_icr & mask) {
946 *data = 3;
947 break;
948 }
1da177e4
LT
949 }
950
951 /* Enable the interrupt to be reported in
952 * the cause register and then force the same
953 * interrupt and see if one gets posted. If
954 * an interrupt was not posted to the bus, the
955 * test failed.
956 */
957 adapter->test_icr = 0;
958 E1000_WRITE_REG(&adapter->hw, IMS, mask);
959 E1000_WRITE_REG(&adapter->hw, ICS, mask);
f8ec4733 960 msleep(10);
1da177e4 961
96838a40 962 if (!(adapter->test_icr & mask)) {
1da177e4
LT
963 *data = 4;
964 break;
965 }
966
76c224bc 967 if (!shared_int) {
1da177e4
LT
968 /* Disable the other interrupts to be reported in
969 * the cause register and then force the other
970 * interrupts and see if any get posted. If
971 * an interrupt was posted to the bus, the
972 * test failed.
973 */
974 adapter->test_icr = 0;
2648345f
MC
975 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
976 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
f8ec4733 977 msleep(10);
1da177e4 978
96838a40 979 if (adapter->test_icr) {
1da177e4
LT
980 *data = 5;
981 break;
982 }
983 }
984 }
985
986 /* Disable all the interrupts */
987 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
f8ec4733 988 msleep(10);
1da177e4
LT
989
990 /* Unhook test interrupt handler */
991 free_irq(irq, netdev);
992
993 return *data;
994}
995
996static void
997e1000_free_desc_rings(struct e1000_adapter *adapter)
998{
581d708e
MC
999 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1000 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
1001 struct pci_dev *pdev = adapter->pdev;
1002 int i;
1003
96838a40
JB
1004 if (txdr->desc && txdr->buffer_info) {
1005 for (i = 0; i < txdr->count; i++) {
1006 if (txdr->buffer_info[i].dma)
1da177e4
LT
1007 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
1008 txdr->buffer_info[i].length,
1009 PCI_DMA_TODEVICE);
96838a40 1010 if (txdr->buffer_info[i].skb)
1da177e4
LT
1011 dev_kfree_skb(txdr->buffer_info[i].skb);
1012 }
1013 }
1014
96838a40
JB
1015 if (rxdr->desc && rxdr->buffer_info) {
1016 for (i = 0; i < rxdr->count; i++) {
1017 if (rxdr->buffer_info[i].dma)
1da177e4
LT
1018 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
1019 rxdr->buffer_info[i].length,
1020 PCI_DMA_FROMDEVICE);
96838a40 1021 if (rxdr->buffer_info[i].skb)
1da177e4
LT
1022 dev_kfree_skb(rxdr->buffer_info[i].skb);
1023 }
1024 }
1025
f5645110 1026 if (txdr->desc) {
1da177e4 1027 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
6b27adb6
JL
1028 txdr->desc = NULL;
1029 }
f5645110 1030 if (rxdr->desc) {
1da177e4 1031 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
6b27adb6
JL
1032 rxdr->desc = NULL;
1033 }
1da177e4 1034
b4558ea9 1035 kfree(txdr->buffer_info);
6b27adb6 1036 txdr->buffer_info = NULL;
b4558ea9 1037 kfree(rxdr->buffer_info);
6b27adb6 1038 rxdr->buffer_info = NULL;
f5645110 1039
1da177e4
LT
1040 return;
1041}
1042
1043static int
1044e1000_setup_desc_rings(struct e1000_adapter *adapter)
1045{
581d708e
MC
1046 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1047 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
1048 struct pci_dev *pdev = adapter->pdev;
1049 uint32_t rctl;
1c7e5b12 1050 int i, ret_val;
1da177e4
LT
1051
1052 /* Setup Tx descriptor ring and Tx buffers */
1053
96838a40
JB
1054 if (!txdr->count)
1055 txdr->count = E1000_DEFAULT_TXD;
1da177e4 1056
1c7e5b12
YB
1057 if (!(txdr->buffer_info = kcalloc(txdr->count,
1058 sizeof(struct e1000_buffer),
1059 GFP_KERNEL))) {
1da177e4
LT
1060 ret_val = 1;
1061 goto err_nomem;
1062 }
1da177e4
LT
1063
1064 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1065 txdr->size = ALIGN(txdr->size, 4096);
1c7e5b12
YB
1066 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size,
1067 &txdr->dma))) {
1da177e4
LT
1068 ret_val = 2;
1069 goto err_nomem;
1070 }
1071 memset(txdr->desc, 0, txdr->size);
1072 txdr->next_to_use = txdr->next_to_clean = 0;
1073
1074 E1000_WRITE_REG(&adapter->hw, TDBAL,
1075 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1076 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1077 E1000_WRITE_REG(&adapter->hw, TDLEN,
1078 txdr->count * sizeof(struct e1000_tx_desc));
1079 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1080 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1081 E1000_WRITE_REG(&adapter->hw, TCTL,
1082 E1000_TCTL_PSP | E1000_TCTL_EN |
1083 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1084 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1085
96838a40 1086 for (i = 0; i < txdr->count; i++) {
1da177e4
LT
1087 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1088 struct sk_buff *skb;
1089 unsigned int size = 1024;
1090
96838a40 1091 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1da177e4
LT
1092 ret_val = 3;
1093 goto err_nomem;
1094 }
1095 skb_put(skb, size);
1096 txdr->buffer_info[i].skb = skb;
1097 txdr->buffer_info[i].length = skb->len;
1098 txdr->buffer_info[i].dma =
1099 pci_map_single(pdev, skb->data, skb->len,
1100 PCI_DMA_TODEVICE);
1101 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1102 tx_desc->lower.data = cpu_to_le32(skb->len);
1103 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1104 E1000_TXD_CMD_IFCS |
1105 E1000_TXD_CMD_RPS);
1106 tx_desc->upper.data = 0;
1107 }
1108
1109 /* Setup Rx descriptor ring and Rx buffers */
1110
96838a40
JB
1111 if (!rxdr->count)
1112 rxdr->count = E1000_DEFAULT_RXD;
1da177e4 1113
1c7e5b12
YB
1114 if (!(rxdr->buffer_info = kcalloc(rxdr->count,
1115 sizeof(struct e1000_buffer),
1116 GFP_KERNEL))) {
1da177e4
LT
1117 ret_val = 4;
1118 goto err_nomem;
1119 }
1da177e4
LT
1120
1121 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
96838a40 1122 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1da177e4
LT
1123 ret_val = 5;
1124 goto err_nomem;
1125 }
1126 memset(rxdr->desc, 0, rxdr->size);
1127 rxdr->next_to_use = rxdr->next_to_clean = 0;
1128
1129 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1130 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1131 E1000_WRITE_REG(&adapter->hw, RDBAL,
1132 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1133 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1134 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1135 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1136 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1137 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1138 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1139 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1140 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1141
96838a40 1142 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT
1143 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1144 struct sk_buff *skb;
1145
96838a40 1146 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1da177e4
LT
1147 GFP_KERNEL))) {
1148 ret_val = 6;
1149 goto err_nomem;
1150 }
1151 skb_reserve(skb, NET_IP_ALIGN);
1152 rxdr->buffer_info[i].skb = skb;
1153 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1154 rxdr->buffer_info[i].dma =
1155 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1156 PCI_DMA_FROMDEVICE);
1157 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1158 memset(skb->data, 0x00, skb->len);
1159 }
1160
1161 return 0;
1162
1163err_nomem:
1164 e1000_free_desc_rings(adapter);
1165 return ret_val;
1166}
1167
1168static void
1169e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1170{
1171 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1172 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1173 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1174 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1175 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1176}
1177
1178static void
1179e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1180{
1181 uint16_t phy_reg;
1182
1183 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1184 * Extended PHY Specific Control Register to 25MHz clock. This
1185 * value defaults back to a 2.5MHz clock when the PHY is reset.
1186 */
1187 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1188 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1189 e1000_write_phy_reg(&adapter->hw,
1190 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1191
1192 /* In addition, because of the s/w reset above, we need to enable
1193 * CRS on TX. This must be set for both full and half duplex
1194 * operation.
1195 */
1196 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1197 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1198 e1000_write_phy_reg(&adapter->hw,
1199 M88E1000_PHY_SPEC_CTRL, phy_reg);
1200}
1201
1202static int
1203e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1204{
1205 uint32_t ctrl_reg;
1206 uint16_t phy_reg;
1207
1208 /* Setup the Device Control Register for PHY loopback test. */
1209
1210 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1211 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1212 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1213 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1214 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1215 E1000_CTRL_FD); /* Force Duplex to FULL */
1216
1217 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1218
1219 /* Read the PHY Specific Control Register (0x10) */
1220 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1221
1222 /* Clear Auto-Crossover bits in PHY Specific Control Register
1223 * (bits 6:5).
1224 */
1225 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1226 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1227
1228 /* Perform software reset on the PHY */
1229 e1000_phy_reset(&adapter->hw);
1230
1231 /* Have to setup TX_CLK and TX_CRS after software reset */
1232 e1000_phy_reset_clk_and_crs(adapter);
1233
1234 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1235
1236 /* Wait for reset to complete. */
1237 udelay(500);
1238
1239 /* Have to setup TX_CLK and TX_CRS after software reset */
1240 e1000_phy_reset_clk_and_crs(adapter);
1241
1242 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1243 e1000_phy_disable_receiver(adapter);
1244
1245 /* Set the loopback bit in the PHY control register. */
1246 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1247 phy_reg |= MII_CR_LOOPBACK;
1248 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1249
1250 /* Setup TX_CLK and TX_CRS one more time. */
1251 e1000_phy_reset_clk_and_crs(adapter);
1252
1253 /* Check Phy Configuration */
1254 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
96838a40 1255 if (phy_reg != 0x4100)
1da177e4
LT
1256 return 9;
1257
1258 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1259 if (phy_reg != 0x0070)
1da177e4
LT
1260 return 10;
1261
1262 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
96838a40 1263 if (phy_reg != 0x001A)
1da177e4
LT
1264 return 11;
1265
1266 return 0;
1267}
1268
1269static int
1270e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1271{
1272 uint32_t ctrl_reg = 0;
1273 uint32_t stat_reg = 0;
1274
1275 adapter->hw.autoneg = FALSE;
1276
96838a40 1277 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT
1278 /* Auto-MDI/MDIX Off */
1279 e1000_write_phy_reg(&adapter->hw,
1280 M88E1000_PHY_SPEC_CTRL, 0x0808);
1281 /* reset to update Auto-MDI/MDIX */
1282 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1283 /* autoneg off */
1284 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
8fc897b0 1285 } else if (adapter->hw.phy_type == e1000_phy_gg82563)
87041639
JK
1286 e1000_write_phy_reg(&adapter->hw,
1287 GG82563_PHY_KMRN_MODE_CTRL,
acfbc9fd 1288 0x1CC);
1da177e4 1289
1da177e4 1290 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
cd94dd0b
AK
1291
1292 if (adapter->hw.phy_type == e1000_phy_ife) {
1293 /* force 100, set loopback */
1294 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
1295
1296 /* Now set up the MAC to the same speed/duplex as the PHY. */
1297 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1298 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1299 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1300 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1301 E1000_CTRL_FD); /* Force Duplex to FULL */
1302 } else {
1303 /* force 1000, set loopback */
1304 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1305
1306 /* Now set up the MAC to the same speed/duplex as the PHY. */
1307 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1308 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1309 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1310 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1311 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1312 E1000_CTRL_FD); /* Force Duplex to FULL */
1313 }
1da177e4 1314
96838a40 1315 if (adapter->hw.media_type == e1000_media_type_copper &&
8fc897b0 1316 adapter->hw.phy_type == e1000_phy_m88)
1da177e4 1317 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1318 else {
1da177e4
LT
1319 /* Set the ILOS bit on the fiber Nic is half
1320 * duplex link is detected. */
1321 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 1322 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT
1323 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1324 }
1325
1326 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1327
1328 /* Disable the receiver on the PHY so when a cable is plugged in, the
1329 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1330 */
96838a40 1331 if (adapter->hw.phy_type == e1000_phy_m88)
1da177e4
LT
1332 e1000_phy_disable_receiver(adapter);
1333
1334 udelay(500);
1335
1336 return 0;
1337}
1338
1339static int
1340e1000_set_phy_loopback(struct e1000_adapter *adapter)
1341{
1342 uint16_t phy_reg = 0;
1343 uint16_t count = 0;
1344
1345 switch (adapter->hw.mac_type) {
1346 case e1000_82543:
96838a40 1347 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT
1348 /* Attempt to setup Loopback mode on Non-integrated PHY.
1349 * Some PHY registers get corrupted at random, so
1350 * attempt this 10 times.
1351 */
96838a40 1352 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1353 count++ < 10);
96838a40 1354 if (count < 11)
1da177e4
LT
1355 return 0;
1356 }
1357 break;
1358
1359 case e1000_82544:
1360 case e1000_82540:
1361 case e1000_82545:
1362 case e1000_82545_rev_3:
1363 case e1000_82546:
1364 case e1000_82546_rev_3:
1365 case e1000_82541:
1366 case e1000_82541_rev_2:
1367 case e1000_82547:
1368 case e1000_82547_rev_2:
868d5309
MC
1369 case e1000_82571:
1370 case e1000_82572:
4564327b 1371 case e1000_82573:
6418ecc6 1372 case e1000_80003es2lan:
cd94dd0b 1373 case e1000_ich8lan:
1da177e4
LT
1374 return e1000_integrated_phy_loopback(adapter);
1375 break;
1376
1377 default:
1378 /* Default PHY loopback work is to read the MII
1379 * control register and assert bit 14 (loopback mode).
1380 */
1381 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1382 phy_reg |= MII_CR_LOOPBACK;
1383 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1384 return 0;
1385 break;
1386 }
1387
1388 return 8;
1389}
1390
1391static int
1392e1000_setup_loopback_test(struct e1000_adapter *adapter)
1393{
49273163 1394 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1395 uint32_t rctl;
1396
49273163
JK
1397 if (hw->media_type == e1000_media_type_fiber ||
1398 hw->media_type == e1000_media_type_internal_serdes) {
1399 switch (hw->mac_type) {
1400 case e1000_82545:
1401 case e1000_82546:
1402 case e1000_82545_rev_3:
1403 case e1000_82546_rev_3:
1da177e4 1404 return e1000_set_phy_loopback(adapter);
49273163
JK
1405 break;
1406 case e1000_82571:
1407 case e1000_82572:
1408#define E1000_SERDES_LB_ON 0x410
1409 e1000_set_phy_loopback(adapter);
1410 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
f8ec4733 1411 msleep(10);
49273163
JK
1412 return 0;
1413 break;
1414 default:
1415 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1416 rctl |= E1000_RCTL_LBM_TCVR;
49273163 1417 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT
1418 return 0;
1419 }
49273163 1420 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT
1421 return e1000_set_phy_loopback(adapter);
1422
1423 return 7;
1424}
1425
1426static void
1427e1000_loopback_cleanup(struct e1000_adapter *adapter)
1428{
49273163 1429 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1430 uint32_t rctl;
1431 uint16_t phy_reg;
1432
49273163 1433 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1434 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
49273163 1435 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4 1436
49273163
JK
1437 switch (hw->mac_type) {
1438 case e1000_82571:
1439 case e1000_82572:
1440 if (hw->media_type == e1000_media_type_fiber ||
1441 hw->media_type == e1000_media_type_internal_serdes) {
1442#define E1000_SERDES_LB_OFF 0x400
1443 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
f8ec4733 1444 msleep(10);
49273163
JK
1445 break;
1446 }
1447 /* Fall Through */
1448 case e1000_82545:
1449 case e1000_82546:
1450 case e1000_82545_rev_3:
1451 case e1000_82546_rev_3:
1452 default:
1453 hw->autoneg = TRUE;
8fc897b0 1454 if (hw->phy_type == e1000_phy_gg82563)
87041639
JK
1455 e1000_write_phy_reg(hw,
1456 GG82563_PHY_KMRN_MODE_CTRL,
1457 0x180);
49273163
JK
1458 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1459 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1460 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK
1461 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1462 e1000_phy_reset(hw);
1da177e4 1463 }
49273163 1464 break;
1da177e4
LT
1465 }
1466}
1467
1468static void
1469e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1470{
1471 memset(skb->data, 0xFF, frame_size);
ce7393b9 1472 frame_size &= ~1;
1da177e4
LT
1473 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1474 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1475 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1476}
1477
1478static int
1479e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1480{
ce7393b9 1481 frame_size &= ~1;
96838a40
JB
1482 if (*(skb->data + 3) == 0xFF) {
1483 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT
1484 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1485 return 0;
1486 }
1487 }
1488 return 13;
1489}
1490
1491static int
1492e1000_run_loopback_test(struct e1000_adapter *adapter)
1493{
581d708e
MC
1494 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1495 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1496 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC
1497 int i, j, k, l, lc, good_cnt, ret_val=0;
1498 unsigned long time;
1da177e4
LT
1499
1500 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1501
96838a40 1502 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC
1503 * The idea is to wrap the largest ring a number of times using 64
1504 * send/receive pairs during each loop
1505 */
1da177e4 1506
96838a40 1507 if (rxdr->count <= txdr->count)
e4eff729
MC
1508 lc = ((txdr->count / 64) * 2) + 1;
1509 else
1510 lc = ((rxdr->count / 64) * 2) + 1;
1511
1512 k = l = 0;
96838a40
JB
1513 for (j = 0; j <= lc; j++) { /* loop count loop */
1514 for (i = 0; i < 64; i++) { /* send the packets */
1515 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1516 1024);
96838a40 1517 pci_dma_sync_single_for_device(pdev,
e4eff729
MC
1518 txdr->buffer_info[k].dma,
1519 txdr->buffer_info[k].length,
1520 PCI_DMA_TODEVICE);
96838a40 1521 if (unlikely(++k == txdr->count)) k = 0;
e4eff729
MC
1522 }
1523 E1000_WRITE_REG(&adapter->hw, TDT, k);
f8ec4733 1524 msleep(200);
e4eff729
MC
1525 time = jiffies; /* set the start time for the receive */
1526 good_cnt = 0;
1527 do { /* receive the sent packets */
96838a40 1528 pci_dma_sync_single_for_cpu(pdev,
e4eff729
MC
1529 rxdr->buffer_info[l].dma,
1530 rxdr->buffer_info[l].length,
1531 PCI_DMA_FROMDEVICE);
96838a40 1532
e4eff729
MC
1533 ret_val = e1000_check_lbtest_frame(
1534 rxdr->buffer_info[l].skb,
1535 1024);
96838a40 1536 if (!ret_val)
e4eff729 1537 good_cnt++;
96838a40
JB
1538 if (unlikely(++l == rxdr->count)) l = 0;
1539 /* time + 20 msecs (200 msecs on 2.4) is more than
1540 * enough time to complete the receives, if it's
e4eff729
MC
1541 * exceeded, break and error off
1542 */
1543 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1544 if (good_cnt != 64) {
e4eff729 1545 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1546 break;
e4eff729 1547 }
96838a40 1548 if (jiffies >= (time + 2)) {
e4eff729
MC
1549 ret_val = 14; /* error code for time out error */
1550 break;
1551 }
1552 } /* end loop count loop */
1da177e4
LT
1553 return ret_val;
1554}
1555
1556static int
1557e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1558{
57128197
JK
1559 /* PHY loopback cannot be performed if SoL/IDER
1560 * sessions are active */
1561 if (e1000_check_phy_reset_block(&adapter->hw)) {
1562 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1563 "when SoL/IDER is active.\n");
1564 *data = 0;
1565 goto out;
1566 }
1567
1568 if ((*data = e1000_setup_desc_rings(adapter)))
1569 goto out;
1570 if ((*data = e1000_setup_loopback_test(adapter)))
1571 goto err_loopback;
1da177e4
LT
1572 *data = e1000_run_loopback_test(adapter);
1573 e1000_loopback_cleanup(adapter);
57128197 1574
1da177e4 1575err_loopback:
57128197
JK
1576 e1000_free_desc_rings(adapter);
1577out:
1da177e4
LT
1578 return *data;
1579}
1580
1581static int
1582e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1583{
1584 *data = 0;
1da177e4
LT
1585 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1586 int i = 0;
1587 adapter->hw.serdes_link_down = TRUE;
1588
2648345f
MC
1589 /* On some blade server designs, link establishment
1590 * could take as long as 2-3 minutes */
1da177e4
LT
1591 do {
1592 e1000_check_for_link(&adapter->hw);
1593 if (adapter->hw.serdes_link_down == FALSE)
1594 return *data;
f8ec4733 1595 msleep(20);
1da177e4
LT
1596 } while (i++ < 3750);
1597
2648345f 1598 *data = 1;
1da177e4
LT
1599 } else {
1600 e1000_check_for_link(&adapter->hw);
96838a40 1601 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
f8ec4733 1602 msleep(4000);
1da177e4 1603
96838a40 1604 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1da177e4
LT
1605 *data = 1;
1606 }
1607 }
1608 return *data;
1609}
1610
96838a40 1611static int
b9f2c044 1612e1000_get_sset_count(struct net_device *netdev, int sset)
1da177e4 1613{
b9f2c044
JG
1614 switch (sset) {
1615 case ETH_SS_TEST:
1616 return E1000_TEST_LEN;
1617 case ETH_SS_STATS:
1618 return E1000_STATS_LEN;
1619 default:
1620 return -EOPNOTSUPP;
1621 }
1da177e4
LT
1622}
1623
d658266e
JB
1624extern void e1000_power_up_phy(struct e1000_adapter *);
1625
1da177e4
LT
1626static void
1627e1000_diag_test(struct net_device *netdev,
1628 struct ethtool_test *eth_test, uint64_t *data)
1629{
60490fe0 1630 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1631 boolean_t if_running = netif_running(netdev);
1632
1314bbf3 1633 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1634 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT
1635 /* Offline tests */
1636
1637 /* save speed, duplex, autoneg settings */
1638 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1639 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1640 uint8_t autoneg = adapter->hw.autoneg;
1641
d658266e
JB
1642 DPRINTK(HW, INFO, "offline testing starting\n");
1643
1da177e4
LT
1644 /* Link test performed before hardware reset so autoneg doesn't
1645 * interfere with test result */
96838a40 1646 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1647 eth_test->flags |= ETH_TEST_FL_FAILED;
1648
96838a40 1649 if (if_running)
2db10a08
AK
1650 /* indicate we're in test mode */
1651 dev_close(netdev);
1da177e4
LT
1652 else
1653 e1000_reset(adapter);
1654
96838a40 1655 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT
1656 eth_test->flags |= ETH_TEST_FL_FAILED;
1657
1658 e1000_reset(adapter);
96838a40 1659 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT
1660 eth_test->flags |= ETH_TEST_FL_FAILED;
1661
1662 e1000_reset(adapter);
96838a40 1663 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT
1664 eth_test->flags |= ETH_TEST_FL_FAILED;
1665
1666 e1000_reset(adapter);
d658266e
JB
1667 /* make sure the phy is powered up */
1668 e1000_power_up_phy(adapter);
96838a40 1669 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT
1670 eth_test->flags |= ETH_TEST_FL_FAILED;
1671
1672 /* restore speed, duplex, autoneg settings */
1673 adapter->hw.autoneg_advertised = autoneg_advertised;
1674 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1675 adapter->hw.autoneg = autoneg;
1676
1677 e1000_reset(adapter);
1314bbf3 1678 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1679 if (if_running)
2db10a08 1680 dev_open(netdev);
1da177e4 1681 } else {
d658266e 1682 DPRINTK(HW, INFO, "online testing starting\n");
1da177e4 1683 /* Online tests */
96838a40 1684 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1685 eth_test->flags |= ETH_TEST_FL_FAILED;
1686
90fb5135 1687 /* Online tests aren't run; pass by default */
1da177e4
LT
1688 data[0] = 0;
1689 data[1] = 0;
1690 data[2] = 0;
1691 data[3] = 0;
2db10a08 1692
1314bbf3 1693 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1694 }
352c9f85 1695 msleep_interruptible(4 * 1000);
1da177e4
LT
1696}
1697
120cd576 1698static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1da177e4 1699{
1da177e4 1700 struct e1000_hw *hw = &adapter->hw;
120cd576 1701 int retval = 1; /* fail by default */
1da177e4 1702
120cd576 1703 switch (hw->device_id) {
dc1f71f6 1704 case E1000_DEV_ID_82542:
1da177e4
LT
1705 case E1000_DEV_ID_82543GC_FIBER:
1706 case E1000_DEV_ID_82543GC_COPPER:
1707 case E1000_DEV_ID_82544EI_FIBER:
1708 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1709 case E1000_DEV_ID_82545EM_FIBER:
1710 case E1000_DEV_ID_82545EM_COPPER:
84916829 1711 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576 1712 case E1000_DEV_ID_82546GB_PCIE:
ce57a02c 1713 case E1000_DEV_ID_82571EB_SERDES_QUAD:
120cd576 1714 /* these don't support WoL at all */
1da177e4 1715 wol->supported = 0;
120cd576 1716 break;
1da177e4
LT
1717 case E1000_DEV_ID_82546EB_FIBER:
1718 case E1000_DEV_ID_82546GB_FIBER:
b7ee49db 1719 case E1000_DEV_ID_82571EB_FIBER:
120cd576
JB
1720 case E1000_DEV_ID_82571EB_SERDES:
1721 case E1000_DEV_ID_82571EB_COPPER:
1722 /* Wake events not supported on port B */
96838a40 1723 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1724 wol->supported = 0;
120cd576 1725 break;
1da177e4 1726 }
120cd576
JB
1727 /* return success for non excluded adapter ports */
1728 retval = 0;
1729 break;
5881cde8 1730 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1731 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1732 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1733 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB
1734 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1735 /* quad port adapters only support WoL on port A */
1736 if (!adapter->quad_port_a) {
1737 wol->supported = 0;
1738 break;
1739 }
1740 /* return success for non excluded adapter ports */
1741 retval = 0;
1742 break;
1da177e4 1743 default:
120cd576
JB
1744 /* dual port cards only support WoL on port A from now on
1745 * unless it was enabled in the eeprom for port B
1746 * so exclude FUNC_1 ports from having WoL enabled */
1747 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
1748 !adapter->eeprom_wol) {
1749 wol->supported = 0;
1750 break;
1751 }
84916829 1752
120cd576
JB
1753 retval = 0;
1754 }
1755
1756 return retval;
1757}
1758
1759static void
1760e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1761{
1762 struct e1000_adapter *adapter = netdev_priv(netdev);
1763
1764 wol->supported = WAKE_UCAST | WAKE_MCAST |
1765 WAKE_BCAST | WAKE_MAGIC;
1766 wol->wolopts = 0;
1767
1768 /* this function will set ->supported = 0 and return 1 if wol is not
1769 * supported by this hardware */
1770 if (e1000_wol_exclusion(adapter, wol))
1da177e4 1771 return;
120cd576
JB
1772
1773 /* apply any specific unsupported masks here */
1774 switch (adapter->hw.device_id) {
1775 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1776 /* KSP3 does not suppport UCAST wake-ups */
1777 wol->supported &= ~WAKE_UCAST;
1778
1779 if (adapter->wol & E1000_WUFC_EX)
1780 DPRINTK(DRV, ERR, "Interface does not support "
1781 "directed (unicast) frame wake-up packets\n");
1782 break;
1783 default:
1784 break;
1da177e4 1785 }
120cd576
JB
1786
1787 if (adapter->wol & E1000_WUFC_EX)
1788 wol->wolopts |= WAKE_UCAST;
1789 if (adapter->wol & E1000_WUFC_MC)
1790 wol->wolopts |= WAKE_MCAST;
1791 if (adapter->wol & E1000_WUFC_BC)
1792 wol->wolopts |= WAKE_BCAST;
1793 if (adapter->wol & E1000_WUFC_MAG)
1794 wol->wolopts |= WAKE_MAGIC;
1795
1796 return;
1da177e4
LT
1797}
1798
1799static int
1800e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1801{
60490fe0 1802 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1803 struct e1000_hw *hw = &adapter->hw;
1804
120cd576
JB
1805 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1806 return -EOPNOTSUPP;
1807
1808 if (e1000_wol_exclusion(adapter, wol))
1da177e4
LT
1809 return wol->wolopts ? -EOPNOTSUPP : 0;
1810
120cd576 1811 switch (hw->device_id) {
84916829 1812 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829
JK
1813 if (wol->wolopts & WAKE_UCAST) {
1814 DPRINTK(DRV, ERR, "Interface does not support "
1815 "directed (unicast) frame wake-up packets\n");
1816 return -EOPNOTSUPP;
1817 }
120cd576 1818 break;
1da177e4 1819 default:
120cd576 1820 break;
1da177e4
LT
1821 }
1822
120cd576
JB
1823 /* these settings will always override what we currently have */
1824 adapter->wol = 0;
1825
1826 if (wol->wolopts & WAKE_UCAST)
1827 adapter->wol |= E1000_WUFC_EX;
1828 if (wol->wolopts & WAKE_MCAST)
1829 adapter->wol |= E1000_WUFC_MC;
1830 if (wol->wolopts & WAKE_BCAST)
1831 adapter->wol |= E1000_WUFC_BC;
1832 if (wol->wolopts & WAKE_MAGIC)
1833 adapter->wol |= E1000_WUFC_MAG;
1834
1da177e4
LT
1835 return 0;
1836}
1837
1838/* toggle LED 4 times per second = 2 "blinks" per second */
1839#define E1000_ID_INTERVAL (HZ/4)
1840
1841/* bit defines for adapter->led_status */
1842#define E1000_LED_ON 0
1843
1844static void
1845e1000_led_blink_callback(unsigned long data)
1846{
1847 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1848
96838a40 1849 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1da177e4
LT
1850 e1000_led_off(&adapter->hw);
1851 else
1852 e1000_led_on(&adapter->hw);
1853
1854 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1855}
1856
1857static int
1858e1000_phys_id(struct net_device *netdev, uint32_t data)
1859{
60490fe0 1860 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1861
96838a40 1862 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1da177e4
LT
1863 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1864
96838a40
JB
1865 if (adapter->hw.mac_type < e1000_82571) {
1866 if (!adapter->blink_timer.function) {
d439d4b7
MC
1867 init_timer(&adapter->blink_timer);
1868 adapter->blink_timer.function = e1000_led_blink_callback;
1869 adapter->blink_timer.data = (unsigned long) adapter;
1870 }
1871 e1000_setup_led(&adapter->hw);
1872 mod_timer(&adapter->blink_timer, jiffies);
1873 msleep_interruptible(data * 1000);
1874 del_timer_sync(&adapter->blink_timer);
cd94dd0b
AK
1875 } else if (adapter->hw.phy_type == e1000_phy_ife) {
1876 if (!adapter->blink_timer.function) {
1877 init_timer(&adapter->blink_timer);
1878 adapter->blink_timer.function = e1000_led_blink_callback;
1879 adapter->blink_timer.data = (unsigned long) adapter;
1880 }
1881 mod_timer(&adapter->blink_timer, jiffies);
d8c2bd3d 1882 msleep_interruptible(data * 1000);
cd94dd0b
AK
1883 del_timer_sync(&adapter->blink_timer);
1884 e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
d8c2bd3d 1885 } else {
f1b3a853 1886 e1000_blink_led_start(&adapter->hw);
d439d4b7 1887 msleep_interruptible(data * 1000);
1da177e4
LT
1888 }
1889
1da177e4
LT
1890 e1000_led_off(&adapter->hw);
1891 clear_bit(E1000_LED_ON, &adapter->led_status);
1892 e1000_cleanup_led(&adapter->hw);
1893
1894 return 0;
1895}
1896
1897static int
1898e1000_nway_reset(struct net_device *netdev)
1899{
60490fe0 1900 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK
1901 if (netif_running(netdev))
1902 e1000_reinit_locked(adapter);
1da177e4
LT
1903 return 0;
1904}
1905
96838a40
JB
1906static void
1907e1000_get_ethtool_stats(struct net_device *netdev,
1da177e4
LT
1908 struct ethtool_stats *stats, uint64_t *data)
1909{
60490fe0 1910 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1911 int i;
1912
1913 e1000_update_stats(adapter);
7bfa4816
JK
1914 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1915 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1916 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1da177e4
LT
1917 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1918 }
7bfa4816 1919/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT
1920}
1921
96838a40 1922static void
1da177e4
LT
1923e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1924{
7bfa4816 1925 uint8_t *p = data;
1da177e4
LT
1926 int i;
1927
96838a40 1928 switch (stringset) {
1da177e4 1929 case ETH_SS_TEST:
96838a40 1930 memcpy(data, *e1000_gstrings_test,
1da177e4
LT
1931 E1000_TEST_LEN*ETH_GSTRING_LEN);
1932 break;
1933 case ETH_SS_STATS:
7bfa4816
JK
1934 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1935 memcpy(p, e1000_gstrings_stats[i].stat_string,
1936 ETH_GSTRING_LEN);
1937 p += ETH_GSTRING_LEN;
1938 }
7bfa4816 1939/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT
1940 break;
1941 }
1942}
1943
7282d491 1944static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT
1945 .get_settings = e1000_get_settings,
1946 .set_settings = e1000_set_settings,
1947 .get_drvinfo = e1000_get_drvinfo,
1948 .get_regs_len = e1000_get_regs_len,
1949 .get_regs = e1000_get_regs,
1950 .get_wol = e1000_get_wol,
1951 .set_wol = e1000_set_wol,
8fc897b0
AK
1952 .get_msglevel = e1000_get_msglevel,
1953 .set_msglevel = e1000_set_msglevel,
1da177e4
LT
1954 .nway_reset = e1000_nway_reset,
1955 .get_link = ethtool_op_get_link,
1956 .get_eeprom_len = e1000_get_eeprom_len,
1957 .get_eeprom = e1000_get_eeprom,
1958 .set_eeprom = e1000_set_eeprom,
1959 .get_ringparam = e1000_get_ringparam,
1960 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK
1961 .get_pauseparam = e1000_get_pauseparam,
1962 .set_pauseparam = e1000_set_pauseparam,
1963 .get_rx_csum = e1000_get_rx_csum,
1964 .set_rx_csum = e1000_set_rx_csum,
1965 .get_tx_csum = e1000_get_tx_csum,
1966 .set_tx_csum = e1000_set_tx_csum,
8fc897b0 1967 .set_sg = ethtool_op_set_sg,
8fc897b0 1968 .set_tso = e1000_set_tso,
1da177e4
LT
1969 .self_test = e1000_diag_test,
1970 .get_strings = e1000_get_strings,
1971 .phys_id = e1000_phys_id,
1da177e4 1972 .get_ethtool_stats = e1000_get_ethtool_stats,
b9f2c044 1973 .get_sset_count = e1000_get_sset_count,
1da177e4
LT
1974};
1975
1976void e1000_set_ethtool_ops(struct net_device *netdev)
1977{
1978 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1979}