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e1000: allow user to disable ich8 lock loss workaround
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
3d41e30a 4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
3d41e30a 25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28*******************************************************************************/
29
30#include "e1000.h"
31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 34#ifndef CONFIG_E1000_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
440c052d 39#define DRV_VERSION "7.0.38-k4"DRIVERNAPI
1da177e4 40char e1000_driver_version[] = DRV_VERSION;
3d41e30a 41static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 76 INTEL_E1000_ETHERNET_DEVICE(0x105E),
77 INTEL_E1000_ETHERNET_DEVICE(0x105F),
78 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 79 INTEL_E1000_ETHERNET_DEVICE(0x1075),
80 INTEL_E1000_ETHERNET_DEVICE(0x1076),
81 INTEL_E1000_ETHERNET_DEVICE(0x1077),
82 INTEL_E1000_ETHERNET_DEVICE(0x1078),
83 INTEL_E1000_ETHERNET_DEVICE(0x1079),
84 INTEL_E1000_ETHERNET_DEVICE(0x107A),
85 INTEL_E1000_ETHERNET_DEVICE(0x107B),
86 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 87 INTEL_E1000_ETHERNET_DEVICE(0x107D),
88 INTEL_E1000_ETHERNET_DEVICE(0x107E),
89 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 90 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x108B),
92 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 93 INTEL_E1000_ETHERNET_DEVICE(0x1096),
94 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 95 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 96 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 97 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 98 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
1da177e4
LT		 99 /* required last entry */
100 {0,}
101};
102
103MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
104
3ad2cc67 105static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 106 struct e1000_tx_ring *txdr);
3ad2cc67 107static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 108 struct e1000_rx_ring *rxdr);
3ad2cc67 109static void e1000_free_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 110 struct e1000_tx_ring *tx_ring);
3ad2cc67 111static void e1000_free_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 112 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 113
114/* Local Function Prototypes */
115
116static int e1000_init_module(void);
117static void e1000_exit_module(void);
118static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
119static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 120static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 121static int e1000_sw_init(struct e1000_adapter *adapter);
122static int e1000_open(struct net_device *netdev);
123static int e1000_close(struct net_device *netdev);
124static void e1000_configure_tx(struct e1000_adapter *adapter);
125static void e1000_configure_rx(struct e1000_adapter *adapter);
126static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 127static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
128static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
129static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 133static void e1000_set_multi(struct net_device *netdev);
134static void e1000_update_phy_info(unsigned long data);
135static void e1000_watchdog(unsigned long data);
1da177e4
LT		 136static void e1000_82547_tx_fifo_stall(unsigned long data);
137static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
138static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
139static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
140static int e1000_set_mac(struct net_device *netdev, void *p);
141static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 142static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
143 struct e1000_tx_ring *tx_ring);
1da177e4 144#ifdef CONFIG_E1000_NAPI
581d708e 145static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 146static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 147 struct e1000_rx_ring *rx_ring,
1da177e4 148 int *work_done, int work_to_do);
2d7edb92 149static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 150 struct e1000_rx_ring *rx_ring,
2d7edb92 151 int *work_done, int work_to_do);
1da177e4 152#else
581d708e
MC		 153static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
154 struct e1000_rx_ring *rx_ring);
155static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
156 struct e1000_rx_ring *rx_ring);
1da177e4 157#endif
581d708e 158static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 159 struct e1000_rx_ring *rx_ring,
160 int cleaned_count);
581d708e 161static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 162 struct e1000_rx_ring *rx_ring,
163 int cleaned_count);
1da177e4
LT		 164static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
165static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
166 int cmd);
1da177e4
LT		 167static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
168static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
169static void e1000_tx_timeout(struct net_device *dev);
87041639 170static void e1000_reset_task(struct net_device *dev);
1da177e4 171static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 172static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
173 struct sk_buff *skb);
1da177e4
LT		 174
175static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
176static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
177static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
178static void e1000_restore_vlan(struct e1000_adapter *adapter);
179
977e74b5 180static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 181#ifdef CONFIG_PM
1da177e4
LT		 182static int e1000_resume(struct pci_dev *pdev);
183#endif
c653e635 184static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 185
186#ifdef CONFIG_NET_POLL_CONTROLLER
187/* for netdump / net console */
188static void e1000_netpoll (struct net_device *netdev);
189#endif
190
9026729b
AK		 191static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
192 pci_channel_state_t state);
193static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
194static void e1000_io_resume(struct pci_dev *pdev);
195
196static struct pci_error_handlers e1000_err_handler = {
197 .error_detected = e1000_io_error_detected,
198 .slot_reset = e1000_io_slot_reset,
199 .resume = e1000_io_resume,
200};
24025e4e 201
1da177e4
LT		 202static struct pci_driver e1000_driver = {
203 .name = e1000_driver_name,
204 .id_table = e1000_pci_tbl,
205 .probe = e1000_probe,
206 .remove = __devexit_p(e1000_remove),
207 /* Power Managment Hooks */
1da177e4 208 .suspend = e1000_suspend,
6fdfef16 209#ifdef CONFIG_PM
c653e635 210 .resume = e1000_resume,
1da177e4 211#endif
9026729b
AK		 212 .shutdown = e1000_shutdown,
213 .err_handler = &e1000_err_handler
1da177e4
LT		 214};
215
216MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
217MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
218MODULE_LICENSE("GPL");
219MODULE_VERSION(DRV_VERSION);
220
221static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
222module_param(debug, int, 0);
223MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
224
225/**
226 * e1000_init_module - Driver Registration Routine
227 *
228 * e1000_init_module is the first routine called when the driver is
229 * loaded. All it does is register with the PCI subsystem.
230 **/
231
232static int __init
233e1000_init_module(void)
234{
235 int ret;
236 printk(KERN_INFO "%s - version %s\n",
237 e1000_driver_string, e1000_driver_version);
238
239 printk(KERN_INFO "%s\n", e1000_copyright);
240
241 ret = pci_module_init(&e1000_driver);
8b378def 242
1da177e4
LT		 243 return ret;
244}
245
246module_init(e1000_init_module);
247
248/**
249 * e1000_exit_module - Driver Exit Cleanup Routine
250 *
251 * e1000_exit_module is called just before the driver is removed
252 * from memory.
253 **/
254
255static void __exit
256e1000_exit_module(void)
257{
1da177e4
LT		 258 pci_unregister_driver(&e1000_driver);
259}
260
261module_exit(e1000_exit_module);
262
2db10a08
AK		 263static int e1000_request_irq(struct e1000_adapter *adapter)
264{
265 struct net_device *netdev = adapter->netdev;
266 int flags, err = 0;
267
268 flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
269#ifdef CONFIG_PCI_MSI
270 if (adapter->hw.mac_type > e1000_82547_rev_2) {
271 adapter->have_msi = TRUE;
272 if ((err = pci_enable_msi(adapter->pdev))) {
273 DPRINTK(PROBE, ERR,
274 "Unable to allocate MSI interrupt Error: %d\n", err);
275 adapter->have_msi = FALSE;
276 }
277 }
278 if (adapter->have_msi)
279 flags &= ~SA_SHIRQ;
280#endif
281 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
282 netdev->name, netdev)))
283 DPRINTK(PROBE, ERR,
284 "Unable to allocate interrupt Error: %d\n", err);
285
286 return err;
287}
288
289static void e1000_free_irq(struct e1000_adapter *adapter)
290{
291 struct net_device *netdev = adapter->netdev;
292
293 free_irq(adapter->pdev->irq, netdev);
294
295#ifdef CONFIG_PCI_MSI
296 if (adapter->have_msi)
297 pci_disable_msi(adapter->pdev);
298#endif
299}
300
1da177e4
LT		 301/**
302 * e1000_irq_disable - Mask off interrupt generation on the NIC
303 * @adapter: board private structure
304 **/
305
e619d523 306static void
1da177e4
LT		 307e1000_irq_disable(struct e1000_adapter *adapter)
308{
309 atomic_inc(&adapter->irq_sem);
310 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
311 E1000_WRITE_FLUSH(&adapter->hw);
312 synchronize_irq(adapter->pdev->irq);
313}
314
315/**
316 * e1000_irq_enable - Enable default interrupt generation settings
317 * @adapter: board private structure
318 **/
319
e619d523 320static void
1da177e4
LT		 321e1000_irq_enable(struct e1000_adapter *adapter)
322{
96838a40 323 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 324 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
325 E1000_WRITE_FLUSH(&adapter->hw);
326 }
327}
3ad2cc67
AB		 328
329static void
2d7edb92
MC		 330e1000_update_mng_vlan(struct e1000_adapter *adapter)
331{
332 struct net_device *netdev = adapter->netdev;
333 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
334 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 335 if (adapter->vlgrp) {
336 if (!adapter->vlgrp->vlan_devices[vid]) {
337 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 338 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
339 e1000_vlan_rx_add_vid(netdev, vid);
340 adapter->mng_vlan_id = vid;
341 } else
342 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 343
344 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
345 (vid != old_vid) &&
2d7edb92
MC		 346 !adapter->vlgrp->vlan_devices[old_vid])
347 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 348 } else
349 adapter->mng_vlan_id = vid;
2d7edb92
MC		 350 }
351}
b55ccb35
JK		 352
353/**
354 * e1000_release_hw_control - release control of the h/w to f/w
355 * @adapter: address of board private structure
356 *
357 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
358 * For ASF and Pass Through versions of f/w this means that the
359 * driver is no longer loaded. For AMT version (only with 82573) i
360 * of the f/w this means that the netowrk i/f is closed.
76c224bc 361 *
b55ccb35
JK		 362 **/
363
e619d523 364static void
b55ccb35
JK		 365e1000_release_hw_control(struct e1000_adapter *adapter)
366{
367 uint32_t ctrl_ext;
368 uint32_t swsm;
cd94dd0b 369 uint32_t extcnf;
b55ccb35
JK		 370
371 /* Let firmware taken over control of h/w */
372 switch (adapter->hw.mac_type) {
373 case e1000_82571:
374 case e1000_82572:
4cc15f54 375 case e1000_80003es2lan:
b55ccb35
JK		 376 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
377 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
378 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
379 break;
380 case e1000_82573:
381 swsm = E1000_READ_REG(&adapter->hw, SWSM);
382 E1000_WRITE_REG(&adapter->hw, SWSM,
383 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 384 case e1000_ich8lan:
385 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
386 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
387 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
388 break;
b55ccb35
JK		 389 default:
390 break;
391 }
392}
393
394/**
395 * e1000_get_hw_control - get control of the h/w from f/w
396 * @adapter: address of board private structure
397 *
398 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 399 * For ASF and Pass Through versions of f/w this means that
400 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 401 * of the f/w this means that the netowrk i/f is open.
76c224bc 402 *
b55ccb35
JK		 403 **/
404
e619d523 405static void
b55ccb35
JK		 406e1000_get_hw_control(struct e1000_adapter *adapter)
407{
408 uint32_t ctrl_ext;
409 uint32_t swsm;
cd94dd0b 410 uint32_t extcnf;
b55ccb35
JK		 411 /* Let firmware know the driver has taken over */
412 switch (adapter->hw.mac_type) {
413 case e1000_82571:
414 case e1000_82572:
4cc15f54 415 case e1000_80003es2lan:
b55ccb35
JK		 416 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
417 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
418 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
419 break;
420 case e1000_82573:
421 swsm = E1000_READ_REG(&adapter->hw, SWSM);
422 E1000_WRITE_REG(&adapter->hw, SWSM,
423 swsm | E1000_SWSM_DRV_LOAD);
424 break;
cd94dd0b
AK		 425 case e1000_ich8lan:
426 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
427 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
428 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
429 break;
b55ccb35
JK		 430 default:
431 break;
432 }
433}
434
1da177e4
LT		 435int
436e1000_up(struct e1000_adapter *adapter)
437{
438 struct net_device *netdev = adapter->netdev;
2db10a08 439 int i;
1da177e4
LT		 440
441 /* hardware has been reset, we need to reload some things */
442
1da177e4
LT		 443 e1000_set_multi(netdev);
444
445 e1000_restore_vlan(adapter);
446
447 e1000_configure_tx(adapter);
448 e1000_setup_rctl(adapter);
449 e1000_configure_rx(adapter);
72d64a43
JK		 450 /* call E1000_DESC_UNUSED which always leaves
451 * at least 1 descriptor unused to make sure
452 * next_to_use != next_to_clean */
f56799ea 453 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 454 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 455 adapter->alloc_rx_buf(adapter, ring,
456 E1000_DESC_UNUSED(ring));
f56799ea 457 }
1da177e4 458
7bfa4816
JK		 459 adapter->tx_queue_len = netdev->tx_queue_len;
460
1da177e4 461 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 462
463#ifdef CONFIG_E1000_NAPI
464 netif_poll_enable(netdev);
465#endif
5de55624
MC		 466 e1000_irq_enable(adapter);
467
1da177e4
LT		 468 return 0;
469}
470
79f05bf0
AK		 471/**
472 * e1000_power_up_phy - restore link in case the phy was powered down
473 * @adapter: address of board private structure
474 *
475 * The phy may be powered down to save power and turn off link when the
476 * driver is unloaded and wake on lan is not enabled (among others)
477 * *** this routine MUST be followed by a call to e1000_reset ***
478 *
479 **/
480
481static void e1000_power_up_phy(struct e1000_adapter *adapter)
482{
483 uint16_t mii_reg = 0;
484
485 /* Just clear the power down bit to wake the phy back up */
486 if (adapter->hw.media_type == e1000_media_type_copper) {
487 /* according to the manual, the phy will retain its
488 * settings across a power-down/up cycle */
489 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
490 mii_reg &= ~MII_CR_POWER_DOWN;
491 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
492 }
493}
494
495static void e1000_power_down_phy(struct e1000_adapter *adapter)
496{
497 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
498 e1000_check_mng_mode(&adapter->hw);
499 /* Power down the PHY so no link is implied when interface is down
500 * The PHY cannot be powered down if any of the following is TRUE
501 * (a) WoL is enabled
502 * (b) AMT is active
503 * (c) SoL/IDER session is active */
504 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 505 adapter->hw.mac_type != e1000_ich8lan &&
79f05bf0
AK		 506 adapter->hw.media_type == e1000_media_type_copper &&
507 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
508 !mng_mode_enabled &&
509 !e1000_check_phy_reset_block(&adapter->hw)) {
510 uint16_t mii_reg = 0;
511 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
512 mii_reg |= MII_CR_POWER_DOWN;
513 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
514 mdelay(1);
515 }
516}
517
1da177e4
LT		 518void
519e1000_down(struct e1000_adapter *adapter)
520{
521 struct net_device *netdev = adapter->netdev;
522
523 e1000_irq_disable(adapter);
c1605eb3 524
1da177e4
LT		 525 del_timer_sync(&adapter->tx_fifo_stall_timer);
526 del_timer_sync(&adapter->watchdog_timer);
527 del_timer_sync(&adapter->phy_info_timer);
528
529#ifdef CONFIG_E1000_NAPI
530 netif_poll_disable(netdev);
531#endif
7bfa4816 532 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 533 adapter->link_speed = 0;
534 adapter->link_duplex = 0;
535 netif_carrier_off(netdev);
536 netif_stop_queue(netdev);
537
538 e1000_reset(adapter);
581d708e
MC		 539 e1000_clean_all_tx_rings(adapter);
540 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 541}
542
2db10a08
AK		 543void
544e1000_reinit_locked(struct e1000_adapter *adapter)
545{
546 WARN_ON(in_interrupt());
547 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
548 msleep(1);
549 e1000_down(adapter);
550 e1000_up(adapter);
551 clear_bit(__E1000_RESETTING, &adapter->flags);
552}
553
1da177e4
LT		 554void
555e1000_reset(struct e1000_adapter *adapter)
556{
2d7edb92 557 uint32_t pba, manc;
1125ecbc 558 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 559
560 /* Repartition Pba for greater than 9k mtu
561 * To take effect CTRL.RST is required.
562 */
563
2d7edb92
MC		 564 switch (adapter->hw.mac_type) {
565 case e1000_82547:
0e6ef3e0 566 case e1000_82547_rev_2:
2d7edb92
MC		 567 pba = E1000_PBA_30K;
568 break;
868d5309
MC		 569 case e1000_82571:
570 case e1000_82572:
6418ecc6 571 case e1000_80003es2lan:
868d5309
MC		 572 pba = E1000_PBA_38K;
573 break;
2d7edb92
MC		 574 case e1000_82573:
575 pba = E1000_PBA_12K;
576 break;
cd94dd0b
AK		 577 case e1000_ich8lan:
578 pba = E1000_PBA_8K;
579 break;
2d7edb92
MC		 580 default:
581 pba = E1000_PBA_48K;
582 break;
583 }
584
96838a40 585 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 586 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 587 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 588
589
96838a40 590 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 591 adapter->tx_fifo_head = 0;
592 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
593 adapter->tx_fifo_size =
594 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
595 atomic_set(&adapter->tx_fifo_stall, 0);
596 }
2d7edb92 597
1da177e4
LT		 598 E1000_WRITE_REG(&adapter->hw, PBA, pba);
599
600 /* flow control settings */
f11b7f85
JK		 601 /* Set the FC high water mark to 90% of the FIFO size.
602 * Required to clear last 3 LSB */
603 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 604 /* We can't use 90% on small FIFOs because the remainder
605 * would be less than 1 full frame. In this case, we size
606 * it to allow at least a full frame above the high water
607 * mark. */
608 if (pba < E1000_PBA_16K)
609 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 610
611 adapter->hw.fc_high_water = fc_high_water_mark;
612 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 613 if (adapter->hw.mac_type == e1000_80003es2lan)
614 adapter->hw.fc_pause_time = 0xFFFF;
615 else
616 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 617 adapter->hw.fc_send_xon = 1;
618 adapter->hw.fc = adapter->hw.original_fc;
619
2d7edb92 620 /* Allow time for pending master requests to run */
1da177e4 621 e1000_reset_hw(&adapter->hw);
96838a40 622 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 623 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 624 if (e1000_init_hw(&adapter->hw))
1da177e4 625 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 626 e1000_update_mng_vlan(adapter);
1da177e4
LT		 627 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
628 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
629
630 e1000_reset_adaptive(&adapter->hw);
631 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 632
633 if (!adapter->smart_power_down &&
634 (adapter->hw.mac_type == e1000_82571 ||
635 adapter->hw.mac_type == e1000_82572)) {
636 uint16_t phy_data = 0;
637 /* speed up time to link by disabling smart power down, ignore
638 * the return value of this function because there is nothing
639 * different we would do if it failed */
640 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
641 &phy_data);
642 phy_data &= ~IGP02E1000_PM_SPD;
643 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
644 phy_data);
645 }
646
cd94dd0b
AK		 647 if (adapter->hw.mac_type < e1000_ich8lan)
648 /* FIXME: this code is duplicate and wrong for PCI Express */
2d7edb92
MC		 649 if (adapter->en_mng_pt) {
650 manc = E1000_READ_REG(&adapter->hw, MANC);
651 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
652 E1000_WRITE_REG(&adapter->hw, MANC, manc);
653 }
1da177e4
LT		 654}
655
656/**
657 * e1000_probe - Device Initialization Routine
658 * @pdev: PCI device information struct
659 * @ent: entry in e1000_pci_tbl
660 *
661 * Returns 0 on success, negative on failure
662 *
663 * e1000_probe initializes an adapter identified by a pci_dev structure.
664 * The OS initialization, configuring of the adapter private structure,
665 * and a hardware reset occur.
666 **/
667
668static int __devinit
669e1000_probe(struct pci_dev *pdev,
670 const struct pci_device_id *ent)
671{
672 struct net_device *netdev;
673 struct e1000_adapter *adapter;
2d7edb92 674 unsigned long mmio_start, mmio_len;
cd94dd0b 675 unsigned long flash_start, flash_len;
2d7edb92 676
1da177e4 677 static int cards_found = 0;
84916829 678 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
2d7edb92 679 int i, err, pci_using_dac;
1da177e4
LT		 680 uint16_t eeprom_data;
681 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 682 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 683 return err;
684
cd94dd0b
AK		 685 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
686 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 687 pci_using_dac = 1;
688 } else {
cd94dd0b
AK		 689 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
690 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 691 E1000_ERR("No usable DMA configuration, aborting\n");
692 return err;
693 }
694 pci_using_dac = 0;
695 }
696
96838a40 697 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 698 return err;
699
700 pci_set_master(pdev);
701
702 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 703 if (!netdev) {
1da177e4
LT		 704 err = -ENOMEM;
705 goto err_alloc_etherdev;
706 }
707
708 SET_MODULE_OWNER(netdev);
709 SET_NETDEV_DEV(netdev, &pdev->dev);
710
711 pci_set_drvdata(pdev, netdev);
60490fe0 712 adapter = netdev_priv(netdev);
1da177e4
LT		 713 adapter->netdev = netdev;
714 adapter->pdev = pdev;
715 adapter->hw.back = adapter;
716 adapter->msg_enable = (1 << debug) - 1;
717
718 mmio_start = pci_resource_start(pdev, BAR_0);
719 mmio_len = pci_resource_len(pdev, BAR_0);
720
721 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 722 if (!adapter->hw.hw_addr) {
1da177e4
LT		 723 err = -EIO;
724 goto err_ioremap;
725 }
726
96838a40
JB		 727 for (i = BAR_1; i <= BAR_5; i++) {
728 if (pci_resource_len(pdev, i) == 0)
1da177e4 729 continue;
96838a40 730 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 731 adapter->hw.io_base = pci_resource_start(pdev, i);
732 break;
733 }
734 }
735
736 netdev->open = &e1000_open;
737 netdev->stop = &e1000_close;
738 netdev->hard_start_xmit = &e1000_xmit_frame;
739 netdev->get_stats = &e1000_get_stats;
740 netdev->set_multicast_list = &e1000_set_multi;
741 netdev->set_mac_address = &e1000_set_mac;
742 netdev->change_mtu = &e1000_change_mtu;
743 netdev->do_ioctl = &e1000_ioctl;
744 e1000_set_ethtool_ops(netdev);
745 netdev->tx_timeout = &e1000_tx_timeout;
746 netdev->watchdog_timeo = 5 * HZ;
747#ifdef CONFIG_E1000_NAPI
748 netdev->poll = &e1000_clean;
749 netdev->weight = 64;
750#endif
751 netdev->vlan_rx_register = e1000_vlan_rx_register;
752 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
753 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
754#ifdef CONFIG_NET_POLL_CONTROLLER
755 netdev->poll_controller = e1000_netpoll;
756#endif
757 strcpy(netdev->name, pci_name(pdev));
758
759 netdev->mem_start = mmio_start;
760 netdev->mem_end = mmio_start + mmio_len;
761 netdev->base_addr = adapter->hw.io_base;
762
763 adapter->bd_number = cards_found;
764
765 /* setup the private structure */
766
96838a40 767 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 768 goto err_sw_init;
769
cd94dd0b
AK		 770 /* Flash BAR mapping must happen after e1000_sw_init
771 * because it depends on mac_type */
772 if ((adapter->hw.mac_type == e1000_ich8lan) &&
773 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
774 flash_start = pci_resource_start(pdev, 1);
775 flash_len = pci_resource_len(pdev, 1);
776 adapter->hw.flash_address = ioremap(flash_start, flash_len);
777 if (!adapter->hw.flash_address) {
778 err = -EIO;
779 goto err_flashmap;
780 }
781 }
782
96838a40 783 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 784 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
785
84916829 786 /* if ksp3, indicate if it's port a being setup */
76c224bc
AK		 787 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
788 e1000_ksp3_port_a == 0)
84916829
JK		 789 adapter->ksp3_port_a = 1;
790 e1000_ksp3_port_a++;
791 /* Reset for multiple KP3 adapters */
792 if (e1000_ksp3_port_a == 4)
793 e1000_ksp3_port_a = 0;
794
96838a40 795 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 796 netdev->features = NETIF_F_SG |
797 NETIF_F_HW_CSUM |
798 NETIF_F_HW_VLAN_TX |
799 NETIF_F_HW_VLAN_RX |
800 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 801 if (adapter->hw.mac_type == e1000_ich8lan)
802 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 803 }
804
805#ifdef NETIF_F_TSO
96838a40 806 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 807 (adapter->hw.mac_type != e1000_82547))
808 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 809
810#ifdef NETIF_F_TSO_IPV6
96838a40 811 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 812 netdev->features |= NETIF_F_TSO_IPV6;
813#endif
1da177e4 814#endif
96838a40 815 if (pci_using_dac)
1da177e4
LT		 816 netdev->features |= NETIF_F_HIGHDMA;
817
76c224bc
AK		 818 netdev->features |= NETIF_F_LLTX;
819
2d7edb92
MC		 820 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
821
cd94dd0b
AK		 822 /* initialize eeprom parameters */
823
824 if (e1000_init_eeprom_params(&adapter->hw)) {
825 E1000_ERR("EEPROM initialization failed\n");
826 return -EIO;
827 }
828
96838a40 829 /* before reading the EEPROM, reset the controller to
1da177e4 830 * put the device in a known good starting state */
96838a40 831
1da177e4
LT		 832 e1000_reset_hw(&adapter->hw);
833
834 /* make sure the EEPROM is good */
835
96838a40 836 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 837 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
838 err = -EIO;
839 goto err_eeprom;
840 }
841
842 /* copy the MAC address out of the EEPROM */
843
96838a40 844 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 845 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
846 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 847 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 848
96838a40 849 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 850 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
851 err = -EIO;
852 goto err_eeprom;
853 }
854
855 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
856
857 e1000_get_bus_info(&adapter->hw);
858
859 init_timer(&adapter->tx_fifo_stall_timer);
860 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
861 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
862
863 init_timer(&adapter->watchdog_timer);
864 adapter->watchdog_timer.function = &e1000_watchdog;
865 adapter->watchdog_timer.data = (unsigned long) adapter;
866
1da177e4
LT		 867 init_timer(&adapter->phy_info_timer);
868 adapter->phy_info_timer.function = &e1000_update_phy_info;
869 adapter->phy_info_timer.data = (unsigned long) adapter;
870
87041639
JK		 871 INIT_WORK(&adapter->reset_task,
872 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 873
874 /* we're going to reset, so assume we have no link for now */
875
876 netif_carrier_off(netdev);
877 netif_stop_queue(netdev);
878
879 e1000_check_options(adapter);
880
881 /* Initial Wake on LAN setting
882 * If APM wake is enabled in the EEPROM,
883 * enable the ACPI Magic Packet filter
884 */
885
96838a40 886 switch (adapter->hw.mac_type) {
1da177e4
LT		 887 case e1000_82542_rev2_0:
888 case e1000_82542_rev2_1:
889 case e1000_82543:
890 break;
891 case e1000_82544:
892 e1000_read_eeprom(&adapter->hw,
893 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
894 eeprom_apme_mask = E1000_EEPROM_82544_APM;
895 break;
cd94dd0b
AK		 896 case e1000_ich8lan:
897 e1000_read_eeprom(&adapter->hw,
898 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
899 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
900 break;
1da177e4
LT		 901 case e1000_82546:
902 case e1000_82546_rev_3:
fd803241 903 case e1000_82571:
6418ecc6 904 case e1000_80003es2lan:
96838a40 905 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 906 e1000_read_eeprom(&adapter->hw,
907 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
908 break;
909 }
910 /* Fall Through */
911 default:
912 e1000_read_eeprom(&adapter->hw,
913 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
914 break;
915 }
96838a40 916 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 917 adapter->wol |= E1000_WUFC_MAG;
918
fb3d47d4
JK		 919 /* print bus type/speed/width info */
920 {
921 struct e1000_hw *hw = &adapter->hw;
922 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
923 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
924 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
925 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
926 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
927 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
928 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
929 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
930 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
931 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
932 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
933 "32-bit"));
934 }
935
936 for (i = 0; i < 6; i++)
937 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
938
1da177e4
LT		 939 /* reset the hardware with the new settings */
940 e1000_reset(adapter);
941
b55ccb35
JK		 942 /* If the controller is 82573 and f/w is AMT, do not set
943 * DRV_LOAD until the interface is up. For all other cases,
944 * let the f/w know that the h/w is now under the control
945 * of the driver. */
946 if (adapter->hw.mac_type != e1000_82573 ||
947 !e1000_check_mng_mode(&adapter->hw))
948 e1000_get_hw_control(adapter);
2d7edb92 949
1da177e4 950 strcpy(netdev->name, "eth%d");
96838a40 951 if ((err = register_netdev(netdev)))
1da177e4
LT		 952 goto err_register;
953
954 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
955
956 cards_found++;
957 return 0;
958
959err_register:
cd94dd0b
AK		 960 if (adapter->hw.flash_address)
961 iounmap(adapter->hw.flash_address);
962err_flashmap:
1da177e4
LT		 963err_sw_init:
964err_eeprom:
965 iounmap(adapter->hw.hw_addr);
966err_ioremap:
967 free_netdev(netdev);
968err_alloc_etherdev:
969 pci_release_regions(pdev);
970 return err;
971}
972
973/**
974 * e1000_remove - Device Removal Routine
975 * @pdev: PCI device information struct
976 *
977 * e1000_remove is called by the PCI subsystem to alert the driver
978 * that it should release a PCI device. The could be caused by a
979 * Hot-Plug event, or because the driver is going to be removed from
980 * memory.
981 **/
982
983static void __devexit
984e1000_remove(struct pci_dev *pdev)
985{
986 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 987 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 988 uint32_t manc;
581d708e
MC		 989#ifdef CONFIG_E1000_NAPI
990 int i;
991#endif
1da177e4 992
be2b28ed
JG		 993 flush_scheduled_work();
994
96838a40 995 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 996 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 997 adapter->hw.media_type == e1000_media_type_copper) {
998 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 999 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1000 manc |= E1000_MANC_ARP_EN;
1001 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1002 }
1003 }
1004
b55ccb35
JK		 1005 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1006 * would have already happened in close and is redundant. */
1007 e1000_release_hw_control(adapter);
2d7edb92 1008
1da177e4 1009 unregister_netdev(netdev);
581d708e 1010#ifdef CONFIG_E1000_NAPI
f56799ea 1011 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1012 dev_put(&adapter->polling_netdev[i]);
581d708e 1013#endif
1da177e4 1014
96838a40 1015 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1016 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1017
24025e4e
MC		 1018 kfree(adapter->tx_ring);
1019 kfree(adapter->rx_ring);
1020#ifdef CONFIG_E1000_NAPI
1021 kfree(adapter->polling_netdev);
1022#endif
1023
1da177e4 1024 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1025 if (adapter->hw.flash_address)
1026 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1027 pci_release_regions(pdev);
1028
1029 free_netdev(netdev);
1030
1031 pci_disable_device(pdev);
1032}
1033
1034/**
1035 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1036 * @adapter: board private structure to initialize
1037 *
1038 * e1000_sw_init initializes the Adapter private data structure.
1039 * Fields are initialized based on PCI device information and
1040 * OS network device settings (MTU size).
1041 **/
1042
1043static int __devinit
1044e1000_sw_init(struct e1000_adapter *adapter)
1045{
1046 struct e1000_hw *hw = &adapter->hw;
1047 struct net_device *netdev = adapter->netdev;
1048 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1049#ifdef CONFIG_E1000_NAPI
1050 int i;
1051#endif
1da177e4
LT		 1052
1053 /* PCI config space info */
1054
1055 hw->vendor_id = pdev->vendor;
1056 hw->device_id = pdev->device;
1057 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1058 hw->subsystem_id = pdev->subsystem_device;
1059
1060 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1061
1062 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1063
9e2feace
AK		 1064 adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
1065 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1066 hw->max_frame_size = netdev->mtu +
1067 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1068 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1069
1070 /* identify the MAC */
1071
96838a40 1072 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1073 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1074 return -EIO;
1075 }
1076
96838a40 1077 switch (hw->mac_type) {
1da177e4
LT		 1078 default:
1079 break;
1080 case e1000_82541:
1081 case e1000_82547:
1082 case e1000_82541_rev_2:
1083 case e1000_82547_rev_2:
1084 hw->phy_init_script = 1;
1085 break;
1086 }
1087
1088 e1000_set_media_type(hw);
1089
1090 hw->wait_autoneg_complete = FALSE;
1091 hw->tbi_compatibility_en = TRUE;
1092 hw->adaptive_ifs = TRUE;
1093
1094 /* Copper options */
1095
96838a40 1096 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1097 hw->mdix = AUTO_ALL_MODES;
1098 hw->disable_polarity_correction = FALSE;
1099 hw->master_slave = E1000_MASTER_SLAVE;
1100 }
1101
f56799ea
JK		 1102 adapter->num_tx_queues = 1;
1103 adapter->num_rx_queues = 1;
581d708e
MC		 1104
1105 if (e1000_alloc_queues(adapter)) {
1106 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1107 return -ENOMEM;
1108 }
1109
1110#ifdef CONFIG_E1000_NAPI
f56799ea 1111 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1112 adapter->polling_netdev[i].priv = adapter;
1113 adapter->polling_netdev[i].poll = &e1000_clean;
1114 adapter->polling_netdev[i].weight = 64;
1115 dev_hold(&adapter->polling_netdev[i]);
1116 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1117 }
7bfa4816 1118 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1119#endif
1120
1da177e4
LT		 1121 atomic_set(&adapter->irq_sem, 1);
1122 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1123
1124 return 0;
1125}
1126
581d708e
MC		 1127/**
1128 * e1000_alloc_queues - Allocate memory for all rings
1129 * @adapter: board private structure to initialize
1130 *
1131 * We allocate one ring per queue at run-time since we don't know the
1132 * number of queues at compile-time. The polling_netdev array is
1133 * intended for Multiqueue, but should work fine with a single queue.
1134 **/
1135
1136static int __devinit
1137e1000_alloc_queues(struct e1000_adapter *adapter)
1138{
1139 int size;
1140
f56799ea 1141 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1142 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1143 if (!adapter->tx_ring)
1144 return -ENOMEM;
1145 memset(adapter->tx_ring, 0, size);
1146
f56799ea 1147 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1148 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1149 if (!adapter->rx_ring) {
1150 kfree(adapter->tx_ring);
1151 return -ENOMEM;
1152 }
1153 memset(adapter->rx_ring, 0, size);
1154
1155#ifdef CONFIG_E1000_NAPI
f56799ea 1156 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1157 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1158 if (!adapter->polling_netdev) {
1159 kfree(adapter->tx_ring);
1160 kfree(adapter->rx_ring);
1161 return -ENOMEM;
1162 }
1163 memset(adapter->polling_netdev, 0, size);
1164#endif
1165
1166 return E1000_SUCCESS;
1167}
1168
1da177e4
LT		 1169/**
1170 * e1000_open - Called when a network interface is made active
1171 * @netdev: network interface device structure
1172 *
1173 * Returns 0 on success, negative value on failure
1174 *
1175 * The open entry point is called when a network interface is made
1176 * active by the system (IFF_UP). At this point all resources needed
1177 * for transmit and receive operations are allocated, the interrupt
1178 * handler is registered with the OS, the watchdog timer is started,
1179 * and the stack is notified that the interface is ready.
1180 **/
1181
1182static int
1183e1000_open(struct net_device *netdev)
1184{
60490fe0 1185 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1186 int err;
1187
2db10a08
AK		 1188 /* disallow open during test */
1189 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1190 return -EBUSY;
1191
1da177e4
LT		 1192 /* allocate transmit descriptors */
1193
581d708e 1194 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1195 goto err_setup_tx;
1196
1197 /* allocate receive descriptors */
1198
581d708e 1199 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1200 goto err_setup_rx;
1201
2db10a08
AK		 1202 err = e1000_request_irq(adapter);
1203 if (err)
1204 goto err_up;
1205
79f05bf0
AK		 1206 e1000_power_up_phy(adapter);
1207
96838a40 1208 if ((err = e1000_up(adapter)))
1da177e4 1209 goto err_up;
2d7edb92 1210 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1211 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1212 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1213 e1000_update_mng_vlan(adapter);
1214 }
1da177e4 1215
b55ccb35
JK		 1216 /* If AMT is enabled, let the firmware know that the network
1217 * interface is now open */
1218 if (adapter->hw.mac_type == e1000_82573 &&
1219 e1000_check_mng_mode(&adapter->hw))
1220 e1000_get_hw_control(adapter);
1221
1da177e4
LT		 1222 return E1000_SUCCESS;
1223
1224err_up:
581d708e 1225 e1000_free_all_rx_resources(adapter);
1da177e4 1226err_setup_rx:
581d708e 1227 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1228err_setup_tx:
1229 e1000_reset(adapter);
1230
1231 return err;
1232}
1233
1234/**
1235 * e1000_close - Disables a network interface
1236 * @netdev: network interface device structure
1237 *
1238 * Returns 0, this is not allowed to fail
1239 *
1240 * The close entry point is called when an interface is de-activated
1241 * by the OS. The hardware is still under the drivers control, but
1242 * needs to be disabled. A global MAC reset is issued to stop the
1243 * hardware, and all transmit and receive resources are freed.
1244 **/
1245
1246static int
1247e1000_close(struct net_device *netdev)
1248{
60490fe0 1249 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1250
2db10a08 1251 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1252 e1000_down(adapter);
79f05bf0 1253 e1000_power_down_phy(adapter);
2db10a08 1254 e1000_free_irq(adapter);
1da177e4 1255
581d708e
MC		 1256 e1000_free_all_tx_resources(adapter);
1257 e1000_free_all_rx_resources(adapter);
1da177e4 1258
96838a40 1259 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1260 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1261 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1262 }
b55ccb35
JK		 1263
1264 /* If AMT is enabled, let the firmware know that the network
1265 * interface is now closed */
1266 if (adapter->hw.mac_type == e1000_82573 &&
1267 e1000_check_mng_mode(&adapter->hw))
1268 e1000_release_hw_control(adapter);
1269
1da177e4
LT		 1270 return 0;
1271}
1272
1273/**
1274 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1275 * @adapter: address of board private structure
2d7edb92
MC		 1276 * @start: address of beginning of memory
1277 * @len: length of memory
1da177e4 1278 **/
e619d523 1279static boolean_t
1da177e4
LT		 1280e1000_check_64k_bound(struct e1000_adapter *adapter,
1281 void *start, unsigned long len)
1282{
1283 unsigned long begin = (unsigned long) start;
1284 unsigned long end = begin + len;
1285
2648345f
MC		 1286 /* First rev 82545 and 82546 need to not allow any memory
1287 * write location to cross 64k boundary due to errata 23 */
1da177e4 1288 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1289 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1290 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1291 }
1292
1293 return TRUE;
1294}
1295
1296/**
1297 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1298 * @adapter: board private structure
581d708e 1299 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1300 *
1301 * Return 0 on success, negative on failure
1302 **/
1303
3ad2cc67 1304static int
581d708e
MC		 1305e1000_setup_tx_resources(struct e1000_adapter *adapter,
1306 struct e1000_tx_ring *txdr)
1da177e4 1307{
1da177e4
LT		 1308 struct pci_dev *pdev = adapter->pdev;
1309 int size;
1310
1311 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1312 txdr->buffer_info = vmalloc(size);
96838a40 1313 if (!txdr->buffer_info) {
2648345f
MC		 1314 DPRINTK(PROBE, ERR,
1315 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1316 return -ENOMEM;
1317 }
1318 memset(txdr->buffer_info, 0, size);
1319
1320 /* round up to nearest 4K */
1321
1322 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1323 E1000_ROUNDUP(txdr->size, 4096);
1324
1325 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1326 if (!txdr->desc) {
1da177e4 1327setup_tx_desc_die:
1da177e4 1328 vfree(txdr->buffer_info);
2648345f
MC		 1329 DPRINTK(PROBE, ERR,
1330 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1331 return -ENOMEM;
1332 }
1333
2648345f 1334 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1335 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1336 void *olddesc = txdr->desc;
1337 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1338 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1339 "at %p\n", txdr->size, txdr->desc);
1340 /* Try again, without freeing the previous */
1da177e4 1341 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1342 /* Failed allocation, critical failure */
96838a40 1343 if (!txdr->desc) {
1da177e4
LT		 1344 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1345 goto setup_tx_desc_die;
1346 }
1347
1348 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1349 /* give up */
2648345f
MC		 1350 pci_free_consistent(pdev, txdr->size, txdr->desc,
1351 txdr->dma);
1da177e4
LT		 1352 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1353 DPRINTK(PROBE, ERR,
2648345f
MC		 1354 "Unable to allocate aligned memory "
1355 "for the transmit descriptor ring\n");
1da177e4
LT		 1356 vfree(txdr->buffer_info);
1357 return -ENOMEM;
1358 } else {
2648345f 1359 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1360 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1361 }
1362 }
1363 memset(txdr->desc, 0, txdr->size);
1364
1365 txdr->next_to_use = 0;
1366 txdr->next_to_clean = 0;
2ae76d98 1367 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1368
1369 return 0;
1370}
1371
581d708e
MC		 1372/**
1373 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1374 * (Descriptors) for all queues
1375 * @adapter: board private structure
1376 *
1377 * If this function returns with an error, then it's possible one or
1378 * more of the rings is populated (while the rest are not). It is the
1379 * callers duty to clean those orphaned rings.
1380 *
1381 * Return 0 on success, negative on failure
1382 **/
1383
1384int
1385e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1386{
1387 int i, err = 0;
1388
f56799ea 1389 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1390 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1391 if (err) {
1392 DPRINTK(PROBE, ERR,
1393 "Allocation for Tx Queue %u failed\n", i);
1394 break;
1395 }
1396 }
1397
1398 return err;
1399}
1400
1da177e4
LT		 1401/**
1402 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1403 * @adapter: board private structure
1404 *
1405 * Configure the Tx unit of the MAC after a reset.
1406 **/
1407
1408static void
1409e1000_configure_tx(struct e1000_adapter *adapter)
1410{
581d708e
MC		 1411 uint64_t tdba;
1412 struct e1000_hw *hw = &adapter->hw;
1413 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1414 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1415
1416 /* Setup the HW Tx Head and Tail descriptor pointers */
1417
f56799ea 1418 switch (adapter->num_tx_queues) {
24025e4e
MC		 1419 case 1:
1420 default:
581d708e
MC		 1421 tdba = adapter->tx_ring[0].dma;
1422 tdlen = adapter->tx_ring[0].count *
1423 sizeof(struct e1000_tx_desc);
581d708e 1424 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1425 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1426 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1427 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1428 E1000_WRITE_REG(hw, TDH, 0);
581d708e
MC		 1429 adapter->tx_ring[0].tdh = E1000_TDH;
1430 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1431 break;
1432 }
1da177e4
LT		 1433
1434 /* Set the default values for the Tx Inter Packet Gap timer */
1435
0fadb059
JK		 1436 if (hw->media_type == e1000_media_type_fiber ||
1437 hw->media_type == e1000_media_type_internal_serdes)
1438 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1439 else
1440 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1441
581d708e 1442 switch (hw->mac_type) {
1da177e4
LT		 1443 case e1000_82542_rev2_0:
1444 case e1000_82542_rev2_1:
1445 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1446 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1447 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1448 break;
87041639
JK		 1449 case e1000_80003es2lan:
1450 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1451 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1452 break;
1da177e4 1453 default:
0fadb059
JK		 1454 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1455 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1456 break;
1da177e4 1457 }
0fadb059
JK		 1458 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1459 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1460 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1461
1462 /* Set the Tx Interrupt Delay register */
1463
581d708e
MC		 1464 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1465 if (hw->mac_type >= e1000_82540)
1466 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1467
1468 /* Program the Transmit Control Register */
1469
581d708e 1470 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1471
1472 tctl &= ~E1000_TCTL_CT;
7e6c9861 1473 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1474 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1475
7e6c9861
JK		 1476#ifdef DISABLE_MULR
1477 /* disable Multiple Reads for debugging */
1478 tctl &= ~E1000_TCTL_MULR;
1479#endif
1da177e4 1480
2ae76d98
MC		 1481 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1482 tarc = E1000_READ_REG(hw, TARC0);
1483 tarc |= ((1 << 25) | (1 << 21));
1484 E1000_WRITE_REG(hw, TARC0, tarc);
1485 tarc = E1000_READ_REG(hw, TARC1);
1486 tarc |= (1 << 25);
1487 if (tctl & E1000_TCTL_MULR)
1488 tarc &= ~(1 << 28);
1489 else
1490 tarc |= (1 << 28);
1491 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1492 } else if (hw->mac_type == e1000_80003es2lan) {
1493 tarc = E1000_READ_REG(hw, TARC0);
1494 tarc |= 1;
1495 if (hw->media_type == e1000_media_type_internal_serdes)
1496 tarc |= (1 << 20);
1497 E1000_WRITE_REG(hw, TARC0, tarc);
1498 tarc = E1000_READ_REG(hw, TARC1);
1499 tarc |= 1;
1500 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1501 }
1502
581d708e 1503 e1000_config_collision_dist(hw);
1da177e4
LT		 1504
1505 /* Setup Transmit Descriptor Settings for eop descriptor */
1506 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1507 E1000_TXD_CMD_IFCS;
1508
581d708e 1509 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1510 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1511 else
1512 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1513
1514 /* Cache if we're 82544 running in PCI-X because we'll
1515 * need this to apply a workaround later in the send path. */
581d708e
MC		 1516 if (hw->mac_type == e1000_82544 &&
1517 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1518 adapter->pcix_82544 = 1;
7e6c9861
JK		 1519
1520 E1000_WRITE_REG(hw, TCTL, tctl);
1521
1da177e4
LT		 1522}
1523
1524/**
1525 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1526 * @adapter: board private structure
581d708e 1527 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1528 *
1529 * Returns 0 on success, negative on failure
1530 **/
1531
3ad2cc67 1532static int
581d708e
MC		 1533e1000_setup_rx_resources(struct e1000_adapter *adapter,
1534 struct e1000_rx_ring *rxdr)
1da177e4 1535{
1da177e4 1536 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1537 int size, desc_len;
1da177e4
LT		 1538
1539 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1540 rxdr->buffer_info = vmalloc(size);
581d708e 1541 if (!rxdr->buffer_info) {
2648345f
MC		 1542 DPRINTK(PROBE, ERR,
1543 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1544 return -ENOMEM;
1545 }
1546 memset(rxdr->buffer_info, 0, size);
1547
2d7edb92
MC		 1548 size = sizeof(struct e1000_ps_page) * rxdr->count;
1549 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1550 if (!rxdr->ps_page) {
2d7edb92
MC		 1551 vfree(rxdr->buffer_info);
1552 DPRINTK(PROBE, ERR,
1553 "Unable to allocate memory for the receive descriptor ring\n");
1554 return -ENOMEM;
1555 }
1556 memset(rxdr->ps_page, 0, size);
1557
1558 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1559 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1560 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1561 vfree(rxdr->buffer_info);
1562 kfree(rxdr->ps_page);
1563 DPRINTK(PROBE, ERR,
1564 "Unable to allocate memory for the receive descriptor ring\n");
1565 return -ENOMEM;
1566 }
1567 memset(rxdr->ps_page_dma, 0, size);
1568
96838a40 1569 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1570 desc_len = sizeof(struct e1000_rx_desc);
1571 else
1572 desc_len = sizeof(union e1000_rx_desc_packet_split);
1573
1da177e4
LT		 1574 /* Round up to nearest 4K */
1575
2d7edb92 1576 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1577 E1000_ROUNDUP(rxdr->size, 4096);
1578
1579 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1580
581d708e
MC		 1581 if (!rxdr->desc) {
1582 DPRINTK(PROBE, ERR,
1583 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1584setup_rx_desc_die:
1da177e4 1585 vfree(rxdr->buffer_info);
2d7edb92
MC		 1586 kfree(rxdr->ps_page);
1587 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1588 return -ENOMEM;
1589 }
1590
2648345f 1591 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1592 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1593 void *olddesc = rxdr->desc;
1594 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1595 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1596 "at %p\n", rxdr->size, rxdr->desc);
1597 /* Try again, without freeing the previous */
1da177e4 1598 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1599 /* Failed allocation, critical failure */
581d708e 1600 if (!rxdr->desc) {
1da177e4 1601 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1602 DPRINTK(PROBE, ERR,
1603 "Unable to allocate memory "
1604 "for the receive descriptor ring\n");
1da177e4
LT		 1605 goto setup_rx_desc_die;
1606 }
1607
1608 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1609 /* give up */
2648345f
MC		 1610 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1611 rxdr->dma);
1da177e4 1612 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1613 DPRINTK(PROBE, ERR,
1614 "Unable to allocate aligned memory "
1615 "for the receive descriptor ring\n");
581d708e 1616 goto setup_rx_desc_die;
1da177e4 1617 } else {
2648345f 1618 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1619 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1620 }
1621 }
1622 memset(rxdr->desc, 0, rxdr->size);
1623
1624 rxdr->next_to_clean = 0;
1625 rxdr->next_to_use = 0;
1626
1627 return 0;
1628}
1629
581d708e
MC		 1630/**
1631 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1632 * (Descriptors) for all queues
1633 * @adapter: board private structure
1634 *
1635 * If this function returns with an error, then it's possible one or
1636 * more of the rings is populated (while the rest are not). It is the
1637 * callers duty to clean those orphaned rings.
1638 *
1639 * Return 0 on success, negative on failure
1640 **/
1641
1642int
1643e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1644{
1645 int i, err = 0;
1646
f56799ea 1647 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1648 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1649 if (err) {
1650 DPRINTK(PROBE, ERR,
1651 "Allocation for Rx Queue %u failed\n", i);
1652 break;
1653 }
1654 }
1655
1656 return err;
1657}
1658
1da177e4 1659/**
2648345f 1660 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1661 * @adapter: Board private structure
1662 **/
e4c811c9
MC		 1663#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1664 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1665static void
1666e1000_setup_rctl(struct e1000_adapter *adapter)
1667{
2d7edb92
MC		 1668 uint32_t rctl, rfctl;
1669 uint32_t psrctl = 0;
35ec56bb 1670#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1671 uint32_t pages = 0;
1672#endif
1da177e4
LT		 1673
1674 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1675
1676 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1677
1678 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1679 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1680 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1681
0fadb059 1682 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1683 rctl |= E1000_RCTL_SBP;
1684 else
1685 rctl &= ~E1000_RCTL_SBP;
1686
2d7edb92
MC		 1687 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1688 rctl &= ~E1000_RCTL_LPE;
1689 else
1690 rctl |= E1000_RCTL_LPE;
1691
1da177e4 1692 /* Setup buffer sizes */
9e2feace
AK		 1693 rctl &= ~E1000_RCTL_SZ_4096;
1694 rctl |= E1000_RCTL_BSEX;
1695 switch (adapter->rx_buffer_len) {
1696 case E1000_RXBUFFER_256:
1697 rctl |= E1000_RCTL_SZ_256;
1698 rctl &= ~E1000_RCTL_BSEX;
1699 break;
1700 case E1000_RXBUFFER_512:
1701 rctl |= E1000_RCTL_SZ_512;
1702 rctl &= ~E1000_RCTL_BSEX;
1703 break;
1704 case E1000_RXBUFFER_1024:
1705 rctl |= E1000_RCTL_SZ_1024;
1706 rctl &= ~E1000_RCTL_BSEX;
1707 break;
a1415ee6
JK		 1708 case E1000_RXBUFFER_2048:
1709 default:
1710 rctl |= E1000_RCTL_SZ_2048;
1711 rctl &= ~E1000_RCTL_BSEX;
1712 break;
1713 case E1000_RXBUFFER_4096:
1714 rctl |= E1000_RCTL_SZ_4096;
1715 break;
1716 case E1000_RXBUFFER_8192:
1717 rctl |= E1000_RCTL_SZ_8192;
1718 break;
1719 case E1000_RXBUFFER_16384:
1720 rctl |= E1000_RCTL_SZ_16384;
1721 break;
2d7edb92
MC		 1722 }
1723
35ec56bb 1724#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1725 /* 82571 and greater support packet-split where the protocol
1726 * header is placed in skb->data and the packet data is
1727 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1728 * In the case of a non-split, skb->data is linearly filled,
1729 * followed by the page buffers. Therefore, skb->data is
1730 * sized to hold the largest protocol header.
1731 */
e4c811c9
MC		 1732 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1733 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1734 PAGE_SIZE <= 16384)
1735 adapter->rx_ps_pages = pages;
1736 else
1737 adapter->rx_ps_pages = 0;
2d7edb92 1738#endif
e4c811c9 1739 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1740 /* Configure extra packet-split registers */
1741 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1742 rfctl |= E1000_RFCTL_EXTEN;
1743 /* disable IPv6 packet split support */
1744 rfctl |= E1000_RFCTL_IPV6_DIS;
1745 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1746
7dfee0cb 1747 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1748
2d7edb92
MC		 1749 psrctl |= adapter->rx_ps_bsize0 >>
1750 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1751
1752 switch (adapter->rx_ps_pages) {
1753 case 3:
1754 psrctl |= PAGE_SIZE <<
1755 E1000_PSRCTL_BSIZE3_SHIFT;
1756 case 2:
1757 psrctl |= PAGE_SIZE <<
1758 E1000_PSRCTL_BSIZE2_SHIFT;
1759 case 1:
1760 psrctl |= PAGE_SIZE >>
1761 E1000_PSRCTL_BSIZE1_SHIFT;
1762 break;
1763 }
2d7edb92
MC		 1764
1765 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1766 }
1767
1768 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1769}
1770
1771/**
1772 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1773 * @adapter: board private structure
1774 *
1775 * Configure the Rx unit of the MAC after a reset.
1776 **/
1777
1778static void
1779e1000_configure_rx(struct e1000_adapter *adapter)
1780{
581d708e
MC		 1781 uint64_t rdba;
1782 struct e1000_hw *hw = &adapter->hw;
1783 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1784
e4c811c9 1785 if (adapter->rx_ps_pages) {
0f15a8fa 1786 /* this is a 32 byte descriptor */
581d708e 1787 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1788 sizeof(union e1000_rx_desc_packet_split);
1789 adapter->clean_rx = e1000_clean_rx_irq_ps;
1790 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1791 } else {
581d708e
MC		 1792 rdlen = adapter->rx_ring[0].count *
1793 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1794 adapter->clean_rx = e1000_clean_rx_irq;
1795 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1796 }
1da177e4
LT		 1797
1798 /* disable receives while setting up the descriptors */
581d708e
MC		 1799 rctl = E1000_READ_REG(hw, RCTL);
1800 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1801
1802 /* set the Receive Delay Timer Register */
581d708e 1803 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1804
581d708e
MC		 1805 if (hw->mac_type >= e1000_82540) {
1806 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1807 if (adapter->itr > 1)
581d708e 1808 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1809 1000000000 / (adapter->itr * 256));
1810 }
1811
2ae76d98 1812 if (hw->mac_type >= e1000_82571) {
2ae76d98 1813 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1814 /* Reset delay timers after every interrupt */
6fc7a7ec 1815 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1816#ifdef CONFIG_E1000_NAPI
1817 /* Auto-Mask interrupts upon ICR read. */
1818 ctrl_ext |= E1000_CTRL_EXT_IAME;
1819#endif
2ae76d98 1820 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1821 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1822 E1000_WRITE_FLUSH(hw);
1823 }
1824
581d708e
MC		 1825 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1826 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1827 switch (adapter->num_rx_queues) {
24025e4e
MC		 1828 case 1:
1829 default:
581d708e 1830 rdba = adapter->rx_ring[0].dma;
581d708e 1831 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1832 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1833 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1834 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1835 E1000_WRITE_REG(hw, RDH, 0);
581d708e
MC		 1836 adapter->rx_ring[0].rdh = E1000_RDH;
1837 adapter->rx_ring[0].rdt = E1000_RDT;
1838 break;
24025e4e
MC		 1839 }
1840
1da177e4 1841 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1842 if (hw->mac_type >= e1000_82543) {
1843 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1844 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1845 rxcsum |= E1000_RXCSUM_TUOFL;
1846
868d5309 1847 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1848 * Must be used in conjunction with packet-split. */
96838a40
JB		 1849 if ((hw->mac_type >= e1000_82571) &&
1850 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1851 rxcsum |= E1000_RXCSUM_IPPCSE;
1852 }
1853 } else {
1854 rxcsum &= ~E1000_RXCSUM_TUOFL;
1855 /* don't need to clear IPPCSE as it defaults to 0 */
1856 }
581d708e 1857 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1858 }
1859
1860 /* Enable Receives */
581d708e 1861 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1862}
1863
1864/**
581d708e 1865 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1866 * @adapter: board private structure
581d708e 1867 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1868 *
1869 * Free all transmit software resources
1870 **/
1871
3ad2cc67 1872static void
581d708e
MC		 1873e1000_free_tx_resources(struct e1000_adapter *adapter,
1874 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1875{
1876 struct pci_dev *pdev = adapter->pdev;
1877
581d708e 1878 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1879
581d708e
MC		 1880 vfree(tx_ring->buffer_info);
1881 tx_ring->buffer_info = NULL;
1da177e4 1882
581d708e 1883 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1884
581d708e
MC		 1885 tx_ring->desc = NULL;
1886}
1887
1888/**
1889 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1890 * @adapter: board private structure
1891 *
1892 * Free all transmit software resources
1893 **/
1894
1895void
1896e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1897{
1898 int i;
1899
f56799ea 1900 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1901 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1902}
1903
e619d523 1904static void
1da177e4
LT		 1905e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1906 struct e1000_buffer *buffer_info)
1907{
96838a40 1908 if (buffer_info->dma) {
2648345f
MC		 1909 pci_unmap_page(adapter->pdev,
1910 buffer_info->dma,
1911 buffer_info->length,
1912 PCI_DMA_TODEVICE);
1da177e4 1913 }
8241e35e 1914 if (buffer_info->skb)
1da177e4 1915 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1916 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1917}
1918
1919/**
1920 * e1000_clean_tx_ring - Free Tx Buffers
1921 * @adapter: board private structure
581d708e 1922 * @tx_ring: ring to be cleaned
1da177e4
LT		 1923 **/
1924
1925static void
581d708e
MC		 1926e1000_clean_tx_ring(struct e1000_adapter *adapter,
1927 struct e1000_tx_ring *tx_ring)
1da177e4 1928{
1da177e4
LT		 1929 struct e1000_buffer *buffer_info;
1930 unsigned long size;
1931 unsigned int i;
1932
1933 /* Free all the Tx ring sk_buffs */
1934
96838a40 1935 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1936 buffer_info = &tx_ring->buffer_info[i];
1937 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1938 }
1939
1940 size = sizeof(struct e1000_buffer) * tx_ring->count;
1941 memset(tx_ring->buffer_info, 0, size);
1942
1943 /* Zero out the descriptor ring */
1944
1945 memset(tx_ring->desc, 0, tx_ring->size);
1946
1947 tx_ring->next_to_use = 0;
1948 tx_ring->next_to_clean = 0;
fd803241 1949 tx_ring->last_tx_tso = 0;
1da177e4 1950
581d708e
MC		 1951 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1952 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1953}
1954
1955/**
1956 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1957 * @adapter: board private structure
1958 **/
1959
1960static void
1961e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1962{
1963 int i;
1964
f56799ea 1965 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1966 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1967}
1968
1969/**
1970 * e1000_free_rx_resources - Free Rx Resources
1971 * @adapter: board private structure
581d708e 1972 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1973 *
1974 * Free all receive software resources
1975 **/
1976
3ad2cc67 1977static void
581d708e
MC		 1978e1000_free_rx_resources(struct e1000_adapter *adapter,
1979 struct e1000_rx_ring *rx_ring)
1da177e4 1980{
1da177e4
LT		 1981 struct pci_dev *pdev = adapter->pdev;
1982
581d708e 1983 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1984
1985 vfree(rx_ring->buffer_info);
1986 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1987 kfree(rx_ring->ps_page);
1988 rx_ring->ps_page = NULL;
1989 kfree(rx_ring->ps_page_dma);
1990 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1991
1992 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1993
1994 rx_ring->desc = NULL;
1995}
1996
1997/**
581d708e 1998 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1999 * @adapter: board private structure
581d708e
MC		 2000 *
2001 * Free all receive software resources
2002 **/
2003
2004void
2005e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2006{
2007 int i;
2008
f56799ea 2009 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2010 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2011}
2012
2013/**
2014 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2015 * @adapter: board private structure
2016 * @rx_ring: ring to free buffers from
1da177e4
LT		 2017 **/
2018
2019static void
581d708e
MC		 2020e1000_clean_rx_ring(struct e1000_adapter *adapter,
2021 struct e1000_rx_ring *rx_ring)
1da177e4 2022{
1da177e4 2023 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2024 struct e1000_ps_page *ps_page;
2025 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2026 struct pci_dev *pdev = adapter->pdev;
2027 unsigned long size;
2d7edb92 2028 unsigned int i, j;
1da177e4
LT		 2029
2030 /* Free all the Rx ring sk_buffs */
96838a40 2031 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2032 buffer_info = &rx_ring->buffer_info[i];
96838a40 2033 if (buffer_info->skb) {
1da177e4
LT		 2034 pci_unmap_single(pdev,
2035 buffer_info->dma,
2036 buffer_info->length,
2037 PCI_DMA_FROMDEVICE);
2038
2039 dev_kfree_skb(buffer_info->skb);
2040 buffer_info->skb = NULL;
997f5cbd
JK		 2041 }
2042 ps_page = &rx_ring->ps_page[i];
2043 ps_page_dma = &rx_ring->ps_page_dma[i];
2044 for (j = 0; j < adapter->rx_ps_pages; j++) {
2045 if (!ps_page->ps_page[j]) break;
2046 pci_unmap_page(pdev,
2047 ps_page_dma->ps_page_dma[j],
2048 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2049 ps_page_dma->ps_page_dma[j] = 0;
2050 put_page(ps_page->ps_page[j]);
2051 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2052 }
2053 }
2054
2055 size = sizeof(struct e1000_buffer) * rx_ring->count;
2056 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2057 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2058 memset(rx_ring->ps_page, 0, size);
2059 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2060 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2061
2062 /* Zero out the descriptor ring */
2063
2064 memset(rx_ring->desc, 0, rx_ring->size);
2065
2066 rx_ring->next_to_clean = 0;
2067 rx_ring->next_to_use = 0;
2068
581d708e
MC		 2069 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2070 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2071}
2072
2073/**
2074 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2075 * @adapter: board private structure
2076 **/
2077
2078static void
2079e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2080{
2081 int i;
2082
f56799ea 2083 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2084 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2085}
2086
2087/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2088 * and memory write and invalidate disabled for certain operations
2089 */
2090static void
2091e1000_enter_82542_rst(struct e1000_adapter *adapter)
2092{
2093 struct net_device *netdev = adapter->netdev;
2094 uint32_t rctl;
2095
2096 e1000_pci_clear_mwi(&adapter->hw);
2097
2098 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2099 rctl |= E1000_RCTL_RST;
2100 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2101 E1000_WRITE_FLUSH(&adapter->hw);
2102 mdelay(5);
2103
96838a40 2104 if (netif_running(netdev))
581d708e 2105 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2106}
2107
2108static void
2109e1000_leave_82542_rst(struct e1000_adapter *adapter)
2110{
2111 struct net_device *netdev = adapter->netdev;
2112 uint32_t rctl;
2113
2114 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2115 rctl &= ~E1000_RCTL_RST;
2116 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2117 E1000_WRITE_FLUSH(&adapter->hw);
2118 mdelay(5);
2119
96838a40 2120 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2121 e1000_pci_set_mwi(&adapter->hw);
2122
96838a40 2123 if (netif_running(netdev)) {
72d64a43
JK		 2124 /* No need to loop, because 82542 supports only 1 queue */
2125 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2126 e1000_configure_rx(adapter);
72d64a43 2127 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2128 }
2129}
2130
2131/**
2132 * e1000_set_mac - Change the Ethernet Address of the NIC
2133 * @netdev: network interface device structure
2134 * @p: pointer to an address structure
2135 *
2136 * Returns 0 on success, negative on failure
2137 **/
2138
2139static int
2140e1000_set_mac(struct net_device *netdev, void *p)
2141{
60490fe0 2142 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2143 struct sockaddr *addr = p;
2144
96838a40 2145 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2146 return -EADDRNOTAVAIL;
2147
2148 /* 82542 2.0 needs to be in reset to write receive address registers */
2149
96838a40 2150 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2151 e1000_enter_82542_rst(adapter);
2152
2153 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2154 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2155
2156 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2157
868d5309
MC		 2158 /* With 82571 controllers, LAA may be overwritten (with the default)
2159 * due to controller reset from the other port. */
2160 if (adapter->hw.mac_type == e1000_82571) {
2161 /* activate the work around */
2162 adapter->hw.laa_is_present = 1;
2163
96838a40
JB		 2164 /* Hold a copy of the LAA in RAR[14] This is done so that
2165 * between the time RAR[0] gets clobbered and the time it
2166 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2167 * of the RARs and no incoming packets directed to this port
96838a40 2168 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2169 * RAR[14] */
96838a40 2170 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2171 E1000_RAR_ENTRIES - 1);
2172 }
2173
96838a40 2174 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2175 e1000_leave_82542_rst(adapter);
2176
2177 return 0;
2178}
2179
2180/**
2181 * e1000_set_multi - Multicast and Promiscuous mode set
2182 * @netdev: network interface device structure
2183 *
2184 * The set_multi entry point is called whenever the multicast address
2185 * list or the network interface flags are updated. This routine is
2186 * responsible for configuring the hardware for proper multicast,
2187 * promiscuous mode, and all-multi behavior.
2188 **/
2189
2190static void
2191e1000_set_multi(struct net_device *netdev)
2192{
60490fe0 2193 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2194 struct e1000_hw *hw = &adapter->hw;
2195 struct dev_mc_list *mc_ptr;
2196 uint32_t rctl;
2197 uint32_t hash_value;
868d5309 2198 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2199 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2200 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2201 E1000_NUM_MTA_REGISTERS;
2202
2203 if (adapter->hw.mac_type == e1000_ich8lan)
2204 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2205
868d5309
MC		 2206 /* reserve RAR[14] for LAA over-write work-around */
2207 if (adapter->hw.mac_type == e1000_82571)
2208 rar_entries--;
1da177e4 2209
2648345f
MC		 2210 /* Check for Promiscuous and All Multicast modes */
2211
1da177e4
LT		 2212 rctl = E1000_READ_REG(hw, RCTL);
2213
96838a40 2214 if (netdev->flags & IFF_PROMISC) {
1da177e4 2215 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2216 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2217 rctl |= E1000_RCTL_MPE;
2218 rctl &= ~E1000_RCTL_UPE;
2219 } else {
2220 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2221 }
2222
2223 E1000_WRITE_REG(hw, RCTL, rctl);
2224
2225 /* 82542 2.0 needs to be in reset to write receive address registers */
2226
96838a40 2227 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2228 e1000_enter_82542_rst(adapter);
2229
2230 /* load the first 14 multicast address into the exact filters 1-14
2231 * RAR 0 is used for the station MAC adddress
2232 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2233 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2234 */
2235 mc_ptr = netdev->mc_list;
2236
96838a40 2237 for (i = 1; i < rar_entries; i++) {
868d5309 2238 if (mc_ptr) {
1da177e4
LT		 2239 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2240 mc_ptr = mc_ptr->next;
2241 } else {
2242 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2243 E1000_WRITE_FLUSH(hw);
1da177e4 2244 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2245 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2246 }
2247 }
2248
2249 /* clear the old settings from the multicast hash table */
2250
cd94dd0b 2251 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2252 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2253 E1000_WRITE_FLUSH(hw);
2254 }
1da177e4
LT		 2255
2256 /* load any remaining addresses into the hash table */
2257
96838a40 2258 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2259 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2260 e1000_mta_set(hw, hash_value);
2261 }
2262
96838a40 2263 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2264 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2265}
2266
2267/* Need to wait a few seconds after link up to get diagnostic information from
2268 * the phy */
2269
2270static void
2271e1000_update_phy_info(unsigned long data)
2272{
2273 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2274 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2275}
2276
2277/**
2278 * e1000_82547_tx_fifo_stall - Timer Call-back
2279 * @data: pointer to adapter cast into an unsigned long
2280 **/
2281
2282static void
2283e1000_82547_tx_fifo_stall(unsigned long data)
2284{
2285 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2286 struct net_device *netdev = adapter->netdev;
2287 uint32_t tctl;
2288
96838a40
JB		 2289 if (atomic_read(&adapter->tx_fifo_stall)) {
2290 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2291 E1000_READ_REG(&adapter->hw, TDH)) &&
2292 (E1000_READ_REG(&adapter->hw, TDFT) ==
2293 E1000_READ_REG(&adapter->hw, TDFH)) &&
2294 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2295 E1000_READ_REG(&adapter->hw, TDFHS))) {
2296 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2297 E1000_WRITE_REG(&adapter->hw, TCTL,
2298 tctl & ~E1000_TCTL_EN);
2299 E1000_WRITE_REG(&adapter->hw, TDFT,
2300 adapter->tx_head_addr);
2301 E1000_WRITE_REG(&adapter->hw, TDFH,
2302 adapter->tx_head_addr);
2303 E1000_WRITE_REG(&adapter->hw, TDFTS,
2304 adapter->tx_head_addr);
2305 E1000_WRITE_REG(&adapter->hw, TDFHS,
2306 adapter->tx_head_addr);
2307 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2308 E1000_WRITE_FLUSH(&adapter->hw);
2309
2310 adapter->tx_fifo_head = 0;
2311 atomic_set(&adapter->tx_fifo_stall, 0);
2312 netif_wake_queue(netdev);
2313 } else {
2314 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2315 }
2316 }
2317}
2318
2319/**
2320 * e1000_watchdog - Timer Call-back
2321 * @data: pointer to adapter cast into an unsigned long
2322 **/
2323static void
2324e1000_watchdog(unsigned long data)
2325{
2326 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2327 struct net_device *netdev = adapter->netdev;
545c67c0 2328 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2329 uint32_t link, tctl;
cd94dd0b
AK		 2330 int32_t ret_val;
2331
2332 ret_val = e1000_check_for_link(&adapter->hw);
2333 if ((ret_val == E1000_ERR_PHY) &&
2334 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2335 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2336 /* See e1000_kumeran_lock_loss_workaround() */
2337 DPRINTK(LINK, INFO,
2338 "Gigabit has been disabled, downgrading speed\n");
2339 }
2d7edb92
MC		 2340 if (adapter->hw.mac_type == e1000_82573) {
2341 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2342 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2343 e1000_update_mng_vlan(adapter);
96838a40 2344 }
1da177e4 2345
96838a40 2346 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2347 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2348 link = !adapter->hw.serdes_link_down;
2349 else
2350 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2351
96838a40
JB		 2352 if (link) {
2353 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2354 boolean_t txb2b = 1;
1da177e4
LT		 2355 e1000_get_speed_and_duplex(&adapter->hw,
2356 &adapter->link_speed,
2357 &adapter->link_duplex);
2358
2359 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2360 adapter->link_speed,
2361 adapter->link_duplex == FULL_DUPLEX ?
2362 "Full Duplex" : "Half Duplex");
2363
7e6c9861
JK		 2364 /* tweak tx_queue_len according to speed/duplex
2365 * and adjust the timeout factor */
66a2b0a3
JK		 2366 netdev->tx_queue_len = adapter->tx_queue_len;
2367 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2368 switch (adapter->link_speed) {
2369 case SPEED_10:
fe7fe28e 2370 txb2b = 0;
7e6c9861
JK		 2371 netdev->tx_queue_len = 10;
2372 adapter->tx_timeout_factor = 8;
2373 break;
2374 case SPEED_100:
fe7fe28e 2375 txb2b = 0;
7e6c9861
JK		 2376 netdev->tx_queue_len = 100;
2377 /* maybe add some timeout factor ? */
2378 break;
2379 }
2380
fe7fe28e 2381 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2382 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2383 txb2b == 0) {
7e6c9861
JK		 2384#define SPEED_MODE_BIT (1 << 21)
2385 uint32_t tarc0;
2386 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2387 tarc0 &= ~SPEED_MODE_BIT;
2388 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2389 }
2390
2391#ifdef NETIF_F_TSO
2392 /* disable TSO for pcie and 10/100 speeds, to avoid
2393 * some hardware issues */
2394 if (!adapter->tso_force &&
2395 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2396 switch (adapter->link_speed) {
2397 case SPEED_10:
66a2b0a3 2398 case SPEED_100:
7e6c9861
JK		 2399 DPRINTK(PROBE,INFO,
2400 "10/100 speed: disabling TSO\n");
2401 netdev->features &= ~NETIF_F_TSO;
2402 break;
2403 case SPEED_1000:
2404 netdev->features |= NETIF_F_TSO;
2405 break;
2406 default:
2407 /* oops */
66a2b0a3
JK		 2408 break;
2409 }
2410 }
7e6c9861
JK		 2411#endif
2412
2413 /* enable transmits in the hardware, need to do this
2414 * after setting TARC0 */
2415 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2416 tctl |= E1000_TCTL_EN;
2417 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2418
1da177e4
LT		 2419 netif_carrier_on(netdev);
2420 netif_wake_queue(netdev);
2421 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2422 adapter->smartspeed = 0;
2423 }
2424 } else {
96838a40 2425 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2426 adapter->link_speed = 0;
2427 adapter->link_duplex = 0;
2428 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2429 netif_carrier_off(netdev);
2430 netif_stop_queue(netdev);
2431 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2432
2433 /* 80003ES2LAN workaround--
2434 * For packet buffer work-around on link down event;
2435 * disable receives in the ISR and
2436 * reset device here in the watchdog
2437 */
2438 if (adapter->hw.mac_type == e1000_80003es2lan) {
2439 /* reset device */
2440 schedule_work(&adapter->reset_task);
2441 }
1da177e4
LT		 2442 }
2443
2444 e1000_smartspeed(adapter);
2445 }
2446
2447 e1000_update_stats(adapter);
2448
2449 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2450 adapter->tpt_old = adapter->stats.tpt;
2451 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2452 adapter->colc_old = adapter->stats.colc;
2453
2454 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2455 adapter->gorcl_old = adapter->stats.gorcl;
2456 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2457 adapter->gotcl_old = adapter->stats.gotcl;
2458
2459 e1000_update_adaptive(&adapter->hw);
2460
f56799ea 2461 if (!netif_carrier_ok(netdev)) {
581d708e 2462 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2463 /* We've lost link, so the controller stops DMA,
2464 * but we've got queued Tx work that's never going
2465 * to get done, so reset controller to flush Tx.
2466 * (Do the reset outside of interrupt context). */
87041639
JK		 2467 adapter->tx_timeout_count++;
2468 schedule_work(&adapter->reset_task);
1da177e4
LT		 2469 }
2470 }
2471
2472 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2473 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2474 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2475 * asymmetrical Tx or Rx gets ITR=8000; everyone
2476 * else is between 2000-8000. */
2477 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2478 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2479 adapter->gotcl - adapter->gorcl :
2480 adapter->gorcl - adapter->gotcl) / 10000;
2481 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2482 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2483 }
2484
2485 /* Cause software interrupt to ensure rx ring is cleaned */
2486 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2487
2648345f 2488 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2489 adapter->detect_tx_hung = TRUE;
2490
96838a40 2491 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2492 * reset from the other port. Set the appropriate LAA in RAR[0] */
2493 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2494 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2495
1da177e4
LT		 2496 /* Reset the timer */
2497 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2498}
2499
2500#define E1000_TX_FLAGS_CSUM 0x00000001
2501#define E1000_TX_FLAGS_VLAN 0x00000002
2502#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2503#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2504#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2505#define E1000_TX_FLAGS_VLAN_SHIFT 16
2506
e619d523 2507static int
581d708e
MC		 2508e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2509 struct sk_buff *skb)
1da177e4
LT		 2510{
2511#ifdef NETIF_F_TSO
2512 struct e1000_context_desc *context_desc;
545c67c0 2513 struct e1000_buffer *buffer_info;
1da177e4
LT		 2514 unsigned int i;
2515 uint32_t cmd_length = 0;
2d7edb92 2516 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2517 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2518 int err;
2519
96838a40 2520 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2521 if (skb_header_cloned(skb)) {
2522 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2523 if (err)
2524 return err;
2525 }
2526
2527 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2528 mss = skb_shinfo(skb)->tso_size;
60828236 2529 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2530 skb->nh.iph->tot_len = 0;
2531 skb->nh.iph->check = 0;
2532 skb->h.th->check =
2533 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2534 skb->nh.iph->daddr,
2535 0,
2536 IPPROTO_TCP,
2537 0);
2538 cmd_length = E1000_TXD_CMD_IP;
2539 ipcse = skb->h.raw - skb->data - 1;
2540#ifdef NETIF_F_TSO_IPV6
96838a40 2541 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2542 skb->nh.ipv6h->payload_len = 0;
2543 skb->h.th->check =
2544 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2545 &skb->nh.ipv6h->daddr,
2546 0,
2547 IPPROTO_TCP,
2548 0);
2549 ipcse = 0;
2550#endif
2551 }
1da177e4
LT		 2552 ipcss = skb->nh.raw - skb->data;
2553 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2554 tucss = skb->h.raw - skb->data;
2555 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2556 tucse = 0;
2557
2558 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2559 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2560
581d708e
MC		 2561 i = tx_ring->next_to_use;
2562 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2563 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2564
2565 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2566 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2567 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2568 context_desc->upper_setup.tcp_fields.tucss = tucss;
2569 context_desc->upper_setup.tcp_fields.tucso = tucso;
2570 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2571 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2572 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2573 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2574
545c67c0
JK		 2575 buffer_info->time_stamp = jiffies;
2576
581d708e
MC		 2577 if (++i == tx_ring->count) i = 0;
2578 tx_ring->next_to_use = i;
1da177e4 2579
8241e35e 2580 return TRUE;
1da177e4
LT		 2581 }
2582#endif
2583
8241e35e 2584 return FALSE;
1da177e4
LT		 2585}
2586
e619d523 2587static boolean_t
581d708e
MC		 2588e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2589 struct sk_buff *skb)
1da177e4
LT		 2590{
2591 struct e1000_context_desc *context_desc;
545c67c0 2592 struct e1000_buffer *buffer_info;
1da177e4
LT		 2593 unsigned int i;
2594 uint8_t css;
2595
96838a40 2596 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2597 css = skb->h.raw - skb->data;
2598
581d708e 2599 i = tx_ring->next_to_use;
545c67c0 2600 buffer_info = &tx_ring->buffer_info[i];
581d708e 2601 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2602
2603 context_desc->upper_setup.tcp_fields.tucss = css;
2604 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2605 context_desc->upper_setup.tcp_fields.tucse = 0;
2606 context_desc->tcp_seg_setup.data = 0;
2607 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2608
545c67c0
JK		 2609 buffer_info->time_stamp = jiffies;
2610
581d708e
MC		 2611 if (unlikely(++i == tx_ring->count)) i = 0;
2612 tx_ring->next_to_use = i;
1da177e4
LT		 2613
2614 return TRUE;
2615 }
2616
2617 return FALSE;
2618}
2619
2620#define E1000_MAX_TXD_PWR 12
2621#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2622
e619d523 2623static int
581d708e
MC		 2624e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2625 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2626 unsigned int nr_frags, unsigned int mss)
1da177e4 2627{
1da177e4
LT		 2628 struct e1000_buffer *buffer_info;
2629 unsigned int len = skb->len;
2630 unsigned int offset = 0, size, count = 0, i;
2631 unsigned int f;
2632 len -= skb->data_len;
2633
2634 i = tx_ring->next_to_use;
2635
96838a40 2636 while (len) {
1da177e4
LT		 2637 buffer_info = &tx_ring->buffer_info[i];
2638 size = min(len, max_per_txd);
2639#ifdef NETIF_F_TSO
fd803241
JK		 2640 /* Workaround for Controller erratum --
2641 * descriptor for non-tso packet in a linear SKB that follows a
2642 * tso gets written back prematurely before the data is fully
0f15a8fa 2643 * DMA'd to the controller */
fd803241 2644 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2645 !skb_shinfo(skb)->tso_size) {
fd803241
JK		 2646 tx_ring->last_tx_tso = 0;
2647 size -= 4;
2648 }
2649
1da177e4
LT		 2650 /* Workaround for premature desc write-backs
2651 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2652 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2653 size -= 4;
2654#endif
97338bde
MC		 2655 /* work-around for errata 10 and it applies
2656 * to all controllers in PCI-X mode
2657 * The fix is to make sure that the first descriptor of a
2658 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2659 */
96838a40 2660 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2661 (size > 2015) && count == 0))
2662 size = 2015;
96838a40 2663
1da177e4
LT		 2664 /* Workaround for potential 82544 hang in PCI-X. Avoid
2665 * terminating buffers within evenly-aligned dwords. */
96838a40 2666 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2667 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2668 size > 4))
2669 size -= 4;
2670
2671 buffer_info->length = size;
2672 buffer_info->dma =
2673 pci_map_single(adapter->pdev,
2674 skb->data + offset,
2675 size,
2676 PCI_DMA_TODEVICE);
2677 buffer_info->time_stamp = jiffies;
2678
2679 len -= size;
2680 offset += size;
2681 count++;
96838a40 2682 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2683 }
2684
96838a40 2685 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2686 struct skb_frag_struct *frag;
2687
2688 frag = &skb_shinfo(skb)->frags[f];
2689 len = frag->size;
2690 offset = frag->page_offset;
2691
96838a40 2692 while (len) {
1da177e4
LT		 2693 buffer_info = &tx_ring->buffer_info[i];
2694 size = min(len, max_per_txd);
2695#ifdef NETIF_F_TSO
2696 /* Workaround for premature desc write-backs
2697 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2698 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2699 size -= 4;
2700#endif
2701 /* Workaround for potential 82544 hang in PCI-X.
2702 * Avoid terminating buffers within evenly-aligned
2703 * dwords. */
96838a40 2704 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2705 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2706 size > 4))
2707 size -= 4;
2708
2709 buffer_info->length = size;
2710 buffer_info->dma =
2711 pci_map_page(adapter->pdev,
2712 frag->page,
2713 offset,
2714 size,
2715 PCI_DMA_TODEVICE);
2716 buffer_info->time_stamp = jiffies;
2717
2718 len -= size;
2719 offset += size;
2720 count++;
96838a40 2721 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2722 }
2723 }
2724
2725 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2726 tx_ring->buffer_info[i].skb = skb;
2727 tx_ring->buffer_info[first].next_to_watch = i;
2728
2729 return count;
2730}
2731
e619d523 2732static void
581d708e
MC		 2733e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2734 int tx_flags, int count)
1da177e4 2735{
1da177e4
LT		 2736 struct e1000_tx_desc *tx_desc = NULL;
2737 struct e1000_buffer *buffer_info;
2738 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2739 unsigned int i;
2740
96838a40 2741 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2742 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2743 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2744 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2745
96838a40 2746 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2747 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2748 }
2749
96838a40 2750 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2751 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2752 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2753 }
2754
96838a40 2755 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2756 txd_lower |= E1000_TXD_CMD_VLE;
2757 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2758 }
2759
2760 i = tx_ring->next_to_use;
2761
96838a40 2762 while (count--) {
1da177e4
LT		 2763 buffer_info = &tx_ring->buffer_info[i];
2764 tx_desc = E1000_TX_DESC(*tx_ring, i);
2765 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2766 tx_desc->lower.data =
2767 cpu_to_le32(txd_lower | buffer_info->length);
2768 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2769 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2770 }
2771
2772 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2773
2774 /* Force memory writes to complete before letting h/w
2775 * know there are new descriptors to fetch. (Only
2776 * applicable for weak-ordered memory model archs,
2777 * such as IA-64). */
2778 wmb();
2779
2780 tx_ring->next_to_use = i;
581d708e 2781 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2782}
2783
2784/**
2785 * 82547 workaround to avoid controller hang in half-duplex environment.
2786 * The workaround is to avoid queuing a large packet that would span
2787 * the internal Tx FIFO ring boundary by notifying the stack to resend
2788 * the packet at a later time. This gives the Tx FIFO an opportunity to
2789 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2790 * to the beginning of the Tx FIFO.
2791 **/
2792
2793#define E1000_FIFO_HDR 0x10
2794#define E1000_82547_PAD_LEN 0x3E0
2795
e619d523 2796static int
1da177e4
LT		 2797e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2798{
2799 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2800 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2801
2802 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2803
96838a40 2804 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2805 goto no_fifo_stall_required;
2806
96838a40 2807 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2808 return 1;
2809
96838a40 2810 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2811 atomic_set(&adapter->tx_fifo_stall, 1);
2812 return 1;
2813 }
2814
2815no_fifo_stall_required:
2816 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2817 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2818 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2819 return 0;
2820}
2821
2d7edb92 2822#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2823static int
2d7edb92
MC		 2824e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2825{
2826 struct e1000_hw *hw = &adapter->hw;
2827 uint16_t length, offset;
96838a40
JB		 2828 if (vlan_tx_tag_present(skb)) {
2829 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2830 ( adapter->hw.mng_cookie.status &
2831 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2832 return 0;
2833 }
20a44028 2834 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2835 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2836 if ((htons(ETH_P_IP) == eth->h_proto)) {
2837 const struct iphdr *ip =
2d7edb92 2838 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2839 if (IPPROTO_UDP == ip->protocol) {
2840 struct udphdr *udp =
2841 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2842 (ip->ihl << 2));
96838a40 2843 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2844 offset = (uint8_t *)udp + 8 - skb->data;
2845 length = skb->len - offset;
2846
2847 return e1000_mng_write_dhcp_info(hw,
96838a40 2848 (uint8_t *)udp + 8,
2d7edb92
MC		 2849 length);
2850 }
2851 }
2852 }
2853 }
2854 return 0;
2855}
2856
1da177e4
LT		 2857#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2858static int
2859e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2860{
60490fe0 2861 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2862 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2863 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2864 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2865 unsigned int tx_flags = 0;
2866 unsigned int len = skb->len;
2867 unsigned long flags;
2868 unsigned int nr_frags = 0;
2869 unsigned int mss = 0;
2870 int count = 0;
76c224bc 2871 int tso;
1da177e4
LT		 2872 unsigned int f;
2873 len -= skb->data_len;
2874
581d708e 2875 tx_ring = adapter->tx_ring;
24025e4e 2876
581d708e 2877 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2878 dev_kfree_skb_any(skb);
2879 return NETDEV_TX_OK;
2880 }
2881
2882#ifdef NETIF_F_TSO
2883 mss = skb_shinfo(skb)->tso_size;
76c224bc 2884 /* The controller does a simple calculation to
1da177e4
LT		 2885 * make sure there is enough room in the FIFO before
2886 * initiating the DMA for each buffer. The calc is:
2887 * 4 = ceil(buffer len/mss). To make sure we don't
2888 * overrun the FIFO, adjust the max buffer len if mss
2889 * drops. */
96838a40 2890 if (mss) {
9a3056da 2891 uint8_t hdr_len;
1da177e4
LT		 2892 max_per_txd = min(mss << 2, max_per_txd);
2893 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2894
9f687888 2895 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2896 * points to just header, pull a few bytes of payload from
2897 * frags into skb->data */
2898 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2899 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2900 switch (adapter->hw.mac_type) {
2901 unsigned int pull_size;
2902 case e1000_82571:
2903 case e1000_82572:
2904 case e1000_82573:
cd94dd0b 2905 case e1000_ich8lan:
9f687888
JK		 2906 pull_size = min((unsigned int)4, skb->data_len);
2907 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2908 DPRINTK(DRV, ERR,
9f687888
JK		 2909 "__pskb_pull_tail failed.\n");
2910 dev_kfree_skb_any(skb);
749dfc70 2911 return NETDEV_TX_OK;
9f687888
JK		 2912 }
2913 len = skb->len - skb->data_len;
2914 break;
2915 default:
2916 /* do nothing */
2917 break;
d74bbd3b 2918 }
9a3056da 2919 }
1da177e4
LT		 2920 }
2921
9a3056da 2922 /* reserve a descriptor for the offload context */
96838a40 2923 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2924 count++;
2648345f 2925 count++;
1da177e4 2926#else
96838a40 2927 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2928 count++;
2929#endif
fd803241
JK		 2930
2931#ifdef NETIF_F_TSO
2932 /* Controller Erratum workaround */
2933 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2934 !skb_shinfo(skb)->tso_size)
fd803241
JK		 2935 count++;
2936#endif
2937
1da177e4
LT		 2938 count += TXD_USE_COUNT(len, max_txd_pwr);
2939
96838a40 2940 if (adapter->pcix_82544)
1da177e4
LT		 2941 count++;
2942
96838a40 2943 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2944 * in PCI-X mode, so add one more descriptor to the count
2945 */
96838a40 2946 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2947 (len > 2015)))
2948 count++;
2949
1da177e4 2950 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2951 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2952 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2953 max_txd_pwr);
96838a40 2954 if (adapter->pcix_82544)
1da177e4
LT		 2955 count += nr_frags;
2956
0f15a8fa
JK		 2957
2958 if (adapter->hw.tx_pkt_filtering &&
2959 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 2960 e1000_transfer_dhcp_info(adapter, skb);
2961
581d708e
MC		 2962 local_irq_save(flags);
2963 if (!spin_trylock(&tx_ring->tx_lock)) {
2964 /* Collision - tell upper layer to requeue */
2965 local_irq_restore(flags);
2966 return NETDEV_TX_LOCKED;
2967 }
1da177e4
LT		 2968
2969 /* need: count + 2 desc gap to keep tail from touching
2970 * head, otherwise try next time */
581d708e 2971 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2972 netif_stop_queue(netdev);
581d708e 2973 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2974 return NETDEV_TX_BUSY;
2975 }
2976
96838a40
JB		 2977 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2978 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2979 netif_stop_queue(netdev);
2980 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2981 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2982 return NETDEV_TX_BUSY;
2983 }
2984 }
2985
96838a40 2986 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2987 tx_flags |= E1000_TX_FLAGS_VLAN;
2988 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2989 }
2990
581d708e 2991 first = tx_ring->next_to_use;
96838a40 2992
581d708e 2993 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2994 if (tso < 0) {
2995 dev_kfree_skb_any(skb);
581d708e 2996 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2997 return NETDEV_TX_OK;
2998 }
2999
fd803241
JK		 3000 if (likely(tso)) {
3001 tx_ring->last_tx_tso = 1;
1da177e4 3002 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3003 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3004 tx_flags |= E1000_TX_FLAGS_CSUM;
3005
2d7edb92 3006 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3007 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3008 * no longer assume, we must. */
60828236 3009 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3010 tx_flags |= E1000_TX_FLAGS_IPV4;
3011
581d708e
MC		 3012 e1000_tx_queue(adapter, tx_ring, tx_flags,
3013 e1000_tx_map(adapter, tx_ring, skb, first,
3014 max_per_txd, nr_frags, mss));
1da177e4
LT		 3015
3016 netdev->trans_start = jiffies;
3017
3018 /* Make sure there is space in the ring for the next send. */
581d708e 3019 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 3020 netif_stop_queue(netdev);
3021
581d708e 3022 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3023 return NETDEV_TX_OK;
3024}
3025
3026/**
3027 * e1000_tx_timeout - Respond to a Tx Hang
3028 * @netdev: network interface device structure
3029 **/
3030
3031static void
3032e1000_tx_timeout(struct net_device *netdev)
3033{
60490fe0 3034 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3035
3036 /* Do the reset outside of interrupt context */
87041639
JK		 3037 adapter->tx_timeout_count++;
3038 schedule_work(&adapter->reset_task);
1da177e4
LT		 3039}
3040
3041static void
87041639 3042e1000_reset_task(struct net_device *netdev)
1da177e4 3043{
60490fe0 3044 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3045
2db10a08 3046 e1000_reinit_locked(adapter);
1da177e4
LT		 3047}
3048
3049/**
3050 * e1000_get_stats - Get System Network Statistics
3051 * @netdev: network interface device structure
3052 *
3053 * Returns the address of the device statistics structure.
3054 * The statistics are actually updated from the timer callback.
3055 **/
3056
3057static struct net_device_stats *
3058e1000_get_stats(struct net_device *netdev)
3059{
60490fe0 3060 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3061
6b7660cd 3062 /* only return the current stats */
1da177e4
LT		 3063 return &adapter->net_stats;
3064}
3065
3066/**
3067 * e1000_change_mtu - Change the Maximum Transfer Unit
3068 * @netdev: network interface device structure
3069 * @new_mtu: new value for maximum frame size
3070 *
3071 * Returns 0 on success, negative on failure
3072 **/
3073
3074static int
3075e1000_change_mtu(struct net_device *netdev, int new_mtu)
3076{
60490fe0 3077 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3078 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3079 uint16_t eeprom_data = 0;
1da177e4 3080
96838a40
JB		 3081 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3082 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3083 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3084 return -EINVAL;
2d7edb92 3085 }
1da177e4 3086
997f5cbd
JK		 3087 /* Adapter-specific max frame size limits. */
3088 switch (adapter->hw.mac_type) {
9e2feace 3089 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3090 case e1000_ich8lan:
997f5cbd
JK		 3091 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3092 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3093 return -EINVAL;
2d7edb92 3094 }
997f5cbd 3095 break;
85b22eb6
JK		 3096 case e1000_82573:
3097 /* only enable jumbo frames if ASPM is disabled completely
3098 * this means both bits must be zero in 0x1A bits 3:2 */
3099 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3100 &eeprom_data);
3101 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3102 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3103 DPRINTK(PROBE, ERR,
3104 "Jumbo Frames not supported.\n");
3105 return -EINVAL;
3106 }
3107 break;
3108 }
3109 /* fall through to get support */
997f5cbd
JK		 3110 case e1000_82571:
3111 case e1000_82572:
87041639 3112 case e1000_80003es2lan:
997f5cbd
JK		 3113#define MAX_STD_JUMBO_FRAME_SIZE 9234
3114 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3115 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3116 return -EINVAL;
3117 }
3118 break;
3119 default:
3120 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3121 break;
1da177e4
LT		 3122 }
3123
9e2feace
AK		 3124 /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3125 * means we reserve 2 more, this pushes us to allocate from the next
3126 * larger slab size
3127 * i.e. RXBUFFER_2048 --> size-4096 slab */
3128
3129 if (max_frame <= E1000_RXBUFFER_256)
3130 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3131 else if (max_frame <= E1000_RXBUFFER_512)
3132 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3133 else if (max_frame <= E1000_RXBUFFER_1024)
3134 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3135 else if (max_frame <= E1000_RXBUFFER_2048)
3136 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3137 else if (max_frame <= E1000_RXBUFFER_4096)
3138 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3139 else if (max_frame <= E1000_RXBUFFER_8192)
3140 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3141 else if (max_frame <= E1000_RXBUFFER_16384)
3142 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3143
3144 /* adjust allocation if LPE protects us, and we aren't using SBP */
3145#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
3146 if (!adapter->hw.tbi_compatibility_on &&
3147 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3148 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3149 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3150
2d7edb92
MC		 3151 netdev->mtu = new_mtu;
3152
2db10a08
AK		 3153 if (netif_running(netdev))
3154 e1000_reinit_locked(adapter);
1da177e4 3155
1da177e4
LT		 3156 adapter->hw.max_frame_size = max_frame;
3157
3158 return 0;
3159}
3160
3161/**
3162 * e1000_update_stats - Update the board statistics counters
3163 * @adapter: board private structure
3164 **/
3165
3166void
3167e1000_update_stats(struct e1000_adapter *adapter)
3168{
3169 struct e1000_hw *hw = &adapter->hw;
a487a8f7 3170 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3171 unsigned long flags;
3172 uint16_t phy_tmp;
3173
3174#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3175
a487a8f7
AK		 3176 /*
3177 * Prevent stats update while adapter is being reset, or if the pci
3178 * connection is down.
3179 */
9026729b 3180 if (adapter->link_speed == 0)
a487a8f7
AK		 3181 return;
3182 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3183 return;
3184
1da177e4
LT		 3185 spin_lock_irqsave(&adapter->stats_lock, flags);
3186
3187 /* these counters are modified from e1000_adjust_tbi_stats,
3188 * called from the interrupt context, so they must only
3189 * be written while holding adapter->stats_lock
3190 */
3191
3192 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3193 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3194 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3195 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3196 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3197 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3198 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3199
3200 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3201 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3202 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3203 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3204 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3205 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3206 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3207 }
1da177e4
LT		 3208
3209 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3210 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3211 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3212 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3213 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3214 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3215 adapter->stats.dc += E1000_READ_REG(hw, DC);
3216 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3217 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3218 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3219 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3220 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3221 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3222 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3223 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3224 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3225 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3226 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3227 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3228 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3229 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3230 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3231 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3232 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3233 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3234 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3235
3236 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3237 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3238 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3239 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3240 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3241 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3242 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3243 }
3244
1da177e4
LT		 3245 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3246 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3247
3248 /* used for adaptive IFS */
3249
3250 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3251 adapter->stats.tpt += hw->tx_packet_delta;
3252 hw->collision_delta = E1000_READ_REG(hw, COLC);
3253 adapter->stats.colc += hw->collision_delta;
3254
96838a40 3255 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3256 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3257 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3258 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3259 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3260 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3261 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3262 }
96838a40 3263 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3264 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3265 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3266
3267 if (adapter->hw.mac_type != e1000_ich8lan) {
2d7edb92
MC		 3268 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3269 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3270 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3271 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3272 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3273 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3274 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3275 }
2d7edb92 3276 }
1da177e4
LT		 3277
3278 /* Fill out the OS statistics structure */
3279
3280 adapter->net_stats.rx_packets = adapter->stats.gprc;
3281 adapter->net_stats.tx_packets = adapter->stats.gptc;
3282 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3283 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3284 adapter->net_stats.multicast = adapter->stats.mprc;
3285 adapter->net_stats.collisions = adapter->stats.colc;
3286
3287 /* Rx Errors */
3288
87041639
JK		 3289 /* RLEC on some newer hardware can be incorrect so build
3290 * our own version based on RUC and ROC */
1da177e4
LT		 3291 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3292 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3293 adapter->stats.ruc + adapter->stats.roc +
3294 adapter->stats.cexterr;
87041639
JK		 3295 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3296 adapter->stats.roc;
1da177e4
LT		 3297 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3298 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3299 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3300
3301 /* Tx Errors */
3302
3303 adapter->net_stats.tx_errors = adapter->stats.ecol +
3304 adapter->stats.latecol;
3305 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3306 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3307 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3308
3309 /* Tx Dropped needs to be maintained elsewhere */
3310
3311 /* Phy Stats */
3312
96838a40
JB		 3313 if (hw->media_type == e1000_media_type_copper) {
3314 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3315 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3316 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3317 adapter->phy_stats.idle_errors += phy_tmp;
3318 }
3319
96838a40 3320 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3321 (hw->phy_type == e1000_phy_m88) &&
3322 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3323 adapter->phy_stats.receive_errors += phy_tmp;
3324 }
3325
3326 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3327}
3328
3329/**
3330 * e1000_intr - Interrupt Handler
3331 * @irq: interrupt number
3332 * @data: pointer to a network interface device structure
3333 * @pt_regs: CPU registers structure
3334 **/
3335
3336static irqreturn_t
3337e1000_intr(int irq, void *data, struct pt_regs *regs)
3338{
3339 struct net_device *netdev = data;
60490fe0 3340 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3341 struct e1000_hw *hw = &adapter->hw;
87041639 3342 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3343#ifndef CONFIG_E1000_NAPI
581d708e 3344 int i;
1e613fd9
JK		 3345#else
3346 /* Interrupt Auto-Mask...upon reading ICR,
3347 * interrupts are masked. No need for the
3348 * IMC write, but it does mean we should
3349 * account for it ASAP. */
3350 if (likely(hw->mac_type >= e1000_82571))
3351 atomic_inc(&adapter->irq_sem);
be2b28ed 3352#endif
1da177e4 3353
1e613fd9
JK		 3354 if (unlikely(!icr)) {
3355#ifdef CONFIG_E1000_NAPI
3356 if (hw->mac_type >= e1000_82571)
3357 e1000_irq_enable(adapter);
3358#endif
1da177e4 3359 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3360 }
1da177e4 3361
96838a40 3362 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3363 hw->get_link_status = 1;
87041639
JK		 3364 /* 80003ES2LAN workaround--
3365 * For packet buffer work-around on link down event;
3366 * disable receives here in the ISR and
3367 * reset adapter in watchdog
3368 */
3369 if (netif_carrier_ok(netdev) &&
3370 (adapter->hw.mac_type == e1000_80003es2lan)) {
3371 /* disable receives */
3372 rctl = E1000_READ_REG(hw, RCTL);
3373 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3374 }
1da177e4
LT		 3375 mod_timer(&adapter->watchdog_timer, jiffies);
3376 }
3377
3378#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3379 if (unlikely(hw->mac_type < e1000_82571)) {
3380 atomic_inc(&adapter->irq_sem);
3381 E1000_WRITE_REG(hw, IMC, ~0);
3382 E1000_WRITE_FLUSH(hw);
3383 }
581d708e
MC		 3384 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3385 __netif_rx_schedule(&adapter->polling_netdev[0]);
3386 else
3387 e1000_irq_enable(adapter);
c1605eb3 3388#else
1da177e4 3389 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3390 * Due to Hub Link bus being occupied, an interrupt
3391 * de-assertion message is not able to be sent.
3392 * When an interrupt assertion message is generated later,
3393 * two messages are re-ordered and sent out.
3394 * That causes APIC to think 82547 is in de-assertion
3395 * state, while 82547 is in assertion state, resulting
3396 * in dead lock. Writing IMC forces 82547 into
3397 * de-assertion state.
3398 */
3399 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3400 atomic_inc(&adapter->irq_sem);
2648345f 3401 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3402 }
3403
96838a40
JB		 3404 for (i = 0; i < E1000_MAX_INTR; i++)
3405 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3406 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3407 break;
3408
96838a40 3409 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3410 e1000_irq_enable(adapter);
581d708e 3411
c1605eb3 3412#endif
1da177e4
LT		 3413
3414 return IRQ_HANDLED;
3415}
3416
3417#ifdef CONFIG_E1000_NAPI
3418/**
3419 * e1000_clean - NAPI Rx polling callback
3420 * @adapter: board private structure
3421 **/
3422
3423static int
581d708e 3424e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3425{
581d708e
MC		 3426 struct e1000_adapter *adapter;
3427 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3428 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3429
3430 /* Must NOT use netdev_priv macro here. */
3431 adapter = poll_dev->priv;
3432
3433 /* Keep link state information with original netdev */
3434 if (!netif_carrier_ok(adapter->netdev))
3435 goto quit_polling;
2648345f 3436
581d708e
MC		 3437 while (poll_dev != &adapter->polling_netdev[i]) {
3438 i++;
5d9428de 3439 BUG_ON(i == adapter->num_rx_queues);
581d708e
MC		 3440 }
3441
8241e35e
JK		 3442 if (likely(adapter->num_tx_queues == 1)) {
3443 /* e1000_clean is called per-cpu. This lock protects
3444 * tx_ring[0] from being cleaned by multiple cpus
3445 * simultaneously. A failure obtaining the lock means
3446 * tx_ring[0] is currently being cleaned anyway. */
3447 if (spin_trylock(&adapter->tx_queue_lock)) {
3448 tx_cleaned = e1000_clean_tx_irq(adapter,
3449 &adapter->tx_ring[0]);
3450 spin_unlock(&adapter->tx_queue_lock);
3451 }
3452 } else
3453 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3454
581d708e
MC		 3455 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3456 &work_done, work_to_do);
1da177e4
LT		 3457
3458 *budget -= work_done;
581d708e 3459 poll_dev->quota -= work_done;
96838a40 3460
2b02893e 3461 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3462 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3463 !netif_running(adapter->netdev)) {
3464quit_polling:
3465 netif_rx_complete(poll_dev);
1da177e4
LT		 3466 e1000_irq_enable(adapter);
3467 return 0;
3468 }
3469
3470 return 1;
3471}
3472
3473#endif
3474/**
3475 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3476 * @adapter: board private structure
3477 **/
3478
3479static boolean_t
581d708e
MC		 3480e1000_clean_tx_irq(struct e1000_adapter *adapter,
3481 struct e1000_tx_ring *tx_ring)
1da177e4 3482{
1da177e4
LT		 3483 struct net_device *netdev = adapter->netdev;
3484 struct e1000_tx_desc *tx_desc, *eop_desc;
3485 struct e1000_buffer *buffer_info;
3486 unsigned int i, eop;
2a1af5d7
JK		 3487#ifdef CONFIG_E1000_NAPI
3488 unsigned int count = 0;
3489#endif
1da177e4
LT		 3490 boolean_t cleaned = FALSE;
3491
3492 i = tx_ring->next_to_clean;
3493 eop = tx_ring->buffer_info[i].next_to_watch;
3494 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3495
581d708e 3496 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3497 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3498 tx_desc = E1000_TX_DESC(*tx_ring, i);
3499 buffer_info = &tx_ring->buffer_info[i];
3500 cleaned = (i == eop);
3501
fd803241 3502 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3503 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3504
96838a40 3505 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3506 }
581d708e 3507
7bfa4816 3508
1da177e4
LT		 3509 eop = tx_ring->buffer_info[i].next_to_watch;
3510 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3511#ifdef CONFIG_E1000_NAPI
3512#define E1000_TX_WEIGHT 64
3513 /* weight of a sort for tx, to avoid endless transmit cleanup */
3514 if (count++ == E1000_TX_WEIGHT) break;
3515#endif
1da177e4
LT		 3516 }
3517
3518 tx_ring->next_to_clean = i;
3519
77b2aad5 3520#define TX_WAKE_THRESHOLD 32
96838a40 3521 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
77b2aad5
AK		 3522 netif_carrier_ok(netdev))) {
3523 spin_lock(&tx_ring->tx_lock);
3524 if (netif_queue_stopped(netdev) &&
3525 (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
3526 netif_wake_queue(netdev);
3527 spin_unlock(&tx_ring->tx_lock);
3528 }
2648345f 3529
581d708e 3530 if (adapter->detect_tx_hung) {
2648345f 3531 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3532 * check with the clearing of time_stamp and movement of i */
3533 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3534 if (tx_ring->buffer_info[eop].dma &&
3535 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3536 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3537 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3538 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3539
3540 /* detected Tx unit hang */
c6963ef5 3541 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3542 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3543 " TDH <%x>\n"
3544 " TDT <%x>\n"
3545 " next_to_use <%x>\n"
3546 " next_to_clean <%x>\n"
3547 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3548 " time_stamp <%lx>\n"
3549 " next_to_watch <%x>\n"
3550 " jiffies <%lx>\n"
3551 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3552 (unsigned long)((tx_ring - adapter->tx_ring) /
3553 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3554 readl(adapter->hw.hw_addr + tx_ring->tdh),
3555 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3556 tx_ring->next_to_use,
392137fa
JK		 3557 tx_ring->next_to_clean,
3558 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3559 eop,
3560 jiffies,
3561 eop_desc->upper.fields.status);
1da177e4 3562 netif_stop_queue(netdev);
70b8f1e1 3563 }
1da177e4 3564 }
1da177e4
LT		 3565 return cleaned;
3566}
3567
3568/**
3569 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3570 * @adapter: board private structure
3571 * @status_err: receive descriptor status and error fields
3572 * @csum: receive descriptor csum field
3573 * @sk_buff: socket buffer with received data
1da177e4
LT		 3574 **/
3575
e619d523 3576static void
1da177e4 3577e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3578 uint32_t status_err, uint32_t csum,
3579 struct sk_buff *skb)
1da177e4 3580{
2d7edb92
MC		 3581 uint16_t status = (uint16_t)status_err;
3582 uint8_t errors = (uint8_t)(status_err >> 24);
3583 skb->ip_summed = CHECKSUM_NONE;
3584
1da177e4 3585 /* 82543 or newer only */
96838a40 3586 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3587 /* Ignore Checksum bit is set */
96838a40 3588 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3589 /* TCP/UDP checksum error bit is set */
96838a40 3590 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3591 /* let the stack verify checksum errors */
1da177e4 3592 adapter->hw_csum_err++;
2d7edb92
MC		 3593 return;
3594 }
3595 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3596 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3597 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3598 return;
1da177e4 3599 } else {
96838a40 3600 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3601 return;
3602 }
3603 /* It must be a TCP or UDP packet with a valid checksum */
3604 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3605 /* TCP checksum is good */
3606 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3607 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3608 /* IP fragment with UDP payload */
3609 /* Hardware complements the payload checksum, so we undo it
3610 * and then put the value in host order for further stack use.
3611 */
3612 csum = ntohl(csum ^ 0xFFFF);
3613 skb->csum = csum;
3614 skb->ip_summed = CHECKSUM_HW;
1da177e4 3615 }
2d7edb92 3616 adapter->hw_csum_good++;
1da177e4
LT		 3617}
3618
3619/**
2d7edb92 3620 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3621 * @adapter: board private structure
3622 **/
3623
3624static boolean_t
3625#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3626e1000_clean_rx_irq(struct e1000_adapter *adapter,
3627 struct e1000_rx_ring *rx_ring,
3628 int *work_done, int work_to_do)
1da177e4 3629#else
581d708e
MC		 3630e1000_clean_rx_irq(struct e1000_adapter *adapter,
3631 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3632#endif
3633{
1da177e4
LT		 3634 struct net_device *netdev = adapter->netdev;
3635 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3636 struct e1000_rx_desc *rx_desc, *next_rxd;
3637 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3638 unsigned long flags;
3639 uint32_t length;
3640 uint8_t last_byte;
3641 unsigned int i;
72d64a43 3642 int cleaned_count = 0;
a1415ee6 3643 boolean_t cleaned = FALSE;
1da177e4
LT		 3644
3645 i = rx_ring->next_to_clean;
3646 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3647 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3648
b92ff8ee 3649 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3650 struct sk_buff *skb;
a292ca6e 3651 u8 status;
1da177e4 3652#ifdef CONFIG_E1000_NAPI
96838a40 3653 if (*work_done >= work_to_do)
1da177e4
LT		 3654 break;
3655 (*work_done)++;
3656#endif
a292ca6e 3657 status = rx_desc->status;
b92ff8ee 3658 skb = buffer_info->skb;
86c3d59f
JB		 3659 buffer_info->skb = NULL;
3660
30320be8
JK		 3661 prefetch(skb->data - NET_IP_ALIGN);
3662
86c3d59f
JB		 3663 if (++i == rx_ring->count) i = 0;
3664 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3665 prefetch(next_rxd);
3666
86c3d59f 3667 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3668
72d64a43
JK		 3669 cleaned = TRUE;
3670 cleaned_count++;
a292ca6e
JK		 3671 pci_unmap_single(pdev,
3672 buffer_info->dma,
3673 buffer_info->length,
1da177e4
LT		 3674 PCI_DMA_FROMDEVICE);
3675
1da177e4
LT		 3676 length = le16_to_cpu(rx_desc->length);
3677
a1415ee6
JK		 3678 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3679 /* All receives must fit into a single buffer */
3680 E1000_DBG("%s: Receive packet consumed multiple"
3681 " buffers\n", netdev->name);
864c4e45
AK		 3682 /* recycle */
3683 buffer_info-> skb = skb;
1da177e4
LT		 3684 goto next_desc;
3685 }
3686
96838a40 3687 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3688 last_byte = *(skb->data + length - 1);
b92ff8ee 3689 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3690 rx_desc->errors, length, last_byte)) {
3691 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3692 e1000_tbi_adjust_stats(&adapter->hw,
3693 &adapter->stats,
1da177e4
LT		 3694 length, skb->data);
3695 spin_unlock_irqrestore(&adapter->stats_lock,
3696 flags);
3697 length--;
3698 } else {
9e2feace
AK		 3699 /* recycle */
3700 buffer_info->skb = skb;
1da177e4
LT		 3701 goto next_desc;
3702 }
1cb5821f 3703 }
1da177e4 3704
a292ca6e
JK		 3705 /* code added for copybreak, this should improve
3706 * performance for small packets with large amounts
3707 * of reassembly being done in the stack */
3708#define E1000_CB_LENGTH 256
a1415ee6 3709 if (length < E1000_CB_LENGTH) {
a292ca6e
JK		 3710 struct sk_buff *new_skb =
3711 dev_alloc_skb(length + NET_IP_ALIGN);
3712 if (new_skb) {
3713 skb_reserve(new_skb, NET_IP_ALIGN);
3714 new_skb->dev = netdev;
3715 memcpy(new_skb->data - NET_IP_ALIGN,
3716 skb->data - NET_IP_ALIGN,
3717 length + NET_IP_ALIGN);
3718 /* save the skb in buffer_info as good */
3719 buffer_info->skb = skb;
3720 skb = new_skb;
3721 skb_put(skb, length);
3722 }
a1415ee6
JK		 3723 } else
3724 skb_put(skb, length);
a292ca6e
JK		 3725
3726 /* end copybreak code */
1da177e4
LT		 3727
3728 /* Receive Checksum Offload */
a292ca6e
JK		 3729 e1000_rx_checksum(adapter,
3730 (uint32_t)(status) |
2d7edb92 3731 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3732 le16_to_cpu(rx_desc->csum), skb);
96838a40 3733
1da177e4
LT		 3734 skb->protocol = eth_type_trans(skb, netdev);
3735#ifdef CONFIG_E1000_NAPI
96838a40 3736 if (unlikely(adapter->vlgrp &&
a292ca6e 3737 (status & E1000_RXD_STAT_VP))) {
1da177e4 3738 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3739 le16_to_cpu(rx_desc->special) &
3740 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3741 } else {
3742 netif_receive_skb(skb);
3743 }
3744#else /* CONFIG_E1000_NAPI */
96838a40 3745 if (unlikely(adapter->vlgrp &&
b92ff8ee 3746 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3747 vlan_hwaccel_rx(skb, adapter->vlgrp,
3748 le16_to_cpu(rx_desc->special) &
3749 E1000_RXD_SPC_VLAN_MASK);
3750 } else {
3751 netif_rx(skb);
3752 }
3753#endif /* CONFIG_E1000_NAPI */
3754 netdev->last_rx = jiffies;
3755
3756next_desc:
3757 rx_desc->status = 0;
1da177e4 3758
72d64a43
JK		 3759 /* return some buffers to hardware, one at a time is too slow */
3760 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3761 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3762 cleaned_count = 0;
3763 }
3764
30320be8 3765 /* use prefetched values */
86c3d59f
JB		 3766 rx_desc = next_rxd;
3767 buffer_info = next_buffer;
1da177e4 3768 }
1da177e4 3769 rx_ring->next_to_clean = i;
72d64a43
JK		 3770
3771 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3772 if (cleaned_count)
3773 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3774
3775 return cleaned;
3776}
3777
3778/**
3779 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3780 * @adapter: board private structure
3781 **/
3782
3783static boolean_t
3784#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3785e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3786 struct e1000_rx_ring *rx_ring,
3787 int *work_done, int work_to_do)
2d7edb92 3788#else
581d708e
MC		 3789e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3790 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3791#endif
3792{
86c3d59f 3793 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3794 struct net_device *netdev = adapter->netdev;
3795 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3796 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3797 struct e1000_ps_page *ps_page;
3798 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3799 struct sk_buff *skb;
2d7edb92
MC		 3800 unsigned int i, j;
3801 uint32_t length, staterr;
72d64a43 3802 int cleaned_count = 0;
2d7edb92
MC		 3803 boolean_t cleaned = FALSE;
3804
3805 i = rx_ring->next_to_clean;
3806 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3807 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3808 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3809
96838a40 3810 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3811 ps_page = &rx_ring->ps_page[i];
3812 ps_page_dma = &rx_ring->ps_page_dma[i];
3813#ifdef CONFIG_E1000_NAPI
96838a40 3814 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3815 break;
3816 (*work_done)++;
3817#endif
86c3d59f
JB		 3818 skb = buffer_info->skb;
3819
30320be8
JK		 3820 /* in the packet split case this is header only */
3821 prefetch(skb->data - NET_IP_ALIGN);
3822
86c3d59f
JB		 3823 if (++i == rx_ring->count) i = 0;
3824 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3825 prefetch(next_rxd);
3826
86c3d59f 3827 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3828
2d7edb92 3829 cleaned = TRUE;
72d64a43 3830 cleaned_count++;
2d7edb92
MC		 3831 pci_unmap_single(pdev, buffer_info->dma,
3832 buffer_info->length,
3833 PCI_DMA_FROMDEVICE);
3834
96838a40 3835 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3836 E1000_DBG("%s: Packet Split buffers didn't pick up"
3837 " the full packet\n", netdev->name);
3838 dev_kfree_skb_irq(skb);
3839 goto next_desc;
3840 }
1da177e4 3841
96838a40 3842 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3843 dev_kfree_skb_irq(skb);
3844 goto next_desc;
3845 }
3846
3847 length = le16_to_cpu(rx_desc->wb.middle.length0);
3848
96838a40 3849 if (unlikely(!length)) {
2d7edb92
MC		 3850 E1000_DBG("%s: Last part of the packet spanning"
3851 " multiple descriptors\n", netdev->name);
3852 dev_kfree_skb_irq(skb);
3853 goto next_desc;
3854 }
3855
3856 /* Good Receive */
3857 skb_put(skb, length);
3858
dc7c6add
JK		 3859 {
3860 /* this looks ugly, but it seems compiler issues make it
3861 more efficient than reusing j */
3862 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3863
3864 /* page alloc/put takes too long and effects small packet
3865 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3866 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3867 u8 *vaddr;
76c224bc 3868 /* there is no documentation about how to call
dc7c6add
JK		 3869 * kmap_atomic, so we can't hold the mapping
3870 * very long */
3871 pci_dma_sync_single_for_cpu(pdev,
3872 ps_page_dma->ps_page_dma[0],
3873 PAGE_SIZE,
3874 PCI_DMA_FROMDEVICE);
3875 vaddr = kmap_atomic(ps_page->ps_page[0],
3876 KM_SKB_DATA_SOFTIRQ);
3877 memcpy(skb->tail, vaddr, l1);
3878 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3879 pci_dma_sync_single_for_device(pdev,
3880 ps_page_dma->ps_page_dma[0],
3881 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3882 skb_put(skb, l1);
3883 length += l1;
3884 goto copydone;
3885 } /* if */
3886 }
3887
96838a40 3888 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3889 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3890 break;
2d7edb92
MC		 3891 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3892 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3893 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3894 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3895 length);
2d7edb92 3896 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3897 skb->len += length;
3898 skb->data_len += length;
5d51b80f 3899 skb->truesize += length;
2d7edb92
MC		 3900 }
3901
dc7c6add 3902copydone:
2d7edb92 3903 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 3904 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 3905 skb->protocol = eth_type_trans(skb, netdev);
3906
96838a40 3907 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 3908 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 3909 adapter->rx_hdr_split++;
2d7edb92 3910#ifdef CONFIG_E1000_NAPI
96838a40 3911 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3912 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3913 le16_to_cpu(rx_desc->wb.middle.vlan) &
3914 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3915 } else {
3916 netif_receive_skb(skb);
3917 }
3918#else /* CONFIG_E1000_NAPI */
96838a40 3919 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3920 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3921 le16_to_cpu(rx_desc->wb.middle.vlan) &
3922 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3923 } else {
3924 netif_rx(skb);
3925 }
3926#endif /* CONFIG_E1000_NAPI */
3927 netdev->last_rx = jiffies;
3928
3929next_desc:
c3d7a3a4 3930 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 3931 buffer_info->skb = NULL;
2d7edb92 3932
72d64a43
JK		 3933 /* return some buffers to hardware, one at a time is too slow */
3934 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3935 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3936 cleaned_count = 0;
3937 }
3938
30320be8 3939 /* use prefetched values */
86c3d59f
JB		 3940 rx_desc = next_rxd;
3941 buffer_info = next_buffer;
3942
683a38f3 3943 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3944 }
3945 rx_ring->next_to_clean = i;
72d64a43
JK		 3946
3947 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3948 if (cleaned_count)
3949 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3950
3951 return cleaned;
3952}
3953
3954/**
2d7edb92 3955 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3956 * @adapter: address of board private structure
3957 **/
3958
3959static void
581d708e 3960e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3961 struct e1000_rx_ring *rx_ring,
a292ca6e 3962 int cleaned_count)
1da177e4 3963{
1da177e4
LT		 3964 struct net_device *netdev = adapter->netdev;
3965 struct pci_dev *pdev = adapter->pdev;
3966 struct e1000_rx_desc *rx_desc;
3967 struct e1000_buffer *buffer_info;
3968 struct sk_buff *skb;
2648345f
MC		 3969 unsigned int i;
3970 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3971
3972 i = rx_ring->next_to_use;
3973 buffer_info = &rx_ring->buffer_info[i];
3974
a292ca6e
JK		 3975 while (cleaned_count--) {
3976 if (!(skb = buffer_info->skb))
3977 skb = dev_alloc_skb(bufsz);
3978 else {
3979 skb_trim(skb, 0);
3980 goto map_skb;
3981 }
3982
96838a40 3983 if (unlikely(!skb)) {
1da177e4 3984 /* Better luck next round */
72d64a43 3985 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3986 break;
3987 }
3988
2648345f 3989 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3990 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3991 struct sk_buff *oldskb = skb;
2648345f
MC		 3992 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3993 "at %p\n", bufsz, skb->data);
3994 /* Try again, without freeing the previous */
1da177e4 3995 skb = dev_alloc_skb(bufsz);
2648345f 3996 /* Failed allocation, critical failure */
1da177e4
LT		 3997 if (!skb) {
3998 dev_kfree_skb(oldskb);
3999 break;
4000 }
2648345f 4001
1da177e4
LT		 4002 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4003 /* give up */
4004 dev_kfree_skb(skb);
4005 dev_kfree_skb(oldskb);
4006 break; /* while !buffer_info->skb */
4007 } else {
2648345f 4008 /* Use new allocation */
1da177e4
LT		 4009 dev_kfree_skb(oldskb);
4010 }
4011 }
1da177e4
LT		 4012 /* Make buffer alignment 2 beyond a 16 byte boundary
4013 * this will result in a 16 byte aligned IP header after
4014 * the 14 byte MAC header is removed
4015 */
4016 skb_reserve(skb, NET_IP_ALIGN);
4017
4018 skb->dev = netdev;
4019
4020 buffer_info->skb = skb;
4021 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4022map_skb:
1da177e4
LT		 4023 buffer_info->dma = pci_map_single(pdev,
4024 skb->data,
4025 adapter->rx_buffer_len,
4026 PCI_DMA_FROMDEVICE);
4027
2648345f
MC		 4028 /* Fix for errata 23, can't cross 64kB boundary */
4029 if (!e1000_check_64k_bound(adapter,
4030 (void *)(unsigned long)buffer_info->dma,
4031 adapter->rx_buffer_len)) {
4032 DPRINTK(RX_ERR, ERR,
4033 "dma align check failed: %u bytes at %p\n",
4034 adapter->rx_buffer_len,
4035 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4036 dev_kfree_skb(skb);
4037 buffer_info->skb = NULL;
4038
2648345f 4039 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4040 adapter->rx_buffer_len,
4041 PCI_DMA_FROMDEVICE);
4042
4043 break; /* while !buffer_info->skb */
4044 }
1da177e4
LT		 4045 rx_desc = E1000_RX_DESC(*rx_ring, i);
4046 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4047
96838a40
JB		 4048 if (unlikely(++i == rx_ring->count))
4049 i = 0;
1da177e4
LT		 4050 buffer_info = &rx_ring->buffer_info[i];
4051 }
4052
b92ff8ee
JB		 4053 if (likely(rx_ring->next_to_use != i)) {
4054 rx_ring->next_to_use = i;
4055 if (unlikely(i-- == 0))
4056 i = (rx_ring->count - 1);
4057
4058 /* Force memory writes to complete before letting h/w
4059 * know there are new descriptors to fetch. (Only
4060 * applicable for weak-ordered memory model archs,
4061 * such as IA-64). */
4062 wmb();
4063 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4064 }
1da177e4
LT		 4065}
4066
2d7edb92
MC		 4067/**
4068 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4069 * @adapter: address of board private structure
4070 **/
4071
4072static void
581d708e 4073e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4074 struct e1000_rx_ring *rx_ring,
4075 int cleaned_count)
2d7edb92 4076{
2d7edb92
MC		 4077 struct net_device *netdev = adapter->netdev;
4078 struct pci_dev *pdev = adapter->pdev;
4079 union e1000_rx_desc_packet_split *rx_desc;
4080 struct e1000_buffer *buffer_info;
4081 struct e1000_ps_page *ps_page;
4082 struct e1000_ps_page_dma *ps_page_dma;
4083 struct sk_buff *skb;
4084 unsigned int i, j;
4085
4086 i = rx_ring->next_to_use;
4087 buffer_info = &rx_ring->buffer_info[i];
4088 ps_page = &rx_ring->ps_page[i];
4089 ps_page_dma = &rx_ring->ps_page_dma[i];
4090
72d64a43 4091 while (cleaned_count--) {
2d7edb92
MC		 4092 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4093
96838a40 4094 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4095 if (j < adapter->rx_ps_pages) {
4096 if (likely(!ps_page->ps_page[j])) {
4097 ps_page->ps_page[j] =
4098 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4099 if (unlikely(!ps_page->ps_page[j])) {
4100 adapter->alloc_rx_buff_failed++;
e4c811c9 4101 goto no_buffers;
b92ff8ee 4102 }
e4c811c9
MC		 4103 ps_page_dma->ps_page_dma[j] =
4104 pci_map_page(pdev,
4105 ps_page->ps_page[j],
4106 0, PAGE_SIZE,
4107 PCI_DMA_FROMDEVICE);
4108 }
4109 /* Refresh the desc even if buffer_addrs didn't
96838a40 4110 * change because each write-back erases
e4c811c9
MC		 4111 * this info.
4112 */
4113 rx_desc->read.buffer_addr[j+1] =
4114 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4115 } else
4116 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4117 }
4118
4119 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4120
b92ff8ee
JB		 4121 if (unlikely(!skb)) {
4122 adapter->alloc_rx_buff_failed++;
2d7edb92 4123 break;
b92ff8ee 4124 }
2d7edb92
MC		 4125
4126 /* Make buffer alignment 2 beyond a 16 byte boundary
4127 * this will result in a 16 byte aligned IP header after
4128 * the 14 byte MAC header is removed
4129 */
4130 skb_reserve(skb, NET_IP_ALIGN);
4131
4132 skb->dev = netdev;
4133
4134 buffer_info->skb = skb;
4135 buffer_info->length = adapter->rx_ps_bsize0;
4136 buffer_info->dma = pci_map_single(pdev, skb->data,
4137 adapter->rx_ps_bsize0,
4138 PCI_DMA_FROMDEVICE);
4139
4140 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4141
96838a40 4142 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4143 buffer_info = &rx_ring->buffer_info[i];
4144 ps_page = &rx_ring->ps_page[i];
4145 ps_page_dma = &rx_ring->ps_page_dma[i];
4146 }
4147
4148no_buffers:
b92ff8ee
JB		 4149 if (likely(rx_ring->next_to_use != i)) {
4150 rx_ring->next_to_use = i;
4151 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4152
4153 /* Force memory writes to complete before letting h/w
4154 * know there are new descriptors to fetch. (Only
4155 * applicable for weak-ordered memory model archs,
4156 * such as IA-64). */
4157 wmb();
4158 /* Hardware increments by 16 bytes, but packet split
4159 * descriptors are 32 bytes...so we increment tail
4160 * twice as much.
4161 */
4162 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4163 }
2d7edb92
MC		 4164}
4165
1da177e4
LT		 4166/**
4167 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4168 * @adapter:
4169 **/
4170
4171static void
4172e1000_smartspeed(struct e1000_adapter *adapter)
4173{
4174 uint16_t phy_status;
4175 uint16_t phy_ctrl;
4176
96838a40 4177 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4178 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4179 return;
4180
96838a40 4181 if (adapter->smartspeed == 0) {
1da177e4
LT		 4182 /* If Master/Slave config fault is asserted twice,
4183 * we assume back-to-back */
4184 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4185 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4186 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4187 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4188 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4189 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4190 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4191 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4192 phy_ctrl);
4193 adapter->smartspeed++;
96838a40 4194 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4195 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4196 &phy_ctrl)) {
4197 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4198 MII_CR_RESTART_AUTO_NEG);
4199 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4200 phy_ctrl);
4201 }
4202 }
4203 return;
96838a40 4204 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4205 /* If still no link, perhaps using 2/3 pair cable */
4206 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4207 phy_ctrl |= CR_1000T_MS_ENABLE;
4208 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4209 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4210 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4211 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4212 MII_CR_RESTART_AUTO_NEG);
4213 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4214 }
4215 }
4216 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4217 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4218 adapter->smartspeed = 0;
4219}
4220
4221/**
4222 * e1000_ioctl -
4223 * @netdev:
4224 * @ifreq:
4225 * @cmd:
4226 **/
4227
4228static int
4229e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4230{
4231 switch (cmd) {
4232 case SIOCGMIIPHY:
4233 case SIOCGMIIREG:
4234 case SIOCSMIIREG:
4235 return e1000_mii_ioctl(netdev, ifr, cmd);
4236 default:
4237 return -EOPNOTSUPP;
4238 }
4239}
4240
4241/**
4242 * e1000_mii_ioctl -
4243 * @netdev:
4244 * @ifreq:
4245 * @cmd:
4246 **/
4247
4248static int
4249e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4250{
60490fe0 4251 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4252 struct mii_ioctl_data *data = if_mii(ifr);
4253 int retval;
4254 uint16_t mii_reg;
4255 uint16_t spddplx;
97876fc6 4256 unsigned long flags;
1da177e4 4257
96838a40 4258 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4259 return -EOPNOTSUPP;
4260
4261 switch (cmd) {
4262 case SIOCGMIIPHY:
4263 data->phy_id = adapter->hw.phy_addr;
4264 break;
4265 case SIOCGMIIREG:
96838a40 4266 if (!capable(CAP_NET_ADMIN))
1da177e4 4267 return -EPERM;
97876fc6 4268 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4269 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4270 &data->val_out)) {
4271 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4272 return -EIO;
97876fc6
MC		 4273 }
4274 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4275 break;
4276 case SIOCSMIIREG:
96838a40 4277 if (!capable(CAP_NET_ADMIN))
1da177e4 4278 return -EPERM;
96838a40 4279 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4280 return -EFAULT;
4281 mii_reg = data->val_in;
97876fc6 4282 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4283 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4284 mii_reg)) {
4285 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4286 return -EIO;
97876fc6 4287 }
dc86d32a 4288 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4289 switch (data->reg_num) {
4290 case PHY_CTRL:
96838a40 4291 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4292 break;
96838a40 4293 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4294 adapter->hw.autoneg = 1;
4295 adapter->hw.autoneg_advertised = 0x2F;
4296 } else {
4297 if (mii_reg & 0x40)
4298 spddplx = SPEED_1000;
4299 else if (mii_reg & 0x2000)
4300 spddplx = SPEED_100;
4301 else
4302 spddplx = SPEED_10;
4303 spddplx += (mii_reg & 0x100)
cb764326
JK		 4304 ? DUPLEX_FULL :
4305 DUPLEX_HALF;
1da177e4
LT		 4306 retval = e1000_set_spd_dplx(adapter,
4307 spddplx);
96838a40 4308 if (retval) {
97876fc6 4309 spin_unlock_irqrestore(
96838a40 4310 &adapter->stats_lock,
97876fc6 4311 flags);
1da177e4 4312 return retval;
97876fc6 4313 }
1da177e4 4314 }
2db10a08
AK		 4315 if (netif_running(adapter->netdev))
4316 e1000_reinit_locked(adapter);
4317 else
1da177e4
LT		 4318 e1000_reset(adapter);
4319 break;
4320 case M88E1000_PHY_SPEC_CTRL:
4321 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4322 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4323 spin_unlock_irqrestore(
4324 &adapter->stats_lock, flags);
1da177e4 4325 return -EIO;
97876fc6 4326 }
1da177e4
LT		 4327 break;
4328 }
4329 } else {
4330 switch (data->reg_num) {
4331 case PHY_CTRL:
96838a40 4332 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4333 break;
2db10a08
AK		 4334 if (netif_running(adapter->netdev))
4335 e1000_reinit_locked(adapter);
4336 else
1da177e4
LT		 4337 e1000_reset(adapter);
4338 break;
4339 }
4340 }
97876fc6 4341 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4342 break;
4343 default:
4344 return -EOPNOTSUPP;
4345 }
4346 return E1000_SUCCESS;
4347}
4348
4349void
4350e1000_pci_set_mwi(struct e1000_hw *hw)
4351{
4352 struct e1000_adapter *adapter = hw->back;
2648345f 4353 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4354
96838a40 4355 if (ret_val)
2648345f 4356 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4357}
4358
4359void
4360e1000_pci_clear_mwi(struct e1000_hw *hw)
4361{
4362 struct e1000_adapter *adapter = hw->back;
4363
4364 pci_clear_mwi(adapter->pdev);
4365}
4366
4367void
4368e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4369{
4370 struct e1000_adapter *adapter = hw->back;
4371
4372 pci_read_config_word(adapter->pdev, reg, value);
4373}
4374
4375void
4376e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4377{
4378 struct e1000_adapter *adapter = hw->back;
4379
4380 pci_write_config_word(adapter->pdev, reg, *value);
4381}
4382
4383uint32_t
4384e1000_io_read(struct e1000_hw *hw, unsigned long port)
4385{
4386 return inl(port);
4387}
4388
4389void
4390e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4391{
4392 outl(value, port);
4393}
4394
4395static void
4396e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4397{
60490fe0 4398 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4399 uint32_t ctrl, rctl;
4400
4401 e1000_irq_disable(adapter);
4402 adapter->vlgrp = grp;
4403
96838a40 4404 if (grp) {
1da177e4
LT		 4405 /* enable VLAN tag insert/strip */
4406 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4407 ctrl |= E1000_CTRL_VME;
4408 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4409
cd94dd0b 4410 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4411 /* enable VLAN receive filtering */
4412 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4413 rctl |= E1000_RCTL_VFE;
4414 rctl &= ~E1000_RCTL_CFIEN;
4415 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4416 e1000_update_mng_vlan(adapter);
cd94dd0b 4417 }
1da177e4
LT		 4418 } else {
4419 /* disable VLAN tag insert/strip */
4420 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4421 ctrl &= ~E1000_CTRL_VME;
4422 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4423
cd94dd0b 4424 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4425 /* disable VLAN filtering */
4426 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4427 rctl &= ~E1000_RCTL_VFE;
4428 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4429 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4430 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4431 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4432 }
cd94dd0b 4433 }
1da177e4
LT		 4434 }
4435
4436 e1000_irq_enable(adapter);
4437}
4438
4439static void
4440e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4441{
60490fe0 4442 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4443 uint32_t vfta, index;
96838a40
JB		 4444
4445 if ((adapter->hw.mng_cookie.status &
4446 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4447 (vid == adapter->mng_vlan_id))
2d7edb92 4448 return;
1da177e4
LT		 4449 /* add VID to filter table */
4450 index = (vid >> 5) & 0x7F;
4451 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4452 vfta |= (1 << (vid & 0x1F));
4453 e1000_write_vfta(&adapter->hw, index, vfta);
4454}
4455
4456static void
4457e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4458{
60490fe0 4459 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4460 uint32_t vfta, index;
4461
4462 e1000_irq_disable(adapter);
4463
96838a40 4464 if (adapter->vlgrp)
1da177e4
LT		 4465 adapter->vlgrp->vlan_devices[vid] = NULL;
4466
4467 e1000_irq_enable(adapter);
4468
96838a40
JB		 4469 if ((adapter->hw.mng_cookie.status &
4470 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4471 (vid == adapter->mng_vlan_id)) {
4472 /* release control to f/w */
4473 e1000_release_hw_control(adapter);
2d7edb92 4474 return;
ff147013
JK		 4475 }
4476
1da177e4
LT		 4477 /* remove VID from filter table */
4478 index = (vid >> 5) & 0x7F;
4479 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4480 vfta &= ~(1 << (vid & 0x1F));
4481 e1000_write_vfta(&adapter->hw, index, vfta);
4482}
4483
4484static void
4485e1000_restore_vlan(struct e1000_adapter *adapter)
4486{
4487 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4488
96838a40 4489 if (adapter->vlgrp) {
1da177e4 4490 uint16_t vid;
96838a40
JB		 4491 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4492 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4493 continue;
4494 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4495 }
4496 }
4497}
4498
4499int
4500e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4501{
4502 adapter->hw.autoneg = 0;
4503
6921368f 4504 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4505 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4506 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4507 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4508 return -EINVAL;
4509 }
4510
96838a40 4511 switch (spddplx) {
1da177e4
LT		 4512 case SPEED_10 + DUPLEX_HALF:
4513 adapter->hw.forced_speed_duplex = e1000_10_half;
4514 break;
4515 case SPEED_10 + DUPLEX_FULL:
4516 adapter->hw.forced_speed_duplex = e1000_10_full;
4517 break;
4518 case SPEED_100 + DUPLEX_HALF:
4519 adapter->hw.forced_speed_duplex = e1000_100_half;
4520 break;
4521 case SPEED_100 + DUPLEX_FULL:
4522 adapter->hw.forced_speed_duplex = e1000_100_full;
4523 break;
4524 case SPEED_1000 + DUPLEX_FULL:
4525 adapter->hw.autoneg = 1;
4526 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4527 break;
4528 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4529 default:
2648345f 4530 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4531 return -EINVAL;
4532 }
4533 return 0;
4534}
4535
b6a1d5f8 4536#ifdef CONFIG_PM
0f15a8fa
JK		 4537/* Save/restore 16 or 64 dwords of PCI config space depending on which
4538 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4539 */
4540#define PCIE_CONFIG_SPACE_LEN 256
4541#define PCI_CONFIG_SPACE_LEN 64
4542static int
4543e1000_pci_save_state(struct e1000_adapter *adapter)
4544{
4545 struct pci_dev *dev = adapter->pdev;
4546 int size;
4547 int i;
0f15a8fa 4548
2f82665f
JB		 4549 if (adapter->hw.mac_type >= e1000_82571)
4550 size = PCIE_CONFIG_SPACE_LEN;
4551 else
4552 size = PCI_CONFIG_SPACE_LEN;
4553
4554 WARN_ON(adapter->config_space != NULL);
4555
4556 adapter->config_space = kmalloc(size, GFP_KERNEL);
4557 if (!adapter->config_space) {
4558 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4559 return -ENOMEM;
4560 }
4561 for (i = 0; i < (size / 4); i++)
4562 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4563 return 0;
4564}
4565
4566static void
4567e1000_pci_restore_state(struct e1000_adapter *adapter)
4568{
4569 struct pci_dev *dev = adapter->pdev;
4570 int size;
4571 int i;
0f15a8fa 4572
2f82665f
JB		 4573 if (adapter->config_space == NULL)
4574 return;
0f15a8fa 4575
2f82665f
JB		 4576 if (adapter->hw.mac_type >= e1000_82571)
4577 size = PCIE_CONFIG_SPACE_LEN;
4578 else
4579 size = PCI_CONFIG_SPACE_LEN;
4580 for (i = 0; i < (size / 4); i++)
4581 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4582 kfree(adapter->config_space);
4583 adapter->config_space = NULL;
4584 return;
4585}
4586#endif /* CONFIG_PM */
4587
1da177e4 4588static int
829ca9a3 4589e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4590{
4591 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4592 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4593 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4594 uint32_t wufc = adapter->wol;
6fdfef16 4595#ifdef CONFIG_PM
240b1710 4596 int retval = 0;
6fdfef16 4597#endif
1da177e4
LT		 4598
4599 netif_device_detach(netdev);
4600
2db10a08
AK		 4601 if (netif_running(netdev)) {
4602 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4603 e1000_down(adapter);
2db10a08 4604 }
1da177e4 4605
2f82665f 4606#ifdef CONFIG_PM
0f15a8fa
JK		 4607 /* Implement our own version of pci_save_state(pdev) because pci-
4608 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4609 retval = e1000_pci_save_state(adapter);
4610 if (retval)
4611 return retval;
4612#endif
4613
1da177e4 4614 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4615 if (status & E1000_STATUS_LU)
1da177e4
LT		 4616 wufc &= ~E1000_WUFC_LNKC;
4617
96838a40 4618 if (wufc) {
1da177e4
LT		 4619 e1000_setup_rctl(adapter);
4620 e1000_set_multi(netdev);
4621
4622 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4623 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4624 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4625 rctl |= E1000_RCTL_MPE;
4626 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4627 }
4628
96838a40 4629 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4630 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4631 /* advertise wake from D3Cold */
4632 #define E1000_CTRL_ADVD3WUC 0x00100000
4633 /* phy power management enable */
4634 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4635 ctrl |= E1000_CTRL_ADVD3WUC |
4636 E1000_CTRL_EN_PHY_PWR_MGMT;
4637 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4638 }
4639
96838a40 4640 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4641 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4642 /* keep the laser running in D3 */
4643 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4644 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4645 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4646 }
4647
2d7edb92
MC		 4648 /* Allow time for pending master requests to run */
4649 e1000_disable_pciex_master(&adapter->hw);
4650
1da177e4
LT		 4651 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4652 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4653 pci_enable_wake(pdev, PCI_D3hot, 1);
4654 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4655 } else {
4656 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4657 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4658 pci_enable_wake(pdev, PCI_D3hot, 0);
4659 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4660 }
4661
cd94dd0b 4662 /* FIXME: this code is incorrect for PCI Express */
96838a40 4663 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 4664 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 4665 adapter->hw.media_type == e1000_media_type_copper) {
4666 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4667 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4668 manc |= E1000_MANC_ARP_EN;
4669 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4670 pci_enable_wake(pdev, PCI_D3hot, 1);
4671 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4672 }
4673 }
4674
cd94dd0b
AK		 4675 if (adapter->hw.phy_type == e1000_phy_igp_3)
4676 e1000_phy_powerdown_workaround(&adapter->hw);
4677
b55ccb35
JK		 4678 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4679 * would have already happened in close and is redundant. */
4680 e1000_release_hw_control(adapter);
2d7edb92 4681
1da177e4 4682 pci_disable_device(pdev);
240b1710 4683
d0e027db 4684 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4685
4686 return 0;
4687}
4688
2f82665f 4689#ifdef CONFIG_PM
1da177e4
LT		 4690static int
4691e1000_resume(struct pci_dev *pdev)
4692{
4693 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4694 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4695 uint32_t manc, ret_val;
1da177e4 4696
d0e027db 4697 pci_set_power_state(pdev, PCI_D0);
2f82665f 4698 e1000_pci_restore_state(adapter);
2b02893e 4699 ret_val = pci_enable_device(pdev);
a4cb847d 4700 pci_set_master(pdev);
1da177e4 4701
d0e027db
AK		 4702 pci_enable_wake(pdev, PCI_D3hot, 0);
4703 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4704
4705 e1000_reset(adapter);
4706 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4707
96838a40 4708 if (netif_running(netdev))
1da177e4
LT		 4709 e1000_up(adapter);
4710
4711 netif_device_attach(netdev);
4712
cd94dd0b 4713 /* FIXME: this code is incorrect for PCI Express */
96838a40 4714 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 4715 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 4716 adapter->hw.media_type == e1000_media_type_copper) {
4717 manc = E1000_READ_REG(&adapter->hw, MANC);
4718 manc &= ~(E1000_MANC_ARP_EN);
4719 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4720 }
4721
b55ccb35
JK		 4722 /* If the controller is 82573 and f/w is AMT, do not set
4723 * DRV_LOAD until the interface is up. For all other cases,
4724 * let the f/w know that the h/w is now under the control
4725 * of the driver. */
4726 if (adapter->hw.mac_type != e1000_82573 ||
4727 !e1000_check_mng_mode(&adapter->hw))
4728 e1000_get_hw_control(adapter);
2d7edb92 4729
1da177e4
LT		 4730 return 0;
4731}
4732#endif
c653e635
AK		 4733
4734static void e1000_shutdown(struct pci_dev *pdev)
4735{
4736 e1000_suspend(pdev, PMSG_SUSPEND);
4737}
4738
1da177e4
LT		 4739#ifdef CONFIG_NET_POLL_CONTROLLER
4740/*
4741 * Polling 'interrupt' - used by things like netconsole to send skbs
4742 * without having to re-enable interrupts. It's not called while
4743 * the interrupt routine is executing.
4744 */
4745static void
2648345f 4746e1000_netpoll(struct net_device *netdev)
1da177e4 4747{
60490fe0 4748 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4749 disable_irq(adapter->pdev->irq);
4750 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4751 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4752#ifndef CONFIG_E1000_NAPI
4753 adapter->clean_rx(adapter, adapter->rx_ring);
4754#endif
1da177e4
LT		 4755 enable_irq(adapter->pdev->irq);
4756}
4757#endif
4758
9026729b
AK		 4759/**
4760 * e1000_io_error_detected - called when PCI error is detected
4761 * @pdev: Pointer to PCI device
4762 * @state: The current pci conneection state
4763 *
4764 * This function is called after a PCI bus error affecting
4765 * this device has been detected.
4766 */
4767static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4768{
4769 struct net_device *netdev = pci_get_drvdata(pdev);
4770 struct e1000_adapter *adapter = netdev->priv;
4771
4772 netif_device_detach(netdev);
4773
4774 if (netif_running(netdev))
4775 e1000_down(adapter);
4776
4777 /* Request a slot slot reset. */
4778 return PCI_ERS_RESULT_NEED_RESET;
4779}
4780
4781/**
4782 * e1000_io_slot_reset - called after the pci bus has been reset.
4783 * @pdev: Pointer to PCI device
4784 *
4785 * Restart the card from scratch, as if from a cold-boot. Implementation
4786 * resembles the first-half of the e1000_resume routine.
4787 */
4788static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4789{
4790 struct net_device *netdev = pci_get_drvdata(pdev);
4791 struct e1000_adapter *adapter = netdev->priv;
4792
4793 if (pci_enable_device(pdev)) {
4794 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4795 return PCI_ERS_RESULT_DISCONNECT;
4796 }
4797 pci_set_master(pdev);
4798
4799 pci_enable_wake(pdev, 3, 0);
4800 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4801
4802 /* Perform card reset only on one instance of the card */
4803 if (PCI_FUNC (pdev->devfn) != 0)
4804 return PCI_ERS_RESULT_RECOVERED;
4805
4806 e1000_reset(adapter);
4807 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4808
4809 return PCI_ERS_RESULT_RECOVERED;
4810}
4811
4812/**
4813 * e1000_io_resume - called when traffic can start flowing again.
4814 * @pdev: Pointer to PCI device
4815 *
4816 * This callback is called when the error recovery driver tells us that
4817 * its OK to resume normal operation. Implementation resembles the
4818 * second-half of the e1000_resume routine.
4819 */
4820static void e1000_io_resume(struct pci_dev *pdev)
4821{
4822 struct net_device *netdev = pci_get_drvdata(pdev);
4823 struct e1000_adapter *adapter = netdev->priv;
4824 uint32_t manc, swsm;
4825
4826 if (netif_running(netdev)) {
4827 if (e1000_up(adapter)) {
4828 printk("e1000: can't bring device back up after reset\n");
4829 return;
4830 }
4831 }
4832
4833 netif_device_attach(netdev);
4834
4835 if (adapter->hw.mac_type >= e1000_82540 &&
4836 adapter->hw.media_type == e1000_media_type_copper) {
4837 manc = E1000_READ_REG(&adapter->hw, MANC);
4838 manc &= ~(E1000_MANC_ARP_EN);
4839 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4840 }
4841
4842 switch (adapter->hw.mac_type) {
4843 case e1000_82573:
4844 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4845 E1000_WRITE_REG(&adapter->hw, SWSM,
4846 swsm | E1000_SWSM_DRV_LOAD);
4847 break;
4848 default:
4849 break;
4850 }
4851
4852 if (netif_running(netdev))
4853 mod_timer(&adapter->watchdog_timer, jiffies);
4854}
4855
1da177e4 4856/* e1000_main.c */
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