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e1000: force register write flushes to circumvent broken platforms
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
3d41e30a 4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
3d41e30a 25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28*******************************************************************************/
29
30#include "e1000.h"
31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 34#ifndef CONFIG_E1000_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
440c052d 39#define DRV_VERSION "7.0.38-k4"DRIVERNAPI
1da177e4 40char e1000_driver_version[] = DRV_VERSION;
3d41e30a 41static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 76 INTEL_E1000_ETHERNET_DEVICE(0x105E),
77 INTEL_E1000_ETHERNET_DEVICE(0x105F),
78 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 79 INTEL_E1000_ETHERNET_DEVICE(0x1075),
80 INTEL_E1000_ETHERNET_DEVICE(0x1076),
81 INTEL_E1000_ETHERNET_DEVICE(0x1077),
82 INTEL_E1000_ETHERNET_DEVICE(0x1078),
83 INTEL_E1000_ETHERNET_DEVICE(0x1079),
84 INTEL_E1000_ETHERNET_DEVICE(0x107A),
85 INTEL_E1000_ETHERNET_DEVICE(0x107B),
86 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 87 INTEL_E1000_ETHERNET_DEVICE(0x107D),
88 INTEL_E1000_ETHERNET_DEVICE(0x107E),
89 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 90 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x108B),
92 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 93 INTEL_E1000_ETHERNET_DEVICE(0x1096),
94 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 95 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 96 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 97 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 98 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
1da177e4
LT		 99 /* required last entry */
100 {0,}
101};
102
103MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
104
3ad2cc67 105static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 106 struct e1000_tx_ring *txdr);
3ad2cc67 107static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 108 struct e1000_rx_ring *rxdr);
3ad2cc67 109static void e1000_free_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 110 struct e1000_tx_ring *tx_ring);
3ad2cc67 111static void e1000_free_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 112 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 113
114/* Local Function Prototypes */
115
116static int e1000_init_module(void);
117static void e1000_exit_module(void);
118static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
119static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 120static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 121static int e1000_sw_init(struct e1000_adapter *adapter);
122static int e1000_open(struct net_device *netdev);
123static int e1000_close(struct net_device *netdev);
124static void e1000_configure_tx(struct e1000_adapter *adapter);
125static void e1000_configure_rx(struct e1000_adapter *adapter);
126static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 127static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
128static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
129static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 133static void e1000_set_multi(struct net_device *netdev);
134static void e1000_update_phy_info(unsigned long data);
135static void e1000_watchdog(unsigned long data);
1da177e4
LT		 136static void e1000_82547_tx_fifo_stall(unsigned long data);
137static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
138static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
139static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
140static int e1000_set_mac(struct net_device *netdev, void *p);
141static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 142static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
143 struct e1000_tx_ring *tx_ring);
1da177e4 144#ifdef CONFIG_E1000_NAPI
581d708e 145static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 146static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 147 struct e1000_rx_ring *rx_ring,
1da177e4 148 int *work_done, int work_to_do);
2d7edb92 149static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 150 struct e1000_rx_ring *rx_ring,
2d7edb92 151 int *work_done, int work_to_do);
1da177e4 152#else
581d708e
MC		 153static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
154 struct e1000_rx_ring *rx_ring);
155static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
156 struct e1000_rx_ring *rx_ring);
1da177e4 157#endif
581d708e 158static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 159 struct e1000_rx_ring *rx_ring,
160 int cleaned_count);
581d708e 161static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 162 struct e1000_rx_ring *rx_ring,
163 int cleaned_count);
1da177e4
LT		 164static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
165static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
166 int cmd);
1da177e4
LT		 167static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
168static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
169static void e1000_tx_timeout(struct net_device *dev);
87041639 170static void e1000_reset_task(struct net_device *dev);
1da177e4 171static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 172static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
173 struct sk_buff *skb);
1da177e4
LT		 174
175static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
176static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
177static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
178static void e1000_restore_vlan(struct e1000_adapter *adapter);
179
977e74b5 180static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 181#ifdef CONFIG_PM
1da177e4
LT		 182static int e1000_resume(struct pci_dev *pdev);
183#endif
c653e635 184static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 185
186#ifdef CONFIG_NET_POLL_CONTROLLER
187/* for netdump / net console */
188static void e1000_netpoll (struct net_device *netdev);
189#endif
190
9026729b
AK		 191static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
192 pci_channel_state_t state);
193static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
194static void e1000_io_resume(struct pci_dev *pdev);
195
196static struct pci_error_handlers e1000_err_handler = {
197 .error_detected = e1000_io_error_detected,
198 .slot_reset = e1000_io_slot_reset,
199 .resume = e1000_io_resume,
200};
24025e4e 201
1da177e4
LT		 202static struct pci_driver e1000_driver = {
203 .name = e1000_driver_name,
204 .id_table = e1000_pci_tbl,
205 .probe = e1000_probe,
206 .remove = __devexit_p(e1000_remove),
207 /* Power Managment Hooks */
1da177e4 208 .suspend = e1000_suspend,
6fdfef16 209#ifdef CONFIG_PM
c653e635 210 .resume = e1000_resume,
1da177e4 211#endif
9026729b
AK		 212 .shutdown = e1000_shutdown,
213 .err_handler = &e1000_err_handler
1da177e4
LT		 214};
215
216MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
217MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
218MODULE_LICENSE("GPL");
219MODULE_VERSION(DRV_VERSION);
220
221static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
222module_param(debug, int, 0);
223MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
224
225/**
226 * e1000_init_module - Driver Registration Routine
227 *
228 * e1000_init_module is the first routine called when the driver is
229 * loaded. All it does is register with the PCI subsystem.
230 **/
231
232static int __init
233e1000_init_module(void)
234{
235 int ret;
236 printk(KERN_INFO "%s - version %s\n",
237 e1000_driver_string, e1000_driver_version);
238
239 printk(KERN_INFO "%s\n", e1000_copyright);
240
241 ret = pci_module_init(&e1000_driver);
8b378def 242
1da177e4
LT		 243 return ret;
244}
245
246module_init(e1000_init_module);
247
248/**
249 * e1000_exit_module - Driver Exit Cleanup Routine
250 *
251 * e1000_exit_module is called just before the driver is removed
252 * from memory.
253 **/
254
255static void __exit
256e1000_exit_module(void)
257{
1da177e4
LT		 258 pci_unregister_driver(&e1000_driver);
259}
260
261module_exit(e1000_exit_module);
262
2db10a08
AK		 263static int e1000_request_irq(struct e1000_adapter *adapter)
264{
265 struct net_device *netdev = adapter->netdev;
266 int flags, err = 0;
267
268 flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
269#ifdef CONFIG_PCI_MSI
270 if (adapter->hw.mac_type > e1000_82547_rev_2) {
271 adapter->have_msi = TRUE;
272 if ((err = pci_enable_msi(adapter->pdev))) {
273 DPRINTK(PROBE, ERR,
274 "Unable to allocate MSI interrupt Error: %d\n", err);
275 adapter->have_msi = FALSE;
276 }
277 }
278 if (adapter->have_msi)
279 flags &= ~SA_SHIRQ;
280#endif
281 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
282 netdev->name, netdev)))
283 DPRINTK(PROBE, ERR,
284 "Unable to allocate interrupt Error: %d\n", err);
285
286 return err;
287}
288
289static void e1000_free_irq(struct e1000_adapter *adapter)
290{
291 struct net_device *netdev = adapter->netdev;
292
293 free_irq(adapter->pdev->irq, netdev);
294
295#ifdef CONFIG_PCI_MSI
296 if (adapter->have_msi)
297 pci_disable_msi(adapter->pdev);
298#endif
299}
300
1da177e4
LT		 301/**
302 * e1000_irq_disable - Mask off interrupt generation on the NIC
303 * @adapter: board private structure
304 **/
305
e619d523 306static void
1da177e4
LT		 307e1000_irq_disable(struct e1000_adapter *adapter)
308{
309 atomic_inc(&adapter->irq_sem);
310 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
311 E1000_WRITE_FLUSH(&adapter->hw);
312 synchronize_irq(adapter->pdev->irq);
313}
314
315/**
316 * e1000_irq_enable - Enable default interrupt generation settings
317 * @adapter: board private structure
318 **/
319
e619d523 320static void
1da177e4
LT		 321e1000_irq_enable(struct e1000_adapter *adapter)
322{
96838a40 323 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 324 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
325 E1000_WRITE_FLUSH(&adapter->hw);
326 }
327}
3ad2cc67
AB		 328
329static void
2d7edb92
MC		 330e1000_update_mng_vlan(struct e1000_adapter *adapter)
331{
332 struct net_device *netdev = adapter->netdev;
333 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
334 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 335 if (adapter->vlgrp) {
336 if (!adapter->vlgrp->vlan_devices[vid]) {
337 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 338 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
339 e1000_vlan_rx_add_vid(netdev, vid);
340 adapter->mng_vlan_id = vid;
341 } else
342 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 343
344 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
345 (vid != old_vid) &&
2d7edb92
MC		 346 !adapter->vlgrp->vlan_devices[old_vid])
347 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 348 } else
349 adapter->mng_vlan_id = vid;
2d7edb92
MC		 350 }
351}
b55ccb35
JK		 352
353/**
354 * e1000_release_hw_control - release control of the h/w to f/w
355 * @adapter: address of board private structure
356 *
357 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
358 * For ASF and Pass Through versions of f/w this means that the
359 * driver is no longer loaded. For AMT version (only with 82573) i
360 * of the f/w this means that the netowrk i/f is closed.
76c224bc 361 *
b55ccb35
JK		 362 **/
363
e619d523 364static void
b55ccb35
JK		 365e1000_release_hw_control(struct e1000_adapter *adapter)
366{
367 uint32_t ctrl_ext;
368 uint32_t swsm;
369
370 /* Let firmware taken over control of h/w */
371 switch (adapter->hw.mac_type) {
372 case e1000_82571:
373 case e1000_82572:
4cc15f54 374 case e1000_80003es2lan:
b55ccb35
JK		 375 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
376 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
377 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
378 break;
379 case e1000_82573:
380 swsm = E1000_READ_REG(&adapter->hw, SWSM);
381 E1000_WRITE_REG(&adapter->hw, SWSM,
382 swsm & ~E1000_SWSM_DRV_LOAD);
383 default:
384 break;
385 }
386}
387
388/**
389 * e1000_get_hw_control - get control of the h/w from f/w
390 * @adapter: address of board private structure
391 *
392 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 393 * For ASF and Pass Through versions of f/w this means that
394 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 395 * of the f/w this means that the netowrk i/f is open.
76c224bc 396 *
b55ccb35
JK		 397 **/
398
e619d523 399static void
b55ccb35
JK		 400e1000_get_hw_control(struct e1000_adapter *adapter)
401{
402 uint32_t ctrl_ext;
403 uint32_t swsm;
404 /* Let firmware know the driver has taken over */
405 switch (adapter->hw.mac_type) {
406 case e1000_82571:
407 case e1000_82572:
4cc15f54 408 case e1000_80003es2lan:
b55ccb35
JK		 409 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
410 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
411 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
412 break;
413 case e1000_82573:
414 swsm = E1000_READ_REG(&adapter->hw, SWSM);
415 E1000_WRITE_REG(&adapter->hw, SWSM,
416 swsm | E1000_SWSM_DRV_LOAD);
417 break;
418 default:
419 break;
420 }
421}
422
1da177e4
LT		 423int
424e1000_up(struct e1000_adapter *adapter)
425{
426 struct net_device *netdev = adapter->netdev;
2db10a08 427 int i;
1da177e4
LT		 428
429 /* hardware has been reset, we need to reload some things */
430
1da177e4
LT		 431 e1000_set_multi(netdev);
432
433 e1000_restore_vlan(adapter);
434
435 e1000_configure_tx(adapter);
436 e1000_setup_rctl(adapter);
437 e1000_configure_rx(adapter);
72d64a43
JK		 438 /* call E1000_DESC_UNUSED which always leaves
439 * at least 1 descriptor unused to make sure
440 * next_to_use != next_to_clean */
f56799ea 441 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 442 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 443 adapter->alloc_rx_buf(adapter, ring,
444 E1000_DESC_UNUSED(ring));
f56799ea 445 }
1da177e4 446
7bfa4816
JK		 447 adapter->tx_queue_len = netdev->tx_queue_len;
448
1da177e4 449 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 450
451#ifdef CONFIG_E1000_NAPI
452 netif_poll_enable(netdev);
453#endif
5de55624
MC		 454 e1000_irq_enable(adapter);
455
1da177e4
LT		 456 return 0;
457}
458
79f05bf0
AK		 459/**
460 * e1000_power_up_phy - restore link in case the phy was powered down
461 * @adapter: address of board private structure
462 *
463 * The phy may be powered down to save power and turn off link when the
464 * driver is unloaded and wake on lan is not enabled (among others)
465 * *** this routine MUST be followed by a call to e1000_reset ***
466 *
467 **/
468
469static void e1000_power_up_phy(struct e1000_adapter *adapter)
470{
471 uint16_t mii_reg = 0;
472
473 /* Just clear the power down bit to wake the phy back up */
474 if (adapter->hw.media_type == e1000_media_type_copper) {
475 /* according to the manual, the phy will retain its
476 * settings across a power-down/up cycle */
477 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
478 mii_reg &= ~MII_CR_POWER_DOWN;
479 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
480 }
481}
482
483static void e1000_power_down_phy(struct e1000_adapter *adapter)
484{
485 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
486 e1000_check_mng_mode(&adapter->hw);
487 /* Power down the PHY so no link is implied when interface is down
488 * The PHY cannot be powered down if any of the following is TRUE
489 * (a) WoL is enabled
490 * (b) AMT is active
491 * (c) SoL/IDER session is active */
492 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
493 adapter->hw.media_type == e1000_media_type_copper &&
494 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
495 !mng_mode_enabled &&
496 !e1000_check_phy_reset_block(&adapter->hw)) {
497 uint16_t mii_reg = 0;
498 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
499 mii_reg |= MII_CR_POWER_DOWN;
500 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
501 mdelay(1);
502 }
503}
504
1da177e4
LT		 505void
506e1000_down(struct e1000_adapter *adapter)
507{
508 struct net_device *netdev = adapter->netdev;
509
510 e1000_irq_disable(adapter);
c1605eb3 511
1da177e4
LT		 512 del_timer_sync(&adapter->tx_fifo_stall_timer);
513 del_timer_sync(&adapter->watchdog_timer);
514 del_timer_sync(&adapter->phy_info_timer);
515
516#ifdef CONFIG_E1000_NAPI
517 netif_poll_disable(netdev);
518#endif
7bfa4816 519 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 520 adapter->link_speed = 0;
521 adapter->link_duplex = 0;
522 netif_carrier_off(netdev);
523 netif_stop_queue(netdev);
524
525 e1000_reset(adapter);
581d708e
MC		 526 e1000_clean_all_tx_rings(adapter);
527 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 528}
529
2db10a08
AK		 530void
531e1000_reinit_locked(struct e1000_adapter *adapter)
532{
533 WARN_ON(in_interrupt());
534 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
535 msleep(1);
536 e1000_down(adapter);
537 e1000_up(adapter);
538 clear_bit(__E1000_RESETTING, &adapter->flags);
539}
540
1da177e4
LT		 541void
542e1000_reset(struct e1000_adapter *adapter)
543{
2d7edb92 544 uint32_t pba, manc;
1125ecbc 545 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 546
547 /* Repartition Pba for greater than 9k mtu
548 * To take effect CTRL.RST is required.
549 */
550
2d7edb92
MC		 551 switch (adapter->hw.mac_type) {
552 case e1000_82547:
0e6ef3e0 553 case e1000_82547_rev_2:
2d7edb92
MC		 554 pba = E1000_PBA_30K;
555 break;
868d5309
MC		 556 case e1000_82571:
557 case e1000_82572:
6418ecc6 558 case e1000_80003es2lan:
868d5309
MC		 559 pba = E1000_PBA_38K;
560 break;
2d7edb92
MC		 561 case e1000_82573:
562 pba = E1000_PBA_12K;
563 break;
564 default:
565 pba = E1000_PBA_48K;
566 break;
567 }
568
96838a40 569 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 570 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 571 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 572
573
96838a40 574 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 575 adapter->tx_fifo_head = 0;
576 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
577 adapter->tx_fifo_size =
578 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
579 atomic_set(&adapter->tx_fifo_stall, 0);
580 }
2d7edb92 581
1da177e4
LT		 582 E1000_WRITE_REG(&adapter->hw, PBA, pba);
583
584 /* flow control settings */
f11b7f85
JK		 585 /* Set the FC high water mark to 90% of the FIFO size.
586 * Required to clear last 3 LSB */
587 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
588
589 adapter->hw.fc_high_water = fc_high_water_mark;
590 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 591 if (adapter->hw.mac_type == e1000_80003es2lan)
592 adapter->hw.fc_pause_time = 0xFFFF;
593 else
594 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 595 adapter->hw.fc_send_xon = 1;
596 adapter->hw.fc = adapter->hw.original_fc;
597
2d7edb92 598 /* Allow time for pending master requests to run */
1da177e4 599 e1000_reset_hw(&adapter->hw);
96838a40 600 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 601 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 602 if (e1000_init_hw(&adapter->hw))
1da177e4 603 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 604 e1000_update_mng_vlan(adapter);
1da177e4
LT		 605 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
606 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
607
608 e1000_reset_adaptive(&adapter->hw);
609 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 610
611 if (!adapter->smart_power_down &&
612 (adapter->hw.mac_type == e1000_82571 ||
613 adapter->hw.mac_type == e1000_82572)) {
614 uint16_t phy_data = 0;
615 /* speed up time to link by disabling smart power down, ignore
616 * the return value of this function because there is nothing
617 * different we would do if it failed */
618 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
619 &phy_data);
620 phy_data &= ~IGP02E1000_PM_SPD;
621 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
622 phy_data);
623 }
624
2d7edb92
MC		 625 if (adapter->en_mng_pt) {
626 manc = E1000_READ_REG(&adapter->hw, MANC);
627 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
628 E1000_WRITE_REG(&adapter->hw, MANC, manc);
629 }
1da177e4
LT		 630}
631
632/**
633 * e1000_probe - Device Initialization Routine
634 * @pdev: PCI device information struct
635 * @ent: entry in e1000_pci_tbl
636 *
637 * Returns 0 on success, negative on failure
638 *
639 * e1000_probe initializes an adapter identified by a pci_dev structure.
640 * The OS initialization, configuring of the adapter private structure,
641 * and a hardware reset occur.
642 **/
643
644static int __devinit
645e1000_probe(struct pci_dev *pdev,
646 const struct pci_device_id *ent)
647{
648 struct net_device *netdev;
649 struct e1000_adapter *adapter;
2d7edb92 650 unsigned long mmio_start, mmio_len;
2d7edb92 651
1da177e4 652 static int cards_found = 0;
84916829 653 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
2d7edb92 654 int i, err, pci_using_dac;
1da177e4
LT		 655 uint16_t eeprom_data;
656 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 657 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 658 return err;
659
96838a40 660 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 661 pci_using_dac = 1;
662 } else {
96838a40 663 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 664 E1000_ERR("No usable DMA configuration, aborting\n");
665 return err;
666 }
667 pci_using_dac = 0;
668 }
669
96838a40 670 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 671 return err;
672
673 pci_set_master(pdev);
674
675 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 676 if (!netdev) {
1da177e4
LT		 677 err = -ENOMEM;
678 goto err_alloc_etherdev;
679 }
680
681 SET_MODULE_OWNER(netdev);
682 SET_NETDEV_DEV(netdev, &pdev->dev);
683
684 pci_set_drvdata(pdev, netdev);
60490fe0 685 adapter = netdev_priv(netdev);
1da177e4
LT		 686 adapter->netdev = netdev;
687 adapter->pdev = pdev;
688 adapter->hw.back = adapter;
689 adapter->msg_enable = (1 << debug) - 1;
690
691 mmio_start = pci_resource_start(pdev, BAR_0);
692 mmio_len = pci_resource_len(pdev, BAR_0);
693
694 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 695 if (!adapter->hw.hw_addr) {
1da177e4
LT		 696 err = -EIO;
697 goto err_ioremap;
698 }
699
96838a40
JB		 700 for (i = BAR_1; i <= BAR_5; i++) {
701 if (pci_resource_len(pdev, i) == 0)
1da177e4 702 continue;
96838a40 703 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 704 adapter->hw.io_base = pci_resource_start(pdev, i);
705 break;
706 }
707 }
708
709 netdev->open = &e1000_open;
710 netdev->stop = &e1000_close;
711 netdev->hard_start_xmit = &e1000_xmit_frame;
712 netdev->get_stats = &e1000_get_stats;
713 netdev->set_multicast_list = &e1000_set_multi;
714 netdev->set_mac_address = &e1000_set_mac;
715 netdev->change_mtu = &e1000_change_mtu;
716 netdev->do_ioctl = &e1000_ioctl;
717 e1000_set_ethtool_ops(netdev);
718 netdev->tx_timeout = &e1000_tx_timeout;
719 netdev->watchdog_timeo = 5 * HZ;
720#ifdef CONFIG_E1000_NAPI
721 netdev->poll = &e1000_clean;
722 netdev->weight = 64;
723#endif
724 netdev->vlan_rx_register = e1000_vlan_rx_register;
725 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
726 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
727#ifdef CONFIG_NET_POLL_CONTROLLER
728 netdev->poll_controller = e1000_netpoll;
729#endif
730 strcpy(netdev->name, pci_name(pdev));
731
732 netdev->mem_start = mmio_start;
733 netdev->mem_end = mmio_start + mmio_len;
734 netdev->base_addr = adapter->hw.io_base;
735
736 adapter->bd_number = cards_found;
737
738 /* setup the private structure */
739
96838a40 740 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 741 goto err_sw_init;
742
96838a40 743 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 744 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
745
84916829 746 /* if ksp3, indicate if it's port a being setup */
76c224bc
AK		 747 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
748 e1000_ksp3_port_a == 0)
84916829
JK		 749 adapter->ksp3_port_a = 1;
750 e1000_ksp3_port_a++;
751 /* Reset for multiple KP3 adapters */
752 if (e1000_ksp3_port_a == 4)
753 e1000_ksp3_port_a = 0;
754
96838a40 755 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 756 netdev->features = NETIF_F_SG |
757 NETIF_F_HW_CSUM |
758 NETIF_F_HW_VLAN_TX |
759 NETIF_F_HW_VLAN_RX |
760 NETIF_F_HW_VLAN_FILTER;
761 }
762
763#ifdef NETIF_F_TSO
96838a40 764 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 765 (adapter->hw.mac_type != e1000_82547))
766 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 767
768#ifdef NETIF_F_TSO_IPV6
96838a40 769 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 770 netdev->features |= NETIF_F_TSO_IPV6;
771#endif
1da177e4 772#endif
96838a40 773 if (pci_using_dac)
1da177e4
LT		 774 netdev->features |= NETIF_F_HIGHDMA;
775
76c224bc
AK		 776 /* hard_start_xmit is safe against parallel locking */
777 netdev->features |= NETIF_F_LLTX;
778
2d7edb92
MC		 779 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
780
96838a40 781 /* before reading the EEPROM, reset the controller to
1da177e4 782 * put the device in a known good starting state */
96838a40 783
1da177e4
LT		 784 e1000_reset_hw(&adapter->hw);
785
786 /* make sure the EEPROM is good */
787
96838a40 788 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 789 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
790 err = -EIO;
791 goto err_eeprom;
792 }
793
794 /* copy the MAC address out of the EEPROM */
795
96838a40 796 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 797 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
798 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 799 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 800
96838a40 801 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 802 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
803 err = -EIO;
804 goto err_eeprom;
805 }
806
807 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
808
809 e1000_get_bus_info(&adapter->hw);
810
811 init_timer(&adapter->tx_fifo_stall_timer);
812 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
813 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
814
815 init_timer(&adapter->watchdog_timer);
816 adapter->watchdog_timer.function = &e1000_watchdog;
817 adapter->watchdog_timer.data = (unsigned long) adapter;
818
1da177e4
LT		 819 init_timer(&adapter->phy_info_timer);
820 adapter->phy_info_timer.function = &e1000_update_phy_info;
821 adapter->phy_info_timer.data = (unsigned long) adapter;
822
87041639
JK		 823 INIT_WORK(&adapter->reset_task,
824 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 825
826 /* we're going to reset, so assume we have no link for now */
827
828 netif_carrier_off(netdev);
829 netif_stop_queue(netdev);
830
831 e1000_check_options(adapter);
832
833 /* Initial Wake on LAN setting
834 * If APM wake is enabled in the EEPROM,
835 * enable the ACPI Magic Packet filter
836 */
837
96838a40 838 switch (adapter->hw.mac_type) {
1da177e4
LT		 839 case e1000_82542_rev2_0:
840 case e1000_82542_rev2_1:
841 case e1000_82543:
842 break;
843 case e1000_82544:
844 e1000_read_eeprom(&adapter->hw,
845 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
846 eeprom_apme_mask = E1000_EEPROM_82544_APM;
847 break;
848 case e1000_82546:
849 case e1000_82546_rev_3:
fd803241 850 case e1000_82571:
6418ecc6 851 case e1000_80003es2lan:
96838a40 852 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 853 e1000_read_eeprom(&adapter->hw,
854 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
855 break;
856 }
857 /* Fall Through */
858 default:
859 e1000_read_eeprom(&adapter->hw,
860 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
861 break;
862 }
96838a40 863 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 864 adapter->wol |= E1000_WUFC_MAG;
865
fb3d47d4
JK		 866 /* print bus type/speed/width info */
867 {
868 struct e1000_hw *hw = &adapter->hw;
869 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
870 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
871 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
872 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
873 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
874 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
875 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
876 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
877 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
878 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
879 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
880 "32-bit"));
881 }
882
883 for (i = 0; i < 6; i++)
884 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
885
1da177e4
LT		 886 /* reset the hardware with the new settings */
887 e1000_reset(adapter);
888
b55ccb35
JK		 889 /* If the controller is 82573 and f/w is AMT, do not set
890 * DRV_LOAD until the interface is up. For all other cases,
891 * let the f/w know that the h/w is now under the control
892 * of the driver. */
893 if (adapter->hw.mac_type != e1000_82573 ||
894 !e1000_check_mng_mode(&adapter->hw))
895 e1000_get_hw_control(adapter);
2d7edb92 896
1da177e4 897 strcpy(netdev->name, "eth%d");
96838a40 898 if ((err = register_netdev(netdev)))
1da177e4
LT		 899 goto err_register;
900
901 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
902
903 cards_found++;
904 return 0;
905
906err_register:
907err_sw_init:
908err_eeprom:
909 iounmap(adapter->hw.hw_addr);
910err_ioremap:
911 free_netdev(netdev);
912err_alloc_etherdev:
913 pci_release_regions(pdev);
914 return err;
915}
916
917/**
918 * e1000_remove - Device Removal Routine
919 * @pdev: PCI device information struct
920 *
921 * e1000_remove is called by the PCI subsystem to alert the driver
922 * that it should release a PCI device. The could be caused by a
923 * Hot-Plug event, or because the driver is going to be removed from
924 * memory.
925 **/
926
927static void __devexit
928e1000_remove(struct pci_dev *pdev)
929{
930 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 931 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 932 uint32_t manc;
581d708e
MC		 933#ifdef CONFIG_E1000_NAPI
934 int i;
935#endif
1da177e4 936
be2b28ed
JG		 937 flush_scheduled_work();
938
96838a40 939 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 940 adapter->hw.media_type == e1000_media_type_copper) {
941 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 942 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 943 manc |= E1000_MANC_ARP_EN;
944 E1000_WRITE_REG(&adapter->hw, MANC, manc);
945 }
946 }
947
b55ccb35
JK		 948 /* Release control of h/w to f/w. If f/w is AMT enabled, this
949 * would have already happened in close and is redundant. */
950 e1000_release_hw_control(adapter);
2d7edb92 951
1da177e4 952 unregister_netdev(netdev);
581d708e 953#ifdef CONFIG_E1000_NAPI
f56799ea 954 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 955 dev_put(&adapter->polling_netdev[i]);
581d708e 956#endif
1da177e4 957
96838a40 958 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 959 e1000_phy_hw_reset(&adapter->hw);
1da177e4 960
24025e4e
MC		 961 kfree(adapter->tx_ring);
962 kfree(adapter->rx_ring);
963#ifdef CONFIG_E1000_NAPI
964 kfree(adapter->polling_netdev);
965#endif
966
1da177e4
LT		 967 iounmap(adapter->hw.hw_addr);
968 pci_release_regions(pdev);
969
970 free_netdev(netdev);
971
972 pci_disable_device(pdev);
973}
974
975/**
976 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
977 * @adapter: board private structure to initialize
978 *
979 * e1000_sw_init initializes the Adapter private data structure.
980 * Fields are initialized based on PCI device information and
981 * OS network device settings (MTU size).
982 **/
983
984static int __devinit
985e1000_sw_init(struct e1000_adapter *adapter)
986{
987 struct e1000_hw *hw = &adapter->hw;
988 struct net_device *netdev = adapter->netdev;
989 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 990#ifdef CONFIG_E1000_NAPI
991 int i;
992#endif
1da177e4
LT		 993
994 /* PCI config space info */
995
996 hw->vendor_id = pdev->vendor;
997 hw->device_id = pdev->device;
998 hw->subsystem_vendor_id = pdev->subsystem_vendor;
999 hw->subsystem_id = pdev->subsystem_device;
1000
1001 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1002
1003 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1004
9e2feace
AK		 1005 adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
1006 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1007 hw->max_frame_size = netdev->mtu +
1008 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1009 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1010
1011 /* identify the MAC */
1012
96838a40 1013 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1014 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1015 return -EIO;
1016 }
1017
1018 /* initialize eeprom parameters */
1019
96838a40 1020 if (e1000_init_eeprom_params(hw)) {
2d7edb92
MC		 1021 E1000_ERR("EEPROM initialization failed\n");
1022 return -EIO;
1023 }
1da177e4 1024
96838a40 1025 switch (hw->mac_type) {
1da177e4
LT		 1026 default:
1027 break;
1028 case e1000_82541:
1029 case e1000_82547:
1030 case e1000_82541_rev_2:
1031 case e1000_82547_rev_2:
1032 hw->phy_init_script = 1;
1033 break;
1034 }
1035
1036 e1000_set_media_type(hw);
1037
1038 hw->wait_autoneg_complete = FALSE;
1039 hw->tbi_compatibility_en = TRUE;
1040 hw->adaptive_ifs = TRUE;
1041
1042 /* Copper options */
1043
96838a40 1044 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1045 hw->mdix = AUTO_ALL_MODES;
1046 hw->disable_polarity_correction = FALSE;
1047 hw->master_slave = E1000_MASTER_SLAVE;
1048 }
1049
f56799ea
JK		 1050 adapter->num_tx_queues = 1;
1051 adapter->num_rx_queues = 1;
581d708e
MC		 1052
1053 if (e1000_alloc_queues(adapter)) {
1054 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1055 return -ENOMEM;
1056 }
1057
1058#ifdef CONFIG_E1000_NAPI
f56799ea 1059 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1060 adapter->polling_netdev[i].priv = adapter;
1061 adapter->polling_netdev[i].poll = &e1000_clean;
1062 adapter->polling_netdev[i].weight = 64;
1063 dev_hold(&adapter->polling_netdev[i]);
1064 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1065 }
7bfa4816 1066 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1067#endif
1068
1da177e4
LT		 1069 atomic_set(&adapter->irq_sem, 1);
1070 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1071
1072 return 0;
1073}
1074
581d708e
MC		 1075/**
1076 * e1000_alloc_queues - Allocate memory for all rings
1077 * @adapter: board private structure to initialize
1078 *
1079 * We allocate one ring per queue at run-time since we don't know the
1080 * number of queues at compile-time. The polling_netdev array is
1081 * intended for Multiqueue, but should work fine with a single queue.
1082 **/
1083
1084static int __devinit
1085e1000_alloc_queues(struct e1000_adapter *adapter)
1086{
1087 int size;
1088
f56799ea 1089 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1090 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1091 if (!adapter->tx_ring)
1092 return -ENOMEM;
1093 memset(adapter->tx_ring, 0, size);
1094
f56799ea 1095 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1096 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1097 if (!adapter->rx_ring) {
1098 kfree(adapter->tx_ring);
1099 return -ENOMEM;
1100 }
1101 memset(adapter->rx_ring, 0, size);
1102
1103#ifdef CONFIG_E1000_NAPI
f56799ea 1104 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1105 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1106 if (!adapter->polling_netdev) {
1107 kfree(adapter->tx_ring);
1108 kfree(adapter->rx_ring);
1109 return -ENOMEM;
1110 }
1111 memset(adapter->polling_netdev, 0, size);
1112#endif
1113
1114 return E1000_SUCCESS;
1115}
1116
1da177e4
LT		 1117/**
1118 * e1000_open - Called when a network interface is made active
1119 * @netdev: network interface device structure
1120 *
1121 * Returns 0 on success, negative value on failure
1122 *
1123 * The open entry point is called when a network interface is made
1124 * active by the system (IFF_UP). At this point all resources needed
1125 * for transmit and receive operations are allocated, the interrupt
1126 * handler is registered with the OS, the watchdog timer is started,
1127 * and the stack is notified that the interface is ready.
1128 **/
1129
1130static int
1131e1000_open(struct net_device *netdev)
1132{
60490fe0 1133 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1134 int err;
1135
2db10a08
AK		 1136 /* disallow open during test */
1137 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1138 return -EBUSY;
1139
1da177e4
LT		 1140 /* allocate transmit descriptors */
1141
581d708e 1142 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1143 goto err_setup_tx;
1144
1145 /* allocate receive descriptors */
1146
581d708e 1147 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1148 goto err_setup_rx;
1149
2db10a08
AK		 1150 err = e1000_request_irq(adapter);
1151 if (err)
1152 goto err_up;
1153
79f05bf0
AK		 1154 e1000_power_up_phy(adapter);
1155
96838a40 1156 if ((err = e1000_up(adapter)))
1da177e4 1157 goto err_up;
2d7edb92 1158 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1159 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1160 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1161 e1000_update_mng_vlan(adapter);
1162 }
1da177e4 1163
b55ccb35
JK		 1164 /* If AMT is enabled, let the firmware know that the network
1165 * interface is now open */
1166 if (adapter->hw.mac_type == e1000_82573 &&
1167 e1000_check_mng_mode(&adapter->hw))
1168 e1000_get_hw_control(adapter);
1169
1da177e4
LT		 1170 return E1000_SUCCESS;
1171
1172err_up:
581d708e 1173 e1000_free_all_rx_resources(adapter);
1da177e4 1174err_setup_rx:
581d708e 1175 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1176err_setup_tx:
1177 e1000_reset(adapter);
1178
1179 return err;
1180}
1181
1182/**
1183 * e1000_close - Disables a network interface
1184 * @netdev: network interface device structure
1185 *
1186 * Returns 0, this is not allowed to fail
1187 *
1188 * The close entry point is called when an interface is de-activated
1189 * by the OS. The hardware is still under the drivers control, but
1190 * needs to be disabled. A global MAC reset is issued to stop the
1191 * hardware, and all transmit and receive resources are freed.
1192 **/
1193
1194static int
1195e1000_close(struct net_device *netdev)
1196{
60490fe0 1197 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1198
2db10a08 1199 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1200 e1000_down(adapter);
79f05bf0 1201 e1000_power_down_phy(adapter);
2db10a08 1202 e1000_free_irq(adapter);
1da177e4 1203
581d708e
MC		 1204 e1000_free_all_tx_resources(adapter);
1205 e1000_free_all_rx_resources(adapter);
1da177e4 1206
96838a40 1207 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1208 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1209 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1210 }
b55ccb35
JK		 1211
1212 /* If AMT is enabled, let the firmware know that the network
1213 * interface is now closed */
1214 if (adapter->hw.mac_type == e1000_82573 &&
1215 e1000_check_mng_mode(&adapter->hw))
1216 e1000_release_hw_control(adapter);
1217
1da177e4
LT		 1218 return 0;
1219}
1220
1221/**
1222 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1223 * @adapter: address of board private structure
2d7edb92
MC		 1224 * @start: address of beginning of memory
1225 * @len: length of memory
1da177e4 1226 **/
e619d523 1227static boolean_t
1da177e4
LT		 1228e1000_check_64k_bound(struct e1000_adapter *adapter,
1229 void *start, unsigned long len)
1230{
1231 unsigned long begin = (unsigned long) start;
1232 unsigned long end = begin + len;
1233
2648345f
MC		 1234 /* First rev 82545 and 82546 need to not allow any memory
1235 * write location to cross 64k boundary due to errata 23 */
1da177e4 1236 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1237 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1238 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1239 }
1240
1241 return TRUE;
1242}
1243
1244/**
1245 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1246 * @adapter: board private structure
581d708e 1247 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1248 *
1249 * Return 0 on success, negative on failure
1250 **/
1251
3ad2cc67 1252static int
581d708e
MC		 1253e1000_setup_tx_resources(struct e1000_adapter *adapter,
1254 struct e1000_tx_ring *txdr)
1da177e4 1255{
1da177e4
LT		 1256 struct pci_dev *pdev = adapter->pdev;
1257 int size;
1258
1259 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1260
1261 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
96838a40 1262 if (!txdr->buffer_info) {
2648345f
MC		 1263 DPRINTK(PROBE, ERR,
1264 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1265 return -ENOMEM;
1266 }
1267 memset(txdr->buffer_info, 0, size);
1268
1269 /* round up to nearest 4K */
1270
1271 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1272 E1000_ROUNDUP(txdr->size, 4096);
1273
1274 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1275 if (!txdr->desc) {
1da177e4 1276setup_tx_desc_die:
1da177e4 1277 vfree(txdr->buffer_info);
2648345f
MC		 1278 DPRINTK(PROBE, ERR,
1279 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1280 return -ENOMEM;
1281 }
1282
2648345f 1283 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1284 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1285 void *olddesc = txdr->desc;
1286 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1287 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1288 "at %p\n", txdr->size, txdr->desc);
1289 /* Try again, without freeing the previous */
1da177e4 1290 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1291 /* Failed allocation, critical failure */
96838a40 1292 if (!txdr->desc) {
1da177e4
LT		 1293 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1294 goto setup_tx_desc_die;
1295 }
1296
1297 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1298 /* give up */
2648345f
MC		 1299 pci_free_consistent(pdev, txdr->size, txdr->desc,
1300 txdr->dma);
1da177e4
LT		 1301 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1302 DPRINTK(PROBE, ERR,
2648345f
MC		 1303 "Unable to allocate aligned memory "
1304 "for the transmit descriptor ring\n");
1da177e4
LT		 1305 vfree(txdr->buffer_info);
1306 return -ENOMEM;
1307 } else {
2648345f 1308 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1309 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1310 }
1311 }
1312 memset(txdr->desc, 0, txdr->size);
1313
1314 txdr->next_to_use = 0;
1315 txdr->next_to_clean = 0;
2ae76d98 1316 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1317
1318 return 0;
1319}
1320
581d708e
MC		 1321/**
1322 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1323 * (Descriptors) for all queues
1324 * @adapter: board private structure
1325 *
1326 * If this function returns with an error, then it's possible one or
1327 * more of the rings is populated (while the rest are not). It is the
1328 * callers duty to clean those orphaned rings.
1329 *
1330 * Return 0 on success, negative on failure
1331 **/
1332
1333int
1334e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1335{
1336 int i, err = 0;
1337
f56799ea 1338 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1339 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1340 if (err) {
1341 DPRINTK(PROBE, ERR,
1342 "Allocation for Tx Queue %u failed\n", i);
1343 break;
1344 }
1345 }
1346
1347 return err;
1348}
1349
1da177e4
LT		 1350/**
1351 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1352 * @adapter: board private structure
1353 *
1354 * Configure the Tx unit of the MAC after a reset.
1355 **/
1356
1357static void
1358e1000_configure_tx(struct e1000_adapter *adapter)
1359{
581d708e
MC		 1360 uint64_t tdba;
1361 struct e1000_hw *hw = &adapter->hw;
1362 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1363 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1364
1365 /* Setup the HW Tx Head and Tail descriptor pointers */
1366
f56799ea 1367 switch (adapter->num_tx_queues) {
24025e4e
MC		 1368 case 1:
1369 default:
581d708e
MC		 1370 tdba = adapter->tx_ring[0].dma;
1371 tdlen = adapter->tx_ring[0].count *
1372 sizeof(struct e1000_tx_desc);
581d708e 1373 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1374 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1375 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1376 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1377 E1000_WRITE_REG(hw, TDH, 0);
581d708e
MC		 1378 adapter->tx_ring[0].tdh = E1000_TDH;
1379 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1380 break;
1381 }
1da177e4
LT		 1382
1383 /* Set the default values for the Tx Inter Packet Gap timer */
1384
0fadb059
JK		 1385 if (hw->media_type == e1000_media_type_fiber ||
1386 hw->media_type == e1000_media_type_internal_serdes)
1387 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1388 else
1389 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1390
581d708e 1391 switch (hw->mac_type) {
1da177e4
LT		 1392 case e1000_82542_rev2_0:
1393 case e1000_82542_rev2_1:
1394 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1395 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1396 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1397 break;
87041639
JK		 1398 case e1000_80003es2lan:
1399 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1400 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1401 break;
1da177e4 1402 default:
0fadb059
JK		 1403 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1404 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1405 break;
1da177e4 1406 }
0fadb059
JK		 1407 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1408 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1409 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1410
1411 /* Set the Tx Interrupt Delay register */
1412
581d708e
MC		 1413 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1414 if (hw->mac_type >= e1000_82540)
1415 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1416
1417 /* Program the Transmit Control Register */
1418
581d708e 1419 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1420
1421 tctl &= ~E1000_TCTL_CT;
7e6c9861 1422 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1423 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1424
7e6c9861
JK		 1425#ifdef DISABLE_MULR
1426 /* disable Multiple Reads for debugging */
1427 tctl &= ~E1000_TCTL_MULR;
1428#endif
1da177e4 1429
2ae76d98
MC		 1430 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1431 tarc = E1000_READ_REG(hw, TARC0);
1432 tarc |= ((1 << 25) | (1 << 21));
1433 E1000_WRITE_REG(hw, TARC0, tarc);
1434 tarc = E1000_READ_REG(hw, TARC1);
1435 tarc |= (1 << 25);
1436 if (tctl & E1000_TCTL_MULR)
1437 tarc &= ~(1 << 28);
1438 else
1439 tarc |= (1 << 28);
1440 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1441 } else if (hw->mac_type == e1000_80003es2lan) {
1442 tarc = E1000_READ_REG(hw, TARC0);
1443 tarc |= 1;
1444 if (hw->media_type == e1000_media_type_internal_serdes)
1445 tarc |= (1 << 20);
1446 E1000_WRITE_REG(hw, TARC0, tarc);
1447 tarc = E1000_READ_REG(hw, TARC1);
1448 tarc |= 1;
1449 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1450 }
1451
581d708e 1452 e1000_config_collision_dist(hw);
1da177e4
LT		 1453
1454 /* Setup Transmit Descriptor Settings for eop descriptor */
1455 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1456 E1000_TXD_CMD_IFCS;
1457
581d708e 1458 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1459 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1460 else
1461 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1462
1463 /* Cache if we're 82544 running in PCI-X because we'll
1464 * need this to apply a workaround later in the send path. */
581d708e
MC		 1465 if (hw->mac_type == e1000_82544 &&
1466 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1467 adapter->pcix_82544 = 1;
7e6c9861
JK		 1468
1469 E1000_WRITE_REG(hw, TCTL, tctl);
1470
1da177e4
LT		 1471}
1472
1473/**
1474 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1475 * @adapter: board private structure
581d708e 1476 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1477 *
1478 * Returns 0 on success, negative on failure
1479 **/
1480
3ad2cc67 1481static int
581d708e
MC		 1482e1000_setup_rx_resources(struct e1000_adapter *adapter,
1483 struct e1000_rx_ring *rxdr)
1da177e4 1484{
1da177e4 1485 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1486 int size, desc_len;
1da177e4
LT		 1487
1488 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1489 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1490 if (!rxdr->buffer_info) {
2648345f
MC		 1491 DPRINTK(PROBE, ERR,
1492 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1493 return -ENOMEM;
1494 }
1495 memset(rxdr->buffer_info, 0, size);
1496
2d7edb92
MC		 1497 size = sizeof(struct e1000_ps_page) * rxdr->count;
1498 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1499 if (!rxdr->ps_page) {
2d7edb92
MC		 1500 vfree(rxdr->buffer_info);
1501 DPRINTK(PROBE, ERR,
1502 "Unable to allocate memory for the receive descriptor ring\n");
1503 return -ENOMEM;
1504 }
1505 memset(rxdr->ps_page, 0, size);
1506
1507 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1508 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1509 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1510 vfree(rxdr->buffer_info);
1511 kfree(rxdr->ps_page);
1512 DPRINTK(PROBE, ERR,
1513 "Unable to allocate memory for the receive descriptor ring\n");
1514 return -ENOMEM;
1515 }
1516 memset(rxdr->ps_page_dma, 0, size);
1517
96838a40 1518 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1519 desc_len = sizeof(struct e1000_rx_desc);
1520 else
1521 desc_len = sizeof(union e1000_rx_desc_packet_split);
1522
1da177e4
LT		 1523 /* Round up to nearest 4K */
1524
2d7edb92 1525 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1526 E1000_ROUNDUP(rxdr->size, 4096);
1527
1528 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1529
581d708e
MC		 1530 if (!rxdr->desc) {
1531 DPRINTK(PROBE, ERR,
1532 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1533setup_rx_desc_die:
1da177e4 1534 vfree(rxdr->buffer_info);
2d7edb92
MC		 1535 kfree(rxdr->ps_page);
1536 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1537 return -ENOMEM;
1538 }
1539
2648345f 1540 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1541 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1542 void *olddesc = rxdr->desc;
1543 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1544 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1545 "at %p\n", rxdr->size, rxdr->desc);
1546 /* Try again, without freeing the previous */
1da177e4 1547 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1548 /* Failed allocation, critical failure */
581d708e 1549 if (!rxdr->desc) {
1da177e4 1550 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1551 DPRINTK(PROBE, ERR,
1552 "Unable to allocate memory "
1553 "for the receive descriptor ring\n");
1da177e4
LT		 1554 goto setup_rx_desc_die;
1555 }
1556
1557 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1558 /* give up */
2648345f
MC		 1559 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1560 rxdr->dma);
1da177e4 1561 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1562 DPRINTK(PROBE, ERR,
1563 "Unable to allocate aligned memory "
1564 "for the receive descriptor ring\n");
581d708e 1565 goto setup_rx_desc_die;
1da177e4 1566 } else {
2648345f 1567 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1568 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1569 }
1570 }
1571 memset(rxdr->desc, 0, rxdr->size);
1572
1573 rxdr->next_to_clean = 0;
1574 rxdr->next_to_use = 0;
1575
1576 return 0;
1577}
1578
581d708e
MC		 1579/**
1580 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1581 * (Descriptors) for all queues
1582 * @adapter: board private structure
1583 *
1584 * If this function returns with an error, then it's possible one or
1585 * more of the rings is populated (while the rest are not). It is the
1586 * callers duty to clean those orphaned rings.
1587 *
1588 * Return 0 on success, negative on failure
1589 **/
1590
1591int
1592e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1593{
1594 int i, err = 0;
1595
f56799ea 1596 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1597 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1598 if (err) {
1599 DPRINTK(PROBE, ERR,
1600 "Allocation for Rx Queue %u failed\n", i);
1601 break;
1602 }
1603 }
1604
1605 return err;
1606}
1607
1da177e4 1608/**
2648345f 1609 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1610 * @adapter: Board private structure
1611 **/
e4c811c9
MC		 1612#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1613 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1614static void
1615e1000_setup_rctl(struct e1000_adapter *adapter)
1616{
2d7edb92
MC		 1617 uint32_t rctl, rfctl;
1618 uint32_t psrctl = 0;
35ec56bb 1619#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1620 uint32_t pages = 0;
1621#endif
1da177e4
LT		 1622
1623 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1624
1625 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1626
1627 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1628 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1629 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1630
0fadb059
JK		 1631 if (adapter->hw.mac_type > e1000_82543)
1632 rctl |= E1000_RCTL_SECRC;
1633
1634 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1635 rctl |= E1000_RCTL_SBP;
1636 else
1637 rctl &= ~E1000_RCTL_SBP;
1638
2d7edb92
MC		 1639 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1640 rctl &= ~E1000_RCTL_LPE;
1641 else
1642 rctl |= E1000_RCTL_LPE;
1643
1da177e4 1644 /* Setup buffer sizes */
9e2feace
AK		 1645 rctl &= ~E1000_RCTL_SZ_4096;
1646 rctl |= E1000_RCTL_BSEX;
1647 switch (adapter->rx_buffer_len) {
1648 case E1000_RXBUFFER_256:
1649 rctl |= E1000_RCTL_SZ_256;
1650 rctl &= ~E1000_RCTL_BSEX;
1651 break;
1652 case E1000_RXBUFFER_512:
1653 rctl |= E1000_RCTL_SZ_512;
1654 rctl &= ~E1000_RCTL_BSEX;
1655 break;
1656 case E1000_RXBUFFER_1024:
1657 rctl |= E1000_RCTL_SZ_1024;
1658 rctl &= ~E1000_RCTL_BSEX;
1659 break;
a1415ee6
JK		 1660 case E1000_RXBUFFER_2048:
1661 default:
1662 rctl |= E1000_RCTL_SZ_2048;
1663 rctl &= ~E1000_RCTL_BSEX;
1664 break;
1665 case E1000_RXBUFFER_4096:
1666 rctl |= E1000_RCTL_SZ_4096;
1667 break;
1668 case E1000_RXBUFFER_8192:
1669 rctl |= E1000_RCTL_SZ_8192;
1670 break;
1671 case E1000_RXBUFFER_16384:
1672 rctl |= E1000_RCTL_SZ_16384;
1673 break;
2d7edb92
MC		 1674 }
1675
35ec56bb 1676#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1677 /* 82571 and greater support packet-split where the protocol
1678 * header is placed in skb->data and the packet data is
1679 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1680 * In the case of a non-split, skb->data is linearly filled,
1681 * followed by the page buffers. Therefore, skb->data is
1682 * sized to hold the largest protocol header.
1683 */
e4c811c9
MC		 1684 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1685 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1686 PAGE_SIZE <= 16384)
1687 adapter->rx_ps_pages = pages;
1688 else
1689 adapter->rx_ps_pages = 0;
2d7edb92 1690#endif
e4c811c9 1691 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1692 /* Configure extra packet-split registers */
1693 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1694 rfctl |= E1000_RFCTL_EXTEN;
1695 /* disable IPv6 packet split support */
1696 rfctl |= E1000_RFCTL_IPV6_DIS;
1697 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1698
1699 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
96838a40 1700
2d7edb92
MC		 1701 psrctl |= adapter->rx_ps_bsize0 >>
1702 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1703
1704 switch (adapter->rx_ps_pages) {
1705 case 3:
1706 psrctl |= PAGE_SIZE <<
1707 E1000_PSRCTL_BSIZE3_SHIFT;
1708 case 2:
1709 psrctl |= PAGE_SIZE <<
1710 E1000_PSRCTL_BSIZE2_SHIFT;
1711 case 1:
1712 psrctl |= PAGE_SIZE >>
1713 E1000_PSRCTL_BSIZE1_SHIFT;
1714 break;
1715 }
2d7edb92
MC		 1716
1717 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1718 }
1719
1720 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1721}
1722
1723/**
1724 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1725 * @adapter: board private structure
1726 *
1727 * Configure the Rx unit of the MAC after a reset.
1728 **/
1729
1730static void
1731e1000_configure_rx(struct e1000_adapter *adapter)
1732{
581d708e
MC		 1733 uint64_t rdba;
1734 struct e1000_hw *hw = &adapter->hw;
1735 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1736
e4c811c9 1737 if (adapter->rx_ps_pages) {
0f15a8fa 1738 /* this is a 32 byte descriptor */
581d708e 1739 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1740 sizeof(union e1000_rx_desc_packet_split);
1741 adapter->clean_rx = e1000_clean_rx_irq_ps;
1742 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1743 } else {
581d708e
MC		 1744 rdlen = adapter->rx_ring[0].count *
1745 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1746 adapter->clean_rx = e1000_clean_rx_irq;
1747 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1748 }
1da177e4
LT		 1749
1750 /* disable receives while setting up the descriptors */
581d708e
MC		 1751 rctl = E1000_READ_REG(hw, RCTL);
1752 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1753
1754 /* set the Receive Delay Timer Register */
581d708e 1755 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1756
581d708e
MC		 1757 if (hw->mac_type >= e1000_82540) {
1758 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1759 if (adapter->itr > 1)
581d708e 1760 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1761 1000000000 / (adapter->itr * 256));
1762 }
1763
2ae76d98 1764 if (hw->mac_type >= e1000_82571) {
2ae76d98 1765 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1766 /* Reset delay timers after every interrupt */
6fc7a7ec 1767 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1768#ifdef CONFIG_E1000_NAPI
1769 /* Auto-Mask interrupts upon ICR read. */
1770 ctrl_ext |= E1000_CTRL_EXT_IAME;
1771#endif
2ae76d98 1772 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1773 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1774 E1000_WRITE_FLUSH(hw);
1775 }
1776
581d708e
MC		 1777 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1778 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1779 switch (adapter->num_rx_queues) {
24025e4e
MC		 1780 case 1:
1781 default:
581d708e 1782 rdba = adapter->rx_ring[0].dma;
581d708e 1783 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1784 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1785 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1786 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1787 E1000_WRITE_REG(hw, RDH, 0);
581d708e
MC		 1788 adapter->rx_ring[0].rdh = E1000_RDH;
1789 adapter->rx_ring[0].rdt = E1000_RDT;
1790 break;
24025e4e
MC		 1791 }
1792
1da177e4 1793 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1794 if (hw->mac_type >= e1000_82543) {
1795 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1796 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1797 rxcsum |= E1000_RXCSUM_TUOFL;
1798
868d5309 1799 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1800 * Must be used in conjunction with packet-split. */
96838a40
JB		 1801 if ((hw->mac_type >= e1000_82571) &&
1802 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1803 rxcsum |= E1000_RXCSUM_IPPCSE;
1804 }
1805 } else {
1806 rxcsum &= ~E1000_RXCSUM_TUOFL;
1807 /* don't need to clear IPPCSE as it defaults to 0 */
1808 }
581d708e 1809 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1810 }
1811
581d708e
MC		 1812 if (hw->mac_type == e1000_82573)
1813 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1814
1da177e4 1815 /* Enable Receives */
581d708e 1816 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1817}
1818
1819/**
581d708e 1820 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1821 * @adapter: board private structure
581d708e 1822 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1823 *
1824 * Free all transmit software resources
1825 **/
1826
3ad2cc67 1827static void
581d708e
MC		 1828e1000_free_tx_resources(struct e1000_adapter *adapter,
1829 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1830{
1831 struct pci_dev *pdev = adapter->pdev;
1832
581d708e 1833 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1834
581d708e
MC		 1835 vfree(tx_ring->buffer_info);
1836 tx_ring->buffer_info = NULL;
1da177e4 1837
581d708e 1838 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1839
581d708e
MC		 1840 tx_ring->desc = NULL;
1841}
1842
1843/**
1844 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1845 * @adapter: board private structure
1846 *
1847 * Free all transmit software resources
1848 **/
1849
1850void
1851e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1852{
1853 int i;
1854
f56799ea 1855 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1856 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1857}
1858
e619d523 1859static void
1da177e4
LT		 1860e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1861 struct e1000_buffer *buffer_info)
1862{
96838a40 1863 if (buffer_info->dma) {
2648345f
MC		 1864 pci_unmap_page(adapter->pdev,
1865 buffer_info->dma,
1866 buffer_info->length,
1867 PCI_DMA_TODEVICE);
1da177e4 1868 }
8241e35e 1869 if (buffer_info->skb)
1da177e4 1870 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1871 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1872}
1873
1874/**
1875 * e1000_clean_tx_ring - Free Tx Buffers
1876 * @adapter: board private structure
581d708e 1877 * @tx_ring: ring to be cleaned
1da177e4
LT		 1878 **/
1879
1880static void
581d708e
MC		 1881e1000_clean_tx_ring(struct e1000_adapter *adapter,
1882 struct e1000_tx_ring *tx_ring)
1da177e4 1883{
1da177e4
LT		 1884 struct e1000_buffer *buffer_info;
1885 unsigned long size;
1886 unsigned int i;
1887
1888 /* Free all the Tx ring sk_buffs */
1889
96838a40 1890 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1891 buffer_info = &tx_ring->buffer_info[i];
1892 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1893 }
1894
1895 size = sizeof(struct e1000_buffer) * tx_ring->count;
1896 memset(tx_ring->buffer_info, 0, size);
1897
1898 /* Zero out the descriptor ring */
1899
1900 memset(tx_ring->desc, 0, tx_ring->size);
1901
1902 tx_ring->next_to_use = 0;
1903 tx_ring->next_to_clean = 0;
fd803241 1904 tx_ring->last_tx_tso = 0;
1da177e4 1905
581d708e
MC		 1906 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1907 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1908}
1909
1910/**
1911 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1912 * @adapter: board private structure
1913 **/
1914
1915static void
1916e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1917{
1918 int i;
1919
f56799ea 1920 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1921 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1922}
1923
1924/**
1925 * e1000_free_rx_resources - Free Rx Resources
1926 * @adapter: board private structure
581d708e 1927 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1928 *
1929 * Free all receive software resources
1930 **/
1931
3ad2cc67 1932static void
581d708e
MC		 1933e1000_free_rx_resources(struct e1000_adapter *adapter,
1934 struct e1000_rx_ring *rx_ring)
1da177e4 1935{
1da177e4
LT		 1936 struct pci_dev *pdev = adapter->pdev;
1937
581d708e 1938 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1939
1940 vfree(rx_ring->buffer_info);
1941 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1942 kfree(rx_ring->ps_page);
1943 rx_ring->ps_page = NULL;
1944 kfree(rx_ring->ps_page_dma);
1945 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1946
1947 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1948
1949 rx_ring->desc = NULL;
1950}
1951
1952/**
581d708e 1953 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1954 * @adapter: board private structure
581d708e
MC		 1955 *
1956 * Free all receive software resources
1957 **/
1958
1959void
1960e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1961{
1962 int i;
1963
f56799ea 1964 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1965 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1966}
1967
1968/**
1969 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1970 * @adapter: board private structure
1971 * @rx_ring: ring to free buffers from
1da177e4
LT		 1972 **/
1973
1974static void
581d708e
MC		 1975e1000_clean_rx_ring(struct e1000_adapter *adapter,
1976 struct e1000_rx_ring *rx_ring)
1da177e4 1977{
1da177e4 1978 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1979 struct e1000_ps_page *ps_page;
1980 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1981 struct pci_dev *pdev = adapter->pdev;
1982 unsigned long size;
2d7edb92 1983 unsigned int i, j;
1da177e4
LT		 1984
1985 /* Free all the Rx ring sk_buffs */
96838a40 1986 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1987 buffer_info = &rx_ring->buffer_info[i];
96838a40 1988 if (buffer_info->skb) {
1da177e4
LT		 1989 pci_unmap_single(pdev,
1990 buffer_info->dma,
1991 buffer_info->length,
1992 PCI_DMA_FROMDEVICE);
1993
1994 dev_kfree_skb(buffer_info->skb);
1995 buffer_info->skb = NULL;
997f5cbd
JK		 1996 }
1997 ps_page = &rx_ring->ps_page[i];
1998 ps_page_dma = &rx_ring->ps_page_dma[i];
1999 for (j = 0; j < adapter->rx_ps_pages; j++) {
2000 if (!ps_page->ps_page[j]) break;
2001 pci_unmap_page(pdev,
2002 ps_page_dma->ps_page_dma[j],
2003 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2004 ps_page_dma->ps_page_dma[j] = 0;
2005 put_page(ps_page->ps_page[j]);
2006 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2007 }
2008 }
2009
2010 size = sizeof(struct e1000_buffer) * rx_ring->count;
2011 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2012 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2013 memset(rx_ring->ps_page, 0, size);
2014 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2015 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2016
2017 /* Zero out the descriptor ring */
2018
2019 memset(rx_ring->desc, 0, rx_ring->size);
2020
2021 rx_ring->next_to_clean = 0;
2022 rx_ring->next_to_use = 0;
2023
581d708e
MC		 2024 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2025 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2026}
2027
2028/**
2029 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2030 * @adapter: board private structure
2031 **/
2032
2033static void
2034e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2035{
2036 int i;
2037
f56799ea 2038 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2039 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2040}
2041
2042/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2043 * and memory write and invalidate disabled for certain operations
2044 */
2045static void
2046e1000_enter_82542_rst(struct e1000_adapter *adapter)
2047{
2048 struct net_device *netdev = adapter->netdev;
2049 uint32_t rctl;
2050
2051 e1000_pci_clear_mwi(&adapter->hw);
2052
2053 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2054 rctl |= E1000_RCTL_RST;
2055 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2056 E1000_WRITE_FLUSH(&adapter->hw);
2057 mdelay(5);
2058
96838a40 2059 if (netif_running(netdev))
581d708e 2060 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2061}
2062
2063static void
2064e1000_leave_82542_rst(struct e1000_adapter *adapter)
2065{
2066 struct net_device *netdev = adapter->netdev;
2067 uint32_t rctl;
2068
2069 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2070 rctl &= ~E1000_RCTL_RST;
2071 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2072 E1000_WRITE_FLUSH(&adapter->hw);
2073 mdelay(5);
2074
96838a40 2075 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2076 e1000_pci_set_mwi(&adapter->hw);
2077
96838a40 2078 if (netif_running(netdev)) {
72d64a43
JK		 2079 /* No need to loop, because 82542 supports only 1 queue */
2080 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2081 e1000_configure_rx(adapter);
72d64a43 2082 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2083 }
2084}
2085
2086/**
2087 * e1000_set_mac - Change the Ethernet Address of the NIC
2088 * @netdev: network interface device structure
2089 * @p: pointer to an address structure
2090 *
2091 * Returns 0 on success, negative on failure
2092 **/
2093
2094static int
2095e1000_set_mac(struct net_device *netdev, void *p)
2096{
60490fe0 2097 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2098 struct sockaddr *addr = p;
2099
96838a40 2100 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2101 return -EADDRNOTAVAIL;
2102
2103 /* 82542 2.0 needs to be in reset to write receive address registers */
2104
96838a40 2105 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2106 e1000_enter_82542_rst(adapter);
2107
2108 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2109 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2110
2111 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2112
868d5309
MC		 2113 /* With 82571 controllers, LAA may be overwritten (with the default)
2114 * due to controller reset from the other port. */
2115 if (adapter->hw.mac_type == e1000_82571) {
2116 /* activate the work around */
2117 adapter->hw.laa_is_present = 1;
2118
96838a40
JB		 2119 /* Hold a copy of the LAA in RAR[14] This is done so that
2120 * between the time RAR[0] gets clobbered and the time it
2121 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2122 * of the RARs and no incoming packets directed to this port
96838a40 2123 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2124 * RAR[14] */
96838a40 2125 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2126 E1000_RAR_ENTRIES - 1);
2127 }
2128
96838a40 2129 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2130 e1000_leave_82542_rst(adapter);
2131
2132 return 0;
2133}
2134
2135/**
2136 * e1000_set_multi - Multicast and Promiscuous mode set
2137 * @netdev: network interface device structure
2138 *
2139 * The set_multi entry point is called whenever the multicast address
2140 * list or the network interface flags are updated. This routine is
2141 * responsible for configuring the hardware for proper multicast,
2142 * promiscuous mode, and all-multi behavior.
2143 **/
2144
2145static void
2146e1000_set_multi(struct net_device *netdev)
2147{
60490fe0 2148 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2149 struct e1000_hw *hw = &adapter->hw;
2150 struct dev_mc_list *mc_ptr;
2151 uint32_t rctl;
2152 uint32_t hash_value;
868d5309 2153 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2154
868d5309
MC		 2155 /* reserve RAR[14] for LAA over-write work-around */
2156 if (adapter->hw.mac_type == e1000_82571)
2157 rar_entries--;
1da177e4 2158
2648345f
MC		 2159 /* Check for Promiscuous and All Multicast modes */
2160
1da177e4
LT		 2161 rctl = E1000_READ_REG(hw, RCTL);
2162
96838a40 2163 if (netdev->flags & IFF_PROMISC) {
1da177e4 2164 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2165 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2166 rctl |= E1000_RCTL_MPE;
2167 rctl &= ~E1000_RCTL_UPE;
2168 } else {
2169 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2170 }
2171
2172 E1000_WRITE_REG(hw, RCTL, rctl);
2173
2174 /* 82542 2.0 needs to be in reset to write receive address registers */
2175
96838a40 2176 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2177 e1000_enter_82542_rst(adapter);
2178
2179 /* load the first 14 multicast address into the exact filters 1-14
2180 * RAR 0 is used for the station MAC adddress
2181 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2182 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2183 */
2184 mc_ptr = netdev->mc_list;
2185
96838a40 2186 for (i = 1; i < rar_entries; i++) {
868d5309 2187 if (mc_ptr) {
1da177e4
LT		 2188 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2189 mc_ptr = mc_ptr->next;
2190 } else {
2191 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2192 E1000_WRITE_FLUSH(hw);
1da177e4 2193 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2194 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2195 }
2196 }
2197
2198 /* clear the old settings from the multicast hash table */
2199
4ca213a6 2200 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++) {
1da177e4 2201 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2202 E1000_WRITE_FLUSH(hw);
2203 }
1da177e4
LT		 2204
2205 /* load any remaining addresses into the hash table */
2206
96838a40 2207 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2208 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2209 e1000_mta_set(hw, hash_value);
2210 }
2211
96838a40 2212 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2213 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2214}
2215
2216/* Need to wait a few seconds after link up to get diagnostic information from
2217 * the phy */
2218
2219static void
2220e1000_update_phy_info(unsigned long data)
2221{
2222 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2223 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2224}
2225
2226/**
2227 * e1000_82547_tx_fifo_stall - Timer Call-back
2228 * @data: pointer to adapter cast into an unsigned long
2229 **/
2230
2231static void
2232e1000_82547_tx_fifo_stall(unsigned long data)
2233{
2234 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2235 struct net_device *netdev = adapter->netdev;
2236 uint32_t tctl;
2237
96838a40
JB		 2238 if (atomic_read(&adapter->tx_fifo_stall)) {
2239 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2240 E1000_READ_REG(&adapter->hw, TDH)) &&
2241 (E1000_READ_REG(&adapter->hw, TDFT) ==
2242 E1000_READ_REG(&adapter->hw, TDFH)) &&
2243 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2244 E1000_READ_REG(&adapter->hw, TDFHS))) {
2245 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2246 E1000_WRITE_REG(&adapter->hw, TCTL,
2247 tctl & ~E1000_TCTL_EN);
2248 E1000_WRITE_REG(&adapter->hw, TDFT,
2249 adapter->tx_head_addr);
2250 E1000_WRITE_REG(&adapter->hw, TDFH,
2251 adapter->tx_head_addr);
2252 E1000_WRITE_REG(&adapter->hw, TDFTS,
2253 adapter->tx_head_addr);
2254 E1000_WRITE_REG(&adapter->hw, TDFHS,
2255 adapter->tx_head_addr);
2256 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2257 E1000_WRITE_FLUSH(&adapter->hw);
2258
2259 adapter->tx_fifo_head = 0;
2260 atomic_set(&adapter->tx_fifo_stall, 0);
2261 netif_wake_queue(netdev);
2262 } else {
2263 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2264 }
2265 }
2266}
2267
2268/**
2269 * e1000_watchdog - Timer Call-back
2270 * @data: pointer to adapter cast into an unsigned long
2271 **/
2272static void
2273e1000_watchdog(unsigned long data)
2274{
2275 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2276 struct net_device *netdev = adapter->netdev;
545c67c0 2277 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2278 uint32_t link, tctl;
1da177e4
LT		 2279
2280 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2281 if (adapter->hw.mac_type == e1000_82573) {
2282 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2283 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2284 e1000_update_mng_vlan(adapter);
96838a40 2285 }
1da177e4 2286
96838a40 2287 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2288 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2289 link = !adapter->hw.serdes_link_down;
2290 else
2291 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2292
96838a40
JB		 2293 if (link) {
2294 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2295 boolean_t txb2b = 1;
1da177e4
LT		 2296 e1000_get_speed_and_duplex(&adapter->hw,
2297 &adapter->link_speed,
2298 &adapter->link_duplex);
2299
2300 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2301 adapter->link_speed,
2302 adapter->link_duplex == FULL_DUPLEX ?
2303 "Full Duplex" : "Half Duplex");
2304
7e6c9861
JK		 2305 /* tweak tx_queue_len according to speed/duplex
2306 * and adjust the timeout factor */
66a2b0a3
JK		 2307 netdev->tx_queue_len = adapter->tx_queue_len;
2308 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2309 switch (adapter->link_speed) {
2310 case SPEED_10:
fe7fe28e 2311 txb2b = 0;
7e6c9861
JK		 2312 netdev->tx_queue_len = 10;
2313 adapter->tx_timeout_factor = 8;
2314 break;
2315 case SPEED_100:
fe7fe28e 2316 txb2b = 0;
7e6c9861
JK		 2317 netdev->tx_queue_len = 100;
2318 /* maybe add some timeout factor ? */
2319 break;
2320 }
2321
fe7fe28e 2322 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2323 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2324 txb2b == 0) {
7e6c9861
JK		 2325#define SPEED_MODE_BIT (1 << 21)
2326 uint32_t tarc0;
2327 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2328 tarc0 &= ~SPEED_MODE_BIT;
2329 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2330 }
2331
2332#ifdef NETIF_F_TSO
2333 /* disable TSO for pcie and 10/100 speeds, to avoid
2334 * some hardware issues */
2335 if (!adapter->tso_force &&
2336 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2337 switch (adapter->link_speed) {
2338 case SPEED_10:
66a2b0a3 2339 case SPEED_100:
7e6c9861
JK		 2340 DPRINTK(PROBE,INFO,
2341 "10/100 speed: disabling TSO\n");
2342 netdev->features &= ~NETIF_F_TSO;
2343 break;
2344 case SPEED_1000:
2345 netdev->features |= NETIF_F_TSO;
2346 break;
2347 default:
2348 /* oops */
66a2b0a3
JK		 2349 break;
2350 }
2351 }
7e6c9861
JK		 2352#endif
2353
2354 /* enable transmits in the hardware, need to do this
2355 * after setting TARC0 */
2356 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2357 tctl |= E1000_TCTL_EN;
2358 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2359
1da177e4
LT		 2360 netif_carrier_on(netdev);
2361 netif_wake_queue(netdev);
2362 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2363 adapter->smartspeed = 0;
2364 }
2365 } else {
96838a40 2366 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2367 adapter->link_speed = 0;
2368 adapter->link_duplex = 0;
2369 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2370 netif_carrier_off(netdev);
2371 netif_stop_queue(netdev);
2372 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2373
2374 /* 80003ES2LAN workaround--
2375 * For packet buffer work-around on link down event;
2376 * disable receives in the ISR and
2377 * reset device here in the watchdog
2378 */
2379 if (adapter->hw.mac_type == e1000_80003es2lan) {
2380 /* reset device */
2381 schedule_work(&adapter->reset_task);
2382 }
1da177e4
LT		 2383 }
2384
2385 e1000_smartspeed(adapter);
2386 }
2387
2388 e1000_update_stats(adapter);
2389
2390 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2391 adapter->tpt_old = adapter->stats.tpt;
2392 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2393 adapter->colc_old = adapter->stats.colc;
2394
2395 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2396 adapter->gorcl_old = adapter->stats.gorcl;
2397 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2398 adapter->gotcl_old = adapter->stats.gotcl;
2399
2400 e1000_update_adaptive(&adapter->hw);
2401
f56799ea 2402 if (!netif_carrier_ok(netdev)) {
581d708e 2403 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2404 /* We've lost link, so the controller stops DMA,
2405 * but we've got queued Tx work that's never going
2406 * to get done, so reset controller to flush Tx.
2407 * (Do the reset outside of interrupt context). */
87041639
JK		 2408 adapter->tx_timeout_count++;
2409 schedule_work(&adapter->reset_task);
1da177e4
LT		 2410 }
2411 }
2412
2413 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2414 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2415 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2416 * asymmetrical Tx or Rx gets ITR=8000; everyone
2417 * else is between 2000-8000. */
2418 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2419 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2420 adapter->gotcl - adapter->gorcl :
2421 adapter->gorcl - adapter->gotcl) / 10000;
2422 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2423 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2424 }
2425
2426 /* Cause software interrupt to ensure rx ring is cleaned */
2427 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2428
2648345f 2429 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2430 adapter->detect_tx_hung = TRUE;
2431
96838a40 2432 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2433 * reset from the other port. Set the appropriate LAA in RAR[0] */
2434 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2435 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2436
1da177e4
LT		 2437 /* Reset the timer */
2438 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2439}
2440
2441#define E1000_TX_FLAGS_CSUM 0x00000001
2442#define E1000_TX_FLAGS_VLAN 0x00000002
2443#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2444#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2445#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2446#define E1000_TX_FLAGS_VLAN_SHIFT 16
2447
e619d523 2448static int
581d708e
MC		 2449e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2450 struct sk_buff *skb)
1da177e4
LT		 2451{
2452#ifdef NETIF_F_TSO
2453 struct e1000_context_desc *context_desc;
545c67c0 2454 struct e1000_buffer *buffer_info;
1da177e4
LT		 2455 unsigned int i;
2456 uint32_t cmd_length = 0;
2d7edb92 2457 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2458 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2459 int err;
2460
96838a40 2461 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2462 if (skb_header_cloned(skb)) {
2463 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2464 if (err)
2465 return err;
2466 }
2467
2468 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2469 mss = skb_shinfo(skb)->tso_size;
60828236 2470 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2471 skb->nh.iph->tot_len = 0;
2472 skb->nh.iph->check = 0;
2473 skb->h.th->check =
2474 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2475 skb->nh.iph->daddr,
2476 0,
2477 IPPROTO_TCP,
2478 0);
2479 cmd_length = E1000_TXD_CMD_IP;
2480 ipcse = skb->h.raw - skb->data - 1;
2481#ifdef NETIF_F_TSO_IPV6
96838a40 2482 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2483 skb->nh.ipv6h->payload_len = 0;
2484 skb->h.th->check =
2485 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2486 &skb->nh.ipv6h->daddr,
2487 0,
2488 IPPROTO_TCP,
2489 0);
2490 ipcse = 0;
2491#endif
2492 }
1da177e4
LT		 2493 ipcss = skb->nh.raw - skb->data;
2494 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2495 tucss = skb->h.raw - skb->data;
2496 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2497 tucse = 0;
2498
2499 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2500 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2501
581d708e
MC		 2502 i = tx_ring->next_to_use;
2503 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2504 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2505
2506 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2507 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2508 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2509 context_desc->upper_setup.tcp_fields.tucss = tucss;
2510 context_desc->upper_setup.tcp_fields.tucso = tucso;
2511 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2512 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2513 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2514 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2515
545c67c0
JK		 2516 buffer_info->time_stamp = jiffies;
2517
581d708e
MC		 2518 if (++i == tx_ring->count) i = 0;
2519 tx_ring->next_to_use = i;
1da177e4 2520
8241e35e 2521 return TRUE;
1da177e4
LT		 2522 }
2523#endif
2524
8241e35e 2525 return FALSE;
1da177e4
LT		 2526}
2527
e619d523 2528static boolean_t
581d708e
MC		 2529e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2530 struct sk_buff *skb)
1da177e4
LT		 2531{
2532 struct e1000_context_desc *context_desc;
545c67c0 2533 struct e1000_buffer *buffer_info;
1da177e4
LT		 2534 unsigned int i;
2535 uint8_t css;
2536
96838a40 2537 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2538 css = skb->h.raw - skb->data;
2539
581d708e 2540 i = tx_ring->next_to_use;
545c67c0 2541 buffer_info = &tx_ring->buffer_info[i];
581d708e 2542 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2543
2544 context_desc->upper_setup.tcp_fields.tucss = css;
2545 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2546 context_desc->upper_setup.tcp_fields.tucse = 0;
2547 context_desc->tcp_seg_setup.data = 0;
2548 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2549
545c67c0
JK		 2550 buffer_info->time_stamp = jiffies;
2551
581d708e
MC		 2552 if (unlikely(++i == tx_ring->count)) i = 0;
2553 tx_ring->next_to_use = i;
1da177e4
LT		 2554
2555 return TRUE;
2556 }
2557
2558 return FALSE;
2559}
2560
2561#define E1000_MAX_TXD_PWR 12
2562#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2563
e619d523 2564static int
581d708e
MC		 2565e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2566 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2567 unsigned int nr_frags, unsigned int mss)
1da177e4 2568{
1da177e4
LT		 2569 struct e1000_buffer *buffer_info;
2570 unsigned int len = skb->len;
2571 unsigned int offset = 0, size, count = 0, i;
2572 unsigned int f;
2573 len -= skb->data_len;
2574
2575 i = tx_ring->next_to_use;
2576
96838a40 2577 while (len) {
1da177e4
LT		 2578 buffer_info = &tx_ring->buffer_info[i];
2579 size = min(len, max_per_txd);
2580#ifdef NETIF_F_TSO
fd803241
JK		 2581 /* Workaround for Controller erratum --
2582 * descriptor for non-tso packet in a linear SKB that follows a
2583 * tso gets written back prematurely before the data is fully
0f15a8fa 2584 * DMA'd to the controller */
fd803241 2585 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2586 !skb_shinfo(skb)->tso_size) {
fd803241
JK		 2587 tx_ring->last_tx_tso = 0;
2588 size -= 4;
2589 }
2590
1da177e4
LT		 2591 /* Workaround for premature desc write-backs
2592 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2593 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2594 size -= 4;
2595#endif
97338bde
MC		 2596 /* work-around for errata 10 and it applies
2597 * to all controllers in PCI-X mode
2598 * The fix is to make sure that the first descriptor of a
2599 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2600 */
96838a40 2601 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2602 (size > 2015) && count == 0))
2603 size = 2015;
96838a40 2604
1da177e4
LT		 2605 /* Workaround for potential 82544 hang in PCI-X. Avoid
2606 * terminating buffers within evenly-aligned dwords. */
96838a40 2607 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2608 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2609 size > 4))
2610 size -= 4;
2611
2612 buffer_info->length = size;
2613 buffer_info->dma =
2614 pci_map_single(adapter->pdev,
2615 skb->data + offset,
2616 size,
2617 PCI_DMA_TODEVICE);
2618 buffer_info->time_stamp = jiffies;
2619
2620 len -= size;
2621 offset += size;
2622 count++;
96838a40 2623 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2624 }
2625
96838a40 2626 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2627 struct skb_frag_struct *frag;
2628
2629 frag = &skb_shinfo(skb)->frags[f];
2630 len = frag->size;
2631 offset = frag->page_offset;
2632
96838a40 2633 while (len) {
1da177e4
LT		 2634 buffer_info = &tx_ring->buffer_info[i];
2635 size = min(len, max_per_txd);
2636#ifdef NETIF_F_TSO
2637 /* Workaround for premature desc write-backs
2638 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2639 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2640 size -= 4;
2641#endif
2642 /* Workaround for potential 82544 hang in PCI-X.
2643 * Avoid terminating buffers within evenly-aligned
2644 * dwords. */
96838a40 2645 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2646 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2647 size > 4))
2648 size -= 4;
2649
2650 buffer_info->length = size;
2651 buffer_info->dma =
2652 pci_map_page(adapter->pdev,
2653 frag->page,
2654 offset,
2655 size,
2656 PCI_DMA_TODEVICE);
2657 buffer_info->time_stamp = jiffies;
2658
2659 len -= size;
2660 offset += size;
2661 count++;
96838a40 2662 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2663 }
2664 }
2665
2666 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2667 tx_ring->buffer_info[i].skb = skb;
2668 tx_ring->buffer_info[first].next_to_watch = i;
2669
2670 return count;
2671}
2672
e619d523 2673static void
581d708e
MC		 2674e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2675 int tx_flags, int count)
1da177e4 2676{
1da177e4
LT		 2677 struct e1000_tx_desc *tx_desc = NULL;
2678 struct e1000_buffer *buffer_info;
2679 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2680 unsigned int i;
2681
96838a40 2682 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2683 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2684 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2685 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2686
96838a40 2687 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2688 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2689 }
2690
96838a40 2691 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2692 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2693 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2694 }
2695
96838a40 2696 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2697 txd_lower |= E1000_TXD_CMD_VLE;
2698 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2699 }
2700
2701 i = tx_ring->next_to_use;
2702
96838a40 2703 while (count--) {
1da177e4
LT		 2704 buffer_info = &tx_ring->buffer_info[i];
2705 tx_desc = E1000_TX_DESC(*tx_ring, i);
2706 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2707 tx_desc->lower.data =
2708 cpu_to_le32(txd_lower | buffer_info->length);
2709 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2710 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2711 }
2712
2713 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2714
2715 /* Force memory writes to complete before letting h/w
2716 * know there are new descriptors to fetch. (Only
2717 * applicable for weak-ordered memory model archs,
2718 * such as IA-64). */
2719 wmb();
2720
2721 tx_ring->next_to_use = i;
581d708e 2722 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2723}
2724
2725/**
2726 * 82547 workaround to avoid controller hang in half-duplex environment.
2727 * The workaround is to avoid queuing a large packet that would span
2728 * the internal Tx FIFO ring boundary by notifying the stack to resend
2729 * the packet at a later time. This gives the Tx FIFO an opportunity to
2730 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2731 * to the beginning of the Tx FIFO.
2732 **/
2733
2734#define E1000_FIFO_HDR 0x10
2735#define E1000_82547_PAD_LEN 0x3E0
2736
e619d523 2737static int
1da177e4
LT		 2738e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2739{
2740 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2741 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2742
2743 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2744
96838a40 2745 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2746 goto no_fifo_stall_required;
2747
96838a40 2748 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2749 return 1;
2750
96838a40 2751 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2752 atomic_set(&adapter->tx_fifo_stall, 1);
2753 return 1;
2754 }
2755
2756no_fifo_stall_required:
2757 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2758 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2759 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2760 return 0;
2761}
2762
2d7edb92 2763#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2764static int
2d7edb92
MC		 2765e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2766{
2767 struct e1000_hw *hw = &adapter->hw;
2768 uint16_t length, offset;
96838a40
JB		 2769 if (vlan_tx_tag_present(skb)) {
2770 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2771 ( adapter->hw.mng_cookie.status &
2772 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2773 return 0;
2774 }
20a44028 2775 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2776 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2777 if ((htons(ETH_P_IP) == eth->h_proto)) {
2778 const struct iphdr *ip =
2d7edb92 2779 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2780 if (IPPROTO_UDP == ip->protocol) {
2781 struct udphdr *udp =
2782 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2783 (ip->ihl << 2));
96838a40 2784 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2785 offset = (uint8_t *)udp + 8 - skb->data;
2786 length = skb->len - offset;
2787
2788 return e1000_mng_write_dhcp_info(hw,
96838a40 2789 (uint8_t *)udp + 8,
2d7edb92
MC		 2790 length);
2791 }
2792 }
2793 }
2794 }
2795 return 0;
2796}
2797
1da177e4
LT		 2798#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2799static int
2800e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2801{
60490fe0 2802 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2803 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2804 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2805 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2806 unsigned int tx_flags = 0;
2807 unsigned int len = skb->len;
2808 unsigned long flags;
2809 unsigned int nr_frags = 0;
2810 unsigned int mss = 0;
2811 int count = 0;
76c224bc 2812 int tso;
1da177e4
LT		 2813 unsigned int f;
2814 len -= skb->data_len;
2815
581d708e 2816 tx_ring = adapter->tx_ring;
24025e4e 2817
581d708e 2818 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2819 dev_kfree_skb_any(skb);
2820 return NETDEV_TX_OK;
2821 }
2822
2823#ifdef NETIF_F_TSO
2824 mss = skb_shinfo(skb)->tso_size;
76c224bc 2825 /* The controller does a simple calculation to
1da177e4
LT		 2826 * make sure there is enough room in the FIFO before
2827 * initiating the DMA for each buffer. The calc is:
2828 * 4 = ceil(buffer len/mss). To make sure we don't
2829 * overrun the FIFO, adjust the max buffer len if mss
2830 * drops. */
96838a40 2831 if (mss) {
9a3056da 2832 uint8_t hdr_len;
1da177e4
LT		 2833 max_per_txd = min(mss << 2, max_per_txd);
2834 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2835
9f687888 2836 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2837 * points to just header, pull a few bytes of payload from
2838 * frags into skb->data */
2839 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2840 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2841 switch (adapter->hw.mac_type) {
2842 unsigned int pull_size;
2843 case e1000_82571:
2844 case e1000_82572:
2845 case e1000_82573:
2846 pull_size = min((unsigned int)4, skb->data_len);
2847 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2848 DPRINTK(DRV, ERR,
9f687888
JK		 2849 "__pskb_pull_tail failed.\n");
2850 dev_kfree_skb_any(skb);
749dfc70 2851 return NETDEV_TX_OK;
9f687888
JK		 2852 }
2853 len = skb->len - skb->data_len;
2854 break;
2855 default:
2856 /* do nothing */
2857 break;
d74bbd3b 2858 }
9a3056da 2859 }
1da177e4
LT		 2860 }
2861
9a3056da 2862 /* reserve a descriptor for the offload context */
96838a40 2863 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2864 count++;
2648345f 2865 count++;
1da177e4 2866#else
96838a40 2867 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2868 count++;
2869#endif
fd803241
JK		 2870
2871#ifdef NETIF_F_TSO
2872 /* Controller Erratum workaround */
2873 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2874 !skb_shinfo(skb)->tso_size)
fd803241
JK		 2875 count++;
2876#endif
2877
1da177e4
LT		 2878 count += TXD_USE_COUNT(len, max_txd_pwr);
2879
96838a40 2880 if (adapter->pcix_82544)
1da177e4
LT		 2881 count++;
2882
96838a40 2883 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2884 * in PCI-X mode, so add one more descriptor to the count
2885 */
96838a40 2886 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2887 (len > 2015)))
2888 count++;
2889
1da177e4 2890 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2891 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2892 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2893 max_txd_pwr);
96838a40 2894 if (adapter->pcix_82544)
1da177e4
LT		 2895 count += nr_frags;
2896
0f15a8fa
JK		 2897
2898 if (adapter->hw.tx_pkt_filtering &&
2899 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 2900 e1000_transfer_dhcp_info(adapter, skb);
2901
581d708e
MC		 2902 local_irq_save(flags);
2903 if (!spin_trylock(&tx_ring->tx_lock)) {
2904 /* Collision - tell upper layer to requeue */
2905 local_irq_restore(flags);
2906 return NETDEV_TX_LOCKED;
2907 }
1da177e4
LT		 2908
2909 /* need: count + 2 desc gap to keep tail from touching
2910 * head, otherwise try next time */
581d708e 2911 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2912 netif_stop_queue(netdev);
581d708e 2913 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2914 return NETDEV_TX_BUSY;
2915 }
2916
96838a40
JB		 2917 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2918 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2919 netif_stop_queue(netdev);
2920 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2921 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2922 return NETDEV_TX_BUSY;
2923 }
2924 }
2925
96838a40 2926 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2927 tx_flags |= E1000_TX_FLAGS_VLAN;
2928 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2929 }
2930
581d708e 2931 first = tx_ring->next_to_use;
96838a40 2932
581d708e 2933 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2934 if (tso < 0) {
2935 dev_kfree_skb_any(skb);
581d708e 2936 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2937 return NETDEV_TX_OK;
2938 }
2939
fd803241
JK		 2940 if (likely(tso)) {
2941 tx_ring->last_tx_tso = 1;
1da177e4 2942 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 2943 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2944 tx_flags |= E1000_TX_FLAGS_CSUM;
2945
2d7edb92 2946 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2947 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2948 * no longer assume, we must. */
60828236 2949 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 2950 tx_flags |= E1000_TX_FLAGS_IPV4;
2951
581d708e
MC		 2952 e1000_tx_queue(adapter, tx_ring, tx_flags,
2953 e1000_tx_map(adapter, tx_ring, skb, first,
2954 max_per_txd, nr_frags, mss));
1da177e4
LT		 2955
2956 netdev->trans_start = jiffies;
2957
2958 /* Make sure there is space in the ring for the next send. */
581d708e 2959 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2960 netif_stop_queue(netdev);
2961
581d708e 2962 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2963 return NETDEV_TX_OK;
2964}
2965
2966/**
2967 * e1000_tx_timeout - Respond to a Tx Hang
2968 * @netdev: network interface device structure
2969 **/
2970
2971static void
2972e1000_tx_timeout(struct net_device *netdev)
2973{
60490fe0 2974 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2975
2976 /* Do the reset outside of interrupt context */
87041639
JK		 2977 adapter->tx_timeout_count++;
2978 schedule_work(&adapter->reset_task);
1da177e4
LT		 2979}
2980
2981static void
87041639 2982e1000_reset_task(struct net_device *netdev)
1da177e4 2983{
60490fe0 2984 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2985
2db10a08 2986 e1000_reinit_locked(adapter);
1da177e4
LT		 2987}
2988
2989/**
2990 * e1000_get_stats - Get System Network Statistics
2991 * @netdev: network interface device structure
2992 *
2993 * Returns the address of the device statistics structure.
2994 * The statistics are actually updated from the timer callback.
2995 **/
2996
2997static struct net_device_stats *
2998e1000_get_stats(struct net_device *netdev)
2999{
60490fe0 3000 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3001
6b7660cd 3002 /* only return the current stats */
1da177e4
LT		 3003 return &adapter->net_stats;
3004}
3005
3006/**
3007 * e1000_change_mtu - Change the Maximum Transfer Unit
3008 * @netdev: network interface device structure
3009 * @new_mtu: new value for maximum frame size
3010 *
3011 * Returns 0 on success, negative on failure
3012 **/
3013
3014static int
3015e1000_change_mtu(struct net_device *netdev, int new_mtu)
3016{
60490fe0 3017 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3018 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3019 uint16_t eeprom_data = 0;
1da177e4 3020
96838a40
JB		 3021 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3022 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3023 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3024 return -EINVAL;
2d7edb92 3025 }
1da177e4 3026
997f5cbd
JK		 3027 /* Adapter-specific max frame size limits. */
3028 switch (adapter->hw.mac_type) {
9e2feace 3029 case e1000_undefined ... e1000_82542_rev2_1:
997f5cbd
JK		 3030 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3031 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3032 return -EINVAL;
2d7edb92 3033 }
997f5cbd 3034 break;
85b22eb6
JK		 3035 case e1000_82573:
3036 /* only enable jumbo frames if ASPM is disabled completely
3037 * this means both bits must be zero in 0x1A bits 3:2 */
3038 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3039 &eeprom_data);
3040 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3041 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3042 DPRINTK(PROBE, ERR,
3043 "Jumbo Frames not supported.\n");
3044 return -EINVAL;
3045 }
3046 break;
3047 }
3048 /* fall through to get support */
997f5cbd
JK		 3049 case e1000_82571:
3050 case e1000_82572:
87041639 3051 case e1000_80003es2lan:
997f5cbd
JK		 3052#define MAX_STD_JUMBO_FRAME_SIZE 9234
3053 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3054 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3055 return -EINVAL;
3056 }
3057 break;
3058 default:
3059 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3060 break;
1da177e4
LT		 3061 }
3062
9e2feace
AK		 3063 /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3064 * means we reserve 2 more, this pushes us to allocate from the next
3065 * larger slab size
3066 * i.e. RXBUFFER_2048 --> size-4096 slab */
3067
3068 if (max_frame <= E1000_RXBUFFER_256)
3069 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3070 else if (max_frame <= E1000_RXBUFFER_512)
3071 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3072 else if (max_frame <= E1000_RXBUFFER_1024)
3073 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3074 else if (max_frame <= E1000_RXBUFFER_2048)
3075 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3076 else if (max_frame <= E1000_RXBUFFER_4096)
3077 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3078 else if (max_frame <= E1000_RXBUFFER_8192)
3079 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3080 else if (max_frame <= E1000_RXBUFFER_16384)
3081 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3082
3083 /* adjust allocation if LPE protects us, and we aren't using SBP */
3084#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
3085 if (!adapter->hw.tbi_compatibility_on &&
3086 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3087 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3088 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3089
2d7edb92
MC		 3090 netdev->mtu = new_mtu;
3091
2db10a08
AK		 3092 if (netif_running(netdev))
3093 e1000_reinit_locked(adapter);
1da177e4 3094
1da177e4
LT		 3095 adapter->hw.max_frame_size = max_frame;
3096
3097 return 0;
3098}
3099
3100/**
3101 * e1000_update_stats - Update the board statistics counters
3102 * @adapter: board private structure
3103 **/
3104
3105void
3106e1000_update_stats(struct e1000_adapter *adapter)
3107{
3108 struct e1000_hw *hw = &adapter->hw;
a487a8f7 3109 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3110 unsigned long flags;
3111 uint16_t phy_tmp;
3112
3113#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3114
a487a8f7
AK		 3115 /*
3116 * Prevent stats update while adapter is being reset, or if the pci
3117 * connection is down.
3118 */
9026729b 3119 if (adapter->link_speed == 0)
a487a8f7
AK		 3120 return;
3121 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3122 return;
3123
1da177e4
LT		 3124 spin_lock_irqsave(&adapter->stats_lock, flags);
3125
3126 /* these counters are modified from e1000_adjust_tbi_stats,
3127 * called from the interrupt context, so they must only
3128 * be written while holding adapter->stats_lock
3129 */
3130
3131 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3132 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3133 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3134 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3135 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3136 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3137 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3138 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3139 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3140 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3141 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3142 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3143 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3144
3145 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3146 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3147 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3148 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3149 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3150 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3151 adapter->stats.dc += E1000_READ_REG(hw, DC);
3152 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3153 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3154 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3155 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3156 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3157 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3158 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3159 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3160 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3161 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3162 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3163 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3164 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3165 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3166 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3167 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3168 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3169 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3170 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3171 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3172 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3173 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3174 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3175 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3176 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3177 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3178 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3179
3180 /* used for adaptive IFS */
3181
3182 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3183 adapter->stats.tpt += hw->tx_packet_delta;
3184 hw->collision_delta = E1000_READ_REG(hw, COLC);
3185 adapter->stats.colc += hw->collision_delta;
3186
96838a40 3187 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3188 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3189 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3190 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3191 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3192 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3193 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3194 }
96838a40 3195 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3196 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3197 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3198 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3199 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3200 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3201 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3202 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3203 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3204 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3205 }
1da177e4
LT		 3206
3207 /* Fill out the OS statistics structure */
3208
3209 adapter->net_stats.rx_packets = adapter->stats.gprc;
3210 adapter->net_stats.tx_packets = adapter->stats.gptc;
3211 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3212 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3213 adapter->net_stats.multicast = adapter->stats.mprc;
3214 adapter->net_stats.collisions = adapter->stats.colc;
3215
3216 /* Rx Errors */
3217
87041639
JK		 3218 /* RLEC on some newer hardware can be incorrect so build
3219 * our own version based on RUC and ROC */
1da177e4
LT		 3220 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3221 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3222 adapter->stats.ruc + adapter->stats.roc +
3223 adapter->stats.cexterr;
87041639
JK		 3224 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3225 adapter->stats.roc;
1da177e4
LT		 3226 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3227 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3228 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3229
3230 /* Tx Errors */
3231
3232 adapter->net_stats.tx_errors = adapter->stats.ecol +
3233 adapter->stats.latecol;
3234 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3235 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3236 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3237
3238 /* Tx Dropped needs to be maintained elsewhere */
3239
3240 /* Phy Stats */
3241
96838a40
JB		 3242 if (hw->media_type == e1000_media_type_copper) {
3243 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3244 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3245 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3246 adapter->phy_stats.idle_errors += phy_tmp;
3247 }
3248
96838a40 3249 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3250 (hw->phy_type == e1000_phy_m88) &&
3251 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3252 adapter->phy_stats.receive_errors += phy_tmp;
3253 }
3254
3255 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3256}
3257
3258/**
3259 * e1000_intr - Interrupt Handler
3260 * @irq: interrupt number
3261 * @data: pointer to a network interface device structure
3262 * @pt_regs: CPU registers structure
3263 **/
3264
3265static irqreturn_t
3266e1000_intr(int irq, void *data, struct pt_regs *regs)
3267{
3268 struct net_device *netdev = data;
60490fe0 3269 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3270 struct e1000_hw *hw = &adapter->hw;
87041639 3271 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3272#ifndef CONFIG_E1000_NAPI
581d708e 3273 int i;
1e613fd9
JK		 3274#else
3275 /* Interrupt Auto-Mask...upon reading ICR,
3276 * interrupts are masked. No need for the
3277 * IMC write, but it does mean we should
3278 * account for it ASAP. */
3279 if (likely(hw->mac_type >= e1000_82571))
3280 atomic_inc(&adapter->irq_sem);
be2b28ed 3281#endif
1da177e4 3282
1e613fd9
JK		 3283 if (unlikely(!icr)) {
3284#ifdef CONFIG_E1000_NAPI
3285 if (hw->mac_type >= e1000_82571)
3286 e1000_irq_enable(adapter);
3287#endif
1da177e4 3288 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3289 }
1da177e4 3290
96838a40 3291 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3292 hw->get_link_status = 1;
87041639
JK		 3293 /* 80003ES2LAN workaround--
3294 * For packet buffer work-around on link down event;
3295 * disable receives here in the ISR and
3296 * reset adapter in watchdog
3297 */
3298 if (netif_carrier_ok(netdev) &&
3299 (adapter->hw.mac_type == e1000_80003es2lan)) {
3300 /* disable receives */
3301 rctl = E1000_READ_REG(hw, RCTL);
3302 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3303 }
1da177e4
LT		 3304 mod_timer(&adapter->watchdog_timer, jiffies);
3305 }
3306
3307#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3308 if (unlikely(hw->mac_type < e1000_82571)) {
3309 atomic_inc(&adapter->irq_sem);
3310 E1000_WRITE_REG(hw, IMC, ~0);
3311 E1000_WRITE_FLUSH(hw);
3312 }
581d708e
MC		 3313 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3314 __netif_rx_schedule(&adapter->polling_netdev[0]);
3315 else
3316 e1000_irq_enable(adapter);
c1605eb3 3317#else
1da177e4 3318 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3319 * Due to Hub Link bus being occupied, an interrupt
3320 * de-assertion message is not able to be sent.
3321 * When an interrupt assertion message is generated later,
3322 * two messages are re-ordered and sent out.
3323 * That causes APIC to think 82547 is in de-assertion
3324 * state, while 82547 is in assertion state, resulting
3325 * in dead lock. Writing IMC forces 82547 into
3326 * de-assertion state.
3327 */
3328 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3329 atomic_inc(&adapter->irq_sem);
2648345f 3330 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3331 }
3332
96838a40
JB		 3333 for (i = 0; i < E1000_MAX_INTR; i++)
3334 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3335 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3336 break;
3337
96838a40 3338 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3339 e1000_irq_enable(adapter);
581d708e 3340
c1605eb3 3341#endif
1da177e4
LT		 3342
3343 return IRQ_HANDLED;
3344}
3345
3346#ifdef CONFIG_E1000_NAPI
3347/**
3348 * e1000_clean - NAPI Rx polling callback
3349 * @adapter: board private structure
3350 **/
3351
3352static int
581d708e 3353e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3354{
581d708e
MC		 3355 struct e1000_adapter *adapter;
3356 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3357 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3358
3359 /* Must NOT use netdev_priv macro here. */
3360 adapter = poll_dev->priv;
3361
3362 /* Keep link state information with original netdev */
3363 if (!netif_carrier_ok(adapter->netdev))
3364 goto quit_polling;
2648345f 3365
581d708e
MC		 3366 while (poll_dev != &adapter->polling_netdev[i]) {
3367 i++;
5d9428de 3368 BUG_ON(i == adapter->num_rx_queues);
581d708e
MC		 3369 }
3370
8241e35e
JK		 3371 if (likely(adapter->num_tx_queues == 1)) {
3372 /* e1000_clean is called per-cpu. This lock protects
3373 * tx_ring[0] from being cleaned by multiple cpus
3374 * simultaneously. A failure obtaining the lock means
3375 * tx_ring[0] is currently being cleaned anyway. */
3376 if (spin_trylock(&adapter->tx_queue_lock)) {
3377 tx_cleaned = e1000_clean_tx_irq(adapter,
3378 &adapter->tx_ring[0]);
3379 spin_unlock(&adapter->tx_queue_lock);
3380 }
3381 } else
3382 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3383
581d708e
MC		 3384 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3385 &work_done, work_to_do);
1da177e4
LT		 3386
3387 *budget -= work_done;
581d708e 3388 poll_dev->quota -= work_done;
96838a40 3389
2b02893e 3390 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3391 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3392 !netif_running(adapter->netdev)) {
3393quit_polling:
3394 netif_rx_complete(poll_dev);
1da177e4
LT		 3395 e1000_irq_enable(adapter);
3396 return 0;
3397 }
3398
3399 return 1;
3400}
3401
3402#endif
3403/**
3404 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3405 * @adapter: board private structure
3406 **/
3407
3408static boolean_t
581d708e
MC		 3409e1000_clean_tx_irq(struct e1000_adapter *adapter,
3410 struct e1000_tx_ring *tx_ring)
1da177e4 3411{
1da177e4
LT		 3412 struct net_device *netdev = adapter->netdev;
3413 struct e1000_tx_desc *tx_desc, *eop_desc;
3414 struct e1000_buffer *buffer_info;
3415 unsigned int i, eop;
2a1af5d7
JK		 3416#ifdef CONFIG_E1000_NAPI
3417 unsigned int count = 0;
3418#endif
1da177e4
LT		 3419 boolean_t cleaned = FALSE;
3420
3421 i = tx_ring->next_to_clean;
3422 eop = tx_ring->buffer_info[i].next_to_watch;
3423 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3424
581d708e 3425 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3426 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3427 tx_desc = E1000_TX_DESC(*tx_ring, i);
3428 buffer_info = &tx_ring->buffer_info[i];
3429 cleaned = (i == eop);
3430
fd803241 3431 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3432 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3433
96838a40 3434 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3435 }
581d708e 3436
7bfa4816 3437
1da177e4
LT		 3438 eop = tx_ring->buffer_info[i].next_to_watch;
3439 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3440#ifdef CONFIG_E1000_NAPI
3441#define E1000_TX_WEIGHT 64
3442 /* weight of a sort for tx, to avoid endless transmit cleanup */
3443 if (count++ == E1000_TX_WEIGHT) break;
3444#endif
1da177e4
LT		 3445 }
3446
3447 tx_ring->next_to_clean = i;
3448
77b2aad5 3449#define TX_WAKE_THRESHOLD 32
96838a40 3450 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
77b2aad5
AK		 3451 netif_carrier_ok(netdev))) {
3452 spin_lock(&tx_ring->tx_lock);
3453 if (netif_queue_stopped(netdev) &&
3454 (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
3455 netif_wake_queue(netdev);
3456 spin_unlock(&tx_ring->tx_lock);
3457 }
2648345f 3458
581d708e 3459 if (adapter->detect_tx_hung) {
2648345f 3460 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3461 * check with the clearing of time_stamp and movement of i */
3462 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3463 if (tx_ring->buffer_info[eop].dma &&
3464 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3465 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3466 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3467 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3468
3469 /* detected Tx unit hang */
c6963ef5 3470 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3471 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3472 " TDH <%x>\n"
3473 " TDT <%x>\n"
3474 " next_to_use <%x>\n"
3475 " next_to_clean <%x>\n"
3476 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3477 " time_stamp <%lx>\n"
3478 " next_to_watch <%x>\n"
3479 " jiffies <%lx>\n"
3480 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3481 (unsigned long)((tx_ring - adapter->tx_ring) /
3482 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3483 readl(adapter->hw.hw_addr + tx_ring->tdh),
3484 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3485 tx_ring->next_to_use,
392137fa
JK		 3486 tx_ring->next_to_clean,
3487 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3488 eop,
3489 jiffies,
3490 eop_desc->upper.fields.status);
1da177e4 3491 netif_stop_queue(netdev);
70b8f1e1 3492 }
1da177e4 3493 }
1da177e4
LT		 3494 return cleaned;
3495}
3496
3497/**
3498 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3499 * @adapter: board private structure
3500 * @status_err: receive descriptor status and error fields
3501 * @csum: receive descriptor csum field
3502 * @sk_buff: socket buffer with received data
1da177e4
LT		 3503 **/
3504
e619d523 3505static void
1da177e4 3506e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3507 uint32_t status_err, uint32_t csum,
3508 struct sk_buff *skb)
1da177e4 3509{
2d7edb92
MC		 3510 uint16_t status = (uint16_t)status_err;
3511 uint8_t errors = (uint8_t)(status_err >> 24);
3512 skb->ip_summed = CHECKSUM_NONE;
3513
1da177e4 3514 /* 82543 or newer only */
96838a40 3515 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3516 /* Ignore Checksum bit is set */
96838a40 3517 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3518 /* TCP/UDP checksum error bit is set */
96838a40 3519 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3520 /* let the stack verify checksum errors */
1da177e4 3521 adapter->hw_csum_err++;
2d7edb92
MC		 3522 return;
3523 }
3524 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3525 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3526 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3527 return;
1da177e4 3528 } else {
96838a40 3529 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3530 return;
3531 }
3532 /* It must be a TCP or UDP packet with a valid checksum */
3533 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3534 /* TCP checksum is good */
3535 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3536 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3537 /* IP fragment with UDP payload */
3538 /* Hardware complements the payload checksum, so we undo it
3539 * and then put the value in host order for further stack use.
3540 */
3541 csum = ntohl(csum ^ 0xFFFF);
3542 skb->csum = csum;
3543 skb->ip_summed = CHECKSUM_HW;
1da177e4 3544 }
2d7edb92 3545 adapter->hw_csum_good++;
1da177e4
LT		 3546}
3547
3548/**
2d7edb92 3549 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3550 * @adapter: board private structure
3551 **/
3552
3553static boolean_t
3554#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3555e1000_clean_rx_irq(struct e1000_adapter *adapter,
3556 struct e1000_rx_ring *rx_ring,
3557 int *work_done, int work_to_do)
1da177e4 3558#else
581d708e
MC		 3559e1000_clean_rx_irq(struct e1000_adapter *adapter,
3560 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3561#endif
3562{
1da177e4
LT		 3563 struct net_device *netdev = adapter->netdev;
3564 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3565 struct e1000_rx_desc *rx_desc, *next_rxd;
3566 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3567 unsigned long flags;
3568 uint32_t length;
3569 uint8_t last_byte;
3570 unsigned int i;
72d64a43 3571 int cleaned_count = 0;
a1415ee6 3572 boolean_t cleaned = FALSE;
1da177e4
LT		 3573
3574 i = rx_ring->next_to_clean;
3575 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3576 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3577
b92ff8ee 3578 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3579 struct sk_buff *skb;
a292ca6e 3580 u8 status;
1da177e4 3581#ifdef CONFIG_E1000_NAPI
96838a40 3582 if (*work_done >= work_to_do)
1da177e4
LT		 3583 break;
3584 (*work_done)++;
3585#endif
a292ca6e 3586 status = rx_desc->status;
b92ff8ee 3587 skb = buffer_info->skb;
86c3d59f
JB		 3588 buffer_info->skb = NULL;
3589
30320be8
JK		 3590 prefetch(skb->data - NET_IP_ALIGN);
3591
86c3d59f
JB		 3592 if (++i == rx_ring->count) i = 0;
3593 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3594 prefetch(next_rxd);
3595
86c3d59f 3596 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3597
72d64a43
JK		 3598 cleaned = TRUE;
3599 cleaned_count++;
a292ca6e
JK		 3600 pci_unmap_single(pdev,
3601 buffer_info->dma,
3602 buffer_info->length,
1da177e4
LT		 3603 PCI_DMA_FROMDEVICE);
3604
1da177e4
LT		 3605 length = le16_to_cpu(rx_desc->length);
3606
a1415ee6
JK		 3607 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3608 /* All receives must fit into a single buffer */
3609 E1000_DBG("%s: Receive packet consumed multiple"
3610 " buffers\n", netdev->name);
864c4e45
AK		 3611 /* recycle */
3612 buffer_info-> skb = skb;
1da177e4
LT		 3613 goto next_desc;
3614 }
3615
96838a40 3616 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3617 last_byte = *(skb->data + length - 1);
b92ff8ee 3618 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3619 rx_desc->errors, length, last_byte)) {
3620 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3621 e1000_tbi_adjust_stats(&adapter->hw,
3622 &adapter->stats,
1da177e4
LT		 3623 length, skb->data);
3624 spin_unlock_irqrestore(&adapter->stats_lock,
3625 flags);
3626 length--;
3627 } else {
9e2feace
AK		 3628 /* recycle */
3629 buffer_info->skb = skb;
1da177e4
LT		 3630 goto next_desc;
3631 }
1cb5821f 3632 }
1da177e4 3633
a292ca6e
JK		 3634 /* code added for copybreak, this should improve
3635 * performance for small packets with large amounts
3636 * of reassembly being done in the stack */
3637#define E1000_CB_LENGTH 256
a1415ee6 3638 if (length < E1000_CB_LENGTH) {
a292ca6e
JK		 3639 struct sk_buff *new_skb =
3640 dev_alloc_skb(length + NET_IP_ALIGN);
3641 if (new_skb) {
3642 skb_reserve(new_skb, NET_IP_ALIGN);
3643 new_skb->dev = netdev;
3644 memcpy(new_skb->data - NET_IP_ALIGN,
3645 skb->data - NET_IP_ALIGN,
3646 length + NET_IP_ALIGN);
3647 /* save the skb in buffer_info as good */
3648 buffer_info->skb = skb;
3649 skb = new_skb;
3650 skb_put(skb, length);
3651 }
a1415ee6
JK		 3652 } else
3653 skb_put(skb, length);
a292ca6e
JK		 3654
3655 /* end copybreak code */
1da177e4
LT		 3656
3657 /* Receive Checksum Offload */
a292ca6e
JK		 3658 e1000_rx_checksum(adapter,
3659 (uint32_t)(status) |
2d7edb92 3660 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3661 le16_to_cpu(rx_desc->csum), skb);
96838a40 3662
1da177e4
LT		 3663 skb->protocol = eth_type_trans(skb, netdev);
3664#ifdef CONFIG_E1000_NAPI
96838a40 3665 if (unlikely(adapter->vlgrp &&
a292ca6e 3666 (status & E1000_RXD_STAT_VP))) {
1da177e4 3667 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3668 le16_to_cpu(rx_desc->special) &
3669 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3670 } else {
3671 netif_receive_skb(skb);
3672 }
3673#else /* CONFIG_E1000_NAPI */
96838a40 3674 if (unlikely(adapter->vlgrp &&
b92ff8ee 3675 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3676 vlan_hwaccel_rx(skb, adapter->vlgrp,
3677 le16_to_cpu(rx_desc->special) &
3678 E1000_RXD_SPC_VLAN_MASK);
3679 } else {
3680 netif_rx(skb);
3681 }
3682#endif /* CONFIG_E1000_NAPI */
3683 netdev->last_rx = jiffies;
3684
3685next_desc:
3686 rx_desc->status = 0;
1da177e4 3687
72d64a43
JK		 3688 /* return some buffers to hardware, one at a time is too slow */
3689 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3690 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3691 cleaned_count = 0;
3692 }
3693
30320be8 3694 /* use prefetched values */
86c3d59f
JB		 3695 rx_desc = next_rxd;
3696 buffer_info = next_buffer;
1da177e4 3697 }
1da177e4 3698 rx_ring->next_to_clean = i;
72d64a43
JK		 3699
3700 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3701 if (cleaned_count)
3702 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3703
3704 return cleaned;
3705}
3706
3707/**
3708 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3709 * @adapter: board private structure
3710 **/
3711
3712static boolean_t
3713#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3714e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3715 struct e1000_rx_ring *rx_ring,
3716 int *work_done, int work_to_do)
2d7edb92 3717#else
581d708e
MC		 3718e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3719 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3720#endif
3721{
86c3d59f 3722 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3723 struct net_device *netdev = adapter->netdev;
3724 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3725 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3726 struct e1000_ps_page *ps_page;
3727 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3728 struct sk_buff *skb;
2d7edb92
MC		 3729 unsigned int i, j;
3730 uint32_t length, staterr;
72d64a43 3731 int cleaned_count = 0;
2d7edb92
MC		 3732 boolean_t cleaned = FALSE;
3733
3734 i = rx_ring->next_to_clean;
3735 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3736 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3737 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3738
96838a40 3739 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3740 ps_page = &rx_ring->ps_page[i];
3741 ps_page_dma = &rx_ring->ps_page_dma[i];
3742#ifdef CONFIG_E1000_NAPI
96838a40 3743 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3744 break;
3745 (*work_done)++;
3746#endif
86c3d59f
JB		 3747 skb = buffer_info->skb;
3748
30320be8
JK		 3749 /* in the packet split case this is header only */
3750 prefetch(skb->data - NET_IP_ALIGN);
3751
86c3d59f
JB		 3752 if (++i == rx_ring->count) i = 0;
3753 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3754 prefetch(next_rxd);
3755
86c3d59f 3756 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3757
2d7edb92 3758 cleaned = TRUE;
72d64a43 3759 cleaned_count++;
2d7edb92
MC		 3760 pci_unmap_single(pdev, buffer_info->dma,
3761 buffer_info->length,
3762 PCI_DMA_FROMDEVICE);
3763
96838a40 3764 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3765 E1000_DBG("%s: Packet Split buffers didn't pick up"
3766 " the full packet\n", netdev->name);
3767 dev_kfree_skb_irq(skb);
3768 goto next_desc;
3769 }
1da177e4 3770
96838a40 3771 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3772 dev_kfree_skb_irq(skb);
3773 goto next_desc;
3774 }
3775
3776 length = le16_to_cpu(rx_desc->wb.middle.length0);
3777
96838a40 3778 if (unlikely(!length)) {
2d7edb92
MC		 3779 E1000_DBG("%s: Last part of the packet spanning"
3780 " multiple descriptors\n", netdev->name);
3781 dev_kfree_skb_irq(skb);
3782 goto next_desc;
3783 }
3784
3785 /* Good Receive */
3786 skb_put(skb, length);
3787
dc7c6add
JK		 3788 {
3789 /* this looks ugly, but it seems compiler issues make it
3790 more efficient than reusing j */
3791 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3792
3793 /* page alloc/put takes too long and effects small packet
3794 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3795 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3796 u8 *vaddr;
76c224bc 3797 /* there is no documentation about how to call
dc7c6add
JK		 3798 * kmap_atomic, so we can't hold the mapping
3799 * very long */
3800 pci_dma_sync_single_for_cpu(pdev,
3801 ps_page_dma->ps_page_dma[0],
3802 PAGE_SIZE,
3803 PCI_DMA_FROMDEVICE);
3804 vaddr = kmap_atomic(ps_page->ps_page[0],
3805 KM_SKB_DATA_SOFTIRQ);
3806 memcpy(skb->tail, vaddr, l1);
3807 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3808 pci_dma_sync_single_for_device(pdev,
3809 ps_page_dma->ps_page_dma[0],
3810 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3811 skb_put(skb, l1);
3812 length += l1;
3813 goto copydone;
3814 } /* if */
3815 }
3816
96838a40 3817 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3818 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3819 break;
2d7edb92
MC		 3820 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3821 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3822 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3823 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3824 length);
2d7edb92 3825 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3826 skb->len += length;
3827 skb->data_len += length;
5d51b80f 3828 skb->truesize += length;
2d7edb92
MC		 3829 }
3830
dc7c6add 3831copydone:
2d7edb92 3832 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 3833 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 3834 skb->protocol = eth_type_trans(skb, netdev);
3835
96838a40 3836 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 3837 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 3838 adapter->rx_hdr_split++;
2d7edb92 3839#ifdef CONFIG_E1000_NAPI
96838a40 3840 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3841 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3842 le16_to_cpu(rx_desc->wb.middle.vlan) &
3843 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3844 } else {
3845 netif_receive_skb(skb);
3846 }
3847#else /* CONFIG_E1000_NAPI */
96838a40 3848 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3849 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3850 le16_to_cpu(rx_desc->wb.middle.vlan) &
3851 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3852 } else {
3853 netif_rx(skb);
3854 }
3855#endif /* CONFIG_E1000_NAPI */
3856 netdev->last_rx = jiffies;
3857
3858next_desc:
c3d7a3a4 3859 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 3860 buffer_info->skb = NULL;
2d7edb92 3861
72d64a43
JK		 3862 /* return some buffers to hardware, one at a time is too slow */
3863 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3864 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3865 cleaned_count = 0;
3866 }
3867
30320be8 3868 /* use prefetched values */
86c3d59f
JB		 3869 rx_desc = next_rxd;
3870 buffer_info = next_buffer;
3871
683a38f3 3872 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3873 }
3874 rx_ring->next_to_clean = i;
72d64a43
JK		 3875
3876 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3877 if (cleaned_count)
3878 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3879
3880 return cleaned;
3881}
3882
3883/**
2d7edb92 3884 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3885 * @adapter: address of board private structure
3886 **/
3887
3888static void
581d708e 3889e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3890 struct e1000_rx_ring *rx_ring,
a292ca6e 3891 int cleaned_count)
1da177e4 3892{
1da177e4
LT		 3893 struct net_device *netdev = adapter->netdev;
3894 struct pci_dev *pdev = adapter->pdev;
3895 struct e1000_rx_desc *rx_desc;
3896 struct e1000_buffer *buffer_info;
3897 struct sk_buff *skb;
2648345f
MC		 3898 unsigned int i;
3899 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3900
3901 i = rx_ring->next_to_use;
3902 buffer_info = &rx_ring->buffer_info[i];
3903
a292ca6e
JK		 3904 while (cleaned_count--) {
3905 if (!(skb = buffer_info->skb))
3906 skb = dev_alloc_skb(bufsz);
3907 else {
3908 skb_trim(skb, 0);
3909 goto map_skb;
3910 }
3911
96838a40 3912 if (unlikely(!skb)) {
1da177e4 3913 /* Better luck next round */
72d64a43 3914 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3915 break;
3916 }
3917
2648345f 3918 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3919 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3920 struct sk_buff *oldskb = skb;
2648345f
MC		 3921 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3922 "at %p\n", bufsz, skb->data);
3923 /* Try again, without freeing the previous */
1da177e4 3924 skb = dev_alloc_skb(bufsz);
2648345f 3925 /* Failed allocation, critical failure */
1da177e4
LT		 3926 if (!skb) {
3927 dev_kfree_skb(oldskb);
3928 break;
3929 }
2648345f 3930
1da177e4
LT		 3931 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3932 /* give up */
3933 dev_kfree_skb(skb);
3934 dev_kfree_skb(oldskb);
3935 break; /* while !buffer_info->skb */
3936 } else {
2648345f 3937 /* Use new allocation */
1da177e4
LT		 3938 dev_kfree_skb(oldskb);
3939 }
3940 }
1da177e4
LT		 3941 /* Make buffer alignment 2 beyond a 16 byte boundary
3942 * this will result in a 16 byte aligned IP header after
3943 * the 14 byte MAC header is removed
3944 */
3945 skb_reserve(skb, NET_IP_ALIGN);
3946
3947 skb->dev = netdev;
3948
3949 buffer_info->skb = skb;
3950 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 3951map_skb:
1da177e4
LT		 3952 buffer_info->dma = pci_map_single(pdev,
3953 skb->data,
3954 adapter->rx_buffer_len,
3955 PCI_DMA_FROMDEVICE);
3956
2648345f
MC		 3957 /* Fix for errata 23, can't cross 64kB boundary */
3958 if (!e1000_check_64k_bound(adapter,
3959 (void *)(unsigned long)buffer_info->dma,
3960 adapter->rx_buffer_len)) {
3961 DPRINTK(RX_ERR, ERR,
3962 "dma align check failed: %u bytes at %p\n",
3963 adapter->rx_buffer_len,
3964 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3965 dev_kfree_skb(skb);
3966 buffer_info->skb = NULL;
3967
2648345f 3968 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3969 adapter->rx_buffer_len,
3970 PCI_DMA_FROMDEVICE);
3971
3972 break; /* while !buffer_info->skb */
3973 }
1da177e4
LT		 3974 rx_desc = E1000_RX_DESC(*rx_ring, i);
3975 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3976
96838a40
JB		 3977 if (unlikely(++i == rx_ring->count))
3978 i = 0;
1da177e4
LT		 3979 buffer_info = &rx_ring->buffer_info[i];
3980 }
3981
b92ff8ee
JB		 3982 if (likely(rx_ring->next_to_use != i)) {
3983 rx_ring->next_to_use = i;
3984 if (unlikely(i-- == 0))
3985 i = (rx_ring->count - 1);
3986
3987 /* Force memory writes to complete before letting h/w
3988 * know there are new descriptors to fetch. (Only
3989 * applicable for weak-ordered memory model archs,
3990 * such as IA-64). */
3991 wmb();
3992 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3993 }
1da177e4
LT		 3994}
3995
2d7edb92
MC		 3996/**
3997 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3998 * @adapter: address of board private structure
3999 **/
4000
4001static void
581d708e 4002e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4003 struct e1000_rx_ring *rx_ring,
4004 int cleaned_count)
2d7edb92 4005{
2d7edb92
MC		 4006 struct net_device *netdev = adapter->netdev;
4007 struct pci_dev *pdev = adapter->pdev;
4008 union e1000_rx_desc_packet_split *rx_desc;
4009 struct e1000_buffer *buffer_info;
4010 struct e1000_ps_page *ps_page;
4011 struct e1000_ps_page_dma *ps_page_dma;
4012 struct sk_buff *skb;
4013 unsigned int i, j;
4014
4015 i = rx_ring->next_to_use;
4016 buffer_info = &rx_ring->buffer_info[i];
4017 ps_page = &rx_ring->ps_page[i];
4018 ps_page_dma = &rx_ring->ps_page_dma[i];
4019
72d64a43 4020 while (cleaned_count--) {
2d7edb92
MC		 4021 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4022
96838a40 4023 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4024 if (j < adapter->rx_ps_pages) {
4025 if (likely(!ps_page->ps_page[j])) {
4026 ps_page->ps_page[j] =
4027 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4028 if (unlikely(!ps_page->ps_page[j])) {
4029 adapter->alloc_rx_buff_failed++;
e4c811c9 4030 goto no_buffers;
b92ff8ee 4031 }
e4c811c9
MC		 4032 ps_page_dma->ps_page_dma[j] =
4033 pci_map_page(pdev,
4034 ps_page->ps_page[j],
4035 0, PAGE_SIZE,
4036 PCI_DMA_FROMDEVICE);
4037 }
4038 /* Refresh the desc even if buffer_addrs didn't
96838a40 4039 * change because each write-back erases
e4c811c9
MC		 4040 * this info.
4041 */
4042 rx_desc->read.buffer_addr[j+1] =
4043 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4044 } else
4045 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4046 }
4047
4048 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4049
b92ff8ee
JB		 4050 if (unlikely(!skb)) {
4051 adapter->alloc_rx_buff_failed++;
2d7edb92 4052 break;
b92ff8ee 4053 }
2d7edb92
MC		 4054
4055 /* Make buffer alignment 2 beyond a 16 byte boundary
4056 * this will result in a 16 byte aligned IP header after
4057 * the 14 byte MAC header is removed
4058 */
4059 skb_reserve(skb, NET_IP_ALIGN);
4060
4061 skb->dev = netdev;
4062
4063 buffer_info->skb = skb;
4064 buffer_info->length = adapter->rx_ps_bsize0;
4065 buffer_info->dma = pci_map_single(pdev, skb->data,
4066 adapter->rx_ps_bsize0,
4067 PCI_DMA_FROMDEVICE);
4068
4069 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4070
96838a40 4071 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4072 buffer_info = &rx_ring->buffer_info[i];
4073 ps_page = &rx_ring->ps_page[i];
4074 ps_page_dma = &rx_ring->ps_page_dma[i];
4075 }
4076
4077no_buffers:
b92ff8ee
JB		 4078 if (likely(rx_ring->next_to_use != i)) {
4079 rx_ring->next_to_use = i;
4080 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4081
4082 /* Force memory writes to complete before letting h/w
4083 * know there are new descriptors to fetch. (Only
4084 * applicable for weak-ordered memory model archs,
4085 * such as IA-64). */
4086 wmb();
4087 /* Hardware increments by 16 bytes, but packet split
4088 * descriptors are 32 bytes...so we increment tail
4089 * twice as much.
4090 */
4091 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4092 }
2d7edb92
MC		 4093}
4094
1da177e4
LT		 4095/**
4096 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4097 * @adapter:
4098 **/
4099
4100static void
4101e1000_smartspeed(struct e1000_adapter *adapter)
4102{
4103 uint16_t phy_status;
4104 uint16_t phy_ctrl;
4105
96838a40 4106 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4107 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4108 return;
4109
96838a40 4110 if (adapter->smartspeed == 0) {
1da177e4
LT		 4111 /* If Master/Slave config fault is asserted twice,
4112 * we assume back-to-back */
4113 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4114 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4115 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4116 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4117 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4118 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4119 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4120 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4121 phy_ctrl);
4122 adapter->smartspeed++;
96838a40 4123 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4124 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4125 &phy_ctrl)) {
4126 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4127 MII_CR_RESTART_AUTO_NEG);
4128 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4129 phy_ctrl);
4130 }
4131 }
4132 return;
96838a40 4133 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4134 /* If still no link, perhaps using 2/3 pair cable */
4135 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4136 phy_ctrl |= CR_1000T_MS_ENABLE;
4137 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4138 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4139 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4140 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4141 MII_CR_RESTART_AUTO_NEG);
4142 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4143 }
4144 }
4145 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4146 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4147 adapter->smartspeed = 0;
4148}
4149
4150/**
4151 * e1000_ioctl -
4152 * @netdev:
4153 * @ifreq:
4154 * @cmd:
4155 **/
4156
4157static int
4158e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4159{
4160 switch (cmd) {
4161 case SIOCGMIIPHY:
4162 case SIOCGMIIREG:
4163 case SIOCSMIIREG:
4164 return e1000_mii_ioctl(netdev, ifr, cmd);
4165 default:
4166 return -EOPNOTSUPP;
4167 }
4168}
4169
4170/**
4171 * e1000_mii_ioctl -
4172 * @netdev:
4173 * @ifreq:
4174 * @cmd:
4175 **/
4176
4177static int
4178e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4179{
60490fe0 4180 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4181 struct mii_ioctl_data *data = if_mii(ifr);
4182 int retval;
4183 uint16_t mii_reg;
4184 uint16_t spddplx;
97876fc6 4185 unsigned long flags;
1da177e4 4186
96838a40 4187 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4188 return -EOPNOTSUPP;
4189
4190 switch (cmd) {
4191 case SIOCGMIIPHY:
4192 data->phy_id = adapter->hw.phy_addr;
4193 break;
4194 case SIOCGMIIREG:
96838a40 4195 if (!capable(CAP_NET_ADMIN))
1da177e4 4196 return -EPERM;
97876fc6 4197 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4198 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4199 &data->val_out)) {
4200 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4201 return -EIO;
97876fc6
MC		 4202 }
4203 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4204 break;
4205 case SIOCSMIIREG:
96838a40 4206 if (!capable(CAP_NET_ADMIN))
1da177e4 4207 return -EPERM;
96838a40 4208 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4209 return -EFAULT;
4210 mii_reg = data->val_in;
97876fc6 4211 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4212 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4213 mii_reg)) {
4214 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4215 return -EIO;
97876fc6 4216 }
dc86d32a 4217 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4218 switch (data->reg_num) {
4219 case PHY_CTRL:
96838a40 4220 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4221 break;
96838a40 4222 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4223 adapter->hw.autoneg = 1;
4224 adapter->hw.autoneg_advertised = 0x2F;
4225 } else {
4226 if (mii_reg & 0x40)
4227 spddplx = SPEED_1000;
4228 else if (mii_reg & 0x2000)
4229 spddplx = SPEED_100;
4230 else
4231 spddplx = SPEED_10;
4232 spddplx += (mii_reg & 0x100)
cb764326
JK		 4233 ? DUPLEX_FULL :
4234 DUPLEX_HALF;
1da177e4
LT		 4235 retval = e1000_set_spd_dplx(adapter,
4236 spddplx);
96838a40 4237 if (retval) {
97876fc6 4238 spin_unlock_irqrestore(
96838a40 4239 &adapter->stats_lock,
97876fc6 4240 flags);
1da177e4 4241 return retval;
97876fc6 4242 }
1da177e4 4243 }
2db10a08
AK		 4244 if (netif_running(adapter->netdev))
4245 e1000_reinit_locked(adapter);
4246 else
1da177e4
LT		 4247 e1000_reset(adapter);
4248 break;
4249 case M88E1000_PHY_SPEC_CTRL:
4250 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4251 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4252 spin_unlock_irqrestore(
4253 &adapter->stats_lock, flags);
1da177e4 4254 return -EIO;
97876fc6 4255 }
1da177e4
LT		 4256 break;
4257 }
4258 } else {
4259 switch (data->reg_num) {
4260 case PHY_CTRL:
96838a40 4261 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4262 break;
2db10a08
AK		 4263 if (netif_running(adapter->netdev))
4264 e1000_reinit_locked(adapter);
4265 else
1da177e4
LT		 4266 e1000_reset(adapter);
4267 break;
4268 }
4269 }
97876fc6 4270 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4271 break;
4272 default:
4273 return -EOPNOTSUPP;
4274 }
4275 return E1000_SUCCESS;
4276}
4277
4278void
4279e1000_pci_set_mwi(struct e1000_hw *hw)
4280{
4281 struct e1000_adapter *adapter = hw->back;
2648345f 4282 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4283
96838a40 4284 if (ret_val)
2648345f 4285 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4286}
4287
4288void
4289e1000_pci_clear_mwi(struct e1000_hw *hw)
4290{
4291 struct e1000_adapter *adapter = hw->back;
4292
4293 pci_clear_mwi(adapter->pdev);
4294}
4295
4296void
4297e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4298{
4299 struct e1000_adapter *adapter = hw->back;
4300
4301 pci_read_config_word(adapter->pdev, reg, value);
4302}
4303
4304void
4305e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4306{
4307 struct e1000_adapter *adapter = hw->back;
4308
4309 pci_write_config_word(adapter->pdev, reg, *value);
4310}
4311
4312uint32_t
4313e1000_io_read(struct e1000_hw *hw, unsigned long port)
4314{
4315 return inl(port);
4316}
4317
4318void
4319e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4320{
4321 outl(value, port);
4322}
4323
4324static void
4325e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4326{
60490fe0 4327 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4328 uint32_t ctrl, rctl;
4329
4330 e1000_irq_disable(adapter);
4331 adapter->vlgrp = grp;
4332
96838a40 4333 if (grp) {
1da177e4
LT		 4334 /* enable VLAN tag insert/strip */
4335 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4336 ctrl |= E1000_CTRL_VME;
4337 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4338
4339 /* enable VLAN receive filtering */
4340 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4341 rctl |= E1000_RCTL_VFE;
4342 rctl &= ~E1000_RCTL_CFIEN;
4343 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4344 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4345 } else {
4346 /* disable VLAN tag insert/strip */
4347 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4348 ctrl &= ~E1000_CTRL_VME;
4349 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4350
4351 /* disable VLAN filtering */
4352 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4353 rctl &= ~E1000_RCTL_VFE;
4354 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4355 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4356 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4357 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4358 }
1da177e4
LT		 4359 }
4360
4361 e1000_irq_enable(adapter);
4362}
4363
4364static void
4365e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4366{
60490fe0 4367 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4368 uint32_t vfta, index;
96838a40
JB		 4369
4370 if ((adapter->hw.mng_cookie.status &
4371 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4372 (vid == adapter->mng_vlan_id))
2d7edb92 4373 return;
1da177e4
LT		 4374 /* add VID to filter table */
4375 index = (vid >> 5) & 0x7F;
4376 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4377 vfta |= (1 << (vid & 0x1F));
4378 e1000_write_vfta(&adapter->hw, index, vfta);
4379}
4380
4381static void
4382e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4383{
60490fe0 4384 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4385 uint32_t vfta, index;
4386
4387 e1000_irq_disable(adapter);
4388
96838a40 4389 if (adapter->vlgrp)
1da177e4
LT		 4390 adapter->vlgrp->vlan_devices[vid] = NULL;
4391
4392 e1000_irq_enable(adapter);
4393
96838a40
JB		 4394 if ((adapter->hw.mng_cookie.status &
4395 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4396 (vid == adapter->mng_vlan_id)) {
4397 /* release control to f/w */
4398 e1000_release_hw_control(adapter);
2d7edb92 4399 return;
ff147013
JK		 4400 }
4401
1da177e4
LT		 4402 /* remove VID from filter table */
4403 index = (vid >> 5) & 0x7F;
4404 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4405 vfta &= ~(1 << (vid & 0x1F));
4406 e1000_write_vfta(&adapter->hw, index, vfta);
4407}
4408
4409static void
4410e1000_restore_vlan(struct e1000_adapter *adapter)
4411{
4412 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4413
96838a40 4414 if (adapter->vlgrp) {
1da177e4 4415 uint16_t vid;
96838a40
JB		 4416 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4417 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4418 continue;
4419 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4420 }
4421 }
4422}
4423
4424int
4425e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4426{
4427 adapter->hw.autoneg = 0;
4428
6921368f 4429 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4430 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4431 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4432 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4433 return -EINVAL;
4434 }
4435
96838a40 4436 switch (spddplx) {
1da177e4
LT		 4437 case SPEED_10 + DUPLEX_HALF:
4438 adapter->hw.forced_speed_duplex = e1000_10_half;
4439 break;
4440 case SPEED_10 + DUPLEX_FULL:
4441 adapter->hw.forced_speed_duplex = e1000_10_full;
4442 break;
4443 case SPEED_100 + DUPLEX_HALF:
4444 adapter->hw.forced_speed_duplex = e1000_100_half;
4445 break;
4446 case SPEED_100 + DUPLEX_FULL:
4447 adapter->hw.forced_speed_duplex = e1000_100_full;
4448 break;
4449 case SPEED_1000 + DUPLEX_FULL:
4450 adapter->hw.autoneg = 1;
4451 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4452 break;
4453 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4454 default:
2648345f 4455 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4456 return -EINVAL;
4457 }
4458 return 0;
4459}
4460
b6a1d5f8 4461#ifdef CONFIG_PM
0f15a8fa
JK		 4462/* Save/restore 16 or 64 dwords of PCI config space depending on which
4463 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4464 */
4465#define PCIE_CONFIG_SPACE_LEN 256
4466#define PCI_CONFIG_SPACE_LEN 64
4467static int
4468e1000_pci_save_state(struct e1000_adapter *adapter)
4469{
4470 struct pci_dev *dev = adapter->pdev;
4471 int size;
4472 int i;
0f15a8fa 4473
2f82665f
JB		 4474 if (adapter->hw.mac_type >= e1000_82571)
4475 size = PCIE_CONFIG_SPACE_LEN;
4476 else
4477 size = PCI_CONFIG_SPACE_LEN;
4478
4479 WARN_ON(adapter->config_space != NULL);
4480
4481 adapter->config_space = kmalloc(size, GFP_KERNEL);
4482 if (!adapter->config_space) {
4483 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4484 return -ENOMEM;
4485 }
4486 for (i = 0; i < (size / 4); i++)
4487 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4488 return 0;
4489}
4490
4491static void
4492e1000_pci_restore_state(struct e1000_adapter *adapter)
4493{
4494 struct pci_dev *dev = adapter->pdev;
4495 int size;
4496 int i;
0f15a8fa 4497
2f82665f
JB		 4498 if (adapter->config_space == NULL)
4499 return;
0f15a8fa 4500
2f82665f
JB		 4501 if (adapter->hw.mac_type >= e1000_82571)
4502 size = PCIE_CONFIG_SPACE_LEN;
4503 else
4504 size = PCI_CONFIG_SPACE_LEN;
4505 for (i = 0; i < (size / 4); i++)
4506 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4507 kfree(adapter->config_space);
4508 adapter->config_space = NULL;
4509 return;
4510}
4511#endif /* CONFIG_PM */
4512
1da177e4 4513static int
829ca9a3 4514e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4515{
4516 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4517 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4518 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4519 uint32_t wufc = adapter->wol;
6fdfef16 4520#ifdef CONFIG_PM
240b1710 4521 int retval = 0;
6fdfef16 4522#endif
1da177e4
LT		 4523
4524 netif_device_detach(netdev);
4525
2db10a08
AK		 4526 if (netif_running(netdev)) {
4527 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4528 e1000_down(adapter);
2db10a08 4529 }
1da177e4 4530
2f82665f 4531#ifdef CONFIG_PM
0f15a8fa
JK		 4532 /* Implement our own version of pci_save_state(pdev) because pci-
4533 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4534 retval = e1000_pci_save_state(adapter);
4535 if (retval)
4536 return retval;
4537#endif
4538
1da177e4 4539 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4540 if (status & E1000_STATUS_LU)
1da177e4
LT		 4541 wufc &= ~E1000_WUFC_LNKC;
4542
96838a40 4543 if (wufc) {
1da177e4
LT		 4544 e1000_setup_rctl(adapter);
4545 e1000_set_multi(netdev);
4546
4547 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4548 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4549 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4550 rctl |= E1000_RCTL_MPE;
4551 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4552 }
4553
96838a40 4554 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4555 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4556 /* advertise wake from D3Cold */
4557 #define E1000_CTRL_ADVD3WUC 0x00100000
4558 /* phy power management enable */
4559 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4560 ctrl |= E1000_CTRL_ADVD3WUC |
4561 E1000_CTRL_EN_PHY_PWR_MGMT;
4562 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4563 }
4564
96838a40 4565 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4566 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4567 /* keep the laser running in D3 */
4568 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4569 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4570 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4571 }
4572
2d7edb92
MC		 4573 /* Allow time for pending master requests to run */
4574 e1000_disable_pciex_master(&adapter->hw);
4575
1da177e4
LT		 4576 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4577 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4578 pci_enable_wake(pdev, PCI_D3hot, 1);
4579 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4580 } else {
4581 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4582 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4583 pci_enable_wake(pdev, PCI_D3hot, 0);
4584 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4585 }
4586
96838a40 4587 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4588 adapter->hw.media_type == e1000_media_type_copper) {
4589 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4590 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4591 manc |= E1000_MANC_ARP_EN;
4592 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4593 pci_enable_wake(pdev, PCI_D3hot, 1);
4594 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4595 }
4596 }
4597
b55ccb35
JK		 4598 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4599 * would have already happened in close and is redundant. */
4600 e1000_release_hw_control(adapter);
2d7edb92 4601
1da177e4 4602 pci_disable_device(pdev);
240b1710 4603
d0e027db 4604 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4605
4606 return 0;
4607}
4608
2f82665f 4609#ifdef CONFIG_PM
1da177e4
LT		 4610static int
4611e1000_resume(struct pci_dev *pdev)
4612{
4613 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4614 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4615 uint32_t manc, ret_val;
1da177e4 4616
d0e027db 4617 pci_set_power_state(pdev, PCI_D0);
2f82665f 4618 e1000_pci_restore_state(adapter);
2b02893e 4619 ret_val = pci_enable_device(pdev);
a4cb847d 4620 pci_set_master(pdev);
1da177e4 4621
d0e027db
AK		 4622 pci_enable_wake(pdev, PCI_D3hot, 0);
4623 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4624
4625 e1000_reset(adapter);
4626 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4627
96838a40 4628 if (netif_running(netdev))
1da177e4
LT		 4629 e1000_up(adapter);
4630
4631 netif_device_attach(netdev);
4632
96838a40 4633 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4634 adapter->hw.media_type == e1000_media_type_copper) {
4635 manc = E1000_READ_REG(&adapter->hw, MANC);
4636 manc &= ~(E1000_MANC_ARP_EN);
4637 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4638 }
4639
b55ccb35
JK		 4640 /* If the controller is 82573 and f/w is AMT, do not set
4641 * DRV_LOAD until the interface is up. For all other cases,
4642 * let the f/w know that the h/w is now under the control
4643 * of the driver. */
4644 if (adapter->hw.mac_type != e1000_82573 ||
4645 !e1000_check_mng_mode(&adapter->hw))
4646 e1000_get_hw_control(adapter);
2d7edb92 4647
1da177e4
LT		 4648 return 0;
4649}
4650#endif
c653e635
AK		 4651
4652static void e1000_shutdown(struct pci_dev *pdev)
4653{
4654 e1000_suspend(pdev, PMSG_SUSPEND);
4655}
4656
1da177e4
LT		 4657#ifdef CONFIG_NET_POLL_CONTROLLER
4658/*
4659 * Polling 'interrupt' - used by things like netconsole to send skbs
4660 * without having to re-enable interrupts. It's not called while
4661 * the interrupt routine is executing.
4662 */
4663static void
2648345f 4664e1000_netpoll(struct net_device *netdev)
1da177e4 4665{
60490fe0 4666 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4667 disable_irq(adapter->pdev->irq);
4668 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4669 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4670#ifndef CONFIG_E1000_NAPI
4671 adapter->clean_rx(adapter, adapter->rx_ring);
4672#endif
1da177e4
LT		 4673 enable_irq(adapter->pdev->irq);
4674}
4675#endif
4676
9026729b
AK		 4677/**
4678 * e1000_io_error_detected - called when PCI error is detected
4679 * @pdev: Pointer to PCI device
4680 * @state: The current pci conneection state
4681 *
4682 * This function is called after a PCI bus error affecting
4683 * this device has been detected.
4684 */
4685static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4686{
4687 struct net_device *netdev = pci_get_drvdata(pdev);
4688 struct e1000_adapter *adapter = netdev->priv;
4689
4690 netif_device_detach(netdev);
4691
4692 if (netif_running(netdev))
4693 e1000_down(adapter);
4694
4695 /* Request a slot slot reset. */
4696 return PCI_ERS_RESULT_NEED_RESET;
4697}
4698
4699/**
4700 * e1000_io_slot_reset - called after the pci bus has been reset.
4701 * @pdev: Pointer to PCI device
4702 *
4703 * Restart the card from scratch, as if from a cold-boot. Implementation
4704 * resembles the first-half of the e1000_resume routine.
4705 */
4706static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4707{
4708 struct net_device *netdev = pci_get_drvdata(pdev);
4709 struct e1000_adapter *adapter = netdev->priv;
4710
4711 if (pci_enable_device(pdev)) {
4712 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4713 return PCI_ERS_RESULT_DISCONNECT;
4714 }
4715 pci_set_master(pdev);
4716
4717 pci_enable_wake(pdev, 3, 0);
4718 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4719
4720 /* Perform card reset only on one instance of the card */
4721 if (PCI_FUNC (pdev->devfn) != 0)
4722 return PCI_ERS_RESULT_RECOVERED;
4723
4724 e1000_reset(adapter);
4725 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4726
4727 return PCI_ERS_RESULT_RECOVERED;
4728}
4729
4730/**
4731 * e1000_io_resume - called when traffic can start flowing again.
4732 * @pdev: Pointer to PCI device
4733 *
4734 * This callback is called when the error recovery driver tells us that
4735 * its OK to resume normal operation. Implementation resembles the
4736 * second-half of the e1000_resume routine.
4737 */
4738static void e1000_io_resume(struct pci_dev *pdev)
4739{
4740 struct net_device *netdev = pci_get_drvdata(pdev);
4741 struct e1000_adapter *adapter = netdev->priv;
4742 uint32_t manc, swsm;
4743
4744 if (netif_running(netdev)) {
4745 if (e1000_up(adapter)) {
4746 printk("e1000: can't bring device back up after reset\n");
4747 return;
4748 }
4749 }
4750
4751 netif_device_attach(netdev);
4752
4753 if (adapter->hw.mac_type >= e1000_82540 &&
4754 adapter->hw.media_type == e1000_media_type_copper) {
4755 manc = E1000_READ_REG(&adapter->hw, MANC);
4756 manc &= ~(E1000_MANC_ARP_EN);
4757 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4758 }
4759
4760 switch (adapter->hw.mac_type) {
4761 case e1000_82573:
4762 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4763 E1000_WRITE_REG(&adapter->hw, SWSM,
4764 swsm | E1000_SWSM_DRV_LOAD);
4765 break;
4766 default:
4767 break;
4768 }
4769
4770 if (netif_running(netdev))
4771 mod_timer(&adapter->watchdog_timer, jiffies);
4772}
4773
1da177e4 4774/* e1000_main.c */
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