]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blame - drivers/net/e1000/e1000_main.c
projects / mirror_ubuntu-hirsute-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
e1000: reduce RAR entries available for ICH8
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
1da177e4 31char e1000_driver_name[] = "e1000";
3ad2cc67 32static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 33#ifndef CONFIG_E1000_NAPI
34#define DRIVERNAPI
35#else
36#define DRIVERNAPI "-NAPI"
37#endif
7cc33234 38#define DRV_VERSION "7.2.7-k2"DRIVERNAPI
1da177e4 39char e1000_driver_version[] = DRV_VERSION;
3d41e30a 40static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
1da177e4
LT		 106 /* required last entry */
107 {0,}
108};
109
110MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
111
35574764
NN		 112int e1000_up(struct e1000_adapter *adapter);
113void e1000_down(struct e1000_adapter *adapter);
114void e1000_reinit_locked(struct e1000_adapter *adapter);
115void e1000_reset(struct e1000_adapter *adapter);
116int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
117int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
118int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
119void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
120void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 121static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 122 struct e1000_tx_ring *txdr);
3ad2cc67 123static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 124 struct e1000_rx_ring *rxdr);
3ad2cc67 125static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 126 struct e1000_tx_ring *tx_ring);
3ad2cc67 127static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 128 struct e1000_rx_ring *rx_ring);
129void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 130
131static int e1000_init_module(void);
132static void e1000_exit_module(void);
133static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
134static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 135static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 136static int e1000_sw_init(struct e1000_adapter *adapter);
137static int e1000_open(struct net_device *netdev);
138static int e1000_close(struct net_device *netdev);
139static void e1000_configure_tx(struct e1000_adapter *adapter);
140static void e1000_configure_rx(struct e1000_adapter *adapter);
141static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 142static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
143static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
144static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
145 struct e1000_tx_ring *tx_ring);
146static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 148static void e1000_set_multi(struct net_device *netdev);
149static void e1000_update_phy_info(unsigned long data);
150static void e1000_watchdog(unsigned long data);
1da177e4
LT		 151static void e1000_82547_tx_fifo_stall(unsigned long data);
152static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155static int e1000_set_mac(struct net_device *netdev, void *p);
156static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 157static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
1da177e4 159#ifdef CONFIG_E1000_NAPI
581d708e 160static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 161static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 162 struct e1000_rx_ring *rx_ring,
1da177e4 163 int *work_done, int work_to_do);
2d7edb92 164static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 165 struct e1000_rx_ring *rx_ring,
2d7edb92 166 int *work_done, int work_to_do);
1da177e4 167#else
581d708e
MC		 168static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
1da177e4 172#endif
581d708e 173static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 174 struct e1000_rx_ring *rx_ring,
175 int cleaned_count);
581d708e 176static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
1da177e4
LT		 179static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
180static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
181 int cmd);
35574764 182void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 183static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
184static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
185static void e1000_tx_timeout(struct net_device *dev);
87041639 186static void e1000_reset_task(struct net_device *dev);
1da177e4 187static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 188static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
189 struct sk_buff *skb);
1da177e4
LT		 190
191static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
192static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
193static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
194static void e1000_restore_vlan(struct e1000_adapter *adapter);
195
977e74b5 196static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 197#ifdef CONFIG_PM
1da177e4
LT		 198static int e1000_resume(struct pci_dev *pdev);
199#endif
c653e635 200static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 201
202#ifdef CONFIG_NET_POLL_CONTROLLER
203/* for netdump / net console */
204static void e1000_netpoll (struct net_device *netdev);
205#endif
206
35574764
NN		 207extern void e1000_check_options(struct e1000_adapter *adapter);
208
9026729b
AK		 209static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
210 pci_channel_state_t state);
211static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
212static void e1000_io_resume(struct pci_dev *pdev);
213
214static struct pci_error_handlers e1000_err_handler = {
215 .error_detected = e1000_io_error_detected,
216 .slot_reset = e1000_io_slot_reset,
217 .resume = e1000_io_resume,
218};
24025e4e 219
1da177e4
LT		 220static struct pci_driver e1000_driver = {
221 .name = e1000_driver_name,
222 .id_table = e1000_pci_tbl,
223 .probe = e1000_probe,
224 .remove = __devexit_p(e1000_remove),
c4e24f01 225#ifdef CONFIG_PM
1da177e4 226 /* Power Managment Hooks */
1da177e4 227 .suspend = e1000_suspend,
c653e635 228 .resume = e1000_resume,
1da177e4 229#endif
9026729b
AK		 230 .shutdown = e1000_shutdown,
231 .err_handler = &e1000_err_handler
1da177e4
LT		 232};
233
234MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
235MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
236MODULE_LICENSE("GPL");
237MODULE_VERSION(DRV_VERSION);
238
239static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
240module_param(debug, int, 0);
241MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
242
243/**
244 * e1000_init_module - Driver Registration Routine
245 *
246 * e1000_init_module is the first routine called when the driver is
247 * loaded. All it does is register with the PCI subsystem.
248 **/
249
250static int __init
251e1000_init_module(void)
252{
253 int ret;
254 printk(KERN_INFO "%s - version %s\n",
255 e1000_driver_string, e1000_driver_version);
256
257 printk(KERN_INFO "%s\n", e1000_copyright);
258
29917620 259 ret = pci_register_driver(&e1000_driver);
8b378def 260
1da177e4
LT		 261 return ret;
262}
263
264module_init(e1000_init_module);
265
266/**
267 * e1000_exit_module - Driver Exit Cleanup Routine
268 *
269 * e1000_exit_module is called just before the driver is removed
270 * from memory.
271 **/
272
273static void __exit
274e1000_exit_module(void)
275{
1da177e4
LT		 276 pci_unregister_driver(&e1000_driver);
277}
278
279module_exit(e1000_exit_module);
280
2db10a08
AK		 281static int e1000_request_irq(struct e1000_adapter *adapter)
282{
283 struct net_device *netdev = adapter->netdev;
284 int flags, err = 0;
285
c0bc8721 286 flags = IRQF_SHARED;
2db10a08
AK		 287#ifdef CONFIG_PCI_MSI
288 if (adapter->hw.mac_type > e1000_82547_rev_2) {
289 adapter->have_msi = TRUE;
290 if ((err = pci_enable_msi(adapter->pdev))) {
291 DPRINTK(PROBE, ERR,
292 "Unable to allocate MSI interrupt Error: %d\n", err);
293 adapter->have_msi = FALSE;
294 }
295 }
296 if (adapter->have_msi)
61ef5c00 297 flags &= ~IRQF_SHARED;
2db10a08
AK		 298#endif
299 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
300 netdev->name, netdev)))
301 DPRINTK(PROBE, ERR,
302 "Unable to allocate interrupt Error: %d\n", err);
303
304 return err;
305}
306
307static void e1000_free_irq(struct e1000_adapter *adapter)
308{
309 struct net_device *netdev = adapter->netdev;
310
311 free_irq(adapter->pdev->irq, netdev);
312
313#ifdef CONFIG_PCI_MSI
314 if (adapter->have_msi)
315 pci_disable_msi(adapter->pdev);
316#endif
317}
318
1da177e4
LT		 319/**
320 * e1000_irq_disable - Mask off interrupt generation on the NIC
321 * @adapter: board private structure
322 **/
323
e619d523 324static void
1da177e4
LT		 325e1000_irq_disable(struct e1000_adapter *adapter)
326{
327 atomic_inc(&adapter->irq_sem);
328 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
329 E1000_WRITE_FLUSH(&adapter->hw);
330 synchronize_irq(adapter->pdev->irq);
331}
332
333/**
334 * e1000_irq_enable - Enable default interrupt generation settings
335 * @adapter: board private structure
336 **/
337
e619d523 338static void
1da177e4
LT		 339e1000_irq_enable(struct e1000_adapter *adapter)
340{
96838a40 341 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 342 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
343 E1000_WRITE_FLUSH(&adapter->hw);
344 }
345}
3ad2cc67
AB		 346
347static void
2d7edb92
MC		 348e1000_update_mng_vlan(struct e1000_adapter *adapter)
349{
350 struct net_device *netdev = adapter->netdev;
351 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
352 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 353 if (adapter->vlgrp) {
354 if (!adapter->vlgrp->vlan_devices[vid]) {
355 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 356 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
357 e1000_vlan_rx_add_vid(netdev, vid);
358 adapter->mng_vlan_id = vid;
359 } else
360 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 361
362 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
363 (vid != old_vid) &&
2d7edb92
MC		 364 !adapter->vlgrp->vlan_devices[old_vid])
365 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 366 } else
367 adapter->mng_vlan_id = vid;
2d7edb92
MC		 368 }
369}
b55ccb35
JK		 370
371/**
372 * e1000_release_hw_control - release control of the h/w to f/w
373 * @adapter: address of board private structure
374 *
375 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
376 * For ASF and Pass Through versions of f/w this means that the
377 * driver is no longer loaded. For AMT version (only with 82573) i
378 * of the f/w this means that the netowrk i/f is closed.
76c224bc 379 *
b55ccb35
JK		 380 **/
381
e619d523 382static void
b55ccb35
JK		 383e1000_release_hw_control(struct e1000_adapter *adapter)
384{
385 uint32_t ctrl_ext;
386 uint32_t swsm;
cd94dd0b 387 uint32_t extcnf;
b55ccb35
JK		 388
389 /* Let firmware taken over control of h/w */
390 switch (adapter->hw.mac_type) {
391 case e1000_82571:
392 case e1000_82572:
4cc15f54 393 case e1000_80003es2lan:
b55ccb35
JK		 394 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
395 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
396 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
397 break;
398 case e1000_82573:
399 swsm = E1000_READ_REG(&adapter->hw, SWSM);
400 E1000_WRITE_REG(&adapter->hw, SWSM,
401 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 402 case e1000_ich8lan:
403 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
404 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
405 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
406 break;
b55ccb35
JK		 407 default:
408 break;
409 }
410}
411
412/**
413 * e1000_get_hw_control - get control of the h/w from f/w
414 * @adapter: address of board private structure
415 *
416 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 417 * For ASF and Pass Through versions of f/w this means that
418 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 419 * of the f/w this means that the netowrk i/f is open.
76c224bc 420 *
b55ccb35
JK		 421 **/
422
e619d523 423static void
b55ccb35
JK		 424e1000_get_hw_control(struct e1000_adapter *adapter)
425{
426 uint32_t ctrl_ext;
427 uint32_t swsm;
cd94dd0b 428 uint32_t extcnf;
b55ccb35
JK		 429 /* Let firmware know the driver has taken over */
430 switch (adapter->hw.mac_type) {
431 case e1000_82571:
432 case e1000_82572:
4cc15f54 433 case e1000_80003es2lan:
b55ccb35
JK		 434 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
435 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
436 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
437 break;
438 case e1000_82573:
439 swsm = E1000_READ_REG(&adapter->hw, SWSM);
440 E1000_WRITE_REG(&adapter->hw, SWSM,
441 swsm | E1000_SWSM_DRV_LOAD);
442 break;
cd94dd0b
AK		 443 case e1000_ich8lan:
444 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
445 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
446 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
447 break;
b55ccb35
JK		 448 default:
449 break;
450 }
451}
452
1da177e4
LT		 453int
454e1000_up(struct e1000_adapter *adapter)
455{
456 struct net_device *netdev = adapter->netdev;
2db10a08 457 int i;
1da177e4
LT		 458
459 /* hardware has been reset, we need to reload some things */
460
1da177e4
LT		 461 e1000_set_multi(netdev);
462
463 e1000_restore_vlan(adapter);
464
465 e1000_configure_tx(adapter);
466 e1000_setup_rctl(adapter);
467 e1000_configure_rx(adapter);
72d64a43
JK		 468 /* call E1000_DESC_UNUSED which always leaves
469 * at least 1 descriptor unused to make sure
470 * next_to_use != next_to_clean */
f56799ea 471 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 472 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 473 adapter->alloc_rx_buf(adapter, ring,
474 E1000_DESC_UNUSED(ring));
f56799ea 475 }
1da177e4 476
7bfa4816
JK		 477 adapter->tx_queue_len = netdev->tx_queue_len;
478
1da177e4 479 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 480
481#ifdef CONFIG_E1000_NAPI
482 netif_poll_enable(netdev);
483#endif
5de55624
MC		 484 e1000_irq_enable(adapter);
485
1da177e4
LT		 486 return 0;
487}
488
79f05bf0
AK		 489/**
490 * e1000_power_up_phy - restore link in case the phy was powered down
491 * @adapter: address of board private structure
492 *
493 * The phy may be powered down to save power and turn off link when the
494 * driver is unloaded and wake on lan is not enabled (among others)
495 * *** this routine MUST be followed by a call to e1000_reset ***
496 *
497 **/
498
d658266e 499void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 500{
501 uint16_t mii_reg = 0;
502
503 /* Just clear the power down bit to wake the phy back up */
504 if (adapter->hw.media_type == e1000_media_type_copper) {
505 /* according to the manual, the phy will retain its
506 * settings across a power-down/up cycle */
507 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
508 mii_reg &= ~MII_CR_POWER_DOWN;
509 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
510 }
511}
512
513static void e1000_power_down_phy(struct e1000_adapter *adapter)
514{
61c2505f
BA		 515 /* Power down the PHY so no link is implied when interface is down *
516 * The PHY cannot be powered down if any of the following is TRUE *
79f05bf0
AK		 517 * (a) WoL is enabled
518 * (b) AMT is active
519 * (c) SoL/IDER session is active */
520 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
61c2505f 521 adapter->hw.media_type == e1000_media_type_copper) {
79f05bf0 522 uint16_t mii_reg = 0;
61c2505f
BA		 523
524 switch (adapter->hw.mac_type) {
525 case e1000_82540:
526 case e1000_82545:
527 case e1000_82545_rev_3:
528 case e1000_82546:
529 case e1000_82546_rev_3:
530 case e1000_82541:
531 case e1000_82541_rev_2:
532 case e1000_82547:
533 case e1000_82547_rev_2:
534 if (E1000_READ_REG(&adapter->hw, MANC) &
535 E1000_MANC_SMBUS_EN)
536 goto out;
537 break;
538 case e1000_82571:
539 case e1000_82572:
540 case e1000_82573:
541 case e1000_80003es2lan:
542 case e1000_ich8lan:
543 if (e1000_check_mng_mode(&adapter->hw) ||
544 e1000_check_phy_reset_block(&adapter->hw))
545 goto out;
546 break;
547 default:
548 goto out;
549 }
79f05bf0
AK		 550 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
551 mii_reg |= MII_CR_POWER_DOWN;
552 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
553 mdelay(1);
554 }
61c2505f
BA		 555out:
556 return;
79f05bf0
AK		 557}
558
1da177e4
LT		 559void
560e1000_down(struct e1000_adapter *adapter)
561{
562 struct net_device *netdev = adapter->netdev;
563
564 e1000_irq_disable(adapter);
c1605eb3 565
1da177e4
LT		 566 del_timer_sync(&adapter->tx_fifo_stall_timer);
567 del_timer_sync(&adapter->watchdog_timer);
568 del_timer_sync(&adapter->phy_info_timer);
569
570#ifdef CONFIG_E1000_NAPI
571 netif_poll_disable(netdev);
572#endif
7bfa4816 573 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 574 adapter->link_speed = 0;
575 adapter->link_duplex = 0;
576 netif_carrier_off(netdev);
577 netif_stop_queue(netdev);
578
579 e1000_reset(adapter);
581d708e
MC		 580 e1000_clean_all_tx_rings(adapter);
581 e1000_clean_all_rx_rings(adapter);
1da177e4 582}
1da177e4 583
2db10a08
AK		 584void
585e1000_reinit_locked(struct e1000_adapter *adapter)
586{
587 WARN_ON(in_interrupt());
588 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
589 msleep(1);
590 e1000_down(adapter);
591 e1000_up(adapter);
592 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 593}
594
595void
596e1000_reset(struct e1000_adapter *adapter)
597{
2d7edb92 598 uint32_t pba, manc;
09ae3e88
JK		 599#ifdef DISABLE_MULR
600 uint32_t tctl;
601#endif
1125ecbc 602 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 603
604 /* Repartition Pba for greater than 9k mtu
605 * To take effect CTRL.RST is required.
606 */
607
2d7edb92
MC		 608 switch (adapter->hw.mac_type) {
609 case e1000_82547:
0e6ef3e0 610 case e1000_82547_rev_2:
2d7edb92
MC		 611 pba = E1000_PBA_30K;
612 break;
868d5309
MC		 613 case e1000_82571:
614 case e1000_82572:
6418ecc6 615 case e1000_80003es2lan:
868d5309
MC		 616 pba = E1000_PBA_38K;
617 break;
2d7edb92
MC		 618 case e1000_82573:
619 pba = E1000_PBA_12K;
620 break;
cd94dd0b
AK		 621 case e1000_ich8lan:
622 pba = E1000_PBA_8K;
623 break;
2d7edb92
MC		 624 default:
625 pba = E1000_PBA_48K;
626 break;
627 }
628
96838a40 629 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 630 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 631 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 632
633
96838a40 634 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 635 adapter->tx_fifo_head = 0;
636 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
637 adapter->tx_fifo_size =
638 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
639 atomic_set(&adapter->tx_fifo_stall, 0);
640 }
2d7edb92 641
1da177e4
LT		 642 E1000_WRITE_REG(&adapter->hw, PBA, pba);
643
644 /* flow control settings */
f11b7f85
JK		 645 /* Set the FC high water mark to 90% of the FIFO size.
646 * Required to clear last 3 LSB */
647 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 648 /* We can't use 90% on small FIFOs because the remainder
649 * would be less than 1 full frame. In this case, we size
650 * it to allow at least a full frame above the high water
651 * mark. */
652 if (pba < E1000_PBA_16K)
653 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 654
655 adapter->hw.fc_high_water = fc_high_water_mark;
656 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 657 if (adapter->hw.mac_type == e1000_80003es2lan)
658 adapter->hw.fc_pause_time = 0xFFFF;
659 else
660 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 661 adapter->hw.fc_send_xon = 1;
662 adapter->hw.fc = adapter->hw.original_fc;
663
2d7edb92 664 /* Allow time for pending master requests to run */
1da177e4 665 e1000_reset_hw(&adapter->hw);
96838a40 666 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 667 E1000_WRITE_REG(&adapter->hw, WUC, 0);
09ae3e88
JK		 668#ifdef DISABLE_MULR
669 /* disable Multiple Reads in Transmit Control Register for debugging */
670 tctl = E1000_READ_REG(hw, TCTL);
671 E1000_WRITE_REG(hw, TCTL, tctl & ~E1000_TCTL_MULR);
672
673#endif
96838a40 674 if (e1000_init_hw(&adapter->hw))
1da177e4 675 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 676 e1000_update_mng_vlan(adapter);
1da177e4
LT		 677 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
678 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
679
680 e1000_reset_adaptive(&adapter->hw);
681 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 682
683 if (!adapter->smart_power_down &&
684 (adapter->hw.mac_type == e1000_82571 ||
685 adapter->hw.mac_type == e1000_82572)) {
686 uint16_t phy_data = 0;
687 /* speed up time to link by disabling smart power down, ignore
688 * the return value of this function because there is nothing
689 * different we would do if it failed */
690 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
691 &phy_data);
692 phy_data &= ~IGP02E1000_PM_SPD;
693 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
694 phy_data);
695 }
696
5f01607a 697 if ((adapter->en_mng_pt) && (adapter->hw.mac_type < e1000_82571)) {
2d7edb92
MC		 698 manc = E1000_READ_REG(&adapter->hw, MANC);
699 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
700 E1000_WRITE_REG(&adapter->hw, MANC, manc);
701 }
1da177e4
LT		 702}
703
704/**
705 * e1000_probe - Device Initialization Routine
706 * @pdev: PCI device information struct
707 * @ent: entry in e1000_pci_tbl
708 *
709 * Returns 0 on success, negative on failure
710 *
711 * e1000_probe initializes an adapter identified by a pci_dev structure.
712 * The OS initialization, configuring of the adapter private structure,
713 * and a hardware reset occur.
714 **/
715
716static int __devinit
717e1000_probe(struct pci_dev *pdev,
718 const struct pci_device_id *ent)
719{
720 struct net_device *netdev;
721 struct e1000_adapter *adapter;
2d7edb92 722 unsigned long mmio_start, mmio_len;
cd94dd0b 723 unsigned long flash_start, flash_len;
2d7edb92 724
1da177e4 725 static int cards_found = 0;
120cd576 726 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 727 int i, err, pci_using_dac;
120cd576 728 uint16_t eeprom_data = 0;
1da177e4 729 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 730 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 731 return err;
732
cd94dd0b
AK		 733 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
734 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 735 pci_using_dac = 1;
736 } else {
cd94dd0b
AK		 737 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
738 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 739 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 740 goto err_dma;
1da177e4
LT		 741 }
742 pci_using_dac = 0;
743 }
744
96838a40 745 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 746 goto err_pci_reg;
1da177e4
LT		 747
748 pci_set_master(pdev);
749
6dd62ab0 750 err = -ENOMEM;
1da177e4 751 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 752 if (!netdev)
1da177e4 753 goto err_alloc_etherdev;
1da177e4
LT		 754
755 SET_MODULE_OWNER(netdev);
756 SET_NETDEV_DEV(netdev, &pdev->dev);
757
758 pci_set_drvdata(pdev, netdev);
60490fe0 759 adapter = netdev_priv(netdev);
1da177e4
LT		 760 adapter->netdev = netdev;
761 adapter->pdev = pdev;
762 adapter->hw.back = adapter;
763 adapter->msg_enable = (1 << debug) - 1;
764
765 mmio_start = pci_resource_start(pdev, BAR_0);
766 mmio_len = pci_resource_len(pdev, BAR_0);
767
6dd62ab0 768 err = -EIO;
1da177e4 769 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 770 if (!adapter->hw.hw_addr)
1da177e4 771 goto err_ioremap;
1da177e4 772
96838a40
JB		 773 for (i = BAR_1; i <= BAR_5; i++) {
774 if (pci_resource_len(pdev, i) == 0)
1da177e4 775 continue;
96838a40 776 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 777 adapter->hw.io_base = pci_resource_start(pdev, i);
778 break;
779 }
780 }
781
782 netdev->open = &e1000_open;
783 netdev->stop = &e1000_close;
784 netdev->hard_start_xmit = &e1000_xmit_frame;
785 netdev->get_stats = &e1000_get_stats;
786 netdev->set_multicast_list = &e1000_set_multi;
787 netdev->set_mac_address = &e1000_set_mac;
788 netdev->change_mtu = &e1000_change_mtu;
789 netdev->do_ioctl = &e1000_ioctl;
790 e1000_set_ethtool_ops(netdev);
791 netdev->tx_timeout = &e1000_tx_timeout;
792 netdev->watchdog_timeo = 5 * HZ;
793#ifdef CONFIG_E1000_NAPI
794 netdev->poll = &e1000_clean;
795 netdev->weight = 64;
796#endif
797 netdev->vlan_rx_register = e1000_vlan_rx_register;
798 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
799 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
800#ifdef CONFIG_NET_POLL_CONTROLLER
801 netdev->poll_controller = e1000_netpoll;
802#endif
0eb5a34c 803 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 804
805 netdev->mem_start = mmio_start;
806 netdev->mem_end = mmio_start + mmio_len;
807 netdev->base_addr = adapter->hw.io_base;
808
809 adapter->bd_number = cards_found;
810
811 /* setup the private structure */
812
96838a40 813 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 814 goto err_sw_init;
815
6dd62ab0 816 err = -EIO;
cd94dd0b
AK		 817 /* Flash BAR mapping must happen after e1000_sw_init
818 * because it depends on mac_type */
819 if ((adapter->hw.mac_type == e1000_ich8lan) &&
820 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
821 flash_start = pci_resource_start(pdev, 1);
822 flash_len = pci_resource_len(pdev, 1);
823 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 824 if (!adapter->hw.flash_address)
cd94dd0b 825 goto err_flashmap;
cd94dd0b
AK		 826 }
827
6dd62ab0 828 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 829 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
830
96838a40 831 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 832 netdev->features = NETIF_F_SG |
833 NETIF_F_HW_CSUM |
834 NETIF_F_HW_VLAN_TX |
835 NETIF_F_HW_VLAN_RX |
836 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 837 if (adapter->hw.mac_type == e1000_ich8lan)
838 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 839 }
840
841#ifdef NETIF_F_TSO
96838a40 842 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 843 (adapter->hw.mac_type != e1000_82547))
844 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 845
846#ifdef NETIF_F_TSO_IPV6
96838a40 847 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 848 netdev->features |= NETIF_F_TSO_IPV6;
849#endif
1da177e4 850#endif
96838a40 851 if (pci_using_dac)
1da177e4
LT		 852 netdev->features |= NETIF_F_HIGHDMA;
853
76c224bc
AK		 854 netdev->features |= NETIF_F_LLTX;
855
2d7edb92
MC		 856 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
857
cd94dd0b
AK		 858 /* initialize eeprom parameters */
859
860 if (e1000_init_eeprom_params(&adapter->hw)) {
861 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 862 goto err_eeprom;
cd94dd0b
AK		 863 }
864
96838a40 865 /* before reading the EEPROM, reset the controller to
1da177e4 866 * put the device in a known good starting state */
96838a40 867
1da177e4
LT		 868 e1000_reset_hw(&adapter->hw);
869
870 /* make sure the EEPROM is good */
871
96838a40 872 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 873 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 874 goto err_eeprom;
875 }
876
877 /* copy the MAC address out of the EEPROM */
878
96838a40 879 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 880 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
881 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 882 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 883
96838a40 884 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 885 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 886 goto err_eeprom;
887 }
888
1da177e4
LT		 889 e1000_get_bus_info(&adapter->hw);
890
891 init_timer(&adapter->tx_fifo_stall_timer);
892 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
893 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
894
895 init_timer(&adapter->watchdog_timer);
896 adapter->watchdog_timer.function = &e1000_watchdog;
897 adapter->watchdog_timer.data = (unsigned long) adapter;
898
1da177e4
LT		 899 init_timer(&adapter->phy_info_timer);
900 adapter->phy_info_timer.function = &e1000_update_phy_info;
901 adapter->phy_info_timer.data = (unsigned long) adapter;
902
87041639
JK		 903 INIT_WORK(&adapter->reset_task,
904 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 905
906 /* we're going to reset, so assume we have no link for now */
907
908 netif_carrier_off(netdev);
909 netif_stop_queue(netdev);
910
911 e1000_check_options(adapter);
912
913 /* Initial Wake on LAN setting
914 * If APM wake is enabled in the EEPROM,
915 * enable the ACPI Magic Packet filter
916 */
917
96838a40 918 switch (adapter->hw.mac_type) {
1da177e4
LT		 919 case e1000_82542_rev2_0:
920 case e1000_82542_rev2_1:
921 case e1000_82543:
922 break;
923 case e1000_82544:
924 e1000_read_eeprom(&adapter->hw,
925 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
926 eeprom_apme_mask = E1000_EEPROM_82544_APM;
927 break;
cd94dd0b
AK		 928 case e1000_ich8lan:
929 e1000_read_eeprom(&adapter->hw,
930 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
931 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
932 break;
1da177e4
LT		 933 case e1000_82546:
934 case e1000_82546_rev_3:
fd803241 935 case e1000_82571:
6418ecc6 936 case e1000_80003es2lan:
96838a40 937 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 938 e1000_read_eeprom(&adapter->hw,
939 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
940 break;
941 }
942 /* Fall Through */
943 default:
944 e1000_read_eeprom(&adapter->hw,
945 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
946 break;
947 }
96838a40 948 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 949 adapter->eeprom_wol |= E1000_WUFC_MAG;
950
951 /* now that we have the eeprom settings, apply the special cases
952 * where the eeprom may be wrong or the board simply won't support
953 * wake on lan on a particular port */
954 switch (pdev->device) {
955 case E1000_DEV_ID_82546GB_PCIE:
956 adapter->eeprom_wol = 0;
957 break;
958 case E1000_DEV_ID_82546EB_FIBER:
959 case E1000_DEV_ID_82546GB_FIBER:
960 case E1000_DEV_ID_82571EB_FIBER:
961 /* Wake events only supported on port A for dual fiber
962 * regardless of eeprom setting */
963 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
964 adapter->eeprom_wol = 0;
965 break;
966 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 967 case E1000_DEV_ID_82571EB_QUAD_COPPER:
120cd576
JB		 968 /* if quad port adapter, disable WoL on all but port A */
969 if (global_quad_port_a != 0)
970 adapter->eeprom_wol = 0;
971 else
972 adapter->quad_port_a = 1;
973 /* Reset for multiple quad port adapters */
974 if (++global_quad_port_a == 4)
975 global_quad_port_a = 0;
976 break;
977 }
978
979 /* initialize the wol settings based on the eeprom settings */
980 adapter->wol = adapter->eeprom_wol;
1da177e4 981
fb3d47d4
JK		 982 /* print bus type/speed/width info */
983 {
984 struct e1000_hw *hw = &adapter->hw;
985 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
986 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
987 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
988 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
989 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
990 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
991 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
992 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
993 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
994 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
995 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
996 "32-bit"));
997 }
998
999 for (i = 0; i < 6; i++)
1000 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1001
1da177e4
LT		 1002 /* reset the hardware with the new settings */
1003 e1000_reset(adapter);
1004
b55ccb35
JK		 1005 /* If the controller is 82573 and f/w is AMT, do not set
1006 * DRV_LOAD until the interface is up. For all other cases,
1007 * let the f/w know that the h/w is now under the control
1008 * of the driver. */
1009 if (adapter->hw.mac_type != e1000_82573 ||
1010 !e1000_check_mng_mode(&adapter->hw))
1011 e1000_get_hw_control(adapter);
2d7edb92 1012
1da177e4 1013 strcpy(netdev->name, "eth%d");
96838a40 1014 if ((err = register_netdev(netdev)))
1da177e4
LT		 1015 goto err_register;
1016
1017 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1018
1019 cards_found++;
1020 return 0;
1021
1022err_register:
6dd62ab0
VA		 1023 e1000_release_hw_control(adapter);
1024err_eeprom:
1025 if (!e1000_check_phy_reset_block(&adapter->hw))
1026 e1000_phy_hw_reset(&adapter->hw);
1027
cd94dd0b
AK		 1028 if (adapter->hw.flash_address)
1029 iounmap(adapter->hw.flash_address);
1030err_flashmap:
6dd62ab0
VA		 1031#ifdef CONFIG_E1000_NAPI
1032 for (i = 0; i < adapter->num_rx_queues; i++)
1033 dev_put(&adapter->polling_netdev[i]);
1034#endif
1035
1036 kfree(adapter->tx_ring);
1037 kfree(adapter->rx_ring);
1038#ifdef CONFIG_E1000_NAPI
1039 kfree(adapter->polling_netdev);
1040#endif
1da177e4 1041err_sw_init:
1da177e4
LT		 1042 iounmap(adapter->hw.hw_addr);
1043err_ioremap:
1044 free_netdev(netdev);
1045err_alloc_etherdev:
1046 pci_release_regions(pdev);
6dd62ab0
VA		 1047err_pci_reg:
1048err_dma:
1049 pci_disable_device(pdev);
1da177e4
LT		 1050 return err;
1051}
1052
1053/**
1054 * e1000_remove - Device Removal Routine
1055 * @pdev: PCI device information struct
1056 *
1057 * e1000_remove is called by the PCI subsystem to alert the driver
1058 * that it should release a PCI device. The could be caused by a
1059 * Hot-Plug event, or because the driver is going to be removed from
1060 * memory.
1061 **/
1062
1063static void __devexit
1064e1000_remove(struct pci_dev *pdev)
1065{
1066 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1067 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 1068 uint32_t manc;
581d708e
MC		 1069#ifdef CONFIG_E1000_NAPI
1070 int i;
1071#endif
1da177e4 1072
be2b28ed
JG		 1073 flush_scheduled_work();
1074
5f01607a 1075 if (adapter->hw.mac_type < e1000_82571 &&
1da177e4
LT		 1076 adapter->hw.media_type == e1000_media_type_copper) {
1077 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 1078 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1079 manc |= E1000_MANC_ARP_EN;
1080 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1081 }
1082 }
1083
b55ccb35
JK		 1084 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1085 * would have already happened in close and is redundant. */
1086 e1000_release_hw_control(adapter);
2d7edb92 1087
1da177e4 1088 unregister_netdev(netdev);
581d708e 1089#ifdef CONFIG_E1000_NAPI
f56799ea 1090 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1091 dev_put(&adapter->polling_netdev[i]);
581d708e 1092#endif
1da177e4 1093
96838a40 1094 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1095 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1096
24025e4e
MC		 1097 kfree(adapter->tx_ring);
1098 kfree(adapter->rx_ring);
1099#ifdef CONFIG_E1000_NAPI
1100 kfree(adapter->polling_netdev);
1101#endif
1102
1da177e4 1103 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1104 if (adapter->hw.flash_address)
1105 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1106 pci_release_regions(pdev);
1107
1108 free_netdev(netdev);
1109
1110 pci_disable_device(pdev);
1111}
1112
1113/**
1114 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1115 * @adapter: board private structure to initialize
1116 *
1117 * e1000_sw_init initializes the Adapter private data structure.
1118 * Fields are initialized based on PCI device information and
1119 * OS network device settings (MTU size).
1120 **/
1121
1122static int __devinit
1123e1000_sw_init(struct e1000_adapter *adapter)
1124{
1125 struct e1000_hw *hw = &adapter->hw;
1126 struct net_device *netdev = adapter->netdev;
1127 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1128#ifdef CONFIG_E1000_NAPI
1129 int i;
1130#endif
1da177e4
LT		 1131
1132 /* PCI config space info */
1133
1134 hw->vendor_id = pdev->vendor;
1135 hw->device_id = pdev->device;
1136 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1137 hw->subsystem_id = pdev->subsystem_device;
1138
1139 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1140
1141 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1142
eb0f8054 1143 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1144 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1145 hw->max_frame_size = netdev->mtu +
1146 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1147 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1148
1149 /* identify the MAC */
1150
96838a40 1151 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1152 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1153 return -EIO;
1154 }
1155
96838a40 1156 switch (hw->mac_type) {
1da177e4
LT		 1157 default:
1158 break;
1159 case e1000_82541:
1160 case e1000_82547:
1161 case e1000_82541_rev_2:
1162 case e1000_82547_rev_2:
1163 hw->phy_init_script = 1;
1164 break;
1165 }
1166
1167 e1000_set_media_type(hw);
1168
1169 hw->wait_autoneg_complete = FALSE;
1170 hw->tbi_compatibility_en = TRUE;
1171 hw->adaptive_ifs = TRUE;
1172
1173 /* Copper options */
1174
96838a40 1175 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1176 hw->mdix = AUTO_ALL_MODES;
1177 hw->disable_polarity_correction = FALSE;
1178 hw->master_slave = E1000_MASTER_SLAVE;
1179 }
1180
f56799ea
JK		 1181 adapter->num_tx_queues = 1;
1182 adapter->num_rx_queues = 1;
581d708e
MC		 1183
1184 if (e1000_alloc_queues(adapter)) {
1185 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1186 return -ENOMEM;
1187 }
1188
1189#ifdef CONFIG_E1000_NAPI
f56799ea 1190 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1191 adapter->polling_netdev[i].priv = adapter;
1192 adapter->polling_netdev[i].poll = &e1000_clean;
1193 adapter->polling_netdev[i].weight = 64;
1194 dev_hold(&adapter->polling_netdev[i]);
1195 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1196 }
7bfa4816 1197 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1198#endif
1199
1da177e4
LT		 1200 atomic_set(&adapter->irq_sem, 1);
1201 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1202
1203 return 0;
1204}
1205
581d708e
MC		 1206/**
1207 * e1000_alloc_queues - Allocate memory for all rings
1208 * @adapter: board private structure to initialize
1209 *
1210 * We allocate one ring per queue at run-time since we don't know the
1211 * number of queues at compile-time. The polling_netdev array is
1212 * intended for Multiqueue, but should work fine with a single queue.
1213 **/
1214
1215static int __devinit
1216e1000_alloc_queues(struct e1000_adapter *adapter)
1217{
1218 int size;
1219
f56799ea 1220 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1221 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1222 if (!adapter->tx_ring)
1223 return -ENOMEM;
1224 memset(adapter->tx_ring, 0, size);
1225
f56799ea 1226 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1227 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1228 if (!adapter->rx_ring) {
1229 kfree(adapter->tx_ring);
1230 return -ENOMEM;
1231 }
1232 memset(adapter->rx_ring, 0, size);
1233
1234#ifdef CONFIG_E1000_NAPI
f56799ea 1235 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1236 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1237 if (!adapter->polling_netdev) {
1238 kfree(adapter->tx_ring);
1239 kfree(adapter->rx_ring);
1240 return -ENOMEM;
1241 }
1242 memset(adapter->polling_netdev, 0, size);
1243#endif
1244
1245 return E1000_SUCCESS;
1246}
1247
1da177e4
LT		 1248/**
1249 * e1000_open - Called when a network interface is made active
1250 * @netdev: network interface device structure
1251 *
1252 * Returns 0 on success, negative value on failure
1253 *
1254 * The open entry point is called when a network interface is made
1255 * active by the system (IFF_UP). At this point all resources needed
1256 * for transmit and receive operations are allocated, the interrupt
1257 * handler is registered with the OS, the watchdog timer is started,
1258 * and the stack is notified that the interface is ready.
1259 **/
1260
1261static int
1262e1000_open(struct net_device *netdev)
1263{
60490fe0 1264 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1265 int err;
1266
2db10a08
AK		 1267 /* disallow open during test */
1268 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1269 return -EBUSY;
1270
1da177e4
LT		 1271 /* allocate transmit descriptors */
1272
581d708e 1273 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1274 goto err_setup_tx;
1275
1276 /* allocate receive descriptors */
1277
581d708e 1278 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1279 goto err_setup_rx;
1280
2db10a08
AK		 1281 err = e1000_request_irq(adapter);
1282 if (err)
401a552b 1283 goto err_req_irq;
2db10a08 1284
79f05bf0
AK		 1285 e1000_power_up_phy(adapter);
1286
96838a40 1287 if ((err = e1000_up(adapter)))
1da177e4 1288 goto err_up;
2d7edb92 1289 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1290 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1291 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1292 e1000_update_mng_vlan(adapter);
1293 }
1da177e4 1294
b55ccb35
JK		 1295 /* If AMT is enabled, let the firmware know that the network
1296 * interface is now open */
1297 if (adapter->hw.mac_type == e1000_82573 &&
1298 e1000_check_mng_mode(&adapter->hw))
1299 e1000_get_hw_control(adapter);
1300
1da177e4
LT		 1301 return E1000_SUCCESS;
1302
1303err_up:
401a552b
VA		 1304 e1000_power_down_phy(adapter);
1305 e1000_free_irq(adapter);
1306err_req_irq:
581d708e 1307 e1000_free_all_rx_resources(adapter);
1da177e4 1308err_setup_rx:
581d708e 1309 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1310err_setup_tx:
1311 e1000_reset(adapter);
1312
1313 return err;
1314}
1315
1316/**
1317 * e1000_close - Disables a network interface
1318 * @netdev: network interface device structure
1319 *
1320 * Returns 0, this is not allowed to fail
1321 *
1322 * The close entry point is called when an interface is de-activated
1323 * by the OS. The hardware is still under the drivers control, but
1324 * needs to be disabled. A global MAC reset is issued to stop the
1325 * hardware, and all transmit and receive resources are freed.
1326 **/
1327
1328static int
1329e1000_close(struct net_device *netdev)
1330{
60490fe0 1331 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1332
2db10a08 1333 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1334 e1000_down(adapter);
79f05bf0 1335 e1000_power_down_phy(adapter);
2db10a08 1336 e1000_free_irq(adapter);
1da177e4 1337
581d708e
MC		 1338 e1000_free_all_tx_resources(adapter);
1339 e1000_free_all_rx_resources(adapter);
1da177e4 1340
96838a40 1341 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1342 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1343 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1344 }
b55ccb35
JK		 1345
1346 /* If AMT is enabled, let the firmware know that the network
1347 * interface is now closed */
1348 if (adapter->hw.mac_type == e1000_82573 &&
1349 e1000_check_mng_mode(&adapter->hw))
1350 e1000_release_hw_control(adapter);
1351
1da177e4
LT		 1352 return 0;
1353}
1354
1355/**
1356 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1357 * @adapter: address of board private structure
2d7edb92
MC		 1358 * @start: address of beginning of memory
1359 * @len: length of memory
1da177e4 1360 **/
e619d523 1361static boolean_t
1da177e4
LT		 1362e1000_check_64k_bound(struct e1000_adapter *adapter,
1363 void *start, unsigned long len)
1364{
1365 unsigned long begin = (unsigned long) start;
1366 unsigned long end = begin + len;
1367
2648345f
MC		 1368 /* First rev 82545 and 82546 need to not allow any memory
1369 * write location to cross 64k boundary due to errata 23 */
1da177e4 1370 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1371 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1372 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1373 }
1374
1375 return TRUE;
1376}
1377
1378/**
1379 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1380 * @adapter: board private structure
581d708e 1381 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1382 *
1383 * Return 0 on success, negative on failure
1384 **/
1385
3ad2cc67 1386static int
581d708e
MC		 1387e1000_setup_tx_resources(struct e1000_adapter *adapter,
1388 struct e1000_tx_ring *txdr)
1da177e4 1389{
1da177e4
LT		 1390 struct pci_dev *pdev = adapter->pdev;
1391 int size;
1392
1393 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1394 txdr->buffer_info = vmalloc(size);
96838a40 1395 if (!txdr->buffer_info) {
2648345f
MC		 1396 DPRINTK(PROBE, ERR,
1397 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1398 return -ENOMEM;
1399 }
1400 memset(txdr->buffer_info, 0, size);
1401
1402 /* round up to nearest 4K */
1403
1404 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1405 E1000_ROUNDUP(txdr->size, 4096);
1406
1407 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1408 if (!txdr->desc) {
1da177e4 1409setup_tx_desc_die:
1da177e4 1410 vfree(txdr->buffer_info);
2648345f
MC		 1411 DPRINTK(PROBE, ERR,
1412 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1413 return -ENOMEM;
1414 }
1415
2648345f 1416 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1417 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1418 void *olddesc = txdr->desc;
1419 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1420 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1421 "at %p\n", txdr->size, txdr->desc);
1422 /* Try again, without freeing the previous */
1da177e4 1423 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1424 /* Failed allocation, critical failure */
96838a40 1425 if (!txdr->desc) {
1da177e4
LT		 1426 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1427 goto setup_tx_desc_die;
1428 }
1429
1430 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1431 /* give up */
2648345f
MC		 1432 pci_free_consistent(pdev, txdr->size, txdr->desc,
1433 txdr->dma);
1da177e4
LT		 1434 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1435 DPRINTK(PROBE, ERR,
2648345f
MC		 1436 "Unable to allocate aligned memory "
1437 "for the transmit descriptor ring\n");
1da177e4
LT		 1438 vfree(txdr->buffer_info);
1439 return -ENOMEM;
1440 } else {
2648345f 1441 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1442 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1443 }
1444 }
1445 memset(txdr->desc, 0, txdr->size);
1446
1447 txdr->next_to_use = 0;
1448 txdr->next_to_clean = 0;
2ae76d98 1449 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1450
1451 return 0;
1452}
1453
581d708e
MC		 1454/**
1455 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1456 * (Descriptors) for all queues
1457 * @adapter: board private structure
1458 *
581d708e
MC		 1459 * Return 0 on success, negative on failure
1460 **/
1461
1462int
1463e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1464{
1465 int i, err = 0;
1466
f56799ea 1467 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1468 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1469 if (err) {
1470 DPRINTK(PROBE, ERR,
1471 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1472 for (i-- ; i >= 0; i--)
1473 e1000_free_tx_resources(adapter,
1474 &adapter->tx_ring[i]);
581d708e
MC		 1475 break;
1476 }
1477 }
1478
1479 return err;
1480}
1481
1da177e4
LT		 1482/**
1483 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1484 * @adapter: board private structure
1485 *
1486 * Configure the Tx unit of the MAC after a reset.
1487 **/
1488
1489static void
1490e1000_configure_tx(struct e1000_adapter *adapter)
1491{
581d708e
MC		 1492 uint64_t tdba;
1493 struct e1000_hw *hw = &adapter->hw;
1494 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1495 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1496
1497 /* Setup the HW Tx Head and Tail descriptor pointers */
1498
f56799ea 1499 switch (adapter->num_tx_queues) {
24025e4e
MC		 1500 case 1:
1501 default:
581d708e
MC		 1502 tdba = adapter->tx_ring[0].dma;
1503 tdlen = adapter->tx_ring[0].count *
1504 sizeof(struct e1000_tx_desc);
581d708e 1505 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1506 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1507 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1508 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1509 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1510 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1511 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1512 break;
1513 }
1da177e4
LT		 1514
1515 /* Set the default values for the Tx Inter Packet Gap timer */
1516
0fadb059
JK		 1517 if (hw->media_type == e1000_media_type_fiber ||
1518 hw->media_type == e1000_media_type_internal_serdes)
1519 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1520 else
1521 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1522
581d708e 1523 switch (hw->mac_type) {
1da177e4
LT		 1524 case e1000_82542_rev2_0:
1525 case e1000_82542_rev2_1:
1526 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1527 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1528 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1529 break;
87041639
JK		 1530 case e1000_80003es2lan:
1531 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1532 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1533 break;
1da177e4 1534 default:
0fadb059
JK		 1535 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1536 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1537 break;
1da177e4 1538 }
0fadb059
JK		 1539 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1540 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1541 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1542
1543 /* Set the Tx Interrupt Delay register */
1544
581d708e
MC		 1545 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1546 if (hw->mac_type >= e1000_82540)
1547 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1548
1549 /* Program the Transmit Control Register */
1550
581d708e 1551 tctl = E1000_READ_REG(hw, TCTL);
1da177e4 1552 tctl &= ~E1000_TCTL_CT;
7e6c9861 1553 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1554 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1555
2ae76d98
MC		 1556 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1557 tarc = E1000_READ_REG(hw, TARC0);
09ae3e88 1558 tarc |= (1 << 21);
2ae76d98 1559 E1000_WRITE_REG(hw, TARC0, tarc);
87041639
JK		 1560 } else if (hw->mac_type == e1000_80003es2lan) {
1561 tarc = E1000_READ_REG(hw, TARC0);
1562 tarc |= 1;
87041639
JK		 1563 E1000_WRITE_REG(hw, TARC0, tarc);
1564 tarc = E1000_READ_REG(hw, TARC1);
1565 tarc |= 1;
1566 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1567 }
1568
581d708e 1569 e1000_config_collision_dist(hw);
1da177e4
LT		 1570
1571 /* Setup Transmit Descriptor Settings for eop descriptor */
1572 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1573 E1000_TXD_CMD_IFCS;
1574
581d708e 1575 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1576 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1577 else
1578 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1579
1580 /* Cache if we're 82544 running in PCI-X because we'll
1581 * need this to apply a workaround later in the send path. */
581d708e
MC		 1582 if (hw->mac_type == e1000_82544 &&
1583 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1584 adapter->pcix_82544 = 1;
7e6c9861
JK		 1585
1586 E1000_WRITE_REG(hw, TCTL, tctl);
1587
1da177e4
LT		 1588}
1589
1590/**
1591 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1592 * @adapter: board private structure
581d708e 1593 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1594 *
1595 * Returns 0 on success, negative on failure
1596 **/
1597
3ad2cc67 1598static int
581d708e
MC		 1599e1000_setup_rx_resources(struct e1000_adapter *adapter,
1600 struct e1000_rx_ring *rxdr)
1da177e4 1601{
1da177e4 1602 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1603 int size, desc_len;
1da177e4
LT		 1604
1605 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1606 rxdr->buffer_info = vmalloc(size);
581d708e 1607 if (!rxdr->buffer_info) {
2648345f
MC		 1608 DPRINTK(PROBE, ERR,
1609 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1610 return -ENOMEM;
1611 }
1612 memset(rxdr->buffer_info, 0, size);
1613
2d7edb92
MC		 1614 size = sizeof(struct e1000_ps_page) * rxdr->count;
1615 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1616 if (!rxdr->ps_page) {
2d7edb92
MC		 1617 vfree(rxdr->buffer_info);
1618 DPRINTK(PROBE, ERR,
1619 "Unable to allocate memory for the receive descriptor ring\n");
1620 return -ENOMEM;
1621 }
1622 memset(rxdr->ps_page, 0, size);
1623
1624 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1625 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1626 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1627 vfree(rxdr->buffer_info);
1628 kfree(rxdr->ps_page);
1629 DPRINTK(PROBE, ERR,
1630 "Unable to allocate memory for the receive descriptor ring\n");
1631 return -ENOMEM;
1632 }
1633 memset(rxdr->ps_page_dma, 0, size);
1634
96838a40 1635 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1636 desc_len = sizeof(struct e1000_rx_desc);
1637 else
1638 desc_len = sizeof(union e1000_rx_desc_packet_split);
1639
1da177e4
LT		 1640 /* Round up to nearest 4K */
1641
2d7edb92 1642 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1643 E1000_ROUNDUP(rxdr->size, 4096);
1644
1645 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1646
581d708e
MC		 1647 if (!rxdr->desc) {
1648 DPRINTK(PROBE, ERR,
1649 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1650setup_rx_desc_die:
1da177e4 1651 vfree(rxdr->buffer_info);
2d7edb92
MC		 1652 kfree(rxdr->ps_page);
1653 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1654 return -ENOMEM;
1655 }
1656
2648345f 1657 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1658 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1659 void *olddesc = rxdr->desc;
1660 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1661 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1662 "at %p\n", rxdr->size, rxdr->desc);
1663 /* Try again, without freeing the previous */
1da177e4 1664 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1665 /* Failed allocation, critical failure */
581d708e 1666 if (!rxdr->desc) {
1da177e4 1667 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1668 DPRINTK(PROBE, ERR,
1669 "Unable to allocate memory "
1670 "for the receive descriptor ring\n");
1da177e4
LT		 1671 goto setup_rx_desc_die;
1672 }
1673
1674 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1675 /* give up */
2648345f
MC		 1676 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1677 rxdr->dma);
1da177e4 1678 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1679 DPRINTK(PROBE, ERR,
1680 "Unable to allocate aligned memory "
1681 "for the receive descriptor ring\n");
581d708e 1682 goto setup_rx_desc_die;
1da177e4 1683 } else {
2648345f 1684 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1685 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1686 }
1687 }
1688 memset(rxdr->desc, 0, rxdr->size);
1689
1690 rxdr->next_to_clean = 0;
1691 rxdr->next_to_use = 0;
1692
1693 return 0;
1694}
1695
581d708e
MC		 1696/**
1697 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1698 * (Descriptors) for all queues
1699 * @adapter: board private structure
1700 *
581d708e
MC		 1701 * Return 0 on success, negative on failure
1702 **/
1703
1704int
1705e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1706{
1707 int i, err = 0;
1708
f56799ea 1709 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1710 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1711 if (err) {
1712 DPRINTK(PROBE, ERR,
1713 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1714 for (i-- ; i >= 0; i--)
1715 e1000_free_rx_resources(adapter,
1716 &adapter->rx_ring[i]);
581d708e
MC		 1717 break;
1718 }
1719 }
1720
1721 return err;
1722}
1723
1da177e4 1724/**
2648345f 1725 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1726 * @adapter: Board private structure
1727 **/
e4c811c9
MC		 1728#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1729 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1730static void
1731e1000_setup_rctl(struct e1000_adapter *adapter)
1732{
2d7edb92
MC		 1733 uint32_t rctl, rfctl;
1734 uint32_t psrctl = 0;
35ec56bb 1735#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1736 uint32_t pages = 0;
1737#endif
1da177e4
LT		 1738
1739 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1740
1741 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1742
1743 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1744 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1745 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1746
0fadb059 1747 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1748 rctl |= E1000_RCTL_SBP;
1749 else
1750 rctl &= ~E1000_RCTL_SBP;
1751
2d7edb92
MC		 1752 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1753 rctl &= ~E1000_RCTL_LPE;
1754 else
1755 rctl |= E1000_RCTL_LPE;
1756
1da177e4 1757 /* Setup buffer sizes */
9e2feace
AK		 1758 rctl &= ~E1000_RCTL_SZ_4096;
1759 rctl |= E1000_RCTL_BSEX;
1760 switch (adapter->rx_buffer_len) {
1761 case E1000_RXBUFFER_256:
1762 rctl |= E1000_RCTL_SZ_256;
1763 rctl &= ~E1000_RCTL_BSEX;
1764 break;
1765 case E1000_RXBUFFER_512:
1766 rctl |= E1000_RCTL_SZ_512;
1767 rctl &= ~E1000_RCTL_BSEX;
1768 break;
1769 case E1000_RXBUFFER_1024:
1770 rctl |= E1000_RCTL_SZ_1024;
1771 rctl &= ~E1000_RCTL_BSEX;
1772 break;
a1415ee6
JK		 1773 case E1000_RXBUFFER_2048:
1774 default:
1775 rctl |= E1000_RCTL_SZ_2048;
1776 rctl &= ~E1000_RCTL_BSEX;
1777 break;
1778 case E1000_RXBUFFER_4096:
1779 rctl |= E1000_RCTL_SZ_4096;
1780 break;
1781 case E1000_RXBUFFER_8192:
1782 rctl |= E1000_RCTL_SZ_8192;
1783 break;
1784 case E1000_RXBUFFER_16384:
1785 rctl |= E1000_RCTL_SZ_16384;
1786 break;
2d7edb92
MC		 1787 }
1788
35ec56bb 1789#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1790 /* 82571 and greater support packet-split where the protocol
1791 * header is placed in skb->data and the packet data is
1792 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1793 * In the case of a non-split, skb->data is linearly filled,
1794 * followed by the page buffers. Therefore, skb->data is
1795 * sized to hold the largest protocol header.
1796 */
e4c811c9
MC		 1797 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1798 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1799 PAGE_SIZE <= 16384)
1800 adapter->rx_ps_pages = pages;
1801 else
1802 adapter->rx_ps_pages = 0;
2d7edb92 1803#endif
e4c811c9 1804 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1805 /* Configure extra packet-split registers */
1806 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1807 rfctl |= E1000_RFCTL_EXTEN;
1808 /* disable IPv6 packet split support */
1809 rfctl |= E1000_RFCTL_IPV6_DIS;
1810 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1811
7dfee0cb 1812 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1813
2d7edb92
MC		 1814 psrctl |= adapter->rx_ps_bsize0 >>
1815 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1816
1817 switch (adapter->rx_ps_pages) {
1818 case 3:
1819 psrctl |= PAGE_SIZE <<
1820 E1000_PSRCTL_BSIZE3_SHIFT;
1821 case 2:
1822 psrctl |= PAGE_SIZE <<
1823 E1000_PSRCTL_BSIZE2_SHIFT;
1824 case 1:
1825 psrctl |= PAGE_SIZE >>
1826 E1000_PSRCTL_BSIZE1_SHIFT;
1827 break;
1828 }
2d7edb92
MC		 1829
1830 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1831 }
1832
1833 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1834}
1835
1836/**
1837 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1838 * @adapter: board private structure
1839 *
1840 * Configure the Rx unit of the MAC after a reset.
1841 **/
1842
1843static void
1844e1000_configure_rx(struct e1000_adapter *adapter)
1845{
581d708e
MC		 1846 uint64_t rdba;
1847 struct e1000_hw *hw = &adapter->hw;
1848 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1849
e4c811c9 1850 if (adapter->rx_ps_pages) {
0f15a8fa 1851 /* this is a 32 byte descriptor */
581d708e 1852 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1853 sizeof(union e1000_rx_desc_packet_split);
1854 adapter->clean_rx = e1000_clean_rx_irq_ps;
1855 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1856 } else {
581d708e
MC		 1857 rdlen = adapter->rx_ring[0].count *
1858 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1859 adapter->clean_rx = e1000_clean_rx_irq;
1860 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1861 }
1da177e4
LT		 1862
1863 /* disable receives while setting up the descriptors */
581d708e
MC		 1864 rctl = E1000_READ_REG(hw, RCTL);
1865 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1866
1867 /* set the Receive Delay Timer Register */
581d708e 1868 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1869
581d708e
MC		 1870 if (hw->mac_type >= e1000_82540) {
1871 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1872 if (adapter->itr > 1)
581d708e 1873 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1874 1000000000 / (adapter->itr * 256));
1875 }
1876
2ae76d98 1877 if (hw->mac_type >= e1000_82571) {
2ae76d98 1878 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1879 /* Reset delay timers after every interrupt */
6fc7a7ec 1880 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1881#ifdef CONFIG_E1000_NAPI
1882 /* Auto-Mask interrupts upon ICR read. */
1883 ctrl_ext |= E1000_CTRL_EXT_IAME;
1884#endif
2ae76d98 1885 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1886 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1887 E1000_WRITE_FLUSH(hw);
1888 }
1889
581d708e
MC		 1890 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1891 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1892 switch (adapter->num_rx_queues) {
24025e4e
MC		 1893 case 1:
1894 default:
581d708e 1895 rdba = adapter->rx_ring[0].dma;
581d708e 1896 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1897 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1898 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1899 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1900 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 1901 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1902 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1903 break;
24025e4e
MC		 1904 }
1905
1da177e4 1906 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1907 if (hw->mac_type >= e1000_82543) {
1908 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1909 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1910 rxcsum |= E1000_RXCSUM_TUOFL;
1911
868d5309 1912 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1913 * Must be used in conjunction with packet-split. */
96838a40
JB		 1914 if ((hw->mac_type >= e1000_82571) &&
1915 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1916 rxcsum |= E1000_RXCSUM_IPPCSE;
1917 }
1918 } else {
1919 rxcsum &= ~E1000_RXCSUM_TUOFL;
1920 /* don't need to clear IPPCSE as it defaults to 0 */
1921 }
581d708e 1922 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1923 }
1924
1925 /* Enable Receives */
581d708e 1926 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1927}
1928
1929/**
581d708e 1930 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1931 * @adapter: board private structure
581d708e 1932 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1933 *
1934 * Free all transmit software resources
1935 **/
1936
3ad2cc67 1937static void
581d708e
MC		 1938e1000_free_tx_resources(struct e1000_adapter *adapter,
1939 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1940{
1941 struct pci_dev *pdev = adapter->pdev;
1942
581d708e 1943 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1944
581d708e
MC		 1945 vfree(tx_ring->buffer_info);
1946 tx_ring->buffer_info = NULL;
1da177e4 1947
581d708e 1948 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1949
581d708e
MC		 1950 tx_ring->desc = NULL;
1951}
1952
1953/**
1954 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1955 * @adapter: board private structure
1956 *
1957 * Free all transmit software resources
1958 **/
1959
1960void
1961e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1962{
1963 int i;
1964
f56799ea 1965 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1966 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1967}
1968
e619d523 1969static void
1da177e4
LT		 1970e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1971 struct e1000_buffer *buffer_info)
1972{
96838a40 1973 if (buffer_info->dma) {
2648345f
MC		 1974 pci_unmap_page(adapter->pdev,
1975 buffer_info->dma,
1976 buffer_info->length,
1977 PCI_DMA_TODEVICE);
1da177e4 1978 }
8241e35e 1979 if (buffer_info->skb)
1da177e4 1980 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1981 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1982}
1983
1984/**
1985 * e1000_clean_tx_ring - Free Tx Buffers
1986 * @adapter: board private structure
581d708e 1987 * @tx_ring: ring to be cleaned
1da177e4
LT		 1988 **/
1989
1990static void
581d708e
MC		 1991e1000_clean_tx_ring(struct e1000_adapter *adapter,
1992 struct e1000_tx_ring *tx_ring)
1da177e4 1993{
1da177e4
LT		 1994 struct e1000_buffer *buffer_info;
1995 unsigned long size;
1996 unsigned int i;
1997
1998 /* Free all the Tx ring sk_buffs */
1999
96838a40 2000 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2001 buffer_info = &tx_ring->buffer_info[i];
2002 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2003 }
2004
2005 size = sizeof(struct e1000_buffer) * tx_ring->count;
2006 memset(tx_ring->buffer_info, 0, size);
2007
2008 /* Zero out the descriptor ring */
2009
2010 memset(tx_ring->desc, 0, tx_ring->size);
2011
2012 tx_ring->next_to_use = 0;
2013 tx_ring->next_to_clean = 0;
fd803241 2014 tx_ring->last_tx_tso = 0;
1da177e4 2015
581d708e
MC		 2016 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2017 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2018}
2019
2020/**
2021 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2022 * @adapter: board private structure
2023 **/
2024
2025static void
2026e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2027{
2028 int i;
2029
f56799ea 2030 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2031 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2032}
2033
2034/**
2035 * e1000_free_rx_resources - Free Rx Resources
2036 * @adapter: board private structure
581d708e 2037 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2038 *
2039 * Free all receive software resources
2040 **/
2041
3ad2cc67 2042static void
581d708e
MC		 2043e1000_free_rx_resources(struct e1000_adapter *adapter,
2044 struct e1000_rx_ring *rx_ring)
1da177e4 2045{
1da177e4
LT		 2046 struct pci_dev *pdev = adapter->pdev;
2047
581d708e 2048 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2049
2050 vfree(rx_ring->buffer_info);
2051 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2052 kfree(rx_ring->ps_page);
2053 rx_ring->ps_page = NULL;
2054 kfree(rx_ring->ps_page_dma);
2055 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2056
2057 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2058
2059 rx_ring->desc = NULL;
2060}
2061
2062/**
581d708e 2063 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2064 * @adapter: board private structure
581d708e
MC		 2065 *
2066 * Free all receive software resources
2067 **/
2068
2069void
2070e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2071{
2072 int i;
2073
f56799ea 2074 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2075 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2076}
2077
2078/**
2079 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2080 * @adapter: board private structure
2081 * @rx_ring: ring to free buffers from
1da177e4
LT		 2082 **/
2083
2084static void
581d708e
MC		 2085e1000_clean_rx_ring(struct e1000_adapter *adapter,
2086 struct e1000_rx_ring *rx_ring)
1da177e4 2087{
1da177e4 2088 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2089 struct e1000_ps_page *ps_page;
2090 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2091 struct pci_dev *pdev = adapter->pdev;
2092 unsigned long size;
2d7edb92 2093 unsigned int i, j;
1da177e4
LT		 2094
2095 /* Free all the Rx ring sk_buffs */
96838a40 2096 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2097 buffer_info = &rx_ring->buffer_info[i];
96838a40 2098 if (buffer_info->skb) {
1da177e4
LT		 2099 pci_unmap_single(pdev,
2100 buffer_info->dma,
2101 buffer_info->length,
2102 PCI_DMA_FROMDEVICE);
2103
2104 dev_kfree_skb(buffer_info->skb);
2105 buffer_info->skb = NULL;
997f5cbd
JK		 2106 }
2107 ps_page = &rx_ring->ps_page[i];
2108 ps_page_dma = &rx_ring->ps_page_dma[i];
2109 for (j = 0; j < adapter->rx_ps_pages; j++) {
2110 if (!ps_page->ps_page[j]) break;
2111 pci_unmap_page(pdev,
2112 ps_page_dma->ps_page_dma[j],
2113 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2114 ps_page_dma->ps_page_dma[j] = 0;
2115 put_page(ps_page->ps_page[j]);
2116 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2117 }
2118 }
2119
2120 size = sizeof(struct e1000_buffer) * rx_ring->count;
2121 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2122 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2123 memset(rx_ring->ps_page, 0, size);
2124 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2125 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2126
2127 /* Zero out the descriptor ring */
2128
2129 memset(rx_ring->desc, 0, rx_ring->size);
2130
2131 rx_ring->next_to_clean = 0;
2132 rx_ring->next_to_use = 0;
2133
581d708e
MC		 2134 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2135 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2136}
2137
2138/**
2139 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2140 * @adapter: board private structure
2141 **/
2142
2143static void
2144e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2145{
2146 int i;
2147
f56799ea 2148 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2149 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2150}
2151
2152/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2153 * and memory write and invalidate disabled for certain operations
2154 */
2155static void
2156e1000_enter_82542_rst(struct e1000_adapter *adapter)
2157{
2158 struct net_device *netdev = adapter->netdev;
2159 uint32_t rctl;
2160
2161 e1000_pci_clear_mwi(&adapter->hw);
2162
2163 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2164 rctl |= E1000_RCTL_RST;
2165 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2166 E1000_WRITE_FLUSH(&adapter->hw);
2167 mdelay(5);
2168
96838a40 2169 if (netif_running(netdev))
581d708e 2170 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2171}
2172
2173static void
2174e1000_leave_82542_rst(struct e1000_adapter *adapter)
2175{
2176 struct net_device *netdev = adapter->netdev;
2177 uint32_t rctl;
2178
2179 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2180 rctl &= ~E1000_RCTL_RST;
2181 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2182 E1000_WRITE_FLUSH(&adapter->hw);
2183 mdelay(5);
2184
96838a40 2185 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2186 e1000_pci_set_mwi(&adapter->hw);
2187
96838a40 2188 if (netif_running(netdev)) {
72d64a43
JK		 2189 /* No need to loop, because 82542 supports only 1 queue */
2190 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2191 e1000_configure_rx(adapter);
72d64a43 2192 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2193 }
2194}
2195
2196/**
2197 * e1000_set_mac - Change the Ethernet Address of the NIC
2198 * @netdev: network interface device structure
2199 * @p: pointer to an address structure
2200 *
2201 * Returns 0 on success, negative on failure
2202 **/
2203
2204static int
2205e1000_set_mac(struct net_device *netdev, void *p)
2206{
60490fe0 2207 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2208 struct sockaddr *addr = p;
2209
96838a40 2210 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2211 return -EADDRNOTAVAIL;
2212
2213 /* 82542 2.0 needs to be in reset to write receive address registers */
2214
96838a40 2215 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2216 e1000_enter_82542_rst(adapter);
2217
2218 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2219 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2220
2221 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2222
868d5309
MC		 2223 /* With 82571 controllers, LAA may be overwritten (with the default)
2224 * due to controller reset from the other port. */
2225 if (adapter->hw.mac_type == e1000_82571) {
2226 /* activate the work around */
2227 adapter->hw.laa_is_present = 1;
2228
96838a40
JB		 2229 /* Hold a copy of the LAA in RAR[14] This is done so that
2230 * between the time RAR[0] gets clobbered and the time it
2231 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2232 * of the RARs and no incoming packets directed to this port
96838a40 2233 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2234 * RAR[14] */
96838a40 2235 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2236 E1000_RAR_ENTRIES - 1);
2237 }
2238
96838a40 2239 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2240 e1000_leave_82542_rst(adapter);
2241
2242 return 0;
2243}
2244
2245/**
2246 * e1000_set_multi - Multicast and Promiscuous mode set
2247 * @netdev: network interface device structure
2248 *
2249 * The set_multi entry point is called whenever the multicast address
2250 * list or the network interface flags are updated. This routine is
2251 * responsible for configuring the hardware for proper multicast,
2252 * promiscuous mode, and all-multi behavior.
2253 **/
2254
2255static void
2256e1000_set_multi(struct net_device *netdev)
2257{
60490fe0 2258 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2259 struct e1000_hw *hw = &adapter->hw;
2260 struct dev_mc_list *mc_ptr;
2261 uint32_t rctl;
2262 uint32_t hash_value;
868d5309 2263 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2264 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2265 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2266 E1000_NUM_MTA_REGISTERS;
2267
2268 if (adapter->hw.mac_type == e1000_ich8lan)
2269 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2270
868d5309
MC		 2271 /* reserve RAR[14] for LAA over-write work-around */
2272 if (adapter->hw.mac_type == e1000_82571)
2273 rar_entries--;
1da177e4 2274
2648345f
MC		 2275 /* Check for Promiscuous and All Multicast modes */
2276
1da177e4
LT		 2277 rctl = E1000_READ_REG(hw, RCTL);
2278
96838a40 2279 if (netdev->flags & IFF_PROMISC) {
1da177e4 2280 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2281 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2282 rctl |= E1000_RCTL_MPE;
2283 rctl &= ~E1000_RCTL_UPE;
2284 } else {
2285 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2286 }
2287
2288 E1000_WRITE_REG(hw, RCTL, rctl);
2289
2290 /* 82542 2.0 needs to be in reset to write receive address registers */
2291
96838a40 2292 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2293 e1000_enter_82542_rst(adapter);
2294
2295 /* load the first 14 multicast address into the exact filters 1-14
2296 * RAR 0 is used for the station MAC adddress
2297 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2298 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2299 */
2300 mc_ptr = netdev->mc_list;
2301
96838a40 2302 for (i = 1; i < rar_entries; i++) {
868d5309 2303 if (mc_ptr) {
1da177e4
LT		 2304 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2305 mc_ptr = mc_ptr->next;
2306 } else {
2307 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2308 E1000_WRITE_FLUSH(hw);
1da177e4 2309 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2310 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2311 }
2312 }
2313
2314 /* clear the old settings from the multicast hash table */
2315
cd94dd0b 2316 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2317 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2318 E1000_WRITE_FLUSH(hw);
2319 }
1da177e4
LT		 2320
2321 /* load any remaining addresses into the hash table */
2322
96838a40 2323 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2324 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2325 e1000_mta_set(hw, hash_value);
2326 }
2327
96838a40 2328 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2329 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2330}
2331
2332/* Need to wait a few seconds after link up to get diagnostic information from
2333 * the phy */
2334
2335static void
2336e1000_update_phy_info(unsigned long data)
2337{
2338 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2339 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2340}
2341
2342/**
2343 * e1000_82547_tx_fifo_stall - Timer Call-back
2344 * @data: pointer to adapter cast into an unsigned long
2345 **/
2346
2347static void
2348e1000_82547_tx_fifo_stall(unsigned long data)
2349{
2350 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2351 struct net_device *netdev = adapter->netdev;
2352 uint32_t tctl;
2353
96838a40
JB		 2354 if (atomic_read(&adapter->tx_fifo_stall)) {
2355 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2356 E1000_READ_REG(&adapter->hw, TDH)) &&
2357 (E1000_READ_REG(&adapter->hw, TDFT) ==
2358 E1000_READ_REG(&adapter->hw, TDFH)) &&
2359 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2360 E1000_READ_REG(&adapter->hw, TDFHS))) {
2361 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2362 E1000_WRITE_REG(&adapter->hw, TCTL,
2363 tctl & ~E1000_TCTL_EN);
2364 E1000_WRITE_REG(&adapter->hw, TDFT,
2365 adapter->tx_head_addr);
2366 E1000_WRITE_REG(&adapter->hw, TDFH,
2367 adapter->tx_head_addr);
2368 E1000_WRITE_REG(&adapter->hw, TDFTS,
2369 adapter->tx_head_addr);
2370 E1000_WRITE_REG(&adapter->hw, TDFHS,
2371 adapter->tx_head_addr);
2372 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2373 E1000_WRITE_FLUSH(&adapter->hw);
2374
2375 adapter->tx_fifo_head = 0;
2376 atomic_set(&adapter->tx_fifo_stall, 0);
2377 netif_wake_queue(netdev);
2378 } else {
2379 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2380 }
2381 }
2382}
2383
2384/**
2385 * e1000_watchdog - Timer Call-back
2386 * @data: pointer to adapter cast into an unsigned long
2387 **/
2388static void
2389e1000_watchdog(unsigned long data)
2390{
2391 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2392 struct net_device *netdev = adapter->netdev;
545c67c0 2393 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2394 uint32_t link, tctl;
cd94dd0b
AK		 2395 int32_t ret_val;
2396
2397 ret_val = e1000_check_for_link(&adapter->hw);
2398 if ((ret_val == E1000_ERR_PHY) &&
2399 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2400 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2401 /* See e1000_kumeran_lock_loss_workaround() */
2402 DPRINTK(LINK, INFO,
2403 "Gigabit has been disabled, downgrading speed\n");
2404 }
2d7edb92
MC		 2405 if (adapter->hw.mac_type == e1000_82573) {
2406 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2407 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2408 e1000_update_mng_vlan(adapter);
96838a40 2409 }
1da177e4 2410
96838a40 2411 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2412 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2413 link = !adapter->hw.serdes_link_down;
2414 else
2415 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2416
96838a40
JB		 2417 if (link) {
2418 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2419 boolean_t txb2b = 1;
1da177e4
LT		 2420 e1000_get_speed_and_duplex(&adapter->hw,
2421 &adapter->link_speed,
2422 &adapter->link_duplex);
2423
2424 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2425 adapter->link_speed,
2426 adapter->link_duplex == FULL_DUPLEX ?
2427 "Full Duplex" : "Half Duplex");
2428
7e6c9861
JK		 2429 /* tweak tx_queue_len according to speed/duplex
2430 * and adjust the timeout factor */
66a2b0a3
JK		 2431 netdev->tx_queue_len = adapter->tx_queue_len;
2432 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2433 switch (adapter->link_speed) {
2434 case SPEED_10:
fe7fe28e 2435 txb2b = 0;
7e6c9861
JK		 2436 netdev->tx_queue_len = 10;
2437 adapter->tx_timeout_factor = 8;
2438 break;
2439 case SPEED_100:
fe7fe28e 2440 txb2b = 0;
7e6c9861
JK		 2441 netdev->tx_queue_len = 100;
2442 /* maybe add some timeout factor ? */
2443 break;
2444 }
2445
fe7fe28e 2446 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2447 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2448 txb2b == 0) {
7e6c9861
JK		 2449#define SPEED_MODE_BIT (1 << 21)
2450 uint32_t tarc0;
2451 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2452 tarc0 &= ~SPEED_MODE_BIT;
2453 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2454 }
2455
2456#ifdef NETIF_F_TSO
2457 /* disable TSO for pcie and 10/100 speeds, to avoid
2458 * some hardware issues */
2459 if (!adapter->tso_force &&
2460 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2461 switch (adapter->link_speed) {
2462 case SPEED_10:
66a2b0a3 2463 case SPEED_100:
7e6c9861
JK		 2464 DPRINTK(PROBE,INFO,
2465 "10/100 speed: disabling TSO\n");
2466 netdev->features &= ~NETIF_F_TSO;
2467 break;
2468 case SPEED_1000:
2469 netdev->features |= NETIF_F_TSO;
2470 break;
2471 default:
2472 /* oops */
66a2b0a3
JK		 2473 break;
2474 }
2475 }
7e6c9861
JK		 2476#endif
2477
2478 /* enable transmits in the hardware, need to do this
2479 * after setting TARC0 */
2480 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2481 tctl |= E1000_TCTL_EN;
2482 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2483
1da177e4
LT		 2484 netif_carrier_on(netdev);
2485 netif_wake_queue(netdev);
2486 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2487 adapter->smartspeed = 0;
2488 }
2489 } else {
96838a40 2490 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2491 adapter->link_speed = 0;
2492 adapter->link_duplex = 0;
2493 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2494 netif_carrier_off(netdev);
2495 netif_stop_queue(netdev);
2496 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2497
2498 /* 80003ES2LAN workaround--
2499 * For packet buffer work-around on link down event;
2500 * disable receives in the ISR and
2501 * reset device here in the watchdog
2502 */
8fc897b0 2503 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2504 /* reset device */
2505 schedule_work(&adapter->reset_task);
1da177e4
LT		 2506 }
2507
2508 e1000_smartspeed(adapter);
2509 }
2510
2511 e1000_update_stats(adapter);
2512
2513 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2514 adapter->tpt_old = adapter->stats.tpt;
2515 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2516 adapter->colc_old = adapter->stats.colc;
2517
2518 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2519 adapter->gorcl_old = adapter->stats.gorcl;
2520 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2521 adapter->gotcl_old = adapter->stats.gotcl;
2522
2523 e1000_update_adaptive(&adapter->hw);
2524
f56799ea 2525 if (!netif_carrier_ok(netdev)) {
581d708e 2526 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2527 /* We've lost link, so the controller stops DMA,
2528 * but we've got queued Tx work that's never going
2529 * to get done, so reset controller to flush Tx.
2530 * (Do the reset outside of interrupt context). */
87041639
JK		 2531 adapter->tx_timeout_count++;
2532 schedule_work(&adapter->reset_task);
1da177e4
LT		 2533 }
2534 }
2535
2536 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2537 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2538 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2539 * asymmetrical Tx or Rx gets ITR=8000; everyone
2540 * else is between 2000-8000. */
2541 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2542 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2543 adapter->gotcl - adapter->gorcl :
2544 adapter->gorcl - adapter->gotcl) / 10000;
2545 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2546 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2547 }
2548
2549 /* Cause software interrupt to ensure rx ring is cleaned */
2550 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2551
2648345f 2552 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2553 adapter->detect_tx_hung = TRUE;
2554
96838a40 2555 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2556 * reset from the other port. Set the appropriate LAA in RAR[0] */
2557 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2558 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2559
1da177e4
LT		 2560 /* Reset the timer */
2561 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2562}
2563
2564#define E1000_TX_FLAGS_CSUM 0x00000001
2565#define E1000_TX_FLAGS_VLAN 0x00000002
2566#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2567#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2568#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2569#define E1000_TX_FLAGS_VLAN_SHIFT 16
2570
e619d523 2571static int
581d708e
MC		 2572e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2573 struct sk_buff *skb)
1da177e4
LT		 2574{
2575#ifdef NETIF_F_TSO
2576 struct e1000_context_desc *context_desc;
545c67c0 2577 struct e1000_buffer *buffer_info;
1da177e4
LT		 2578 unsigned int i;
2579 uint32_t cmd_length = 0;
2d7edb92 2580 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2581 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2582 int err;
2583
89114afd 2584 if (skb_is_gso(skb)) {
1da177e4
LT		 2585 if (skb_header_cloned(skb)) {
2586 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2587 if (err)
2588 return err;
2589 }
2590
2591 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2592 mss = skb_shinfo(skb)->gso_size;
60828236 2593 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2594 skb->nh.iph->tot_len = 0;
2595 skb->nh.iph->check = 0;
2596 skb->h.th->check =
2597 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2598 skb->nh.iph->daddr,
2599 0,
2600 IPPROTO_TCP,
2601 0);
2602 cmd_length = E1000_TXD_CMD_IP;
2603 ipcse = skb->h.raw - skb->data - 1;
2604#ifdef NETIF_F_TSO_IPV6
e15fdd03 2605 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2606 skb->nh.ipv6h->payload_len = 0;
2607 skb->h.th->check =
2608 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2609 &skb->nh.ipv6h->daddr,
2610 0,
2611 IPPROTO_TCP,
2612 0);
2613 ipcse = 0;
2614#endif
2615 }
1da177e4
LT		 2616 ipcss = skb->nh.raw - skb->data;
2617 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2618 tucss = skb->h.raw - skb->data;
2619 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2620 tucse = 0;
2621
2622 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2623 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2624
581d708e
MC		 2625 i = tx_ring->next_to_use;
2626 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2627 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2628
2629 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2630 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2631 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2632 context_desc->upper_setup.tcp_fields.tucss = tucss;
2633 context_desc->upper_setup.tcp_fields.tucso = tucso;
2634 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2635 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2636 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2637 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2638
545c67c0
JK		 2639 buffer_info->time_stamp = jiffies;
2640
581d708e
MC		 2641 if (++i == tx_ring->count) i = 0;
2642 tx_ring->next_to_use = i;
1da177e4 2643
8241e35e 2644 return TRUE;
1da177e4
LT		 2645 }
2646#endif
2647
8241e35e 2648 return FALSE;
1da177e4
LT		 2649}
2650
e619d523 2651static boolean_t
581d708e
MC		 2652e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2653 struct sk_buff *skb)
1da177e4
LT		 2654{
2655 struct e1000_context_desc *context_desc;
545c67c0 2656 struct e1000_buffer *buffer_info;
1da177e4
LT		 2657 unsigned int i;
2658 uint8_t css;
2659
84fa7933 2660 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1da177e4
LT		 2661 css = skb->h.raw - skb->data;
2662
581d708e 2663 i = tx_ring->next_to_use;
545c67c0 2664 buffer_info = &tx_ring->buffer_info[i];
581d708e 2665 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2666
2667 context_desc->upper_setup.tcp_fields.tucss = css;
2668 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2669 context_desc->upper_setup.tcp_fields.tucse = 0;
2670 context_desc->tcp_seg_setup.data = 0;
2671 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2672
545c67c0
JK		 2673 buffer_info->time_stamp = jiffies;
2674
581d708e
MC		 2675 if (unlikely(++i == tx_ring->count)) i = 0;
2676 tx_ring->next_to_use = i;
1da177e4
LT		 2677
2678 return TRUE;
2679 }
2680
2681 return FALSE;
2682}
2683
2684#define E1000_MAX_TXD_PWR 12
2685#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2686
e619d523 2687static int
581d708e
MC		 2688e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2689 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2690 unsigned int nr_frags, unsigned int mss)
1da177e4 2691{
1da177e4
LT		 2692 struct e1000_buffer *buffer_info;
2693 unsigned int len = skb->len;
2694 unsigned int offset = 0, size, count = 0, i;
2695 unsigned int f;
2696 len -= skb->data_len;
2697
2698 i = tx_ring->next_to_use;
2699
96838a40 2700 while (len) {
1da177e4
LT		 2701 buffer_info = &tx_ring->buffer_info[i];
2702 size = min(len, max_per_txd);
2703#ifdef NETIF_F_TSO
fd803241
JK		 2704 /* Workaround for Controller erratum --
2705 * descriptor for non-tso packet in a linear SKB that follows a
2706 * tso gets written back prematurely before the data is fully
0f15a8fa 2707 * DMA'd to the controller */
fd803241 2708 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2709 !skb_is_gso(skb)) {
fd803241
JK		 2710 tx_ring->last_tx_tso = 0;
2711 size -= 4;
2712 }
2713
1da177e4
LT		 2714 /* Workaround for premature desc write-backs
2715 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2716 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2717 size -= 4;
2718#endif
97338bde
MC		 2719 /* work-around for errata 10 and it applies
2720 * to all controllers in PCI-X mode
2721 * The fix is to make sure that the first descriptor of a
2722 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2723 */
96838a40 2724 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2725 (size > 2015) && count == 0))
2726 size = 2015;
96838a40 2727
1da177e4
LT		 2728 /* Workaround for potential 82544 hang in PCI-X. Avoid
2729 * terminating buffers within evenly-aligned dwords. */
96838a40 2730 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2731 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2732 size > 4))
2733 size -= 4;
2734
2735 buffer_info->length = size;
2736 buffer_info->dma =
2737 pci_map_single(adapter->pdev,
2738 skb->data + offset,
2739 size,
2740 PCI_DMA_TODEVICE);
2741 buffer_info->time_stamp = jiffies;
2742
2743 len -= size;
2744 offset += size;
2745 count++;
96838a40 2746 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2747 }
2748
96838a40 2749 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2750 struct skb_frag_struct *frag;
2751
2752 frag = &skb_shinfo(skb)->frags[f];
2753 len = frag->size;
2754 offset = frag->page_offset;
2755
96838a40 2756 while (len) {
1da177e4
LT		 2757 buffer_info = &tx_ring->buffer_info[i];
2758 size = min(len, max_per_txd);
2759#ifdef NETIF_F_TSO
2760 /* Workaround for premature desc write-backs
2761 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2762 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2763 size -= 4;
2764#endif
2765 /* Workaround for potential 82544 hang in PCI-X.
2766 * Avoid terminating buffers within evenly-aligned
2767 * dwords. */
96838a40 2768 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2769 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2770 size > 4))
2771 size -= 4;
2772
2773 buffer_info->length = size;
2774 buffer_info->dma =
2775 pci_map_page(adapter->pdev,
2776 frag->page,
2777 offset,
2778 size,
2779 PCI_DMA_TODEVICE);
2780 buffer_info->time_stamp = jiffies;
2781
2782 len -= size;
2783 offset += size;
2784 count++;
96838a40 2785 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2786 }
2787 }
2788
2789 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2790 tx_ring->buffer_info[i].skb = skb;
2791 tx_ring->buffer_info[first].next_to_watch = i;
2792
2793 return count;
2794}
2795
e619d523 2796static void
581d708e
MC		 2797e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2798 int tx_flags, int count)
1da177e4 2799{
1da177e4
LT		 2800 struct e1000_tx_desc *tx_desc = NULL;
2801 struct e1000_buffer *buffer_info;
2802 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2803 unsigned int i;
2804
96838a40 2805 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2806 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2807 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2808 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2809
96838a40 2810 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2811 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2812 }
2813
96838a40 2814 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2815 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2816 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2817 }
2818
96838a40 2819 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2820 txd_lower |= E1000_TXD_CMD_VLE;
2821 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2822 }
2823
2824 i = tx_ring->next_to_use;
2825
96838a40 2826 while (count--) {
1da177e4
LT		 2827 buffer_info = &tx_ring->buffer_info[i];
2828 tx_desc = E1000_TX_DESC(*tx_ring, i);
2829 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2830 tx_desc->lower.data =
2831 cpu_to_le32(txd_lower | buffer_info->length);
2832 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2833 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2834 }
2835
2836 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2837
2838 /* Force memory writes to complete before letting h/w
2839 * know there are new descriptors to fetch. (Only
2840 * applicable for weak-ordered memory model archs,
2841 * such as IA-64). */
2842 wmb();
2843
2844 tx_ring->next_to_use = i;
581d708e 2845 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2846}
2847
2848/**
2849 * 82547 workaround to avoid controller hang in half-duplex environment.
2850 * The workaround is to avoid queuing a large packet that would span
2851 * the internal Tx FIFO ring boundary by notifying the stack to resend
2852 * the packet at a later time. This gives the Tx FIFO an opportunity to
2853 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2854 * to the beginning of the Tx FIFO.
2855 **/
2856
2857#define E1000_FIFO_HDR 0x10
2858#define E1000_82547_PAD_LEN 0x3E0
2859
e619d523 2860static int
1da177e4
LT		 2861e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2862{
2863 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2864 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2865
2866 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2867
96838a40 2868 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2869 goto no_fifo_stall_required;
2870
96838a40 2871 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2872 return 1;
2873
96838a40 2874 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2875 atomic_set(&adapter->tx_fifo_stall, 1);
2876 return 1;
2877 }
2878
2879no_fifo_stall_required:
2880 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2881 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2882 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2883 return 0;
2884}
2885
2d7edb92 2886#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2887static int
2d7edb92
MC		 2888e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2889{
2890 struct e1000_hw *hw = &adapter->hw;
2891 uint16_t length, offset;
96838a40
JB		 2892 if (vlan_tx_tag_present(skb)) {
2893 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2894 ( adapter->hw.mng_cookie.status &
2895 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2896 return 0;
2897 }
20a44028 2898 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2899 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2900 if ((htons(ETH_P_IP) == eth->h_proto)) {
2901 const struct iphdr *ip =
2d7edb92 2902 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2903 if (IPPROTO_UDP == ip->protocol) {
2904 struct udphdr *udp =
2905 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2906 (ip->ihl << 2));
96838a40 2907 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2908 offset = (uint8_t *)udp + 8 - skb->data;
2909 length = skb->len - offset;
2910
2911 return e1000_mng_write_dhcp_info(hw,
96838a40 2912 (uint8_t *)udp + 8,
2d7edb92
MC		 2913 length);
2914 }
2915 }
2916 }
2917 }
2918 return 0;
2919}
2920
65c7973f
JB		 2921static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2922{
2923 struct e1000_adapter *adapter = netdev_priv(netdev);
2924 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2925
2926 netif_stop_queue(netdev);
2927 /* Herbert's original patch had:
2928 * smp_mb__after_netif_stop_queue();
2929 * but since that doesn't exist yet, just open code it. */
2930 smp_mb();
2931
2932 /* We need to check again in a case another CPU has just
2933 * made room available. */
2934 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2935 return -EBUSY;
2936
2937 /* A reprieve! */
2938 netif_start_queue(netdev);
2939 return 0;
2940}
2941
2942static int e1000_maybe_stop_tx(struct net_device *netdev,
2943 struct e1000_tx_ring *tx_ring, int size)
2944{
2945 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2946 return 0;
2947 return __e1000_maybe_stop_tx(netdev, size);
2948}
2949
1da177e4
LT		 2950#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2951static int
2952e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2953{
60490fe0 2954 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2955 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2956 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2957 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2958 unsigned int tx_flags = 0;
2959 unsigned int len = skb->len;
2960 unsigned long flags;
2961 unsigned int nr_frags = 0;
2962 unsigned int mss = 0;
2963 int count = 0;
76c224bc 2964 int tso;
1da177e4
LT		 2965 unsigned int f;
2966 len -= skb->data_len;
2967
65c7973f
JB		 2968 /* This goes back to the question of how to logically map a tx queue
2969 * to a flow. Right now, performance is impacted slightly negatively
2970 * if using multiple tx queues. If the stack breaks away from a
2971 * single qdisc implementation, we can look at this again. */
581d708e 2972 tx_ring = adapter->tx_ring;
24025e4e 2973
581d708e 2974 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2975 dev_kfree_skb_any(skb);
2976 return NETDEV_TX_OK;
2977 }
2978
2979#ifdef NETIF_F_TSO
7967168c 2980 mss = skb_shinfo(skb)->gso_size;
76c224bc 2981 /* The controller does a simple calculation to
1da177e4
LT		 2982 * make sure there is enough room in the FIFO before
2983 * initiating the DMA for each buffer. The calc is:
2984 * 4 = ceil(buffer len/mss). To make sure we don't
2985 * overrun the FIFO, adjust the max buffer len if mss
2986 * drops. */
96838a40 2987 if (mss) {
9a3056da 2988 uint8_t hdr_len;
1da177e4
LT		 2989 max_per_txd = min(mss << 2, max_per_txd);
2990 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2991
9f687888 2992 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2993 * points to just header, pull a few bytes of payload from
2994 * frags into skb->data */
2995 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2996 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2997 switch (adapter->hw.mac_type) {
2998 unsigned int pull_size;
2999 case e1000_82571:
3000 case e1000_82572:
3001 case e1000_82573:
cd94dd0b 3002 case e1000_ich8lan:
9f687888
JK		 3003 pull_size = min((unsigned int)4, skb->data_len);
3004 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3005 DPRINTK(DRV, ERR,
9f687888
JK		 3006 "__pskb_pull_tail failed.\n");
3007 dev_kfree_skb_any(skb);
749dfc70 3008 return NETDEV_TX_OK;
9f687888
JK		 3009 }
3010 len = skb->len - skb->data_len;
3011 break;
3012 default:
3013 /* do nothing */
3014 break;
d74bbd3b 3015 }
9a3056da 3016 }
1da177e4
LT		 3017 }
3018
9a3056da 3019 /* reserve a descriptor for the offload context */
84fa7933 3020 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3021 count++;
2648345f 3022 count++;
1da177e4 3023#else
84fa7933 3024 if (skb->ip_summed == CHECKSUM_PARTIAL)
1da177e4
LT		 3025 count++;
3026#endif
fd803241
JK		 3027
3028#ifdef NETIF_F_TSO
3029 /* Controller Erratum workaround */
89114afd 3030 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 3031 count++;
3032#endif
3033
1da177e4
LT		 3034 count += TXD_USE_COUNT(len, max_txd_pwr);
3035
96838a40 3036 if (adapter->pcix_82544)
1da177e4
LT		 3037 count++;
3038
96838a40 3039 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3040 * in PCI-X mode, so add one more descriptor to the count
3041 */
96838a40 3042 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3043 (len > 2015)))
3044 count++;
3045
1da177e4 3046 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3047 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3048 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3049 max_txd_pwr);
96838a40 3050 if (adapter->pcix_82544)
1da177e4
LT		 3051 count += nr_frags;
3052
0f15a8fa
JK		 3053
3054 if (adapter->hw.tx_pkt_filtering &&
3055 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3056 e1000_transfer_dhcp_info(adapter, skb);
3057
581d708e
MC		 3058 local_irq_save(flags);
3059 if (!spin_trylock(&tx_ring->tx_lock)) {
3060 /* Collision - tell upper layer to requeue */
3061 local_irq_restore(flags);
3062 return NETDEV_TX_LOCKED;
3063 }
1da177e4
LT		 3064
3065 /* need: count + 2 desc gap to keep tail from touching
3066 * head, otherwise try next time */
65c7973f 3067 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3068 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3069 return NETDEV_TX_BUSY;
3070 }
3071
96838a40
JB		 3072 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3073 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 3074 netif_stop_queue(netdev);
3075 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 3076 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3077 return NETDEV_TX_BUSY;
3078 }
3079 }
3080
96838a40 3081 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3082 tx_flags |= E1000_TX_FLAGS_VLAN;
3083 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3084 }
3085
581d708e 3086 first = tx_ring->next_to_use;
96838a40 3087
581d708e 3088 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3089 if (tso < 0) {
3090 dev_kfree_skb_any(skb);
581d708e 3091 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3092 return NETDEV_TX_OK;
3093 }
3094
fd803241
JK		 3095 if (likely(tso)) {
3096 tx_ring->last_tx_tso = 1;
1da177e4 3097 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3098 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3099 tx_flags |= E1000_TX_FLAGS_CSUM;
3100
2d7edb92 3101 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3102 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3103 * no longer assume, we must. */
60828236 3104 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3105 tx_flags |= E1000_TX_FLAGS_IPV4;
3106
581d708e
MC		 3107 e1000_tx_queue(adapter, tx_ring, tx_flags,
3108 e1000_tx_map(adapter, tx_ring, skb, first,
3109 max_per_txd, nr_frags, mss));
1da177e4
LT		 3110
3111 netdev->trans_start = jiffies;
3112
3113 /* Make sure there is space in the ring for the next send. */
65c7973f 3114 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3115
581d708e 3116 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3117 return NETDEV_TX_OK;
3118}
3119
3120/**
3121 * e1000_tx_timeout - Respond to a Tx Hang
3122 * @netdev: network interface device structure
3123 **/
3124
3125static void
3126e1000_tx_timeout(struct net_device *netdev)
3127{
60490fe0 3128 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3129
3130 /* Do the reset outside of interrupt context */
87041639
JK		 3131 adapter->tx_timeout_count++;
3132 schedule_work(&adapter->reset_task);
1da177e4
LT		 3133}
3134
3135static void
87041639 3136e1000_reset_task(struct net_device *netdev)
1da177e4 3137{
60490fe0 3138 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3139
2db10a08 3140 e1000_reinit_locked(adapter);
1da177e4
LT		 3141}
3142
3143/**
3144 * e1000_get_stats - Get System Network Statistics
3145 * @netdev: network interface device structure
3146 *
3147 * Returns the address of the device statistics structure.
3148 * The statistics are actually updated from the timer callback.
3149 **/
3150
3151static struct net_device_stats *
3152e1000_get_stats(struct net_device *netdev)
3153{
60490fe0 3154 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3155
6b7660cd 3156 /* only return the current stats */
1da177e4
LT		 3157 return &adapter->net_stats;
3158}
3159
3160/**
3161 * e1000_change_mtu - Change the Maximum Transfer Unit
3162 * @netdev: network interface device structure
3163 * @new_mtu: new value for maximum frame size
3164 *
3165 * Returns 0 on success, negative on failure
3166 **/
3167
3168static int
3169e1000_change_mtu(struct net_device *netdev, int new_mtu)
3170{
60490fe0 3171 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3172 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3173 uint16_t eeprom_data = 0;
1da177e4 3174
96838a40
JB		 3175 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3176 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3177 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3178 return -EINVAL;
2d7edb92 3179 }
1da177e4 3180
997f5cbd
JK		 3181 /* Adapter-specific max frame size limits. */
3182 switch (adapter->hw.mac_type) {
9e2feace 3183 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3184 case e1000_ich8lan:
997f5cbd
JK		 3185 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3186 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3187 return -EINVAL;
2d7edb92 3188 }
997f5cbd 3189 break;
85b22eb6 3190 case e1000_82573:
249d71d6
BA		 3191 /* Jumbo Frames not supported if:
3192 * - this is not an 82573L device
3193 * - ASPM is enabled in any way (0x1A bits 3:2) */
85b22eb6
JK		 3194 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3195 &eeprom_data);
249d71d6
BA		 3196 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3197 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3198 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3199 DPRINTK(PROBE, ERR,
3200 "Jumbo Frames not supported.\n");
3201 return -EINVAL;
3202 }
3203 break;
3204 }
249d71d6
BA		 3205 /* ERT will be enabled later to enable wire speed receives */
3206
85b22eb6 3207 /* fall through to get support */
997f5cbd
JK		 3208 case e1000_82571:
3209 case e1000_82572:
87041639 3210 case e1000_80003es2lan:
997f5cbd
JK		 3211#define MAX_STD_JUMBO_FRAME_SIZE 9234
3212 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3213 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3214 return -EINVAL;
3215 }
3216 break;
3217 default:
3218 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3219 break;
1da177e4
LT		 3220 }
3221
87f5032e 3222 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3223 * means we reserve 2 more, this pushes us to allocate from the next
3224 * larger slab size
3225 * i.e. RXBUFFER_2048 --> size-4096 slab */
3226
3227 if (max_frame <= E1000_RXBUFFER_256)
3228 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3229 else if (max_frame <= E1000_RXBUFFER_512)
3230 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3231 else if (max_frame <= E1000_RXBUFFER_1024)
3232 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3233 else if (max_frame <= E1000_RXBUFFER_2048)
3234 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3235 else if (max_frame <= E1000_RXBUFFER_4096)
3236 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3237 else if (max_frame <= E1000_RXBUFFER_8192)
3238 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3239 else if (max_frame <= E1000_RXBUFFER_16384)
3240 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3241
3242 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3243 if (!adapter->hw.tbi_compatibility_on &&
3244 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3245 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3246 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3247
2d7edb92
MC		 3248 netdev->mtu = new_mtu;
3249
2db10a08
AK		 3250 if (netif_running(netdev))
3251 e1000_reinit_locked(adapter);
1da177e4 3252
1da177e4
LT		 3253 adapter->hw.max_frame_size = max_frame;
3254
3255 return 0;
3256}
3257
3258/**
3259 * e1000_update_stats - Update the board statistics counters
3260 * @adapter: board private structure
3261 **/
3262
3263void
3264e1000_update_stats(struct e1000_adapter *adapter)
3265{
3266 struct e1000_hw *hw = &adapter->hw;
282f33c9 3267 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3268 unsigned long flags;
3269 uint16_t phy_tmp;
3270
3271#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3272
282f33c9
LV		 3273 /*
3274 * Prevent stats update while adapter is being reset, or if the pci
3275 * connection is down.
3276 */
9026729b 3277 if (adapter->link_speed == 0)
282f33c9
LV		 3278 return;
3279 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3280 return;
3281
1da177e4
LT		 3282 spin_lock_irqsave(&adapter->stats_lock, flags);
3283
3284 /* these counters are modified from e1000_adjust_tbi_stats,
3285 * called from the interrupt context, so they must only
3286 * be written while holding adapter->stats_lock
3287 */
3288
3289 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3290 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3291 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3292 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3293 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3294 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3295 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3296
3297 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3298 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3299 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3300 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3301 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3302 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3303 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3304 }
1da177e4
LT		 3305
3306 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3307 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3308 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3309 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3310 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3311 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3312 adapter->stats.dc += E1000_READ_REG(hw, DC);
3313 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3314 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3315 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3316 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3317 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3318 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3319 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3320 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3321 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3322 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3323 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3324 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3325 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3326 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3327 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3328 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3329 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3330 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3331 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3332
3333 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3334 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3335 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3336 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3337 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3338 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3339 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3340 }
3341
1da177e4
LT		 3342 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3343 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3344
3345 /* used for adaptive IFS */
3346
3347 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3348 adapter->stats.tpt += hw->tx_packet_delta;
3349 hw->collision_delta = E1000_READ_REG(hw, COLC);
3350 adapter->stats.colc += hw->collision_delta;
3351
96838a40 3352 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3353 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3354 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3355 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3356 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3357 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3358 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3359 }
96838a40 3360 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3361 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3362 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3363
3364 if (adapter->hw.mac_type != e1000_ich8lan) {
2d7edb92
MC		 3365 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3366 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3367 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3368 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3369 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3370 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3371 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3372 }
2d7edb92 3373 }
1da177e4
LT		 3374
3375 /* Fill out the OS statistics structure */
3376
3377 adapter->net_stats.rx_packets = adapter->stats.gprc;
3378 adapter->net_stats.tx_packets = adapter->stats.gptc;
3379 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3380 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3381 adapter->net_stats.multicast = adapter->stats.mprc;
3382 adapter->net_stats.collisions = adapter->stats.colc;
3383
3384 /* Rx Errors */
3385
87041639
JK		 3386 /* RLEC on some newer hardware can be incorrect so build
3387 * our own version based on RUC and ROC */
1da177e4
LT		 3388 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3389 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3390 adapter->stats.ruc + adapter->stats.roc +
3391 adapter->stats.cexterr;
49559854
MW		 3392 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3393 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3394 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3395 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3396 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3397
3398 /* Tx Errors */
49559854
MW		 3399 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3400 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3401 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3402 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3403 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3404
3405 /* Tx Dropped needs to be maintained elsewhere */
3406
3407 /* Phy Stats */
3408
96838a40
JB		 3409 if (hw->media_type == e1000_media_type_copper) {
3410 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3411 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3412 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3413 adapter->phy_stats.idle_errors += phy_tmp;
3414 }
3415
96838a40 3416 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3417 (hw->phy_type == e1000_phy_m88) &&
3418 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3419 adapter->phy_stats.receive_errors += phy_tmp;
3420 }
3421
3422 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3423}
3424
3425/**
3426 * e1000_intr - Interrupt Handler
3427 * @irq: interrupt number
3428 * @data: pointer to a network interface device structure
3429 * @pt_regs: CPU registers structure
3430 **/
3431
3432static irqreturn_t
3433e1000_intr(int irq, void *data, struct pt_regs *regs)
3434{
3435 struct net_device *netdev = data;
60490fe0 3436 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3437 struct e1000_hw *hw = &adapter->hw;
87041639 3438 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3439#ifndef CONFIG_E1000_NAPI
581d708e 3440 int i;
1e613fd9
JK		 3441#else
3442 /* Interrupt Auto-Mask...upon reading ICR,
3443 * interrupts are masked. No need for the
3444 * IMC write, but it does mean we should
3445 * account for it ASAP. */
3446 if (likely(hw->mac_type >= e1000_82571))
3447 atomic_inc(&adapter->irq_sem);
be2b28ed 3448#endif
1da177e4 3449
1e613fd9
JK		 3450 if (unlikely(!icr)) {
3451#ifdef CONFIG_E1000_NAPI
3452 if (hw->mac_type >= e1000_82571)
3453 e1000_irq_enable(adapter);
3454#endif
1da177e4 3455 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3456 }
1da177e4 3457
96838a40 3458 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3459 hw->get_link_status = 1;
87041639
JK		 3460 /* 80003ES2LAN workaround--
3461 * For packet buffer work-around on link down event;
3462 * disable receives here in the ISR and
3463 * reset adapter in watchdog
3464 */
3465 if (netif_carrier_ok(netdev) &&
3466 (adapter->hw.mac_type == e1000_80003es2lan)) {
3467 /* disable receives */
3468 rctl = E1000_READ_REG(hw, RCTL);
3469 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3470 }
1da177e4
LT		 3471 mod_timer(&adapter->watchdog_timer, jiffies);
3472 }
3473
3474#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3475 if (unlikely(hw->mac_type < e1000_82571)) {
3476 atomic_inc(&adapter->irq_sem);
3477 E1000_WRITE_REG(hw, IMC, ~0);
3478 E1000_WRITE_FLUSH(hw);
3479 }
d3d9e484
AK		 3480 if (likely(netif_rx_schedule_prep(netdev)))
3481 __netif_rx_schedule(netdev);
581d708e
MC		 3482 else
3483 e1000_irq_enable(adapter);
c1605eb3 3484#else
1da177e4 3485 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3486 * Due to Hub Link bus being occupied, an interrupt
3487 * de-assertion message is not able to be sent.
3488 * When an interrupt assertion message is generated later,
3489 * two messages are re-ordered and sent out.
3490 * That causes APIC to think 82547 is in de-assertion
3491 * state, while 82547 is in assertion state, resulting
3492 * in dead lock. Writing IMC forces 82547 into
3493 * de-assertion state.
3494 */
3495 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3496 atomic_inc(&adapter->irq_sem);
2648345f 3497 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3498 }
3499
96838a40
JB		 3500 for (i = 0; i < E1000_MAX_INTR; i++)
3501 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3502 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3503 break;
3504
96838a40 3505 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3506 e1000_irq_enable(adapter);
581d708e 3507
c1605eb3 3508#endif
1da177e4
LT		 3509
3510 return IRQ_HANDLED;
3511}
3512
3513#ifdef CONFIG_E1000_NAPI
3514/**
3515 * e1000_clean - NAPI Rx polling callback
3516 * @adapter: board private structure
3517 **/
3518
3519static int
581d708e 3520e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3521{
581d708e
MC		 3522 struct e1000_adapter *adapter;
3523 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3524 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3525
3526 /* Must NOT use netdev_priv macro here. */
3527 adapter = poll_dev->priv;
3528
3529 /* Keep link state information with original netdev */
d3d9e484 3530 if (!netif_carrier_ok(poll_dev))
581d708e 3531 goto quit_polling;
2648345f 3532
d3d9e484
AK		 3533 /* e1000_clean is called per-cpu. This lock protects
3534 * tx_ring[0] from being cleaned by multiple cpus
3535 * simultaneously. A failure obtaining the lock means
3536 * tx_ring[0] is currently being cleaned anyway. */
3537 if (spin_trylock(&adapter->tx_queue_lock)) {
3538 tx_cleaned = e1000_clean_tx_irq(adapter,
3539 &adapter->tx_ring[0]);
3540 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3541 }
3542
d3d9e484 3543 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3544 &work_done, work_to_do);
1da177e4
LT		 3545
3546 *budget -= work_done;
581d708e 3547 poll_dev->quota -= work_done;
96838a40 3548
2b02893e 3549 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3550 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3551 !netif_running(poll_dev)) {
581d708e
MC		 3552quit_polling:
3553 netif_rx_complete(poll_dev);
1da177e4
LT		 3554 e1000_irq_enable(adapter);
3555 return 0;
3556 }
3557
3558 return 1;
3559}
3560
3561#endif
3562/**
3563 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3564 * @adapter: board private structure
3565 **/
3566
3567static boolean_t
581d708e
MC		 3568e1000_clean_tx_irq(struct e1000_adapter *adapter,
3569 struct e1000_tx_ring *tx_ring)
1da177e4 3570{
1da177e4
LT		 3571 struct net_device *netdev = adapter->netdev;
3572 struct e1000_tx_desc *tx_desc, *eop_desc;
3573 struct e1000_buffer *buffer_info;
3574 unsigned int i, eop;
2a1af5d7
JK		 3575#ifdef CONFIG_E1000_NAPI
3576 unsigned int count = 0;
3577#endif
1da177e4
LT		 3578 boolean_t cleaned = FALSE;
3579
3580 i = tx_ring->next_to_clean;
3581 eop = tx_ring->buffer_info[i].next_to_watch;
3582 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3583
581d708e 3584 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3585 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3586 tx_desc = E1000_TX_DESC(*tx_ring, i);
3587 buffer_info = &tx_ring->buffer_info[i];
3588 cleaned = (i == eop);
3589
fd803241 3590 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3591 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3592
96838a40 3593 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3594 }
581d708e 3595
7bfa4816 3596
1da177e4
LT		 3597 eop = tx_ring->buffer_info[i].next_to_watch;
3598 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3599#ifdef CONFIG_E1000_NAPI
3600#define E1000_TX_WEIGHT 64
3601 /* weight of a sort for tx, to avoid endless transmit cleanup */
3602 if (count++ == E1000_TX_WEIGHT) break;
3603#endif
1da177e4
LT		 3604 }
3605
3606 tx_ring->next_to_clean = i;
3607
77b2aad5 3608#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3609 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3610 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3611 /* Make sure that anybody stopping the queue after this
3612 * sees the new next_to_clean.
3613 */
3614 smp_mb();
3615 if (netif_queue_stopped(netdev))
77b2aad5 3616 netif_wake_queue(netdev);
77b2aad5 3617 }
2648345f 3618
581d708e 3619 if (adapter->detect_tx_hung) {
2648345f 3620 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3621 * check with the clearing of time_stamp and movement of i */
3622 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3623 if (tx_ring->buffer_info[eop].dma &&
3624 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3625 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3626 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3627 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3628
3629 /* detected Tx unit hang */
c6963ef5 3630 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3631 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3632 " TDH <%x>\n"
3633 " TDT <%x>\n"
3634 " next_to_use <%x>\n"
3635 " next_to_clean <%x>\n"
3636 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3637 " time_stamp <%lx>\n"
3638 " next_to_watch <%x>\n"
3639 " jiffies <%lx>\n"
3640 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3641 (unsigned long)((tx_ring - adapter->tx_ring) /
3642 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3643 readl(adapter->hw.hw_addr + tx_ring->tdh),
3644 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3645 tx_ring->next_to_use,
392137fa
JK		 3646 tx_ring->next_to_clean,
3647 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3648 eop,
3649 jiffies,
3650 eop_desc->upper.fields.status);
1da177e4 3651 netif_stop_queue(netdev);
70b8f1e1 3652 }
1da177e4 3653 }
1da177e4
LT		 3654 return cleaned;
3655}
3656
3657/**
3658 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3659 * @adapter: board private structure
3660 * @status_err: receive descriptor status and error fields
3661 * @csum: receive descriptor csum field
3662 * @sk_buff: socket buffer with received data
1da177e4
LT		 3663 **/
3664
e619d523 3665static void
1da177e4 3666e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3667 uint32_t status_err, uint32_t csum,
3668 struct sk_buff *skb)
1da177e4 3669{
2d7edb92
MC		 3670 uint16_t status = (uint16_t)status_err;
3671 uint8_t errors = (uint8_t)(status_err >> 24);
3672 skb->ip_summed = CHECKSUM_NONE;
3673
1da177e4 3674 /* 82543 or newer only */
96838a40 3675 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3676 /* Ignore Checksum bit is set */
96838a40 3677 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3678 /* TCP/UDP checksum error bit is set */
96838a40 3679 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3680 /* let the stack verify checksum errors */
1da177e4 3681 adapter->hw_csum_err++;
2d7edb92
MC		 3682 return;
3683 }
3684 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3685 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3686 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3687 return;
1da177e4 3688 } else {
96838a40 3689 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3690 return;
3691 }
3692 /* It must be a TCP or UDP packet with a valid checksum */
3693 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3694 /* TCP checksum is good */
3695 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3696 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3697 /* IP fragment with UDP payload */
3698 /* Hardware complements the payload checksum, so we undo it
3699 * and then put the value in host order for further stack use.
3700 */
3701 csum = ntohl(csum ^ 0xFFFF);
3702 skb->csum = csum;
84fa7933 3703 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3704 }
2d7edb92 3705 adapter->hw_csum_good++;
1da177e4
LT		 3706}
3707
3708/**
2d7edb92 3709 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3710 * @adapter: board private structure
3711 **/
3712
3713static boolean_t
3714#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3715e1000_clean_rx_irq(struct e1000_adapter *adapter,
3716 struct e1000_rx_ring *rx_ring,
3717 int *work_done, int work_to_do)
1da177e4 3718#else
581d708e
MC		 3719e1000_clean_rx_irq(struct e1000_adapter *adapter,
3720 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3721#endif
3722{
1da177e4
LT		 3723 struct net_device *netdev = adapter->netdev;
3724 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3725 struct e1000_rx_desc *rx_desc, *next_rxd;
3726 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3727 unsigned long flags;
3728 uint32_t length;
3729 uint8_t last_byte;
3730 unsigned int i;
72d64a43 3731 int cleaned_count = 0;
a1415ee6 3732 boolean_t cleaned = FALSE;
1da177e4
LT		 3733
3734 i = rx_ring->next_to_clean;
3735 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3736 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3737
b92ff8ee 3738 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3739 struct sk_buff *skb;
a292ca6e 3740 u8 status;
1da177e4 3741#ifdef CONFIG_E1000_NAPI
96838a40 3742 if (*work_done >= work_to_do)
1da177e4
LT		 3743 break;
3744 (*work_done)++;
3745#endif
a292ca6e 3746 status = rx_desc->status;
b92ff8ee 3747 skb = buffer_info->skb;
86c3d59f
JB		 3748 buffer_info->skb = NULL;
3749
30320be8
JK		 3750 prefetch(skb->data - NET_IP_ALIGN);
3751
86c3d59f
JB		 3752 if (++i == rx_ring->count) i = 0;
3753 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3754 prefetch(next_rxd);
3755
86c3d59f 3756 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3757
72d64a43
JK		 3758 cleaned = TRUE;
3759 cleaned_count++;
a292ca6e
JK		 3760 pci_unmap_single(pdev,
3761 buffer_info->dma,
3762 buffer_info->length,
1da177e4
LT		 3763 PCI_DMA_FROMDEVICE);
3764
1da177e4
LT		 3765 length = le16_to_cpu(rx_desc->length);
3766
f235a2ab
AK		 3767 /* adjust length to remove Ethernet CRC */
3768 length -= 4;
3769
a1415ee6
JK		 3770 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3771 /* All receives must fit into a single buffer */
3772 E1000_DBG("%s: Receive packet consumed multiple"
3773 " buffers\n", netdev->name);
864c4e45 3774 /* recycle */
8fc897b0 3775 buffer_info->skb = skb;
1da177e4
LT		 3776 goto next_desc;
3777 }
3778
96838a40 3779 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3780 last_byte = *(skb->data + length - 1);
b92ff8ee 3781 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3782 rx_desc->errors, length, last_byte)) {
3783 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3784 e1000_tbi_adjust_stats(&adapter->hw,
3785 &adapter->stats,
1da177e4
LT		 3786 length, skb->data);
3787 spin_unlock_irqrestore(&adapter->stats_lock,
3788 flags);
3789 length--;
3790 } else {
9e2feace
AK		 3791 /* recycle */
3792 buffer_info->skb = skb;
1da177e4
LT		 3793 goto next_desc;
3794 }
1cb5821f 3795 }
1da177e4 3796
a292ca6e
JK		 3797 /* code added for copybreak, this should improve
3798 * performance for small packets with large amounts
3799 * of reassembly being done in the stack */
3800#define E1000_CB_LENGTH 256
a1415ee6 3801 if (length < E1000_CB_LENGTH) {
a292ca6e 3802 struct sk_buff *new_skb =
87f5032e 3803 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 3804 if (new_skb) {
3805 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 3806 memcpy(new_skb->data - NET_IP_ALIGN,
3807 skb->data - NET_IP_ALIGN,
3808 length + NET_IP_ALIGN);
3809 /* save the skb in buffer_info as good */
3810 buffer_info->skb = skb;
3811 skb = new_skb;
3812 skb_put(skb, length);
3813 }
a1415ee6
JK		 3814 } else
3815 skb_put(skb, length);
a292ca6e
JK		 3816
3817 /* end copybreak code */
1da177e4
LT		 3818
3819 /* Receive Checksum Offload */
a292ca6e
JK		 3820 e1000_rx_checksum(adapter,
3821 (uint32_t)(status) |
2d7edb92 3822 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3823 le16_to_cpu(rx_desc->csum), skb);
96838a40 3824
1da177e4
LT		 3825 skb->protocol = eth_type_trans(skb, netdev);
3826#ifdef CONFIG_E1000_NAPI
96838a40 3827 if (unlikely(adapter->vlgrp &&
a292ca6e 3828 (status & E1000_RXD_STAT_VP))) {
1da177e4 3829 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3830 le16_to_cpu(rx_desc->special) &
3831 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3832 } else {
3833 netif_receive_skb(skb);
3834 }
3835#else /* CONFIG_E1000_NAPI */
96838a40 3836 if (unlikely(adapter->vlgrp &&
b92ff8ee 3837 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3838 vlan_hwaccel_rx(skb, adapter->vlgrp,
3839 le16_to_cpu(rx_desc->special) &
3840 E1000_RXD_SPC_VLAN_MASK);
3841 } else {
3842 netif_rx(skb);
3843 }
3844#endif /* CONFIG_E1000_NAPI */
3845 netdev->last_rx = jiffies;
3846
3847next_desc:
3848 rx_desc->status = 0;
1da177e4 3849
72d64a43
JK		 3850 /* return some buffers to hardware, one at a time is too slow */
3851 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3852 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3853 cleaned_count = 0;
3854 }
3855
30320be8 3856 /* use prefetched values */
86c3d59f
JB		 3857 rx_desc = next_rxd;
3858 buffer_info = next_buffer;
1da177e4 3859 }
1da177e4 3860 rx_ring->next_to_clean = i;
72d64a43
JK		 3861
3862 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3863 if (cleaned_count)
3864 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3865
3866 return cleaned;
3867}
3868
3869/**
3870 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3871 * @adapter: board private structure
3872 **/
3873
3874static boolean_t
3875#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3876e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3877 struct e1000_rx_ring *rx_ring,
3878 int *work_done, int work_to_do)
2d7edb92 3879#else
581d708e
MC		 3880e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3881 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3882#endif
3883{
86c3d59f 3884 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3885 struct net_device *netdev = adapter->netdev;
3886 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3887 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3888 struct e1000_ps_page *ps_page;
3889 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3890 struct sk_buff *skb;
2d7edb92
MC		 3891 unsigned int i, j;
3892 uint32_t length, staterr;
72d64a43 3893 int cleaned_count = 0;
2d7edb92
MC		 3894 boolean_t cleaned = FALSE;
3895
3896 i = rx_ring->next_to_clean;
3897 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3898 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3899 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3900
96838a40 3901 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3902 ps_page = &rx_ring->ps_page[i];
3903 ps_page_dma = &rx_ring->ps_page_dma[i];
3904#ifdef CONFIG_E1000_NAPI
96838a40 3905 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3906 break;
3907 (*work_done)++;
3908#endif
86c3d59f
JB		 3909 skb = buffer_info->skb;
3910
30320be8
JK		 3911 /* in the packet split case this is header only */
3912 prefetch(skb->data - NET_IP_ALIGN);
3913
86c3d59f
JB		 3914 if (++i == rx_ring->count) i = 0;
3915 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3916 prefetch(next_rxd);
3917
86c3d59f 3918 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3919
2d7edb92 3920 cleaned = TRUE;
72d64a43 3921 cleaned_count++;
2d7edb92
MC		 3922 pci_unmap_single(pdev, buffer_info->dma,
3923 buffer_info->length,
3924 PCI_DMA_FROMDEVICE);
3925
96838a40 3926 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3927 E1000_DBG("%s: Packet Split buffers didn't pick up"
3928 " the full packet\n", netdev->name);
3929 dev_kfree_skb_irq(skb);
3930 goto next_desc;
3931 }
1da177e4 3932
96838a40 3933 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3934 dev_kfree_skb_irq(skb);
3935 goto next_desc;
3936 }
3937
3938 length = le16_to_cpu(rx_desc->wb.middle.length0);
3939
96838a40 3940 if (unlikely(!length)) {
2d7edb92
MC		 3941 E1000_DBG("%s: Last part of the packet spanning"
3942 " multiple descriptors\n", netdev->name);
3943 dev_kfree_skb_irq(skb);
3944 goto next_desc;
3945 }
3946
3947 /* Good Receive */
3948 skb_put(skb, length);
3949
dc7c6add
JK		 3950 {
3951 /* this looks ugly, but it seems compiler issues make it
3952 more efficient than reusing j */
3953 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3954
3955 /* page alloc/put takes too long and effects small packet
3956 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3957 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3958 u8 *vaddr;
76c224bc 3959 /* there is no documentation about how to call
dc7c6add
JK		 3960 * kmap_atomic, so we can't hold the mapping
3961 * very long */
3962 pci_dma_sync_single_for_cpu(pdev,
3963 ps_page_dma->ps_page_dma[0],
3964 PAGE_SIZE,
3965 PCI_DMA_FROMDEVICE);
3966 vaddr = kmap_atomic(ps_page->ps_page[0],
3967 KM_SKB_DATA_SOFTIRQ);
3968 memcpy(skb->tail, vaddr, l1);
3969 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3970 pci_dma_sync_single_for_device(pdev,
3971 ps_page_dma->ps_page_dma[0],
3972 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 3973 /* remove the CRC */
3974 l1 -= 4;
dc7c6add 3975 skb_put(skb, l1);
dc7c6add
JK		 3976 goto copydone;
3977 } /* if */
3978 }
3979
96838a40 3980 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3981 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3982 break;
2d7edb92
MC		 3983 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3984 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3985 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3986 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3987 length);
2d7edb92 3988 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3989 skb->len += length;
3990 skb->data_len += length;
5d51b80f 3991 skb->truesize += length;
2d7edb92
MC		 3992 }
3993
f235a2ab
AK		 3994 /* strip the ethernet crc, problem is we're using pages now so
3995 * this whole operation can get a little cpu intensive */
3996 pskb_trim(skb, skb->len - 4);
3997
dc7c6add 3998copydone:
2d7edb92 3999 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 4000 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 4001 skb->protocol = eth_type_trans(skb, netdev);
4002
96838a40 4003 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 4004 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 4005 adapter->rx_hdr_split++;
2d7edb92 4006#ifdef CONFIG_E1000_NAPI
96838a40 4007 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4008 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 4009 le16_to_cpu(rx_desc->wb.middle.vlan) &
4010 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4011 } else {
4012 netif_receive_skb(skb);
4013 }
4014#else /* CONFIG_E1000_NAPI */
96838a40 4015 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4016 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 4017 le16_to_cpu(rx_desc->wb.middle.vlan) &
4018 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4019 } else {
4020 netif_rx(skb);
4021 }
4022#endif /* CONFIG_E1000_NAPI */
4023 netdev->last_rx = jiffies;
4024
4025next_desc:
c3d7a3a4 4026 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 4027 buffer_info->skb = NULL;
2d7edb92 4028
72d64a43
JK		 4029 /* return some buffers to hardware, one at a time is too slow */
4030 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4031 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4032 cleaned_count = 0;
4033 }
4034
30320be8 4035 /* use prefetched values */
86c3d59f
JB		 4036 rx_desc = next_rxd;
4037 buffer_info = next_buffer;
4038
683a38f3 4039 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 4040 }
4041 rx_ring->next_to_clean = i;
72d64a43
JK		 4042
4043 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4044 if (cleaned_count)
4045 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 4046
4047 return cleaned;
4048}
4049
4050/**
2d7edb92 4051 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4052 * @adapter: address of board private structure
4053 **/
4054
4055static void
581d708e 4056e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4057 struct e1000_rx_ring *rx_ring,
a292ca6e 4058 int cleaned_count)
1da177e4 4059{
1da177e4
LT		 4060 struct net_device *netdev = adapter->netdev;
4061 struct pci_dev *pdev = adapter->pdev;
4062 struct e1000_rx_desc *rx_desc;
4063 struct e1000_buffer *buffer_info;
4064 struct sk_buff *skb;
2648345f
MC		 4065 unsigned int i;
4066 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4067
4068 i = rx_ring->next_to_use;
4069 buffer_info = &rx_ring->buffer_info[i];
4070
a292ca6e 4071 while (cleaned_count--) {
ca6f7224
CH		 4072 skb = buffer_info->skb;
4073 if (skb) {
a292ca6e
JK		 4074 skb_trim(skb, 0);
4075 goto map_skb;
4076 }
4077
ca6f7224 4078 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4079 if (unlikely(!skb)) {
1da177e4 4080 /* Better luck next round */
72d64a43 4081 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4082 break;
4083 }
4084
2648345f 4085 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4086 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4087 struct sk_buff *oldskb = skb;
2648345f
MC		 4088 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4089 "at %p\n", bufsz, skb->data);
4090 /* Try again, without freeing the previous */
87f5032e 4091 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4092 /* Failed allocation, critical failure */
1da177e4
LT		 4093 if (!skb) {
4094 dev_kfree_skb(oldskb);
4095 break;
4096 }
2648345f 4097
1da177e4
LT		 4098 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4099 /* give up */
4100 dev_kfree_skb(skb);
4101 dev_kfree_skb(oldskb);
4102 break; /* while !buffer_info->skb */
1da177e4 4103 }
ca6f7224
CH		 4104
4105 /* Use new allocation */
4106 dev_kfree_skb(oldskb);
1da177e4 4107 }
1da177e4
LT		 4108 /* Make buffer alignment 2 beyond a 16 byte boundary
4109 * this will result in a 16 byte aligned IP header after
4110 * the 14 byte MAC header is removed
4111 */
4112 skb_reserve(skb, NET_IP_ALIGN);
4113
1da177e4
LT		 4114 buffer_info->skb = skb;
4115 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4116map_skb:
1da177e4
LT		 4117 buffer_info->dma = pci_map_single(pdev,
4118 skb->data,
4119 adapter->rx_buffer_len,
4120 PCI_DMA_FROMDEVICE);
4121
2648345f
MC		 4122 /* Fix for errata 23, can't cross 64kB boundary */
4123 if (!e1000_check_64k_bound(adapter,
4124 (void *)(unsigned long)buffer_info->dma,
4125 adapter->rx_buffer_len)) {
4126 DPRINTK(RX_ERR, ERR,
4127 "dma align check failed: %u bytes at %p\n",
4128 adapter->rx_buffer_len,
4129 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4130 dev_kfree_skb(skb);
4131 buffer_info->skb = NULL;
4132
2648345f 4133 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4134 adapter->rx_buffer_len,
4135 PCI_DMA_FROMDEVICE);
4136
4137 break; /* while !buffer_info->skb */
4138 }
1da177e4
LT		 4139 rx_desc = E1000_RX_DESC(*rx_ring, i);
4140 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4141
96838a40
JB		 4142 if (unlikely(++i == rx_ring->count))
4143 i = 0;
1da177e4
LT		 4144 buffer_info = &rx_ring->buffer_info[i];
4145 }
4146
b92ff8ee
JB		 4147 if (likely(rx_ring->next_to_use != i)) {
4148 rx_ring->next_to_use = i;
4149 if (unlikely(i-- == 0))
4150 i = (rx_ring->count - 1);
4151
4152 /* Force memory writes to complete before letting h/w
4153 * know there are new descriptors to fetch. (Only
4154 * applicable for weak-ordered memory model archs,
4155 * such as IA-64). */
4156 wmb();
4157 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4158 }
1da177e4
LT		 4159}
4160
2d7edb92
MC		 4161/**
4162 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4163 * @adapter: address of board private structure
4164 **/
4165
4166static void
581d708e 4167e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4168 struct e1000_rx_ring *rx_ring,
4169 int cleaned_count)
2d7edb92 4170{
2d7edb92
MC		 4171 struct net_device *netdev = adapter->netdev;
4172 struct pci_dev *pdev = adapter->pdev;
4173 union e1000_rx_desc_packet_split *rx_desc;
4174 struct e1000_buffer *buffer_info;
4175 struct e1000_ps_page *ps_page;
4176 struct e1000_ps_page_dma *ps_page_dma;
4177 struct sk_buff *skb;
4178 unsigned int i, j;
4179
4180 i = rx_ring->next_to_use;
4181 buffer_info = &rx_ring->buffer_info[i];
4182 ps_page = &rx_ring->ps_page[i];
4183 ps_page_dma = &rx_ring->ps_page_dma[i];
4184
72d64a43 4185 while (cleaned_count--) {
2d7edb92
MC		 4186 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4187
96838a40 4188 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4189 if (j < adapter->rx_ps_pages) {
4190 if (likely(!ps_page->ps_page[j])) {
4191 ps_page->ps_page[j] =
4192 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4193 if (unlikely(!ps_page->ps_page[j])) {
4194 adapter->alloc_rx_buff_failed++;
e4c811c9 4195 goto no_buffers;
b92ff8ee 4196 }
e4c811c9
MC		 4197 ps_page_dma->ps_page_dma[j] =
4198 pci_map_page(pdev,
4199 ps_page->ps_page[j],
4200 0, PAGE_SIZE,
4201 PCI_DMA_FROMDEVICE);
4202 }
4203 /* Refresh the desc even if buffer_addrs didn't
96838a40 4204 * change because each write-back erases
e4c811c9
MC		 4205 * this info.
4206 */
4207 rx_desc->read.buffer_addr[j+1] =
4208 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4209 } else
4210 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4211 }
4212
87f5032e
DM		 4213 skb = netdev_alloc_skb(netdev,
4214 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4215
b92ff8ee
JB		 4216 if (unlikely(!skb)) {
4217 adapter->alloc_rx_buff_failed++;
2d7edb92 4218 break;
b92ff8ee 4219 }
2d7edb92
MC		 4220
4221 /* Make buffer alignment 2 beyond a 16 byte boundary
4222 * this will result in a 16 byte aligned IP header after
4223 * the 14 byte MAC header is removed
4224 */
4225 skb_reserve(skb, NET_IP_ALIGN);
4226
2d7edb92
MC		 4227 buffer_info->skb = skb;
4228 buffer_info->length = adapter->rx_ps_bsize0;
4229 buffer_info->dma = pci_map_single(pdev, skb->data,
4230 adapter->rx_ps_bsize0,
4231 PCI_DMA_FROMDEVICE);
4232
4233 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4234
96838a40 4235 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4236 buffer_info = &rx_ring->buffer_info[i];
4237 ps_page = &rx_ring->ps_page[i];
4238 ps_page_dma = &rx_ring->ps_page_dma[i];
4239 }
4240
4241no_buffers:
b92ff8ee
JB		 4242 if (likely(rx_ring->next_to_use != i)) {
4243 rx_ring->next_to_use = i;
4244 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4245
4246 /* Force memory writes to complete before letting h/w
4247 * know there are new descriptors to fetch. (Only
4248 * applicable for weak-ordered memory model archs,
4249 * such as IA-64). */
4250 wmb();
4251 /* Hardware increments by 16 bytes, but packet split
4252 * descriptors are 32 bytes...so we increment tail
4253 * twice as much.
4254 */
4255 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4256 }
2d7edb92
MC		 4257}
4258
1da177e4
LT		 4259/**
4260 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4261 * @adapter:
4262 **/
4263
4264static void
4265e1000_smartspeed(struct e1000_adapter *adapter)
4266{
4267 uint16_t phy_status;
4268 uint16_t phy_ctrl;
4269
96838a40 4270 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4271 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4272 return;
4273
96838a40 4274 if (adapter->smartspeed == 0) {
1da177e4
LT		 4275 /* If Master/Slave config fault is asserted twice,
4276 * we assume back-to-back */
4277 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4278 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4279 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4280 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4281 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4282 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4283 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4284 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4285 phy_ctrl);
4286 adapter->smartspeed++;
96838a40 4287 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4288 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4289 &phy_ctrl)) {
4290 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4291 MII_CR_RESTART_AUTO_NEG);
4292 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4293 phy_ctrl);
4294 }
4295 }
4296 return;
96838a40 4297 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4298 /* If still no link, perhaps using 2/3 pair cable */
4299 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4300 phy_ctrl |= CR_1000T_MS_ENABLE;
4301 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4302 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4303 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4304 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4305 MII_CR_RESTART_AUTO_NEG);
4306 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4307 }
4308 }
4309 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4310 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4311 adapter->smartspeed = 0;
4312}
4313
4314/**
4315 * e1000_ioctl -
4316 * @netdev:
4317 * @ifreq:
4318 * @cmd:
4319 **/
4320
4321static int
4322e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4323{
4324 switch (cmd) {
4325 case SIOCGMIIPHY:
4326 case SIOCGMIIREG:
4327 case SIOCSMIIREG:
4328 return e1000_mii_ioctl(netdev, ifr, cmd);
4329 default:
4330 return -EOPNOTSUPP;
4331 }
4332}
4333
4334/**
4335 * e1000_mii_ioctl -
4336 * @netdev:
4337 * @ifreq:
4338 * @cmd:
4339 **/
4340
4341static int
4342e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4343{
60490fe0 4344 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4345 struct mii_ioctl_data *data = if_mii(ifr);
4346 int retval;
4347 uint16_t mii_reg;
4348 uint16_t spddplx;
97876fc6 4349 unsigned long flags;
1da177e4 4350
96838a40 4351 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4352 return -EOPNOTSUPP;
4353
4354 switch (cmd) {
4355 case SIOCGMIIPHY:
4356 data->phy_id = adapter->hw.phy_addr;
4357 break;
4358 case SIOCGMIIREG:
96838a40 4359 if (!capable(CAP_NET_ADMIN))
1da177e4 4360 return -EPERM;
97876fc6 4361 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4362 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4363 &data->val_out)) {
4364 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4365 return -EIO;
97876fc6
MC		 4366 }
4367 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4368 break;
4369 case SIOCSMIIREG:
96838a40 4370 if (!capable(CAP_NET_ADMIN))
1da177e4 4371 return -EPERM;
96838a40 4372 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4373 return -EFAULT;
4374 mii_reg = data->val_in;
97876fc6 4375 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4376 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4377 mii_reg)) {
4378 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4379 return -EIO;
97876fc6 4380 }
dc86d32a 4381 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4382 switch (data->reg_num) {
4383 case PHY_CTRL:
96838a40 4384 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4385 break;
96838a40 4386 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4387 adapter->hw.autoneg = 1;
4388 adapter->hw.autoneg_advertised = 0x2F;
4389 } else {
4390 if (mii_reg & 0x40)
4391 spddplx = SPEED_1000;
4392 else if (mii_reg & 0x2000)
4393 spddplx = SPEED_100;
4394 else
4395 spddplx = SPEED_10;
4396 spddplx += (mii_reg & 0x100)
cb764326
JK		 4397 ? DUPLEX_FULL :
4398 DUPLEX_HALF;
1da177e4
LT		 4399 retval = e1000_set_spd_dplx(adapter,
4400 spddplx);
96838a40 4401 if (retval) {
97876fc6 4402 spin_unlock_irqrestore(
96838a40 4403 &adapter->stats_lock,
97876fc6 4404 flags);
1da177e4 4405 return retval;
97876fc6 4406 }
1da177e4 4407 }
2db10a08
AK		 4408 if (netif_running(adapter->netdev))
4409 e1000_reinit_locked(adapter);
4410 else
1da177e4
LT		 4411 e1000_reset(adapter);
4412 break;
4413 case M88E1000_PHY_SPEC_CTRL:
4414 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4415 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4416 spin_unlock_irqrestore(
4417 &adapter->stats_lock, flags);
1da177e4 4418 return -EIO;
97876fc6 4419 }
1da177e4
LT		 4420 break;
4421 }
4422 } else {
4423 switch (data->reg_num) {
4424 case PHY_CTRL:
96838a40 4425 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4426 break;
2db10a08
AK		 4427 if (netif_running(adapter->netdev))
4428 e1000_reinit_locked(adapter);
4429 else
1da177e4
LT		 4430 e1000_reset(adapter);
4431 break;
4432 }
4433 }
97876fc6 4434 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4435 break;
4436 default:
4437 return -EOPNOTSUPP;
4438 }
4439 return E1000_SUCCESS;
4440}
4441
4442void
4443e1000_pci_set_mwi(struct e1000_hw *hw)
4444{
4445 struct e1000_adapter *adapter = hw->back;
2648345f 4446 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4447
96838a40 4448 if (ret_val)
2648345f 4449 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4450}
4451
4452void
4453e1000_pci_clear_mwi(struct e1000_hw *hw)
4454{
4455 struct e1000_adapter *adapter = hw->back;
4456
4457 pci_clear_mwi(adapter->pdev);
4458}
4459
4460void
4461e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4462{
4463 struct e1000_adapter *adapter = hw->back;
4464
4465 pci_read_config_word(adapter->pdev, reg, value);
4466}
4467
4468void
4469e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4470{
4471 struct e1000_adapter *adapter = hw->back;
4472
4473 pci_write_config_word(adapter->pdev, reg, *value);
4474}
4475
caeccb68
JK		 4476int32_t
4477e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4478{
4479 struct e1000_adapter *adapter = hw->back;
4480 uint16_t cap_offset;
4481
4482 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4483 if (!cap_offset)
4484 return -E1000_ERR_CONFIG;
4485
4486 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4487
4488 return E1000_SUCCESS;
4489}
4490
4491
1da177e4
LT		 4492void
4493e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4494{
4495 outl(value, port);
4496}
4497
4498static void
4499e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4500{
60490fe0 4501 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4502 uint32_t ctrl, rctl;
4503
4504 e1000_irq_disable(adapter);
4505 adapter->vlgrp = grp;
4506
96838a40 4507 if (grp) {
1da177e4
LT		 4508 /* enable VLAN tag insert/strip */
4509 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4510 ctrl |= E1000_CTRL_VME;
4511 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4512
cd94dd0b 4513 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4514 /* enable VLAN receive filtering */
4515 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4516 rctl |= E1000_RCTL_VFE;
4517 rctl &= ~E1000_RCTL_CFIEN;
4518 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4519 e1000_update_mng_vlan(adapter);
cd94dd0b 4520 }
1da177e4
LT		 4521 } else {
4522 /* disable VLAN tag insert/strip */
4523 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4524 ctrl &= ~E1000_CTRL_VME;
4525 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4526
cd94dd0b 4527 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4528 /* disable VLAN filtering */
4529 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4530 rctl &= ~E1000_RCTL_VFE;
4531 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4532 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4533 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4534 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4535 }
cd94dd0b 4536 }
1da177e4
LT		 4537 }
4538
4539 e1000_irq_enable(adapter);
4540}
4541
4542static void
4543e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4544{
60490fe0 4545 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4546 uint32_t vfta, index;
96838a40
JB		 4547
4548 if ((adapter->hw.mng_cookie.status &
4549 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4550 (vid == adapter->mng_vlan_id))
2d7edb92 4551 return;
1da177e4
LT		 4552 /* add VID to filter table */
4553 index = (vid >> 5) & 0x7F;
4554 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4555 vfta |= (1 << (vid & 0x1F));
4556 e1000_write_vfta(&adapter->hw, index, vfta);
4557}
4558
4559static void
4560e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4561{
60490fe0 4562 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4563 uint32_t vfta, index;
4564
4565 e1000_irq_disable(adapter);
4566
96838a40 4567 if (adapter->vlgrp)
1da177e4
LT		 4568 adapter->vlgrp->vlan_devices[vid] = NULL;
4569
4570 e1000_irq_enable(adapter);
4571
96838a40
JB		 4572 if ((adapter->hw.mng_cookie.status &
4573 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4574 (vid == adapter->mng_vlan_id)) {
4575 /* release control to f/w */
4576 e1000_release_hw_control(adapter);
2d7edb92 4577 return;
ff147013
JK		 4578 }
4579
1da177e4
LT		 4580 /* remove VID from filter table */
4581 index = (vid >> 5) & 0x7F;
4582 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4583 vfta &= ~(1 << (vid & 0x1F));
4584 e1000_write_vfta(&adapter->hw, index, vfta);
4585}
4586
4587static void
4588e1000_restore_vlan(struct e1000_adapter *adapter)
4589{
4590 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4591
96838a40 4592 if (adapter->vlgrp) {
1da177e4 4593 uint16_t vid;
96838a40
JB		 4594 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4595 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4596 continue;
4597 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4598 }
4599 }
4600}
4601
4602int
4603e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4604{
4605 adapter->hw.autoneg = 0;
4606
6921368f 4607 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4608 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4609 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4610 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4611 return -EINVAL;
4612 }
4613
96838a40 4614 switch (spddplx) {
1da177e4
LT		 4615 case SPEED_10 + DUPLEX_HALF:
4616 adapter->hw.forced_speed_duplex = e1000_10_half;
4617 break;
4618 case SPEED_10 + DUPLEX_FULL:
4619 adapter->hw.forced_speed_duplex = e1000_10_full;
4620 break;
4621 case SPEED_100 + DUPLEX_HALF:
4622 adapter->hw.forced_speed_duplex = e1000_100_half;
4623 break;
4624 case SPEED_100 + DUPLEX_FULL:
4625 adapter->hw.forced_speed_duplex = e1000_100_full;
4626 break;
4627 case SPEED_1000 + DUPLEX_FULL:
4628 adapter->hw.autoneg = 1;
4629 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4630 break;
4631 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4632 default:
2648345f 4633 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4634 return -EINVAL;
4635 }
4636 return 0;
4637}
4638
b6a1d5f8 4639#ifdef CONFIG_PM
0f15a8fa
JK		 4640/* Save/restore 16 or 64 dwords of PCI config space depending on which
4641 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4642 */
4643#define PCIE_CONFIG_SPACE_LEN 256
4644#define PCI_CONFIG_SPACE_LEN 64
4645static int
4646e1000_pci_save_state(struct e1000_adapter *adapter)
4647{
4648 struct pci_dev *dev = adapter->pdev;
4649 int size;
4650 int i;
0f15a8fa 4651
2f82665f
JB		 4652 if (adapter->hw.mac_type >= e1000_82571)
4653 size = PCIE_CONFIG_SPACE_LEN;
4654 else
4655 size = PCI_CONFIG_SPACE_LEN;
4656
4657 WARN_ON(adapter->config_space != NULL);
4658
4659 adapter->config_space = kmalloc(size, GFP_KERNEL);
4660 if (!adapter->config_space) {
4661 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4662 return -ENOMEM;
4663 }
4664 for (i = 0; i < (size / 4); i++)
4665 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4666 return 0;
4667}
4668
4669static void
4670e1000_pci_restore_state(struct e1000_adapter *adapter)
4671{
4672 struct pci_dev *dev = adapter->pdev;
4673 int size;
4674 int i;
0f15a8fa 4675
2f82665f
JB		 4676 if (adapter->config_space == NULL)
4677 return;
0f15a8fa 4678
2f82665f
JB		 4679 if (adapter->hw.mac_type >= e1000_82571)
4680 size = PCIE_CONFIG_SPACE_LEN;
4681 else
4682 size = PCI_CONFIG_SPACE_LEN;
4683 for (i = 0; i < (size / 4); i++)
4684 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4685 kfree(adapter->config_space);
4686 adapter->config_space = NULL;
4687 return;
4688}
4689#endif /* CONFIG_PM */
4690
1da177e4 4691static int
829ca9a3 4692e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4693{
4694 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4695 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4696 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4697 uint32_t wufc = adapter->wol;
6fdfef16 4698#ifdef CONFIG_PM
240b1710 4699 int retval = 0;
6fdfef16 4700#endif
1da177e4
LT		 4701
4702 netif_device_detach(netdev);
4703
2db10a08
AK		 4704 if (netif_running(netdev)) {
4705 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4706 e1000_down(adapter);
2db10a08 4707 }
1da177e4 4708
2f82665f 4709#ifdef CONFIG_PM
0f15a8fa
JK		 4710 /* Implement our own version of pci_save_state(pdev) because pci-
4711 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4712 retval = e1000_pci_save_state(adapter);
4713 if (retval)
4714 return retval;
4715#endif
4716
1da177e4 4717 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4718 if (status & E1000_STATUS_LU)
1da177e4
LT		 4719 wufc &= ~E1000_WUFC_LNKC;
4720
96838a40 4721 if (wufc) {
1da177e4
LT		 4722 e1000_setup_rctl(adapter);
4723 e1000_set_multi(netdev);
4724
4725 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4726 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 4727 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4728 rctl |= E1000_RCTL_MPE;
4729 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4730 }
4731
96838a40 4732 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4733 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4734 /* advertise wake from D3Cold */
4735 #define E1000_CTRL_ADVD3WUC 0x00100000
4736 /* phy power management enable */
4737 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4738 ctrl |= E1000_CTRL_ADVD3WUC |
4739 E1000_CTRL_EN_PHY_PWR_MGMT;
4740 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4741 }
4742
96838a40 4743 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4744 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4745 /* keep the laser running in D3 */
4746 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4747 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4748 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4749 }
4750
2d7edb92
MC		 4751 /* Allow time for pending master requests to run */
4752 e1000_disable_pciex_master(&adapter->hw);
4753
1da177e4
LT		 4754 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4755 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4756 pci_enable_wake(pdev, PCI_D3hot, 1);
4757 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4758 } else {
4759 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4760 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4761 pci_enable_wake(pdev, PCI_D3hot, 0);
4762 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4763 }
4764
5f01607a 4765 if (adapter->hw.mac_type < e1000_82571 &&
1da177e4
LT		 4766 adapter->hw.media_type == e1000_media_type_copper) {
4767 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4768 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4769 manc |= E1000_MANC_ARP_EN;
4770 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4771 pci_enable_wake(pdev, PCI_D3hot, 1);
4772 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4773 }
4774 }
4775
cd94dd0b
AK		 4776 if (adapter->hw.phy_type == e1000_phy_igp_3)
4777 e1000_phy_powerdown_workaround(&adapter->hw);
4778
b55ccb35
JK		 4779 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4780 * would have already happened in close and is redundant. */
4781 e1000_release_hw_control(adapter);
2d7edb92 4782
1da177e4 4783 pci_disable_device(pdev);
240b1710 4784
d0e027db 4785 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4786
4787 return 0;
4788}
4789
2f82665f 4790#ifdef CONFIG_PM
1da177e4
LT		 4791static int
4792e1000_resume(struct pci_dev *pdev)
4793{
4794 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4795 struct e1000_adapter *adapter = netdev_priv(netdev);
3d1dd8cb 4796 uint32_t manc, err;
1da177e4 4797
d0e027db 4798 pci_set_power_state(pdev, PCI_D0);
2f82665f 4799 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 4800 if ((err = pci_enable_device(pdev))) {
4801 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4802 return err;
4803 }
a4cb847d 4804 pci_set_master(pdev);
1da177e4 4805
d0e027db
AK		 4806 pci_enable_wake(pdev, PCI_D3hot, 0);
4807 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4808
4809 e1000_reset(adapter);
4810 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4811
96838a40 4812 if (netif_running(netdev))
1da177e4
LT		 4813 e1000_up(adapter);
4814
4815 netif_device_attach(netdev);
4816
5f01607a 4817 if (adapter->hw.mac_type < e1000_82571 &&
1da177e4
LT		 4818 adapter->hw.media_type == e1000_media_type_copper) {
4819 manc = E1000_READ_REG(&adapter->hw, MANC);
4820 manc &= ~(E1000_MANC_ARP_EN);
4821 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4822 }
4823
b55ccb35
JK		 4824 /* If the controller is 82573 and f/w is AMT, do not set
4825 * DRV_LOAD until the interface is up. For all other cases,
4826 * let the f/w know that the h/w is now under the control
4827 * of the driver. */
4828 if (adapter->hw.mac_type != e1000_82573 ||
4829 !e1000_check_mng_mode(&adapter->hw))
4830 e1000_get_hw_control(adapter);
2d7edb92 4831
1da177e4
LT		 4832 return 0;
4833}
4834#endif
c653e635
AK		 4835
4836static void e1000_shutdown(struct pci_dev *pdev)
4837{
4838 e1000_suspend(pdev, PMSG_SUSPEND);
4839}
4840
1da177e4
LT		 4841#ifdef CONFIG_NET_POLL_CONTROLLER
4842/*
4843 * Polling 'interrupt' - used by things like netconsole to send skbs
4844 * without having to re-enable interrupts. It's not called while
4845 * the interrupt routine is executing.
4846 */
4847static void
2648345f 4848e1000_netpoll(struct net_device *netdev)
1da177e4 4849{
60490fe0 4850 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4851
1da177e4
LT		 4852 disable_irq(adapter->pdev->irq);
4853 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4854 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4855#ifndef CONFIG_E1000_NAPI
4856 adapter->clean_rx(adapter, adapter->rx_ring);
4857#endif
1da177e4
LT		 4858 enable_irq(adapter->pdev->irq);
4859}
4860#endif
4861
9026729b
AK		 4862/**
4863 * e1000_io_error_detected - called when PCI error is detected
4864 * @pdev: Pointer to PCI device
4865 * @state: The current pci conneection state
4866 *
4867 * This function is called after a PCI bus error affecting
4868 * this device has been detected.
4869 */
4870static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4871{
4872 struct net_device *netdev = pci_get_drvdata(pdev);
4873 struct e1000_adapter *adapter = netdev->priv;
4874
4875 netif_device_detach(netdev);
4876
4877 if (netif_running(netdev))
4878 e1000_down(adapter);
72e8d6bb 4879 pci_disable_device(pdev);
9026729b
AK		 4880
4881 /* Request a slot slot reset. */
4882 return PCI_ERS_RESULT_NEED_RESET;
4883}
4884
4885/**
4886 * e1000_io_slot_reset - called after the pci bus has been reset.
4887 * @pdev: Pointer to PCI device
4888 *
4889 * Restart the card from scratch, as if from a cold-boot. Implementation
4890 * resembles the first-half of the e1000_resume routine.
4891 */
4892static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4893{
4894 struct net_device *netdev = pci_get_drvdata(pdev);
4895 struct e1000_adapter *adapter = netdev->priv;
4896
4897 if (pci_enable_device(pdev)) {
4898 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4899 return PCI_ERS_RESULT_DISCONNECT;
4900 }
4901 pci_set_master(pdev);
4902
4903 pci_enable_wake(pdev, 3, 0);
4904 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4905
4906 /* Perform card reset only on one instance of the card */
4907 if (PCI_FUNC (pdev->devfn) != 0)
4908 return PCI_ERS_RESULT_RECOVERED;
4909
4910 e1000_reset(adapter);
4911 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4912
4913 return PCI_ERS_RESULT_RECOVERED;
4914}
4915
4916/**
4917 * e1000_io_resume - called when traffic can start flowing again.
4918 * @pdev: Pointer to PCI device
4919 *
4920 * This callback is called when the error recovery driver tells us that
4921 * its OK to resume normal operation. Implementation resembles the
4922 * second-half of the e1000_resume routine.
4923 */
4924static void e1000_io_resume(struct pci_dev *pdev)
4925{
4926 struct net_device *netdev = pci_get_drvdata(pdev);
4927 struct e1000_adapter *adapter = netdev->priv;
4928 uint32_t manc, swsm;
4929
4930 if (netif_running(netdev)) {
4931 if (e1000_up(adapter)) {
4932 printk("e1000: can't bring device back up after reset\n");
4933 return;
4934 }
4935 }
4936
4937 netif_device_attach(netdev);
4938
4939 if (adapter->hw.mac_type >= e1000_82540 &&
4940 adapter->hw.media_type == e1000_media_type_copper) {
4941 manc = E1000_READ_REG(&adapter->hw, MANC);
4942 manc &= ~(E1000_MANC_ARP_EN);
4943 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4944 }
4945
4946 switch (adapter->hw.mac_type) {
4947 case e1000_82573:
4948 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4949 E1000_WRITE_REG(&adapter->hw, SWSM,
4950 swsm | E1000_SWSM_DRV_LOAD);
4951 break;
4952 default:
4953 break;
4954 }
4955
4956 if (netif_running(netdev))
4957 mod_timer(&adapter->watchdog_timer, jiffies);
4958}
4959
1da177e4 4960/* e1000_main.c */
Ubuntu Hirsute Linux kernel mirror