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[PATCH] e1000: Fix TSO
[mirror_ubuntu-artful-kernel.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
2b02893e
MC		 32 * 6.0.58 4/20/05
33 * o Accepted ethtool cleanup patch from Stephen Hemminger
2648345f
MC		 34 * 6.0.44+ 2/15/05
35 * o applied Anton's patch to resolve tx hang in hardware
36 * o Applied Andrew Mortons patch - e1000 stops working after resume
1da177e4
LT		 37 */
38
39char e1000_driver_name[] = "e1000";
3ad2cc67 40static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 41#ifndef CONFIG_E1000_NAPI
42#define DRIVERNAPI
43#else
44#define DRIVERNAPI "-NAPI"
45#endif
4ee9c020 46#define DRV_VERSION "6.3.9-k2"DRIVERNAPI
1da177e4 47char e1000_driver_version[] = DRV_VERSION;
3ad2cc67 48static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 49
50/* e1000_pci_tbl - PCI Device ID Table
51 *
52 * Last entry must be all 0s
53 *
54 * Macro expands to...
55 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
56 */
57static struct pci_device_id e1000_pci_tbl[] = {
58 INTEL_E1000_ETHERNET_DEVICE(0x1000),
59 INTEL_E1000_ETHERNET_DEVICE(0x1001),
60 INTEL_E1000_ETHERNET_DEVICE(0x1004),
61 INTEL_E1000_ETHERNET_DEVICE(0x1008),
62 INTEL_E1000_ETHERNET_DEVICE(0x1009),
63 INTEL_E1000_ETHERNET_DEVICE(0x100C),
64 INTEL_E1000_ETHERNET_DEVICE(0x100D),
65 INTEL_E1000_ETHERNET_DEVICE(0x100E),
66 INTEL_E1000_ETHERNET_DEVICE(0x100F),
67 INTEL_E1000_ETHERNET_DEVICE(0x1010),
68 INTEL_E1000_ETHERNET_DEVICE(0x1011),
69 INTEL_E1000_ETHERNET_DEVICE(0x1012),
70 INTEL_E1000_ETHERNET_DEVICE(0x1013),
71 INTEL_E1000_ETHERNET_DEVICE(0x1014),
72 INTEL_E1000_ETHERNET_DEVICE(0x1015),
73 INTEL_E1000_ETHERNET_DEVICE(0x1016),
74 INTEL_E1000_ETHERNET_DEVICE(0x1017),
75 INTEL_E1000_ETHERNET_DEVICE(0x1018),
76 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 77 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 78 INTEL_E1000_ETHERNET_DEVICE(0x101D),
79 INTEL_E1000_ETHERNET_DEVICE(0x101E),
80 INTEL_E1000_ETHERNET_DEVICE(0x1026),
81 INTEL_E1000_ETHERNET_DEVICE(0x1027),
82 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 83 INTEL_E1000_ETHERNET_DEVICE(0x105E),
84 INTEL_E1000_ETHERNET_DEVICE(0x105F),
85 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 86 INTEL_E1000_ETHERNET_DEVICE(0x1075),
87 INTEL_E1000_ETHERNET_DEVICE(0x1076),
88 INTEL_E1000_ETHERNET_DEVICE(0x1077),
89 INTEL_E1000_ETHERNET_DEVICE(0x1078),
90 INTEL_E1000_ETHERNET_DEVICE(0x1079),
91 INTEL_E1000_ETHERNET_DEVICE(0x107A),
92 INTEL_E1000_ETHERNET_DEVICE(0x107B),
93 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 94 INTEL_E1000_ETHERNET_DEVICE(0x107D),
95 INTEL_E1000_ETHERNET_DEVICE(0x107E),
96 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 97 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 98 INTEL_E1000_ETHERNET_DEVICE(0x108B),
99 INTEL_E1000_ETHERNET_DEVICE(0x108C),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
1da177e4
LT		 101 /* required last entry */
102 {0,}
103};
104
105MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
106
107int e1000_up(struct e1000_adapter *adapter);
108void e1000_down(struct e1000_adapter *adapter);
109void e1000_reset(struct e1000_adapter *adapter);
110int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 111int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
112int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
113void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
114void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67
AB		 115static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
116 struct e1000_tx_ring *txdr);
117static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
118 struct e1000_rx_ring *rxdr);
119static void e1000_free_tx_resources(struct e1000_adapter *adapter,
120 struct e1000_tx_ring *tx_ring);
121static void e1000_free_rx_resources(struct e1000_adapter *adapter,
122 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 123void e1000_update_stats(struct e1000_adapter *adapter);
124
125/* Local Function Prototypes */
126
127static int e1000_init_module(void);
128static void e1000_exit_module(void);
129static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
130static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e
MC		 131static int e1000_alloc_queues(struct e1000_adapter *adapter);
132#ifdef CONFIG_E1000_MQ
133static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
134#endif
1da177e4
LT		 135static int e1000_sw_init(struct e1000_adapter *adapter);
136static int e1000_open(struct net_device *netdev);
137static int e1000_close(struct net_device *netdev);
138static void e1000_configure_tx(struct e1000_adapter *adapter);
139static void e1000_configure_rx(struct e1000_adapter *adapter);
140static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 141static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
142static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
143static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
144 struct e1000_tx_ring *tx_ring);
145static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
146 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 147static void e1000_set_multi(struct net_device *netdev);
148static void e1000_update_phy_info(unsigned long data);
149static void e1000_watchdog(unsigned long data);
150static void e1000_watchdog_task(struct e1000_adapter *adapter);
151static void e1000_82547_tx_fifo_stall(unsigned long data);
152static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155static int e1000_set_mac(struct net_device *netdev, void *p);
156static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 157static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
1da177e4 159#ifdef CONFIG_E1000_NAPI
581d708e 160static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 161static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 162 struct e1000_rx_ring *rx_ring,
1da177e4 163 int *work_done, int work_to_do);
2d7edb92 164static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 165 struct e1000_rx_ring *rx_ring,
2d7edb92 166 int *work_done, int work_to_do);
1da177e4 167#else
581d708e
MC		 168static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
1da177e4 172#endif
581d708e
MC		 173static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring);
175static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 177static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
178static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
179 int cmd);
180void e1000_set_ethtool_ops(struct net_device *netdev);
181static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
182static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
183static void e1000_tx_timeout(struct net_device *dev);
184static void e1000_tx_timeout_task(struct net_device *dev);
185static void e1000_smartspeed(struct e1000_adapter *adapter);
186static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
187 struct sk_buff *skb);
188
189static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
190static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
191static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
192static void e1000_restore_vlan(struct e1000_adapter *adapter);
193
1da177e4 194#ifdef CONFIG_PM
977e74b5 195static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 196static int e1000_resume(struct pci_dev *pdev);
197#endif
198
199#ifdef CONFIG_NET_POLL_CONTROLLER
200/* for netdump / net console */
201static void e1000_netpoll (struct net_device *netdev);
202#endif
203
24025e4e
MC		 204#ifdef CONFIG_E1000_MQ
205/* for multiple Rx queues */
206void e1000_rx_schedule(void *data);
207#endif
208
1da177e4
LT		 209/* Exported from other modules */
210
211extern void e1000_check_options(struct e1000_adapter *adapter);
212
213static struct pci_driver e1000_driver = {
214 .name = e1000_driver_name,
215 .id_table = e1000_pci_tbl,
216 .probe = e1000_probe,
217 .remove = __devexit_p(e1000_remove),
218 /* Power Managment Hooks */
219#ifdef CONFIG_PM
220 .suspend = e1000_suspend,
221 .resume = e1000_resume
222#endif
223};
224
225MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
226MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
227MODULE_LICENSE("GPL");
228MODULE_VERSION(DRV_VERSION);
229
230static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
231module_param(debug, int, 0);
232MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
233
234/**
235 * e1000_init_module - Driver Registration Routine
236 *
237 * e1000_init_module is the first routine called when the driver is
238 * loaded. All it does is register with the PCI subsystem.
239 **/
240
241static int __init
242e1000_init_module(void)
243{
244 int ret;
245 printk(KERN_INFO "%s - version %s\n",
246 e1000_driver_string, e1000_driver_version);
247
248 printk(KERN_INFO "%s\n", e1000_copyright);
249
250 ret = pci_module_init(&e1000_driver);
8b378def 251
1da177e4
LT		 252 return ret;
253}
254
255module_init(e1000_init_module);
256
257/**
258 * e1000_exit_module - Driver Exit Cleanup Routine
259 *
260 * e1000_exit_module is called just before the driver is removed
261 * from memory.
262 **/
263
264static void __exit
265e1000_exit_module(void)
266{
1da177e4
LT		 267 pci_unregister_driver(&e1000_driver);
268}
269
270module_exit(e1000_exit_module);
271
272/**
273 * e1000_irq_disable - Mask off interrupt generation on the NIC
274 * @adapter: board private structure
275 **/
276
277static inline void
278e1000_irq_disable(struct e1000_adapter *adapter)
279{
280 atomic_inc(&adapter->irq_sem);
281 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
282 E1000_WRITE_FLUSH(&adapter->hw);
283 synchronize_irq(adapter->pdev->irq);
284}
285
286/**
287 * e1000_irq_enable - Enable default interrupt generation settings
288 * @adapter: board private structure
289 **/
290
291static inline void
292e1000_irq_enable(struct e1000_adapter *adapter)
293{
294 if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
295 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
296 E1000_WRITE_FLUSH(&adapter->hw);
297 }
298}
3ad2cc67
AB		 299
300static void
2d7edb92
MC		 301e1000_update_mng_vlan(struct e1000_adapter *adapter)
302{
303 struct net_device *netdev = adapter->netdev;
304 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
305 uint16_t old_vid = adapter->mng_vlan_id;
306 if(adapter->vlgrp) {
307 if(!adapter->vlgrp->vlan_devices[vid]) {
308 if(adapter->hw.mng_cookie.status &
309 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
310 e1000_vlan_rx_add_vid(netdev, vid);
311 adapter->mng_vlan_id = vid;
312 } else
313 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
314
315 if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
316 (vid != old_vid) &&
317 !adapter->vlgrp->vlan_devices[old_vid])
318 e1000_vlan_rx_kill_vid(netdev, old_vid);
319 }
320 }
321}
322
1da177e4
LT		 323int
324e1000_up(struct e1000_adapter *adapter)
325{
326 struct net_device *netdev = adapter->netdev;
581d708e 327 int i, err;
1da177e4
LT		 328
329 /* hardware has been reset, we need to reload some things */
330
331 /* Reset the PHY if it was previously powered down */
332 if(adapter->hw.media_type == e1000_media_type_copper) {
333 uint16_t mii_reg;
334 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
335 if(mii_reg & MII_CR_POWER_DOWN)
336 e1000_phy_reset(&adapter->hw);
337 }
338
339 e1000_set_multi(netdev);
340
341 e1000_restore_vlan(adapter);
342
343 e1000_configure_tx(adapter);
344 e1000_setup_rctl(adapter);
345 e1000_configure_rx(adapter);
581d708e
MC		 346 for (i = 0; i < adapter->num_queues; i++)
347 adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
1da177e4 348
fa4f7ef3
MC		 349#ifdef CONFIG_PCI_MSI
350 if(adapter->hw.mac_type > e1000_82547_rev_2) {
351 adapter->have_msi = TRUE;
352 if((err = pci_enable_msi(adapter->pdev))) {
353 DPRINTK(PROBE, ERR,
354 "Unable to allocate MSI interrupt Error: %d\n", err);
355 adapter->have_msi = FALSE;
356 }
357 }
358#endif
1da177e4
LT		 359 if((err = request_irq(adapter->pdev->irq, &e1000_intr,
360 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 361 netdev->name, netdev))) {
362 DPRINTK(PROBE, ERR,
363 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 364 return err;
2648345f 365 }
1da177e4
LT		 366
367 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 368
369#ifdef CONFIG_E1000_NAPI
370 netif_poll_enable(netdev);
371#endif
5de55624
MC		 372 e1000_irq_enable(adapter);
373
1da177e4
LT		 374 return 0;
375}
376
377void
378e1000_down(struct e1000_adapter *adapter)
379{
380 struct net_device *netdev = adapter->netdev;
381
382 e1000_irq_disable(adapter);
24025e4e
MC		 383#ifdef CONFIG_E1000_MQ
384 while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
385#endif
1da177e4 386 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3
MC		 387#ifdef CONFIG_PCI_MSI
388 if(adapter->hw.mac_type > e1000_82547_rev_2 &&
389 adapter->have_msi == TRUE)
390 pci_disable_msi(adapter->pdev);
391#endif
1da177e4
LT		 392 del_timer_sync(&adapter->tx_fifo_stall_timer);
393 del_timer_sync(&adapter->watchdog_timer);
394 del_timer_sync(&adapter->phy_info_timer);
395
396#ifdef CONFIG_E1000_NAPI
397 netif_poll_disable(netdev);
398#endif
399 adapter->link_speed = 0;
400 adapter->link_duplex = 0;
401 netif_carrier_off(netdev);
402 netif_stop_queue(netdev);
403
404 e1000_reset(adapter);
581d708e
MC		 405 e1000_clean_all_tx_rings(adapter);
406 e1000_clean_all_rx_rings(adapter);
1da177e4 407
07b8fede 408 /* If WoL is not enabled and management mode is not IAMT
1da177e4 409 * Power down the PHY so no link is implied when interface is down */
2d7edb92
MC		 410 if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
411 adapter->hw.media_type == e1000_media_type_copper &&
412 !e1000_check_mng_mode(&adapter->hw) &&
413 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) {
1da177e4
LT		 414 uint16_t mii_reg;
415 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
416 mii_reg |= MII_CR_POWER_DOWN;
417 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 418 mdelay(1);
1da177e4
LT		 419 }
420}
421
422void
423e1000_reset(struct e1000_adapter *adapter)
424{
1125ecbc 425 struct net_device *netdev = adapter->netdev;
2d7edb92 426 uint32_t pba, manc;
1125ecbc
MC		 427 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
428 uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF;
1da177e4
LT		 429
430 /* Repartition Pba for greater than 9k mtu
431 * To take effect CTRL.RST is required.
432 */
433
2d7edb92
MC		 434 switch (adapter->hw.mac_type) {
435 case e1000_82547:
0e6ef3e0 436 case e1000_82547_rev_2:
2d7edb92
MC		 437 pba = E1000_PBA_30K;
438 break;
868d5309
MC		 439 case e1000_82571:
440 case e1000_82572:
441 pba = E1000_PBA_38K;
442 break;
2d7edb92
MC		 443 case e1000_82573:
444 pba = E1000_PBA_12K;
445 break;
446 default:
447 pba = E1000_PBA_48K;
448 break;
449 }
450
1125ecbc 451 if((adapter->hw.mac_type != e1000_82573) &&
4ee9c020 452 (adapter->netdev->mtu > E1000_RXBUFFER_8192)) {
1125ecbc
MC		 453 pba -= 8; /* allocate more FIFO for Tx */
454 /* send an XOFF when there is enough space in the
455 * Rx FIFO to hold one extra full size Rx packet
456 */
457 fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE +
458 ETHERNET_FCS_SIZE + 1;
459 fc_low_water_mark = fc_high_water_mark + 8;
460 }
2d7edb92
MC		 461
462
463 if(adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 464 adapter->tx_fifo_head = 0;
465 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
466 adapter->tx_fifo_size =
467 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
468 atomic_set(&adapter->tx_fifo_stall, 0);
469 }
2d7edb92 470
1da177e4
LT		 471 E1000_WRITE_REG(&adapter->hw, PBA, pba);
472
473 /* flow control settings */
474 adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) -
1125ecbc 475 fc_high_water_mark;
1da177e4 476 adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) -
1125ecbc 477 fc_low_water_mark;
1da177e4
LT		 478 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
479 adapter->hw.fc_send_xon = 1;
480 adapter->hw.fc = adapter->hw.original_fc;
481
2d7edb92 482 /* Allow time for pending master requests to run */
1da177e4
LT		 483 e1000_reset_hw(&adapter->hw);
484 if(adapter->hw.mac_type >= e1000_82544)
485 E1000_WRITE_REG(&adapter->hw, WUC, 0);
486 if(e1000_init_hw(&adapter->hw))
487 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 488 e1000_update_mng_vlan(adapter);
1da177e4
LT		 489 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
490 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
491
492 e1000_reset_adaptive(&adapter->hw);
493 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 494 if (adapter->en_mng_pt) {
495 manc = E1000_READ_REG(&adapter->hw, MANC);
496 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
497 E1000_WRITE_REG(&adapter->hw, MANC, manc);
498 }
1da177e4
LT		 499}
500
501/**
502 * e1000_probe - Device Initialization Routine
503 * @pdev: PCI device information struct
504 * @ent: entry in e1000_pci_tbl
505 *
506 * Returns 0 on success, negative on failure
507 *
508 * e1000_probe initializes an adapter identified by a pci_dev structure.
509 * The OS initialization, configuring of the adapter private structure,
510 * and a hardware reset occur.
511 **/
512
513static int __devinit
514e1000_probe(struct pci_dev *pdev,
515 const struct pci_device_id *ent)
516{
517 struct net_device *netdev;
518 struct e1000_adapter *adapter;
2d7edb92 519 unsigned long mmio_start, mmio_len;
868d5309 520 uint32_t ctrl_ext;
2d7edb92
MC		 521 uint32_t swsm;
522
1da177e4 523 static int cards_found = 0;
2d7edb92 524 int i, err, pci_using_dac;
1da177e4
LT		 525 uint16_t eeprom_data;
526 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
1da177e4
LT		 527 if((err = pci_enable_device(pdev)))
528 return err;
529
530 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
531 pci_using_dac = 1;
532 } else {
533 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
534 E1000_ERR("No usable DMA configuration, aborting\n");
535 return err;
536 }
537 pci_using_dac = 0;
538 }
539
540 if((err = pci_request_regions(pdev, e1000_driver_name)))
541 return err;
542
543 pci_set_master(pdev);
544
545 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
546 if(!netdev) {
547 err = -ENOMEM;
548 goto err_alloc_etherdev;
549 }
550
551 SET_MODULE_OWNER(netdev);
552 SET_NETDEV_DEV(netdev, &pdev->dev);
553
554 pci_set_drvdata(pdev, netdev);
60490fe0 555 adapter = netdev_priv(netdev);
1da177e4
LT		 556 adapter->netdev = netdev;
557 adapter->pdev = pdev;
558 adapter->hw.back = adapter;
559 adapter->msg_enable = (1 << debug) - 1;
560
561 mmio_start = pci_resource_start(pdev, BAR_0);
562 mmio_len = pci_resource_len(pdev, BAR_0);
563
564 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
565 if(!adapter->hw.hw_addr) {
566 err = -EIO;
567 goto err_ioremap;
568 }
569
570 for(i = BAR_1; i <= BAR_5; i++) {
571 if(pci_resource_len(pdev, i) == 0)
572 continue;
573 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
574 adapter->hw.io_base = pci_resource_start(pdev, i);
575 break;
576 }
577 }
578
579 netdev->open = &e1000_open;
580 netdev->stop = &e1000_close;
581 netdev->hard_start_xmit = &e1000_xmit_frame;
582 netdev->get_stats = &e1000_get_stats;
583 netdev->set_multicast_list = &e1000_set_multi;
584 netdev->set_mac_address = &e1000_set_mac;
585 netdev->change_mtu = &e1000_change_mtu;
586 netdev->do_ioctl = &e1000_ioctl;
587 e1000_set_ethtool_ops(netdev);
588 netdev->tx_timeout = &e1000_tx_timeout;
589 netdev->watchdog_timeo = 5 * HZ;
590#ifdef CONFIG_E1000_NAPI
591 netdev->poll = &e1000_clean;
592 netdev->weight = 64;
593#endif
594 netdev->vlan_rx_register = e1000_vlan_rx_register;
595 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
596 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
597#ifdef CONFIG_NET_POLL_CONTROLLER
598 netdev->poll_controller = e1000_netpoll;
599#endif
600 strcpy(netdev->name, pci_name(pdev));
601
602 netdev->mem_start = mmio_start;
603 netdev->mem_end = mmio_start + mmio_len;
604 netdev->base_addr = adapter->hw.io_base;
605
606 adapter->bd_number = cards_found;
607
608 /* setup the private structure */
609
610 if((err = e1000_sw_init(adapter)))
611 goto err_sw_init;
612
2d7edb92
MC		 613 if((err = e1000_check_phy_reset_block(&adapter->hw)))
614 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
615
1da177e4
LT		 616 if(adapter->hw.mac_type >= e1000_82543) {
617 netdev->features = NETIF_F_SG |
618 NETIF_F_HW_CSUM |
619 NETIF_F_HW_VLAN_TX |
620 NETIF_F_HW_VLAN_RX |
621 NETIF_F_HW_VLAN_FILTER;
622 }
623
624#ifdef NETIF_F_TSO
625 if((adapter->hw.mac_type >= e1000_82544) &&
626 (adapter->hw.mac_type != e1000_82547))
627 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 628
629#ifdef NETIF_F_TSO_IPV6
630 if(adapter->hw.mac_type > e1000_82547_rev_2)
631 netdev->features |= NETIF_F_TSO_IPV6;
632#endif
1da177e4
LT		 633#endif
634 if(pci_using_dac)
635 netdev->features |= NETIF_F_HIGHDMA;
636
637 /* hard_start_xmit is safe against parallel locking */
638 netdev->features |= NETIF_F_LLTX;
639
2d7edb92
MC		 640 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
641
1da177e4
LT		 642 /* before reading the EEPROM, reset the controller to
643 * put the device in a known good starting state */
644
645 e1000_reset_hw(&adapter->hw);
646
647 /* make sure the EEPROM is good */
648
649 if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
650 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
651 err = -EIO;
652 goto err_eeprom;
653 }
654
655 /* copy the MAC address out of the EEPROM */
656
2648345f 657 if(e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 658 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
659 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 660 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 661
9beb0ac1 662 if(!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 663 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
664 err = -EIO;
665 goto err_eeprom;
666 }
667
668 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
669
670 e1000_get_bus_info(&adapter->hw);
671
672 init_timer(&adapter->tx_fifo_stall_timer);
673 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
674 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
675
676 init_timer(&adapter->watchdog_timer);
677 adapter->watchdog_timer.function = &e1000_watchdog;
678 adapter->watchdog_timer.data = (unsigned long) adapter;
679
680 INIT_WORK(&adapter->watchdog_task,
681 (void (*)(void *))e1000_watchdog_task, adapter);
682
683 init_timer(&adapter->phy_info_timer);
684 adapter->phy_info_timer.function = &e1000_update_phy_info;
685 adapter->phy_info_timer.data = (unsigned long) adapter;
686
687 INIT_WORK(&adapter->tx_timeout_task,
688 (void (*)(void *))e1000_tx_timeout_task, netdev);
689
690 /* we're going to reset, so assume we have no link for now */
691
692 netif_carrier_off(netdev);
693 netif_stop_queue(netdev);
694
695 e1000_check_options(adapter);
696
697 /* Initial Wake on LAN setting
698 * If APM wake is enabled in the EEPROM,
699 * enable the ACPI Magic Packet filter
700 */
701
702 switch(adapter->hw.mac_type) {
703 case e1000_82542_rev2_0:
704 case e1000_82542_rev2_1:
705 case e1000_82543:
706 break;
707 case e1000_82544:
708 e1000_read_eeprom(&adapter->hw,
709 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
710 eeprom_apme_mask = E1000_EEPROM_82544_APM;
711 break;
712 case e1000_82546:
713 case e1000_82546_rev_3:
fd803241 714 case e1000_82571:
1da177e4
LT		 715 if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
716 && (adapter->hw.media_type == e1000_media_type_copper)) {
717 e1000_read_eeprom(&adapter->hw,
718 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
719 break;
720 }
721 /* Fall Through */
722 default:
723 e1000_read_eeprom(&adapter->hw,
724 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
725 break;
726 }
727 if(eeprom_data & eeprom_apme_mask)
728 adapter->wol |= E1000_WUFC_MAG;
729
730 /* reset the hardware with the new settings */
731 e1000_reset(adapter);
732
2d7edb92
MC		 733 /* Let firmware know the driver has taken over */
734 switch(adapter->hw.mac_type) {
868d5309
MC		 735 case e1000_82571:
736 case e1000_82572:
737 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
738 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
739 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
740 break;
2d7edb92
MC		 741 case e1000_82573:
742 swsm = E1000_READ_REG(&adapter->hw, SWSM);
743 E1000_WRITE_REG(&adapter->hw, SWSM,
744 swsm | E1000_SWSM_DRV_LOAD);
745 break;
746 default:
747 break;
748 }
749
1da177e4
LT		 750 strcpy(netdev->name, "eth%d");
751 if((err = register_netdev(netdev)))
752 goto err_register;
753
754 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
755
756 cards_found++;
757 return 0;
758
759err_register:
760err_sw_init:
761err_eeprom:
762 iounmap(adapter->hw.hw_addr);
763err_ioremap:
764 free_netdev(netdev);
765err_alloc_etherdev:
766 pci_release_regions(pdev);
767 return err;
768}
769
770/**
771 * e1000_remove - Device Removal Routine
772 * @pdev: PCI device information struct
773 *
774 * e1000_remove is called by the PCI subsystem to alert the driver
775 * that it should release a PCI device. The could be caused by a
776 * Hot-Plug event, or because the driver is going to be removed from
777 * memory.
778 **/
779
780static void __devexit
781e1000_remove(struct pci_dev *pdev)
782{
783 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 784 struct e1000_adapter *adapter = netdev_priv(netdev);
868d5309 785 uint32_t ctrl_ext;
2d7edb92 786 uint32_t manc, swsm;
581d708e
MC		 787#ifdef CONFIG_E1000_NAPI
788 int i;
789#endif
1da177e4 790
be2b28ed
JG		 791 flush_scheduled_work();
792
1da177e4
LT		 793 if(adapter->hw.mac_type >= e1000_82540 &&
794 adapter->hw.media_type == e1000_media_type_copper) {
795 manc = E1000_READ_REG(&adapter->hw, MANC);
796 if(manc & E1000_MANC_SMBUS_EN) {
797 manc |= E1000_MANC_ARP_EN;
798 E1000_WRITE_REG(&adapter->hw, MANC, manc);
799 }
800 }
801
2d7edb92 802 switch(adapter->hw.mac_type) {
868d5309
MC		 803 case e1000_82571:
804 case e1000_82572:
805 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
806 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
807 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
808 break;
2d7edb92
MC		 809 case e1000_82573:
810 swsm = E1000_READ_REG(&adapter->hw, SWSM);
811 E1000_WRITE_REG(&adapter->hw, SWSM,
812 swsm & ~E1000_SWSM_DRV_LOAD);
813 break;
814
815 default:
816 break;
817 }
818
1da177e4 819 unregister_netdev(netdev);
581d708e
MC		 820#ifdef CONFIG_E1000_NAPI
821 for (i = 0; i < adapter->num_queues; i++)
822 __dev_put(&adapter->polling_netdev[i]);
823#endif
1da177e4 824
2d7edb92
MC		 825 if(!e1000_check_phy_reset_block(&adapter->hw))
826 e1000_phy_hw_reset(&adapter->hw);
1da177e4 827
24025e4e
MC		 828 kfree(adapter->tx_ring);
829 kfree(adapter->rx_ring);
830#ifdef CONFIG_E1000_NAPI
831 kfree(adapter->polling_netdev);
832#endif
833
1da177e4
LT		 834 iounmap(adapter->hw.hw_addr);
835 pci_release_regions(pdev);
836
24025e4e
MC		 837#ifdef CONFIG_E1000_MQ
838 free_percpu(adapter->cpu_netdev);
839 free_percpu(adapter->cpu_tx_ring);
840#endif
1da177e4
LT		 841 free_netdev(netdev);
842
843 pci_disable_device(pdev);
844}
845
846/**
847 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
848 * @adapter: board private structure to initialize
849 *
850 * e1000_sw_init initializes the Adapter private data structure.
851 * Fields are initialized based on PCI device information and
852 * OS network device settings (MTU size).
853 **/
854
855static int __devinit
856e1000_sw_init(struct e1000_adapter *adapter)
857{
858 struct e1000_hw *hw = &adapter->hw;
859 struct net_device *netdev = adapter->netdev;
860 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 861#ifdef CONFIG_E1000_NAPI
862 int i;
863#endif
1da177e4
LT		 864
865 /* PCI config space info */
866
867 hw->vendor_id = pdev->vendor;
868 hw->device_id = pdev->device;
869 hw->subsystem_vendor_id = pdev->subsystem_vendor;
870 hw->subsystem_id = pdev->subsystem_device;
871
872 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
873
874 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
875
876 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 877 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 878 hw->max_frame_size = netdev->mtu +
879 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
880 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
881
882 /* identify the MAC */
883
884 if(e1000_set_mac_type(hw)) {
885 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
886 return -EIO;
887 }
888
889 /* initialize eeprom parameters */
890
2d7edb92
MC		 891 if(e1000_init_eeprom_params(hw)) {
892 E1000_ERR("EEPROM initialization failed\n");
893 return -EIO;
894 }
1da177e4
LT		 895
896 switch(hw->mac_type) {
897 default:
898 break;
899 case e1000_82541:
900 case e1000_82547:
901 case e1000_82541_rev_2:
902 case e1000_82547_rev_2:
903 hw->phy_init_script = 1;
904 break;
905 }
906
907 e1000_set_media_type(hw);
908
909 hw->wait_autoneg_complete = FALSE;
910 hw->tbi_compatibility_en = TRUE;
911 hw->adaptive_ifs = TRUE;
912
913 /* Copper options */
914
915 if(hw->media_type == e1000_media_type_copper) {
916 hw->mdix = AUTO_ALL_MODES;
917 hw->disable_polarity_correction = FALSE;
918 hw->master_slave = E1000_MASTER_SLAVE;
919 }
920
24025e4e
MC		 921#ifdef CONFIG_E1000_MQ
922 /* Number of supported queues */
923 switch (hw->mac_type) {
924 case e1000_82571:
925 case e1000_82572:
926 adapter->num_queues = 2;
927 break;
928 default:
929 adapter->num_queues = 1;
930 break;
931 }
932 adapter->num_queues = min(adapter->num_queues, num_online_cpus());
933#else
581d708e 934 adapter->num_queues = 1;
24025e4e 935#endif
581d708e
MC		 936
937 if (e1000_alloc_queues(adapter)) {
938 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
939 return -ENOMEM;
940 }
941
942#ifdef CONFIG_E1000_NAPI
943 for (i = 0; i < adapter->num_queues; i++) {
944 adapter->polling_netdev[i].priv = adapter;
945 adapter->polling_netdev[i].poll = &e1000_clean;
946 adapter->polling_netdev[i].weight = 64;
947 dev_hold(&adapter->polling_netdev[i]);
948 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
949 }
950#endif
24025e4e
MC		 951
952#ifdef CONFIG_E1000_MQ
953 e1000_setup_queue_mapping(adapter);
954#endif
955
1da177e4
LT		 956 atomic_set(&adapter->irq_sem, 1);
957 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 958
959 return 0;
960}
961
581d708e
MC		 962/**
963 * e1000_alloc_queues - Allocate memory for all rings
964 * @adapter: board private structure to initialize
965 *
966 * We allocate one ring per queue at run-time since we don't know the
967 * number of queues at compile-time. The polling_netdev array is
968 * intended for Multiqueue, but should work fine with a single queue.
969 **/
970
971static int __devinit
972e1000_alloc_queues(struct e1000_adapter *adapter)
973{
974 int size;
975
976 size = sizeof(struct e1000_tx_ring) * adapter->num_queues;
977 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
978 if (!adapter->tx_ring)
979 return -ENOMEM;
980 memset(adapter->tx_ring, 0, size);
981
982 size = sizeof(struct e1000_rx_ring) * adapter->num_queues;
983 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
984 if (!adapter->rx_ring) {
985 kfree(adapter->tx_ring);
986 return -ENOMEM;
987 }
988 memset(adapter->rx_ring, 0, size);
989
990#ifdef CONFIG_E1000_NAPI
991 size = sizeof(struct net_device) * adapter->num_queues;
992 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
993 if (!adapter->polling_netdev) {
994 kfree(adapter->tx_ring);
995 kfree(adapter->rx_ring);
996 return -ENOMEM;
997 }
998 memset(adapter->polling_netdev, 0, size);
999#endif
1000
1001 return E1000_SUCCESS;
1002}
1003
24025e4e
MC		 1004#ifdef CONFIG_E1000_MQ
1005static void __devinit
1006e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1007{
1008 int i, cpu;
1009
1010 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1011 adapter->rx_sched_call_data.info = adapter->netdev;
1012 cpus_clear(adapter->rx_sched_call_data.cpumask);
1013
1014 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1015 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1016
1017 lock_cpu_hotplug();
1018 i = 0;
1019 for_each_online_cpu(cpu) {
1020 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_queues];
1021 /* This is incomplete because we'd like to assign separate
1022 * physical cpus to these netdev polling structures and
1023 * avoid saturating a subset of cpus.
1024 */
1025 if (i < adapter->num_queues) {
1026 *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
1027 adapter->cpu_for_queue[i] = cpu;
1028 } else
1029 *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1030
1031 i++;
1032 }
1033 unlock_cpu_hotplug();
1034}
1035#endif
1036
1da177e4
LT		 1037/**
1038 * e1000_open - Called when a network interface is made active
1039 * @netdev: network interface device structure
1040 *
1041 * Returns 0 on success, negative value on failure
1042 *
1043 * The open entry point is called when a network interface is made
1044 * active by the system (IFF_UP). At this point all resources needed
1045 * for transmit and receive operations are allocated, the interrupt
1046 * handler is registered with the OS, the watchdog timer is started,
1047 * and the stack is notified that the interface is ready.
1048 **/
1049
1050static int
1051e1000_open(struct net_device *netdev)
1052{
60490fe0 1053 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1054 int err;
1055
1056 /* allocate transmit descriptors */
1057
581d708e 1058 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1059 goto err_setup_tx;
1060
1061 /* allocate receive descriptors */
1062
581d708e 1063 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1064 goto err_setup_rx;
1065
1066 if((err = e1000_up(adapter)))
1067 goto err_up;
2d7edb92
MC		 1068 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1069 if((adapter->hw.mng_cookie.status &
1070 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1071 e1000_update_mng_vlan(adapter);
1072 }
1da177e4
LT		 1073
1074 return E1000_SUCCESS;
1075
1076err_up:
581d708e 1077 e1000_free_all_rx_resources(adapter);
1da177e4 1078err_setup_rx:
581d708e 1079 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1080err_setup_tx:
1081 e1000_reset(adapter);
1082
1083 return err;
1084}
1085
1086/**
1087 * e1000_close - Disables a network interface
1088 * @netdev: network interface device structure
1089 *
1090 * Returns 0, this is not allowed to fail
1091 *
1092 * The close entry point is called when an interface is de-activated
1093 * by the OS. The hardware is still under the drivers control, but
1094 * needs to be disabled. A global MAC reset is issued to stop the
1095 * hardware, and all transmit and receive resources are freed.
1096 **/
1097
1098static int
1099e1000_close(struct net_device *netdev)
1100{
60490fe0 1101 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1102
1103 e1000_down(adapter);
1104
581d708e
MC		 1105 e1000_free_all_tx_resources(adapter);
1106 e1000_free_all_rx_resources(adapter);
1da177e4 1107
2d7edb92
MC		 1108 if((adapter->hw.mng_cookie.status &
1109 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1110 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1111 }
1da177e4
LT		 1112 return 0;
1113}
1114
1115/**
1116 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1117 * @adapter: address of board private structure
2d7edb92
MC		 1118 * @start: address of beginning of memory
1119 * @len: length of memory
1da177e4
LT		 1120 **/
1121static inline boolean_t
1122e1000_check_64k_bound(struct e1000_adapter *adapter,
1123 void *start, unsigned long len)
1124{
1125 unsigned long begin = (unsigned long) start;
1126 unsigned long end = begin + len;
1127
2648345f
MC		 1128 /* First rev 82545 and 82546 need to not allow any memory
1129 * write location to cross 64k boundary due to errata 23 */
1da177e4 1130 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1131 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1132 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1133 }
1134
1135 return TRUE;
1136}
1137
1138/**
1139 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1140 * @adapter: board private structure
581d708e 1141 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1142 *
1143 * Return 0 on success, negative on failure
1144 **/
1145
3ad2cc67 1146static int
581d708e
MC		 1147e1000_setup_tx_resources(struct e1000_adapter *adapter,
1148 struct e1000_tx_ring *txdr)
1da177e4 1149{
1da177e4
LT		 1150 struct pci_dev *pdev = adapter->pdev;
1151 int size;
1152
1153 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1154
1155 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1da177e4 1156 if(!txdr->buffer_info) {
2648345f
MC		 1157 DPRINTK(PROBE, ERR,
1158 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1159 return -ENOMEM;
1160 }
1161 memset(txdr->buffer_info, 0, size);
1162
1163 /* round up to nearest 4K */
1164
1165 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1166 E1000_ROUNDUP(txdr->size, 4096);
1167
1168 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1169 if(!txdr->desc) {
1170setup_tx_desc_die:
1da177e4 1171 vfree(txdr->buffer_info);
2648345f
MC		 1172 DPRINTK(PROBE, ERR,
1173 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1174 return -ENOMEM;
1175 }
1176
2648345f 1177 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1178 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1179 void *olddesc = txdr->desc;
1180 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1181 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1182 "at %p\n", txdr->size, txdr->desc);
1183 /* Try again, without freeing the previous */
1da177e4 1184 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1da177e4 1185 if(!txdr->desc) {
2648345f 1186 /* Failed allocation, critical failure */
1da177e4
LT		 1187 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1188 goto setup_tx_desc_die;
1189 }
1190
1191 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1192 /* give up */
2648345f
MC		 1193 pci_free_consistent(pdev, txdr->size, txdr->desc,
1194 txdr->dma);
1da177e4
LT		 1195 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1196 DPRINTK(PROBE, ERR,
2648345f
MC		 1197 "Unable to allocate aligned memory "
1198 "for the transmit descriptor ring\n");
1da177e4
LT		 1199 vfree(txdr->buffer_info);
1200 return -ENOMEM;
1201 } else {
2648345f 1202 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1203 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1204 }
1205 }
1206 memset(txdr->desc, 0, txdr->size);
1207
1208 txdr->next_to_use = 0;
1209 txdr->next_to_clean = 0;
2ae76d98 1210 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1211
1212 return 0;
1213}
1214
581d708e
MC		 1215/**
1216 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1217 * (Descriptors) for all queues
1218 * @adapter: board private structure
1219 *
1220 * If this function returns with an error, then it's possible one or
1221 * more of the rings is populated (while the rest are not). It is the
1222 * callers duty to clean those orphaned rings.
1223 *
1224 * Return 0 on success, negative on failure
1225 **/
1226
1227int
1228e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1229{
1230 int i, err = 0;
1231
1232 for (i = 0; i < adapter->num_queues; i++) {
1233 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1234 if (err) {
1235 DPRINTK(PROBE, ERR,
1236 "Allocation for Tx Queue %u failed\n", i);
1237 break;
1238 }
1239 }
1240
1241 return err;
1242}
1243
1da177e4
LT		 1244/**
1245 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1246 * @adapter: board private structure
1247 *
1248 * Configure the Tx unit of the MAC after a reset.
1249 **/
1250
1251static void
1252e1000_configure_tx(struct e1000_adapter *adapter)
1253{
581d708e
MC		 1254 uint64_t tdba;
1255 struct e1000_hw *hw = &adapter->hw;
1256 uint32_t tdlen, tctl, tipg, tarc;
1da177e4
LT		 1257
1258 /* Setup the HW Tx Head and Tail descriptor pointers */
1259
24025e4e
MC		 1260 switch (adapter->num_queues) {
1261 case 2:
1262 tdba = adapter->tx_ring[1].dma;
1263 tdlen = adapter->tx_ring[1].count *
1264 sizeof(struct e1000_tx_desc);
1265 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1266 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1267 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1268 E1000_WRITE_REG(hw, TDH1, 0);
1269 E1000_WRITE_REG(hw, TDT1, 0);
1270 adapter->tx_ring[1].tdh = E1000_TDH1;
1271 adapter->tx_ring[1].tdt = E1000_TDT1;
1272 /* Fall Through */
1273 case 1:
1274 default:
581d708e
MC		 1275 tdba = adapter->tx_ring[0].dma;
1276 tdlen = adapter->tx_ring[0].count *
1277 sizeof(struct e1000_tx_desc);
1278 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1279 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1280 E1000_WRITE_REG(hw, TDLEN, tdlen);
1281 E1000_WRITE_REG(hw, TDH, 0);
1282 E1000_WRITE_REG(hw, TDT, 0);
1283 adapter->tx_ring[0].tdh = E1000_TDH;
1284 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1285 break;
1286 }
1da177e4
LT		 1287
1288 /* Set the default values for the Tx Inter Packet Gap timer */
1289
581d708e 1290 switch (hw->mac_type) {
1da177e4
LT		 1291 case e1000_82542_rev2_0:
1292 case e1000_82542_rev2_1:
1293 tipg = DEFAULT_82542_TIPG_IPGT;
1294 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1295 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1296 break;
1297 default:
581d708e
MC		 1298 if (hw->media_type == e1000_media_type_fiber ||
1299 hw->media_type == e1000_media_type_internal_serdes)
1da177e4
LT		 1300 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1301 else
1302 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1303 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1304 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1305 }
581d708e 1306 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1307
1308 /* Set the Tx Interrupt Delay register */
1309
581d708e
MC		 1310 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1311 if (hw->mac_type >= e1000_82540)
1312 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1313
1314 /* Program the Transmit Control Register */
1315
581d708e 1316 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1317
1318 tctl &= ~E1000_TCTL_CT;
24025e4e 1319 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1320 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1321
581d708e 1322 E1000_WRITE_REG(hw, TCTL, tctl);
1da177e4 1323
2ae76d98
MC		 1324 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1325 tarc = E1000_READ_REG(hw, TARC0);
1326 tarc |= ((1 << 25) | (1 << 21));
1327 E1000_WRITE_REG(hw, TARC0, tarc);
1328 tarc = E1000_READ_REG(hw, TARC1);
1329 tarc |= (1 << 25);
1330 if (tctl & E1000_TCTL_MULR)
1331 tarc &= ~(1 << 28);
1332 else
1333 tarc |= (1 << 28);
1334 E1000_WRITE_REG(hw, TARC1, tarc);
1335 }
1336
581d708e 1337 e1000_config_collision_dist(hw);
1da177e4
LT		 1338
1339 /* Setup Transmit Descriptor Settings for eop descriptor */
1340 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1341 E1000_TXD_CMD_IFCS;
1342
581d708e 1343 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1344 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1345 else
1346 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1347
1348 /* Cache if we're 82544 running in PCI-X because we'll
1349 * need this to apply a workaround later in the send path. */
581d708e
MC		 1350 if (hw->mac_type == e1000_82544 &&
1351 hw->bus_type == e1000_bus_type_pcix)
1da177e4
LT		 1352 adapter->pcix_82544 = 1;
1353}
1354
1355/**
1356 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1357 * @adapter: board private structure
581d708e 1358 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1359 *
1360 * Returns 0 on success, negative on failure
1361 **/
1362
3ad2cc67 1363static int
581d708e
MC		 1364e1000_setup_rx_resources(struct e1000_adapter *adapter,
1365 struct e1000_rx_ring *rxdr)
1da177e4 1366{
1da177e4 1367 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1368 int size, desc_len;
1da177e4
LT		 1369
1370 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1371 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1372 if (!rxdr->buffer_info) {
2648345f
MC		 1373 DPRINTK(PROBE, ERR,
1374 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1375 return -ENOMEM;
1376 }
1377 memset(rxdr->buffer_info, 0, size);
1378
2d7edb92
MC		 1379 size = sizeof(struct e1000_ps_page) * rxdr->count;
1380 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1381 if(!rxdr->ps_page) {
1382 vfree(rxdr->buffer_info);
1383 DPRINTK(PROBE, ERR,
1384 "Unable to allocate memory for the receive descriptor ring\n");
1385 return -ENOMEM;
1386 }
1387 memset(rxdr->ps_page, 0, size);
1388
1389 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1390 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1391 if(!rxdr->ps_page_dma) {
1392 vfree(rxdr->buffer_info);
1393 kfree(rxdr->ps_page);
1394 DPRINTK(PROBE, ERR,
1395 "Unable to allocate memory for the receive descriptor ring\n");
1396 return -ENOMEM;
1397 }
1398 memset(rxdr->ps_page_dma, 0, size);
1399
1400 if(adapter->hw.mac_type <= e1000_82547_rev_2)
1401 desc_len = sizeof(struct e1000_rx_desc);
1402 else
1403 desc_len = sizeof(union e1000_rx_desc_packet_split);
1404
1da177e4
LT		 1405 /* Round up to nearest 4K */
1406
2d7edb92 1407 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1408 E1000_ROUNDUP(rxdr->size, 4096);
1409
1410 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1411
581d708e
MC		 1412 if (!rxdr->desc) {
1413 DPRINTK(PROBE, ERR,
1414 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1415setup_rx_desc_die:
1da177e4 1416 vfree(rxdr->buffer_info);
2d7edb92
MC		 1417 kfree(rxdr->ps_page);
1418 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1419 return -ENOMEM;
1420 }
1421
2648345f 1422 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1423 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1424 void *olddesc = rxdr->desc;
1425 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1426 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1427 "at %p\n", rxdr->size, rxdr->desc);
1428 /* Try again, without freeing the previous */
1da177e4 1429 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1430 /* Failed allocation, critical failure */
581d708e 1431 if (!rxdr->desc) {
1da177e4 1432 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1433 DPRINTK(PROBE, ERR,
1434 "Unable to allocate memory "
1435 "for the receive descriptor ring\n");
1da177e4
LT		 1436 goto setup_rx_desc_die;
1437 }
1438
1439 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1440 /* give up */
2648345f
MC		 1441 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1442 rxdr->dma);
1da177e4 1443 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1444 DPRINTK(PROBE, ERR,
1445 "Unable to allocate aligned memory "
1446 "for the receive descriptor ring\n");
581d708e 1447 goto setup_rx_desc_die;
1da177e4 1448 } else {
2648345f 1449 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1450 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1451 }
1452 }
1453 memset(rxdr->desc, 0, rxdr->size);
1454
1455 rxdr->next_to_clean = 0;
1456 rxdr->next_to_use = 0;
1457
1458 return 0;
1459}
1460
581d708e
MC		 1461/**
1462 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1463 * (Descriptors) for all queues
1464 * @adapter: board private structure
1465 *
1466 * If this function returns with an error, then it's possible one or
1467 * more of the rings is populated (while the rest are not). It is the
1468 * callers duty to clean those orphaned rings.
1469 *
1470 * Return 0 on success, negative on failure
1471 **/
1472
1473int
1474e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1475{
1476 int i, err = 0;
1477
1478 for (i = 0; i < adapter->num_queues; i++) {
1479 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1480 if (err) {
1481 DPRINTK(PROBE, ERR,
1482 "Allocation for Rx Queue %u failed\n", i);
1483 break;
1484 }
1485 }
1486
1487 return err;
1488}
1489
1da177e4 1490/**
2648345f 1491 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1492 * @adapter: Board private structure
1493 **/
e4c811c9
MC		 1494#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1495 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1496static void
1497e1000_setup_rctl(struct e1000_adapter *adapter)
1498{
2d7edb92
MC		 1499 uint32_t rctl, rfctl;
1500 uint32_t psrctl = 0;
e4c811c9
MC		 1501#ifdef CONFIG_E1000_PACKET_SPLIT
1502 uint32_t pages = 0;
1503#endif
1da177e4
LT		 1504
1505 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1506
1507 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1508
1509 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1510 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1511 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1512
1513 if(adapter->hw.tbi_compatibility_on == 1)
1514 rctl |= E1000_RCTL_SBP;
1515 else
1516 rctl &= ~E1000_RCTL_SBP;
1517
2d7edb92
MC		 1518 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1519 rctl &= ~E1000_RCTL_LPE;
1520 else
1521 rctl |= E1000_RCTL_LPE;
1522
1da177e4 1523 /* Setup buffer sizes */
868d5309 1524 if(adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1525 /* We can now specify buffers in 1K increments.
1526 * BSIZE and BSEX are ignored in this case. */
1527 rctl |= adapter->rx_buffer_len << 0x11;
1528 } else {
1529 rctl &= ~E1000_RCTL_SZ_4096;
1530 rctl |= E1000_RCTL_BSEX;
1531 switch (adapter->rx_buffer_len) {
1532 case E1000_RXBUFFER_2048:
1533 default:
1534 rctl |= E1000_RCTL_SZ_2048;
1535 rctl &= ~E1000_RCTL_BSEX;
1536 break;
1537 case E1000_RXBUFFER_4096:
1538 rctl |= E1000_RCTL_SZ_4096;
1539 break;
1540 case E1000_RXBUFFER_8192:
1541 rctl |= E1000_RCTL_SZ_8192;
1542 break;
1543 case E1000_RXBUFFER_16384:
1544 rctl |= E1000_RCTL_SZ_16384;
1545 break;
1546 }
1547 }
1548
1549#ifdef CONFIG_E1000_PACKET_SPLIT
1550 /* 82571 and greater support packet-split where the protocol
1551 * header is placed in skb->data and the packet data is
1552 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1553 * In the case of a non-split, skb->data is linearly filled,
1554 * followed by the page buffers. Therefore, skb->data is
1555 * sized to hold the largest protocol header.
1556 */
e4c811c9
MC		 1557 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1558 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1559 PAGE_SIZE <= 16384)
1560 adapter->rx_ps_pages = pages;
1561 else
1562 adapter->rx_ps_pages = 0;
2d7edb92 1563#endif
e4c811c9 1564 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1565 /* Configure extra packet-split registers */
1566 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1567 rfctl |= E1000_RFCTL_EXTEN;
1568 /* disable IPv6 packet split support */
1569 rfctl |= E1000_RFCTL_IPV6_DIS;
1570 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1571
1572 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1573
1574 psrctl |= adapter->rx_ps_bsize0 >>
1575 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1576
1577 switch (adapter->rx_ps_pages) {
1578 case 3:
1579 psrctl |= PAGE_SIZE <<
1580 E1000_PSRCTL_BSIZE3_SHIFT;
1581 case 2:
1582 psrctl |= PAGE_SIZE <<
1583 E1000_PSRCTL_BSIZE2_SHIFT;
1584 case 1:
1585 psrctl |= PAGE_SIZE >>
1586 E1000_PSRCTL_BSIZE1_SHIFT;
1587 break;
1588 }
2d7edb92
MC		 1589
1590 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1591 }
1592
1593 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1594}
1595
1596/**
1597 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1598 * @adapter: board private structure
1599 *
1600 * Configure the Rx unit of the MAC after a reset.
1601 **/
1602
1603static void
1604e1000_configure_rx(struct e1000_adapter *adapter)
1605{
581d708e
MC		 1606 uint64_t rdba;
1607 struct e1000_hw *hw = &adapter->hw;
1608 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1609#ifdef CONFIG_E1000_MQ
1610 uint32_t reta, mrqc;
1611 int i;
1612#endif
2d7edb92 1613
e4c811c9 1614 if (adapter->rx_ps_pages) {
581d708e 1615 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1616 sizeof(union e1000_rx_desc_packet_split);
1617 adapter->clean_rx = e1000_clean_rx_irq_ps;
1618 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1619 } else {
581d708e
MC		 1620 rdlen = adapter->rx_ring[0].count *
1621 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1622 adapter->clean_rx = e1000_clean_rx_irq;
1623 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1624 }
1da177e4
LT		 1625
1626 /* disable receives while setting up the descriptors */
581d708e
MC		 1627 rctl = E1000_READ_REG(hw, RCTL);
1628 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1629
1630 /* set the Receive Delay Timer Register */
581d708e 1631 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1632
581d708e
MC		 1633 if (hw->mac_type >= e1000_82540) {
1634 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1da177e4 1635 if(adapter->itr > 1)
581d708e 1636 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1637 1000000000 / (adapter->itr * 256));
1638 }
1639
2ae76d98
MC		 1640 if (hw->mac_type >= e1000_82571) {
1641 /* Reset delay timers after every interrupt */
1642 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1643 ctrl_ext |= E1000_CTRL_EXT_CANC;
1644 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1645 E1000_WRITE_FLUSH(hw);
1646 }
1647
581d708e
MC		 1648 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1649 * the Base and Length of the Rx Descriptor Ring */
24025e4e
MC		 1650 switch (adapter->num_queues) {
1651#ifdef CONFIG_E1000_MQ
1652 case 2:
1653 rdba = adapter->rx_ring[1].dma;
1654 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1655 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1656 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1657 E1000_WRITE_REG(hw, RDH1, 0);
1658 E1000_WRITE_REG(hw, RDT1, 0);
1659 adapter->rx_ring[1].rdh = E1000_RDH1;
1660 adapter->rx_ring[1].rdt = E1000_RDT1;
1661 /* Fall Through */
1662#endif
1663 case 1:
1664 default:
581d708e
MC		 1665 rdba = adapter->rx_ring[0].dma;
1666 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1667 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1668 E1000_WRITE_REG(hw, RDLEN, rdlen);
1669 E1000_WRITE_REG(hw, RDH, 0);
1670 E1000_WRITE_REG(hw, RDT, 0);
1671 adapter->rx_ring[0].rdh = E1000_RDH;
1672 adapter->rx_ring[0].rdt = E1000_RDT;
1673 break;
24025e4e
MC		 1674 }
1675
1676#ifdef CONFIG_E1000_MQ
1677 if (adapter->num_queues > 1) {
1678 uint32_t random[10];
1679
1680 get_random_bytes(&random[0], 40);
1681
1682 if (hw->mac_type <= e1000_82572) {
1683 E1000_WRITE_REG(hw, RSSIR, 0);
1684 E1000_WRITE_REG(hw, RSSIM, 0);
1685 }
1686
1687 switch (adapter->num_queues) {
1688 case 2:
1689 default:
1690 reta = 0x00800080;
1691 mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1692 break;
1693 }
1694
1695 /* Fill out redirection table */
1696 for (i = 0; i < 32; i++)
1697 E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1698 /* Fill out hash function seeds */
1699 for (i = 0; i < 10; i++)
1700 E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1701
1702 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1703 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1704 E1000_WRITE_REG(hw, MRQC, mrqc);
1705 }
1706
1707 /* Multiqueue and packet checksumming are mutually exclusive. */
1708 if (hw->mac_type >= e1000_82571) {
1709 rxcsum = E1000_READ_REG(hw, RXCSUM);
1710 rxcsum |= E1000_RXCSUM_PCSD;
1711 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1712 }
1713
1714#else
1da177e4
LT		 1715
1716 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1717 if (hw->mac_type >= e1000_82543) {
1718 rxcsum = E1000_READ_REG(hw, RXCSUM);
2d7edb92
MC		 1719 if(adapter->rx_csum == TRUE) {
1720 rxcsum |= E1000_RXCSUM_TUOFL;
1721
868d5309 1722 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1723 * Must be used in conjunction with packet-split. */
e4c811c9
MC		 1724 if ((hw->mac_type >= e1000_82571) &&
1725 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1726 rxcsum |= E1000_RXCSUM_IPPCSE;
1727 }
1728 } else {
1729 rxcsum &= ~E1000_RXCSUM_TUOFL;
1730 /* don't need to clear IPPCSE as it defaults to 0 */
1731 }
581d708e 1732 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4 1733 }
24025e4e 1734#endif /* CONFIG_E1000_MQ */
1da177e4 1735
581d708e
MC		 1736 if (hw->mac_type == e1000_82573)
1737 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1738
1da177e4 1739 /* Enable Receives */
581d708e 1740 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1741}
1742
1743/**
581d708e 1744 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1745 * @adapter: board private structure
581d708e 1746 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1747 *
1748 * Free all transmit software resources
1749 **/
1750
3ad2cc67 1751static void
581d708e
MC		 1752e1000_free_tx_resources(struct e1000_adapter *adapter,
1753 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1754{
1755 struct pci_dev *pdev = adapter->pdev;
1756
581d708e 1757 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1758
581d708e
MC		 1759 vfree(tx_ring->buffer_info);
1760 tx_ring->buffer_info = NULL;
1da177e4 1761
581d708e 1762 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1763
581d708e
MC		 1764 tx_ring->desc = NULL;
1765}
1766
1767/**
1768 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1769 * @adapter: board private structure
1770 *
1771 * Free all transmit software resources
1772 **/
1773
1774void
1775e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1776{
1777 int i;
1778
1779 for (i = 0; i < adapter->num_queues; i++)
1780 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1781}
1782
1783static inline void
1784e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1785 struct e1000_buffer *buffer_info)
1786{
1da177e4 1787 if(buffer_info->dma) {
2648345f
MC		 1788 pci_unmap_page(adapter->pdev,
1789 buffer_info->dma,
1790 buffer_info->length,
1791 PCI_DMA_TODEVICE);
1da177e4
LT		 1792 buffer_info->dma = 0;
1793 }
1794 if(buffer_info->skb) {
1795 dev_kfree_skb_any(buffer_info->skb);
1796 buffer_info->skb = NULL;
1797 }
1798}
1799
1800/**
1801 * e1000_clean_tx_ring - Free Tx Buffers
1802 * @adapter: board private structure
581d708e 1803 * @tx_ring: ring to be cleaned
1da177e4
LT		 1804 **/
1805
1806static void
581d708e
MC		 1807e1000_clean_tx_ring(struct e1000_adapter *adapter,
1808 struct e1000_tx_ring *tx_ring)
1da177e4 1809{
1da177e4
LT		 1810 struct e1000_buffer *buffer_info;
1811 unsigned long size;
1812 unsigned int i;
1813
1814 /* Free all the Tx ring sk_buffs */
1815
1da177e4
LT		 1816 for(i = 0; i < tx_ring->count; i++) {
1817 buffer_info = &tx_ring->buffer_info[i];
1818 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1819 }
1820
1821 size = sizeof(struct e1000_buffer) * tx_ring->count;
1822 memset(tx_ring->buffer_info, 0, size);
1823
1824 /* Zero out the descriptor ring */
1825
1826 memset(tx_ring->desc, 0, tx_ring->size);
1827
1828 tx_ring->next_to_use = 0;
1829 tx_ring->next_to_clean = 0;
fd803241 1830 tx_ring->last_tx_tso = 0;
1da177e4 1831
581d708e
MC		 1832 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1833 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1834}
1835
1836/**
1837 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1838 * @adapter: board private structure
1839 **/
1840
1841static void
1842e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1843{
1844 int i;
1845
1846 for (i = 0; i < adapter->num_queues; i++)
1847 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1848}
1849
1850/**
1851 * e1000_free_rx_resources - Free Rx Resources
1852 * @adapter: board private structure
581d708e 1853 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1854 *
1855 * Free all receive software resources
1856 **/
1857
3ad2cc67 1858static void
581d708e
MC		 1859e1000_free_rx_resources(struct e1000_adapter *adapter,
1860 struct e1000_rx_ring *rx_ring)
1da177e4 1861{
1da177e4
LT		 1862 struct pci_dev *pdev = adapter->pdev;
1863
581d708e 1864 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1865
1866 vfree(rx_ring->buffer_info);
1867 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1868 kfree(rx_ring->ps_page);
1869 rx_ring->ps_page = NULL;
1870 kfree(rx_ring->ps_page_dma);
1871 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1872
1873 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1874
1875 rx_ring->desc = NULL;
1876}
1877
1878/**
581d708e 1879 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1880 * @adapter: board private structure
581d708e
MC		 1881 *
1882 * Free all receive software resources
1883 **/
1884
1885void
1886e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1887{
1888 int i;
1889
1890 for (i = 0; i < adapter->num_queues; i++)
1891 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1892}
1893
1894/**
1895 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1896 * @adapter: board private structure
1897 * @rx_ring: ring to free buffers from
1da177e4
LT		 1898 **/
1899
1900static void
581d708e
MC		 1901e1000_clean_rx_ring(struct e1000_adapter *adapter,
1902 struct e1000_rx_ring *rx_ring)
1da177e4 1903{
1da177e4 1904 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1905 struct e1000_ps_page *ps_page;
1906 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1907 struct pci_dev *pdev = adapter->pdev;
1908 unsigned long size;
2d7edb92 1909 unsigned int i, j;
1da177e4
LT		 1910
1911 /* Free all the Rx ring sk_buffs */
1912
1913 for(i = 0; i < rx_ring->count; i++) {
1914 buffer_info = &rx_ring->buffer_info[i];
1915 if(buffer_info->skb) {
2d7edb92
MC		 1916 ps_page = &rx_ring->ps_page[i];
1917 ps_page_dma = &rx_ring->ps_page_dma[i];
1da177e4
LT		 1918 pci_unmap_single(pdev,
1919 buffer_info->dma,
1920 buffer_info->length,
1921 PCI_DMA_FROMDEVICE);
1922
1923 dev_kfree_skb(buffer_info->skb);
1924 buffer_info->skb = NULL;
2d7edb92 1925
e4c811c9 1926 for(j = 0; j < adapter->rx_ps_pages; j++) {
2d7edb92
MC		 1927 if(!ps_page->ps_page[j]) break;
1928 pci_unmap_single(pdev,
1929 ps_page_dma->ps_page_dma[j],
1930 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1931 ps_page_dma->ps_page_dma[j] = 0;
1932 put_page(ps_page->ps_page[j]);
1933 ps_page->ps_page[j] = NULL;
1934 }
1da177e4
LT		 1935 }
1936 }
1937
1938 size = sizeof(struct e1000_buffer) * rx_ring->count;
1939 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 1940 size = sizeof(struct e1000_ps_page) * rx_ring->count;
1941 memset(rx_ring->ps_page, 0, size);
1942 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
1943 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 1944
1945 /* Zero out the descriptor ring */
1946
1947 memset(rx_ring->desc, 0, rx_ring->size);
1948
1949 rx_ring->next_to_clean = 0;
1950 rx_ring->next_to_use = 0;
1951
581d708e
MC		 1952 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
1953 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
1954}
1955
1956/**
1957 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
1958 * @adapter: board private structure
1959 **/
1960
1961static void
1962e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
1963{
1964 int i;
1965
1966 for (i = 0; i < adapter->num_queues; i++)
1967 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 1968}
1969
1970/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
1971 * and memory write and invalidate disabled for certain operations
1972 */
1973static void
1974e1000_enter_82542_rst(struct e1000_adapter *adapter)
1975{
1976 struct net_device *netdev = adapter->netdev;
1977 uint32_t rctl;
1978
1979 e1000_pci_clear_mwi(&adapter->hw);
1980
1981 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1982 rctl |= E1000_RCTL_RST;
1983 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1984 E1000_WRITE_FLUSH(&adapter->hw);
1985 mdelay(5);
1986
1987 if(netif_running(netdev))
581d708e 1988 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 1989}
1990
1991static void
1992e1000_leave_82542_rst(struct e1000_adapter *adapter)
1993{
1994 struct net_device *netdev = adapter->netdev;
1995 uint32_t rctl;
1996
1997 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1998 rctl &= ~E1000_RCTL_RST;
1999 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2000 E1000_WRITE_FLUSH(&adapter->hw);
2001 mdelay(5);
2002
2003 if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2004 e1000_pci_set_mwi(&adapter->hw);
2005
2006 if(netif_running(netdev)) {
2007 e1000_configure_rx(adapter);
581d708e 2008 e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
1da177e4
LT		 2009 }
2010}
2011
2012/**
2013 * e1000_set_mac - Change the Ethernet Address of the NIC
2014 * @netdev: network interface device structure
2015 * @p: pointer to an address structure
2016 *
2017 * Returns 0 on success, negative on failure
2018 **/
2019
2020static int
2021e1000_set_mac(struct net_device *netdev, void *p)
2022{
60490fe0 2023 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2024 struct sockaddr *addr = p;
2025
2026 if(!is_valid_ether_addr(addr->sa_data))
2027 return -EADDRNOTAVAIL;
2028
2029 /* 82542 2.0 needs to be in reset to write receive address registers */
2030
2031 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2032 e1000_enter_82542_rst(adapter);
2033
2034 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2035 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2036
2037 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2038
868d5309
MC		 2039 /* With 82571 controllers, LAA may be overwritten (with the default)
2040 * due to controller reset from the other port. */
2041 if (adapter->hw.mac_type == e1000_82571) {
2042 /* activate the work around */
2043 adapter->hw.laa_is_present = 1;
2044
2045 /* Hold a copy of the LAA in RAR[14] This is done so that
2046 * between the time RAR[0] gets clobbered and the time it
2047 * gets fixed (in e1000_watchdog), the actual LAA is in one
2048 * of the RARs and no incoming packets directed to this port
2049 * are dropped. Eventaully the LAA will be in RAR[0] and
2050 * RAR[14] */
2051 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2052 E1000_RAR_ENTRIES - 1);
2053 }
2054
1da177e4
LT		 2055 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2056 e1000_leave_82542_rst(adapter);
2057
2058 return 0;
2059}
2060
2061/**
2062 * e1000_set_multi - Multicast and Promiscuous mode set
2063 * @netdev: network interface device structure
2064 *
2065 * The set_multi entry point is called whenever the multicast address
2066 * list or the network interface flags are updated. This routine is
2067 * responsible for configuring the hardware for proper multicast,
2068 * promiscuous mode, and all-multi behavior.
2069 **/
2070
2071static void
2072e1000_set_multi(struct net_device *netdev)
2073{
60490fe0 2074 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2075 struct e1000_hw *hw = &adapter->hw;
2076 struct dev_mc_list *mc_ptr;
2077 uint32_t rctl;
2078 uint32_t hash_value;
868d5309 2079 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2080
868d5309
MC		 2081 /* reserve RAR[14] for LAA over-write work-around */
2082 if (adapter->hw.mac_type == e1000_82571)
2083 rar_entries--;
1da177e4 2084
2648345f
MC		 2085 /* Check for Promiscuous and All Multicast modes */
2086
1da177e4
LT		 2087 rctl = E1000_READ_REG(hw, RCTL);
2088
2089 if(netdev->flags & IFF_PROMISC) {
2090 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2091 } else if(netdev->flags & IFF_ALLMULTI) {
2092 rctl |= E1000_RCTL_MPE;
2093 rctl &= ~E1000_RCTL_UPE;
2094 } else {
2095 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2096 }
2097
2098 E1000_WRITE_REG(hw, RCTL, rctl);
2099
2100 /* 82542 2.0 needs to be in reset to write receive address registers */
2101
2102 if(hw->mac_type == e1000_82542_rev2_0)
2103 e1000_enter_82542_rst(adapter);
2104
2105 /* load the first 14 multicast address into the exact filters 1-14
2106 * RAR 0 is used for the station MAC adddress
2107 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2108 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2109 */
2110 mc_ptr = netdev->mc_list;
2111
868d5309
MC		 2112 for(i = 1; i < rar_entries; i++) {
2113 if (mc_ptr) {
1da177e4
LT		 2114 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2115 mc_ptr = mc_ptr->next;
2116 } else {
2117 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2118 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2119 }
2120 }
2121
2122 /* clear the old settings from the multicast hash table */
2123
2124 for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
2125 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2126
2127 /* load any remaining addresses into the hash table */
2128
2129 for(; mc_ptr; mc_ptr = mc_ptr->next) {
2130 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2131 e1000_mta_set(hw, hash_value);
2132 }
2133
2134 if(hw->mac_type == e1000_82542_rev2_0)
2135 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2136}
2137
2138/* Need to wait a few seconds after link up to get diagnostic information from
2139 * the phy */
2140
2141static void
2142e1000_update_phy_info(unsigned long data)
2143{
2144 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2145 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2146}
2147
2148/**
2149 * e1000_82547_tx_fifo_stall - Timer Call-back
2150 * @data: pointer to adapter cast into an unsigned long
2151 **/
2152
2153static void
2154e1000_82547_tx_fifo_stall(unsigned long data)
2155{
2156 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2157 struct net_device *netdev = adapter->netdev;
2158 uint32_t tctl;
2159
2160 if(atomic_read(&adapter->tx_fifo_stall)) {
2161 if((E1000_READ_REG(&adapter->hw, TDT) ==
2162 E1000_READ_REG(&adapter->hw, TDH)) &&
2163 (E1000_READ_REG(&adapter->hw, TDFT) ==
2164 E1000_READ_REG(&adapter->hw, TDFH)) &&
2165 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2166 E1000_READ_REG(&adapter->hw, TDFHS))) {
2167 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2168 E1000_WRITE_REG(&adapter->hw, TCTL,
2169 tctl & ~E1000_TCTL_EN);
2170 E1000_WRITE_REG(&adapter->hw, TDFT,
2171 adapter->tx_head_addr);
2172 E1000_WRITE_REG(&adapter->hw, TDFH,
2173 adapter->tx_head_addr);
2174 E1000_WRITE_REG(&adapter->hw, TDFTS,
2175 adapter->tx_head_addr);
2176 E1000_WRITE_REG(&adapter->hw, TDFHS,
2177 adapter->tx_head_addr);
2178 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2179 E1000_WRITE_FLUSH(&adapter->hw);
2180
2181 adapter->tx_fifo_head = 0;
2182 atomic_set(&adapter->tx_fifo_stall, 0);
2183 netif_wake_queue(netdev);
2184 } else {
2185 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2186 }
2187 }
2188}
2189
2190/**
2191 * e1000_watchdog - Timer Call-back
2192 * @data: pointer to adapter cast into an unsigned long
2193 **/
2194static void
2195e1000_watchdog(unsigned long data)
2196{
2197 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2198
2199 /* Do the rest outside of interrupt context */
2200 schedule_work(&adapter->watchdog_task);
2201}
2202
2203static void
2204e1000_watchdog_task(struct e1000_adapter *adapter)
2205{
2206 struct net_device *netdev = adapter->netdev;
581d708e 2207 struct e1000_tx_ring *txdr = &adapter->tx_ring[0];
1da177e4
LT		 2208 uint32_t link;
2209
2210 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2211 if (adapter->hw.mac_type == e1000_82573) {
2212 e1000_enable_tx_pkt_filtering(&adapter->hw);
2213 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2214 e1000_update_mng_vlan(adapter);
2215 }
1da177e4
LT		 2216
2217 if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2218 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2219 link = !adapter->hw.serdes_link_down;
2220 else
2221 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2222
2223 if(link) {
2224 if(!netif_carrier_ok(netdev)) {
2225 e1000_get_speed_and_duplex(&adapter->hw,
2226 &adapter->link_speed,
2227 &adapter->link_duplex);
2228
2229 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2230 adapter->link_speed,
2231 adapter->link_duplex == FULL_DUPLEX ?
2232 "Full Duplex" : "Half Duplex");
2233
2234 netif_carrier_on(netdev);
2235 netif_wake_queue(netdev);
2236 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2237 adapter->smartspeed = 0;
2238 }
2239 } else {
2240 if(netif_carrier_ok(netdev)) {
2241 adapter->link_speed = 0;
2242 adapter->link_duplex = 0;
2243 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2244 netif_carrier_off(netdev);
2245 netif_stop_queue(netdev);
2246 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2247 }
2248
2249 e1000_smartspeed(adapter);
2250 }
2251
2252 e1000_update_stats(adapter);
2253
2254 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2255 adapter->tpt_old = adapter->stats.tpt;
2256 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2257 adapter->colc_old = adapter->stats.colc;
2258
2259 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2260 adapter->gorcl_old = adapter->stats.gorcl;
2261 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2262 adapter->gotcl_old = adapter->stats.gotcl;
2263
2264 e1000_update_adaptive(&adapter->hw);
2265
581d708e
MC		 2266 if (adapter->num_queues == 1 && !netif_carrier_ok(netdev)) {
2267 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2268 /* We've lost link, so the controller stops DMA,
2269 * but we've got queued Tx work that's never going
2270 * to get done, so reset controller to flush Tx.
2271 * (Do the reset outside of interrupt context). */
2272 schedule_work(&adapter->tx_timeout_task);
2273 }
2274 }
2275
2276 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2277 if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2278 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2279 * asymmetrical Tx or Rx gets ITR=8000; everyone
2280 * else is between 2000-8000. */
2281 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2282 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2283 adapter->gotcl - adapter->gorcl :
2284 adapter->gorcl - adapter->gotcl) / 10000;
2285 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2286 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2287 }
2288
2289 /* Cause software interrupt to ensure rx ring is cleaned */
2290 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2291
2648345f 2292 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2293 adapter->detect_tx_hung = TRUE;
2294
868d5309
MC		 2295 /* With 82571 controllers, LAA may be overwritten due to controller
2296 * reset from the other port. Set the appropriate LAA in RAR[0] */
2297 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2298 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2299
1da177e4
LT		 2300 /* Reset the timer */
2301 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2302}
2303
2304#define E1000_TX_FLAGS_CSUM 0x00000001
2305#define E1000_TX_FLAGS_VLAN 0x00000002
2306#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2307#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2308#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2309#define E1000_TX_FLAGS_VLAN_SHIFT 16
2310
2311static inline int
581d708e
MC		 2312e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2313 struct sk_buff *skb)
1da177e4
LT		 2314{
2315#ifdef NETIF_F_TSO
2316 struct e1000_context_desc *context_desc;
2317 unsigned int i;
2318 uint32_t cmd_length = 0;
2d7edb92 2319 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2320 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2321 int err;
2322
2323 if(skb_shinfo(skb)->tso_size) {
2324 if (skb_header_cloned(skb)) {
2325 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2326 if (err)
2327 return err;
2328 }
2329
2330 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2331 mss = skb_shinfo(skb)->tso_size;
2d7edb92
MC		 2332 if(skb->protocol == ntohs(ETH_P_IP)) {
2333 skb->nh.iph->tot_len = 0;
2334 skb->nh.iph->check = 0;
2335 skb->h.th->check =
2336 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2337 skb->nh.iph->daddr,
2338 0,
2339 IPPROTO_TCP,
2340 0);
2341 cmd_length = E1000_TXD_CMD_IP;
2342 ipcse = skb->h.raw - skb->data - 1;
2343#ifdef NETIF_F_TSO_IPV6
2344 } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
2345 skb->nh.ipv6h->payload_len = 0;
2346 skb->h.th->check =
2347 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2348 &skb->nh.ipv6h->daddr,
2349 0,
2350 IPPROTO_TCP,
2351 0);
2352 ipcse = 0;
2353#endif
2354 }
1da177e4
LT		 2355 ipcss = skb->nh.raw - skb->data;
2356 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2357 tucss = skb->h.raw - skb->data;
2358 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2359 tucse = 0;
2360
2361 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2362 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2363
581d708e
MC		 2364 i = tx_ring->next_to_use;
2365 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2366
2367 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2368 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2369 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2370 context_desc->upper_setup.tcp_fields.tucss = tucss;
2371 context_desc->upper_setup.tcp_fields.tucso = tucso;
2372 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2373 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2374 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2375 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2376
581d708e
MC		 2377 if (++i == tx_ring->count) i = 0;
2378 tx_ring->next_to_use = i;
1da177e4
LT		 2379
2380 return 1;
2381 }
2382#endif
2383
2384 return 0;
2385}
2386
2387static inline boolean_t
581d708e
MC		 2388e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2389 struct sk_buff *skb)
1da177e4
LT		 2390{
2391 struct e1000_context_desc *context_desc;
2392 unsigned int i;
2393 uint8_t css;
2394
2395 if(likely(skb->ip_summed == CHECKSUM_HW)) {
2396 css = skb->h.raw - skb->data;
2397
581d708e
MC		 2398 i = tx_ring->next_to_use;
2399 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2400
2401 context_desc->upper_setup.tcp_fields.tucss = css;
2402 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2403 context_desc->upper_setup.tcp_fields.tucse = 0;
2404 context_desc->tcp_seg_setup.data = 0;
2405 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2406
581d708e
MC		 2407 if (unlikely(++i == tx_ring->count)) i = 0;
2408 tx_ring->next_to_use = i;
1da177e4
LT		 2409
2410 return TRUE;
2411 }
2412
2413 return FALSE;
2414}
2415
2416#define E1000_MAX_TXD_PWR 12
2417#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2418
2419static inline int
581d708e
MC		 2420e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2421 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2422 unsigned int nr_frags, unsigned int mss)
1da177e4 2423{
1da177e4
LT		 2424 struct e1000_buffer *buffer_info;
2425 unsigned int len = skb->len;
2426 unsigned int offset = 0, size, count = 0, i;
2427 unsigned int f;
2428 len -= skb->data_len;
2429
2430 i = tx_ring->next_to_use;
2431
2432 while(len) {
2433 buffer_info = &tx_ring->buffer_info[i];
2434 size = min(len, max_per_txd);
2435#ifdef NETIF_F_TSO
fd803241
JK		 2436 /* Workaround for Controller erratum --
2437 * descriptor for non-tso packet in a linear SKB that follows a
2438 * tso gets written back prematurely before the data is fully
2439 * DMAd to the controller */
2440 if (!skb->data_len && tx_ring->last_tx_tso &&
2441 !skb_shinfo(skb)->tso_size) {
2442 tx_ring->last_tx_tso = 0;
2443 size -= 4;
2444 }
2445
1da177e4
LT		 2446 /* Workaround for premature desc write-backs
2447 * in TSO mode. Append 4-byte sentinel desc */
2448 if(unlikely(mss && !nr_frags && size == len && size > 8))
2449 size -= 4;
2450#endif
97338bde
MC		 2451 /* work-around for errata 10 and it applies
2452 * to all controllers in PCI-X mode
2453 * The fix is to make sure that the first descriptor of a
2454 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2455 */
2456 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2457 (size > 2015) && count == 0))
2458 size = 2015;
2459
1da177e4
LT		 2460 /* Workaround for potential 82544 hang in PCI-X. Avoid
2461 * terminating buffers within evenly-aligned dwords. */
2462 if(unlikely(adapter->pcix_82544 &&
2463 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2464 size > 4))
2465 size -= 4;
2466
2467 buffer_info->length = size;
2468 buffer_info->dma =
2469 pci_map_single(adapter->pdev,
2470 skb->data + offset,
2471 size,
2472 PCI_DMA_TODEVICE);
2473 buffer_info->time_stamp = jiffies;
2474
2475 len -= size;
2476 offset += size;
2477 count++;
2478 if(unlikely(++i == tx_ring->count)) i = 0;
2479 }
2480
2481 for(f = 0; f < nr_frags; f++) {
2482 struct skb_frag_struct *frag;
2483
2484 frag = &skb_shinfo(skb)->frags[f];
2485 len = frag->size;
2486 offset = frag->page_offset;
2487
2488 while(len) {
2489 buffer_info = &tx_ring->buffer_info[i];
2490 size = min(len, max_per_txd);
2491#ifdef NETIF_F_TSO
2492 /* Workaround for premature desc write-backs
2493 * in TSO mode. Append 4-byte sentinel desc */
2494 if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2495 size -= 4;
2496#endif
2497 /* Workaround for potential 82544 hang in PCI-X.
2498 * Avoid terminating buffers within evenly-aligned
2499 * dwords. */
2500 if(unlikely(adapter->pcix_82544 &&
2501 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2502 size > 4))
2503 size -= 4;
2504
2505 buffer_info->length = size;
2506 buffer_info->dma =
2507 pci_map_page(adapter->pdev,
2508 frag->page,
2509 offset,
2510 size,
2511 PCI_DMA_TODEVICE);
2512 buffer_info->time_stamp = jiffies;
2513
2514 len -= size;
2515 offset += size;
2516 count++;
2517 if(unlikely(++i == tx_ring->count)) i = 0;
2518 }
2519 }
2520
2521 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2522 tx_ring->buffer_info[i].skb = skb;
2523 tx_ring->buffer_info[first].next_to_watch = i;
2524
2525 return count;
2526}
2527
2528static inline void
581d708e
MC		 2529e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2530 int tx_flags, int count)
1da177e4 2531{
1da177e4
LT		 2532 struct e1000_tx_desc *tx_desc = NULL;
2533 struct e1000_buffer *buffer_info;
2534 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2535 unsigned int i;
2536
2537 if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2538 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2539 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2540 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2541
2542 if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
2543 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2544 }
2545
2546 if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2547 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2548 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2549 }
2550
2551 if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2552 txd_lower |= E1000_TXD_CMD_VLE;
2553 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2554 }
2555
2556 i = tx_ring->next_to_use;
2557
2558 while(count--) {
2559 buffer_info = &tx_ring->buffer_info[i];
2560 tx_desc = E1000_TX_DESC(*tx_ring, i);
2561 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2562 tx_desc->lower.data =
2563 cpu_to_le32(txd_lower | buffer_info->length);
2564 tx_desc->upper.data = cpu_to_le32(txd_upper);
2565 if(unlikely(++i == tx_ring->count)) i = 0;
2566 }
2567
2568 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2569
2570 /* Force memory writes to complete before letting h/w
2571 * know there are new descriptors to fetch. (Only
2572 * applicable for weak-ordered memory model archs,
2573 * such as IA-64). */
2574 wmb();
2575
2576 tx_ring->next_to_use = i;
581d708e 2577 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2578}
2579
2580/**
2581 * 82547 workaround to avoid controller hang in half-duplex environment.
2582 * The workaround is to avoid queuing a large packet that would span
2583 * the internal Tx FIFO ring boundary by notifying the stack to resend
2584 * the packet at a later time. This gives the Tx FIFO an opportunity to
2585 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2586 * to the beginning of the Tx FIFO.
2587 **/
2588
2589#define E1000_FIFO_HDR 0x10
2590#define E1000_82547_PAD_LEN 0x3E0
2591
2592static inline int
2593e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2594{
2595 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2596 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2597
2598 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2599
2600 if(adapter->link_duplex != HALF_DUPLEX)
2601 goto no_fifo_stall_required;
2602
2603 if(atomic_read(&adapter->tx_fifo_stall))
2604 return 1;
2605
2606 if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2607 atomic_set(&adapter->tx_fifo_stall, 1);
2608 return 1;
2609 }
2610
2611no_fifo_stall_required:
2612 adapter->tx_fifo_head += skb_fifo_len;
2613 if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
2614 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2615 return 0;
2616}
2617
2d7edb92
MC		 2618#define MINIMUM_DHCP_PACKET_SIZE 282
2619static inline int
2620e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2621{
2622 struct e1000_hw *hw = &adapter->hw;
2623 uint16_t length, offset;
2624 if(vlan_tx_tag_present(skb)) {
2625 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2626 ( adapter->hw.mng_cookie.status &
2627 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2628 return 0;
2629 }
a174fd88 2630 if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2d7edb92
MC		 2631 struct ethhdr *eth = (struct ethhdr *) skb->data;
2632 if((htons(ETH_P_IP) == eth->h_proto)) {
2633 const struct iphdr *ip =
2634 (struct iphdr *)((uint8_t *)skb->data+14);
2635 if(IPPROTO_UDP == ip->protocol) {
2636 struct udphdr *udp =
2637 (struct udphdr *)((uint8_t *)ip +
2638 (ip->ihl << 2));
2639 if(ntohs(udp->dest) == 67) {
2640 offset = (uint8_t *)udp + 8 - skb->data;
2641 length = skb->len - offset;
2642
2643 return e1000_mng_write_dhcp_info(hw,
2644 (uint8_t *)udp + 8,
2645 length);
2646 }
2647 }
2648 }
2649 }
2650 return 0;
2651}
2652
1da177e4
LT		 2653#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2654static int
2655e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2656{
60490fe0 2657 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2658 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2659 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2660 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2661 unsigned int tx_flags = 0;
2662 unsigned int len = skb->len;
2663 unsigned long flags;
2664 unsigned int nr_frags = 0;
2665 unsigned int mss = 0;
2666 int count = 0;
2667 int tso;
2668 unsigned int f;
2669 len -= skb->data_len;
2670
24025e4e
MC		 2671#ifdef CONFIG_E1000_MQ
2672 tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2673#else
581d708e 2674 tx_ring = adapter->tx_ring;
24025e4e
MC		 2675#endif
2676
581d708e 2677 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2678 dev_kfree_skb_any(skb);
2679 return NETDEV_TX_OK;
2680 }
2681
2682#ifdef NETIF_F_TSO
2683 mss = skb_shinfo(skb)->tso_size;
2648345f 2684 /* The controller does a simple calculation to
1da177e4
LT		 2685 * make sure there is enough room in the FIFO before
2686 * initiating the DMA for each buffer. The calc is:
2687 * 4 = ceil(buffer len/mss). To make sure we don't
2688 * overrun the FIFO, adjust the max buffer len if mss
2689 * drops. */
2690 if(mss) {
9a3056da 2691 uint8_t hdr_len;
1da177e4
LT		 2692 max_per_txd = min(mss << 2, max_per_txd);
2693 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da
JK		 2694
2695 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2696 * points to just header, pull a few bytes of payload from
2697 * frags into skb->data */
2698 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2699 if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
2700 (adapter->hw.mac_type == e1000_82571 ||
2701 adapter->hw.mac_type == e1000_82572)) {
2702 len = skb->len - skb->data_len;
2703 }
1da177e4
LT		 2704 }
2705
2706 if((mss) || (skb->ip_summed == CHECKSUM_HW))
9a3056da 2707 /* reserve a descriptor for the offload context */
1da177e4 2708 count++;
2648345f 2709 count++;
1da177e4
LT		 2710#else
2711 if(skb->ip_summed == CHECKSUM_HW)
2712 count++;
2713#endif
fd803241
JK		 2714
2715#ifdef NETIF_F_TSO
2716 /* Controller Erratum workaround */
2717 if (!skb->data_len && tx_ring->last_tx_tso &&
2718 !skb_shinfo(skb)->tso_size)
2719 count++;
2720#endif
2721
1da177e4
LT		 2722 count += TXD_USE_COUNT(len, max_txd_pwr);
2723
2724 if(adapter->pcix_82544)
2725 count++;
2726
97338bde
MC		 2727 /* work-around for errata 10 and it applies to all controllers
2728 * in PCI-X mode, so add one more descriptor to the count
2729 */
2730 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2731 (len > 2015)))
2732 count++;
2733
1da177e4
LT		 2734 nr_frags = skb_shinfo(skb)->nr_frags;
2735 for(f = 0; f < nr_frags; f++)
2736 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2737 max_txd_pwr);
2738 if(adapter->pcix_82544)
2739 count += nr_frags;
2740
9a3056da
JK		 2741 unsigned int pull_size;
2742 pull_size = min((unsigned int)4, skb->data_len);
2743 if (!__pskb_pull_tail(skb, pull_size)) {
2744 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2745 dev_kfree_skb_any(skb);
2746 return -EFAULT;
868d5309 2747 }
868d5309 2748
2d7edb92
MC		 2749 if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2750 e1000_transfer_dhcp_info(adapter, skb);
2751
581d708e
MC		 2752 local_irq_save(flags);
2753 if (!spin_trylock(&tx_ring->tx_lock)) {
2754 /* Collision - tell upper layer to requeue */
2755 local_irq_restore(flags);
2756 return NETDEV_TX_LOCKED;
2757 }
1da177e4
LT		 2758
2759 /* need: count + 2 desc gap to keep tail from touching
2760 * head, otherwise try next time */
581d708e 2761 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2762 netif_stop_queue(netdev);
581d708e 2763 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2764 return NETDEV_TX_BUSY;
2765 }
2766
2767 if(unlikely(adapter->hw.mac_type == e1000_82547)) {
2768 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2769 netif_stop_queue(netdev);
2770 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2771 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2772 return NETDEV_TX_BUSY;
2773 }
2774 }
2775
2776 if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2777 tx_flags |= E1000_TX_FLAGS_VLAN;
2778 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2779 }
2780
581d708e 2781 first = tx_ring->next_to_use;
1da177e4 2782
581d708e 2783 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2784 if (tso < 0) {
2785 dev_kfree_skb_any(skb);
581d708e 2786 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2787 return NETDEV_TX_OK;
2788 }
2789
fd803241
JK		 2790 if (likely(tso)) {
2791 tx_ring->last_tx_tso = 1;
1da177e4 2792 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 2793 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2794 tx_flags |= E1000_TX_FLAGS_CSUM;
2795
2d7edb92 2796 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2797 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2798 * no longer assume, we must. */
581d708e 2799 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 2800 tx_flags |= E1000_TX_FLAGS_IPV4;
2801
581d708e
MC		 2802 e1000_tx_queue(adapter, tx_ring, tx_flags,
2803 e1000_tx_map(adapter, tx_ring, skb, first,
2804 max_per_txd, nr_frags, mss));
1da177e4
LT		 2805
2806 netdev->trans_start = jiffies;
2807
2808 /* Make sure there is space in the ring for the next send. */
581d708e 2809 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2810 netif_stop_queue(netdev);
2811
581d708e 2812 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2813 return NETDEV_TX_OK;
2814}
2815
2816/**
2817 * e1000_tx_timeout - Respond to a Tx Hang
2818 * @netdev: network interface device structure
2819 **/
2820
2821static void
2822e1000_tx_timeout(struct net_device *netdev)
2823{
60490fe0 2824 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2825
2826 /* Do the reset outside of interrupt context */
2827 schedule_work(&adapter->tx_timeout_task);
2828}
2829
2830static void
2831e1000_tx_timeout_task(struct net_device *netdev)
2832{
60490fe0 2833 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2834
2835 e1000_down(adapter);
2836 e1000_up(adapter);
2837}
2838
2839/**
2840 * e1000_get_stats - Get System Network Statistics
2841 * @netdev: network interface device structure
2842 *
2843 * Returns the address of the device statistics structure.
2844 * The statistics are actually updated from the timer callback.
2845 **/
2846
2847static struct net_device_stats *
2848e1000_get_stats(struct net_device *netdev)
2849{
60490fe0 2850 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2851
2852 e1000_update_stats(adapter);
2853 return &adapter->net_stats;
2854}
2855
2856/**
2857 * e1000_change_mtu - Change the Maximum Transfer Unit
2858 * @netdev: network interface device structure
2859 * @new_mtu: new value for maximum frame size
2860 *
2861 * Returns 0 on success, negative on failure
2862 **/
2863
2864static int
2865e1000_change_mtu(struct net_device *netdev, int new_mtu)
2866{
60490fe0 2867 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2868 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
2869
2870 if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
2871 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2872 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
2873 return -EINVAL;
2874 }
2875
868d5309 2876#define MAX_STD_JUMBO_FRAME_SIZE 9234
2d7edb92 2877 /* might want this to be bigger enum check... */
868d5309
MC		 2878 /* 82571 controllers limit jumbo frame size to 10500 bytes */
2879 if ((adapter->hw.mac_type == e1000_82571 ||
2880 adapter->hw.mac_type == e1000_82572) &&
2881 max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2882 DPRINTK(PROBE, ERR, "MTU > 9216 bytes not supported "
2883 "on 82571 and 82572 controllers.\n");
2884 return -EINVAL;
2885 }
2886
2887 if(adapter->hw.mac_type == e1000_82573 &&
2d7edb92
MC		 2888 max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
2889 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
2890 "on 82573\n");
1da177e4 2891 return -EINVAL;
2d7edb92 2892 }
1da177e4 2893
2d7edb92
MC		 2894 if(adapter->hw.mac_type > e1000_82547_rev_2) {
2895 adapter->rx_buffer_len = max_frame;
2896 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
1da177e4 2897 } else {
2d7edb92
MC		 2898 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
2899 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
2900 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
2901 "on 82542\n");
2902 return -EINVAL;
2903
2904 } else {
2905 if(max_frame <= E1000_RXBUFFER_2048) {
2906 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2907 } else if(max_frame <= E1000_RXBUFFER_4096) {
2908 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
2909 } else if(max_frame <= E1000_RXBUFFER_8192) {
2910 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
2911 } else if(max_frame <= E1000_RXBUFFER_16384) {
2912 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
2913 }
2914 }
1da177e4
LT		 2915 }
2916
2d7edb92
MC		 2917 netdev->mtu = new_mtu;
2918
2919 if(netif_running(netdev)) {
1da177e4
LT		 2920 e1000_down(adapter);
2921 e1000_up(adapter);
2922 }
2923
1da177e4
LT		 2924 adapter->hw.max_frame_size = max_frame;
2925
2926 return 0;
2927}
2928
2929/**
2930 * e1000_update_stats - Update the board statistics counters
2931 * @adapter: board private structure
2932 **/
2933
2934void
2935e1000_update_stats(struct e1000_adapter *adapter)
2936{
2937 struct e1000_hw *hw = &adapter->hw;
2938 unsigned long flags;
2939 uint16_t phy_tmp;
2940
2941#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2942
2943 spin_lock_irqsave(&adapter->stats_lock, flags);
2944
2945 /* these counters are modified from e1000_adjust_tbi_stats,
2946 * called from the interrupt context, so they must only
2947 * be written while holding adapter->stats_lock
2948 */
2949
2950 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
2951 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
2952 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
2953 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
2954 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
2955 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
2956 adapter->stats.roc += E1000_READ_REG(hw, ROC);
2957 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
2958 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
2959 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
2960 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
2961 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
2962 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
2963
2964 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
2965 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
2966 adapter->stats.scc += E1000_READ_REG(hw, SCC);
2967 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
2968 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
2969 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
2970 adapter->stats.dc += E1000_READ_REG(hw, DC);
2971 adapter->stats.sec += E1000_READ_REG(hw, SEC);
2972 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
2973 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
2974 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
2975 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
2976 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
2977 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
2978 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
2979 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
2980 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
2981 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
2982 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
2983 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
2984 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
2985 adapter->stats.torl += E1000_READ_REG(hw, TORL);
2986 adapter->stats.torh += E1000_READ_REG(hw, TORH);
2987 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
2988 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
2989 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
2990 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
2991 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
2992 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
2993 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
2994 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
2995 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
2996 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
2997 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
2998
2999 /* used for adaptive IFS */
3000
3001 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3002 adapter->stats.tpt += hw->tx_packet_delta;
3003 hw->collision_delta = E1000_READ_REG(hw, COLC);
3004 adapter->stats.colc += hw->collision_delta;
3005
3006 if(hw->mac_type >= e1000_82543) {
3007 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3008 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3009 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3010 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3011 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3012 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3013 }
2d7edb92
MC		 3014 if(hw->mac_type > e1000_82547_rev_2) {
3015 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3016 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3017 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3018 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3019 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3020 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3021 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3022 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3023 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3024 }
1da177e4
LT		 3025
3026 /* Fill out the OS statistics structure */
3027
3028 adapter->net_stats.rx_packets = adapter->stats.gprc;
3029 adapter->net_stats.tx_packets = adapter->stats.gptc;
3030 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3031 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3032 adapter->net_stats.multicast = adapter->stats.mprc;
3033 adapter->net_stats.collisions = adapter->stats.colc;
3034
3035 /* Rx Errors */
3036
3037 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3038 adapter->stats.crcerrs + adapter->stats.algnerrc +
6d915757
MC		 3039 adapter->stats.rlec + adapter->stats.mpc +
3040 adapter->stats.cexterr;
1da177e4
LT		 3041 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3042 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3043 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3044 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
3045 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3046
3047 /* Tx Errors */
3048
3049 adapter->net_stats.tx_errors = adapter->stats.ecol +
3050 adapter->stats.latecol;
3051 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3052 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3053 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3054
3055 /* Tx Dropped needs to be maintained elsewhere */
3056
3057 /* Phy Stats */
3058
3059 if(hw->media_type == e1000_media_type_copper) {
3060 if((adapter->link_speed == SPEED_1000) &&
3061 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3062 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3063 adapter->phy_stats.idle_errors += phy_tmp;
3064 }
3065
3066 if((hw->mac_type <= e1000_82546) &&
3067 (hw->phy_type == e1000_phy_m88) &&
3068 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3069 adapter->phy_stats.receive_errors += phy_tmp;
3070 }
3071
3072 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3073}
3074
24025e4e
MC		 3075#ifdef CONFIG_E1000_MQ
3076void
3077e1000_rx_schedule(void *data)
3078{
3079 struct net_device *poll_dev, *netdev = data;
3080 struct e1000_adapter *adapter = netdev->priv;
3081 int this_cpu = get_cpu();
3082
3083 poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3084 if (poll_dev == NULL) {
3085 put_cpu();
3086 return;
3087 }
3088
3089 if (likely(netif_rx_schedule_prep(poll_dev)))
3090 __netif_rx_schedule(poll_dev);
3091 else
3092 e1000_irq_enable(adapter);
3093
3094 put_cpu();
3095}
3096#endif
3097
1da177e4
LT		 3098/**
3099 * e1000_intr - Interrupt Handler
3100 * @irq: interrupt number
3101 * @data: pointer to a network interface device structure
3102 * @pt_regs: CPU registers structure
3103 **/
3104
3105static irqreturn_t
3106e1000_intr(int irq, void *data, struct pt_regs *regs)
3107{
3108 struct net_device *netdev = data;
60490fe0 3109 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3110 struct e1000_hw *hw = &adapter->hw;
3111 uint32_t icr = E1000_READ_REG(hw, ICR);
166d823d 3112#if defined(CONFIG_E1000_NAPI) && defined(CONFIG_E1000_MQ) || !defined(CONFIG_E1000_NAPI)
581d708e 3113 int i;
be2b28ed 3114#endif
1da177e4
LT		 3115
3116 if(unlikely(!icr))
3117 return IRQ_NONE; /* Not our interrupt */
3118
3119 if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3120 hw->get_link_status = 1;
3121 mod_timer(&adapter->watchdog_timer, jiffies);
3122 }
3123
3124#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3125 atomic_inc(&adapter->irq_sem);
3126 E1000_WRITE_REG(hw, IMC, ~0);
3127 E1000_WRITE_FLUSH(hw);
24025e4e
MC		 3128#ifdef CONFIG_E1000_MQ
3129 if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
3130 cpu_set(adapter->cpu_for_queue[0],
3131 adapter->rx_sched_call_data.cpumask);
3132 for (i = 1; i < adapter->num_queues; i++) {
3133 cpu_set(adapter->cpu_for_queue[i],
3134 adapter->rx_sched_call_data.cpumask);
3135 atomic_inc(&adapter->irq_sem);
3136 }
3137 atomic_set(&adapter->rx_sched_call_data.count, i);
3138 smp_call_async_mask(&adapter->rx_sched_call_data);
3139 } else {
3140 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
1da177e4 3141 }
be2b28ed 3142#else /* if !CONFIG_E1000_MQ */
581d708e
MC		 3143 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3144 __netif_rx_schedule(&adapter->polling_netdev[0]);
3145 else
3146 e1000_irq_enable(adapter);
be2b28ed
JG		 3147#endif /* CONFIG_E1000_MQ */
3148
3149#else /* if !CONFIG_E1000_NAPI */
1da177e4
LT		 3150 /* Writing IMC and IMS is needed for 82547.
3151 Due to Hub Link bus being occupied, an interrupt
3152 de-assertion message is not able to be sent.
3153 When an interrupt assertion message is generated later,
3154 two messages are re-ordered and sent out.
3155 That causes APIC to think 82547 is in de-assertion
3156 state, while 82547 is in assertion state, resulting
3157 in dead lock. Writing IMC forces 82547 into
3158 de-assertion state.
3159 */
3160 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
3161 atomic_inc(&adapter->irq_sem);
2648345f 3162 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3163 }
3164
3165 for(i = 0; i < E1000_MAX_INTR; i++)
581d708e
MC		 3166 if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3167 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3168 break;
3169
3170 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3171 e1000_irq_enable(adapter);
581d708e 3172
be2b28ed 3173#endif /* CONFIG_E1000_NAPI */
1da177e4
LT		 3174
3175 return IRQ_HANDLED;
3176}
3177
3178#ifdef CONFIG_E1000_NAPI
3179/**
3180 * e1000_clean - NAPI Rx polling callback
3181 * @adapter: board private structure
3182 **/
3183
3184static int
581d708e 3185e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3186{
581d708e
MC		 3187 struct e1000_adapter *adapter;
3188 int work_to_do = min(*budget, poll_dev->quota);
3189 int tx_cleaned, i = 0, work_done = 0;
3190
3191 /* Must NOT use netdev_priv macro here. */
3192 adapter = poll_dev->priv;
3193
3194 /* Keep link state information with original netdev */
3195 if (!netif_carrier_ok(adapter->netdev))
3196 goto quit_polling;
2648345f 3197
581d708e
MC		 3198 while (poll_dev != &adapter->polling_netdev[i]) {
3199 i++;
3200 if (unlikely(i == adapter->num_queues))
3201 BUG();
3202 }
3203
3204 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3205 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3206 &work_done, work_to_do);
1da177e4
LT		 3207
3208 *budget -= work_done;
581d708e 3209 poll_dev->quota -= work_done;
1da177e4 3210
2b02893e 3211 /* If no Tx and not enough Rx work done, exit the polling mode */
581d708e
MC		 3212 if((!tx_cleaned && (work_done == 0)) ||
3213 !netif_running(adapter->netdev)) {
3214quit_polling:
3215 netif_rx_complete(poll_dev);
1da177e4
LT		 3216 e1000_irq_enable(adapter);
3217 return 0;
3218 }
3219
3220 return 1;
3221}
3222
3223#endif
3224/**
3225 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3226 * @adapter: board private structure
3227 **/
3228
3229static boolean_t
581d708e
MC		 3230e1000_clean_tx_irq(struct e1000_adapter *adapter,
3231 struct e1000_tx_ring *tx_ring)
1da177e4 3232{
1da177e4
LT		 3233 struct net_device *netdev = adapter->netdev;
3234 struct e1000_tx_desc *tx_desc, *eop_desc;
3235 struct e1000_buffer *buffer_info;
3236 unsigned int i, eop;
3237 boolean_t cleaned = FALSE;
3238
3239 i = tx_ring->next_to_clean;
3240 eop = tx_ring->buffer_info[i].next_to_watch;
3241 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3242
581d708e 3243 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
1da177e4
LT		 3244 for(cleaned = FALSE; !cleaned; ) {
3245 tx_desc = E1000_TX_DESC(*tx_ring, i);
3246 buffer_info = &tx_ring->buffer_info[i];
3247 cleaned = (i == eop);
3248
fd803241 3249 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1da177e4
LT		 3250
3251 tx_desc->buffer_addr = 0;
3252 tx_desc->lower.data = 0;
3253 tx_desc->upper.data = 0;
3254
1da177e4
LT		 3255 if(unlikely(++i == tx_ring->count)) i = 0;
3256 }
581d708e
MC		 3257
3258 tx_ring->pkt++;
1da177e4
LT		 3259
3260 eop = tx_ring->buffer_info[i].next_to_watch;
3261 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3262 }
3263
3264 tx_ring->next_to_clean = i;
3265
581d708e 3266 spin_lock(&tx_ring->tx_lock);
1da177e4
LT		 3267
3268 if(unlikely(cleaned && netif_queue_stopped(netdev) &&
3269 netif_carrier_ok(netdev)))
3270 netif_wake_queue(netdev);
3271
581d708e 3272 spin_unlock(&tx_ring->tx_lock);
2648345f 3273
581d708e 3274 if (adapter->detect_tx_hung) {
2648345f 3275 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3276 * check with the clearing of time_stamp and movement of i */
3277 adapter->detect_tx_hung = FALSE;
70b8f1e1
MC		 3278 if (tx_ring->buffer_info[i].dma &&
3279 time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
3280 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3281 E1000_STATUS_TXOFF)) {
3282
3283 /* detected Tx unit hang */
3284 i = tx_ring->next_to_clean;
3285 eop = tx_ring->buffer_info[i].next_to_watch;
3286 eop_desc = E1000_TX_DESC(*tx_ring, eop);
c6963ef5 3287 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
70b8f1e1
MC		 3288 " TDH <%x>\n"
3289 " TDT <%x>\n"
3290 " next_to_use <%x>\n"
3291 " next_to_clean <%x>\n"
3292 "buffer_info[next_to_clean]\n"
b4ee21f4 3293 " dma <%llx>\n"
70b8f1e1
MC		 3294 " time_stamp <%lx>\n"
3295 " next_to_watch <%x>\n"
3296 " jiffies <%lx>\n"
3297 " next_to_watch.status <%x>\n",
581d708e
MC		 3298 readl(adapter->hw.hw_addr + tx_ring->tdh),
3299 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1
MC		 3300 tx_ring->next_to_use,
3301 i,
b4ee21f4 3302 (unsigned long long)tx_ring->buffer_info[i].dma,
70b8f1e1
MC		 3303 tx_ring->buffer_info[i].time_stamp,
3304 eop,
3305 jiffies,
3306 eop_desc->upper.fields.status);
1da177e4 3307 netif_stop_queue(netdev);
70b8f1e1 3308 }
1da177e4 3309 }
1da177e4
LT		 3310 return cleaned;
3311}
3312
3313/**
3314 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3315 * @adapter: board private structure
3316 * @status_err: receive descriptor status and error fields
3317 * @csum: receive descriptor csum field
3318 * @sk_buff: socket buffer with received data
1da177e4
LT		 3319 **/
3320
3321static inline void
3322e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3323 uint32_t status_err, uint32_t csum,
3324 struct sk_buff *skb)
1da177e4 3325{
2d7edb92
MC		 3326 uint16_t status = (uint16_t)status_err;
3327 uint8_t errors = (uint8_t)(status_err >> 24);
3328 skb->ip_summed = CHECKSUM_NONE;
3329
1da177e4 3330 /* 82543 or newer only */
2d7edb92 3331 if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3332 /* Ignore Checksum bit is set */
2d7edb92
MC		 3333 if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
3334 /* TCP/UDP checksum error bit is set */
3335 if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3336 /* let the stack verify checksum errors */
1da177e4 3337 adapter->hw_csum_err++;
2d7edb92
MC		 3338 return;
3339 }
3340 /* TCP/UDP Checksum has not been calculated */
3341 if(adapter->hw.mac_type <= e1000_82547_rev_2) {
3342 if(!(status & E1000_RXD_STAT_TCPCS))
3343 return;
1da177e4 3344 } else {
2d7edb92
MC		 3345 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3346 return;
3347 }
3348 /* It must be a TCP or UDP packet with a valid checksum */
3349 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3350 /* TCP checksum is good */
3351 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3352 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3353 /* IP fragment with UDP payload */
3354 /* Hardware complements the payload checksum, so we undo it
3355 * and then put the value in host order for further stack use.
3356 */
3357 csum = ntohl(csum ^ 0xFFFF);
3358 skb->csum = csum;
3359 skb->ip_summed = CHECKSUM_HW;
1da177e4 3360 }
2d7edb92 3361 adapter->hw_csum_good++;
1da177e4
LT		 3362}
3363
3364/**
2d7edb92 3365 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3366 * @adapter: board private structure
3367 **/
3368
3369static boolean_t
3370#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3371e1000_clean_rx_irq(struct e1000_adapter *adapter,
3372 struct e1000_rx_ring *rx_ring,
3373 int *work_done, int work_to_do)
1da177e4 3374#else
581d708e
MC		 3375e1000_clean_rx_irq(struct e1000_adapter *adapter,
3376 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3377#endif
3378{
1da177e4
LT		 3379 struct net_device *netdev = adapter->netdev;
3380 struct pci_dev *pdev = adapter->pdev;
3381 struct e1000_rx_desc *rx_desc;
3382 struct e1000_buffer *buffer_info;
3383 struct sk_buff *skb;
3384 unsigned long flags;
3385 uint32_t length;
3386 uint8_t last_byte;
3387 unsigned int i;
3388 boolean_t cleaned = FALSE;
3389
3390 i = rx_ring->next_to_clean;
3391 rx_desc = E1000_RX_DESC(*rx_ring, i);
3392
3393 while(rx_desc->status & E1000_RXD_STAT_DD) {
3394 buffer_info = &rx_ring->buffer_info[i];
3395#ifdef CONFIG_E1000_NAPI
3396 if(*work_done >= work_to_do)
3397 break;
3398 (*work_done)++;
3399#endif
3400 cleaned = TRUE;
3401
3402 pci_unmap_single(pdev,
3403 buffer_info->dma,
3404 buffer_info->length,
3405 PCI_DMA_FROMDEVICE);
3406
3407 skb = buffer_info->skb;
3408 length = le16_to_cpu(rx_desc->length);
3409
3410 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
3411 /* All receives must fit into a single buffer */
3412 E1000_DBG("%s: Receive packet consumed multiple"
2648345f 3413 " buffers\n", netdev->name);
1da177e4
LT		 3414 dev_kfree_skb_irq(skb);
3415 goto next_desc;
3416 }
3417
3418 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3419 last_byte = *(skb->data + length - 1);
3420 if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
3421 rx_desc->errors, length, last_byte)) {
3422 spin_lock_irqsave(&adapter->stats_lock, flags);
3423 e1000_tbi_adjust_stats(&adapter->hw,
3424 &adapter->stats,
3425 length, skb->data);
3426 spin_unlock_irqrestore(&adapter->stats_lock,
3427 flags);
3428 length--;
3429 } else {
3430 dev_kfree_skb_irq(skb);
3431 goto next_desc;
3432 }
3433 }
3434
3435 /* Good Receive */
3436 skb_put(skb, length - ETHERNET_FCS_SIZE);
3437
3438 /* Receive Checksum Offload */
2d7edb92
MC		 3439 e1000_rx_checksum(adapter,
3440 (uint32_t)(rx_desc->status) |
3441 ((uint32_t)(rx_desc->errors) << 24),
3442 rx_desc->csum, skb);
1da177e4
LT		 3443 skb->protocol = eth_type_trans(skb, netdev);
3444#ifdef CONFIG_E1000_NAPI
3445 if(unlikely(adapter->vlgrp &&
3446 (rx_desc->status & E1000_RXD_STAT_VP))) {
3447 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3448 le16_to_cpu(rx_desc->special) &
3449 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3450 } else {
3451 netif_receive_skb(skb);
3452 }
3453#else /* CONFIG_E1000_NAPI */
3454 if(unlikely(adapter->vlgrp &&
3455 (rx_desc->status & E1000_RXD_STAT_VP))) {
3456 vlan_hwaccel_rx(skb, adapter->vlgrp,
3457 le16_to_cpu(rx_desc->special) &
3458 E1000_RXD_SPC_VLAN_MASK);
3459 } else {
3460 netif_rx(skb);
3461 }
3462#endif /* CONFIG_E1000_NAPI */
3463 netdev->last_rx = jiffies;
581d708e 3464 rx_ring->pkt++;
1da177e4
LT		 3465
3466next_desc:
3467 rx_desc->status = 0;
3468 buffer_info->skb = NULL;
3469 if(unlikely(++i == rx_ring->count)) i = 0;
3470
3471 rx_desc = E1000_RX_DESC(*rx_ring, i);
3472 }
1da177e4 3473 rx_ring->next_to_clean = i;
581d708e 3474 adapter->alloc_rx_buf(adapter, rx_ring);
2d7edb92
MC		 3475
3476 return cleaned;
3477}
3478
3479/**
3480 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3481 * @adapter: board private structure
3482 **/
3483
3484static boolean_t
3485#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3486e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3487 struct e1000_rx_ring *rx_ring,
3488 int *work_done, int work_to_do)
2d7edb92 3489#else
581d708e
MC		 3490e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3491 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3492#endif
3493{
2d7edb92
MC		 3494 union e1000_rx_desc_packet_split *rx_desc;
3495 struct net_device *netdev = adapter->netdev;
3496 struct pci_dev *pdev = adapter->pdev;
3497 struct e1000_buffer *buffer_info;
3498 struct e1000_ps_page *ps_page;
3499 struct e1000_ps_page_dma *ps_page_dma;
3500 struct sk_buff *skb;
3501 unsigned int i, j;
3502 uint32_t length, staterr;
3503 boolean_t cleaned = FALSE;
3504
3505 i = rx_ring->next_to_clean;
3506 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3507 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3508
3509 while(staterr & E1000_RXD_STAT_DD) {
3510 buffer_info = &rx_ring->buffer_info[i];
3511 ps_page = &rx_ring->ps_page[i];
3512 ps_page_dma = &rx_ring->ps_page_dma[i];
3513#ifdef CONFIG_E1000_NAPI
3514 if(unlikely(*work_done >= work_to_do))
3515 break;
3516 (*work_done)++;
3517#endif
3518 cleaned = TRUE;
3519 pci_unmap_single(pdev, buffer_info->dma,
3520 buffer_info->length,
3521 PCI_DMA_FROMDEVICE);
3522
3523 skb = buffer_info->skb;
3524
3525 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3526 E1000_DBG("%s: Packet Split buffers didn't pick up"
3527 " the full packet\n", netdev->name);
3528 dev_kfree_skb_irq(skb);
3529 goto next_desc;
3530 }
1da177e4 3531
2d7edb92
MC		 3532 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3533 dev_kfree_skb_irq(skb);
3534 goto next_desc;
3535 }
3536
3537 length = le16_to_cpu(rx_desc->wb.middle.length0);
3538
3539 if(unlikely(!length)) {
3540 E1000_DBG("%s: Last part of the packet spanning"
3541 " multiple descriptors\n", netdev->name);
3542 dev_kfree_skb_irq(skb);
3543 goto next_desc;
3544 }
3545
3546 /* Good Receive */
3547 skb_put(skb, length);
3548
e4c811c9 3549 for(j = 0; j < adapter->rx_ps_pages; j++) {
2d7edb92
MC		 3550 if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3551 break;
3552
3553 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3554 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3555 ps_page_dma->ps_page_dma[j] = 0;
3556 skb_shinfo(skb)->frags[j].page =
3557 ps_page->ps_page[j];
3558 ps_page->ps_page[j] = NULL;
3559 skb_shinfo(skb)->frags[j].page_offset = 0;
3560 skb_shinfo(skb)->frags[j].size = length;
3561 skb_shinfo(skb)->nr_frags++;
3562 skb->len += length;
3563 skb->data_len += length;
3564 }
3565
3566 e1000_rx_checksum(adapter, staterr,
3567 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3568 skb->protocol = eth_type_trans(skb, netdev);
3569
2d7edb92 3570 if(likely(rx_desc->wb.upper.header_status &
e4c811c9
MC		 3571 E1000_RXDPS_HDRSTAT_HDRSP)) {
3572 adapter->rx_hdr_split++;
3573#ifdef HAVE_RX_ZERO_COPY
2d7edb92
MC		 3574 skb_shinfo(skb)->zero_copy = TRUE;
3575#endif
e4c811c9 3576 }
2d7edb92
MC		 3577#ifdef CONFIG_E1000_NAPI
3578 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3579 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3580 le16_to_cpu(rx_desc->wb.middle.vlan) &
3581 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3582 } else {
3583 netif_receive_skb(skb);
3584 }
3585#else /* CONFIG_E1000_NAPI */
3586 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3587 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3588 le16_to_cpu(rx_desc->wb.middle.vlan) &
3589 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3590 } else {
3591 netif_rx(skb);
3592 }
3593#endif /* CONFIG_E1000_NAPI */
3594 netdev->last_rx = jiffies;
581d708e 3595 rx_ring->pkt++;
2d7edb92
MC		 3596
3597next_desc:
3598 rx_desc->wb.middle.status_error &= ~0xFF;
3599 buffer_info->skb = NULL;
3600 if(unlikely(++i == rx_ring->count)) i = 0;
3601
3602 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3603 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3604 }
3605 rx_ring->next_to_clean = i;
581d708e 3606 adapter->alloc_rx_buf(adapter, rx_ring);
1da177e4
LT		 3607
3608 return cleaned;
3609}
3610
3611/**
2d7edb92 3612 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3613 * @adapter: address of board private structure
3614 **/
3615
3616static void
581d708e
MC		 3617e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3618 struct e1000_rx_ring *rx_ring)
1da177e4 3619{
1da177e4
LT		 3620 struct net_device *netdev = adapter->netdev;
3621 struct pci_dev *pdev = adapter->pdev;
3622 struct e1000_rx_desc *rx_desc;
3623 struct e1000_buffer *buffer_info;
3624 struct sk_buff *skb;
2648345f
MC		 3625 unsigned int i;
3626 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3627
3628 i = rx_ring->next_to_use;
3629 buffer_info = &rx_ring->buffer_info[i];
3630
3631 while(!buffer_info->skb) {
1da177e4 3632 skb = dev_alloc_skb(bufsz);
2648345f 3633
1da177e4
LT		 3634 if(unlikely(!skb)) {
3635 /* Better luck next round */
3636 break;
3637 }
3638
2648345f 3639 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3640 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3641 struct sk_buff *oldskb = skb;
2648345f
MC		 3642 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3643 "at %p\n", bufsz, skb->data);
3644 /* Try again, without freeing the previous */
1da177e4 3645 skb = dev_alloc_skb(bufsz);
2648345f 3646 /* Failed allocation, critical failure */
1da177e4
LT		 3647 if (!skb) {
3648 dev_kfree_skb(oldskb);
3649 break;
3650 }
2648345f 3651
1da177e4
LT		 3652 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3653 /* give up */
3654 dev_kfree_skb(skb);
3655 dev_kfree_skb(oldskb);
3656 break; /* while !buffer_info->skb */
3657 } else {
2648345f 3658 /* Use new allocation */
1da177e4
LT		 3659 dev_kfree_skb(oldskb);
3660 }
3661 }
1da177e4
LT		 3662 /* Make buffer alignment 2 beyond a 16 byte boundary
3663 * this will result in a 16 byte aligned IP header after
3664 * the 14 byte MAC header is removed
3665 */
3666 skb_reserve(skb, NET_IP_ALIGN);
3667
3668 skb->dev = netdev;
3669
3670 buffer_info->skb = skb;
3671 buffer_info->length = adapter->rx_buffer_len;
3672 buffer_info->dma = pci_map_single(pdev,
3673 skb->data,
3674 adapter->rx_buffer_len,
3675 PCI_DMA_FROMDEVICE);
3676
2648345f
MC		 3677 /* Fix for errata 23, can't cross 64kB boundary */
3678 if (!e1000_check_64k_bound(adapter,
3679 (void *)(unsigned long)buffer_info->dma,
3680 adapter->rx_buffer_len)) {
3681 DPRINTK(RX_ERR, ERR,
3682 "dma align check failed: %u bytes at %p\n",
3683 adapter->rx_buffer_len,
3684 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3685 dev_kfree_skb(skb);
3686 buffer_info->skb = NULL;
3687
2648345f 3688 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3689 adapter->rx_buffer_len,
3690 PCI_DMA_FROMDEVICE);
3691
3692 break; /* while !buffer_info->skb */
3693 }
1da177e4
LT		 3694 rx_desc = E1000_RX_DESC(*rx_ring, i);
3695 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3696
3697 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3698 /* Force memory writes to complete before letting h/w
3699 * know there are new descriptors to fetch. (Only
3700 * applicable for weak-ordered memory model archs,
3701 * such as IA-64). */
3702 wmb();
581d708e 3703 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
1da177e4
LT		 3704 }
3705
3706 if(unlikely(++i == rx_ring->count)) i = 0;
3707 buffer_info = &rx_ring->buffer_info[i];
3708 }
3709
3710 rx_ring->next_to_use = i;
3711}
3712
2d7edb92
MC		 3713/**
3714 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3715 * @adapter: address of board private structure
3716 **/
3717
3718static void
581d708e
MC		 3719e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
3720 struct e1000_rx_ring *rx_ring)
2d7edb92 3721{
2d7edb92
MC		 3722 struct net_device *netdev = adapter->netdev;
3723 struct pci_dev *pdev = adapter->pdev;
3724 union e1000_rx_desc_packet_split *rx_desc;
3725 struct e1000_buffer *buffer_info;
3726 struct e1000_ps_page *ps_page;
3727 struct e1000_ps_page_dma *ps_page_dma;
3728 struct sk_buff *skb;
3729 unsigned int i, j;
3730
3731 i = rx_ring->next_to_use;
3732 buffer_info = &rx_ring->buffer_info[i];
3733 ps_page = &rx_ring->ps_page[i];
3734 ps_page_dma = &rx_ring->ps_page_dma[i];
3735
3736 while(!buffer_info->skb) {
3737 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3738
3739 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 3740 if (j < adapter->rx_ps_pages) {
3741 if (likely(!ps_page->ps_page[j])) {
3742 ps_page->ps_page[j] =
3743 alloc_page(GFP_ATOMIC);
3744 if (unlikely(!ps_page->ps_page[j]))
3745 goto no_buffers;
3746 ps_page_dma->ps_page_dma[j] =
3747 pci_map_page(pdev,
3748 ps_page->ps_page[j],
3749 0, PAGE_SIZE,
3750 PCI_DMA_FROMDEVICE);
3751 }
3752 /* Refresh the desc even if buffer_addrs didn't
3753 * change because each write-back erases
3754 * this info.
3755 */
3756 rx_desc->read.buffer_addr[j+1] =
3757 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3758 } else
3759 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 3760 }
3761
3762 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3763
3764 if(unlikely(!skb))
3765 break;
3766
3767 /* Make buffer alignment 2 beyond a 16 byte boundary
3768 * this will result in a 16 byte aligned IP header after
3769 * the 14 byte MAC header is removed
3770 */
3771 skb_reserve(skb, NET_IP_ALIGN);
3772
3773 skb->dev = netdev;
3774
3775 buffer_info->skb = skb;
3776 buffer_info->length = adapter->rx_ps_bsize0;
3777 buffer_info->dma = pci_map_single(pdev, skb->data,
3778 adapter->rx_ps_bsize0,
3779 PCI_DMA_FROMDEVICE);
3780
3781 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3782
3783 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3784 /* Force memory writes to complete before letting h/w
3785 * know there are new descriptors to fetch. (Only
3786 * applicable for weak-ordered memory model archs,
3787 * such as IA-64). */
3788 wmb();
3789 /* Hardware increments by 16 bytes, but packet split
3790 * descriptors are 32 bytes...so we increment tail
3791 * twice as much.
3792 */
581d708e 3793 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
2d7edb92
MC		 3794 }
3795
3796 if(unlikely(++i == rx_ring->count)) i = 0;
3797 buffer_info = &rx_ring->buffer_info[i];
3798 ps_page = &rx_ring->ps_page[i];
3799 ps_page_dma = &rx_ring->ps_page_dma[i];
3800 }
3801
3802no_buffers:
3803 rx_ring->next_to_use = i;
3804}
3805
1da177e4
LT		 3806/**
3807 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3808 * @adapter:
3809 **/
3810
3811static void
3812e1000_smartspeed(struct e1000_adapter *adapter)
3813{
3814 uint16_t phy_status;
3815 uint16_t phy_ctrl;
3816
3817 if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
3818 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
3819 return;
3820
3821 if(adapter->smartspeed == 0) {
3822 /* If Master/Slave config fault is asserted twice,
3823 * we assume back-to-back */
3824 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3825 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3826 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3827 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3828 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3829 if(phy_ctrl & CR_1000T_MS_ENABLE) {
3830 phy_ctrl &= ~CR_1000T_MS_ENABLE;
3831 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
3832 phy_ctrl);
3833 adapter->smartspeed++;
3834 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3835 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
3836 &phy_ctrl)) {
3837 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3838 MII_CR_RESTART_AUTO_NEG);
3839 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
3840 phy_ctrl);
3841 }
3842 }
3843 return;
3844 } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
3845 /* If still no link, perhaps using 2/3 pair cable */
3846 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3847 phy_ctrl |= CR_1000T_MS_ENABLE;
3848 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
3849 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3850 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
3851 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3852 MII_CR_RESTART_AUTO_NEG);
3853 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
3854 }
3855 }
3856 /* Restart process after E1000_SMARTSPEED_MAX iterations */
3857 if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
3858 adapter->smartspeed = 0;
3859}
3860
3861/**
3862 * e1000_ioctl -
3863 * @netdev:
3864 * @ifreq:
3865 * @cmd:
3866 **/
3867
3868static int
3869e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3870{
3871 switch (cmd) {
3872 case SIOCGMIIPHY:
3873 case SIOCGMIIREG:
3874 case SIOCSMIIREG:
3875 return e1000_mii_ioctl(netdev, ifr, cmd);
3876 default:
3877 return -EOPNOTSUPP;
3878 }
3879}
3880
3881/**
3882 * e1000_mii_ioctl -
3883 * @netdev:
3884 * @ifreq:
3885 * @cmd:
3886 **/
3887
3888static int
3889e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3890{
60490fe0 3891 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3892 struct mii_ioctl_data *data = if_mii(ifr);
3893 int retval;
3894 uint16_t mii_reg;
3895 uint16_t spddplx;
97876fc6 3896 unsigned long flags;
1da177e4
LT		 3897
3898 if(adapter->hw.media_type != e1000_media_type_copper)
3899 return -EOPNOTSUPP;
3900
3901 switch (cmd) {
3902 case SIOCGMIIPHY:
3903 data->phy_id = adapter->hw.phy_addr;
3904 break;
3905 case SIOCGMIIREG:
97876fc6 3906 if(!capable(CAP_NET_ADMIN))
1da177e4 3907 return -EPERM;
97876fc6
MC		 3908 spin_lock_irqsave(&adapter->stats_lock, flags);
3909 if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
3910 &data->val_out)) {
3911 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 3912 return -EIO;
97876fc6
MC		 3913 }
3914 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 3915 break;
3916 case SIOCSMIIREG:
97876fc6 3917 if(!capable(CAP_NET_ADMIN))
1da177e4 3918 return -EPERM;
97876fc6 3919 if(data->reg_num & ~(0x1F))
1da177e4
LT		 3920 return -EFAULT;
3921 mii_reg = data->val_in;
97876fc6
MC		 3922 spin_lock_irqsave(&adapter->stats_lock, flags);
3923 if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
3924 mii_reg)) {
3925 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 3926 return -EIO;
97876fc6
MC		 3927 }
3928 if(adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 3929 switch (data->reg_num) {
3930 case PHY_CTRL:
3931 if(mii_reg & MII_CR_POWER_DOWN)
3932 break;
3933 if(mii_reg & MII_CR_AUTO_NEG_EN) {
3934 adapter->hw.autoneg = 1;
3935 adapter->hw.autoneg_advertised = 0x2F;
3936 } else {
3937 if (mii_reg & 0x40)
3938 spddplx = SPEED_1000;
3939 else if (mii_reg & 0x2000)
3940 spddplx = SPEED_100;
3941 else
3942 spddplx = SPEED_10;
3943 spddplx += (mii_reg & 0x100)
3944 ? FULL_DUPLEX :
3945 HALF_DUPLEX;
3946 retval = e1000_set_spd_dplx(adapter,
3947 spddplx);
97876fc6
MC		 3948 if(retval) {
3949 spin_unlock_irqrestore(
3950 &adapter->stats_lock,
3951 flags);
1da177e4 3952 return retval;
97876fc6 3953 }
1da177e4
LT		 3954 }
3955 if(netif_running(adapter->netdev)) {
3956 e1000_down(adapter);
3957 e1000_up(adapter);
3958 } else
3959 e1000_reset(adapter);
3960 break;
3961 case M88E1000_PHY_SPEC_CTRL:
3962 case M88E1000_EXT_PHY_SPEC_CTRL:
97876fc6
MC		 3963 if(e1000_phy_reset(&adapter->hw)) {
3964 spin_unlock_irqrestore(
3965 &adapter->stats_lock, flags);
1da177e4 3966 return -EIO;
97876fc6 3967 }
1da177e4
LT		 3968 break;
3969 }
3970 } else {
3971 switch (data->reg_num) {
3972 case PHY_CTRL:
3973 if(mii_reg & MII_CR_POWER_DOWN)
3974 break;
3975 if(netif_running(adapter->netdev)) {
3976 e1000_down(adapter);
3977 e1000_up(adapter);
3978 } else
3979 e1000_reset(adapter);
3980 break;
3981 }
3982 }
97876fc6 3983 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 3984 break;
3985 default:
3986 return -EOPNOTSUPP;
3987 }
3988 return E1000_SUCCESS;
3989}
3990
3991void
3992e1000_pci_set_mwi(struct e1000_hw *hw)
3993{
3994 struct e1000_adapter *adapter = hw->back;
2648345f 3995 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 3996
2648345f
MC		 3997 if(ret_val)
3998 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 3999}
4000
4001void
4002e1000_pci_clear_mwi(struct e1000_hw *hw)
4003{
4004 struct e1000_adapter *adapter = hw->back;
4005
4006 pci_clear_mwi(adapter->pdev);
4007}
4008
4009void
4010e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4011{
4012 struct e1000_adapter *adapter = hw->back;
4013
4014 pci_read_config_word(adapter->pdev, reg, value);
4015}
4016
4017void
4018e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4019{
4020 struct e1000_adapter *adapter = hw->back;
4021
4022 pci_write_config_word(adapter->pdev, reg, *value);
4023}
4024
4025uint32_t
4026e1000_io_read(struct e1000_hw *hw, unsigned long port)
4027{
4028 return inl(port);
4029}
4030
4031void
4032e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4033{
4034 outl(value, port);
4035}
4036
4037static void
4038e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4039{
60490fe0 4040 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4041 uint32_t ctrl, rctl;
4042
4043 e1000_irq_disable(adapter);
4044 adapter->vlgrp = grp;
4045
4046 if(grp) {
4047 /* enable VLAN tag insert/strip */
4048 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4049 ctrl |= E1000_CTRL_VME;
4050 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4051
4052 /* enable VLAN receive filtering */
4053 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4054 rctl |= E1000_RCTL_VFE;
4055 rctl &= ~E1000_RCTL_CFIEN;
4056 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4057 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4058 } else {
4059 /* disable VLAN tag insert/strip */
4060 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4061 ctrl &= ~E1000_CTRL_VME;
4062 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4063
4064 /* disable VLAN filtering */
4065 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4066 rctl &= ~E1000_RCTL_VFE;
4067 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92
MC		 4068 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4069 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4070 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4071 }
1da177e4
LT		 4072 }
4073
4074 e1000_irq_enable(adapter);
4075}
4076
4077static void
4078e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4079{
60490fe0 4080 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4081 uint32_t vfta, index;
2d7edb92
MC		 4082 if((adapter->hw.mng_cookie.status &
4083 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4084 (vid == adapter->mng_vlan_id))
4085 return;
1da177e4
LT		 4086 /* add VID to filter table */
4087 index = (vid >> 5) & 0x7F;
4088 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4089 vfta |= (1 << (vid & 0x1F));
4090 e1000_write_vfta(&adapter->hw, index, vfta);
4091}
4092
4093static void
4094e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4095{
60490fe0 4096 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4097 uint32_t vfta, index;
4098
4099 e1000_irq_disable(adapter);
4100
4101 if(adapter->vlgrp)
4102 adapter->vlgrp->vlan_devices[vid] = NULL;
4103
4104 e1000_irq_enable(adapter);
4105
2d7edb92
MC		 4106 if((adapter->hw.mng_cookie.status &
4107 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4108 (vid == adapter->mng_vlan_id))
4109 return;
1da177e4
LT		 4110 /* remove VID from filter table */
4111 index = (vid >> 5) & 0x7F;
4112 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4113 vfta &= ~(1 << (vid & 0x1F));
4114 e1000_write_vfta(&adapter->hw, index, vfta);
4115}
4116
4117static void
4118e1000_restore_vlan(struct e1000_adapter *adapter)
4119{
4120 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4121
4122 if(adapter->vlgrp) {
4123 uint16_t vid;
4124 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4125 if(!adapter->vlgrp->vlan_devices[vid])
4126 continue;
4127 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4128 }
4129 }
4130}
4131
4132int
4133e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4134{
4135 adapter->hw.autoneg = 0;
4136
6921368f
MC		 4137 /* Fiber NICs only allow 1000 gbps Full duplex */
4138 if((adapter->hw.media_type == e1000_media_type_fiber) &&
4139 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4140 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4141 return -EINVAL;
4142 }
4143
1da177e4
LT		 4144 switch(spddplx) {
4145 case SPEED_10 + DUPLEX_HALF:
4146 adapter->hw.forced_speed_duplex = e1000_10_half;
4147 break;
4148 case SPEED_10 + DUPLEX_FULL:
4149 adapter->hw.forced_speed_duplex = e1000_10_full;
4150 break;
4151 case SPEED_100 + DUPLEX_HALF:
4152 adapter->hw.forced_speed_duplex = e1000_100_half;
4153 break;
4154 case SPEED_100 + DUPLEX_FULL:
4155 adapter->hw.forced_speed_duplex = e1000_100_full;
4156 break;
4157 case SPEED_1000 + DUPLEX_FULL:
4158 adapter->hw.autoneg = 1;
4159 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4160 break;
4161 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4162 default:
2648345f 4163 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4164 return -EINVAL;
4165 }
4166 return 0;
4167}
4168
b6a1d5f8 4169#ifdef CONFIG_PM
1da177e4 4170static int
829ca9a3 4171e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4172{
4173 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4174 struct e1000_adapter *adapter = netdev_priv(netdev);
2d7edb92 4175 uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm;
1da177e4
LT		 4176 uint32_t wufc = adapter->wol;
4177
4178 netif_device_detach(netdev);
4179
4180 if(netif_running(netdev))
4181 e1000_down(adapter);
4182
4183 status = E1000_READ_REG(&adapter->hw, STATUS);
4184 if(status & E1000_STATUS_LU)
4185 wufc &= ~E1000_WUFC_LNKC;
4186
4187 if(wufc) {
4188 e1000_setup_rctl(adapter);
4189 e1000_set_multi(netdev);
4190
4191 /* turn on all-multi mode if wake on multicast is enabled */
4192 if(adapter->wol & E1000_WUFC_MC) {
4193 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4194 rctl |= E1000_RCTL_MPE;
4195 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4196 }
4197
4198 if(adapter->hw.mac_type >= e1000_82540) {
4199 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4200 /* advertise wake from D3Cold */
4201 #define E1000_CTRL_ADVD3WUC 0x00100000
4202 /* phy power management enable */
4203 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4204 ctrl |= E1000_CTRL_ADVD3WUC |
4205 E1000_CTRL_EN_PHY_PWR_MGMT;
4206 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4207 }
4208
4209 if(adapter->hw.media_type == e1000_media_type_fiber ||
4210 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4211 /* keep the laser running in D3 */
4212 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4213 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4214 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4215 }
4216
2d7edb92
MC		 4217 /* Allow time for pending master requests to run */
4218 e1000_disable_pciex_master(&adapter->hw);
4219
1da177e4
LT		 4220 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4221 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4222 pci_enable_wake(pdev, 3, 1);
4223 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4224 } else {
4225 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4226 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4227 pci_enable_wake(pdev, 3, 0);
4228 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4229 }
4230
4231 pci_save_state(pdev);
4232
4233 if(adapter->hw.mac_type >= e1000_82540 &&
4234 adapter->hw.media_type == e1000_media_type_copper) {
4235 manc = E1000_READ_REG(&adapter->hw, MANC);
4236 if(manc & E1000_MANC_SMBUS_EN) {
4237 manc |= E1000_MANC_ARP_EN;
4238 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4239 pci_enable_wake(pdev, 3, 1);
4240 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4241 }
4242 }
4243
2d7edb92 4244 switch(adapter->hw.mac_type) {
868d5309
MC		 4245 case e1000_82571:
4246 case e1000_82572:
4247 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4248 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
4249 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
4250 break;
2d7edb92
MC		 4251 case e1000_82573:
4252 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4253 E1000_WRITE_REG(&adapter->hw, SWSM,
4254 swsm & ~E1000_SWSM_DRV_LOAD);
4255 break;
4256 default:
4257 break;
4258 }
4259
1da177e4 4260 pci_disable_device(pdev);
829ca9a3 4261 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4262
4263 return 0;
4264}
4265
1da177e4
LT		 4266static int
4267e1000_resume(struct pci_dev *pdev)
4268{
4269 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4270 struct e1000_adapter *adapter = netdev_priv(netdev);
2b02893e 4271 uint32_t manc, ret_val, swsm;
868d5309 4272 uint32_t ctrl_ext;
1da177e4 4273
829ca9a3 4274 pci_set_power_state(pdev, PCI_D0);
1da177e4 4275 pci_restore_state(pdev);
2b02893e 4276 ret_val = pci_enable_device(pdev);
a4cb847d 4277 pci_set_master(pdev);
1da177e4 4278
829ca9a3
PM		 4279 pci_enable_wake(pdev, PCI_D3hot, 0);
4280 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4281
4282 e1000_reset(adapter);
4283 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4284
4285 if(netif_running(netdev))
4286 e1000_up(adapter);
4287
4288 netif_device_attach(netdev);
4289
4290 if(adapter->hw.mac_type >= e1000_82540 &&
4291 adapter->hw.media_type == e1000_media_type_copper) {
4292 manc = E1000_READ_REG(&adapter->hw, MANC);
4293 manc &= ~(E1000_MANC_ARP_EN);
4294 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4295 }
4296
2d7edb92 4297 switch(adapter->hw.mac_type) {
868d5309
MC		 4298 case e1000_82571:
4299 case e1000_82572:
4300 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4301 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
4302 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
4303 break;
2d7edb92
MC		 4304 case e1000_82573:
4305 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4306 E1000_WRITE_REG(&adapter->hw, SWSM,
4307 swsm | E1000_SWSM_DRV_LOAD);
4308 break;
4309 default:
4310 break;
4311 }
4312
1da177e4
LT		 4313 return 0;
4314}
4315#endif
1da177e4
LT		 4316#ifdef CONFIG_NET_POLL_CONTROLLER
4317/*
4318 * Polling 'interrupt' - used by things like netconsole to send skbs
4319 * without having to re-enable interrupts. It's not called while
4320 * the interrupt routine is executing.
4321 */
4322static void
2648345f 4323e1000_netpoll(struct net_device *netdev)
1da177e4 4324{
60490fe0 4325 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4326 disable_irq(adapter->pdev->irq);
4327 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4328 e1000_clean_tx_irq(adapter, adapter->tx_ring);
1da177e4
LT		 4329 enable_irq(adapter->pdev->irq);
4330}
4331#endif
4332
4333/* e1000_main.c */
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