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e1000: New hardware support
[mirror_ubuntu-bionic-kernel.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
1da177e4 31char e1000_driver_name[] = "e1000";
3ad2cc67 32static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 33#ifndef CONFIG_E1000_NAPI
34#define DRIVERNAPI
35#else
36#define DRIVERNAPI "-NAPI"
37#endif
ff1e55b0 38#define DRV_VERSION "7.2.9-k4"DRIVERNAPI
1da177e4 39char e1000_driver_version[] = DRV_VERSION;
3d41e30a 40static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
fc2307d0
AK		 106 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
107 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
1da177e4
LT		 109 /* required last entry */
110 {0,}
111};
112
113MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
114
35574764
NN		 115int e1000_up(struct e1000_adapter *adapter);
116void e1000_down(struct e1000_adapter *adapter);
117void e1000_reinit_locked(struct e1000_adapter *adapter);
118void e1000_reset(struct e1000_adapter *adapter);
119int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
120int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
121int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
122void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
123void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 124static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 125 struct e1000_tx_ring *txdr);
3ad2cc67 126static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 127 struct e1000_rx_ring *rxdr);
3ad2cc67 128static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 129 struct e1000_tx_ring *tx_ring);
3ad2cc67 130static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 131 struct e1000_rx_ring *rx_ring);
132void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 133
134static int e1000_init_module(void);
135static void e1000_exit_module(void);
136static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
137static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 138static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 139static int e1000_sw_init(struct e1000_adapter *adapter);
140static int e1000_open(struct net_device *netdev);
141static int e1000_close(struct net_device *netdev);
142static void e1000_configure_tx(struct e1000_adapter *adapter);
143static void e1000_configure_rx(struct e1000_adapter *adapter);
144static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 145static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
146static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
147static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
148 struct e1000_tx_ring *tx_ring);
149static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
150 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 151static void e1000_set_multi(struct net_device *netdev);
152static void e1000_update_phy_info(unsigned long data);
153static void e1000_watchdog(unsigned long data);
1da177e4
LT		 154static void e1000_82547_tx_fifo_stall(unsigned long data);
155static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
156static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
157static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
158static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 159static irqreturn_t e1000_intr(int irq, void *data);
581d708e
MC		 160static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
161 struct e1000_tx_ring *tx_ring);
1da177e4 162#ifdef CONFIG_E1000_NAPI
581d708e 163static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 164static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 165 struct e1000_rx_ring *rx_ring,
1da177e4 166 int *work_done, int work_to_do);
2d7edb92 167static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 168 struct e1000_rx_ring *rx_ring,
2d7edb92 169 int *work_done, int work_to_do);
1da177e4 170#else
581d708e
MC		 171static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
172 struct e1000_rx_ring *rx_ring);
173static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring);
1da177e4 175#endif
581d708e 176static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
581d708e 179static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 180 struct e1000_rx_ring *rx_ring,
181 int cleaned_count);
1da177e4
LT		 182static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
183static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
184 int cmd);
35574764 185void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 186static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
187static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
188static void e1000_tx_timeout(struct net_device *dev);
87041639 189static void e1000_reset_task(struct net_device *dev);
1da177e4 190static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 191static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
192 struct sk_buff *skb);
1da177e4
LT		 193
194static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
195static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
196static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
197static void e1000_restore_vlan(struct e1000_adapter *adapter);
198
977e74b5 199static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 200#ifdef CONFIG_PM
1da177e4
LT		 201static int e1000_resume(struct pci_dev *pdev);
202#endif
c653e635 203static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 204
205#ifdef CONFIG_NET_POLL_CONTROLLER
206/* for netdump / net console */
207static void e1000_netpoll (struct net_device *netdev);
208#endif
209
35574764
NN		 210extern void e1000_check_options(struct e1000_adapter *adapter);
211
9026729b
AK		 212static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
213 pci_channel_state_t state);
214static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
215static void e1000_io_resume(struct pci_dev *pdev);
216
217static struct pci_error_handlers e1000_err_handler = {
218 .error_detected = e1000_io_error_detected,
219 .slot_reset = e1000_io_slot_reset,
220 .resume = e1000_io_resume,
221};
24025e4e 222
1da177e4
LT		 223static struct pci_driver e1000_driver = {
224 .name = e1000_driver_name,
225 .id_table = e1000_pci_tbl,
226 .probe = e1000_probe,
227 .remove = __devexit_p(e1000_remove),
c4e24f01 228#ifdef CONFIG_PM
1da177e4 229 /* Power Managment Hooks */
1da177e4 230 .suspend = e1000_suspend,
c653e635 231 .resume = e1000_resume,
1da177e4 232#endif
9026729b
AK		 233 .shutdown = e1000_shutdown,
234 .err_handler = &e1000_err_handler
1da177e4
LT		 235};
236
237MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
238MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
239MODULE_LICENSE("GPL");
240MODULE_VERSION(DRV_VERSION);
241
242static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
243module_param(debug, int, 0);
244MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
245
246/**
247 * e1000_init_module - Driver Registration Routine
248 *
249 * e1000_init_module is the first routine called when the driver is
250 * loaded. All it does is register with the PCI subsystem.
251 **/
252
253static int __init
254e1000_init_module(void)
255{
256 int ret;
257 printk(KERN_INFO "%s - version %s\n",
258 e1000_driver_string, e1000_driver_version);
259
260 printk(KERN_INFO "%s\n", e1000_copyright);
261
29917620 262 ret = pci_register_driver(&e1000_driver);
8b378def 263
1da177e4
LT		 264 return ret;
265}
266
267module_init(e1000_init_module);
268
269/**
270 * e1000_exit_module - Driver Exit Cleanup Routine
271 *
272 * e1000_exit_module is called just before the driver is removed
273 * from memory.
274 **/
275
276static void __exit
277e1000_exit_module(void)
278{
1da177e4
LT		 279 pci_unregister_driver(&e1000_driver);
280}
281
282module_exit(e1000_exit_module);
283
2db10a08
AK		 284static int e1000_request_irq(struct e1000_adapter *adapter)
285{
286 struct net_device *netdev = adapter->netdev;
287 int flags, err = 0;
288
c0bc8721 289 flags = IRQF_SHARED;
2db10a08
AK		 290#ifdef CONFIG_PCI_MSI
291 if (adapter->hw.mac_type > e1000_82547_rev_2) {
292 adapter->have_msi = TRUE;
293 if ((err = pci_enable_msi(adapter->pdev))) {
294 DPRINTK(PROBE, ERR,
295 "Unable to allocate MSI interrupt Error: %d\n", err);
296 adapter->have_msi = FALSE;
297 }
298 }
299 if (adapter->have_msi)
61ef5c00 300 flags &= ~IRQF_SHARED;
2db10a08
AK		 301#endif
302 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
303 netdev->name, netdev)))
304 DPRINTK(PROBE, ERR,
305 "Unable to allocate interrupt Error: %d\n", err);
306
307 return err;
308}
309
310static void e1000_free_irq(struct e1000_adapter *adapter)
311{
312 struct net_device *netdev = adapter->netdev;
313
314 free_irq(adapter->pdev->irq, netdev);
315
316#ifdef CONFIG_PCI_MSI
317 if (adapter->have_msi)
318 pci_disable_msi(adapter->pdev);
319#endif
320}
321
1da177e4
LT		 322/**
323 * e1000_irq_disable - Mask off interrupt generation on the NIC
324 * @adapter: board private structure
325 **/
326
e619d523 327static void
1da177e4
LT		 328e1000_irq_disable(struct e1000_adapter *adapter)
329{
330 atomic_inc(&adapter->irq_sem);
331 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
332 E1000_WRITE_FLUSH(&adapter->hw);
333 synchronize_irq(adapter->pdev->irq);
334}
335
336/**
337 * e1000_irq_enable - Enable default interrupt generation settings
338 * @adapter: board private structure
339 **/
340
e619d523 341static void
1da177e4
LT		 342e1000_irq_enable(struct e1000_adapter *adapter)
343{
96838a40 344 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 345 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
346 E1000_WRITE_FLUSH(&adapter->hw);
347 }
348}
3ad2cc67
AB		 349
350static void
2d7edb92
MC		 351e1000_update_mng_vlan(struct e1000_adapter *adapter)
352{
353 struct net_device *netdev = adapter->netdev;
354 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
355 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 356 if (adapter->vlgrp) {
357 if (!adapter->vlgrp->vlan_devices[vid]) {
358 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 359 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
360 e1000_vlan_rx_add_vid(netdev, vid);
361 adapter->mng_vlan_id = vid;
362 } else
363 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 364
365 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
366 (vid != old_vid) &&
2d7edb92
MC		 367 !adapter->vlgrp->vlan_devices[old_vid])
368 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 369 } else
370 adapter->mng_vlan_id = vid;
2d7edb92
MC		 371 }
372}
b55ccb35
JK		 373
374/**
375 * e1000_release_hw_control - release control of the h/w to f/w
376 * @adapter: address of board private structure
377 *
378 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
379 * For ASF and Pass Through versions of f/w this means that the
380 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 381 * of the f/w this means that the network i/f is closed.
76c224bc 382 *
b55ccb35
JK		 383 **/
384
e619d523 385static void
b55ccb35
JK		 386e1000_release_hw_control(struct e1000_adapter *adapter)
387{
388 uint32_t ctrl_ext;
389 uint32_t swsm;
cd94dd0b 390 uint32_t extcnf;
b55ccb35
JK		 391
392 /* Let firmware taken over control of h/w */
393 switch (adapter->hw.mac_type) {
394 case e1000_82571:
395 case e1000_82572:
4cc15f54 396 case e1000_80003es2lan:
b55ccb35
JK		 397 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
398 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
399 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
400 break;
401 case e1000_82573:
402 swsm = E1000_READ_REG(&adapter->hw, SWSM);
403 E1000_WRITE_REG(&adapter->hw, SWSM,
404 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 405 case e1000_ich8lan:
406 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
407 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
408 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
409 break;
b55ccb35
JK		 410 default:
411 break;
412 }
413}
414
415/**
416 * e1000_get_hw_control - get control of the h/w from f/w
417 * @adapter: address of board private structure
418 *
419 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 420 * For ASF and Pass Through versions of f/w this means that
421 * the driver is loaded. For AMT version (only with 82573)
90fb5135 422 * of the f/w this means that the network i/f is open.
76c224bc 423 *
b55ccb35
JK		 424 **/
425
e619d523 426static void
b55ccb35
JK		 427e1000_get_hw_control(struct e1000_adapter *adapter)
428{
429 uint32_t ctrl_ext;
430 uint32_t swsm;
cd94dd0b 431 uint32_t extcnf;
90fb5135 432
b55ccb35
JK		 433 /* Let firmware know the driver has taken over */
434 switch (adapter->hw.mac_type) {
435 case e1000_82571:
436 case e1000_82572:
4cc15f54 437 case e1000_80003es2lan:
b55ccb35
JK		 438 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
439 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
440 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
441 break;
442 case e1000_82573:
443 swsm = E1000_READ_REG(&adapter->hw, SWSM);
444 E1000_WRITE_REG(&adapter->hw, SWSM,
445 swsm | E1000_SWSM_DRV_LOAD);
446 break;
cd94dd0b
AK		 447 case e1000_ich8lan:
448 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
449 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
450 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
451 break;
b55ccb35
JK		 452 default:
453 break;
454 }
455}
456
1da177e4
LT		 457int
458e1000_up(struct e1000_adapter *adapter)
459{
460 struct net_device *netdev = adapter->netdev;
2db10a08 461 int i;
1da177e4
LT		 462
463 /* hardware has been reset, we need to reload some things */
464
1da177e4
LT		 465 e1000_set_multi(netdev);
466
467 e1000_restore_vlan(adapter);
468
469 e1000_configure_tx(adapter);
470 e1000_setup_rctl(adapter);
471 e1000_configure_rx(adapter);
72d64a43
JK		 472 /* call E1000_DESC_UNUSED which always leaves
473 * at least 1 descriptor unused to make sure
474 * next_to_use != next_to_clean */
f56799ea 475 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 476 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 477 adapter->alloc_rx_buf(adapter, ring,
478 E1000_DESC_UNUSED(ring));
f56799ea 479 }
1da177e4 480
7bfa4816
JK		 481 adapter->tx_queue_len = netdev->tx_queue_len;
482
1da177e4
LT		 483#ifdef CONFIG_E1000_NAPI
484 netif_poll_enable(netdev);
485#endif
5de55624
MC		 486 e1000_irq_enable(adapter);
487
1314bbf3
AK		 488 clear_bit(__E1000_DOWN, &adapter->flags);
489
490 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1da177e4
LT		 491 return 0;
492}
493
79f05bf0
AK		 494/**
495 * e1000_power_up_phy - restore link in case the phy was powered down
496 * @adapter: address of board private structure
497 *
498 * The phy may be powered down to save power and turn off link when the
499 * driver is unloaded and wake on lan is not enabled (among others)
500 * *** this routine MUST be followed by a call to e1000_reset ***
501 *
502 **/
503
d658266e 504void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 505{
506 uint16_t mii_reg = 0;
507
508 /* Just clear the power down bit to wake the phy back up */
509 if (adapter->hw.media_type == e1000_media_type_copper) {
510 /* according to the manual, the phy will retain its
511 * settings across a power-down/up cycle */
512 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
513 mii_reg &= ~MII_CR_POWER_DOWN;
514 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
515 }
516}
517
518static void e1000_power_down_phy(struct e1000_adapter *adapter)
519{
61c2505f
BA		 520 /* Power down the PHY so no link is implied when interface is down *
521 * The PHY cannot be powered down if any of the following is TRUE *
79f05bf0
AK		 522 * (a) WoL is enabled
523 * (b) AMT is active
524 * (c) SoL/IDER session is active */
525 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
61c2505f 526 adapter->hw.media_type == e1000_media_type_copper) {
79f05bf0 527 uint16_t mii_reg = 0;
61c2505f
BA		 528
529 switch (adapter->hw.mac_type) {
530 case e1000_82540:
531 case e1000_82545:
532 case e1000_82545_rev_3:
533 case e1000_82546:
534 case e1000_82546_rev_3:
535 case e1000_82541:
536 case e1000_82541_rev_2:
537 case e1000_82547:
538 case e1000_82547_rev_2:
539 if (E1000_READ_REG(&adapter->hw, MANC) &
540 E1000_MANC_SMBUS_EN)
541 goto out;
542 break;
543 case e1000_82571:
544 case e1000_82572:
545 case e1000_82573:
546 case e1000_80003es2lan:
547 case e1000_ich8lan:
548 if (e1000_check_mng_mode(&adapter->hw) ||
549 e1000_check_phy_reset_block(&adapter->hw))
550 goto out;
551 break;
552 default:
553 goto out;
554 }
79f05bf0
AK		 555 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
556 mii_reg |= MII_CR_POWER_DOWN;
557 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
558 mdelay(1);
559 }
61c2505f
BA		 560out:
561 return;
79f05bf0
AK		 562}
563
1da177e4
LT		 564void
565e1000_down(struct e1000_adapter *adapter)
566{
567 struct net_device *netdev = adapter->netdev;
568
1314bbf3
AK		 569 /* signal that we're down so the interrupt handler does not
570 * reschedule our watchdog timer */
571 set_bit(__E1000_DOWN, &adapter->flags);
572
1da177e4 573 e1000_irq_disable(adapter);
c1605eb3 574
1da177e4
LT		 575 del_timer_sync(&adapter->tx_fifo_stall_timer);
576 del_timer_sync(&adapter->watchdog_timer);
577 del_timer_sync(&adapter->phy_info_timer);
578
579#ifdef CONFIG_E1000_NAPI
580 netif_poll_disable(netdev);
581#endif
7bfa4816 582 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 583 adapter->link_speed = 0;
584 adapter->link_duplex = 0;
585 netif_carrier_off(netdev);
586 netif_stop_queue(netdev);
587
588 e1000_reset(adapter);
581d708e
MC		 589 e1000_clean_all_tx_rings(adapter);
590 e1000_clean_all_rx_rings(adapter);
1da177e4 591}
1da177e4 592
2db10a08
AK		 593void
594e1000_reinit_locked(struct e1000_adapter *adapter)
595{
596 WARN_ON(in_interrupt());
597 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
598 msleep(1);
599 e1000_down(adapter);
600 e1000_up(adapter);
601 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 602}
603
604void
605e1000_reset(struct e1000_adapter *adapter)
606{
2d7edb92 607 uint32_t pba, manc;
1125ecbc 608 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 609
610 /* Repartition Pba for greater than 9k mtu
611 * To take effect CTRL.RST is required.
612 */
613
2d7edb92
MC		 614 switch (adapter->hw.mac_type) {
615 case e1000_82547:
0e6ef3e0 616 case e1000_82547_rev_2:
2d7edb92
MC		 617 pba = E1000_PBA_30K;
618 break;
868d5309
MC		 619 case e1000_82571:
620 case e1000_82572:
6418ecc6 621 case e1000_80003es2lan:
868d5309
MC		 622 pba = E1000_PBA_38K;
623 break;
2d7edb92
MC		 624 case e1000_82573:
625 pba = E1000_PBA_12K;
626 break;
cd94dd0b
AK		 627 case e1000_ich8lan:
628 pba = E1000_PBA_8K;
629 break;
2d7edb92
MC		 630 default:
631 pba = E1000_PBA_48K;
632 break;
633 }
634
96838a40 635 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 636 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 637 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 638
639
96838a40 640 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 641 adapter->tx_fifo_head = 0;
642 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
643 adapter->tx_fifo_size =
644 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
645 atomic_set(&adapter->tx_fifo_stall, 0);
646 }
2d7edb92 647
1da177e4
LT		 648 E1000_WRITE_REG(&adapter->hw, PBA, pba);
649
650 /* flow control settings */
f11b7f85
JK		 651 /* Set the FC high water mark to 90% of the FIFO size.
652 * Required to clear last 3 LSB */
653 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 654 /* We can't use 90% on small FIFOs because the remainder
655 * would be less than 1 full frame. In this case, we size
656 * it to allow at least a full frame above the high water
657 * mark. */
658 if (pba < E1000_PBA_16K)
659 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 660
661 adapter->hw.fc_high_water = fc_high_water_mark;
662 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 663 if (adapter->hw.mac_type == e1000_80003es2lan)
664 adapter->hw.fc_pause_time = 0xFFFF;
665 else
666 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 667 adapter->hw.fc_send_xon = 1;
668 adapter->hw.fc = adapter->hw.original_fc;
669
2d7edb92 670 /* Allow time for pending master requests to run */
1da177e4 671 e1000_reset_hw(&adapter->hw);
96838a40 672 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 673 E1000_WRITE_REG(&adapter->hw, WUC, 0);
09ae3e88 674
96838a40 675 if (e1000_init_hw(&adapter->hw))
1da177e4 676 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 677 e1000_update_mng_vlan(adapter);
1da177e4
LT		 678 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
679 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
680
681 e1000_reset_adaptive(&adapter->hw);
682 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 683
684 if (!adapter->smart_power_down &&
685 (adapter->hw.mac_type == e1000_82571 ||
686 adapter->hw.mac_type == e1000_82572)) {
687 uint16_t phy_data = 0;
688 /* speed up time to link by disabling smart power down, ignore
689 * the return value of this function because there is nothing
690 * different we would do if it failed */
691 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
692 &phy_data);
693 phy_data &= ~IGP02E1000_PM_SPD;
694 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
695 phy_data);
696 }
697
4ccc12ae
JB		 698 if ((adapter->en_mng_pt) &&
699 (adapter->hw.mac_type >= e1000_82540) &&
700 (adapter->hw.mac_type < e1000_82571) &&
701 (adapter->hw.media_type == e1000_media_type_copper)) {
2d7edb92
MC		 702 manc = E1000_READ_REG(&adapter->hw, MANC);
703 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
704 E1000_WRITE_REG(&adapter->hw, MANC, manc);
705 }
1da177e4
LT		 706}
707
708/**
709 * e1000_probe - Device Initialization Routine
710 * @pdev: PCI device information struct
711 * @ent: entry in e1000_pci_tbl
712 *
713 * Returns 0 on success, negative on failure
714 *
715 * e1000_probe initializes an adapter identified by a pci_dev structure.
716 * The OS initialization, configuring of the adapter private structure,
717 * and a hardware reset occur.
718 **/
719
720static int __devinit
721e1000_probe(struct pci_dev *pdev,
722 const struct pci_device_id *ent)
723{
724 struct net_device *netdev;
725 struct e1000_adapter *adapter;
2d7edb92 726 unsigned long mmio_start, mmio_len;
cd94dd0b 727 unsigned long flash_start, flash_len;
2d7edb92 728
1da177e4 729 static int cards_found = 0;
120cd576 730 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 731 int i, err, pci_using_dac;
120cd576 732 uint16_t eeprom_data = 0;
1da177e4 733 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 734 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 735 return err;
736
cd94dd0b
AK		 737 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
738 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 739 pci_using_dac = 1;
740 } else {
cd94dd0b
AK		 741 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
742 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 743 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 744 goto err_dma;
1da177e4
LT		 745 }
746 pci_using_dac = 0;
747 }
748
96838a40 749 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 750 goto err_pci_reg;
1da177e4
LT		 751
752 pci_set_master(pdev);
753
6dd62ab0 754 err = -ENOMEM;
1da177e4 755 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 756 if (!netdev)
1da177e4 757 goto err_alloc_etherdev;
1da177e4
LT		 758
759 SET_MODULE_OWNER(netdev);
760 SET_NETDEV_DEV(netdev, &pdev->dev);
761
762 pci_set_drvdata(pdev, netdev);
60490fe0 763 adapter = netdev_priv(netdev);
1da177e4
LT		 764 adapter->netdev = netdev;
765 adapter->pdev = pdev;
766 adapter->hw.back = adapter;
767 adapter->msg_enable = (1 << debug) - 1;
768
769 mmio_start = pci_resource_start(pdev, BAR_0);
770 mmio_len = pci_resource_len(pdev, BAR_0);
771
6dd62ab0 772 err = -EIO;
1da177e4 773 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 774 if (!adapter->hw.hw_addr)
1da177e4 775 goto err_ioremap;
1da177e4 776
96838a40
JB		 777 for (i = BAR_1; i <= BAR_5; i++) {
778 if (pci_resource_len(pdev, i) == 0)
1da177e4 779 continue;
96838a40 780 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 781 adapter->hw.io_base = pci_resource_start(pdev, i);
782 break;
783 }
784 }
785
786 netdev->open = &e1000_open;
787 netdev->stop = &e1000_close;
788 netdev->hard_start_xmit = &e1000_xmit_frame;
789 netdev->get_stats = &e1000_get_stats;
790 netdev->set_multicast_list = &e1000_set_multi;
791 netdev->set_mac_address = &e1000_set_mac;
792 netdev->change_mtu = &e1000_change_mtu;
793 netdev->do_ioctl = &e1000_ioctl;
794 e1000_set_ethtool_ops(netdev);
795 netdev->tx_timeout = &e1000_tx_timeout;
796 netdev->watchdog_timeo = 5 * HZ;
797#ifdef CONFIG_E1000_NAPI
798 netdev->poll = &e1000_clean;
799 netdev->weight = 64;
800#endif
801 netdev->vlan_rx_register = e1000_vlan_rx_register;
802 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
803 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
804#ifdef CONFIG_NET_POLL_CONTROLLER
805 netdev->poll_controller = e1000_netpoll;
806#endif
0eb5a34c 807 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 808
809 netdev->mem_start = mmio_start;
810 netdev->mem_end = mmio_start + mmio_len;
811 netdev->base_addr = adapter->hw.io_base;
812
813 adapter->bd_number = cards_found;
814
815 /* setup the private structure */
816
96838a40 817 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 818 goto err_sw_init;
819
6dd62ab0 820 err = -EIO;
cd94dd0b
AK		 821 /* Flash BAR mapping must happen after e1000_sw_init
822 * because it depends on mac_type */
823 if ((adapter->hw.mac_type == e1000_ich8lan) &&
824 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
825 flash_start = pci_resource_start(pdev, 1);
826 flash_len = pci_resource_len(pdev, 1);
827 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 828 if (!adapter->hw.flash_address)
cd94dd0b 829 goto err_flashmap;
cd94dd0b
AK		 830 }
831
6dd62ab0 832 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 833 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
834
96838a40 835 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 836 netdev->features = NETIF_F_SG |
837 NETIF_F_HW_CSUM |
838 NETIF_F_HW_VLAN_TX |
839 NETIF_F_HW_VLAN_RX |
840 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 841 if (adapter->hw.mac_type == e1000_ich8lan)
842 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 843 }
844
845#ifdef NETIF_F_TSO
96838a40 846 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 847 (adapter->hw.mac_type != e1000_82547))
848 netdev->features |= NETIF_F_TSO;
2d7edb92 849
87ca4e5b 850#ifdef NETIF_F_TSO6
96838a40 851 if (adapter->hw.mac_type > e1000_82547_rev_2)
87ca4e5b 852 netdev->features |= NETIF_F_TSO6;
2d7edb92 853#endif
1da177e4 854#endif
96838a40 855 if (pci_using_dac)
1da177e4
LT		 856 netdev->features |= NETIF_F_HIGHDMA;
857
76c224bc
AK		 858 netdev->features |= NETIF_F_LLTX;
859
2d7edb92
MC		 860 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
861
cd94dd0b
AK		 862 /* initialize eeprom parameters */
863
864 if (e1000_init_eeprom_params(&adapter->hw)) {
865 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 866 goto err_eeprom;
cd94dd0b
AK		 867 }
868
96838a40 869 /* before reading the EEPROM, reset the controller to
1da177e4 870 * put the device in a known good starting state */
96838a40 871
1da177e4
LT		 872 e1000_reset_hw(&adapter->hw);
873
874 /* make sure the EEPROM is good */
875
96838a40 876 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 877 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 878 goto err_eeprom;
879 }
880
881 /* copy the MAC address out of the EEPROM */
882
96838a40 883 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 884 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
885 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 886 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 887
96838a40 888 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 889 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 890 goto err_eeprom;
891 }
892
1da177e4
LT		 893 e1000_get_bus_info(&adapter->hw);
894
895 init_timer(&adapter->tx_fifo_stall_timer);
896 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
897 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
898
899 init_timer(&adapter->watchdog_timer);
900 adapter->watchdog_timer.function = &e1000_watchdog;
901 adapter->watchdog_timer.data = (unsigned long) adapter;
902
1da177e4
LT		 903 init_timer(&adapter->phy_info_timer);
904 adapter->phy_info_timer.function = &e1000_update_phy_info;
905 adapter->phy_info_timer.data = (unsigned long) adapter;
906
87041639
JK		 907 INIT_WORK(&adapter->reset_task,
908 (void (*)(void *))e1000_reset_task, netdev);
1da177e4 909
1da177e4
LT		 910 e1000_check_options(adapter);
911
912 /* Initial Wake on LAN setting
913 * If APM wake is enabled in the EEPROM,
914 * enable the ACPI Magic Packet filter
915 */
916
96838a40 917 switch (adapter->hw.mac_type) {
1da177e4
LT		 918 case e1000_82542_rev2_0:
919 case e1000_82542_rev2_1:
920 case e1000_82543:
921 break;
922 case e1000_82544:
923 e1000_read_eeprom(&adapter->hw,
924 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
925 eeprom_apme_mask = E1000_EEPROM_82544_APM;
926 break;
cd94dd0b
AK		 927 case e1000_ich8lan:
928 e1000_read_eeprom(&adapter->hw,
929 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
930 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
931 break;
1da177e4
LT		 932 case e1000_82546:
933 case e1000_82546_rev_3:
fd803241 934 case e1000_82571:
6418ecc6 935 case e1000_80003es2lan:
96838a40 936 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 937 e1000_read_eeprom(&adapter->hw,
938 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
939 break;
940 }
941 /* Fall Through */
942 default:
943 e1000_read_eeprom(&adapter->hw,
944 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
945 break;
946 }
96838a40 947 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 948 adapter->eeprom_wol |= E1000_WUFC_MAG;
949
950 /* now that we have the eeprom settings, apply the special cases
951 * where the eeprom may be wrong or the board simply won't support
952 * wake on lan on a particular port */
953 switch (pdev->device) {
954 case E1000_DEV_ID_82546GB_PCIE:
955 adapter->eeprom_wol = 0;
956 break;
957 case E1000_DEV_ID_82546EB_FIBER:
958 case E1000_DEV_ID_82546GB_FIBER:
959 case E1000_DEV_ID_82571EB_FIBER:
960 /* Wake events only supported on port A for dual fiber
961 * regardless of eeprom setting */
962 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
963 adapter->eeprom_wol = 0;
964 break;
965 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 966 case E1000_DEV_ID_82571EB_QUAD_COPPER:
fc2307d0 967 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
120cd576
JB		 968 /* if quad port adapter, disable WoL on all but port A */
969 if (global_quad_port_a != 0)
970 adapter->eeprom_wol = 0;
971 else
972 adapter->quad_port_a = 1;
973 /* Reset for multiple quad port adapters */
974 if (++global_quad_port_a == 4)
975 global_quad_port_a = 0;
976 break;
977 }
978
979 /* initialize the wol settings based on the eeprom settings */
980 adapter->wol = adapter->eeprom_wol;
1da177e4 981
fb3d47d4
JK		 982 /* print bus type/speed/width info */
983 {
984 struct e1000_hw *hw = &adapter->hw;
985 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
986 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
987 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
988 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
989 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
990 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
991 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
992 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
993 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
994 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
995 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
996 "32-bit"));
997 }
998
999 for (i = 0; i < 6; i++)
1000 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1001
1da177e4
LT		 1002 /* reset the hardware with the new settings */
1003 e1000_reset(adapter);
1004
b55ccb35
JK		 1005 /* If the controller is 82573 and f/w is AMT, do not set
1006 * DRV_LOAD until the interface is up. For all other cases,
1007 * let the f/w know that the h/w is now under the control
1008 * of the driver. */
1009 if (adapter->hw.mac_type != e1000_82573 ||
1010 !e1000_check_mng_mode(&adapter->hw))
1011 e1000_get_hw_control(adapter);
2d7edb92 1012
1da177e4 1013 strcpy(netdev->name, "eth%d");
96838a40 1014 if ((err = register_netdev(netdev)))
1da177e4
LT		 1015 goto err_register;
1016
1314bbf3
AK		 1017 /* tell the stack to leave us alone until e1000_open() is called */
1018 netif_carrier_off(netdev);
1019 netif_stop_queue(netdev);
1020
1da177e4
LT		 1021 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1022
1023 cards_found++;
1024 return 0;
1025
1026err_register:
6dd62ab0
VA		 1027 e1000_release_hw_control(adapter);
1028err_eeprom:
1029 if (!e1000_check_phy_reset_block(&adapter->hw))
1030 e1000_phy_hw_reset(&adapter->hw);
1031
cd94dd0b
AK		 1032 if (adapter->hw.flash_address)
1033 iounmap(adapter->hw.flash_address);
1034err_flashmap:
6dd62ab0
VA		 1035#ifdef CONFIG_E1000_NAPI
1036 for (i = 0; i < adapter->num_rx_queues; i++)
1037 dev_put(&adapter->polling_netdev[i]);
1038#endif
1039
1040 kfree(adapter->tx_ring);
1041 kfree(adapter->rx_ring);
1042#ifdef CONFIG_E1000_NAPI
1043 kfree(adapter->polling_netdev);
1044#endif
1da177e4 1045err_sw_init:
1da177e4
LT		 1046 iounmap(adapter->hw.hw_addr);
1047err_ioremap:
1048 free_netdev(netdev);
1049err_alloc_etherdev:
1050 pci_release_regions(pdev);
6dd62ab0
VA		 1051err_pci_reg:
1052err_dma:
1053 pci_disable_device(pdev);
1da177e4
LT		 1054 return err;
1055}
1056
1057/**
1058 * e1000_remove - Device Removal Routine
1059 * @pdev: PCI device information struct
1060 *
1061 * e1000_remove is called by the PCI subsystem to alert the driver
1062 * that it should release a PCI device. The could be caused by a
1063 * Hot-Plug event, or because the driver is going to be removed from
1064 * memory.
1065 **/
1066
1067static void __devexit
1068e1000_remove(struct pci_dev *pdev)
1069{
1070 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1071 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 1072 uint32_t manc;
581d708e
MC		 1073#ifdef CONFIG_E1000_NAPI
1074 int i;
1075#endif
1da177e4 1076
be2b28ed
JG		 1077 flush_scheduled_work();
1078
4ccc12ae
JB		 1079 if (adapter->hw.mac_type >= e1000_82540 &&
1080 adapter->hw.mac_type < e1000_82571 &&
1081 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4 1082 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 1083 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1084 manc |= E1000_MANC_ARP_EN;
1085 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1086 }
1087 }
1088
b55ccb35
JK		 1089 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1090 * would have already happened in close and is redundant. */
1091 e1000_release_hw_control(adapter);
2d7edb92 1092
1da177e4 1093 unregister_netdev(netdev);
581d708e 1094#ifdef CONFIG_E1000_NAPI
f56799ea 1095 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1096 dev_put(&adapter->polling_netdev[i]);
581d708e 1097#endif
1da177e4 1098
96838a40 1099 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1100 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1101
24025e4e
MC		 1102 kfree(adapter->tx_ring);
1103 kfree(adapter->rx_ring);
1104#ifdef CONFIG_E1000_NAPI
1105 kfree(adapter->polling_netdev);
1106#endif
1107
1da177e4 1108 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1109 if (adapter->hw.flash_address)
1110 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1111 pci_release_regions(pdev);
1112
1113 free_netdev(netdev);
1114
1115 pci_disable_device(pdev);
1116}
1117
1118/**
1119 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1120 * @adapter: board private structure to initialize
1121 *
1122 * e1000_sw_init initializes the Adapter private data structure.
1123 * Fields are initialized based on PCI device information and
1124 * OS network device settings (MTU size).
1125 **/
1126
1127static int __devinit
1128e1000_sw_init(struct e1000_adapter *adapter)
1129{
1130 struct e1000_hw *hw = &adapter->hw;
1131 struct net_device *netdev = adapter->netdev;
1132 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1133#ifdef CONFIG_E1000_NAPI
1134 int i;
1135#endif
1da177e4
LT		 1136
1137 /* PCI config space info */
1138
1139 hw->vendor_id = pdev->vendor;
1140 hw->device_id = pdev->device;
1141 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1142 hw->subsystem_id = pdev->subsystem_device;
1143
1144 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1145
1146 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1147
eb0f8054 1148 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1149 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1150 hw->max_frame_size = netdev->mtu +
1151 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1152 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1153
1154 /* identify the MAC */
1155
96838a40 1156 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1157 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1158 return -EIO;
1159 }
1160
96838a40 1161 switch (hw->mac_type) {
1da177e4
LT		 1162 default:
1163 break;
1164 case e1000_82541:
1165 case e1000_82547:
1166 case e1000_82541_rev_2:
1167 case e1000_82547_rev_2:
1168 hw->phy_init_script = 1;
1169 break;
1170 }
1171
1172 e1000_set_media_type(hw);
1173
1174 hw->wait_autoneg_complete = FALSE;
1175 hw->tbi_compatibility_en = TRUE;
1176 hw->adaptive_ifs = TRUE;
1177
1178 /* Copper options */
1179
96838a40 1180 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1181 hw->mdix = AUTO_ALL_MODES;
1182 hw->disable_polarity_correction = FALSE;
1183 hw->master_slave = E1000_MASTER_SLAVE;
1184 }
1185
f56799ea
JK		 1186 adapter->num_tx_queues = 1;
1187 adapter->num_rx_queues = 1;
581d708e
MC		 1188
1189 if (e1000_alloc_queues(adapter)) {
1190 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1191 return -ENOMEM;
1192 }
1193
1194#ifdef CONFIG_E1000_NAPI
f56799ea 1195 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1196 adapter->polling_netdev[i].priv = adapter;
1197 adapter->polling_netdev[i].poll = &e1000_clean;
1198 adapter->polling_netdev[i].weight = 64;
1199 dev_hold(&adapter->polling_netdev[i]);
1200 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1201 }
7bfa4816 1202 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1203#endif
1204
1da177e4
LT		 1205 atomic_set(&adapter->irq_sem, 1);
1206 spin_lock_init(&adapter->stats_lock);
1da177e4 1207
1314bbf3
AK		 1208 set_bit(__E1000_DOWN, &adapter->flags);
1209
1da177e4
LT		 1210 return 0;
1211}
1212
581d708e
MC		 1213/**
1214 * e1000_alloc_queues - Allocate memory for all rings
1215 * @adapter: board private structure to initialize
1216 *
1217 * We allocate one ring per queue at run-time since we don't know the
1218 * number of queues at compile-time. The polling_netdev array is
1219 * intended for Multiqueue, but should work fine with a single queue.
1220 **/
1221
1222static int __devinit
1223e1000_alloc_queues(struct e1000_adapter *adapter)
1224{
1225 int size;
1226
f56799ea 1227 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1228 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1229 if (!adapter->tx_ring)
1230 return -ENOMEM;
1231 memset(adapter->tx_ring, 0, size);
1232
f56799ea 1233 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1234 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1235 if (!adapter->rx_ring) {
1236 kfree(adapter->tx_ring);
1237 return -ENOMEM;
1238 }
1239 memset(adapter->rx_ring, 0, size);
1240
1241#ifdef CONFIG_E1000_NAPI
f56799ea 1242 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1243 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1244 if (!adapter->polling_netdev) {
1245 kfree(adapter->tx_ring);
1246 kfree(adapter->rx_ring);
1247 return -ENOMEM;
1248 }
1249 memset(adapter->polling_netdev, 0, size);
1250#endif
1251
1252 return E1000_SUCCESS;
1253}
1254
1da177e4
LT		 1255/**
1256 * e1000_open - Called when a network interface is made active
1257 * @netdev: network interface device structure
1258 *
1259 * Returns 0 on success, negative value on failure
1260 *
1261 * The open entry point is called when a network interface is made
1262 * active by the system (IFF_UP). At this point all resources needed
1263 * for transmit and receive operations are allocated, the interrupt
1264 * handler is registered with the OS, the watchdog timer is started,
1265 * and the stack is notified that the interface is ready.
1266 **/
1267
1268static int
1269e1000_open(struct net_device *netdev)
1270{
60490fe0 1271 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1272 int err;
1273
2db10a08 1274 /* disallow open during test */
1314bbf3 1275 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1276 return -EBUSY;
1277
1da177e4 1278 /* allocate transmit descriptors */
581d708e 1279 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1280 goto err_setup_tx;
1281
1282 /* allocate receive descriptors */
581d708e 1283 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1284 goto err_setup_rx;
1285
2db10a08
AK		 1286 err = e1000_request_irq(adapter);
1287 if (err)
401a552b 1288 goto err_req_irq;
2db10a08 1289
79f05bf0
AK		 1290 e1000_power_up_phy(adapter);
1291
96838a40 1292 if ((err = e1000_up(adapter)))
1da177e4 1293 goto err_up;
2d7edb92 1294 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1295 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1296 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1297 e1000_update_mng_vlan(adapter);
1298 }
1da177e4 1299
b55ccb35
JK		 1300 /* If AMT is enabled, let the firmware know that the network
1301 * interface is now open */
1302 if (adapter->hw.mac_type == e1000_82573 &&
1303 e1000_check_mng_mode(&adapter->hw))
1304 e1000_get_hw_control(adapter);
1305
1da177e4
LT		 1306 return E1000_SUCCESS;
1307
1308err_up:
401a552b
VA		 1309 e1000_power_down_phy(adapter);
1310 e1000_free_irq(adapter);
1311err_req_irq:
581d708e 1312 e1000_free_all_rx_resources(adapter);
1da177e4 1313err_setup_rx:
581d708e 1314 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1315err_setup_tx:
1316 e1000_reset(adapter);
1317
1318 return err;
1319}
1320
1321/**
1322 * e1000_close - Disables a network interface
1323 * @netdev: network interface device structure
1324 *
1325 * Returns 0, this is not allowed to fail
1326 *
1327 * The close entry point is called when an interface is de-activated
1328 * by the OS. The hardware is still under the drivers control, but
1329 * needs to be disabled. A global MAC reset is issued to stop the
1330 * hardware, and all transmit and receive resources are freed.
1331 **/
1332
1333static int
1334e1000_close(struct net_device *netdev)
1335{
60490fe0 1336 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1337
2db10a08 1338 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1339 e1000_down(adapter);
79f05bf0 1340 e1000_power_down_phy(adapter);
2db10a08 1341 e1000_free_irq(adapter);
1da177e4 1342
581d708e
MC		 1343 e1000_free_all_tx_resources(adapter);
1344 e1000_free_all_rx_resources(adapter);
1da177e4 1345
4666560a
BA		 1346 /* kill manageability vlan ID if supported, but not if a vlan with
1347 * the same ID is registered on the host OS (let 8021q kill it) */
96838a40 1348 if ((adapter->hw.mng_cookie.status &
4666560a
BA		 1349 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1350 !(adapter->vlgrp &&
1351 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
2d7edb92
MC		 1352 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1353 }
b55ccb35
JK		 1354
1355 /* If AMT is enabled, let the firmware know that the network
1356 * interface is now closed */
1357 if (adapter->hw.mac_type == e1000_82573 &&
1358 e1000_check_mng_mode(&adapter->hw))
1359 e1000_release_hw_control(adapter);
1360
1da177e4
LT		 1361 return 0;
1362}
1363
1364/**
1365 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1366 * @adapter: address of board private structure
2d7edb92
MC		 1367 * @start: address of beginning of memory
1368 * @len: length of memory
1da177e4 1369 **/
e619d523 1370static boolean_t
1da177e4
LT		 1371e1000_check_64k_bound(struct e1000_adapter *adapter,
1372 void *start, unsigned long len)
1373{
1374 unsigned long begin = (unsigned long) start;
1375 unsigned long end = begin + len;
1376
2648345f
MC		 1377 /* First rev 82545 and 82546 need to not allow any memory
1378 * write location to cross 64k boundary due to errata 23 */
1da177e4 1379 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1380 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1381 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1382 }
1383
1384 return TRUE;
1385}
1386
1387/**
1388 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1389 * @adapter: board private structure
581d708e 1390 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1391 *
1392 * Return 0 on success, negative on failure
1393 **/
1394
3ad2cc67 1395static int
581d708e
MC		 1396e1000_setup_tx_resources(struct e1000_adapter *adapter,
1397 struct e1000_tx_ring *txdr)
1da177e4 1398{
1da177e4
LT		 1399 struct pci_dev *pdev = adapter->pdev;
1400 int size;
1401
1402 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1403 txdr->buffer_info = vmalloc(size);
96838a40 1404 if (!txdr->buffer_info) {
2648345f
MC		 1405 DPRINTK(PROBE, ERR,
1406 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1407 return -ENOMEM;
1408 }
1409 memset(txdr->buffer_info, 0, size);
1410
1411 /* round up to nearest 4K */
1412
1413 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1414 E1000_ROUNDUP(txdr->size, 4096);
1415
1416 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1417 if (!txdr->desc) {
1da177e4 1418setup_tx_desc_die:
1da177e4 1419 vfree(txdr->buffer_info);
2648345f
MC		 1420 DPRINTK(PROBE, ERR,
1421 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1422 return -ENOMEM;
1423 }
1424
2648345f 1425 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1426 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1427 void *olddesc = txdr->desc;
1428 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1429 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1430 "at %p\n", txdr->size, txdr->desc);
1431 /* Try again, without freeing the previous */
1da177e4 1432 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1433 /* Failed allocation, critical failure */
96838a40 1434 if (!txdr->desc) {
1da177e4
LT		 1435 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1436 goto setup_tx_desc_die;
1437 }
1438
1439 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1440 /* give up */
2648345f
MC		 1441 pci_free_consistent(pdev, txdr->size, txdr->desc,
1442 txdr->dma);
1da177e4
LT		 1443 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1444 DPRINTK(PROBE, ERR,
2648345f
MC		 1445 "Unable to allocate aligned memory "
1446 "for the transmit descriptor ring\n");
1da177e4
LT		 1447 vfree(txdr->buffer_info);
1448 return -ENOMEM;
1449 } else {
2648345f 1450 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1451 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1452 }
1453 }
1454 memset(txdr->desc, 0, txdr->size);
1455
1456 txdr->next_to_use = 0;
1457 txdr->next_to_clean = 0;
2ae76d98 1458 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1459
1460 return 0;
1461}
1462
581d708e
MC		 1463/**
1464 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1465 * (Descriptors) for all queues
1466 * @adapter: board private structure
1467 *
581d708e
MC		 1468 * Return 0 on success, negative on failure
1469 **/
1470
1471int
1472e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1473{
1474 int i, err = 0;
1475
f56799ea 1476 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1477 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1478 if (err) {
1479 DPRINTK(PROBE, ERR,
1480 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1481 for (i-- ; i >= 0; i--)
1482 e1000_free_tx_resources(adapter,
1483 &adapter->tx_ring[i]);
581d708e
MC		 1484 break;
1485 }
1486 }
1487
1488 return err;
1489}
1490
1da177e4
LT		 1491/**
1492 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1493 * @adapter: board private structure
1494 *
1495 * Configure the Tx unit of the MAC after a reset.
1496 **/
1497
1498static void
1499e1000_configure_tx(struct e1000_adapter *adapter)
1500{
581d708e
MC		 1501 uint64_t tdba;
1502 struct e1000_hw *hw = &adapter->hw;
1503 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1504 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1505
1506 /* Setup the HW Tx Head and Tail descriptor pointers */
1507
f56799ea 1508 switch (adapter->num_tx_queues) {
24025e4e
MC		 1509 case 1:
1510 default:
581d708e
MC		 1511 tdba = adapter->tx_ring[0].dma;
1512 tdlen = adapter->tx_ring[0].count *
1513 sizeof(struct e1000_tx_desc);
581d708e 1514 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1515 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1516 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1517 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1518 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1519 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1520 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1521 break;
1522 }
1da177e4
LT		 1523
1524 /* Set the default values for the Tx Inter Packet Gap timer */
1525
0fadb059
JK		 1526 if (hw->media_type == e1000_media_type_fiber ||
1527 hw->media_type == e1000_media_type_internal_serdes)
1528 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1529 else
1530 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1531
581d708e 1532 switch (hw->mac_type) {
1da177e4
LT		 1533 case e1000_82542_rev2_0:
1534 case e1000_82542_rev2_1:
1535 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1536 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1537 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1538 break;
87041639
JK		 1539 case e1000_80003es2lan:
1540 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1541 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1542 break;
1da177e4 1543 default:
0fadb059
JK		 1544 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1545 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1546 break;
1da177e4 1547 }
0fadb059
JK		 1548 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1549 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1550 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1551
1552 /* Set the Tx Interrupt Delay register */
1553
581d708e
MC		 1554 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1555 if (hw->mac_type >= e1000_82540)
1556 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1557
1558 /* Program the Transmit Control Register */
1559
581d708e 1560 tctl = E1000_READ_REG(hw, TCTL);
1da177e4 1561 tctl &= ~E1000_TCTL_CT;
7e6c9861 1562 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1563 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1564
2ae76d98
MC		 1565 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1566 tarc = E1000_READ_REG(hw, TARC0);
90fb5135
AK		 1567 /* set the speed mode bit, we'll clear it if we're not at
1568 * gigabit link later */
09ae3e88 1569 tarc |= (1 << 21);
2ae76d98 1570 E1000_WRITE_REG(hw, TARC0, tarc);
87041639
JK		 1571 } else if (hw->mac_type == e1000_80003es2lan) {
1572 tarc = E1000_READ_REG(hw, TARC0);
1573 tarc |= 1;
87041639
JK		 1574 E1000_WRITE_REG(hw, TARC0, tarc);
1575 tarc = E1000_READ_REG(hw, TARC1);
1576 tarc |= 1;
1577 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1578 }
1579
581d708e 1580 e1000_config_collision_dist(hw);
1da177e4
LT		 1581
1582 /* Setup Transmit Descriptor Settings for eop descriptor */
1583 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1584 E1000_TXD_CMD_IFCS;
1585
581d708e 1586 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1587 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1588 else
1589 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1590
1591 /* Cache if we're 82544 running in PCI-X because we'll
1592 * need this to apply a workaround later in the send path. */
581d708e
MC		 1593 if (hw->mac_type == e1000_82544 &&
1594 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1595 adapter->pcix_82544 = 1;
7e6c9861
JK		 1596
1597 E1000_WRITE_REG(hw, TCTL, tctl);
1598
1da177e4
LT		 1599}
1600
1601/**
1602 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1603 * @adapter: board private structure
581d708e 1604 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1605 *
1606 * Returns 0 on success, negative on failure
1607 **/
1608
3ad2cc67 1609static int
581d708e
MC		 1610e1000_setup_rx_resources(struct e1000_adapter *adapter,
1611 struct e1000_rx_ring *rxdr)
1da177e4 1612{
1da177e4 1613 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1614 int size, desc_len;
1da177e4
LT		 1615
1616 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1617 rxdr->buffer_info = vmalloc(size);
581d708e 1618 if (!rxdr->buffer_info) {
2648345f
MC		 1619 DPRINTK(PROBE, ERR,
1620 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1621 return -ENOMEM;
1622 }
1623 memset(rxdr->buffer_info, 0, size);
1624
2d7edb92
MC		 1625 size = sizeof(struct e1000_ps_page) * rxdr->count;
1626 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1627 if (!rxdr->ps_page) {
2d7edb92
MC		 1628 vfree(rxdr->buffer_info);
1629 DPRINTK(PROBE, ERR,
1630 "Unable to allocate memory for the receive descriptor ring\n");
1631 return -ENOMEM;
1632 }
1633 memset(rxdr->ps_page, 0, size);
1634
1635 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1636 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1637 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1638 vfree(rxdr->buffer_info);
1639 kfree(rxdr->ps_page);
1640 DPRINTK(PROBE, ERR,
1641 "Unable to allocate memory for the receive descriptor ring\n");
1642 return -ENOMEM;
1643 }
1644 memset(rxdr->ps_page_dma, 0, size);
1645
96838a40 1646 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1647 desc_len = sizeof(struct e1000_rx_desc);
1648 else
1649 desc_len = sizeof(union e1000_rx_desc_packet_split);
1650
1da177e4
LT		 1651 /* Round up to nearest 4K */
1652
2d7edb92 1653 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1654 E1000_ROUNDUP(rxdr->size, 4096);
1655
1656 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1657
581d708e
MC		 1658 if (!rxdr->desc) {
1659 DPRINTK(PROBE, ERR,
1660 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1661setup_rx_desc_die:
1da177e4 1662 vfree(rxdr->buffer_info);
2d7edb92
MC		 1663 kfree(rxdr->ps_page);
1664 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1665 return -ENOMEM;
1666 }
1667
2648345f 1668 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1669 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1670 void *olddesc = rxdr->desc;
1671 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1672 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1673 "at %p\n", rxdr->size, rxdr->desc);
1674 /* Try again, without freeing the previous */
1da177e4 1675 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1676 /* Failed allocation, critical failure */
581d708e 1677 if (!rxdr->desc) {
1da177e4 1678 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1679 DPRINTK(PROBE, ERR,
1680 "Unable to allocate memory "
1681 "for the receive descriptor ring\n");
1da177e4
LT		 1682 goto setup_rx_desc_die;
1683 }
1684
1685 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1686 /* give up */
2648345f
MC		 1687 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1688 rxdr->dma);
1da177e4 1689 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1690 DPRINTK(PROBE, ERR,
1691 "Unable to allocate aligned memory "
1692 "for the receive descriptor ring\n");
581d708e 1693 goto setup_rx_desc_die;
1da177e4 1694 } else {
2648345f 1695 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1696 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1697 }
1698 }
1699 memset(rxdr->desc, 0, rxdr->size);
1700
1701 rxdr->next_to_clean = 0;
1702 rxdr->next_to_use = 0;
1703
1704 return 0;
1705}
1706
581d708e
MC		 1707/**
1708 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1709 * (Descriptors) for all queues
1710 * @adapter: board private structure
1711 *
581d708e
MC		 1712 * Return 0 on success, negative on failure
1713 **/
1714
1715int
1716e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1717{
1718 int i, err = 0;
1719
f56799ea 1720 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1721 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1722 if (err) {
1723 DPRINTK(PROBE, ERR,
1724 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1725 for (i-- ; i >= 0; i--)
1726 e1000_free_rx_resources(adapter,
1727 &adapter->rx_ring[i]);
581d708e
MC		 1728 break;
1729 }
1730 }
1731
1732 return err;
1733}
1734
1da177e4 1735/**
2648345f 1736 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1737 * @adapter: Board private structure
1738 **/
e4c811c9
MC		 1739#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1740 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1741static void
1742e1000_setup_rctl(struct e1000_adapter *adapter)
1743{
2d7edb92
MC		 1744 uint32_t rctl, rfctl;
1745 uint32_t psrctl = 0;
35ec56bb 1746#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1747 uint32_t pages = 0;
1748#endif
1da177e4
LT		 1749
1750 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1751
1752 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1753
1754 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1755 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1756 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1757
0fadb059 1758 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1759 rctl |= E1000_RCTL_SBP;
1760 else
1761 rctl &= ~E1000_RCTL_SBP;
1762
2d7edb92
MC		 1763 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1764 rctl &= ~E1000_RCTL_LPE;
1765 else
1766 rctl |= E1000_RCTL_LPE;
1767
1da177e4 1768 /* Setup buffer sizes */
9e2feace
AK		 1769 rctl &= ~E1000_RCTL_SZ_4096;
1770 rctl |= E1000_RCTL_BSEX;
1771 switch (adapter->rx_buffer_len) {
1772 case E1000_RXBUFFER_256:
1773 rctl |= E1000_RCTL_SZ_256;
1774 rctl &= ~E1000_RCTL_BSEX;
1775 break;
1776 case E1000_RXBUFFER_512:
1777 rctl |= E1000_RCTL_SZ_512;
1778 rctl &= ~E1000_RCTL_BSEX;
1779 break;
1780 case E1000_RXBUFFER_1024:
1781 rctl |= E1000_RCTL_SZ_1024;
1782 rctl &= ~E1000_RCTL_BSEX;
1783 break;
a1415ee6
JK		 1784 case E1000_RXBUFFER_2048:
1785 default:
1786 rctl |= E1000_RCTL_SZ_2048;
1787 rctl &= ~E1000_RCTL_BSEX;
1788 break;
1789 case E1000_RXBUFFER_4096:
1790 rctl |= E1000_RCTL_SZ_4096;
1791 break;
1792 case E1000_RXBUFFER_8192:
1793 rctl |= E1000_RCTL_SZ_8192;
1794 break;
1795 case E1000_RXBUFFER_16384:
1796 rctl |= E1000_RCTL_SZ_16384;
1797 break;
2d7edb92
MC		 1798 }
1799
35ec56bb 1800#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1801 /* 82571 and greater support packet-split where the protocol
1802 * header is placed in skb->data and the packet data is
1803 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1804 * In the case of a non-split, skb->data is linearly filled,
1805 * followed by the page buffers. Therefore, skb->data is
1806 * sized to hold the largest protocol header.
1807 */
e64d7d02
JB		 1808 /* allocations using alloc_page take too long for regular MTU
1809 * so only enable packet split for jumbo frames */
e4c811c9 1810 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
e64d7d02
JB		 1811 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1812 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
e4c811c9
MC		 1813 adapter->rx_ps_pages = pages;
1814 else
1815 adapter->rx_ps_pages = 0;
2d7edb92 1816#endif
e4c811c9 1817 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1818 /* Configure extra packet-split registers */
1819 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1820 rfctl |= E1000_RFCTL_EXTEN;
87ca4e5b
AK		 1821 /* disable packet split support for IPv6 extension headers,
1822 * because some malformed IPv6 headers can hang the RX */
1823 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1824 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1825
2d7edb92
MC		 1826 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1827
7dfee0cb 1828 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1829
2d7edb92
MC		 1830 psrctl |= adapter->rx_ps_bsize0 >>
1831 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1832
1833 switch (adapter->rx_ps_pages) {
1834 case 3:
1835 psrctl |= PAGE_SIZE <<
1836 E1000_PSRCTL_BSIZE3_SHIFT;
1837 case 2:
1838 psrctl |= PAGE_SIZE <<
1839 E1000_PSRCTL_BSIZE2_SHIFT;
1840 case 1:
1841 psrctl |= PAGE_SIZE >>
1842 E1000_PSRCTL_BSIZE1_SHIFT;
1843 break;
1844 }
2d7edb92
MC		 1845
1846 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1847 }
1848
1849 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1850}
1851
1852/**
1853 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1854 * @adapter: board private structure
1855 *
1856 * Configure the Rx unit of the MAC after a reset.
1857 **/
1858
1859static void
1860e1000_configure_rx(struct e1000_adapter *adapter)
1861{
581d708e
MC		 1862 uint64_t rdba;
1863 struct e1000_hw *hw = &adapter->hw;
1864 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1865
e4c811c9 1866 if (adapter->rx_ps_pages) {
0f15a8fa 1867 /* this is a 32 byte descriptor */
581d708e 1868 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1869 sizeof(union e1000_rx_desc_packet_split);
1870 adapter->clean_rx = e1000_clean_rx_irq_ps;
1871 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1872 } else {
581d708e
MC		 1873 rdlen = adapter->rx_ring[0].count *
1874 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1875 adapter->clean_rx = e1000_clean_rx_irq;
1876 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1877 }
1da177e4
LT		 1878
1879 /* disable receives while setting up the descriptors */
581d708e
MC		 1880 rctl = E1000_READ_REG(hw, RCTL);
1881 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1882
1883 /* set the Receive Delay Timer Register */
581d708e 1884 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1885
581d708e
MC		 1886 if (hw->mac_type >= e1000_82540) {
1887 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1888 if (adapter->itr > 1)
581d708e 1889 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1890 1000000000 / (adapter->itr * 256));
1891 }
1892
2ae76d98 1893 if (hw->mac_type >= e1000_82571) {
2ae76d98 1894 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1895 /* Reset delay timers after every interrupt */
6fc7a7ec 1896 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1897#ifdef CONFIG_E1000_NAPI
1898 /* Auto-Mask interrupts upon ICR read. */
1899 ctrl_ext |= E1000_CTRL_EXT_IAME;
1900#endif
2ae76d98 1901 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1902 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1903 E1000_WRITE_FLUSH(hw);
1904 }
1905
581d708e
MC		 1906 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1907 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1908 switch (adapter->num_rx_queues) {
24025e4e
MC		 1909 case 1:
1910 default:
581d708e 1911 rdba = adapter->rx_ring[0].dma;
581d708e 1912 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1913 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1914 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1915 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1916 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 1917 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1918 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1919 break;
24025e4e
MC		 1920 }
1921
1da177e4 1922 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1923 if (hw->mac_type >= e1000_82543) {
1924 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1925 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1926 rxcsum |= E1000_RXCSUM_TUOFL;
1927
868d5309 1928 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1929 * Must be used in conjunction with packet-split. */
96838a40
JB		 1930 if ((hw->mac_type >= e1000_82571) &&
1931 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1932 rxcsum |= E1000_RXCSUM_IPPCSE;
1933 }
1934 } else {
1935 rxcsum &= ~E1000_RXCSUM_TUOFL;
1936 /* don't need to clear IPPCSE as it defaults to 0 */
1937 }
581d708e 1938 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1939 }
1940
21c4d5e0
AK		 1941 /* enable early receives on 82573, only takes effect if using > 2048
1942 * byte total frame size. for example only for jumbo frames */
1943#define E1000_ERT_2048 0x100
1944 if (hw->mac_type == e1000_82573)
1945 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
1946
1da177e4 1947 /* Enable Receives */
581d708e 1948 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1949}
1950
1951/**
581d708e 1952 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1953 * @adapter: board private structure
581d708e 1954 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1955 *
1956 * Free all transmit software resources
1957 **/
1958
3ad2cc67 1959static void
581d708e
MC		 1960e1000_free_tx_resources(struct e1000_adapter *adapter,
1961 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1962{
1963 struct pci_dev *pdev = adapter->pdev;
1964
581d708e 1965 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1966
581d708e
MC		 1967 vfree(tx_ring->buffer_info);
1968 tx_ring->buffer_info = NULL;
1da177e4 1969
581d708e 1970 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1971
581d708e
MC		 1972 tx_ring->desc = NULL;
1973}
1974
1975/**
1976 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1977 * @adapter: board private structure
1978 *
1979 * Free all transmit software resources
1980 **/
1981
1982void
1983e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1984{
1985 int i;
1986
f56799ea 1987 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1988 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1989}
1990
e619d523 1991static void
1da177e4
LT		 1992e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1993 struct e1000_buffer *buffer_info)
1994{
96838a40 1995 if (buffer_info->dma) {
2648345f
MC		 1996 pci_unmap_page(adapter->pdev,
1997 buffer_info->dma,
1998 buffer_info->length,
1999 PCI_DMA_TODEVICE);
a9ebadd6 2000 buffer_info->dma = 0;
1da177e4 2001 }
a9ebadd6 2002 if (buffer_info->skb) {
1da177e4 2003 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2004 buffer_info->skb = NULL;
2005 }
2006 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2007}
2008
2009/**
2010 * e1000_clean_tx_ring - Free Tx Buffers
2011 * @adapter: board private structure
581d708e 2012 * @tx_ring: ring to be cleaned
1da177e4
LT		 2013 **/
2014
2015static void
581d708e
MC		 2016e1000_clean_tx_ring(struct e1000_adapter *adapter,
2017 struct e1000_tx_ring *tx_ring)
1da177e4 2018{
1da177e4
LT		 2019 struct e1000_buffer *buffer_info;
2020 unsigned long size;
2021 unsigned int i;
2022
2023 /* Free all the Tx ring sk_buffs */
2024
96838a40 2025 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2026 buffer_info = &tx_ring->buffer_info[i];
2027 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2028 }
2029
2030 size = sizeof(struct e1000_buffer) * tx_ring->count;
2031 memset(tx_ring->buffer_info, 0, size);
2032
2033 /* Zero out the descriptor ring */
2034
2035 memset(tx_ring->desc, 0, tx_ring->size);
2036
2037 tx_ring->next_to_use = 0;
2038 tx_ring->next_to_clean = 0;
fd803241 2039 tx_ring->last_tx_tso = 0;
1da177e4 2040
581d708e
MC		 2041 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2042 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2043}
2044
2045/**
2046 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2047 * @adapter: board private structure
2048 **/
2049
2050static void
2051e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2052{
2053 int i;
2054
f56799ea 2055 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2056 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2057}
2058
2059/**
2060 * e1000_free_rx_resources - Free Rx Resources
2061 * @adapter: board private structure
581d708e 2062 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2063 *
2064 * Free all receive software resources
2065 **/
2066
3ad2cc67 2067static void
581d708e
MC		 2068e1000_free_rx_resources(struct e1000_adapter *adapter,
2069 struct e1000_rx_ring *rx_ring)
1da177e4 2070{
1da177e4
LT		 2071 struct pci_dev *pdev = adapter->pdev;
2072
581d708e 2073 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2074
2075 vfree(rx_ring->buffer_info);
2076 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2077 kfree(rx_ring->ps_page);
2078 rx_ring->ps_page = NULL;
2079 kfree(rx_ring->ps_page_dma);
2080 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2081
2082 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2083
2084 rx_ring->desc = NULL;
2085}
2086
2087/**
581d708e 2088 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2089 * @adapter: board private structure
581d708e
MC		 2090 *
2091 * Free all receive software resources
2092 **/
2093
2094void
2095e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2096{
2097 int i;
2098
f56799ea 2099 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2100 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2101}
2102
2103/**
2104 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2105 * @adapter: board private structure
2106 * @rx_ring: ring to free buffers from
1da177e4
LT		 2107 **/
2108
2109static void
581d708e
MC		 2110e1000_clean_rx_ring(struct e1000_adapter *adapter,
2111 struct e1000_rx_ring *rx_ring)
1da177e4 2112{
1da177e4 2113 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2114 struct e1000_ps_page *ps_page;
2115 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2116 struct pci_dev *pdev = adapter->pdev;
2117 unsigned long size;
2d7edb92 2118 unsigned int i, j;
1da177e4
LT		 2119
2120 /* Free all the Rx ring sk_buffs */
96838a40 2121 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2122 buffer_info = &rx_ring->buffer_info[i];
96838a40 2123 if (buffer_info->skb) {
1da177e4
LT		 2124 pci_unmap_single(pdev,
2125 buffer_info->dma,
2126 buffer_info->length,
2127 PCI_DMA_FROMDEVICE);
2128
2129 dev_kfree_skb(buffer_info->skb);
2130 buffer_info->skb = NULL;
997f5cbd
JK		 2131 }
2132 ps_page = &rx_ring->ps_page[i];
2133 ps_page_dma = &rx_ring->ps_page_dma[i];
2134 for (j = 0; j < adapter->rx_ps_pages; j++) {
2135 if (!ps_page->ps_page[j]) break;
2136 pci_unmap_page(pdev,
2137 ps_page_dma->ps_page_dma[j],
2138 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2139 ps_page_dma->ps_page_dma[j] = 0;
2140 put_page(ps_page->ps_page[j]);
2141 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2142 }
2143 }
2144
2145 size = sizeof(struct e1000_buffer) * rx_ring->count;
2146 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2147 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2148 memset(rx_ring->ps_page, 0, size);
2149 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2150 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2151
2152 /* Zero out the descriptor ring */
2153
2154 memset(rx_ring->desc, 0, rx_ring->size);
2155
2156 rx_ring->next_to_clean = 0;
2157 rx_ring->next_to_use = 0;
2158
581d708e
MC		 2159 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2160 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2161}
2162
2163/**
2164 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2165 * @adapter: board private structure
2166 **/
2167
2168static void
2169e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2170{
2171 int i;
2172
f56799ea 2173 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2174 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2175}
2176
2177/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2178 * and memory write and invalidate disabled for certain operations
2179 */
2180static void
2181e1000_enter_82542_rst(struct e1000_adapter *adapter)
2182{
2183 struct net_device *netdev = adapter->netdev;
2184 uint32_t rctl;
2185
2186 e1000_pci_clear_mwi(&adapter->hw);
2187
2188 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2189 rctl |= E1000_RCTL_RST;
2190 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2191 E1000_WRITE_FLUSH(&adapter->hw);
2192 mdelay(5);
2193
96838a40 2194 if (netif_running(netdev))
581d708e 2195 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2196}
2197
2198static void
2199e1000_leave_82542_rst(struct e1000_adapter *adapter)
2200{
2201 struct net_device *netdev = adapter->netdev;
2202 uint32_t rctl;
2203
2204 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2205 rctl &= ~E1000_RCTL_RST;
2206 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2207 E1000_WRITE_FLUSH(&adapter->hw);
2208 mdelay(5);
2209
96838a40 2210 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2211 e1000_pci_set_mwi(&adapter->hw);
2212
96838a40 2213 if (netif_running(netdev)) {
72d64a43
JK		 2214 /* No need to loop, because 82542 supports only 1 queue */
2215 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2216 e1000_configure_rx(adapter);
72d64a43 2217 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2218 }
2219}
2220
2221/**
2222 * e1000_set_mac - Change the Ethernet Address of the NIC
2223 * @netdev: network interface device structure
2224 * @p: pointer to an address structure
2225 *
2226 * Returns 0 on success, negative on failure
2227 **/
2228
2229static int
2230e1000_set_mac(struct net_device *netdev, void *p)
2231{
60490fe0 2232 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2233 struct sockaddr *addr = p;
2234
96838a40 2235 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2236 return -EADDRNOTAVAIL;
2237
2238 /* 82542 2.0 needs to be in reset to write receive address registers */
2239
96838a40 2240 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2241 e1000_enter_82542_rst(adapter);
2242
2243 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2244 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2245
2246 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2247
868d5309
MC		 2248 /* With 82571 controllers, LAA may be overwritten (with the default)
2249 * due to controller reset from the other port. */
2250 if (adapter->hw.mac_type == e1000_82571) {
2251 /* activate the work around */
2252 adapter->hw.laa_is_present = 1;
2253
96838a40
JB		 2254 /* Hold a copy of the LAA in RAR[14] This is done so that
2255 * between the time RAR[0] gets clobbered and the time it
2256 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2257 * of the RARs and no incoming packets directed to this port
96838a40 2258 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2259 * RAR[14] */
96838a40 2260 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2261 E1000_RAR_ENTRIES - 1);
2262 }
2263
96838a40 2264 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2265 e1000_leave_82542_rst(adapter);
2266
2267 return 0;
2268}
2269
2270/**
2271 * e1000_set_multi - Multicast and Promiscuous mode set
2272 * @netdev: network interface device structure
2273 *
2274 * The set_multi entry point is called whenever the multicast address
2275 * list or the network interface flags are updated. This routine is
2276 * responsible for configuring the hardware for proper multicast,
2277 * promiscuous mode, and all-multi behavior.
2278 **/
2279
2280static void
2281e1000_set_multi(struct net_device *netdev)
2282{
60490fe0 2283 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2284 struct e1000_hw *hw = &adapter->hw;
2285 struct dev_mc_list *mc_ptr;
2286 uint32_t rctl;
2287 uint32_t hash_value;
868d5309 2288 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2289 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2290 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2291 E1000_NUM_MTA_REGISTERS;
2292
2293 if (adapter->hw.mac_type == e1000_ich8lan)
2294 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2295
868d5309
MC		 2296 /* reserve RAR[14] for LAA over-write work-around */
2297 if (adapter->hw.mac_type == e1000_82571)
2298 rar_entries--;
1da177e4 2299
2648345f
MC		 2300 /* Check for Promiscuous and All Multicast modes */
2301
1da177e4
LT		 2302 rctl = E1000_READ_REG(hw, RCTL);
2303
96838a40 2304 if (netdev->flags & IFF_PROMISC) {
1da177e4 2305 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2306 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2307 rctl |= E1000_RCTL_MPE;
2308 rctl &= ~E1000_RCTL_UPE;
2309 } else {
2310 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2311 }
2312
2313 E1000_WRITE_REG(hw, RCTL, rctl);
2314
2315 /* 82542 2.0 needs to be in reset to write receive address registers */
2316
96838a40 2317 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2318 e1000_enter_82542_rst(adapter);
2319
2320 /* load the first 14 multicast address into the exact filters 1-14
2321 * RAR 0 is used for the station MAC adddress
2322 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2323 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2324 */
2325 mc_ptr = netdev->mc_list;
2326
96838a40 2327 for (i = 1; i < rar_entries; i++) {
868d5309 2328 if (mc_ptr) {
1da177e4
LT		 2329 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2330 mc_ptr = mc_ptr->next;
2331 } else {
2332 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2333 E1000_WRITE_FLUSH(hw);
1da177e4 2334 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2335 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2336 }
2337 }
2338
2339 /* clear the old settings from the multicast hash table */
2340
cd94dd0b 2341 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2342 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2343 E1000_WRITE_FLUSH(hw);
2344 }
1da177e4
LT		 2345
2346 /* load any remaining addresses into the hash table */
2347
96838a40 2348 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2349 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2350 e1000_mta_set(hw, hash_value);
2351 }
2352
96838a40 2353 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2354 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2355}
2356
2357/* Need to wait a few seconds after link up to get diagnostic information from
2358 * the phy */
2359
2360static void
2361e1000_update_phy_info(unsigned long data)
2362{
2363 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2364 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2365}
2366
2367/**
2368 * e1000_82547_tx_fifo_stall - Timer Call-back
2369 * @data: pointer to adapter cast into an unsigned long
2370 **/
2371
2372static void
2373e1000_82547_tx_fifo_stall(unsigned long data)
2374{
2375 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2376 struct net_device *netdev = adapter->netdev;
2377 uint32_t tctl;
2378
96838a40
JB		 2379 if (atomic_read(&adapter->tx_fifo_stall)) {
2380 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2381 E1000_READ_REG(&adapter->hw, TDH)) &&
2382 (E1000_READ_REG(&adapter->hw, TDFT) ==
2383 E1000_READ_REG(&adapter->hw, TDFH)) &&
2384 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2385 E1000_READ_REG(&adapter->hw, TDFHS))) {
2386 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2387 E1000_WRITE_REG(&adapter->hw, TCTL,
2388 tctl & ~E1000_TCTL_EN);
2389 E1000_WRITE_REG(&adapter->hw, TDFT,
2390 adapter->tx_head_addr);
2391 E1000_WRITE_REG(&adapter->hw, TDFH,
2392 adapter->tx_head_addr);
2393 E1000_WRITE_REG(&adapter->hw, TDFTS,
2394 adapter->tx_head_addr);
2395 E1000_WRITE_REG(&adapter->hw, TDFHS,
2396 adapter->tx_head_addr);
2397 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2398 E1000_WRITE_FLUSH(&adapter->hw);
2399
2400 adapter->tx_fifo_head = 0;
2401 atomic_set(&adapter->tx_fifo_stall, 0);
2402 netif_wake_queue(netdev);
2403 } else {
2404 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2405 }
2406 }
2407}
2408
2409/**
2410 * e1000_watchdog - Timer Call-back
2411 * @data: pointer to adapter cast into an unsigned long
2412 **/
2413static void
2414e1000_watchdog(unsigned long data)
2415{
2416 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2417 struct net_device *netdev = adapter->netdev;
545c67c0 2418 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2419 uint32_t link, tctl;
cd94dd0b
AK		 2420 int32_t ret_val;
2421
2422 ret_val = e1000_check_for_link(&adapter->hw);
2423 if ((ret_val == E1000_ERR_PHY) &&
2424 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2425 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2426 /* See e1000_kumeran_lock_loss_workaround() */
2427 DPRINTK(LINK, INFO,
2428 "Gigabit has been disabled, downgrading speed\n");
2429 }
90fb5135 2430
2d7edb92
MC		 2431 if (adapter->hw.mac_type == e1000_82573) {
2432 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2433 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2434 e1000_update_mng_vlan(adapter);
96838a40 2435 }
1da177e4 2436
96838a40 2437 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2438 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2439 link = !adapter->hw.serdes_link_down;
2440 else
2441 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2442
96838a40
JB		 2443 if (link) {
2444 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2445 boolean_t txb2b = 1;
1da177e4
LT		 2446 e1000_get_speed_and_duplex(&adapter->hw,
2447 &adapter->link_speed,
2448 &adapter->link_duplex);
2449
2450 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2451 adapter->link_speed,
2452 adapter->link_duplex == FULL_DUPLEX ?
2453 "Full Duplex" : "Half Duplex");
2454
7e6c9861
JK		 2455 /* tweak tx_queue_len according to speed/duplex
2456 * and adjust the timeout factor */
66a2b0a3
JK		 2457 netdev->tx_queue_len = adapter->tx_queue_len;
2458 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2459 switch (adapter->link_speed) {
2460 case SPEED_10:
fe7fe28e 2461 txb2b = 0;
7e6c9861
JK		 2462 netdev->tx_queue_len = 10;
2463 adapter->tx_timeout_factor = 8;
2464 break;
2465 case SPEED_100:
fe7fe28e 2466 txb2b = 0;
7e6c9861
JK		 2467 netdev->tx_queue_len = 100;
2468 /* maybe add some timeout factor ? */
2469 break;
2470 }
2471
fe7fe28e 2472 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2473 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2474 txb2b == 0) {
7e6c9861
JK		 2475 uint32_t tarc0;
2476 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
90fb5135 2477 tarc0 &= ~(1 << 21);
7e6c9861
JK		 2478 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2479 }
90fb5135 2480
7e6c9861
JK		 2481#ifdef NETIF_F_TSO
2482 /* disable TSO for pcie and 10/100 speeds, to avoid
2483 * some hardware issues */
2484 if (!adapter->tso_force &&
2485 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2486 switch (adapter->link_speed) {
2487 case SPEED_10:
66a2b0a3 2488 case SPEED_100:
7e6c9861
JK		 2489 DPRINTK(PROBE,INFO,
2490 "10/100 speed: disabling TSO\n");
2491 netdev->features &= ~NETIF_F_TSO;
87ca4e5b
AK		 2492#ifdef NETIF_F_TSO6
2493 netdev->features &= ~NETIF_F_TSO6;
2494#endif
7e6c9861
JK		 2495 break;
2496 case SPEED_1000:
2497 netdev->features |= NETIF_F_TSO;
87ca4e5b
AK		 2498#ifdef NETIF_F_TSO6
2499 netdev->features |= NETIF_F_TSO6;
2500#endif
7e6c9861
JK		 2501 break;
2502 default:
2503 /* oops */
66a2b0a3
JK		 2504 break;
2505 }
2506 }
7e6c9861
JK		 2507#endif
2508
2509 /* enable transmits in the hardware, need to do this
2510 * after setting TARC0 */
2511 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2512 tctl |= E1000_TCTL_EN;
2513 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2514
1da177e4
LT		 2515 netif_carrier_on(netdev);
2516 netif_wake_queue(netdev);
2517 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2518 adapter->smartspeed = 0;
2519 }
2520 } else {
96838a40 2521 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2522 adapter->link_speed = 0;
2523 adapter->link_duplex = 0;
2524 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2525 netif_carrier_off(netdev);
2526 netif_stop_queue(netdev);
2527 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2528
2529 /* 80003ES2LAN workaround--
2530 * For packet buffer work-around on link down event;
2531 * disable receives in the ISR and
2532 * reset device here in the watchdog
2533 */
8fc897b0 2534 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2535 /* reset device */
2536 schedule_work(&adapter->reset_task);
1da177e4
LT		 2537 }
2538
2539 e1000_smartspeed(adapter);
2540 }
2541
2542 e1000_update_stats(adapter);
2543
2544 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2545 adapter->tpt_old = adapter->stats.tpt;
2546 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2547 adapter->colc_old = adapter->stats.colc;
2548
2549 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2550 adapter->gorcl_old = adapter->stats.gorcl;
2551 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2552 adapter->gotcl_old = adapter->stats.gotcl;
2553
2554 e1000_update_adaptive(&adapter->hw);
2555
f56799ea 2556 if (!netif_carrier_ok(netdev)) {
581d708e 2557 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2558 /* We've lost link, so the controller stops DMA,
2559 * but we've got queued Tx work that's never going
2560 * to get done, so reset controller to flush Tx.
2561 * (Do the reset outside of interrupt context). */
87041639
JK		 2562 adapter->tx_timeout_count++;
2563 schedule_work(&adapter->reset_task);
1da177e4
LT		 2564 }
2565 }
2566
2567 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2568 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2569 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2570 * asymmetrical Tx or Rx gets ITR=8000; everyone
2571 * else is between 2000-8000. */
2572 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2573 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2574 adapter->gotcl - adapter->gorcl :
2575 adapter->gorcl - adapter->gotcl) / 10000;
2576 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2577 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2578 }
2579
2580 /* Cause software interrupt to ensure rx ring is cleaned */
2581 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2582
2648345f 2583 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2584 adapter->detect_tx_hung = TRUE;
2585
96838a40 2586 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2587 * reset from the other port. Set the appropriate LAA in RAR[0] */
2588 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2589 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2590
1da177e4
LT		 2591 /* Reset the timer */
2592 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2593}
2594
2595#define E1000_TX_FLAGS_CSUM 0x00000001
2596#define E1000_TX_FLAGS_VLAN 0x00000002
2597#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2598#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2599#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2600#define E1000_TX_FLAGS_VLAN_SHIFT 16
2601
e619d523 2602static int
581d708e
MC		 2603e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2604 struct sk_buff *skb)
1da177e4
LT		 2605{
2606#ifdef NETIF_F_TSO
2607 struct e1000_context_desc *context_desc;
545c67c0 2608 struct e1000_buffer *buffer_info;
1da177e4
LT		 2609 unsigned int i;
2610 uint32_t cmd_length = 0;
2d7edb92 2611 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2612 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2613 int err;
2614
89114afd 2615 if (skb_is_gso(skb)) {
1da177e4
LT		 2616 if (skb_header_cloned(skb)) {
2617 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2618 if (err)
2619 return err;
2620 }
2621
2622 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2623 mss = skb_shinfo(skb)->gso_size;
60828236 2624 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2625 skb->nh.iph->tot_len = 0;
2626 skb->nh.iph->check = 0;
2627 skb->h.th->check =
2628 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2629 skb->nh.iph->daddr,
2630 0,
2631 IPPROTO_TCP,
2632 0);
2633 cmd_length = E1000_TXD_CMD_IP;
2634 ipcse = skb->h.raw - skb->data - 1;
87ca4e5b 2635#ifdef NETIF_F_TSO6
e15fdd03 2636 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2637 skb->nh.ipv6h->payload_len = 0;
2638 skb->h.th->check =
2639 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2640 &skb->nh.ipv6h->daddr,
2641 0,
2642 IPPROTO_TCP,
2643 0);
2644 ipcse = 0;
2645#endif
2646 }
1da177e4
LT		 2647 ipcss = skb->nh.raw - skb->data;
2648 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2649 tucss = skb->h.raw - skb->data;
2650 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2651 tucse = 0;
2652
2653 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2654 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2655
581d708e
MC		 2656 i = tx_ring->next_to_use;
2657 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2658 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2659
2660 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2661 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2662 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2663 context_desc->upper_setup.tcp_fields.tucss = tucss;
2664 context_desc->upper_setup.tcp_fields.tucso = tucso;
2665 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2666 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2667 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2668 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2669
545c67c0 2670 buffer_info->time_stamp = jiffies;
a9ebadd6 2671 buffer_info->next_to_watch = i;
545c67c0 2672
581d708e
MC		 2673 if (++i == tx_ring->count) i = 0;
2674 tx_ring->next_to_use = i;
1da177e4 2675
8241e35e 2676 return TRUE;
1da177e4
LT		 2677 }
2678#endif
2679
8241e35e 2680 return FALSE;
1da177e4
LT		 2681}
2682
e619d523 2683static boolean_t
581d708e
MC		 2684e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2685 struct sk_buff *skb)
1da177e4
LT		 2686{
2687 struct e1000_context_desc *context_desc;
545c67c0 2688 struct e1000_buffer *buffer_info;
1da177e4
LT		 2689 unsigned int i;
2690 uint8_t css;
2691
84fa7933 2692 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1da177e4
LT		 2693 css = skb->h.raw - skb->data;
2694
581d708e 2695 i = tx_ring->next_to_use;
545c67c0 2696 buffer_info = &tx_ring->buffer_info[i];
581d708e 2697 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2698
2699 context_desc->upper_setup.tcp_fields.tucss = css;
2700 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2701 context_desc->upper_setup.tcp_fields.tucse = 0;
2702 context_desc->tcp_seg_setup.data = 0;
2703 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2704
545c67c0 2705 buffer_info->time_stamp = jiffies;
a9ebadd6 2706 buffer_info->next_to_watch = i;
545c67c0 2707
581d708e
MC		 2708 if (unlikely(++i == tx_ring->count)) i = 0;
2709 tx_ring->next_to_use = i;
1da177e4
LT		 2710
2711 return TRUE;
2712 }
2713
2714 return FALSE;
2715}
2716
2717#define E1000_MAX_TXD_PWR 12
2718#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2719
e619d523 2720static int
581d708e
MC		 2721e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2722 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2723 unsigned int nr_frags, unsigned int mss)
1da177e4 2724{
1da177e4
LT		 2725 struct e1000_buffer *buffer_info;
2726 unsigned int len = skb->len;
2727 unsigned int offset = 0, size, count = 0, i;
2728 unsigned int f;
2729 len -= skb->data_len;
2730
2731 i = tx_ring->next_to_use;
2732
96838a40 2733 while (len) {
1da177e4
LT		 2734 buffer_info = &tx_ring->buffer_info[i];
2735 size = min(len, max_per_txd);
2736#ifdef NETIF_F_TSO
fd803241
JK		 2737 /* Workaround for Controller erratum --
2738 * descriptor for non-tso packet in a linear SKB that follows a
2739 * tso gets written back prematurely before the data is fully
0f15a8fa 2740 * DMA'd to the controller */
fd803241 2741 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2742 !skb_is_gso(skb)) {
fd803241
JK		 2743 tx_ring->last_tx_tso = 0;
2744 size -= 4;
2745 }
2746
1da177e4
LT		 2747 /* Workaround for premature desc write-backs
2748 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2749 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2750 size -= 4;
2751#endif
97338bde
MC		 2752 /* work-around for errata 10 and it applies
2753 * to all controllers in PCI-X mode
2754 * The fix is to make sure that the first descriptor of a
2755 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2756 */
96838a40 2757 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2758 (size > 2015) && count == 0))
2759 size = 2015;
96838a40 2760
1da177e4
LT		 2761 /* Workaround for potential 82544 hang in PCI-X. Avoid
2762 * terminating buffers within evenly-aligned dwords. */
96838a40 2763 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2764 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2765 size > 4))
2766 size -= 4;
2767
2768 buffer_info->length = size;
2769 buffer_info->dma =
2770 pci_map_single(adapter->pdev,
2771 skb->data + offset,
2772 size,
2773 PCI_DMA_TODEVICE);
2774 buffer_info->time_stamp = jiffies;
a9ebadd6 2775 buffer_info->next_to_watch = i;
1da177e4
LT		 2776
2777 len -= size;
2778 offset += size;
2779 count++;
96838a40 2780 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2781 }
2782
96838a40 2783 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2784 struct skb_frag_struct *frag;
2785
2786 frag = &skb_shinfo(skb)->frags[f];
2787 len = frag->size;
2788 offset = frag->page_offset;
2789
96838a40 2790 while (len) {
1da177e4
LT		 2791 buffer_info = &tx_ring->buffer_info[i];
2792 size = min(len, max_per_txd);
2793#ifdef NETIF_F_TSO
2794 /* Workaround for premature desc write-backs
2795 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2796 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2797 size -= 4;
2798#endif
2799 /* Workaround for potential 82544 hang in PCI-X.
2800 * Avoid terminating buffers within evenly-aligned
2801 * dwords. */
96838a40 2802 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2803 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2804 size > 4))
2805 size -= 4;
2806
2807 buffer_info->length = size;
2808 buffer_info->dma =
2809 pci_map_page(adapter->pdev,
2810 frag->page,
2811 offset,
2812 size,
2813 PCI_DMA_TODEVICE);
2814 buffer_info->time_stamp = jiffies;
a9ebadd6 2815 buffer_info->next_to_watch = i;
1da177e4
LT		 2816
2817 len -= size;
2818 offset += size;
2819 count++;
96838a40 2820 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2821 }
2822 }
2823
2824 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2825 tx_ring->buffer_info[i].skb = skb;
2826 tx_ring->buffer_info[first].next_to_watch = i;
2827
2828 return count;
2829}
2830
e619d523 2831static void
581d708e
MC		 2832e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2833 int tx_flags, int count)
1da177e4 2834{
1da177e4
LT		 2835 struct e1000_tx_desc *tx_desc = NULL;
2836 struct e1000_buffer *buffer_info;
2837 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2838 unsigned int i;
2839
96838a40 2840 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2841 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2842 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2843 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2844
96838a40 2845 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2846 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2847 }
2848
96838a40 2849 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2850 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2851 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2852 }
2853
96838a40 2854 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2855 txd_lower |= E1000_TXD_CMD_VLE;
2856 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2857 }
2858
2859 i = tx_ring->next_to_use;
2860
96838a40 2861 while (count--) {
1da177e4
LT		 2862 buffer_info = &tx_ring->buffer_info[i];
2863 tx_desc = E1000_TX_DESC(*tx_ring, i);
2864 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2865 tx_desc->lower.data =
2866 cpu_to_le32(txd_lower | buffer_info->length);
2867 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2868 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2869 }
2870
2871 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2872
2873 /* Force memory writes to complete before letting h/w
2874 * know there are new descriptors to fetch. (Only
2875 * applicable for weak-ordered memory model archs,
2876 * such as IA-64). */
2877 wmb();
2878
2879 tx_ring->next_to_use = i;
581d708e 2880 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2ce9047f
JB		 2881 /* we need this if more than one processor can write to our tail
2882 * at a time, it syncronizes IO on IA64/Altix systems */
2883 mmiowb();
1da177e4
LT		 2884}
2885
2886/**
2887 * 82547 workaround to avoid controller hang in half-duplex environment.
2888 * The workaround is to avoid queuing a large packet that would span
2889 * the internal Tx FIFO ring boundary by notifying the stack to resend
2890 * the packet at a later time. This gives the Tx FIFO an opportunity to
2891 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2892 * to the beginning of the Tx FIFO.
2893 **/
2894
2895#define E1000_FIFO_HDR 0x10
2896#define E1000_82547_PAD_LEN 0x3E0
2897
e619d523 2898static int
1da177e4
LT		 2899e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2900{
2901 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2902 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2903
2904 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2905
96838a40 2906 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2907 goto no_fifo_stall_required;
2908
96838a40 2909 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2910 return 1;
2911
96838a40 2912 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2913 atomic_set(&adapter->tx_fifo_stall, 1);
2914 return 1;
2915 }
2916
2917no_fifo_stall_required:
2918 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2919 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2920 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2921 return 0;
2922}
2923
2d7edb92 2924#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2925static int
2d7edb92
MC		 2926e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2927{
2928 struct e1000_hw *hw = &adapter->hw;
2929 uint16_t length, offset;
96838a40
JB		 2930 if (vlan_tx_tag_present(skb)) {
2931 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2932 ( adapter->hw.mng_cookie.status &
2933 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2934 return 0;
2935 }
20a44028 2936 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2937 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2938 if ((htons(ETH_P_IP) == eth->h_proto)) {
2939 const struct iphdr *ip =
2d7edb92 2940 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2941 if (IPPROTO_UDP == ip->protocol) {
2942 struct udphdr *udp =
2943 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2944 (ip->ihl << 2));
96838a40 2945 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2946 offset = (uint8_t *)udp + 8 - skb->data;
2947 length = skb->len - offset;
2948
2949 return e1000_mng_write_dhcp_info(hw,
96838a40 2950 (uint8_t *)udp + 8,
2d7edb92
MC		 2951 length);
2952 }
2953 }
2954 }
2955 }
2956 return 0;
2957}
2958
65c7973f
JB		 2959static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2960{
2961 struct e1000_adapter *adapter = netdev_priv(netdev);
2962 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2963
2964 netif_stop_queue(netdev);
2965 /* Herbert's original patch had:
2966 * smp_mb__after_netif_stop_queue();
2967 * but since that doesn't exist yet, just open code it. */
2968 smp_mb();
2969
2970 /* We need to check again in a case another CPU has just
2971 * made room available. */
2972 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2973 return -EBUSY;
2974
2975 /* A reprieve! */
2976 netif_start_queue(netdev);
2977 return 0;
2978}
2979
2980static int e1000_maybe_stop_tx(struct net_device *netdev,
2981 struct e1000_tx_ring *tx_ring, int size)
2982{
2983 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2984 return 0;
2985 return __e1000_maybe_stop_tx(netdev, size);
2986}
2987
1da177e4
LT		 2988#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2989static int
2990e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2991{
60490fe0 2992 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2993 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2994 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2995 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2996 unsigned int tx_flags = 0;
2997 unsigned int len = skb->len;
2998 unsigned long flags;
2999 unsigned int nr_frags = 0;
3000 unsigned int mss = 0;
3001 int count = 0;
76c224bc 3002 int tso;
1da177e4
LT		 3003 unsigned int f;
3004 len -= skb->data_len;
3005
65c7973f
JB		 3006 /* This goes back to the question of how to logically map a tx queue
3007 * to a flow. Right now, performance is impacted slightly negatively
3008 * if using multiple tx queues. If the stack breaks away from a
3009 * single qdisc implementation, we can look at this again. */
581d708e 3010 tx_ring = adapter->tx_ring;
24025e4e 3011
581d708e 3012 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3013 dev_kfree_skb_any(skb);
3014 return NETDEV_TX_OK;
3015 }
3016
032fe6e9
JB		 3017 /* 82571 and newer doesn't need the workaround that limited descriptor
3018 * length to 4kB */
3019 if (adapter->hw.mac_type >= e1000_82571)
3020 max_per_txd = 8192;
3021
1da177e4 3022#ifdef NETIF_F_TSO
7967168c 3023 mss = skb_shinfo(skb)->gso_size;
76c224bc 3024 /* The controller does a simple calculation to
1da177e4
LT		 3025 * make sure there is enough room in the FIFO before
3026 * initiating the DMA for each buffer. The calc is:
3027 * 4 = ceil(buffer len/mss). To make sure we don't
3028 * overrun the FIFO, adjust the max buffer len if mss
3029 * drops. */
96838a40 3030 if (mss) {
9a3056da 3031 uint8_t hdr_len;
1da177e4
LT		 3032 max_per_txd = min(mss << 2, max_per_txd);
3033 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3034
90fb5135
AK		 3035 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3036 * points to just header, pull a few bytes of payload from
3037 * frags into skb->data */
9a3056da 3038 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 3039 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3040 switch (adapter->hw.mac_type) {
3041 unsigned int pull_size;
3042 case e1000_82571:
3043 case e1000_82572:
3044 case e1000_82573:
cd94dd0b 3045 case e1000_ich8lan:
9f687888
JK		 3046 pull_size = min((unsigned int)4, skb->data_len);
3047 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3048 DPRINTK(DRV, ERR,
9f687888
JK		 3049 "__pskb_pull_tail failed.\n");
3050 dev_kfree_skb_any(skb);
749dfc70 3051 return NETDEV_TX_OK;
9f687888
JK		 3052 }
3053 len = skb->len - skb->data_len;
3054 break;
3055 default:
3056 /* do nothing */
3057 break;
d74bbd3b 3058 }
9a3056da 3059 }
1da177e4
LT		 3060 }
3061
9a3056da 3062 /* reserve a descriptor for the offload context */
84fa7933 3063 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3064 count++;
2648345f 3065 count++;
1da177e4 3066#else
84fa7933 3067 if (skb->ip_summed == CHECKSUM_PARTIAL)
1da177e4
LT		 3068 count++;
3069#endif
fd803241
JK		 3070
3071#ifdef NETIF_F_TSO
3072 /* Controller Erratum workaround */
89114afd 3073 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 3074 count++;
3075#endif
3076
1da177e4
LT		 3077 count += TXD_USE_COUNT(len, max_txd_pwr);
3078
96838a40 3079 if (adapter->pcix_82544)
1da177e4
LT		 3080 count++;
3081
96838a40 3082 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3083 * in PCI-X mode, so add one more descriptor to the count
3084 */
96838a40 3085 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3086 (len > 2015)))
3087 count++;
3088
1da177e4 3089 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3090 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3091 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3092 max_txd_pwr);
96838a40 3093 if (adapter->pcix_82544)
1da177e4
LT		 3094 count += nr_frags;
3095
0f15a8fa
JK		 3096
3097 if (adapter->hw.tx_pkt_filtering &&
3098 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3099 e1000_transfer_dhcp_info(adapter, skb);
3100
581d708e
MC		 3101 local_irq_save(flags);
3102 if (!spin_trylock(&tx_ring->tx_lock)) {
3103 /* Collision - tell upper layer to requeue */
3104 local_irq_restore(flags);
3105 return NETDEV_TX_LOCKED;
3106 }
1da177e4
LT		 3107
3108 /* need: count + 2 desc gap to keep tail from touching
3109 * head, otherwise try next time */
65c7973f 3110 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3111 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3112 return NETDEV_TX_BUSY;
3113 }
3114
96838a40
JB		 3115 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3116 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3117 netif_stop_queue(netdev);
1314bbf3 3118 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3119 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3120 return NETDEV_TX_BUSY;
3121 }
3122 }
3123
96838a40 3124 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3125 tx_flags |= E1000_TX_FLAGS_VLAN;
3126 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3127 }
3128
581d708e 3129 first = tx_ring->next_to_use;
96838a40 3130
581d708e 3131 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3132 if (tso < 0) {
3133 dev_kfree_skb_any(skb);
581d708e 3134 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3135 return NETDEV_TX_OK;
3136 }
3137
fd803241
JK		 3138 if (likely(tso)) {
3139 tx_ring->last_tx_tso = 1;
1da177e4 3140 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3141 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3142 tx_flags |= E1000_TX_FLAGS_CSUM;
3143
2d7edb92 3144 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3145 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3146 * no longer assume, we must. */
60828236 3147 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3148 tx_flags |= E1000_TX_FLAGS_IPV4;
3149
581d708e
MC		 3150 e1000_tx_queue(adapter, tx_ring, tx_flags,
3151 e1000_tx_map(adapter, tx_ring, skb, first,
3152 max_per_txd, nr_frags, mss));
1da177e4
LT		 3153
3154 netdev->trans_start = jiffies;
3155
3156 /* Make sure there is space in the ring for the next send. */
65c7973f 3157 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3158
581d708e 3159 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3160 return NETDEV_TX_OK;
3161}
3162
3163/**
3164 * e1000_tx_timeout - Respond to a Tx Hang
3165 * @netdev: network interface device structure
3166 **/
3167
3168static void
3169e1000_tx_timeout(struct net_device *netdev)
3170{
60490fe0 3171 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3172
3173 /* Do the reset outside of interrupt context */
87041639
JK		 3174 adapter->tx_timeout_count++;
3175 schedule_work(&adapter->reset_task);
1da177e4
LT		 3176}
3177
3178static void
87041639 3179e1000_reset_task(struct net_device *netdev)
1da177e4 3180{
60490fe0 3181 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3182
2db10a08 3183 e1000_reinit_locked(adapter);
1da177e4
LT		 3184}
3185
3186/**
3187 * e1000_get_stats - Get System Network Statistics
3188 * @netdev: network interface device structure
3189 *
3190 * Returns the address of the device statistics structure.
3191 * The statistics are actually updated from the timer callback.
3192 **/
3193
3194static struct net_device_stats *
3195e1000_get_stats(struct net_device *netdev)
3196{
60490fe0 3197 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3198
6b7660cd 3199 /* only return the current stats */
1da177e4
LT		 3200 return &adapter->net_stats;
3201}
3202
3203/**
3204 * e1000_change_mtu - Change the Maximum Transfer Unit
3205 * @netdev: network interface device structure
3206 * @new_mtu: new value for maximum frame size
3207 *
3208 * Returns 0 on success, negative on failure
3209 **/
3210
3211static int
3212e1000_change_mtu(struct net_device *netdev, int new_mtu)
3213{
60490fe0 3214 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3215 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3216 uint16_t eeprom_data = 0;
1da177e4 3217
96838a40
JB		 3218 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3219 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3220 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3221 return -EINVAL;
2d7edb92 3222 }
1da177e4 3223
997f5cbd
JK		 3224 /* Adapter-specific max frame size limits. */
3225 switch (adapter->hw.mac_type) {
9e2feace 3226 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3227 case e1000_ich8lan:
997f5cbd
JK		 3228 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3229 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3230 return -EINVAL;
2d7edb92 3231 }
997f5cbd 3232 break;
85b22eb6 3233 case e1000_82573:
249d71d6
BA		 3234 /* Jumbo Frames not supported if:
3235 * - this is not an 82573L device
3236 * - ASPM is enabled in any way (0x1A bits 3:2) */
85b22eb6
JK		 3237 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3238 &eeprom_data);
249d71d6
BA		 3239 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3240 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3241 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3242 DPRINTK(PROBE, ERR,
3243 "Jumbo Frames not supported.\n");
3244 return -EINVAL;
3245 }
3246 break;
3247 }
249d71d6
BA		 3248 /* ERT will be enabled later to enable wire speed receives */
3249
85b22eb6 3250 /* fall through to get support */
997f5cbd
JK		 3251 case e1000_82571:
3252 case e1000_82572:
87041639 3253 case e1000_80003es2lan:
997f5cbd
JK		 3254#define MAX_STD_JUMBO_FRAME_SIZE 9234
3255 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3256 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3257 return -EINVAL;
3258 }
3259 break;
3260 default:
3261 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3262 break;
1da177e4
LT		 3263 }
3264
87f5032e 3265 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3266 * means we reserve 2 more, this pushes us to allocate from the next
3267 * larger slab size
3268 * i.e. RXBUFFER_2048 --> size-4096 slab */
3269
3270 if (max_frame <= E1000_RXBUFFER_256)
3271 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3272 else if (max_frame <= E1000_RXBUFFER_512)
3273 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3274 else if (max_frame <= E1000_RXBUFFER_1024)
3275 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3276 else if (max_frame <= E1000_RXBUFFER_2048)
3277 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3278 else if (max_frame <= E1000_RXBUFFER_4096)
3279 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3280 else if (max_frame <= E1000_RXBUFFER_8192)
3281 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3282 else if (max_frame <= E1000_RXBUFFER_16384)
3283 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3284
3285 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3286 if (!adapter->hw.tbi_compatibility_on &&
3287 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3288 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3289 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3290
2d7edb92
MC		 3291 netdev->mtu = new_mtu;
3292
2db10a08
AK		 3293 if (netif_running(netdev))
3294 e1000_reinit_locked(adapter);
1da177e4 3295
1da177e4
LT		 3296 adapter->hw.max_frame_size = max_frame;
3297
3298 return 0;
3299}
3300
3301/**
3302 * e1000_update_stats - Update the board statistics counters
3303 * @adapter: board private structure
3304 **/
3305
3306void
3307e1000_update_stats(struct e1000_adapter *adapter)
3308{
3309 struct e1000_hw *hw = &adapter->hw;
282f33c9 3310 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3311 unsigned long flags;
3312 uint16_t phy_tmp;
3313
3314#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3315
282f33c9
LV		 3316 /*
3317 * Prevent stats update while adapter is being reset, or if the pci
3318 * connection is down.
3319 */
9026729b 3320 if (adapter->link_speed == 0)
282f33c9
LV		 3321 return;
3322 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3323 return;
3324
1da177e4
LT		 3325 spin_lock_irqsave(&adapter->stats_lock, flags);
3326
3327 /* these counters are modified from e1000_adjust_tbi_stats,
3328 * called from the interrupt context, so they must only
3329 * be written while holding adapter->stats_lock
3330 */
3331
3332 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3333 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3334 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3335 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3336 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3337 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3338 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3339
3340 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3341 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3342 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3343 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3344 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3345 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3346 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3347 }
1da177e4
LT		 3348
3349 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3350 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3351 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3352 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3353 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3354 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3355 adapter->stats.dc += E1000_READ_REG(hw, DC);
3356 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3357 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3358 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3359 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3360 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3361 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3362 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3363 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3364 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3365 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3366 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3367 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3368 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3369 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3370 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3371 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3372 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3373 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3374 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3375
3376 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3377 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3378 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3379 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3380 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3381 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3382 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3383 }
3384
1da177e4
LT		 3385 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3386 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3387
3388 /* used for adaptive IFS */
3389
3390 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3391 adapter->stats.tpt += hw->tx_packet_delta;
3392 hw->collision_delta = E1000_READ_REG(hw, COLC);
3393 adapter->stats.colc += hw->collision_delta;
3394
96838a40 3395 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3396 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3397 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3398 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3399 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3400 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3401 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3402 }
96838a40 3403 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3404 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3405 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3406
3407 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3408 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3409 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3410 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3411 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3412 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3413 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3414 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3415 }
2d7edb92 3416 }
1da177e4
LT		 3417
3418 /* Fill out the OS statistics structure */
1da177e4
LT		 3419 adapter->net_stats.rx_packets = adapter->stats.gprc;
3420 adapter->net_stats.tx_packets = adapter->stats.gptc;
3421 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3422 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3423 adapter->net_stats.multicast = adapter->stats.mprc;
3424 adapter->net_stats.collisions = adapter->stats.colc;
3425
3426 /* Rx Errors */
3427
87041639
JK		 3428 /* RLEC on some newer hardware can be incorrect so build
3429 * our own version based on RUC and ROC */
1da177e4
LT		 3430 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3431 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3432 adapter->stats.ruc + adapter->stats.roc +
3433 adapter->stats.cexterr;
49559854
MW		 3434 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3435 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3436 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3437 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3438 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3439
3440 /* Tx Errors */
49559854
MW		 3441 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3442 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3443 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3444 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3445 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3446
3447 /* Tx Dropped needs to be maintained elsewhere */
3448
3449 /* Phy Stats */
96838a40
JB		 3450 if (hw->media_type == e1000_media_type_copper) {
3451 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3452 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3453 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3454 adapter->phy_stats.idle_errors += phy_tmp;
3455 }
3456
96838a40 3457 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3458 (hw->phy_type == e1000_phy_m88) &&
3459 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3460 adapter->phy_stats.receive_errors += phy_tmp;
3461 }
3462
3463 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3464}
3465
3466/**
3467 * e1000_intr - Interrupt Handler
3468 * @irq: interrupt number
3469 * @data: pointer to a network interface device structure
1da177e4
LT		 3470 **/
3471
3472static irqreturn_t
7d12e780 3473e1000_intr(int irq, void *data)
1da177e4
LT		 3474{
3475 struct net_device *netdev = data;
60490fe0 3476 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3477 struct e1000_hw *hw = &adapter->hw;
87041639 3478 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3479#ifndef CONFIG_E1000_NAPI
581d708e 3480 int i;
1e613fd9
JK		 3481#else
3482 /* Interrupt Auto-Mask...upon reading ICR,
3483 * interrupts are masked. No need for the
3484 * IMC write, but it does mean we should
3485 * account for it ASAP. */
3486 if (likely(hw->mac_type >= e1000_82571))
3487 atomic_inc(&adapter->irq_sem);
be2b28ed 3488#endif
1da177e4 3489
1e613fd9
JK		 3490 if (unlikely(!icr)) {
3491#ifdef CONFIG_E1000_NAPI
3492 if (hw->mac_type >= e1000_82571)
3493 e1000_irq_enable(adapter);
3494#endif
1da177e4 3495 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3496 }
1da177e4 3497
96838a40 3498 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3499 hw->get_link_status = 1;
87041639
JK		 3500 /* 80003ES2LAN workaround--
3501 * For packet buffer work-around on link down event;
3502 * disable receives here in the ISR and
3503 * reset adapter in watchdog
3504 */
3505 if (netif_carrier_ok(netdev) &&
3506 (adapter->hw.mac_type == e1000_80003es2lan)) {
3507 /* disable receives */
3508 rctl = E1000_READ_REG(hw, RCTL);
3509 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3510 }
1314bbf3
AK		 3511 /* guard against interrupt when we're going down */
3512 if (!test_bit(__E1000_DOWN, &adapter->flags))
3513 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3514 }
3515
3516#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3517 if (unlikely(hw->mac_type < e1000_82571)) {
3518 atomic_inc(&adapter->irq_sem);
3519 E1000_WRITE_REG(hw, IMC, ~0);
3520 E1000_WRITE_FLUSH(hw);
3521 }
d3d9e484
AK		 3522 if (likely(netif_rx_schedule_prep(netdev)))
3523 __netif_rx_schedule(netdev);
581d708e 3524 else
90fb5135
AK		 3525 /* this really should not happen! if it does it is basically a
3526 * bug, but not a hard error, so enable ints and continue */
581d708e 3527 e1000_irq_enable(adapter);
c1605eb3 3528#else
1da177e4 3529 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3530 * Due to Hub Link bus being occupied, an interrupt
3531 * de-assertion message is not able to be sent.
3532 * When an interrupt assertion message is generated later,
3533 * two messages are re-ordered and sent out.
3534 * That causes APIC to think 82547 is in de-assertion
3535 * state, while 82547 is in assertion state, resulting
3536 * in dead lock. Writing IMC forces 82547 into
3537 * de-assertion state.
3538 */
3539 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3540 atomic_inc(&adapter->irq_sem);
2648345f 3541 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3542 }
3543
96838a40
JB		 3544 for (i = 0; i < E1000_MAX_INTR; i++)
3545 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3546 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3547 break;
3548
96838a40 3549 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3550 e1000_irq_enable(adapter);
581d708e 3551
c1605eb3 3552#endif
1da177e4
LT		 3553 return IRQ_HANDLED;
3554}
3555
3556#ifdef CONFIG_E1000_NAPI
3557/**
3558 * e1000_clean - NAPI Rx polling callback
3559 * @adapter: board private structure
3560 **/
3561
3562static int
581d708e 3563e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3564{
581d708e
MC		 3565 struct e1000_adapter *adapter;
3566 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3567 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3568
3569 /* Must NOT use netdev_priv macro here. */
3570 adapter = poll_dev->priv;
3571
3572 /* Keep link state information with original netdev */
d3d9e484 3573 if (!netif_carrier_ok(poll_dev))
581d708e 3574 goto quit_polling;
2648345f 3575
d3d9e484
AK		 3576 /* e1000_clean is called per-cpu. This lock protects
3577 * tx_ring[0] from being cleaned by multiple cpus
3578 * simultaneously. A failure obtaining the lock means
3579 * tx_ring[0] is currently being cleaned anyway. */
3580 if (spin_trylock(&adapter->tx_queue_lock)) {
3581 tx_cleaned = e1000_clean_tx_irq(adapter,
3582 &adapter->tx_ring[0]);
3583 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3584 }
3585
d3d9e484 3586 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3587 &work_done, work_to_do);
1da177e4
LT		 3588
3589 *budget -= work_done;
581d708e 3590 poll_dev->quota -= work_done;
96838a40 3591
2b02893e 3592 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3593 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3594 !netif_running(poll_dev)) {
581d708e
MC		 3595quit_polling:
3596 netif_rx_complete(poll_dev);
1da177e4
LT		 3597 e1000_irq_enable(adapter);
3598 return 0;
3599 }
3600
3601 return 1;
3602}
3603
3604#endif
3605/**
3606 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3607 * @adapter: board private structure
3608 **/
3609
3610static boolean_t
581d708e
MC		 3611e1000_clean_tx_irq(struct e1000_adapter *adapter,
3612 struct e1000_tx_ring *tx_ring)
1da177e4 3613{
1da177e4
LT		 3614 struct net_device *netdev = adapter->netdev;
3615 struct e1000_tx_desc *tx_desc, *eop_desc;
3616 struct e1000_buffer *buffer_info;
3617 unsigned int i, eop;
2a1af5d7
JK		 3618#ifdef CONFIG_E1000_NAPI
3619 unsigned int count = 0;
3620#endif
1da177e4
LT		 3621 boolean_t cleaned = FALSE;
3622
3623 i = tx_ring->next_to_clean;
3624 eop = tx_ring->buffer_info[i].next_to_watch;
3625 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3626
581d708e 3627 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3628 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3629 tx_desc = E1000_TX_DESC(*tx_ring, i);
3630 buffer_info = &tx_ring->buffer_info[i];
3631 cleaned = (i == eop);
3632
fd803241 3633 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3634 tx_desc->upper.data = 0;
1da177e4 3635
96838a40 3636 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3637 }
581d708e 3638
1da177e4
LT		 3639 eop = tx_ring->buffer_info[i].next_to_watch;
3640 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3641#ifdef CONFIG_E1000_NAPI
3642#define E1000_TX_WEIGHT 64
3643 /* weight of a sort for tx, to avoid endless transmit cleanup */
3644 if (count++ == E1000_TX_WEIGHT) break;
3645#endif
1da177e4
LT		 3646 }
3647
3648 tx_ring->next_to_clean = i;
3649
77b2aad5 3650#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3651 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3652 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3653 /* Make sure that anybody stopping the queue after this
3654 * sees the new next_to_clean.
3655 */
3656 smp_mb();
3657 if (netif_queue_stopped(netdev))
77b2aad5 3658 netif_wake_queue(netdev);
77b2aad5 3659 }
2648345f 3660
581d708e 3661 if (adapter->detect_tx_hung) {
2648345f 3662 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3663 * check with the clearing of time_stamp and movement of i */
3664 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3665 if (tx_ring->buffer_info[eop].dma &&
3666 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3667 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3668 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3669 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3670
3671 /* detected Tx unit hang */
c6963ef5 3672 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3673 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3674 " TDH <%x>\n"
3675 " TDT <%x>\n"
3676 " next_to_use <%x>\n"
3677 " next_to_clean <%x>\n"
3678 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3679 " time_stamp <%lx>\n"
3680 " next_to_watch <%x>\n"
3681 " jiffies <%lx>\n"
3682 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3683 (unsigned long)((tx_ring - adapter->tx_ring) /
3684 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3685 readl(adapter->hw.hw_addr + tx_ring->tdh),
3686 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3687 tx_ring->next_to_use,
392137fa
JK		 3688 tx_ring->next_to_clean,
3689 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3690 eop,
3691 jiffies,
3692 eop_desc->upper.fields.status);
1da177e4 3693 netif_stop_queue(netdev);
70b8f1e1 3694 }
1da177e4 3695 }
1da177e4
LT		 3696 return cleaned;
3697}
3698
3699/**
3700 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3701 * @adapter: board private structure
3702 * @status_err: receive descriptor status and error fields
3703 * @csum: receive descriptor csum field
3704 * @sk_buff: socket buffer with received data
1da177e4
LT		 3705 **/
3706
e619d523 3707static void
1da177e4 3708e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3709 uint32_t status_err, uint32_t csum,
3710 struct sk_buff *skb)
1da177e4 3711{
2d7edb92
MC		 3712 uint16_t status = (uint16_t)status_err;
3713 uint8_t errors = (uint8_t)(status_err >> 24);
3714 skb->ip_summed = CHECKSUM_NONE;
3715
1da177e4 3716 /* 82543 or newer only */
96838a40 3717 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3718 /* Ignore Checksum bit is set */
96838a40 3719 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3720 /* TCP/UDP checksum error bit is set */
96838a40 3721 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3722 /* let the stack verify checksum errors */
1da177e4 3723 adapter->hw_csum_err++;
2d7edb92
MC		 3724 return;
3725 }
3726 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3727 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3728 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3729 return;
1da177e4 3730 } else {
96838a40 3731 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3732 return;
3733 }
3734 /* It must be a TCP or UDP packet with a valid checksum */
3735 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3736 /* TCP checksum is good */
3737 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3738 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3739 /* IP fragment with UDP payload */
3740 /* Hardware complements the payload checksum, so we undo it
3741 * and then put the value in host order for further stack use.
3742 */
3743 csum = ntohl(csum ^ 0xFFFF);
3744 skb->csum = csum;
84fa7933 3745 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3746 }
2d7edb92 3747 adapter->hw_csum_good++;
1da177e4
LT		 3748}
3749
3750/**
2d7edb92 3751 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3752 * @adapter: board private structure
3753 **/
3754
3755static boolean_t
3756#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3757e1000_clean_rx_irq(struct e1000_adapter *adapter,
3758 struct e1000_rx_ring *rx_ring,
3759 int *work_done, int work_to_do)
1da177e4 3760#else
581d708e
MC		 3761e1000_clean_rx_irq(struct e1000_adapter *adapter,
3762 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3763#endif
3764{
1da177e4
LT		 3765 struct net_device *netdev = adapter->netdev;
3766 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3767 struct e1000_rx_desc *rx_desc, *next_rxd;
3768 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3769 unsigned long flags;
3770 uint32_t length;
3771 uint8_t last_byte;
3772 unsigned int i;
72d64a43 3773 int cleaned_count = 0;
a1415ee6 3774 boolean_t cleaned = FALSE;
1da177e4
LT		 3775
3776 i = rx_ring->next_to_clean;
3777 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3778 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3779
b92ff8ee 3780 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3781 struct sk_buff *skb;
a292ca6e 3782 u8 status;
90fb5135 3783
1da177e4 3784#ifdef CONFIG_E1000_NAPI
96838a40 3785 if (*work_done >= work_to_do)
1da177e4
LT		 3786 break;
3787 (*work_done)++;
3788#endif
a292ca6e 3789 status = rx_desc->status;
b92ff8ee 3790 skb = buffer_info->skb;
86c3d59f
JB		 3791 buffer_info->skb = NULL;
3792
30320be8
JK		 3793 prefetch(skb->data - NET_IP_ALIGN);
3794
86c3d59f
JB		 3795 if (++i == rx_ring->count) i = 0;
3796 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3797 prefetch(next_rxd);
3798
86c3d59f 3799 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3800
72d64a43
JK		 3801 cleaned = TRUE;
3802 cleaned_count++;
a292ca6e
JK		 3803 pci_unmap_single(pdev,
3804 buffer_info->dma,
3805 buffer_info->length,
1da177e4
LT		 3806 PCI_DMA_FROMDEVICE);
3807
1da177e4
LT		 3808 length = le16_to_cpu(rx_desc->length);
3809
a1415ee6
JK		 3810 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3811 /* All receives must fit into a single buffer */
3812 E1000_DBG("%s: Receive packet consumed multiple"
3813 " buffers\n", netdev->name);
864c4e45 3814 /* recycle */
8fc897b0 3815 buffer_info->skb = skb;
1da177e4
LT		 3816 goto next_desc;
3817 }
3818
96838a40 3819 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3820 last_byte = *(skb->data + length - 1);
b92ff8ee 3821 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3822 rx_desc->errors, length, last_byte)) {
3823 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3824 e1000_tbi_adjust_stats(&adapter->hw,
3825 &adapter->stats,
1da177e4
LT		 3826 length, skb->data);
3827 spin_unlock_irqrestore(&adapter->stats_lock,
3828 flags);
3829 length--;
3830 } else {
9e2feace
AK		 3831 /* recycle */
3832 buffer_info->skb = skb;
1da177e4
LT		 3833 goto next_desc;
3834 }
1cb5821f 3835 }
1da177e4 3836
d2a1e213
JB		 3837 /* adjust length to remove Ethernet CRC, this must be
3838 * done after the TBI_ACCEPT workaround above */
3839 length -= 4;
3840
a292ca6e
JK		 3841 /* code added for copybreak, this should improve
3842 * performance for small packets with large amounts
3843 * of reassembly being done in the stack */
3844#define E1000_CB_LENGTH 256
a1415ee6 3845 if (length < E1000_CB_LENGTH) {
a292ca6e 3846 struct sk_buff *new_skb =
87f5032e 3847 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 3848 if (new_skb) {
3849 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 3850 memcpy(new_skb->data - NET_IP_ALIGN,
3851 skb->data - NET_IP_ALIGN,
3852 length + NET_IP_ALIGN);
3853 /* save the skb in buffer_info as good */
3854 buffer_info->skb = skb;
3855 skb = new_skb;
a292ca6e 3856 }
996695de
AK		 3857 /* else just continue with the old one */
3858 }
a292ca6e 3859 /* end copybreak code */
996695de 3860 skb_put(skb, length);
1da177e4
LT		 3861
3862 /* Receive Checksum Offload */
a292ca6e
JK		 3863 e1000_rx_checksum(adapter,
3864 (uint32_t)(status) |
2d7edb92 3865 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3866 le16_to_cpu(rx_desc->csum), skb);
96838a40 3867
1da177e4
LT		 3868 skb->protocol = eth_type_trans(skb, netdev);
3869#ifdef CONFIG_E1000_NAPI
96838a40 3870 if (unlikely(adapter->vlgrp &&
a292ca6e 3871 (status & E1000_RXD_STAT_VP))) {
1da177e4 3872 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3873 le16_to_cpu(rx_desc->special) &
3874 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3875 } else {
3876 netif_receive_skb(skb);
3877 }
3878#else /* CONFIG_E1000_NAPI */
96838a40 3879 if (unlikely(adapter->vlgrp &&
b92ff8ee 3880 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3881 vlan_hwaccel_rx(skb, adapter->vlgrp,
3882 le16_to_cpu(rx_desc->special) &
3883 E1000_RXD_SPC_VLAN_MASK);
3884 } else {
3885 netif_rx(skb);
3886 }
3887#endif /* CONFIG_E1000_NAPI */
3888 netdev->last_rx = jiffies;
3889
3890next_desc:
3891 rx_desc->status = 0;
1da177e4 3892
72d64a43
JK		 3893 /* return some buffers to hardware, one at a time is too slow */
3894 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3895 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3896 cleaned_count = 0;
3897 }
3898
30320be8 3899 /* use prefetched values */
86c3d59f
JB		 3900 rx_desc = next_rxd;
3901 buffer_info = next_buffer;
1da177e4 3902 }
1da177e4 3903 rx_ring->next_to_clean = i;
72d64a43
JK		 3904
3905 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3906 if (cleaned_count)
3907 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3908
3909 return cleaned;
3910}
3911
3912/**
3913 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3914 * @adapter: board private structure
3915 **/
3916
3917static boolean_t
3918#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3919e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3920 struct e1000_rx_ring *rx_ring,
3921 int *work_done, int work_to_do)
2d7edb92 3922#else
581d708e
MC		 3923e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3924 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3925#endif
3926{
86c3d59f 3927 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3928 struct net_device *netdev = adapter->netdev;
3929 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3930 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3931 struct e1000_ps_page *ps_page;
3932 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3933 struct sk_buff *skb;
2d7edb92
MC		 3934 unsigned int i, j;
3935 uint32_t length, staterr;
72d64a43 3936 int cleaned_count = 0;
2d7edb92
MC		 3937 boolean_t cleaned = FALSE;
3938
3939 i = rx_ring->next_to_clean;
3940 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3941 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3942 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3943
96838a40 3944 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3945 ps_page = &rx_ring->ps_page[i];
3946 ps_page_dma = &rx_ring->ps_page_dma[i];
3947#ifdef CONFIG_E1000_NAPI
96838a40 3948 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3949 break;
3950 (*work_done)++;
3951#endif
86c3d59f
JB		 3952 skb = buffer_info->skb;
3953
30320be8
JK		 3954 /* in the packet split case this is header only */
3955 prefetch(skb->data - NET_IP_ALIGN);
3956
86c3d59f
JB		 3957 if (++i == rx_ring->count) i = 0;
3958 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3959 prefetch(next_rxd);
3960
86c3d59f 3961 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3962
2d7edb92 3963 cleaned = TRUE;
72d64a43 3964 cleaned_count++;
2d7edb92
MC		 3965 pci_unmap_single(pdev, buffer_info->dma,
3966 buffer_info->length,
3967 PCI_DMA_FROMDEVICE);
3968
96838a40 3969 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3970 E1000_DBG("%s: Packet Split buffers didn't pick up"
3971 " the full packet\n", netdev->name);
3972 dev_kfree_skb_irq(skb);
3973 goto next_desc;
3974 }
1da177e4 3975
96838a40 3976 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3977 dev_kfree_skb_irq(skb);
3978 goto next_desc;
3979 }
3980
3981 length = le16_to_cpu(rx_desc->wb.middle.length0);
3982
96838a40 3983 if (unlikely(!length)) {
2d7edb92
MC		 3984 E1000_DBG("%s: Last part of the packet spanning"
3985 " multiple descriptors\n", netdev->name);
3986 dev_kfree_skb_irq(skb);
3987 goto next_desc;
3988 }
3989
3990 /* Good Receive */
3991 skb_put(skb, length);
3992
dc7c6add
JK		 3993 {
3994 /* this looks ugly, but it seems compiler issues make it
3995 more efficient than reusing j */
3996 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3997
3998 /* page alloc/put takes too long and effects small packet
3999 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 4000 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 4001 u8 *vaddr;
76c224bc 4002 /* there is no documentation about how to call
dc7c6add
JK		 4003 * kmap_atomic, so we can't hold the mapping
4004 * very long */
4005 pci_dma_sync_single_for_cpu(pdev,
4006 ps_page_dma->ps_page_dma[0],
4007 PAGE_SIZE,
4008 PCI_DMA_FROMDEVICE);
4009 vaddr = kmap_atomic(ps_page->ps_page[0],
4010 KM_SKB_DATA_SOFTIRQ);
4011 memcpy(skb->tail, vaddr, l1);
4012 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4013 pci_dma_sync_single_for_device(pdev,
4014 ps_page_dma->ps_page_dma[0],
4015 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 4016 /* remove the CRC */
4017 l1 -= 4;
dc7c6add 4018 skb_put(skb, l1);
dc7c6add
JK		 4019 goto copydone;
4020 } /* if */
4021 }
90fb5135 4022
96838a40 4023 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 4024 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 4025 break;
2d7edb92
MC		 4026 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4027 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4028 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 4029 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4030 length);
2d7edb92 4031 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 4032 skb->len += length;
4033 skb->data_len += length;
5d51b80f 4034 skb->truesize += length;
2d7edb92
MC		 4035 }
4036
f235a2ab
AK		 4037 /* strip the ethernet crc, problem is we're using pages now so
4038 * this whole operation can get a little cpu intensive */
4039 pskb_trim(skb, skb->len - 4);
4040
dc7c6add 4041copydone:
2d7edb92 4042 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 4043 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 4044 skb->protocol = eth_type_trans(skb, netdev);
4045
96838a40 4046 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 4047 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 4048 adapter->rx_hdr_split++;
2d7edb92 4049#ifdef CONFIG_E1000_NAPI
96838a40 4050 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4051 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 4052 le16_to_cpu(rx_desc->wb.middle.vlan) &
4053 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4054 } else {
4055 netif_receive_skb(skb);
4056 }
4057#else /* CONFIG_E1000_NAPI */
96838a40 4058 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4059 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 4060 le16_to_cpu(rx_desc->wb.middle.vlan) &
4061 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4062 } else {
4063 netif_rx(skb);
4064 }
4065#endif /* CONFIG_E1000_NAPI */
4066 netdev->last_rx = jiffies;
4067
4068next_desc:
c3d7a3a4 4069 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 4070 buffer_info->skb = NULL;
2d7edb92 4071
72d64a43
JK		 4072 /* return some buffers to hardware, one at a time is too slow */
4073 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4074 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4075 cleaned_count = 0;
4076 }
4077
30320be8 4078 /* use prefetched values */
86c3d59f
JB		 4079 rx_desc = next_rxd;
4080 buffer_info = next_buffer;
4081
683a38f3 4082 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 4083 }
4084 rx_ring->next_to_clean = i;
72d64a43
JK		 4085
4086 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4087 if (cleaned_count)
4088 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 4089
4090 return cleaned;
4091}
4092
4093/**
2d7edb92 4094 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4095 * @adapter: address of board private structure
4096 **/
4097
4098static void
581d708e 4099e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4100 struct e1000_rx_ring *rx_ring,
a292ca6e 4101 int cleaned_count)
1da177e4 4102{
1da177e4
LT		 4103 struct net_device *netdev = adapter->netdev;
4104 struct pci_dev *pdev = adapter->pdev;
4105 struct e1000_rx_desc *rx_desc;
4106 struct e1000_buffer *buffer_info;
4107 struct sk_buff *skb;
2648345f
MC		 4108 unsigned int i;
4109 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4110
4111 i = rx_ring->next_to_use;
4112 buffer_info = &rx_ring->buffer_info[i];
4113
a292ca6e 4114 while (cleaned_count--) {
ca6f7224
CH		 4115 skb = buffer_info->skb;
4116 if (skb) {
a292ca6e
JK		 4117 skb_trim(skb, 0);
4118 goto map_skb;
4119 }
4120
ca6f7224 4121 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4122 if (unlikely(!skb)) {
1da177e4 4123 /* Better luck next round */
72d64a43 4124 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4125 break;
4126 }
4127
2648345f 4128 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4129 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4130 struct sk_buff *oldskb = skb;
2648345f
MC		 4131 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4132 "at %p\n", bufsz, skb->data);
4133 /* Try again, without freeing the previous */
87f5032e 4134 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4135 /* Failed allocation, critical failure */
1da177e4
LT		 4136 if (!skb) {
4137 dev_kfree_skb(oldskb);
4138 break;
4139 }
2648345f 4140
1da177e4
LT		 4141 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4142 /* give up */
4143 dev_kfree_skb(skb);
4144 dev_kfree_skb(oldskb);
4145 break; /* while !buffer_info->skb */
1da177e4 4146 }
ca6f7224
CH		 4147
4148 /* Use new allocation */
4149 dev_kfree_skb(oldskb);
1da177e4 4150 }
1da177e4
LT		 4151 /* Make buffer alignment 2 beyond a 16 byte boundary
4152 * this will result in a 16 byte aligned IP header after
4153 * the 14 byte MAC header is removed
4154 */
4155 skb_reserve(skb, NET_IP_ALIGN);
4156
1da177e4
LT		 4157 buffer_info->skb = skb;
4158 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4159map_skb:
1da177e4
LT		 4160 buffer_info->dma = pci_map_single(pdev,
4161 skb->data,
4162 adapter->rx_buffer_len,
4163 PCI_DMA_FROMDEVICE);
4164
2648345f
MC		 4165 /* Fix for errata 23, can't cross 64kB boundary */
4166 if (!e1000_check_64k_bound(adapter,
4167 (void *)(unsigned long)buffer_info->dma,
4168 adapter->rx_buffer_len)) {
4169 DPRINTK(RX_ERR, ERR,
4170 "dma align check failed: %u bytes at %p\n",
4171 adapter->rx_buffer_len,
4172 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4173 dev_kfree_skb(skb);
4174 buffer_info->skb = NULL;
4175
2648345f 4176 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4177 adapter->rx_buffer_len,
4178 PCI_DMA_FROMDEVICE);
4179
4180 break; /* while !buffer_info->skb */
4181 }
1da177e4
LT		 4182 rx_desc = E1000_RX_DESC(*rx_ring, i);
4183 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4184
96838a40
JB		 4185 if (unlikely(++i == rx_ring->count))
4186 i = 0;
1da177e4
LT		 4187 buffer_info = &rx_ring->buffer_info[i];
4188 }
4189
b92ff8ee
JB		 4190 if (likely(rx_ring->next_to_use != i)) {
4191 rx_ring->next_to_use = i;
4192 if (unlikely(i-- == 0))
4193 i = (rx_ring->count - 1);
4194
4195 /* Force memory writes to complete before letting h/w
4196 * know there are new descriptors to fetch. (Only
4197 * applicable for weak-ordered memory model archs,
4198 * such as IA-64). */
4199 wmb();
4200 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4201 }
1da177e4
LT		 4202}
4203
2d7edb92
MC		 4204/**
4205 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4206 * @adapter: address of board private structure
4207 **/
4208
4209static void
581d708e 4210e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4211 struct e1000_rx_ring *rx_ring,
4212 int cleaned_count)
2d7edb92 4213{
2d7edb92
MC		 4214 struct net_device *netdev = adapter->netdev;
4215 struct pci_dev *pdev = adapter->pdev;
4216 union e1000_rx_desc_packet_split *rx_desc;
4217 struct e1000_buffer *buffer_info;
4218 struct e1000_ps_page *ps_page;
4219 struct e1000_ps_page_dma *ps_page_dma;
4220 struct sk_buff *skb;
4221 unsigned int i, j;
4222
4223 i = rx_ring->next_to_use;
4224 buffer_info = &rx_ring->buffer_info[i];
4225 ps_page = &rx_ring->ps_page[i];
4226 ps_page_dma = &rx_ring->ps_page_dma[i];
4227
72d64a43 4228 while (cleaned_count--) {
2d7edb92
MC		 4229 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4230
96838a40 4231 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4232 if (j < adapter->rx_ps_pages) {
4233 if (likely(!ps_page->ps_page[j])) {
4234 ps_page->ps_page[j] =
4235 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4236 if (unlikely(!ps_page->ps_page[j])) {
4237 adapter->alloc_rx_buff_failed++;
e4c811c9 4238 goto no_buffers;
b92ff8ee 4239 }
e4c811c9
MC		 4240 ps_page_dma->ps_page_dma[j] =
4241 pci_map_page(pdev,
4242 ps_page->ps_page[j],
4243 0, PAGE_SIZE,
4244 PCI_DMA_FROMDEVICE);
4245 }
4246 /* Refresh the desc even if buffer_addrs didn't
96838a40 4247 * change because each write-back erases
e4c811c9
MC		 4248 * this info.
4249 */
4250 rx_desc->read.buffer_addr[j+1] =
4251 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4252 } else
4253 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4254 }
4255
87f5032e 4256 skb = netdev_alloc_skb(netdev,
90fb5135 4257 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4258
b92ff8ee
JB		 4259 if (unlikely(!skb)) {
4260 adapter->alloc_rx_buff_failed++;
2d7edb92 4261 break;
b92ff8ee 4262 }
2d7edb92
MC		 4263
4264 /* Make buffer alignment 2 beyond a 16 byte boundary
4265 * this will result in a 16 byte aligned IP header after
4266 * the 14 byte MAC header is removed
4267 */
4268 skb_reserve(skb, NET_IP_ALIGN);
4269
2d7edb92
MC		 4270 buffer_info->skb = skb;
4271 buffer_info->length = adapter->rx_ps_bsize0;
4272 buffer_info->dma = pci_map_single(pdev, skb->data,
4273 adapter->rx_ps_bsize0,
4274 PCI_DMA_FROMDEVICE);
4275
4276 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4277
96838a40 4278 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4279 buffer_info = &rx_ring->buffer_info[i];
4280 ps_page = &rx_ring->ps_page[i];
4281 ps_page_dma = &rx_ring->ps_page_dma[i];
4282 }
4283
4284no_buffers:
b92ff8ee
JB		 4285 if (likely(rx_ring->next_to_use != i)) {
4286 rx_ring->next_to_use = i;
4287 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4288
4289 /* Force memory writes to complete before letting h/w
4290 * know there are new descriptors to fetch. (Only
4291 * applicable for weak-ordered memory model archs,
4292 * such as IA-64). */
4293 wmb();
4294 /* Hardware increments by 16 bytes, but packet split
4295 * descriptors are 32 bytes...so we increment tail
4296 * twice as much.
4297 */
4298 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4299 }
2d7edb92
MC		 4300}
4301
1da177e4
LT		 4302/**
4303 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4304 * @adapter:
4305 **/
4306
4307static void
4308e1000_smartspeed(struct e1000_adapter *adapter)
4309{
4310 uint16_t phy_status;
4311 uint16_t phy_ctrl;
4312
96838a40 4313 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4314 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4315 return;
4316
96838a40 4317 if (adapter->smartspeed == 0) {
1da177e4
LT		 4318 /* If Master/Slave config fault is asserted twice,
4319 * we assume back-to-back */
4320 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4321 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4322 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4323 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4324 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4325 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4326 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4327 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4328 phy_ctrl);
4329 adapter->smartspeed++;
96838a40 4330 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4331 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4332 &phy_ctrl)) {
4333 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4334 MII_CR_RESTART_AUTO_NEG);
4335 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4336 phy_ctrl);
4337 }
4338 }
4339 return;
96838a40 4340 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4341 /* If still no link, perhaps using 2/3 pair cable */
4342 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4343 phy_ctrl |= CR_1000T_MS_ENABLE;
4344 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4345 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4346 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4347 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4348 MII_CR_RESTART_AUTO_NEG);
4349 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4350 }
4351 }
4352 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4353 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4354 adapter->smartspeed = 0;
4355}
4356
4357/**
4358 * e1000_ioctl -
4359 * @netdev:
4360 * @ifreq:
4361 * @cmd:
4362 **/
4363
4364static int
4365e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4366{
4367 switch (cmd) {
4368 case SIOCGMIIPHY:
4369 case SIOCGMIIREG:
4370 case SIOCSMIIREG:
4371 return e1000_mii_ioctl(netdev, ifr, cmd);
4372 default:
4373 return -EOPNOTSUPP;
4374 }
4375}
4376
4377/**
4378 * e1000_mii_ioctl -
4379 * @netdev:
4380 * @ifreq:
4381 * @cmd:
4382 **/
4383
4384static int
4385e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4386{
60490fe0 4387 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4388 struct mii_ioctl_data *data = if_mii(ifr);
4389 int retval;
4390 uint16_t mii_reg;
4391 uint16_t spddplx;
97876fc6 4392 unsigned long flags;
1da177e4 4393
96838a40 4394 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4395 return -EOPNOTSUPP;
4396
4397 switch (cmd) {
4398 case SIOCGMIIPHY:
4399 data->phy_id = adapter->hw.phy_addr;
4400 break;
4401 case SIOCGMIIREG:
96838a40 4402 if (!capable(CAP_NET_ADMIN))
1da177e4 4403 return -EPERM;
97876fc6 4404 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4405 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4406 &data->val_out)) {
4407 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4408 return -EIO;
97876fc6
MC		 4409 }
4410 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4411 break;
4412 case SIOCSMIIREG:
96838a40 4413 if (!capable(CAP_NET_ADMIN))
1da177e4 4414 return -EPERM;
96838a40 4415 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4416 return -EFAULT;
4417 mii_reg = data->val_in;
97876fc6 4418 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4419 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4420 mii_reg)) {
4421 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4422 return -EIO;
97876fc6 4423 }
dc86d32a 4424 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4425 switch (data->reg_num) {
4426 case PHY_CTRL:
96838a40 4427 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4428 break;
96838a40 4429 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4430 adapter->hw.autoneg = 1;
4431 adapter->hw.autoneg_advertised = 0x2F;
4432 } else {
4433 if (mii_reg & 0x40)
4434 spddplx = SPEED_1000;
4435 else if (mii_reg & 0x2000)
4436 spddplx = SPEED_100;
4437 else
4438 spddplx = SPEED_10;
4439 spddplx += (mii_reg & 0x100)
cb764326
JK		 4440 ? DUPLEX_FULL :
4441 DUPLEX_HALF;
1da177e4
LT		 4442 retval = e1000_set_spd_dplx(adapter,
4443 spddplx);
96838a40 4444 if (retval) {
97876fc6 4445 spin_unlock_irqrestore(
96838a40 4446 &adapter->stats_lock,
97876fc6 4447 flags);
1da177e4 4448 return retval;
97876fc6 4449 }
1da177e4 4450 }
2db10a08
AK		 4451 if (netif_running(adapter->netdev))
4452 e1000_reinit_locked(adapter);
4453 else
1da177e4
LT		 4454 e1000_reset(adapter);
4455 break;
4456 case M88E1000_PHY_SPEC_CTRL:
4457 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4458 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4459 spin_unlock_irqrestore(
4460 &adapter->stats_lock, flags);
1da177e4 4461 return -EIO;
97876fc6 4462 }
1da177e4
LT		 4463 break;
4464 }
4465 } else {
4466 switch (data->reg_num) {
4467 case PHY_CTRL:
96838a40 4468 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4469 break;
2db10a08
AK		 4470 if (netif_running(adapter->netdev))
4471 e1000_reinit_locked(adapter);
4472 else
1da177e4
LT		 4473 e1000_reset(adapter);
4474 break;
4475 }
4476 }
97876fc6 4477 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4478 break;
4479 default:
4480 return -EOPNOTSUPP;
4481 }
4482 return E1000_SUCCESS;
4483}
4484
4485void
4486e1000_pci_set_mwi(struct e1000_hw *hw)
4487{
4488 struct e1000_adapter *adapter = hw->back;
2648345f 4489 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4490
96838a40 4491 if (ret_val)
2648345f 4492 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4493}
4494
4495void
4496e1000_pci_clear_mwi(struct e1000_hw *hw)
4497{
4498 struct e1000_adapter *adapter = hw->back;
4499
4500 pci_clear_mwi(adapter->pdev);
4501}
4502
4503void
4504e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4505{
4506 struct e1000_adapter *adapter = hw->back;
4507
4508 pci_read_config_word(adapter->pdev, reg, value);
4509}
4510
4511void
4512e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4513{
4514 struct e1000_adapter *adapter = hw->back;
4515
4516 pci_write_config_word(adapter->pdev, reg, *value);
4517}
4518
caeccb68
JK		 4519int32_t
4520e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4521{
4522 struct e1000_adapter *adapter = hw->back;
4523 uint16_t cap_offset;
4524
4525 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4526 if (!cap_offset)
4527 return -E1000_ERR_CONFIG;
4528
4529 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4530
4531 return E1000_SUCCESS;
4532}
4533
1da177e4
LT		 4534void
4535e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4536{
4537 outl(value, port);
4538}
4539
4540static void
4541e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4542{
60490fe0 4543 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4544 uint32_t ctrl, rctl;
4545
4546 e1000_irq_disable(adapter);
4547 adapter->vlgrp = grp;
4548
96838a40 4549 if (grp) {
1da177e4
LT		 4550 /* enable VLAN tag insert/strip */
4551 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4552 ctrl |= E1000_CTRL_VME;
4553 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4554
cd94dd0b 4555 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4556 /* enable VLAN receive filtering */
4557 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4558 rctl |= E1000_RCTL_VFE;
4559 rctl &= ~E1000_RCTL_CFIEN;
4560 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4561 e1000_update_mng_vlan(adapter);
cd94dd0b 4562 }
1da177e4
LT		 4563 } else {
4564 /* disable VLAN tag insert/strip */
4565 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4566 ctrl &= ~E1000_CTRL_VME;
4567 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4568
cd94dd0b 4569 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4570 /* disable VLAN filtering */
4571 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4572 rctl &= ~E1000_RCTL_VFE;
4573 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4574 if (adapter->mng_vlan_id !=
4575 (uint16_t)E1000_MNG_VLAN_NONE) {
4576 e1000_vlan_rx_kill_vid(netdev,
4577 adapter->mng_vlan_id);
4578 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4579 }
cd94dd0b 4580 }
1da177e4
LT		 4581 }
4582
4583 e1000_irq_enable(adapter);
4584}
4585
4586static void
4587e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4588{
60490fe0 4589 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4590 uint32_t vfta, index;
96838a40
JB		 4591
4592 if ((adapter->hw.mng_cookie.status &
4593 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4594 (vid == adapter->mng_vlan_id))
2d7edb92 4595 return;
1da177e4
LT		 4596 /* add VID to filter table */
4597 index = (vid >> 5) & 0x7F;
4598 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4599 vfta |= (1 << (vid & 0x1F));
4600 e1000_write_vfta(&adapter->hw, index, vfta);
4601}
4602
4603static void
4604e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4605{
60490fe0 4606 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4607 uint32_t vfta, index;
4608
4609 e1000_irq_disable(adapter);
4610
96838a40 4611 if (adapter->vlgrp)
1da177e4
LT		 4612 adapter->vlgrp->vlan_devices[vid] = NULL;
4613
4614 e1000_irq_enable(adapter);
4615
96838a40
JB		 4616 if ((adapter->hw.mng_cookie.status &
4617 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4618 (vid == adapter->mng_vlan_id)) {
4619 /* release control to f/w */
4620 e1000_release_hw_control(adapter);
2d7edb92 4621 return;
ff147013
JK		 4622 }
4623
1da177e4
LT		 4624 /* remove VID from filter table */
4625 index = (vid >> 5) & 0x7F;
4626 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4627 vfta &= ~(1 << (vid & 0x1F));
4628 e1000_write_vfta(&adapter->hw, index, vfta);
4629}
4630
4631static void
4632e1000_restore_vlan(struct e1000_adapter *adapter)
4633{
4634 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4635
96838a40 4636 if (adapter->vlgrp) {
1da177e4 4637 uint16_t vid;
96838a40
JB		 4638 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4639 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4640 continue;
4641 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4642 }
4643 }
4644}
4645
4646int
4647e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4648{
4649 adapter->hw.autoneg = 0;
4650
6921368f 4651 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4652 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4653 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4654 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4655 return -EINVAL;
4656 }
4657
96838a40 4658 switch (spddplx) {
1da177e4
LT		 4659 case SPEED_10 + DUPLEX_HALF:
4660 adapter->hw.forced_speed_duplex = e1000_10_half;
4661 break;
4662 case SPEED_10 + DUPLEX_FULL:
4663 adapter->hw.forced_speed_duplex = e1000_10_full;
4664 break;
4665 case SPEED_100 + DUPLEX_HALF:
4666 adapter->hw.forced_speed_duplex = e1000_100_half;
4667 break;
4668 case SPEED_100 + DUPLEX_FULL:
4669 adapter->hw.forced_speed_duplex = e1000_100_full;
4670 break;
4671 case SPEED_1000 + DUPLEX_FULL:
4672 adapter->hw.autoneg = 1;
4673 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4674 break;
4675 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4676 default:
2648345f 4677 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4678 return -EINVAL;
4679 }
4680 return 0;
4681}
4682
b6a1d5f8 4683#ifdef CONFIG_PM
0f15a8fa
JK		 4684/* Save/restore 16 or 64 dwords of PCI config space depending on which
4685 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4686 */
4687#define PCIE_CONFIG_SPACE_LEN 256
4688#define PCI_CONFIG_SPACE_LEN 64
4689static int
4690e1000_pci_save_state(struct e1000_adapter *adapter)
4691{
4692 struct pci_dev *dev = adapter->pdev;
4693 int size;
4694 int i;
0f15a8fa 4695
2f82665f
JB		 4696 if (adapter->hw.mac_type >= e1000_82571)
4697 size = PCIE_CONFIG_SPACE_LEN;
4698 else
4699 size = PCI_CONFIG_SPACE_LEN;
4700
4701 WARN_ON(adapter->config_space != NULL);
4702
4703 adapter->config_space = kmalloc(size, GFP_KERNEL);
4704 if (!adapter->config_space) {
4705 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4706 return -ENOMEM;
4707 }
4708 for (i = 0; i < (size / 4); i++)
4709 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4710 return 0;
4711}
4712
4713static void
4714e1000_pci_restore_state(struct e1000_adapter *adapter)
4715{
4716 struct pci_dev *dev = adapter->pdev;
4717 int size;
4718 int i;
0f15a8fa 4719
2f82665f
JB		 4720 if (adapter->config_space == NULL)
4721 return;
0f15a8fa 4722
2f82665f
JB		 4723 if (adapter->hw.mac_type >= e1000_82571)
4724 size = PCIE_CONFIG_SPACE_LEN;
4725 else
4726 size = PCI_CONFIG_SPACE_LEN;
4727 for (i = 0; i < (size / 4); i++)
4728 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4729 kfree(adapter->config_space);
4730 adapter->config_space = NULL;
4731 return;
4732}
4733#endif /* CONFIG_PM */
4734
1da177e4 4735static int
829ca9a3 4736e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4737{
4738 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4739 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4740 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4741 uint32_t wufc = adapter->wol;
6fdfef16 4742#ifdef CONFIG_PM
240b1710 4743 int retval = 0;
6fdfef16 4744#endif
1da177e4
LT		 4745
4746 netif_device_detach(netdev);
4747
2db10a08
AK		 4748 if (netif_running(netdev)) {
4749 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4750 e1000_down(adapter);
2db10a08 4751 }
1da177e4 4752
2f82665f 4753#ifdef CONFIG_PM
0f15a8fa
JK		 4754 /* Implement our own version of pci_save_state(pdev) because pci-
4755 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4756 retval = e1000_pci_save_state(adapter);
4757 if (retval)
4758 return retval;
4759#endif
4760
1da177e4 4761 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4762 if (status & E1000_STATUS_LU)
1da177e4
LT		 4763 wufc &= ~E1000_WUFC_LNKC;
4764
96838a40 4765 if (wufc) {
1da177e4
LT		 4766 e1000_setup_rctl(adapter);
4767 e1000_set_multi(netdev);
4768
4769 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4770 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 4771 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4772 rctl |= E1000_RCTL_MPE;
4773 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4774 }
4775
96838a40 4776 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4777 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4778 /* advertise wake from D3Cold */
4779 #define E1000_CTRL_ADVD3WUC 0x00100000
4780 /* phy power management enable */
4781 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4782 ctrl |= E1000_CTRL_ADVD3WUC |
4783 E1000_CTRL_EN_PHY_PWR_MGMT;
4784 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4785 }
4786
96838a40 4787 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4788 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4789 /* keep the laser running in D3 */
4790 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4791 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4792 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4793 }
4794
2d7edb92
MC		 4795 /* Allow time for pending master requests to run */
4796 e1000_disable_pciex_master(&adapter->hw);
4797
1da177e4
LT		 4798 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4799 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4800 pci_enable_wake(pdev, PCI_D3hot, 1);
4801 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4802 } else {
4803 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4804 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4805 pci_enable_wake(pdev, PCI_D3hot, 0);
4806 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4807 }
4808
4ccc12ae
JB		 4809 if (adapter->hw.mac_type >= e1000_82540 &&
4810 adapter->hw.mac_type < e1000_82571 &&
4811 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4 4812 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4813 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4814 manc |= E1000_MANC_ARP_EN;
4815 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4816 pci_enable_wake(pdev, PCI_D3hot, 1);
4817 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4818 }
4819 }
4820
cd94dd0b
AK		 4821 if (adapter->hw.phy_type == e1000_phy_igp_3)
4822 e1000_phy_powerdown_workaround(&adapter->hw);
4823
edd106fc
AK		 4824 if (netif_running(netdev))
4825 e1000_free_irq(adapter);
4826
b55ccb35
JK		 4827 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4828 * would have already happened in close and is redundant. */
4829 e1000_release_hw_control(adapter);
2d7edb92 4830
1da177e4 4831 pci_disable_device(pdev);
240b1710 4832
d0e027db 4833 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4834
4835 return 0;
4836}
4837
2f82665f 4838#ifdef CONFIG_PM
1da177e4
LT		 4839static int
4840e1000_resume(struct pci_dev *pdev)
4841{
4842 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4843 struct e1000_adapter *adapter = netdev_priv(netdev);
3d1dd8cb 4844 uint32_t manc, err;
1da177e4 4845
d0e027db 4846 pci_set_power_state(pdev, PCI_D0);
2f82665f 4847 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 4848 if ((err = pci_enable_device(pdev))) {
4849 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4850 return err;
4851 }
a4cb847d 4852 pci_set_master(pdev);
1da177e4 4853
d0e027db
AK		 4854 pci_enable_wake(pdev, PCI_D3hot, 0);
4855 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4856
edd106fc
AK		 4857 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
4858 return err;
4859
4860 e1000_power_up_phy(adapter);
1da177e4
LT		 4861 e1000_reset(adapter);
4862 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4863
96838a40 4864 if (netif_running(netdev))
1da177e4
LT		 4865 e1000_up(adapter);
4866
4867 netif_device_attach(netdev);
4868
4ccc12ae
JB		 4869 if (adapter->hw.mac_type >= e1000_82540 &&
4870 adapter->hw.mac_type < e1000_82571 &&
4871 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4872 manc = E1000_READ_REG(&adapter->hw, MANC);
4873 manc &= ~(E1000_MANC_ARP_EN);
4874 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4875 }
4876
b55ccb35
JK		 4877 /* If the controller is 82573 and f/w is AMT, do not set
4878 * DRV_LOAD until the interface is up. For all other cases,
4879 * let the f/w know that the h/w is now under the control
4880 * of the driver. */
4881 if (adapter->hw.mac_type != e1000_82573 ||
4882 !e1000_check_mng_mode(&adapter->hw))
4883 e1000_get_hw_control(adapter);
2d7edb92 4884
1da177e4
LT		 4885 return 0;
4886}
4887#endif
c653e635
AK		 4888
4889static void e1000_shutdown(struct pci_dev *pdev)
4890{
4891 e1000_suspend(pdev, PMSG_SUSPEND);
4892}
4893
1da177e4
LT		 4894#ifdef CONFIG_NET_POLL_CONTROLLER
4895/*
4896 * Polling 'interrupt' - used by things like netconsole to send skbs
4897 * without having to re-enable interrupts. It's not called while
4898 * the interrupt routine is executing.
4899 */
4900static void
2648345f 4901e1000_netpoll(struct net_device *netdev)
1da177e4 4902{
60490fe0 4903 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4904
1da177e4 4905 disable_irq(adapter->pdev->irq);
7d12e780 4906 e1000_intr(adapter->pdev->irq, netdev);
c4cfe567 4907 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4908#ifndef CONFIG_E1000_NAPI
4909 adapter->clean_rx(adapter, adapter->rx_ring);
4910#endif
1da177e4
LT		 4911 enable_irq(adapter->pdev->irq);
4912}
4913#endif
4914
9026729b
AK		 4915/**
4916 * e1000_io_error_detected - called when PCI error is detected
4917 * @pdev: Pointer to PCI device
4918 * @state: The current pci conneection state
4919 *
4920 * This function is called after a PCI bus error affecting
4921 * this device has been detected.
4922 */
4923static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4924{
4925 struct net_device *netdev = pci_get_drvdata(pdev);
4926 struct e1000_adapter *adapter = netdev->priv;
4927
4928 netif_device_detach(netdev);
4929
4930 if (netif_running(netdev))
4931 e1000_down(adapter);
72e8d6bb 4932 pci_disable_device(pdev);
9026729b
AK		 4933
4934 /* Request a slot slot reset. */
4935 return PCI_ERS_RESULT_NEED_RESET;
4936}
4937
4938/**
4939 * e1000_io_slot_reset - called after the pci bus has been reset.
4940 * @pdev: Pointer to PCI device
4941 *
4942 * Restart the card from scratch, as if from a cold-boot. Implementation
4943 * resembles the first-half of the e1000_resume routine.
4944 */
4945static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4946{
4947 struct net_device *netdev = pci_get_drvdata(pdev);
4948 struct e1000_adapter *adapter = netdev->priv;
4949
4950 if (pci_enable_device(pdev)) {
4951 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4952 return PCI_ERS_RESULT_DISCONNECT;
4953 }
4954 pci_set_master(pdev);
4955
dbf38c94
LV		 4956 pci_enable_wake(pdev, PCI_D3hot, 0);
4957 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4958
9026729b
AK		 4959 e1000_reset(adapter);
4960 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4961
4962 return PCI_ERS_RESULT_RECOVERED;
4963}
4964
4965/**
4966 * e1000_io_resume - called when traffic can start flowing again.
4967 * @pdev: Pointer to PCI device
4968 *
4969 * This callback is called when the error recovery driver tells us that
4970 * its OK to resume normal operation. Implementation resembles the
4971 * second-half of the e1000_resume routine.
4972 */
4973static void e1000_io_resume(struct pci_dev *pdev)
4974{
4975 struct net_device *netdev = pci_get_drvdata(pdev);
4976 struct e1000_adapter *adapter = netdev->priv;
4977 uint32_t manc, swsm;
4978
4979 if (netif_running(netdev)) {
4980 if (e1000_up(adapter)) {
4981 printk("e1000: can't bring device back up after reset\n");
4982 return;
4983 }
4984 }
4985
4986 netif_device_attach(netdev);
4987
4988 if (adapter->hw.mac_type >= e1000_82540 &&
4ccc12ae 4989 adapter->hw.mac_type < e1000_82571 &&
9026729b
AK		 4990 adapter->hw.media_type == e1000_media_type_copper) {
4991 manc = E1000_READ_REG(&adapter->hw, MANC);
4992 manc &= ~(E1000_MANC_ARP_EN);
4993 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4994 }
4995
4996 switch (adapter->hw.mac_type) {
4997 case e1000_82573:
4998 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4999 E1000_WRITE_REG(&adapter->hw, SWSM,
5000 swsm | E1000_SWSM_DRV_LOAD);
5001 break;
5002 default:
5003 break;
5004 }
5005
5006 if (netif_running(netdev))
5007 mod_timer(&adapter->watchdog_timer, jiffies);
5008}
5009
1da177e4 5010/* e1000_main.c */
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