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e1000: Avoid unhandled IRQ
[mirror_ubuntu-artful-kernel.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
451152d9 4 Copyright(c) 1999 - 2010 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
c920aa8b 57#define DRV_VERSION "1.2.20" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
102 /* RX Registers */
103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
118 /* TX Registers */
119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
163 reginfo->name, __er32(hw, reginfo->ofs));
164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
174
175/*
176 * e1000e_dump - Print registers, tx-ring and rx-ring
177 */
178static void e1000e_dump(struct e1000_adapter *adapter)
179{
180 struct net_device *netdev = adapter->netdev;
181 struct e1000_hw *hw = &adapter->hw;
182 struct e1000_reg_info *reginfo;
183 struct e1000_ring *tx_ring = adapter->tx_ring;
184 struct e1000_tx_desc *tx_desc;
185 struct my_u0 { u64 a; u64 b; } *u0;
186 struct e1000_buffer *buffer_info;
187 struct e1000_ring *rx_ring = adapter->rx_ring;
188 union e1000_rx_desc_packet_split *rx_desc_ps;
189 struct e1000_rx_desc *rx_desc;
190 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
191 u32 staterr;
192 int i = 0;
193
194 if (!netif_msg_hw(adapter))
195 return;
196
197 /* Print netdevice Info */
198 if (netdev) {
199 dev_info(&adapter->pdev->dev, "Net device Info\n");
200 printk(KERN_INFO "Device Name state "
201 "trans_start last_rx\n");
202 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
203 netdev->name,
204 netdev->state,
205 netdev->trans_start,
206 netdev->last_rx);
207 }
208
209 /* Print Registers */
210 dev_info(&adapter->pdev->dev, "Register Dump\n");
211 printk(KERN_INFO " Register Name Value\n");
212 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
213 reginfo->name; reginfo++) {
214 e1000_regdump(hw, reginfo);
215 }
216
217 /* Print TX Ring Summary */
218 if (!netdev || !netif_running(netdev))
219 goto exit;
220
221 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
222 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
223 " leng ntw timestamp\n");
224 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
225 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
226 0, tx_ring->next_to_use, tx_ring->next_to_clean,
8eb64e6b 227 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 228 buffer_info->length,
229 buffer_info->next_to_watch,
8eb64e6b 230 (unsigned long long)buffer_info->time_stamp);
84f4ee90
TI		 231
232 /* Print TX Rings */
233 if (!netif_msg_tx_done(adapter))
234 goto rx_ring_summary;
235
236 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
237
238 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
239 *
240 * Legacy Transmit Descriptor
241 * +--------------------------------------------------------------+
242 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
243 * +--------------------------------------------------------------+
244 * 8 | Special | CSS | Status | CMD | CSO | Length |
245 * +--------------------------------------------------------------+
246 * 63 48 47 36 35 32 31 24 23 16 15 0
247 *
248 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
249 * 63 48 47 40 39 32 31 16 15 8 7 0
250 * +----------------------------------------------------------------+
251 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
252 * +----------------------------------------------------------------+
253 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
254 * +----------------------------------------------------------------+
255 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
256 *
257 * Extended Data Descriptor (DTYP=0x1)
258 * +----------------------------------------------------------------+
259 * 0 | Buffer Address [63:0] |
260 * +----------------------------------------------------------------+
261 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
262 * +----------------------------------------------------------------+
263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 */
265 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Legacy format\n");
268 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Context format\n");
271 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
272 " [bi->dma ] leng ntw timestamp bi->skb "
273 "<-- Ext Data format\n");
274 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
275 tx_desc = E1000_TX_DESC(*tx_ring, i);
276 buffer_info = &tx_ring->buffer_info[i];
277 u0 = (struct my_u0 *)tx_desc;
278 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
279 "%04X %3X %016llX %p",
280 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
281 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 282 (unsigned long long)le64_to_cpu(u0->a),
283 (unsigned long long)le64_to_cpu(u0->b),
284 (unsigned long long)buffer_info->dma,
285 buffer_info->length, buffer_info->next_to_watch,
286 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 287 buffer_info->skb);
288 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
289 printk(KERN_CONT " NTC/U\n");
290 else if (i == tx_ring->next_to_use)
291 printk(KERN_CONT " NTU\n");
292 else if (i == tx_ring->next_to_clean)
293 printk(KERN_CONT " NTC\n");
294 else
295 printk(KERN_CONT "\n");
296
297 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
299 16, 1, phys_to_virt(buffer_info->dma),
300 buffer_info->length, true);
301 }
302
303 /* Print RX Rings Summary */
304rx_ring_summary:
305 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
306 printk(KERN_INFO "Queue [NTU] [NTC]\n");
307 printk(KERN_INFO " %5d %5X %5X\n", 0,
308 rx_ring->next_to_use, rx_ring->next_to_clean);
309
310 /* Print RX Rings */
311 if (!netif_msg_rx_status(adapter))
312 goto exit;
313
314 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
315 switch (adapter->rx_ps_pages) {
316 case 1:
317 case 2:
318 case 3:
319 /* [Extended] Packet Split Receive Descriptor Format
320 *
321 * +-----------------------------------------------------+
322 * 0 | Buffer Address 0 [63:0] |
323 * +-----------------------------------------------------+
324 * 8 | Buffer Address 1 [63:0] |
325 * +-----------------------------------------------------+
326 * 16 | Buffer Address 2 [63:0] |
327 * +-----------------------------------------------------+
328 * 24 | Buffer Address 3 [63:0] |
329 * +-----------------------------------------------------+
330 */
331 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
332 "[buffer 1 63:0 ] "
333 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
334 "[bi->skb] <-- Ext Pkt Split format\n");
335 /* [Extended] Receive Descriptor (Write-Back) Format
336 *
337 * 63 48 47 32 31 13 12 8 7 4 3 0
338 * +------------------------------------------------------+
339 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
340 * | Checksum | Ident | | Queue | | Type |
341 * +------------------------------------------------------+
342 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
343 * +------------------------------------------------------+
344 * 63 48 47 32 31 20 19 0
345 */
346 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
347 "[vl l0 ee es] "
348 "[ l3 l2 l1 hs] [reserved ] ---------------- "
349 "[bi->skb] <-- Ext Rx Write-Back format\n");
350 for (i = 0; i < rx_ring->count; i++) {
351 buffer_info = &rx_ring->buffer_info[i];
352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
353 u1 = (struct my_u1 *)rx_desc_ps;
354 staterr =
355 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
356 if (staterr & E1000_RXD_STAT_DD) {
357 /* Descriptor Done */
358 printk(KERN_INFO "RWB[0x%03X] %016llX "
359 "%016llX %016llX %016llX "
360 "---------------- %p", i,
8eb64e6b
BA		 361 (unsigned long long)le64_to_cpu(u1->a),
362 (unsigned long long)le64_to_cpu(u1->b),
363 (unsigned long long)le64_to_cpu(u1->c),
364 (unsigned long long)le64_to_cpu(u1->d),
84f4ee90
TI		 365 buffer_info->skb);
366 } else {
367 printk(KERN_INFO "R [0x%03X] %016llX "
368 "%016llX %016llX %016llX %016llX %p", i,
8eb64e6b
BA		 369 (unsigned long long)le64_to_cpu(u1->a),
370 (unsigned long long)le64_to_cpu(u1->b),
371 (unsigned long long)le64_to_cpu(u1->c),
372 (unsigned long long)le64_to_cpu(u1->d),
373 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 374 buffer_info->skb);
375
376 if (netif_msg_pktdata(adapter))
377 print_hex_dump(KERN_INFO, "",
378 DUMP_PREFIX_ADDRESS, 16, 1,
379 phys_to_virt(buffer_info->dma),
380 adapter->rx_ps_bsize0, true);
381 }
382
383 if (i == rx_ring->next_to_use)
384 printk(KERN_CONT " NTU\n");
385 else if (i == rx_ring->next_to_clean)
386 printk(KERN_CONT " NTC\n");
387 else
388 printk(KERN_CONT "\n");
389 }
390 break;
391 default:
392 case 0:
393 /* Legacy Receive Descriptor Format
394 *
395 * +-----------------------------------------------------+
396 * | Buffer Address [63:0] |
397 * +-----------------------------------------------------+
398 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
399 * +-----------------------------------------------------+
400 * 63 48 47 40 39 32 31 16 15 0
401 */
402 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
403 "[vl er S cks ln] [bi->dma ] [bi->skb] "
404 "<-- Legacy format\n");
405 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
406 rx_desc = E1000_RX_DESC(*rx_ring, i);
407 buffer_info = &rx_ring->buffer_info[i];
408 u0 = (struct my_u0 *)rx_desc;
409 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
8eb64e6b
BA		 410 "%016llX %p", i,
411 (unsigned long long)le64_to_cpu(u0->a),
412 (unsigned long long)le64_to_cpu(u0->b),
413 (unsigned long long)buffer_info->dma,
414 buffer_info->skb);
84f4ee90
TI		 415 if (i == rx_ring->next_to_use)
416 printk(KERN_CONT " NTU\n");
417 else if (i == rx_ring->next_to_clean)
418 printk(KERN_CONT " NTC\n");
419 else
420 printk(KERN_CONT "\n");
421
422 if (netif_msg_pktdata(adapter))
423 print_hex_dump(KERN_INFO, "",
424 DUMP_PREFIX_ADDRESS,
425 16, 1, phys_to_virt(buffer_info->dma),
426 adapter->rx_buffer_len, true);
427 }
428 }
429
430exit:
431 return;
432}
433
bc7f75fa
AK		 434/**
435 * e1000_desc_unused - calculate if we have unused descriptors
436 **/
437static int e1000_desc_unused(struct e1000_ring *ring)
438{
439 if (ring->next_to_clean > ring->next_to_use)
440 return ring->next_to_clean - ring->next_to_use - 1;
441
442 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
443}
444
445/**
ad68076e 446 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 447 * @adapter: board private structure
448 * @status: descriptor status field as written by hardware
449 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
450 * @skb: pointer to sk_buff to be indicated to stack
451 **/
452static void e1000_receive_skb(struct e1000_adapter *adapter,
453 struct net_device *netdev,
454 struct sk_buff *skb,
a39fe742 455 u8 status, __le16 vlan)
bc7f75fa
AK		 456{
457 skb->protocol = eth_type_trans(skb, netdev);
458
459 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 460 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
461 le16_to_cpu(vlan), skb);
bc7f75fa 462 else
89c88b16 463 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 464}
465
466/**
467 * e1000_rx_checksum - Receive Checksum Offload for 82543
468 * @adapter: board private structure
469 * @status_err: receive descriptor status and error fields
470 * @csum: receive descriptor csum field
471 * @sk_buff: socket buffer with received data
472 **/
473static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
474 u32 csum, struct sk_buff *skb)
475{
476 u16 status = (u16)status_err;
477 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 478
479 skb_checksum_none_assert(skb);
bc7f75fa
AK		 480
481 /* Ignore Checksum bit is set */
482 if (status & E1000_RXD_STAT_IXSM)
483 return;
484 /* TCP/UDP checksum error bit is set */
485 if (errors & E1000_RXD_ERR_TCPE) {
486 /* let the stack verify checksum errors */
487 adapter->hw_csum_err++;
488 return;
489 }
490
491 /* TCP/UDP Checksum has not been calculated */
492 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
493 return;
494
495 /* It must be a TCP or UDP packet with a valid checksum */
496 if (status & E1000_RXD_STAT_TCPCS) {
497 /* TCP checksum is good */
498 skb->ip_summed = CHECKSUM_UNNECESSARY;
499 } else {
ad68076e
BA		 500 /*
501 * IP fragment with UDP payload
502 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 503 * and then put the value in host order for further stack use.
504 */
a39fe742
AV		 505 __sum16 sum = (__force __sum16)htons(csum);
506 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 507 skb->ip_summed = CHECKSUM_COMPLETE;
508 }
509 adapter->hw_csum_good++;
510}
511
512/**
513 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
514 * @adapter: address of board private structure
515 **/
516static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
517 int cleaned_count)
518{
519 struct net_device *netdev = adapter->netdev;
520 struct pci_dev *pdev = adapter->pdev;
521 struct e1000_ring *rx_ring = adapter->rx_ring;
522 struct e1000_rx_desc *rx_desc;
523 struct e1000_buffer *buffer_info;
524 struct sk_buff *skb;
525 unsigned int i;
89d71a66 526 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 527
528 i = rx_ring->next_to_use;
529 buffer_info = &rx_ring->buffer_info[i];
530
531 while (cleaned_count--) {
532 skb = buffer_info->skb;
533 if (skb) {
534 skb_trim(skb, 0);
535 goto map_skb;
536 }
537
89d71a66 538 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 539 if (!skb) {
540 /* Better luck next round */
541 adapter->alloc_rx_buff_failed++;
542 break;
543 }
544
bc7f75fa
AK		 545 buffer_info->skb = skb;
546map_skb:
0be3f55f 547 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 548 adapter->rx_buffer_len,
0be3f55f
NN		 549 DMA_FROM_DEVICE);
550 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 551 dev_err(&pdev->dev, "RX DMA map failed\n");
552 adapter->rx_dma_failed++;
553 break;
554 }
555
556 rx_desc = E1000_RX_DESC(*rx_ring, i);
557 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
558
50849d79
TH		 559 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
560 /*
561 * Force memory writes to complete before letting h/w
562 * know there are new descriptors to fetch. (Only
563 * applicable for weak-ordered memory model archs,
564 * such as IA-64).
565 */
566 wmb();
567 writel(i, adapter->hw.hw_addr + rx_ring->tail);
568 }
bc7f75fa
AK		 569 i++;
570 if (i == rx_ring->count)
571 i = 0;
572 buffer_info = &rx_ring->buffer_info[i];
573 }
574
50849d79 575 rx_ring->next_to_use = i;
bc7f75fa
AK		 576}
577
578/**
579 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
580 * @adapter: address of board private structure
581 **/
582static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
583 int cleaned_count)
584{
585 struct net_device *netdev = adapter->netdev;
586 struct pci_dev *pdev = adapter->pdev;
587 union e1000_rx_desc_packet_split *rx_desc;
588 struct e1000_ring *rx_ring = adapter->rx_ring;
589 struct e1000_buffer *buffer_info;
590 struct e1000_ps_page *ps_page;
591 struct sk_buff *skb;
592 unsigned int i, j;
593
594 i = rx_ring->next_to_use;
595 buffer_info = &rx_ring->buffer_info[i];
596
597 while (cleaned_count--) {
598 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
599
600 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 601 ps_page = &buffer_info->ps_pages[j];
602 if (j >= adapter->rx_ps_pages) {
603 /* all unused desc entries get hw null ptr */
a39fe742 604 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 605 continue;
606 }
607 if (!ps_page->page) {
608 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 609 if (!ps_page->page) {
47f44e40
AK		 610 adapter->alloc_rx_buff_failed++;
611 goto no_buffers;
612 }
0be3f55f
NN		 613 ps_page->dma = dma_map_page(&pdev->dev,
614 ps_page->page,
615 0, PAGE_SIZE,
616 DMA_FROM_DEVICE);
617 if (dma_mapping_error(&pdev->dev,
618 ps_page->dma)) {
47f44e40
AK		 619 dev_err(&adapter->pdev->dev,
620 "RX DMA page map failed\n");
621 adapter->rx_dma_failed++;
622 goto no_buffers;
bc7f75fa 623 }
bc7f75fa 624 }
47f44e40
AK		 625 /*
626 * Refresh the desc even if buffer_addrs
627 * didn't change because each write-back
628 * erases this info.
629 */
630 rx_desc->read.buffer_addr[j+1] =
631 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 632 }
633
89d71a66
ED		 634 skb = netdev_alloc_skb_ip_align(netdev,
635 adapter->rx_ps_bsize0);
bc7f75fa
AK		 636
637 if (!skb) {
638 adapter->alloc_rx_buff_failed++;
639 break;
640 }
641
bc7f75fa 642 buffer_info->skb = skb;
0be3f55f 643 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 644 adapter->rx_ps_bsize0,
0be3f55f
NN		 645 DMA_FROM_DEVICE);
646 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 647 dev_err(&pdev->dev, "RX DMA map failed\n");
648 adapter->rx_dma_failed++;
649 /* cleanup skb */
650 dev_kfree_skb_any(skb);
651 buffer_info->skb = NULL;
652 break;
653 }
654
655 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
656
50849d79
TH		 657 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
658 /*
659 * Force memory writes to complete before letting h/w
660 * know there are new descriptors to fetch. (Only
661 * applicable for weak-ordered memory model archs,
662 * such as IA-64).
663 */
664 wmb();
665 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
666 }
667
bc7f75fa
AK		 668 i++;
669 if (i == rx_ring->count)
670 i = 0;
671 buffer_info = &rx_ring->buffer_info[i];
672 }
673
674no_buffers:
50849d79 675 rx_ring->next_to_use = i;
bc7f75fa
AK		 676}
677
97ac8cae
BA		 678/**
679 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
680 * @adapter: address of board private structure
97ac8cae
BA		 681 * @cleaned_count: number of buffers to allocate this pass
682 **/
683
684static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
685 int cleaned_count)
686{
687 struct net_device *netdev = adapter->netdev;
688 struct pci_dev *pdev = adapter->pdev;
689 struct e1000_rx_desc *rx_desc;
690 struct e1000_ring *rx_ring = adapter->rx_ring;
691 struct e1000_buffer *buffer_info;
692 struct sk_buff *skb;
693 unsigned int i;
89d71a66 694 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 695
696 i = rx_ring->next_to_use;
697 buffer_info = &rx_ring->buffer_info[i];
698
699 while (cleaned_count--) {
700 skb = buffer_info->skb;
701 if (skb) {
702 skb_trim(skb, 0);
703 goto check_page;
704 }
705
89d71a66 706 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 707 if (unlikely(!skb)) {
708 /* Better luck next round */
709 adapter->alloc_rx_buff_failed++;
710 break;
711 }
712
97ac8cae
BA		 713 buffer_info->skb = skb;
714check_page:
715 /* allocate a new page if necessary */
716 if (!buffer_info->page) {
717 buffer_info->page = alloc_page(GFP_ATOMIC);
718 if (unlikely(!buffer_info->page)) {
719 adapter->alloc_rx_buff_failed++;
720 break;
721 }
722 }
723
724 if (!buffer_info->dma)
0be3f55f 725 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 726 buffer_info->page, 0,
727 PAGE_SIZE,
0be3f55f 728 DMA_FROM_DEVICE);
97ac8cae
BA		 729
730 rx_desc = E1000_RX_DESC(*rx_ring, i);
731 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
732
733 if (unlikely(++i == rx_ring->count))
734 i = 0;
735 buffer_info = &rx_ring->buffer_info[i];
736 }
737
738 if (likely(rx_ring->next_to_use != i)) {
739 rx_ring->next_to_use = i;
740 if (unlikely(i-- == 0))
741 i = (rx_ring->count - 1);
742
743 /* Force memory writes to complete before letting h/w
744 * know there are new descriptors to fetch. (Only
745 * applicable for weak-ordered memory model archs,
746 * such as IA-64). */
747 wmb();
748 writel(i, adapter->hw.hw_addr + rx_ring->tail);
749 }
750}
751
bc7f75fa
AK		 752/**
753 * e1000_clean_rx_irq - Send received data up the network stack; legacy
754 * @adapter: board private structure
755 *
756 * the return value indicates whether actual cleaning was done, there
757 * is no guarantee that everything was cleaned
758 **/
759static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
760 int *work_done, int work_to_do)
761{
762 struct net_device *netdev = adapter->netdev;
763 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 764 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 765 struct e1000_ring *rx_ring = adapter->rx_ring;
766 struct e1000_rx_desc *rx_desc, *next_rxd;
767 struct e1000_buffer *buffer_info, *next_buffer;
768 u32 length;
769 unsigned int i;
770 int cleaned_count = 0;
771 bool cleaned = 0;
772 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
773
774 i = rx_ring->next_to_clean;
775 rx_desc = E1000_RX_DESC(*rx_ring, i);
776 buffer_info = &rx_ring->buffer_info[i];
777
778 while (rx_desc->status & E1000_RXD_STAT_DD) {
779 struct sk_buff *skb;
780 u8 status;
781
782 if (*work_done >= work_to_do)
783 break;
784 (*work_done)++;
2d0bb1c1 785 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 786
787 status = rx_desc->status;
788 skb = buffer_info->skb;
789 buffer_info->skb = NULL;
790
791 prefetch(skb->data - NET_IP_ALIGN);
792
793 i++;
794 if (i == rx_ring->count)
795 i = 0;
796 next_rxd = E1000_RX_DESC(*rx_ring, i);
797 prefetch(next_rxd);
798
799 next_buffer = &rx_ring->buffer_info[i];
800
801 cleaned = 1;
802 cleaned_count++;
0be3f55f 803 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 804 buffer_info->dma,
805 adapter->rx_buffer_len,
0be3f55f 806 DMA_FROM_DEVICE);
bc7f75fa
AK		 807 buffer_info->dma = 0;
808
809 length = le16_to_cpu(rx_desc->length);
810
b94b5028
JB		 811 /*
812 * !EOP means multiple descriptors were used to store a single
813 * packet, if that's the case we need to toss it. In fact, we
814 * need to toss every packet with the EOP bit clear and the
815 * next frame that _does_ have the EOP bit set, as it is by
816 * definition only a frame fragment
817 */
818 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
819 adapter->flags2 |= FLAG2_IS_DISCARDING;
820
821 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 822 /* All receives must fit into a single buffer */
3bb99fe2 823 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 824 /* recycle */
825 buffer_info->skb = skb;
b94b5028
JB		 826 if (status & E1000_RXD_STAT_EOP)
827 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 828 goto next_desc;
829 }
830
831 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
832 /* recycle */
833 buffer_info->skb = skb;
834 goto next_desc;
835 }
836
eb7c3adb
JK		 837 /* adjust length to remove Ethernet CRC */
838 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
839 length -= 4;
840
bc7f75fa
AK		 841 total_rx_bytes += length;
842 total_rx_packets++;
843
ad68076e
BA		 844 /*
845 * code added for copybreak, this should improve
bc7f75fa 846 * performance for small packets with large amounts
ad68076e
BA		 847 * of reassembly being done in the stack
848 */
bc7f75fa
AK		 849 if (length < copybreak) {
850 struct sk_buff *new_skb =
89d71a66 851 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 852 if (new_skb) {
808ff676
BA		 853 skb_copy_to_linear_data_offset(new_skb,
854 -NET_IP_ALIGN,
855 (skb->data -
856 NET_IP_ALIGN),
857 (length +
858 NET_IP_ALIGN));
bc7f75fa
AK		 859 /* save the skb in buffer_info as good */
860 buffer_info->skb = skb;
861 skb = new_skb;
862 }
863 /* else just continue with the old one */
864 }
865 /* end copybreak code */
866 skb_put(skb, length);
867
868 /* Receive Checksum Offload */
869 e1000_rx_checksum(adapter,
870 (u32)(status) |
871 ((u32)(rx_desc->errors) << 24),
872 le16_to_cpu(rx_desc->csum), skb);
873
874 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
875
876next_desc:
877 rx_desc->status = 0;
878
879 /* return some buffers to hardware, one at a time is too slow */
880 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
881 adapter->alloc_rx_buf(adapter, cleaned_count);
882 cleaned_count = 0;
883 }
884
885 /* use prefetched values */
886 rx_desc = next_rxd;
887 buffer_info = next_buffer;
888 }
889 rx_ring->next_to_clean = i;
890
891 cleaned_count = e1000_desc_unused(rx_ring);
892 if (cleaned_count)
893 adapter->alloc_rx_buf(adapter, cleaned_count);
894
bc7f75fa 895 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 896 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 897 netdev->stats.rx_bytes += total_rx_bytes;
898 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 899 return cleaned;
900}
901
bc7f75fa
AK		 902static void e1000_put_txbuf(struct e1000_adapter *adapter,
903 struct e1000_buffer *buffer_info)
904{
03b1320d
AD		 905 if (buffer_info->dma) {
906 if (buffer_info->mapped_as_page)
0be3f55f
NN		 907 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
908 buffer_info->length, DMA_TO_DEVICE);
03b1320d 909 else
0be3f55f
NN		 910 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
911 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 912 buffer_info->dma = 0;
913 }
bc7f75fa
AK		 914 if (buffer_info->skb) {
915 dev_kfree_skb_any(buffer_info->skb);
916 buffer_info->skb = NULL;
917 }
1b7719c4 918 buffer_info->time_stamp = 0;
bc7f75fa
AK		 919}
920
41cec6f1 921static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 922{
41cec6f1
BA		 923 struct e1000_adapter *adapter = container_of(work,
924 struct e1000_adapter,
925 print_hang_task);
bc7f75fa
AK		 926 struct e1000_ring *tx_ring = adapter->tx_ring;
927 unsigned int i = tx_ring->next_to_clean;
928 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
929 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 930 struct e1000_hw *hw = &adapter->hw;
931 u16 phy_status, phy_1000t_status, phy_ext_status;
932 u16 pci_status;
933
934 e1e_rphy(hw, PHY_STATUS, &phy_status);
935 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
936 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 937
41cec6f1
BA		 938 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
939
940 /* detected Hardware unit hang */
941 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 942 " TDH <%x>\n"
943 " TDT <%x>\n"
944 " next_to_use <%x>\n"
945 " next_to_clean <%x>\n"
946 "buffer_info[next_to_clean]:\n"
947 " time_stamp <%lx>\n"
948 " next_to_watch <%x>\n"
949 " jiffies <%lx>\n"
41cec6f1
BA		 950 " next_to_watch.status <%x>\n"
951 "MAC Status <%x>\n"
952 "PHY Status <%x>\n"
953 "PHY 1000BASE-T Status <%x>\n"
954 "PHY Extended Status <%x>\n"
955 "PCI Status <%x>\n",
44defeb3
JK		 956 readl(adapter->hw.hw_addr + tx_ring->head),
957 readl(adapter->hw.hw_addr + tx_ring->tail),
958 tx_ring->next_to_use,
959 tx_ring->next_to_clean,
960 tx_ring->buffer_info[eop].time_stamp,
961 eop,
962 jiffies,
41cec6f1
BA		 963 eop_desc->upper.fields.status,
964 er32(STATUS),
965 phy_status,
966 phy_1000t_status,
967 phy_ext_status,
968 pci_status);
bc7f75fa
AK		 969}
970
971/**
972 * e1000_clean_tx_irq - Reclaim resources after transmit completes
973 * @adapter: board private structure
974 *
975 * the return value indicates whether actual cleaning was done, there
976 * is no guarantee that everything was cleaned
977 **/
978static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
979{
980 struct net_device *netdev = adapter->netdev;
981 struct e1000_hw *hw = &adapter->hw;
982 struct e1000_ring *tx_ring = adapter->tx_ring;
983 struct e1000_tx_desc *tx_desc, *eop_desc;
984 struct e1000_buffer *buffer_info;
985 unsigned int i, eop;
986 unsigned int count = 0;
bc7f75fa
AK		 987 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
988
989 i = tx_ring->next_to_clean;
990 eop = tx_ring->buffer_info[i].next_to_watch;
991 eop_desc = E1000_TX_DESC(*tx_ring, eop);
992
12d04a3c
AD		 993 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
994 (count < tx_ring->count)) {
a86043c2 995 bool cleaned = false;
2d0bb1c1 996 rmb(); /* read buffer_info after eop_desc */
a86043c2 997 for (; !cleaned; count++) {
bc7f75fa
AK		 998 tx_desc = E1000_TX_DESC(*tx_ring, i);
999 buffer_info = &tx_ring->buffer_info[i];
1000 cleaned = (i == eop);
1001
1002 if (cleaned) {
9ed318d5
TH		 1003 total_tx_packets += buffer_info->segs;
1004 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1005 }
1006
1007 e1000_put_txbuf(adapter, buffer_info);
1008 tx_desc->upper.data = 0;
1009
1010 i++;
1011 if (i == tx_ring->count)
1012 i = 0;
1013 }
1014
dac87619
TL		 1015 if (i == tx_ring->next_to_use)
1016 break;
bc7f75fa
AK		 1017 eop = tx_ring->buffer_info[i].next_to_watch;
1018 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1019 }
1020
1021 tx_ring->next_to_clean = i;
1022
1023#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1024 if (count && netif_carrier_ok(netdev) &&
1025 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1026 /* Make sure that anybody stopping the queue after this
1027 * sees the new next_to_clean.
1028 */
1029 smp_mb();
1030
1031 if (netif_queue_stopped(netdev) &&
1032 !(test_bit(__E1000_DOWN, &adapter->state))) {
1033 netif_wake_queue(netdev);
1034 ++adapter->restart_queue;
1035 }
1036 }
1037
1038 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1039 /*
1040 * Detect a transmit hang in hardware, this serializes the
1041 * check with the clearing of time_stamp and movement of i
1042 */
bc7f75fa 1043 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1044 if (tx_ring->buffer_info[i].time_stamp &&
1045 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1046 + (adapter->tx_timeout_factor * HZ)) &&
1047 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1048 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1049 netif_stop_queue(netdev);
1050 }
1051 }
1052 adapter->total_tx_bytes += total_tx_bytes;
1053 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1054 netdev->stats.tx_bytes += total_tx_bytes;
1055 netdev->stats.tx_packets += total_tx_packets;
807540ba 1056 return count < tx_ring->count;
bc7f75fa
AK		 1057}
1058
bc7f75fa
AK		 1059/**
1060 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1061 * @adapter: board private structure
1062 *
1063 * the return value indicates whether actual cleaning was done, there
1064 * is no guarantee that everything was cleaned
1065 **/
1066static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1067 int *work_done, int work_to_do)
1068{
3bb99fe2 1069 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1070 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1071 struct net_device *netdev = adapter->netdev;
1072 struct pci_dev *pdev = adapter->pdev;
1073 struct e1000_ring *rx_ring = adapter->rx_ring;
1074 struct e1000_buffer *buffer_info, *next_buffer;
1075 struct e1000_ps_page *ps_page;
1076 struct sk_buff *skb;
1077 unsigned int i, j;
1078 u32 length, staterr;
1079 int cleaned_count = 0;
1080 bool cleaned = 0;
1081 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1082
1083 i = rx_ring->next_to_clean;
1084 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1085 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1086 buffer_info = &rx_ring->buffer_info[i];
1087
1088 while (staterr & E1000_RXD_STAT_DD) {
1089 if (*work_done >= work_to_do)
1090 break;
1091 (*work_done)++;
1092 skb = buffer_info->skb;
2d0bb1c1 1093 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1094
1095 /* in the packet split case this is header only */
1096 prefetch(skb->data - NET_IP_ALIGN);
1097
1098 i++;
1099 if (i == rx_ring->count)
1100 i = 0;
1101 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1102 prefetch(next_rxd);
1103
1104 next_buffer = &rx_ring->buffer_info[i];
1105
1106 cleaned = 1;
1107 cleaned_count++;
0be3f55f 1108 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1109 adapter->rx_ps_bsize0,
0be3f55f 1110 DMA_FROM_DEVICE);
bc7f75fa
AK		 1111 buffer_info->dma = 0;
1112
b94b5028
JB		 1113 /* see !EOP comment in other rx routine */
1114 if (!(staterr & E1000_RXD_STAT_EOP))
1115 adapter->flags2 |= FLAG2_IS_DISCARDING;
1116
1117 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1118 e_dbg("Packet Split buffers didn't pick up the full "
1119 "packet\n");
bc7f75fa 1120 dev_kfree_skb_irq(skb);
b94b5028
JB		 1121 if (staterr & E1000_RXD_STAT_EOP)
1122 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1123 goto next_desc;
1124 }
1125
1126 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1127 dev_kfree_skb_irq(skb);
1128 goto next_desc;
1129 }
1130
1131 length = le16_to_cpu(rx_desc->wb.middle.length0);
1132
1133 if (!length) {
3bb99fe2
BA		 1134 e_dbg("Last part of the packet spanning multiple "
1135 "descriptors\n");
bc7f75fa
AK		 1136 dev_kfree_skb_irq(skb);
1137 goto next_desc;
1138 }
1139
1140 /* Good Receive */
1141 skb_put(skb, length);
1142
1143 {
ad68076e
BA		 1144 /*
1145 * this looks ugly, but it seems compiler issues make it
1146 * more efficient than reusing j
1147 */
bc7f75fa
AK		 1148 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1149
ad68076e
BA		 1150 /*
1151 * page alloc/put takes too long and effects small packet
1152 * throughput, so unsplit small packets and save the alloc/put
1153 * only valid in softirq (napi) context to call kmap_*
1154 */
bc7f75fa
AK		 1155 if (l1 && (l1 <= copybreak) &&
1156 ((length + l1) <= adapter->rx_ps_bsize0)) {
1157 u8 *vaddr;
1158
47f44e40 1159 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1160
ad68076e
BA		 1161 /*
1162 * there is no documentation about how to call
bc7f75fa 1163 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1164 * very long
1165 */
0be3f55f
NN		 1166 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1167 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1168 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1169 memcpy(skb_tail_pointer(skb), vaddr, l1);
1170 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1171 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1172 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1173
eb7c3adb
JK		 1174 /* remove the CRC */
1175 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1176 l1 -= 4;
1177
bc7f75fa
AK		 1178 skb_put(skb, l1);
1179 goto copydone;
1180 } /* if */
1181 }
1182
1183 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1184 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1185 if (!length)
1186 break;
1187
47f44e40 1188 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1189 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1190 DMA_FROM_DEVICE);
bc7f75fa
AK		 1191 ps_page->dma = 0;
1192 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1193 ps_page->page = NULL;
1194 skb->len += length;
1195 skb->data_len += length;
1196 skb->truesize += length;
1197 }
1198
eb7c3adb
JK		 1199 /* strip the ethernet crc, problem is we're using pages now so
1200 * this whole operation can get a little cpu intensive
1201 */
1202 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1203 pskb_trim(skb, skb->len - 4);
1204
bc7f75fa
AK		 1205copydone:
1206 total_rx_bytes += skb->len;
1207 total_rx_packets++;
1208
1209 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1210 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1211
1212 if (rx_desc->wb.upper.header_status &
1213 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1214 adapter->rx_hdr_split++;
1215
1216 e1000_receive_skb(adapter, netdev, skb,
1217 staterr, rx_desc->wb.middle.vlan);
1218
1219next_desc:
1220 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1221 buffer_info->skb = NULL;
1222
1223 /* return some buffers to hardware, one at a time is too slow */
1224 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1225 adapter->alloc_rx_buf(adapter, cleaned_count);
1226 cleaned_count = 0;
1227 }
1228
1229 /* use prefetched values */
1230 rx_desc = next_rxd;
1231 buffer_info = next_buffer;
1232
1233 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1234 }
1235 rx_ring->next_to_clean = i;
1236
1237 cleaned_count = e1000_desc_unused(rx_ring);
1238 if (cleaned_count)
1239 adapter->alloc_rx_buf(adapter, cleaned_count);
1240
bc7f75fa 1241 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1242 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1243 netdev->stats.rx_bytes += total_rx_bytes;
1244 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1245 return cleaned;
1246}
1247
97ac8cae
BA		 1248/**
1249 * e1000_consume_page - helper function
1250 **/
1251static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1252 u16 length)
1253{
1254 bi->page = NULL;
1255 skb->len += length;
1256 skb->data_len += length;
1257 skb->truesize += length;
1258}
1259
1260/**
1261 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1262 * @adapter: board private structure
1263 *
1264 * the return value indicates whether actual cleaning was done, there
1265 * is no guarantee that everything was cleaned
1266 **/
1267
1268static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1269 int *work_done, int work_to_do)
1270{
1271 struct net_device *netdev = adapter->netdev;
1272 struct pci_dev *pdev = adapter->pdev;
1273 struct e1000_ring *rx_ring = adapter->rx_ring;
1274 struct e1000_rx_desc *rx_desc, *next_rxd;
1275 struct e1000_buffer *buffer_info, *next_buffer;
1276 u32 length;
1277 unsigned int i;
1278 int cleaned_count = 0;
1279 bool cleaned = false;
1280 unsigned int total_rx_bytes=0, total_rx_packets=0;
1281
1282 i = rx_ring->next_to_clean;
1283 rx_desc = E1000_RX_DESC(*rx_ring, i);
1284 buffer_info = &rx_ring->buffer_info[i];
1285
1286 while (rx_desc->status & E1000_RXD_STAT_DD) {
1287 struct sk_buff *skb;
1288 u8 status;
1289
1290 if (*work_done >= work_to_do)
1291 break;
1292 (*work_done)++;
2d0bb1c1 1293 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae
BA		 1294
1295 status = rx_desc->status;
1296 skb = buffer_info->skb;
1297 buffer_info->skb = NULL;
1298
1299 ++i;
1300 if (i == rx_ring->count)
1301 i = 0;
1302 next_rxd = E1000_RX_DESC(*rx_ring, i);
1303 prefetch(next_rxd);
1304
1305 next_buffer = &rx_ring->buffer_info[i];
1306
1307 cleaned = true;
1308 cleaned_count++;
0be3f55f
NN		 1309 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1310 DMA_FROM_DEVICE);
97ac8cae
BA		 1311 buffer_info->dma = 0;
1312
1313 length = le16_to_cpu(rx_desc->length);
1314
1315 /* errors is only valid for DD + EOP descriptors */
1316 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1317 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1318 /* recycle both page and skb */
1319 buffer_info->skb = skb;
1320 /* an error means any chain goes out the window
1321 * too */
1322 if (rx_ring->rx_skb_top)
1323 dev_kfree_skb(rx_ring->rx_skb_top);
1324 rx_ring->rx_skb_top = NULL;
1325 goto next_desc;
1326 }
1327
f0f1a172 1328#define rxtop (rx_ring->rx_skb_top)
97ac8cae
BA		 1329 if (!(status & E1000_RXD_STAT_EOP)) {
1330 /* this descriptor is only the beginning (or middle) */
1331 if (!rxtop) {
1332 /* this is the beginning of a chain */
1333 rxtop = skb;
1334 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1335 0, length);
1336 } else {
1337 /* this is the middle of a chain */
1338 skb_fill_page_desc(rxtop,
1339 skb_shinfo(rxtop)->nr_frags,
1340 buffer_info->page, 0, length);
1341 /* re-use the skb, only consumed the page */
1342 buffer_info->skb = skb;
1343 }
1344 e1000_consume_page(buffer_info, rxtop, length);
1345 goto next_desc;
1346 } else {
1347 if (rxtop) {
1348 /* end of the chain */
1349 skb_fill_page_desc(rxtop,
1350 skb_shinfo(rxtop)->nr_frags,
1351 buffer_info->page, 0, length);
1352 /* re-use the current skb, we only consumed the
1353 * page */
1354 buffer_info->skb = skb;
1355 skb = rxtop;
1356 rxtop = NULL;
1357 e1000_consume_page(buffer_info, skb, length);
1358 } else {
1359 /* no chain, got EOP, this buf is the packet
1360 * copybreak to save the put_page/alloc_page */
1361 if (length <= copybreak &&
1362 skb_tailroom(skb) >= length) {
1363 u8 *vaddr;
1364 vaddr = kmap_atomic(buffer_info->page,
1365 KM_SKB_DATA_SOFTIRQ);
1366 memcpy(skb_tail_pointer(skb), vaddr,
1367 length);
1368 kunmap_atomic(vaddr,
1369 KM_SKB_DATA_SOFTIRQ);
1370 /* re-use the page, so don't erase
1371 * buffer_info->page */
1372 skb_put(skb, length);
1373 } else {
1374 skb_fill_page_desc(skb, 0,
1375 buffer_info->page, 0,
1376 length);
1377 e1000_consume_page(buffer_info, skb,
1378 length);
1379 }
1380 }
1381 }
1382
1383 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1384 e1000_rx_checksum(adapter,
1385 (u32)(status) |
1386 ((u32)(rx_desc->errors) << 24),
1387 le16_to_cpu(rx_desc->csum), skb);
1388
1389 /* probably a little skewed due to removing CRC */
1390 total_rx_bytes += skb->len;
1391 total_rx_packets++;
1392
1393 /* eth type trans needs skb->data to point to something */
1394 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1395 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1396 dev_kfree_skb(skb);
1397 goto next_desc;
1398 }
1399
1400 e1000_receive_skb(adapter, netdev, skb, status,
1401 rx_desc->special);
1402
1403next_desc:
1404 rx_desc->status = 0;
1405
1406 /* return some buffers to hardware, one at a time is too slow */
1407 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1408 adapter->alloc_rx_buf(adapter, cleaned_count);
1409 cleaned_count = 0;
1410 }
1411
1412 /* use prefetched values */
1413 rx_desc = next_rxd;
1414 buffer_info = next_buffer;
1415 }
1416 rx_ring->next_to_clean = i;
1417
1418 cleaned_count = e1000_desc_unused(rx_ring);
1419 if (cleaned_count)
1420 adapter->alloc_rx_buf(adapter, cleaned_count);
1421
1422 adapter->total_rx_bytes += total_rx_bytes;
1423 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1424 netdev->stats.rx_bytes += total_rx_bytes;
1425 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1426 return cleaned;
1427}
1428
bc7f75fa
AK		 1429/**
1430 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1431 * @adapter: board private structure
1432 **/
1433static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1434{
1435 struct e1000_ring *rx_ring = adapter->rx_ring;
1436 struct e1000_buffer *buffer_info;
1437 struct e1000_ps_page *ps_page;
1438 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1439 unsigned int i, j;
1440
1441 /* Free all the Rx ring sk_buffs */
1442 for (i = 0; i < rx_ring->count; i++) {
1443 buffer_info = &rx_ring->buffer_info[i];
1444 if (buffer_info->dma) {
1445 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1446 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1447 adapter->rx_buffer_len,
0be3f55f 1448 DMA_FROM_DEVICE);
97ac8cae 1449 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1450 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1451 PAGE_SIZE,
0be3f55f 1452 DMA_FROM_DEVICE);
bc7f75fa 1453 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1454 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1455 adapter->rx_ps_bsize0,
0be3f55f 1456 DMA_FROM_DEVICE);
bc7f75fa
AK		 1457 buffer_info->dma = 0;
1458 }
1459
97ac8cae
BA		 1460 if (buffer_info->page) {
1461 put_page(buffer_info->page);
1462 buffer_info->page = NULL;
1463 }
1464
bc7f75fa
AK		 1465 if (buffer_info->skb) {
1466 dev_kfree_skb(buffer_info->skb);
1467 buffer_info->skb = NULL;
1468 }
1469
1470 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1471 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1472 if (!ps_page->page)
1473 break;
0be3f55f
NN		 1474 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1475 DMA_FROM_DEVICE);
bc7f75fa
AK		 1476 ps_page->dma = 0;
1477 put_page(ps_page->page);
1478 ps_page->page = NULL;
1479 }
1480 }
1481
1482 /* there also may be some cached data from a chained receive */
1483 if (rx_ring->rx_skb_top) {
1484 dev_kfree_skb(rx_ring->rx_skb_top);
1485 rx_ring->rx_skb_top = NULL;
1486 }
1487
bc7f75fa
AK		 1488 /* Zero out the descriptor ring */
1489 memset(rx_ring->desc, 0, rx_ring->size);
1490
1491 rx_ring->next_to_clean = 0;
1492 rx_ring->next_to_use = 0;
b94b5028 1493 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1494
1495 writel(0, adapter->hw.hw_addr + rx_ring->head);
1496 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1497}
1498
a8f88ff5
JB		 1499static void e1000e_downshift_workaround(struct work_struct *work)
1500{
1501 struct e1000_adapter *adapter = container_of(work,
1502 struct e1000_adapter, downshift_task);
1503
1504 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1505}
1506
bc7f75fa
AK		 1507/**
1508 * e1000_intr_msi - Interrupt Handler
1509 * @irq: interrupt number
1510 * @data: pointer to a network interface device structure
1511 **/
1512static irqreturn_t e1000_intr_msi(int irq, void *data)
1513{
1514 struct net_device *netdev = data;
1515 struct e1000_adapter *adapter = netdev_priv(netdev);
1516 struct e1000_hw *hw = &adapter->hw;
1517 u32 icr = er32(ICR);
1518
ad68076e
BA		 1519 /*
1520 * read ICR disables interrupts using IAM
1521 */
bc7f75fa 1522
573cca8c 1523 if (icr & E1000_ICR_LSC) {
bc7f75fa 1524 hw->mac.get_link_status = 1;
ad68076e
BA		 1525 /*
1526 * ICH8 workaround-- Call gig speed drop workaround on cable
1527 * disconnect (LSC) before accessing any PHY registers
1528 */
bc7f75fa
AK		 1529 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1530 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1531 schedule_work(&adapter->downshift_task);
bc7f75fa 1532
ad68076e
BA		 1533 /*
1534 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1535 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1536 * adapter in watchdog
1537 */
bc7f75fa
AK		 1538 if (netif_carrier_ok(netdev) &&
1539 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1540 /* disable receives */
1541 u32 rctl = er32(RCTL);
1542 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1543 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1544 }
1545 /* guard against interrupt when we're going down */
1546 if (!test_bit(__E1000_DOWN, &adapter->state))
1547 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1548 }
1549
288379f0 1550 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1551 adapter->total_tx_bytes = 0;
1552 adapter->total_tx_packets = 0;
1553 adapter->total_rx_bytes = 0;
1554 adapter->total_rx_packets = 0;
288379f0 1555 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1556 }
1557
1558 return IRQ_HANDLED;
1559}
1560
1561/**
1562 * e1000_intr - Interrupt Handler
1563 * @irq: interrupt number
1564 * @data: pointer to a network interface device structure
1565 **/
1566static irqreturn_t e1000_intr(int irq, void *data)
1567{
1568 struct net_device *netdev = data;
1569 struct e1000_adapter *adapter = netdev_priv(netdev);
1570 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1571 u32 rctl, icr = er32(ICR);
4662e82b 1572
a68ea775 1573 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1574 return IRQ_NONE; /* Not our interrupt */
1575
ad68076e
BA		 1576 /*
1577 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1578 * not set, then the adapter didn't send an interrupt
1579 */
bc7f75fa
AK		 1580 if (!(icr & E1000_ICR_INT_ASSERTED))
1581 return IRQ_NONE;
1582
ad68076e
BA		 1583 /*
1584 * Interrupt Auto-Mask...upon reading ICR,
1585 * interrupts are masked. No need for the
1586 * IMC write
1587 */
bc7f75fa 1588
573cca8c 1589 if (icr & E1000_ICR_LSC) {
bc7f75fa 1590 hw->mac.get_link_status = 1;
ad68076e
BA		 1591 /*
1592 * ICH8 workaround-- Call gig speed drop workaround on cable
1593 * disconnect (LSC) before accessing any PHY registers
1594 */
bc7f75fa
AK		 1595 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1596 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1597 schedule_work(&adapter->downshift_task);
bc7f75fa 1598
ad68076e
BA		 1599 /*
1600 * 80003ES2LAN workaround--
bc7f75fa
AK		 1601 * For packet buffer work-around on link down event;
1602 * disable receives here in the ISR and
1603 * reset adapter in watchdog
1604 */
1605 if (netif_carrier_ok(netdev) &&
1606 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1607 /* disable receives */
1608 rctl = er32(RCTL);
1609 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1610 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1611 }
1612 /* guard against interrupt when we're going down */
1613 if (!test_bit(__E1000_DOWN, &adapter->state))
1614 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1615 }
1616
288379f0 1617 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1618 adapter->total_tx_bytes = 0;
1619 adapter->total_tx_packets = 0;
1620 adapter->total_rx_bytes = 0;
1621 adapter->total_rx_packets = 0;
288379f0 1622 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1623 }
1624
1625 return IRQ_HANDLED;
1626}
1627
4662e82b
BA		 1628static irqreturn_t e1000_msix_other(int irq, void *data)
1629{
1630 struct net_device *netdev = data;
1631 struct e1000_adapter *adapter = netdev_priv(netdev);
1632 struct e1000_hw *hw = &adapter->hw;
1633 u32 icr = er32(ICR);
1634
1635 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1636 if (!test_bit(__E1000_DOWN, &adapter->state))
1637 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1638 return IRQ_NONE;
1639 }
1640
1641 if (icr & adapter->eiac_mask)
1642 ew32(ICS, (icr & adapter->eiac_mask));
1643
1644 if (icr & E1000_ICR_OTHER) {
1645 if (!(icr & E1000_ICR_LSC))
1646 goto no_link_interrupt;
1647 hw->mac.get_link_status = 1;
1648 /* guard against interrupt when we're going down */
1649 if (!test_bit(__E1000_DOWN, &adapter->state))
1650 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1651 }
1652
1653no_link_interrupt:
a3c69fef
JB		 1654 if (!test_bit(__E1000_DOWN, &adapter->state))
1655 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1656
1657 return IRQ_HANDLED;
1658}
1659
1660
1661static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1662{
1663 struct net_device *netdev = data;
1664 struct e1000_adapter *adapter = netdev_priv(netdev);
1665 struct e1000_hw *hw = &adapter->hw;
1666 struct e1000_ring *tx_ring = adapter->tx_ring;
1667
1668
1669 adapter->total_tx_bytes = 0;
1670 adapter->total_tx_packets = 0;
1671
1672 if (!e1000_clean_tx_irq(adapter))
1673 /* Ring was not completely cleaned, so fire another interrupt */
1674 ew32(ICS, tx_ring->ims_val);
1675
1676 return IRQ_HANDLED;
1677}
1678
1679static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1680{
1681 struct net_device *netdev = data;
1682 struct e1000_adapter *adapter = netdev_priv(netdev);
1683
1684 /* Write the ITR value calculated at the end of the
1685 * previous interrupt.
1686 */
1687 if (adapter->rx_ring->set_itr) {
1688 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1689 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1690 adapter->rx_ring->set_itr = 0;
1691 }
1692
288379f0 1693 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1694 adapter->total_rx_bytes = 0;
1695 adapter->total_rx_packets = 0;
288379f0 1696 __napi_schedule(&adapter->napi);
4662e82b
BA		 1697 }
1698 return IRQ_HANDLED;
1699}
1700
1701/**
1702 * e1000_configure_msix - Configure MSI-X hardware
1703 *
1704 * e1000_configure_msix sets up the hardware to properly
1705 * generate MSI-X interrupts.
1706 **/
1707static void e1000_configure_msix(struct e1000_adapter *adapter)
1708{
1709 struct e1000_hw *hw = &adapter->hw;
1710 struct e1000_ring *rx_ring = adapter->rx_ring;
1711 struct e1000_ring *tx_ring = adapter->tx_ring;
1712 int vector = 0;
1713 u32 ctrl_ext, ivar = 0;
1714
1715 adapter->eiac_mask = 0;
1716
1717 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1718 if (hw->mac.type == e1000_82574) {
1719 u32 rfctl = er32(RFCTL);
1720 rfctl |= E1000_RFCTL_ACK_DIS;
1721 ew32(RFCTL, rfctl);
1722 }
1723
1724#define E1000_IVAR_INT_ALLOC_VALID 0x8
1725 /* Configure Rx vector */
1726 rx_ring->ims_val = E1000_IMS_RXQ0;
1727 adapter->eiac_mask |= rx_ring->ims_val;
1728 if (rx_ring->itr_val)
1729 writel(1000000000 / (rx_ring->itr_val * 256),
1730 hw->hw_addr + rx_ring->itr_register);
1731 else
1732 writel(1, hw->hw_addr + rx_ring->itr_register);
1733 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1734
1735 /* Configure Tx vector */
1736 tx_ring->ims_val = E1000_IMS_TXQ0;
1737 vector++;
1738 if (tx_ring->itr_val)
1739 writel(1000000000 / (tx_ring->itr_val * 256),
1740 hw->hw_addr + tx_ring->itr_register);
1741 else
1742 writel(1, hw->hw_addr + tx_ring->itr_register);
1743 adapter->eiac_mask |= tx_ring->ims_val;
1744 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1745
1746 /* set vector for Other Causes, e.g. link changes */
1747 vector++;
1748 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1749 if (rx_ring->itr_val)
1750 writel(1000000000 / (rx_ring->itr_val * 256),
1751 hw->hw_addr + E1000_EITR_82574(vector));
1752 else
1753 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1754
1755 /* Cause Tx interrupts on every write back */
1756 ivar |= (1 << 31);
1757
1758 ew32(IVAR, ivar);
1759
1760 /* enable MSI-X PBA support */
1761 ctrl_ext = er32(CTRL_EXT);
1762 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1763
1764 /* Auto-Mask Other interrupts upon ICR read */
1765#define E1000_EIAC_MASK_82574 0x01F00000
1766 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1767 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1768 ew32(CTRL_EXT, ctrl_ext);
1769 e1e_flush();
1770}
1771
1772void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1773{
1774 if (adapter->msix_entries) {
1775 pci_disable_msix(adapter->pdev);
1776 kfree(adapter->msix_entries);
1777 adapter->msix_entries = NULL;
1778 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1779 pci_disable_msi(adapter->pdev);
1780 adapter->flags &= ~FLAG_MSI_ENABLED;
1781 }
4662e82b
BA		 1782}
1783
1784/**
1785 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1786 *
1787 * Attempt to configure interrupts using the best available
1788 * capabilities of the hardware and kernel.
1789 **/
1790void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1791{
1792 int err;
8e86acd7 1793 int i;
4662e82b
BA		 1794
1795 switch (adapter->int_mode) {
1796 case E1000E_INT_MODE_MSIX:
1797 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1798 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1799 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1800 sizeof(struct msix_entry),
1801 GFP_KERNEL);
1802 if (adapter->msix_entries) {
8e86acd7 1803 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1804 adapter->msix_entries[i].entry = i;
1805
1806 err = pci_enable_msix(adapter->pdev,
1807 adapter->msix_entries,
8e86acd7 1808 adapter->num_vectors);
b1cdfead 1809 if (err == 0)
4662e82b
BA		 1810 return;
1811 }
1812 /* MSI-X failed, so fall through and try MSI */
1813 e_err("Failed to initialize MSI-X interrupts. "
1814 "Falling back to MSI interrupts.\n");
1815 e1000e_reset_interrupt_capability(adapter);
1816 }
1817 adapter->int_mode = E1000E_INT_MODE_MSI;
1818 /* Fall through */
1819 case E1000E_INT_MODE_MSI:
1820 if (!pci_enable_msi(adapter->pdev)) {
1821 adapter->flags |= FLAG_MSI_ENABLED;
1822 } else {
1823 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1824 e_err("Failed to initialize MSI interrupts. Falling "
1825 "back to legacy interrupts.\n");
1826 }
1827 /* Fall through */
1828 case E1000E_INT_MODE_LEGACY:
1829 /* Don't do anything; this is the system default */
1830 break;
1831 }
8e86acd7
JK		 1832
1833 /* store the number of vectors being used */
1834 adapter->num_vectors = 1;
4662e82b
BA		 1835}
1836
1837/**
1838 * e1000_request_msix - Initialize MSI-X interrupts
1839 *
1840 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1841 * kernel.
1842 **/
1843static int e1000_request_msix(struct e1000_adapter *adapter)
1844{
1845 struct net_device *netdev = adapter->netdev;
1846 int err = 0, vector = 0;
1847
1848 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1849 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1850 else
1851 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1852 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1853 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1854 netdev);
1855 if (err)
1856 goto out;
1857 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1858 adapter->rx_ring->itr_val = adapter->itr;
1859 vector++;
1860
1861 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1862 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1863 else
1864 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1865 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1866 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1867 netdev);
1868 if (err)
1869 goto out;
1870 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1871 adapter->tx_ring->itr_val = adapter->itr;
1872 vector++;
1873
1874 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1875 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1876 if (err)
1877 goto out;
1878
1879 e1000_configure_msix(adapter);
1880 return 0;
1881out:
1882 return err;
1883}
1884
f8d59f78
BA		 1885/**
1886 * e1000_request_irq - initialize interrupts
1887 *
1888 * Attempts to configure interrupts using the best available
1889 * capabilities of the hardware and kernel.
1890 **/
bc7f75fa
AK		 1891static int e1000_request_irq(struct e1000_adapter *adapter)
1892{
1893 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1894 int err;
1895
4662e82b
BA		 1896 if (adapter->msix_entries) {
1897 err = e1000_request_msix(adapter);
1898 if (!err)
1899 return err;
1900 /* fall back to MSI */
1901 e1000e_reset_interrupt_capability(adapter);
1902 adapter->int_mode = E1000E_INT_MODE_MSI;
1903 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1904 }
4662e82b 1905 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1906 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1907 netdev->name, netdev);
1908 if (!err)
1909 return err;
bc7f75fa 1910
4662e82b
BA		 1911 /* fall back to legacy interrupt */
1912 e1000e_reset_interrupt_capability(adapter);
1913 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1914 }
1915
a0607fd3 1916 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1917 netdev->name, netdev);
1918 if (err)
1919 e_err("Unable to allocate interrupt, Error: %d\n", err);
1920
bc7f75fa
AK		 1921 return err;
1922}
1923
1924static void e1000_free_irq(struct e1000_adapter *adapter)
1925{
1926 struct net_device *netdev = adapter->netdev;
1927
4662e82b
BA		 1928 if (adapter->msix_entries) {
1929 int vector = 0;
1930
1931 free_irq(adapter->msix_entries[vector].vector, netdev);
1932 vector++;
1933
1934 free_irq(adapter->msix_entries[vector].vector, netdev);
1935 vector++;
1936
1937 /* Other Causes interrupt vector */
1938 free_irq(adapter->msix_entries[vector].vector, netdev);
1939 return;
bc7f75fa 1940 }
4662e82b
BA		 1941
1942 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1943}
1944
1945/**
1946 * e1000_irq_disable - Mask off interrupt generation on the NIC
1947 **/
1948static void e1000_irq_disable(struct e1000_adapter *adapter)
1949{
1950 struct e1000_hw *hw = &adapter->hw;
1951
bc7f75fa 1952 ew32(IMC, ~0);
4662e82b
BA		 1953 if (adapter->msix_entries)
1954 ew32(EIAC_82574, 0);
bc7f75fa 1955 e1e_flush();
8e86acd7
JK		 1956
1957 if (adapter->msix_entries) {
1958 int i;
1959 for (i = 0; i < adapter->num_vectors; i++)
1960 synchronize_irq(adapter->msix_entries[i].vector);
1961 } else {
1962 synchronize_irq(adapter->pdev->irq);
1963 }
bc7f75fa
AK		 1964}
1965
1966/**
1967 * e1000_irq_enable - Enable default interrupt generation settings
1968 **/
1969static void e1000_irq_enable(struct e1000_adapter *adapter)
1970{
1971 struct e1000_hw *hw = &adapter->hw;
1972
4662e82b
BA		 1973 if (adapter->msix_entries) {
1974 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1975 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1976 } else {
1977 ew32(IMS, IMS_ENABLE_MASK);
1978 }
74ef9c39 1979 e1e_flush();
bc7f75fa
AK		 1980}
1981
1982/**
31dbe5b4 1983 * e1000e_get_hw_control - get control of the h/w from f/w
bc7f75fa
AK		 1984 * @adapter: address of board private structure
1985 *
31dbe5b4 1986 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1987 * For ASF and Pass Through versions of f/w this means that
1988 * the driver is loaded. For AMT version (only with 82573)
1989 * of the f/w this means that the network i/f is open.
1990 **/
31dbe5b4 1991void e1000e_get_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 1992{
1993 struct e1000_hw *hw = &adapter->hw;
1994 u32 ctrl_ext;
1995 u32 swsm;
1996
1997 /* Let firmware know the driver has taken over */
1998 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1999 swsm = er32(SWSM);
2000 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2001 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2002 ctrl_ext = er32(CTRL_EXT);
ad68076e 2003 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2004 }
2005}
2006
2007/**
31dbe5b4 2008 * e1000e_release_hw_control - release control of the h/w to f/w
bc7f75fa
AK		 2009 * @adapter: address of board private structure
2010 *
31dbe5b4 2011 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2012 * For ASF and Pass Through versions of f/w this means that the
2013 * driver is no longer loaded. For AMT version (only with 82573) i
2014 * of the f/w this means that the network i/f is closed.
2015 *
2016 **/
31dbe5b4 2017void e1000e_release_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 2018{
2019 struct e1000_hw *hw = &adapter->hw;
2020 u32 ctrl_ext;
2021 u32 swsm;
2022
2023 /* Let firmware taken over control of h/w */
2024 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2025 swsm = er32(SWSM);
2026 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2027 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2028 ctrl_ext = er32(CTRL_EXT);
ad68076e 2029 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2030 }
2031}
2032
bc7f75fa
AK		 2033/**
2034 * @e1000_alloc_ring - allocate memory for a ring structure
2035 **/
2036static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2037 struct e1000_ring *ring)
2038{
2039 struct pci_dev *pdev = adapter->pdev;
2040
2041 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2042 GFP_KERNEL);
2043 if (!ring->desc)
2044 return -ENOMEM;
2045
2046 return 0;
2047}
2048
2049/**
2050 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2051 * @adapter: board private structure
2052 *
2053 * Return 0 on success, negative on failure
2054 **/
2055int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2056{
2057 struct e1000_ring *tx_ring = adapter->tx_ring;
2058 int err = -ENOMEM, size;
2059
2060 size = sizeof(struct e1000_buffer) * tx_ring->count;
89bf67f1 2061 tx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2062 if (!tx_ring->buffer_info)
2063 goto err;
bc7f75fa
AK		 2064
2065 /* round up to nearest 4K */
2066 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2067 tx_ring->size = ALIGN(tx_ring->size, 4096);
2068
2069 err = e1000_alloc_ring_dma(adapter, tx_ring);
2070 if (err)
2071 goto err;
2072
2073 tx_ring->next_to_use = 0;
2074 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2075
2076 return 0;
2077err:
2078 vfree(tx_ring->buffer_info);
44defeb3 2079 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2080 return err;
2081}
2082
2083/**
2084 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2085 * @adapter: board private structure
2086 *
2087 * Returns 0 on success, negative on failure
2088 **/
2089int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2090{
2091 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2092 struct e1000_buffer *buffer_info;
2093 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2094
2095 size = sizeof(struct e1000_buffer) * rx_ring->count;
89bf67f1 2096 rx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2097 if (!rx_ring->buffer_info)
2098 goto err;
bc7f75fa 2099
47f44e40
AK		 2100 for (i = 0; i < rx_ring->count; i++) {
2101 buffer_info = &rx_ring->buffer_info[i];
2102 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2103 sizeof(struct e1000_ps_page),
2104 GFP_KERNEL);
2105 if (!buffer_info->ps_pages)
2106 goto err_pages;
2107 }
bc7f75fa
AK		 2108
2109 desc_len = sizeof(union e1000_rx_desc_packet_split);
2110
2111 /* Round up to nearest 4K */
2112 rx_ring->size = rx_ring->count * desc_len;
2113 rx_ring->size = ALIGN(rx_ring->size, 4096);
2114
2115 err = e1000_alloc_ring_dma(adapter, rx_ring);
2116 if (err)
47f44e40 2117 goto err_pages;
bc7f75fa
AK		 2118
2119 rx_ring->next_to_clean = 0;
2120 rx_ring->next_to_use = 0;
2121 rx_ring->rx_skb_top = NULL;
2122
2123 return 0;
47f44e40
AK		 2124
2125err_pages:
2126 for (i = 0; i < rx_ring->count; i++) {
2127 buffer_info = &rx_ring->buffer_info[i];
2128 kfree(buffer_info->ps_pages);
2129 }
bc7f75fa
AK		 2130err:
2131 vfree(rx_ring->buffer_info);
e9262447 2132 e_err("Unable to allocate memory for the receive descriptor ring\n");
bc7f75fa
AK		 2133 return err;
2134}
2135
2136/**
2137 * e1000_clean_tx_ring - Free Tx Buffers
2138 * @adapter: board private structure
2139 **/
2140static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2141{
2142 struct e1000_ring *tx_ring = adapter->tx_ring;
2143 struct e1000_buffer *buffer_info;
2144 unsigned long size;
2145 unsigned int i;
2146
2147 for (i = 0; i < tx_ring->count; i++) {
2148 buffer_info = &tx_ring->buffer_info[i];
2149 e1000_put_txbuf(adapter, buffer_info);
2150 }
2151
2152 size = sizeof(struct e1000_buffer) * tx_ring->count;
2153 memset(tx_ring->buffer_info, 0, size);
2154
2155 memset(tx_ring->desc, 0, tx_ring->size);
2156
2157 tx_ring->next_to_use = 0;
2158 tx_ring->next_to_clean = 0;
2159
2160 writel(0, adapter->hw.hw_addr + tx_ring->head);
2161 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2162}
2163
2164/**
2165 * e1000e_free_tx_resources - Free Tx Resources per Queue
2166 * @adapter: board private structure
2167 *
2168 * Free all transmit software resources
2169 **/
2170void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2171{
2172 struct pci_dev *pdev = adapter->pdev;
2173 struct e1000_ring *tx_ring = adapter->tx_ring;
2174
2175 e1000_clean_tx_ring(adapter);
2176
2177 vfree(tx_ring->buffer_info);
2178 tx_ring->buffer_info = NULL;
2179
2180 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2181 tx_ring->dma);
2182 tx_ring->desc = NULL;
2183}
2184
2185/**
2186 * e1000e_free_rx_resources - Free Rx Resources
2187 * @adapter: board private structure
2188 *
2189 * Free all receive software resources
2190 **/
2191
2192void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2193{
2194 struct pci_dev *pdev = adapter->pdev;
2195 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2196 int i;
bc7f75fa
AK		 2197
2198 e1000_clean_rx_ring(adapter);
2199
b1cdfead 2200 for (i = 0; i < rx_ring->count; i++)
47f44e40 2201 kfree(rx_ring->buffer_info[i].ps_pages);
47f44e40 2202
bc7f75fa
AK		 2203 vfree(rx_ring->buffer_info);
2204 rx_ring->buffer_info = NULL;
2205
bc7f75fa
AK		 2206 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2207 rx_ring->dma);
2208 rx_ring->desc = NULL;
2209}
2210
2211/**
2212 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2213 * @adapter: pointer to adapter
2214 * @itr_setting: current adapter->itr
2215 * @packets: the number of packets during this measurement interval
2216 * @bytes: the number of bytes during this measurement interval
2217 *
bc7f75fa
AK		 2218 * Stores a new ITR value based on packets and byte
2219 * counts during the last interrupt. The advantage of per interrupt
2220 * computation is faster updates and more accurate ITR for the current
2221 * traffic pattern. Constants in this function were computed
2222 * based on theoretical maximum wire speed and thresholds were set based
2223 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2224 * while increasing bulk throughput. This functionality is controlled
2225 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2226 **/
2227static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2228 u16 itr_setting, int packets,
2229 int bytes)
2230{
2231 unsigned int retval = itr_setting;
2232
2233 if (packets == 0)
2234 goto update_itr_done;
2235
2236 switch (itr_setting) {
2237 case lowest_latency:
2238 /* handle TSO and jumbo frames */
2239 if (bytes/packets > 8000)
2240 retval = bulk_latency;
b1cdfead 2241 else if ((packets < 5) && (bytes > 512))
bc7f75fa 2242 retval = low_latency;
bc7f75fa
AK		 2243 break;
2244 case low_latency: /* 50 usec aka 20000 ints/s */
2245 if (bytes > 10000) {
2246 /* this if handles the TSO accounting */
b1cdfead 2247 if (bytes/packets > 8000)
bc7f75fa 2248 retval = bulk_latency;
b1cdfead 2249 else if ((packets < 10) || ((bytes/packets) > 1200))
bc7f75fa 2250 retval = bulk_latency;
b1cdfead 2251 else if ((packets > 35))
bc7f75fa 2252 retval = lowest_latency;
bc7f75fa
AK		 2253 } else if (bytes/packets > 2000) {
2254 retval = bulk_latency;
2255 } else if (packets <= 2 && bytes < 512) {
2256 retval = lowest_latency;
2257 }
2258 break;
2259 case bulk_latency: /* 250 usec aka 4000 ints/s */
2260 if (bytes > 25000) {
b1cdfead 2261 if (packets > 35)
bc7f75fa 2262 retval = low_latency;
bc7f75fa
AK		 2263 } else if (bytes < 6000) {
2264 retval = low_latency;
2265 }
2266 break;
2267 }
2268
2269update_itr_done:
2270 return retval;
2271}
2272
2273static void e1000_set_itr(struct e1000_adapter *adapter)
2274{
2275 struct e1000_hw *hw = &adapter->hw;
2276 u16 current_itr;
2277 u32 new_itr = adapter->itr;
2278
2279 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2280 if (adapter->link_speed != SPEED_1000) {
2281 current_itr = 0;
2282 new_itr = 4000;
2283 goto set_itr_now;
2284 }
2285
828bac87
BA		 2286 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2287 new_itr = 0;
2288 goto set_itr_now;
2289 }
2290
bc7f75fa
AK		 2291 adapter->tx_itr = e1000_update_itr(adapter,
2292 adapter->tx_itr,
2293 adapter->total_tx_packets,
2294 adapter->total_tx_bytes);
2295 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2296 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2297 adapter->tx_itr = low_latency;
2298
2299 adapter->rx_itr = e1000_update_itr(adapter,
2300 adapter->rx_itr,
2301 adapter->total_rx_packets,
2302 adapter->total_rx_bytes);
2303 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2304 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2305 adapter->rx_itr = low_latency;
2306
2307 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2308
2309 switch (current_itr) {
2310 /* counts and packets in update_itr are dependent on these numbers */
2311 case lowest_latency:
2312 new_itr = 70000;
2313 break;
2314 case low_latency:
2315 new_itr = 20000; /* aka hwitr = ~200 */
2316 break;
2317 case bulk_latency:
2318 new_itr = 4000;
2319 break;
2320 default:
2321 break;
2322 }
2323
2324set_itr_now:
2325 if (new_itr != adapter->itr) {
ad68076e
BA		 2326 /*
2327 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2328 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2329 * increasing
2330 */
bc7f75fa
AK		 2331 new_itr = new_itr > adapter->itr ?
2332 min(adapter->itr + (new_itr >> 2), new_itr) :
2333 new_itr;
2334 adapter->itr = new_itr;
4662e82b
BA		 2335 adapter->rx_ring->itr_val = new_itr;
2336 if (adapter->msix_entries)
2337 adapter->rx_ring->set_itr = 1;
2338 else
828bac87
BA		 2339 if (new_itr)
2340 ew32(ITR, 1000000000 / (new_itr * 256));
2341 else
2342 ew32(ITR, 0);
bc7f75fa
AK		 2343 }
2344}
2345
4662e82b
BA		 2346/**
2347 * e1000_alloc_queues - Allocate memory for all rings
2348 * @adapter: board private structure to initialize
2349 **/
2350static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2351{
2352 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2353 if (!adapter->tx_ring)
2354 goto err;
2355
2356 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2357 if (!adapter->rx_ring)
2358 goto err;
2359
2360 return 0;
2361err:
2362 e_err("Unable to allocate memory for queues\n");
2363 kfree(adapter->rx_ring);
2364 kfree(adapter->tx_ring);
2365 return -ENOMEM;
2366}
2367
bc7f75fa
AK		 2368/**
2369 * e1000_clean - NAPI Rx polling callback
ad68076e 2370 * @napi: struct associated with this polling callback
489815ce 2371 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2372 **/
2373static int e1000_clean(struct napi_struct *napi, int budget)
2374{
2375 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2376 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2377 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2378 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2379
4cf1653a 2380 adapter = netdev_priv(poll_dev);
bc7f75fa 2381
4662e82b
BA		 2382 if (adapter->msix_entries &&
2383 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2384 goto clean_rx;
2385
92af3e95 2386 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2387
4662e82b 2388clean_rx:
bc7f75fa 2389 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2390
12d04a3c 2391 if (!tx_cleaned)
d2c7ddd6 2392 work_done = budget;
bc7f75fa 2393
53e52c72
DM		 2394 /* If budget not fully consumed, exit the polling mode */
2395 if (work_done < budget) {
bc7f75fa
AK		 2396 if (adapter->itr_setting & 3)
2397 e1000_set_itr(adapter);
288379f0 2398 napi_complete(napi);
a3c69fef
JB		 2399 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2400 if (adapter->msix_entries)
2401 ew32(IMS, adapter->rx_ring->ims_val);
2402 else
2403 e1000_irq_enable(adapter);
2404 }
bc7f75fa
AK		 2405 }
2406
2407 return work_done;
2408}
2409
2410static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2411{
2412 struct e1000_adapter *adapter = netdev_priv(netdev);
2413 struct e1000_hw *hw = &adapter->hw;
2414 u32 vfta, index;
2415
2416 /* don't update vlan cookie if already programmed */
2417 if ((adapter->hw.mng_cookie.status &
2418 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2419 (vid == adapter->mng_vlan_id))
2420 return;
caaddaf8 2421
bc7f75fa 2422 /* add VID to filter table */
caaddaf8
BA		 2423 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2424 index = (vid >> 5) & 0x7F;
2425 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2426 vfta |= (1 << (vid & 0x1F));
2427 hw->mac.ops.write_vfta(hw, index, vfta);
2428 }
bc7f75fa
AK		 2429}
2430
2431static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2432{
2433 struct e1000_adapter *adapter = netdev_priv(netdev);
2434 struct e1000_hw *hw = &adapter->hw;
2435 u32 vfta, index;
2436
74ef9c39
JB		 2437 if (!test_bit(__E1000_DOWN, &adapter->state))
2438 e1000_irq_disable(adapter);
bc7f75fa 2439 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2440
2441 if (!test_bit(__E1000_DOWN, &adapter->state))
2442 e1000_irq_enable(adapter);
bc7f75fa
AK		 2443
2444 if ((adapter->hw.mng_cookie.status &
2445 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2446 (vid == adapter->mng_vlan_id)) {
2447 /* release control to f/w */
31dbe5b4 2448 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 2449 return;
2450 }
2451
2452 /* remove VID from filter table */
caaddaf8
BA		 2453 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2454 index = (vid >> 5) & 0x7F;
2455 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2456 vfta &= ~(1 << (vid & 0x1F));
2457 hw->mac.ops.write_vfta(hw, index, vfta);
2458 }
bc7f75fa
AK		 2459}
2460
2461static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2462{
2463 struct net_device *netdev = adapter->netdev;
2464 u16 vid = adapter->hw.mng_cookie.vlan_id;
2465 u16 old_vid = adapter->mng_vlan_id;
2466
2467 if (!adapter->vlgrp)
2468 return;
2469
2470 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2471 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2472 if (adapter->hw.mng_cookie.status &
2473 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2474 e1000_vlan_rx_add_vid(netdev, vid);
2475 adapter->mng_vlan_id = vid;
2476 }
2477
2478 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2479 (vid != old_vid) &&
2480 !vlan_group_get_device(adapter->vlgrp, old_vid))
2481 e1000_vlan_rx_kill_vid(netdev, old_vid);
2482 } else {
2483 adapter->mng_vlan_id = vid;
2484 }
2485}
2486
2487
2488static void e1000_vlan_rx_register(struct net_device *netdev,
2489 struct vlan_group *grp)
2490{
2491 struct e1000_adapter *adapter = netdev_priv(netdev);
2492 struct e1000_hw *hw = &adapter->hw;
2493 u32 ctrl, rctl;
2494
74ef9c39
JB		 2495 if (!test_bit(__E1000_DOWN, &adapter->state))
2496 e1000_irq_disable(adapter);
bc7f75fa
AK		 2497 adapter->vlgrp = grp;
2498
2499 if (grp) {
2500 /* enable VLAN tag insert/strip */
2501 ctrl = er32(CTRL);
2502 ctrl |= E1000_CTRL_VME;
2503 ew32(CTRL, ctrl);
2504
2505 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2506 /* enable VLAN receive filtering */
2507 rctl = er32(RCTL);
bc7f75fa
AK		 2508 rctl &= ~E1000_RCTL_CFIEN;
2509 ew32(RCTL, rctl);
2510 e1000_update_mng_vlan(adapter);
2511 }
2512 } else {
2513 /* disable VLAN tag insert/strip */
2514 ctrl = er32(CTRL);
2515 ctrl &= ~E1000_CTRL_VME;
2516 ew32(CTRL, ctrl);
2517
2518 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2519 if (adapter->mng_vlan_id !=
2520 (u16)E1000_MNG_VLAN_NONE) {
2521 e1000_vlan_rx_kill_vid(netdev,
2522 adapter->mng_vlan_id);
2523 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2524 }
2525 }
2526 }
2527
74ef9c39
JB		 2528 if (!test_bit(__E1000_DOWN, &adapter->state))
2529 e1000_irq_enable(adapter);
bc7f75fa
AK		 2530}
2531
2532static void e1000_restore_vlan(struct e1000_adapter *adapter)
2533{
2534 u16 vid;
2535
2536 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2537
2538 if (!adapter->vlgrp)
2539 return;
2540
b738127d 2541 for (vid = 0; vid < VLAN_N_VID; vid++) {
bc7f75fa
AK		 2542 if (!vlan_group_get_device(adapter->vlgrp, vid))
2543 continue;
2544 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2545 }
2546}
2547
cd791618 2548static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2549{
2550 struct e1000_hw *hw = &adapter->hw;
cd791618 2551 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2552
2553 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2554 return;
2555
2556 manc = er32(MANC);
2557
ad68076e
BA		 2558 /*
2559 * enable receiving management packets to the host. this will probably
bc7f75fa 2560 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2561 * the packets will be handled on SMBUS
2562 */
bc7f75fa
AK		 2563 manc |= E1000_MANC_EN_MNG2HOST;
2564 manc2h = er32(MANC2H);
cd791618
BA		 2565
2566 switch (hw->mac.type) {
2567 default:
2568 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2569 break;
2570 case e1000_82574:
2571 case e1000_82583:
2572 /*
2573 * Check if IPMI pass-through decision filter already exists;
2574 * if so, enable it.
2575 */
2576 for (i = 0, j = 0; i < 8; i++) {
2577 mdef = er32(MDEF(i));
2578
2579 /* Ignore filters with anything other than IPMI ports */
3b21b508 2580 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2581 continue;
2582
2583 /* Enable this decision filter in MANC2H */
2584 if (mdef)
2585 manc2h |= (1 << i);
2586
2587 j |= mdef;
2588 }
2589
2590 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2591 break;
2592
2593 /* Create new decision filter in an empty filter */
2594 for (i = 0, j = 0; i < 8; i++)
2595 if (er32(MDEF(i)) == 0) {
2596 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2597 E1000_MDEF_PORT_664));
2598 manc2h |= (1 << 1);
2599 j++;
2600 break;
2601 }
2602
2603 if (!j)
2604 e_warn("Unable to create IPMI pass-through filter\n");
2605 break;
2606 }
2607
bc7f75fa
AK		 2608 ew32(MANC2H, manc2h);
2609 ew32(MANC, manc);
2610}
2611
2612/**
2613 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2614 * @adapter: board private structure
2615 *
2616 * Configure the Tx unit of the MAC after a reset.
2617 **/
2618static void e1000_configure_tx(struct e1000_adapter *adapter)
2619{
2620 struct e1000_hw *hw = &adapter->hw;
2621 struct e1000_ring *tx_ring = adapter->tx_ring;
2622 u64 tdba;
2623 u32 tdlen, tctl, tipg, tarc;
2624 u32 ipgr1, ipgr2;
2625
2626 /* Setup the HW Tx Head and Tail descriptor pointers */
2627 tdba = tx_ring->dma;
2628 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2629 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2630 ew32(TDBAH, (tdba >> 32));
2631 ew32(TDLEN, tdlen);
2632 ew32(TDH, 0);
2633 ew32(TDT, 0);
2634 tx_ring->head = E1000_TDH;
2635 tx_ring->tail = E1000_TDT;
2636
2637 /* Set the default values for the Tx Inter Packet Gap timer */
2638 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2639 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2640 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2641
2642 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2643 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2644
2645 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2646 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2647 ew32(TIPG, tipg);
2648
2649 /* Set the Tx Interrupt Delay register */
2650 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2651 /* Tx irq moderation */
bc7f75fa
AK		 2652 ew32(TADV, adapter->tx_abs_int_delay);
2653
3a3b7586
JB		 2654 if (adapter->flags2 & FLAG2_DMA_BURST) {
2655 u32 txdctl = er32(TXDCTL(0));
2656 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2657 E1000_TXDCTL_WTHRESH);
2658 /*
2659 * set up some performance related parameters to encourage the
2660 * hardware to use the bus more efficiently in bursts, depends
2661 * on the tx_int_delay to be enabled,
2662 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2663 * hthresh = 1 ==> prefetch when one or more available
2664 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2665 * BEWARE: this seems to work but should be considered first if
2666 * there are tx hangs or other tx related bugs
2667 */
2668 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2669 ew32(TXDCTL(0), txdctl);
2670 /* erratum work around: set txdctl the same for both queues */
2671 ew32(TXDCTL(1), txdctl);
2672 }
2673
bc7f75fa
AK		 2674 /* Program the Transmit Control Register */
2675 tctl = er32(TCTL);
2676 tctl &= ~E1000_TCTL_CT;
2677 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2678 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2679
2680 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2681 tarc = er32(TARC(0));
ad68076e
BA		 2682 /*
2683 * set the speed mode bit, we'll clear it if we're not at
2684 * gigabit link later
2685 */
bc7f75fa
AK		 2686#define SPEED_MODE_BIT (1 << 21)
2687 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2688 ew32(TARC(0), tarc);
bc7f75fa
AK		 2689 }
2690
2691 /* errata: program both queues to unweighted RR */
2692 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2693 tarc = er32(TARC(0));
bc7f75fa 2694 tarc |= 1;
e9ec2c0f
JK		 2695 ew32(TARC(0), tarc);
2696 tarc = er32(TARC(1));
bc7f75fa 2697 tarc |= 1;
e9ec2c0f 2698 ew32(TARC(1), tarc);
bc7f75fa
AK		 2699 }
2700
bc7f75fa
AK		 2701 /* Setup Transmit Descriptor Settings for eop descriptor */
2702 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2703
2704 /* only set IDE if we are delaying interrupts using the timers */
2705 if (adapter->tx_int_delay)
2706 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2707
2708 /* enable Report Status bit */
2709 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2710
2711 ew32(TCTL, tctl);
2712
edfea6e6 2713 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2714}
2715
2716/**
2717 * e1000_setup_rctl - configure the receive control registers
2718 * @adapter: Board private structure
2719 **/
2720#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2721 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2722static void e1000_setup_rctl(struct e1000_adapter *adapter)
2723{
2724 struct e1000_hw *hw = &adapter->hw;
2725 u32 rctl, rfctl;
2726 u32 psrctl = 0;
2727 u32 pages = 0;
2728
a1ce6473
BA		 2729 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2730 if (hw->mac.type == e1000_pch2lan) {
2731 s32 ret_val;
2732
2733 if (adapter->netdev->mtu > ETH_DATA_LEN)
2734 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2735 else
2736 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
dd93f95e
BA		 2737
2738 if (ret_val)
2739 e_dbg("failed to enable jumbo frame workaround mode\n");
a1ce6473
BA		 2740 }
2741
bc7f75fa
AK		 2742 /* Program MC offset vector base */
2743 rctl = er32(RCTL);
2744 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2745 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2746 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2747 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2748
2749 /* Do not Store bad packets */
2750 rctl &= ~E1000_RCTL_SBP;
2751
2752 /* Enable Long Packet receive */
2753 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2754 rctl &= ~E1000_RCTL_LPE;
2755 else
2756 rctl |= E1000_RCTL_LPE;
2757
eb7c3adb
JK		 2758 /* Some systems expect that the CRC is included in SMBUS traffic. The
2759 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2760 * host memory when this is enabled
2761 */
2762 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2763 rctl |= E1000_RCTL_SECRC;
5918bd88 2764
a4f58f54
BA		 2765 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2766 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2767 u16 phy_data;
2768
2769 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2770 phy_data &= 0xfff8;
2771 phy_data |= (1 << 2);
2772 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2773
2774 e1e_rphy(hw, 22, &phy_data);
2775 phy_data &= 0x0fff;
2776 phy_data |= (1 << 14);
2777 e1e_wphy(hw, 0x10, 0x2823);
2778 e1e_wphy(hw, 0x11, 0x0003);
2779 e1e_wphy(hw, 22, phy_data);
2780 }
2781
bc7f75fa
AK		 2782 /* Setup buffer sizes */
2783 rctl &= ~E1000_RCTL_SZ_4096;
2784 rctl |= E1000_RCTL_BSEX;
2785 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2786 case 2048:
2787 default:
2788 rctl |= E1000_RCTL_SZ_2048;
2789 rctl &= ~E1000_RCTL_BSEX;
2790 break;
2791 case 4096:
2792 rctl |= E1000_RCTL_SZ_4096;
2793 break;
2794 case 8192:
2795 rctl |= E1000_RCTL_SZ_8192;
2796 break;
2797 case 16384:
2798 rctl |= E1000_RCTL_SZ_16384;
2799 break;
2800 }
2801
2802 /*
2803 * 82571 and greater support packet-split where the protocol
2804 * header is placed in skb->data and the packet data is
2805 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2806 * In the case of a non-split, skb->data is linearly filled,
2807 * followed by the page buffers. Therefore, skb->data is
2808 * sized to hold the largest protocol header.
2809 *
2810 * allocations using alloc_page take too long for regular MTU
2811 * so only enable packet split for jumbo frames
2812 *
2813 * Using pages when the page size is greater than 16k wastes
2814 * a lot of memory, since we allocate 3 pages at all times
2815 * per packet.
2816 */
bc7f75fa 2817 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2818 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2819 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2820 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2821 else
2822 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2823
2824 if (adapter->rx_ps_pages) {
2825 /* Configure extra packet-split registers */
2826 rfctl = er32(RFCTL);
2827 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2828 /*
2829 * disable packet split support for IPv6 extension headers,
2830 * because some malformed IPv6 headers can hang the Rx
2831 */
bc7f75fa
AK		 2832 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2833 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2834
2835 ew32(RFCTL, rfctl);
2836
140a7480
AK		 2837 /* Enable Packet split descriptors */
2838 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2839
2840 psrctl |= adapter->rx_ps_bsize0 >>
2841 E1000_PSRCTL_BSIZE0_SHIFT;
2842
2843 switch (adapter->rx_ps_pages) {
2844 case 3:
2845 psrctl |= PAGE_SIZE <<
2846 E1000_PSRCTL_BSIZE3_SHIFT;
2847 case 2:
2848 psrctl |= PAGE_SIZE <<
2849 E1000_PSRCTL_BSIZE2_SHIFT;
2850 case 1:
2851 psrctl |= PAGE_SIZE >>
2852 E1000_PSRCTL_BSIZE1_SHIFT;
2853 break;
2854 }
2855
2856 ew32(PSRCTL, psrctl);
2857 }
2858
2859 ew32(RCTL, rctl);
318a94d6
JK		 2860 /* just started the receive unit, no need to restart */
2861 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2862}
2863
2864/**
2865 * e1000_configure_rx - Configure Receive Unit after Reset
2866 * @adapter: board private structure
2867 *
2868 * Configure the Rx unit of the MAC after a reset.
2869 **/
2870static void e1000_configure_rx(struct e1000_adapter *adapter)
2871{
2872 struct e1000_hw *hw = &adapter->hw;
2873 struct e1000_ring *rx_ring = adapter->rx_ring;
2874 u64 rdba;
2875 u32 rdlen, rctl, rxcsum, ctrl_ext;
2876
2877 if (adapter->rx_ps_pages) {
2878 /* this is a 32 byte descriptor */
2879 rdlen = rx_ring->count *
2880 sizeof(union e1000_rx_desc_packet_split);
2881 adapter->clean_rx = e1000_clean_rx_irq_ps;
2882 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2883 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2884 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2885 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2886 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2887 } else {
97ac8cae 2888 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2889 adapter->clean_rx = e1000_clean_rx_irq;
2890 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2891 }
2892
2893 /* disable receives while setting up the descriptors */
2894 rctl = er32(RCTL);
2895 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2896 e1e_flush();
2897 msleep(10);
2898
3a3b7586
JB		 2899 if (adapter->flags2 & FLAG2_DMA_BURST) {
2900 /*
2901 * set the writeback threshold (only takes effect if the RDTR
2902 * is set). set GRAN=1 and write back up to 0x4 worth, and
2903 * enable prefetching of 0x20 rx descriptors
2904 * granularity = 01
2905 * wthresh = 04,
2906 * hthresh = 04,
2907 * pthresh = 0x20
2908 */
2909 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
2910 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
2911
2912 /*
2913 * override the delay timers for enabling bursting, only if
2914 * the value was not set by the user via module options
2915 */
2916 if (adapter->rx_int_delay == DEFAULT_RDTR)
2917 adapter->rx_int_delay = BURST_RDTR;
2918 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
2919 adapter->rx_abs_int_delay = BURST_RADV;
2920 }
2921
bc7f75fa
AK		 2922 /* set the Receive Delay Timer Register */
2923 ew32(RDTR, adapter->rx_int_delay);
2924
2925 /* irq moderation */
2926 ew32(RADV, adapter->rx_abs_int_delay);
828bac87 2927 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
ad68076e 2928 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2929
2930 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2931 /* Auto-Mask interrupts upon ICR access */
2932 ctrl_ext |= E1000_CTRL_EXT_IAME;
2933 ew32(IAM, 0xffffffff);
2934 ew32(CTRL_EXT, ctrl_ext);
2935 e1e_flush();
2936
ad68076e
BA		 2937 /*
2938 * Setup the HW Rx Head and Tail Descriptor Pointers and
2939 * the Base and Length of the Rx Descriptor Ring
2940 */
bc7f75fa 2941 rdba = rx_ring->dma;
284901a9 2942 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2943 ew32(RDBAH, (rdba >> 32));
2944 ew32(RDLEN, rdlen);
2945 ew32(RDH, 0);
2946 ew32(RDT, 0);
2947 rx_ring->head = E1000_RDH;
2948 rx_ring->tail = E1000_RDT;
2949
2950 /* Enable Receive Checksum Offload for TCP and UDP */
2951 rxcsum = er32(RXCSUM);
2952 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2953 rxcsum |= E1000_RXCSUM_TUOFL;
2954
ad68076e
BA		 2955 /*
2956 * IPv4 payload checksum for UDP fragments must be
2957 * used in conjunction with packet-split.
2958 */
bc7f75fa
AK		 2959 if (adapter->rx_ps_pages)
2960 rxcsum |= E1000_RXCSUM_IPPCSE;
2961 } else {
2962 rxcsum &= ~E1000_RXCSUM_TUOFL;
2963 /* no need to clear IPPCSE as it defaults to 0 */
2964 }
2965 ew32(RXCSUM, rxcsum);
2966
ad68076e
BA		 2967 /*
2968 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2969 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2970 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2971 */
828bac87
BA		 2972 if ((adapter->flags & FLAG_HAS_ERT) ||
2973 (adapter->hw.mac.type == e1000_pch2lan)) {
53ec5498
BA		 2974 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2975 u32 rxdctl = er32(RXDCTL(0));
2976 ew32(RXDCTL(0), rxdctl | 0x3);
828bac87
BA		 2977 if (adapter->flags & FLAG_HAS_ERT)
2978 ew32(ERT, E1000_ERT_2048 | (1 << 13));
53ec5498
BA		 2979 /*
2980 * With jumbo frames and early-receive enabled,
2981 * excessive C-state transition latencies result in
2982 * dropped transactions.
2983 */
ed77134b 2984 pm_qos_update_request(
82f68251 2985 &adapter->netdev->pm_qos_req, 55);
53ec5498 2986 } else {
ed77134b 2987 pm_qos_update_request(
82f68251 2988 &adapter->netdev->pm_qos_req,
ed77134b 2989 PM_QOS_DEFAULT_VALUE);
53ec5498 2990 }
97ac8cae 2991 }
bc7f75fa
AK		 2992
2993 /* Enable Receives */
2994 ew32(RCTL, rctl);
2995}
2996
2997/**
e2de3eb6 2998 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2999 * @hw: pointer to the HW structure
3000 * @mc_addr_list: array of multicast addresses to program
3001 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 3002 *
ab8932f3 3003 * Updates the Multicast Table Array.
bc7f75fa 3004 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 3005 **/
e2de3eb6 3006static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 3007 u32 mc_addr_count)
bc7f75fa 3008{
ab8932f3 3009 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 3010}
3011
3012/**
3013 * e1000_set_multi - Multicast and Promiscuous mode set
3014 * @netdev: network interface device structure
3015 *
3016 * The set_multi entry point is called whenever the multicast address
3017 * list or the network interface flags are updated. This routine is
3018 * responsible for configuring the hardware for proper multicast,
3019 * promiscuous mode, and all-multi behavior.
3020 **/
3021static void e1000_set_multi(struct net_device *netdev)
3022{
3023 struct e1000_adapter *adapter = netdev_priv(netdev);
3024 struct e1000_hw *hw = &adapter->hw;
22bedad3 3025 struct netdev_hw_addr *ha;
bc7f75fa
AK		 3026 u8 *mta_list;
3027 u32 rctl;
3028 int i;
3029
3030 /* Check for Promiscuous and All Multicast modes */
3031
3032 rctl = er32(RCTL);
3033
3034 if (netdev->flags & IFF_PROMISC) {
3035 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 3036 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 3037 } else {
746b9f02
PM		 3038 if (netdev->flags & IFF_ALLMULTI) {
3039 rctl |= E1000_RCTL_MPE;
3040 rctl &= ~E1000_RCTL_UPE;
3041 } else {
3042 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3043 }
78ed11a5 3044 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 3045 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 3046 }
3047
3048 ew32(RCTL, rctl);
3049
7aeef972
JP		 3050 if (!netdev_mc_empty(netdev)) {
3051 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 3052 if (!mta_list)
3053 return;
3054
3055 /* prepare a packed array of only addresses. */
7aeef972 3056 i = 0;
22bedad3
JP		 3057 netdev_for_each_mc_addr(ha, netdev)
3058 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3059
ab8932f3 3060 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3061 kfree(mta_list);
3062 } else {
3063 /*
3064 * if we're called from probe, we might not have
3065 * anything to do here, so clear out the list
3066 */
ab8932f3 3067 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3068 }
3069}
3070
3071/**
ad68076e 3072 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3073 * @adapter: private board structure
3074 **/
3075static void e1000_configure(struct e1000_adapter *adapter)
3076{
3077 e1000_set_multi(adapter->netdev);
3078
3079 e1000_restore_vlan(adapter);
cd791618 3080 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3081
3082 e1000_configure_tx(adapter);
3083 e1000_setup_rctl(adapter);
3084 e1000_configure_rx(adapter);
ad68076e 3085 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3086}
3087
3088/**
3089 * e1000e_power_up_phy - restore link in case the phy was powered down
3090 * @adapter: address of board private structure
3091 *
3092 * The phy may be powered down to save power and turn off link when the
3093 * driver is unloaded and wake on lan is not enabled (among others)
3094 * *** this routine MUST be followed by a call to e1000e_reset ***
3095 **/
3096void e1000e_power_up_phy(struct e1000_adapter *adapter)
3097{
17f208de
BA		 3098 if (adapter->hw.phy.ops.power_up)
3099 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3100
3101 adapter->hw.mac.ops.setup_link(&adapter->hw);
3102}
3103
3104/**
3105 * e1000_power_down_phy - Power down the PHY
3106 *
17f208de
BA		 3107 * Power down the PHY so no link is implied when interface is down.
3108 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3109 */
3110static void e1000_power_down_phy(struct e1000_adapter *adapter)
3111{
bc7f75fa 3112 /* WoL is enabled */
23b66e2b 3113 if (adapter->wol)
bc7f75fa
AK		 3114 return;
3115
17f208de
BA		 3116 if (adapter->hw.phy.ops.power_down)
3117 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3118}
3119
3120/**
3121 * e1000e_reset - bring the hardware into a known good state
3122 *
3123 * This function boots the hardware and enables some settings that
3124 * require a configuration cycle of the hardware - those cannot be
3125 * set/changed during runtime. After reset the device needs to be
ad68076e 3126 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3127 */
3128void e1000e_reset(struct e1000_adapter *adapter)
3129{
3130 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3131 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3132 struct e1000_hw *hw = &adapter->hw;
3133 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3134 u32 pba = adapter->pba;
bc7f75fa
AK		 3135 u16 hwm;
3136
ad68076e 3137 /* reset Packet Buffer Allocation to default */
318a94d6 3138 ew32(PBA, pba);
df762464 3139
318a94d6 3140 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3141 /*
3142 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3143 * large enough to accommodate two full transmit packets,
3144 * rounded up to the next 1KB and expressed in KB. Likewise,
3145 * the Rx FIFO should be large enough to accommodate at least
3146 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3147 * expressed in KB.
3148 */
df762464 3149 pba = er32(PBA);
bc7f75fa 3150 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3151 tx_space = pba >> 16;
bc7f75fa 3152 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3153 pba &= 0xffff;
ad68076e
BA		 3154 /*
3155 * the Tx fifo also stores 16 bytes of information about the tx
3156 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3157 */
3158 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3159 sizeof(struct e1000_tx_desc) -
3160 ETH_FCS_LEN) * 2;
3161 min_tx_space = ALIGN(min_tx_space, 1024);
3162 min_tx_space >>= 10;
3163 /* software strips receive CRC, so leave room for it */
318a94d6 3164 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3165 min_rx_space = ALIGN(min_rx_space, 1024);
3166 min_rx_space >>= 10;
3167
ad68076e
BA		 3168 /*
3169 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3170 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3171 * allocation, take space away from current Rx allocation
3172 */
df762464
AK		 3173 if ((tx_space < min_tx_space) &&
3174 ((min_tx_space - tx_space) < pba)) {
3175 pba -= min_tx_space - tx_space;
bc7f75fa 3176
ad68076e
BA		 3177 /*
3178 * if short on Rx space, Rx wins and must trump tx
3179 * adjustment or use Early Receive if available
3180 */
df762464 3181 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3182 (!(adapter->flags & FLAG_HAS_ERT)))
3183 /* ERT enabled in e1000_configure_rx */
df762464 3184 pba = min_rx_space;
bc7f75fa 3185 }
df762464
AK		 3186
3187 ew32(PBA, pba);
bc7f75fa
AK		 3188 }
3189
ad68076e
BA		 3190 /*
3191 * flow control settings
3192 *
38eb394e 3193 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3194 * (or the size used for early receive) above it in the Rx FIFO.
3195 * Set it to the lower of:
3196 * - 90% of the Rx FIFO size, and
3197 * - the full Rx FIFO size minus the early receive size (for parts
3198 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3199 * - the full Rx FIFO size minus one full frame
ad68076e 3200 */
d3738bb8
BA		 3201 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3202 fc->pause_time = 0xFFFF;
3203 else
3204 fc->pause_time = E1000_FC_PAUSE_TIME;
3205 fc->send_xon = 1;
3206 fc->current_mode = fc->requested_mode;
3207
3208 switch (hw->mac.type) {
3209 default:
3210 if ((adapter->flags & FLAG_HAS_ERT) &&
3211 (adapter->netdev->mtu > ETH_DATA_LEN))
3212 hwm = min(((pba << 10) * 9 / 10),
3213 ((pba << 10) - (E1000_ERT_2048 << 3)));
3214 else
3215 hwm = min(((pba << 10) * 9 / 10),
3216 ((pba << 10) - adapter->max_frame_size));
3217
3218 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3219 fc->low_water = fc->high_water - 8;
3220 break;
3221 case e1000_pchlan:
38eb394e
BA		 3222 /*
3223 * Workaround PCH LOM adapter hangs with certain network
3224 * loads. If hangs persist, try disabling Tx flow control.
3225 */
3226 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3227 fc->high_water = 0x3500;
3228 fc->low_water = 0x1500;
3229 } else {
3230 fc->high_water = 0x5000;
3231 fc->low_water = 0x3000;
3232 }
a305595b 3233 fc->refresh_time = 0x1000;
d3738bb8
BA		 3234 break;
3235 case e1000_pch2lan:
3236 fc->high_water = 0x05C20;
3237 fc->low_water = 0x05048;
3238 fc->pause_time = 0x0650;
3239 fc->refresh_time = 0x0400;
828bac87
BA		 3240 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3241 pba = 14;
3242 ew32(PBA, pba);
3243 }
d3738bb8 3244 break;
38eb394e 3245 }
bc7f75fa 3246
828bac87
BA		 3247 /*
3248 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3249 * fit in receive buffer and early-receive not supported.
3250 */
3251 if (adapter->itr_setting & 0x3) {
3252 if (((adapter->max_frame_size * 2) > (pba << 10)) &&
3253 !(adapter->flags & FLAG_HAS_ERT)) {
3254 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3255 dev_info(&adapter->pdev->dev,
3256 "Interrupt Throttle Rate turned off\n");
3257 adapter->flags2 |= FLAG2_DISABLE_AIM;
3258 ew32(ITR, 0);
3259 }
3260 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3261 dev_info(&adapter->pdev->dev,
3262 "Interrupt Throttle Rate turned on\n");
3263 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3264 adapter->itr = 20000;
3265 ew32(ITR, 1000000000 / (adapter->itr * 256));
3266 }
3267 }
3268
bc7f75fa
AK		 3269 /* Allow time for pending master requests to run */
3270 mac->ops.reset_hw(hw);
97ac8cae
BA		 3271
3272 /*
3273 * For parts with AMT enabled, let the firmware know
3274 * that the network interface is in control
3275 */
c43bc57e 3276 if (adapter->flags & FLAG_HAS_AMT)
31dbe5b4 3277 e1000e_get_hw_control(adapter);
97ac8cae 3278
bc7f75fa
AK		 3279 ew32(WUC, 0);
3280
3281 if (mac->ops.init_hw(hw))
44defeb3 3282 e_err("Hardware Error\n");
bc7f75fa
AK		 3283
3284 e1000_update_mng_vlan(adapter);
3285
3286 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3287 ew32(VET, ETH_P_8021Q);
3288
3289 e1000e_reset_adaptive(hw);
31dbe5b4
BA		 3290
3291 if (!netif_running(adapter->netdev) &&
3292 !test_bit(__E1000_TESTING, &adapter->state)) {
3293 e1000_power_down_phy(adapter);
3294 return;
3295 }
3296
bc7f75fa
AK		 3297 e1000_get_phy_info(hw);
3298
918d7197
BA		 3299 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3300 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3301 u16 phy_data = 0;
ad68076e
BA		 3302 /*
3303 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3304 * the return value of this function because there is nothing
ad68076e
BA		 3305 * different we would do if it failed
3306 */
bc7f75fa
AK		 3307 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3308 phy_data &= ~IGP02E1000_PM_SPD;
3309 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3310 }
bc7f75fa
AK		 3311}
3312
3313int e1000e_up(struct e1000_adapter *adapter)
3314{
3315 struct e1000_hw *hw = &adapter->hw;
3316
3317 /* hardware has been reset, we need to reload some things */
3318 e1000_configure(adapter);
3319
3320 clear_bit(__E1000_DOWN, &adapter->state);
3321
3322 napi_enable(&adapter->napi);
4662e82b
BA		 3323 if (adapter->msix_entries)
3324 e1000_configure_msix(adapter);
bc7f75fa
AK		 3325 e1000_irq_enable(adapter);
3326
4cb9be7a
JB		 3327 netif_wake_queue(adapter->netdev);
3328
bc7f75fa 3329 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3330 if (adapter->msix_entries)
3331 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3332 else
3333 ew32(ICS, E1000_ICS_LSC);
3334
bc7f75fa
AK		 3335 return 0;
3336}
3337
3338void e1000e_down(struct e1000_adapter *adapter)
3339{
3340 struct net_device *netdev = adapter->netdev;
3341 struct e1000_hw *hw = &adapter->hw;
3342 u32 tctl, rctl;
3343
ad68076e
BA		 3344 /*
3345 * signal that we're down so the interrupt handler does not
3346 * reschedule our watchdog timer
3347 */
bc7f75fa
AK		 3348 set_bit(__E1000_DOWN, &adapter->state);
3349
3350 /* disable receives in the hardware */
3351 rctl = er32(RCTL);
3352 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3353 /* flush and sleep below */
3354
4cb9be7a 3355 netif_stop_queue(netdev);
bc7f75fa
AK		 3356
3357 /* disable transmits in the hardware */
3358 tctl = er32(TCTL);
3359 tctl &= ~E1000_TCTL_EN;
3360 ew32(TCTL, tctl);
3361 /* flush both disables and wait for them to finish */
3362 e1e_flush();
3363 msleep(10);
3364
3365 napi_disable(&adapter->napi);
3366 e1000_irq_disable(adapter);
3367
3368 del_timer_sync(&adapter->watchdog_timer);
3369 del_timer_sync(&adapter->phy_info_timer);
3370
bc7f75fa
AK		 3371 netif_carrier_off(netdev);
3372 adapter->link_speed = 0;
3373 adapter->link_duplex = 0;
3374
52cc3086
JK		 3375 if (!pci_channel_offline(adapter->pdev))
3376 e1000e_reset(adapter);
bc7f75fa
AK		 3377 e1000_clean_tx_ring(adapter);
3378 e1000_clean_rx_ring(adapter);
3379
3380 /*
3381 * TODO: for power management, we could drop the link and
3382 * pci_disable_device here.
3383 */
3384}
3385
3386void e1000e_reinit_locked(struct e1000_adapter *adapter)
3387{
3388 might_sleep();
3389 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3390 msleep(1);
3391 e1000e_down(adapter);
3392 e1000e_up(adapter);
3393 clear_bit(__E1000_RESETTING, &adapter->state);
3394}
3395
3396/**
3397 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3398 * @adapter: board private structure to initialize
3399 *
3400 * e1000_sw_init initializes the Adapter private data structure.
3401 * Fields are initialized based on PCI device information and
3402 * OS network device settings (MTU size).
3403 **/
3404static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3405{
bc7f75fa
AK		 3406 struct net_device *netdev = adapter->netdev;
3407
3408 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3409 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3410 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3411 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3412
4662e82b 3413 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3414
4662e82b
BA		 3415 if (e1000_alloc_queues(adapter))
3416 return -ENOMEM;
bc7f75fa 3417
bc7f75fa 3418 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3419 e1000_irq_disable(adapter);
3420
bc7f75fa
AK		 3421 set_bit(__E1000_DOWN, &adapter->state);
3422 return 0;
bc7f75fa
AK		 3423}
3424
f8d59f78
BA		 3425/**
3426 * e1000_intr_msi_test - Interrupt Handler
3427 * @irq: interrupt number
3428 * @data: pointer to a network interface device structure
3429 **/
3430static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3431{
3432 struct net_device *netdev = data;
3433 struct e1000_adapter *adapter = netdev_priv(netdev);
3434 struct e1000_hw *hw = &adapter->hw;
3435 u32 icr = er32(ICR);
3436
3bb99fe2 3437 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3438 if (icr & E1000_ICR_RXSEQ) {
3439 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3440 wmb();
3441 }
3442
3443 return IRQ_HANDLED;
3444}
3445
3446/**
3447 * e1000_test_msi_interrupt - Returns 0 for successful test
3448 * @adapter: board private struct
3449 *
3450 * code flow taken from tg3.c
3451 **/
3452static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3453{
3454 struct net_device *netdev = adapter->netdev;
3455 struct e1000_hw *hw = &adapter->hw;
3456 int err;
3457
3458 /* poll_enable hasn't been called yet, so don't need disable */
3459 /* clear any pending events */
3460 er32(ICR);
3461
3462 /* free the real vector and request a test handler */
3463 e1000_free_irq(adapter);
4662e82b 3464 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3465
3466 /* Assume that the test fails, if it succeeds then the test
3467 * MSI irq handler will unset this flag */
3468 adapter->flags |= FLAG_MSI_TEST_FAILED;
3469
3470 err = pci_enable_msi(adapter->pdev);
3471 if (err)
3472 goto msi_test_failed;
3473
a0607fd3 3474 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3475 netdev->name, netdev);
3476 if (err) {
3477 pci_disable_msi(adapter->pdev);
3478 goto msi_test_failed;
3479 }
3480
3481 wmb();
3482
3483 e1000_irq_enable(adapter);
3484
3485 /* fire an unusual interrupt on the test handler */
3486 ew32(ICS, E1000_ICS_RXSEQ);
3487 e1e_flush();
3488 msleep(50);
3489
3490 e1000_irq_disable(adapter);
3491
3492 rmb();
3493
3494 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3495 adapter->int_mode = E1000E_INT_MODE_LEGACY;
068e8a30
JD		 3496 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3497 } else
3498 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78
BA		 3499
3500 free_irq(adapter->pdev->irq, netdev);
3501 pci_disable_msi(adapter->pdev);
3502
f8d59f78 3503msi_test_failed:
4662e82b 3504 e1000e_set_interrupt_capability(adapter);
068e8a30 3505 return e1000_request_irq(adapter);
f8d59f78
BA		 3506}
3507
3508/**
3509 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3510 * @adapter: board private struct
3511 *
3512 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3513 **/
3514static int e1000_test_msi(struct e1000_adapter *adapter)
3515{
3516 int err;
3517 u16 pci_cmd;
3518
3519 if (!(adapter->flags & FLAG_MSI_ENABLED))
3520 return 0;
3521
3522 /* disable SERR in case the MSI write causes a master abort */
3523 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3524 if (pci_cmd & PCI_COMMAND_SERR)
3525 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3526 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3527
3528 err = e1000_test_msi_interrupt(adapter);
3529
36f2407f
DN		 3530 /* re-enable SERR */
3531 if (pci_cmd & PCI_COMMAND_SERR) {
3532 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3533 pci_cmd |= PCI_COMMAND_SERR;
3534 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3535 }
f8d59f78 3536
f8d59f78
BA		 3537 return err;
3538}
3539
bc7f75fa
AK		 3540/**
3541 * e1000_open - Called when a network interface is made active
3542 * @netdev: network interface device structure
3543 *
3544 * Returns 0 on success, negative value on failure
3545 *
3546 * The open entry point is called when a network interface is made
3547 * active by the system (IFF_UP). At this point all resources needed
3548 * for transmit and receive operations are allocated, the interrupt
3549 * handler is registered with the OS, the watchdog timer is started,
3550 * and the stack is notified that the interface is ready.
3551 **/
3552static int e1000_open(struct net_device *netdev)
3553{
3554 struct e1000_adapter *adapter = netdev_priv(netdev);
3555 struct e1000_hw *hw = &adapter->hw;
23606cf5 3556 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3557 int err;
3558
3559 /* disallow open during test */
3560 if (test_bit(__E1000_TESTING, &adapter->state))
3561 return -EBUSY;
3562
23606cf5
RW		 3563 pm_runtime_get_sync(&pdev->dev);
3564
9c563d20
JB		 3565 netif_carrier_off(netdev);
3566
bc7f75fa
AK		 3567 /* allocate transmit descriptors */
3568 err = e1000e_setup_tx_resources(adapter);
3569 if (err)
3570 goto err_setup_tx;
3571
3572 /* allocate receive descriptors */
3573 err = e1000e_setup_rx_resources(adapter);
3574 if (err)
3575 goto err_setup_rx;
3576
11b08be8
BA		 3577 /*
3578 * If AMT is enabled, let the firmware know that the network
3579 * interface is now open and reset the part to a known state.
3580 */
3581 if (adapter->flags & FLAG_HAS_AMT) {
31dbe5b4 3582 e1000e_get_hw_control(adapter);
11b08be8
BA		 3583 e1000e_reset(adapter);
3584 }
3585
bc7f75fa
AK		 3586 e1000e_power_up_phy(adapter);
3587
3588 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3589 if ((adapter->hw.mng_cookie.status &
3590 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3591 e1000_update_mng_vlan(adapter);
3592
c128ec29 3593 /* DMA latency requirement to workaround early-receive/jumbo issue */
828bac87
BA		 3594 if ((adapter->flags & FLAG_HAS_ERT) ||
3595 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014
LT		 3596 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3597 PM_QOS_CPU_DMA_LATENCY,
3598 PM_QOS_DEFAULT_VALUE);
c128ec29 3599
ad68076e
BA		 3600 /*
3601 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3602 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3603 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3604 * clean_rx handler before we do so.
3605 */
bc7f75fa
AK		 3606 e1000_configure(adapter);
3607
3608 err = e1000_request_irq(adapter);
3609 if (err)
3610 goto err_req_irq;
3611
f8d59f78
BA		 3612 /*
3613 * Work around PCIe errata with MSI interrupts causing some chipsets to
3614 * ignore e1000e MSI messages, which means we need to test our MSI
3615 * interrupt now
3616 */
4662e82b 3617 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3618 err = e1000_test_msi(adapter);
3619 if (err) {
3620 e_err("Interrupt allocation failed\n");
3621 goto err_req_irq;
3622 }
3623 }
3624
bc7f75fa
AK		 3625 /* From here on the code is the same as e1000e_up() */
3626 clear_bit(__E1000_DOWN, &adapter->state);
3627
3628 napi_enable(&adapter->napi);
3629
3630 e1000_irq_enable(adapter);
3631
4cb9be7a 3632 netif_start_queue(netdev);
d55b53ff 3633
23606cf5
RW		 3634 adapter->idle_check = true;
3635 pm_runtime_put(&pdev->dev);
3636
bc7f75fa 3637 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3638 if (adapter->msix_entries)
3639 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3640 else
3641 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3642
3643 return 0;
3644
3645err_req_irq:
31dbe5b4 3646 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 3647 e1000_power_down_phy(adapter);
3648 e1000e_free_rx_resources(adapter);
3649err_setup_rx:
3650 e1000e_free_tx_resources(adapter);
3651err_setup_tx:
3652 e1000e_reset(adapter);
23606cf5 3653 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3654
3655 return err;
3656}
3657
3658/**
3659 * e1000_close - Disables a network interface
3660 * @netdev: network interface device structure
3661 *
3662 * Returns 0, this is not allowed to fail
3663 *
3664 * The close entry point is called when an interface is de-activated
3665 * by the OS. The hardware is still under the drivers control, but
3666 * needs to be disabled. A global MAC reset is issued to stop the
3667 * hardware, and all transmit and receive resources are freed.
3668 **/
3669static int e1000_close(struct net_device *netdev)
3670{
3671 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3672 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3673
3674 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3675
3676 pm_runtime_get_sync(&pdev->dev);
3677
3678 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3679 e1000e_down(adapter);
3680 e1000_free_irq(adapter);
3681 }
bc7f75fa 3682 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3683
3684 e1000e_free_tx_resources(adapter);
3685 e1000e_free_rx_resources(adapter);
3686
ad68076e
BA		 3687 /*
3688 * kill manageability vlan ID if supported, but not if a vlan with
3689 * the same ID is registered on the host OS (let 8021q kill it)
3690 */
bc7f75fa
AK		 3691 if ((adapter->hw.mng_cookie.status &
3692 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3693 !(adapter->vlgrp &&
3694 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3695 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3696
ad68076e
BA		 3697 /*
3698 * If AMT is enabled, let the firmware know that the network
3699 * interface is now closed
3700 */
31dbe5b4
BA		 3701 if ((adapter->flags & FLAG_HAS_AMT) &&
3702 !test_bit(__E1000_TESTING, &adapter->state))
3703 e1000e_release_hw_control(adapter);
bc7f75fa 3704
828bac87
BA		 3705 if ((adapter->flags & FLAG_HAS_ERT) ||
3706 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014 3707 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3708
23606cf5
RW		 3709 pm_runtime_put_sync(&pdev->dev);
3710
bc7f75fa
AK		 3711 return 0;
3712}
3713/**
3714 * e1000_set_mac - Change the Ethernet Address of the NIC
3715 * @netdev: network interface device structure
3716 * @p: pointer to an address structure
3717 *
3718 * Returns 0 on success, negative on failure
3719 **/
3720static int e1000_set_mac(struct net_device *netdev, void *p)
3721{
3722 struct e1000_adapter *adapter = netdev_priv(netdev);
3723 struct sockaddr *addr = p;
3724
3725 if (!is_valid_ether_addr(addr->sa_data))
3726 return -EADDRNOTAVAIL;
3727
3728 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3729 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3730
3731 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3732
3733 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3734 /* activate the work around */
3735 e1000e_set_laa_state_82571(&adapter->hw, 1);
3736
ad68076e
BA		 3737 /*
3738 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3739 * between the time RAR[0] gets clobbered and the time it
3740 * gets fixed (in e1000_watchdog), the actual LAA is in one
3741 * of the RARs and no incoming packets directed to this port
3742 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3743 * RAR[14]
3744 */
bc7f75fa
AK		 3745 e1000e_rar_set(&adapter->hw,
3746 adapter->hw.mac.addr,
3747 adapter->hw.mac.rar_entry_count - 1);
3748 }
3749
3750 return 0;
3751}
3752
a8f88ff5
JB		 3753/**
3754 * e1000e_update_phy_task - work thread to update phy
3755 * @work: pointer to our work struct
3756 *
3757 * this worker thread exists because we must acquire a
3758 * semaphore to read the phy, which we could msleep while
3759 * waiting for it, and we can't msleep in a timer.
3760 **/
3761static void e1000e_update_phy_task(struct work_struct *work)
3762{
3763 struct e1000_adapter *adapter = container_of(work,
3764 struct e1000_adapter, update_phy_task);
3765 e1000_get_phy_info(&adapter->hw);
3766}
3767
ad68076e
BA		 3768/*
3769 * Need to wait a few seconds after link up to get diagnostic information from
3770 * the phy
3771 */
bc7f75fa
AK		 3772static void e1000_update_phy_info(unsigned long data)
3773{
3774 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3775 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3776}
3777
8c7bbb92
BA		 3778/**
3779 * e1000e_update_phy_stats - Update the PHY statistics counters
3780 * @adapter: board private structure
3781 **/
3782static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3783{
3784 struct e1000_hw *hw = &adapter->hw;
3785 s32 ret_val;
3786 u16 phy_data;
3787
3788 ret_val = hw->phy.ops.acquire(hw);
3789 if (ret_val)
3790 return;
3791
3792 hw->phy.addr = 1;
3793
3794#define HV_PHY_STATS_PAGE 778
3795 /*
3796 * A page set is expensive so check if already on desired page.
3797 * If not, set to the page with the PHY status registers.
3798 */
3799 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3800 &phy_data);
3801 if (ret_val)
3802 goto release;
3803 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3804 ret_val = e1000e_write_phy_reg_mdic(hw,
3805 IGP01E1000_PHY_PAGE_SELECT,
3806 (HV_PHY_STATS_PAGE <<
3807 IGP_PAGE_SHIFT));
3808 if (ret_val)
3809 goto release;
3810 }
3811
3812 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3813
3814 /* Single Collision Count */
3815 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3816 &phy_data);
3817 ret_val = e1000e_read_phy_reg_mdic(hw,
3818 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3819 &phy_data);
3820 if (!ret_val)
3821 adapter->stats.scc += phy_data;
3822
3823 /* Excessive Collision Count */
3824 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3825 &phy_data);
3826 ret_val = e1000e_read_phy_reg_mdic(hw,
3827 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3828 &phy_data);
3829 if (!ret_val)
3830 adapter->stats.ecol += phy_data;
3831
3832 /* Multiple Collision Count */
3833 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3834 &phy_data);
3835 ret_val = e1000e_read_phy_reg_mdic(hw,
3836 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3837 &phy_data);
3838 if (!ret_val)
3839 adapter->stats.mcc += phy_data;
3840
3841 /* Late Collision Count */
3842 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3843 &phy_data);
3844 ret_val = e1000e_read_phy_reg_mdic(hw,
3845 HV_LATECOL_LOWER &
3846 MAX_PHY_REG_ADDRESS,
3847 &phy_data);
3848 if (!ret_val)
3849 adapter->stats.latecol += phy_data;
3850
3851 /* Collision Count - also used for adaptive IFS */
3852 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3853 &phy_data);
3854 ret_val = e1000e_read_phy_reg_mdic(hw,
3855 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3856 &phy_data);
3857 if (!ret_val)
3858 hw->mac.collision_delta = phy_data;
3859
3860 /* Defer Count */
3861 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3862 &phy_data);
3863 ret_val = e1000e_read_phy_reg_mdic(hw,
3864 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3865 &phy_data);
3866 if (!ret_val)
3867 adapter->stats.dc += phy_data;
3868
3869 /* Transmit with no CRS */
3870 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3871 &phy_data);
3872 ret_val = e1000e_read_phy_reg_mdic(hw,
3873 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3874 &phy_data);
3875 if (!ret_val)
3876 adapter->stats.tncrs += phy_data;
3877
3878release:
3879 hw->phy.ops.release(hw);
3880}
3881
bc7f75fa
AK		 3882/**
3883 * e1000e_update_stats - Update the board statistics counters
3884 * @adapter: board private structure
3885 **/
3886void e1000e_update_stats(struct e1000_adapter *adapter)
3887{
7274c20f 3888 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3889 struct e1000_hw *hw = &adapter->hw;
3890 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3891
3892 /*
3893 * Prevent stats update while adapter is being reset, or if the pci
3894 * connection is down.
3895 */
3896 if (adapter->link_speed == 0)
3897 return;
3898 if (pci_channel_offline(pdev))
3899 return;
3900
bc7f75fa
AK		 3901 adapter->stats.crcerrs += er32(CRCERRS);
3902 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3903 adapter->stats.gorc += er32(GORCL);
3904 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3905 adapter->stats.bprc += er32(BPRC);
3906 adapter->stats.mprc += er32(MPRC);
3907 adapter->stats.roc += er32(ROC);
3908
bc7f75fa 3909 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3910
3911 /* Half-duplex statistics */
3912 if (adapter->link_duplex == HALF_DUPLEX) {
3913 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3914 e1000e_update_phy_stats(adapter);
3915 } else {
3916 adapter->stats.scc += er32(SCC);
3917 adapter->stats.ecol += er32(ECOL);
3918 adapter->stats.mcc += er32(MCC);
3919 adapter->stats.latecol += er32(LATECOL);
3920 adapter->stats.dc += er32(DC);
3921
3922 hw->mac.collision_delta = er32(COLC);
3923
3924 if ((hw->mac.type != e1000_82574) &&
3925 (hw->mac.type != e1000_82583))
3926 adapter->stats.tncrs += er32(TNCRS);
3927 }
3928 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3929 }
8c7bbb92 3930
bc7f75fa
AK		 3931 adapter->stats.xonrxc += er32(XONRXC);
3932 adapter->stats.xontxc += er32(XONTXC);
3933 adapter->stats.xoffrxc += er32(XOFFRXC);
3934 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3935 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3936 adapter->stats.gotc += er32(GOTCL);
3937 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3938 adapter->stats.rnbc += er32(RNBC);
3939 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3940
3941 adapter->stats.mptc += er32(MPTC);
3942 adapter->stats.bptc += er32(BPTC);
3943
3944 /* used for adaptive IFS */
3945
3946 hw->mac.tx_packet_delta = er32(TPT);
3947 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3948
3949 adapter->stats.algnerrc += er32(ALGNERRC);
3950 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3951 adapter->stats.cexterr += er32(CEXTERR);
3952 adapter->stats.tsctc += er32(TSCTC);
3953 adapter->stats.tsctfc += er32(TSCTFC);
3954
bc7f75fa 3955 /* Fill out the OS statistics structure */
7274c20f
AK		 3956 netdev->stats.multicast = adapter->stats.mprc;
3957 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3958
3959 /* Rx Errors */
3960
ad68076e
BA		 3961 /*
3962 * RLEC on some newer hardware can be incorrect so build
3963 * our own version based on RUC and ROC
3964 */
7274c20f 3965 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3966 adapter->stats.crcerrs + adapter->stats.algnerrc +
3967 adapter->stats.ruc + adapter->stats.roc +
3968 adapter->stats.cexterr;
7274c20f 3969 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3970 adapter->stats.roc;
7274c20f
AK		 3971 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3972 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3973 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3974
3975 /* Tx Errors */
7274c20f 3976 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3977 adapter->stats.latecol;
7274c20f
AK		 3978 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3979 netdev->stats.tx_window_errors = adapter->stats.latecol;
3980 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3981
3982 /* Tx Dropped needs to be maintained elsewhere */
3983
bc7f75fa
AK		 3984 /* Management Stats */
3985 adapter->stats.mgptc += er32(MGTPTC);
3986 adapter->stats.mgprc += er32(MGTPRC);
3987 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3988}
3989
7c25769f
BA		 3990/**
3991 * e1000_phy_read_status - Update the PHY register status snapshot
3992 * @adapter: board private structure
3993 **/
3994static void e1000_phy_read_status(struct e1000_adapter *adapter)
3995{
3996 struct e1000_hw *hw = &adapter->hw;
3997 struct e1000_phy_regs *phy = &adapter->phy_regs;
3998 int ret_val;
7c25769f
BA		 3999
4000 if ((er32(STATUS) & E1000_STATUS_LU) &&
4001 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4002 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4003 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4004 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4005 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4006 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4007 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4008 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4009 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4010 if (ret_val)
44defeb3 4011 e_warn("Error reading PHY register\n");
7c25769f
BA		 4012 } else {
4013 /*
4014 * Do not read PHY registers if link is not up
4015 * Set values to typical power-on defaults
4016 */
4017 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4018 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4019 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4020 BMSR_ERCAP);
4021 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4022 ADVERTISE_ALL | ADVERTISE_CSMA);
4023 phy->lpa = 0;
4024 phy->expansion = EXPANSION_ENABLENPAGE;
4025 phy->ctrl1000 = ADVERTISE_1000FULL;
4026 phy->stat1000 = 0;
4027 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4028 }
7c25769f
BA		 4029}
4030
bc7f75fa
AK		 4031static void e1000_print_link_info(struct e1000_adapter *adapter)
4032{
bc7f75fa
AK		 4033 struct e1000_hw *hw = &adapter->hw;
4034 u32 ctrl = er32(CTRL);
4035
8f12fe86
BA		 4036 /* Link status message must follow this format for user tools */
4037 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
4038 "Flow Control: %s\n",
4039 adapter->netdev->name,
44defeb3
JK		 4040 adapter->link_speed,
4041 (adapter->link_duplex == FULL_DUPLEX) ?
4042 "Full Duplex" : "Half Duplex",
4043 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
4044 "RX/TX" :
4045 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
4046 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 4047}
4048
0c6bdb30 4049static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 4050{
4051 struct e1000_hw *hw = &adapter->hw;
4052 bool link_active = 0;
4053 s32 ret_val = 0;
4054
4055 /*
4056 * get_link_status is set on LSC (link status) interrupt or
4057 * Rx sequence error interrupt. get_link_status will stay
4058 * false until the check_for_link establishes link
4059 * for copper adapters ONLY
4060 */
4061 switch (hw->phy.media_type) {
4062 case e1000_media_type_copper:
4063 if (hw->mac.get_link_status) {
4064 ret_val = hw->mac.ops.check_for_link(hw);
4065 link_active = !hw->mac.get_link_status;
4066 } else {
4067 link_active = 1;
4068 }
4069 break;
4070 case e1000_media_type_fiber:
4071 ret_val = hw->mac.ops.check_for_link(hw);
4072 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4073 break;
4074 case e1000_media_type_internal_serdes:
4075 ret_val = hw->mac.ops.check_for_link(hw);
4076 link_active = adapter->hw.mac.serdes_has_link;
4077 break;
4078 default:
4079 case e1000_media_type_unknown:
4080 break;
4081 }
4082
4083 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4084 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4085 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4086 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4087 }
4088
4089 return link_active;
4090}
4091
4092static void e1000e_enable_receives(struct e1000_adapter *adapter)
4093{
4094 /* make sure the receive unit is started */
4095 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4096 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4097 struct e1000_hw *hw = &adapter->hw;
4098 u32 rctl = er32(RCTL);
4099 ew32(RCTL, rctl | E1000_RCTL_EN);
4100 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4101 }
4102}
4103
ff10e13c
CW		 4104static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4105{
4106 struct e1000_hw *hw = &adapter->hw;
4107
4108 /*
4109 * With 82574 controllers, PHY needs to be checked periodically
4110 * for hung state and reset, if two calls return true
4111 */
4112 if (e1000_check_phy_82574(hw))
4113 adapter->phy_hang_count++;
4114 else
4115 adapter->phy_hang_count = 0;
4116
4117 if (adapter->phy_hang_count > 1) {
4118 adapter->phy_hang_count = 0;
4119 schedule_work(&adapter->reset_task);
4120 }
4121}
4122
bc7f75fa
AK		 4123/**
4124 * e1000_watchdog - Timer Call-back
4125 * @data: pointer to adapter cast into an unsigned long
4126 **/
4127static void e1000_watchdog(unsigned long data)
4128{
4129 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4130
4131 /* Do the rest outside of interrupt context */
4132 schedule_work(&adapter->watchdog_task);
4133
4134 /* TODO: make this use queue_delayed_work() */
4135}
4136
4137static void e1000_watchdog_task(struct work_struct *work)
4138{
4139 struct e1000_adapter *adapter = container_of(work,
4140 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4141 struct net_device *netdev = adapter->netdev;
4142 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4143 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4144 struct e1000_ring *tx_ring = adapter->tx_ring;
4145 struct e1000_hw *hw = &adapter->hw;
4146 u32 link, tctl;
bc7f75fa
AK		 4147 int tx_pending = 0;
4148
b405e8df 4149 link = e1000e_has_link(adapter);
318a94d6 4150 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4151 /* Cancel scheduled suspend requests. */
4152 pm_runtime_resume(netdev->dev.parent);
4153
318a94d6 4154 e1000e_enable_receives(adapter);
bc7f75fa 4155 goto link_up;
bc7f75fa
AK		 4156 }
4157
4158 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4159 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4160 e1000_update_mng_vlan(adapter);
4161
bc7f75fa
AK		 4162 if (link) {
4163 if (!netif_carrier_ok(netdev)) {
4164 bool txb2b = 1;
23606cf5
RW		 4165
4166 /* Cancel scheduled suspend requests. */
4167 pm_runtime_resume(netdev->dev.parent);
4168
318a94d6 4169 /* update snapshot of PHY registers on LSC */
7c25769f 4170 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4171 mac->ops.get_link_up_info(&adapter->hw,
4172 &adapter->link_speed,
4173 &adapter->link_duplex);
4174 e1000_print_link_info(adapter);
f4187b56
BA		 4175 /*
4176 * On supported PHYs, check for duplex mismatch only
4177 * if link has autonegotiated at 10/100 half
4178 */
4179 if ((hw->phy.type == e1000_phy_igp_3 ||
4180 hw->phy.type == e1000_phy_bm) &&
4181 (hw->mac.autoneg == true) &&
4182 (adapter->link_speed == SPEED_10 ||
4183 adapter->link_speed == SPEED_100) &&
4184 (adapter->link_duplex == HALF_DUPLEX)) {
4185 u16 autoneg_exp;
4186
4187 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4188
4189 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4190 e_info("Autonegotiated half duplex but"
4191 " link partner cannot autoneg. "
4192 " Try forcing full duplex if "
4193 "link gets many collisions.\n");
4194 }
4195
f49c57e1 4196 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4197 adapter->tx_timeout_factor = 1;
4198 switch (adapter->link_speed) {
4199 case SPEED_10:
4200 txb2b = 0;
10f1b492 4201 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4202 break;
4203 case SPEED_100:
4204 txb2b = 0;
4c86e0b9 4205 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4206 break;
4207 }
4208
ad68076e
BA		 4209 /*
4210 * workaround: re-program speed mode bit after
4211 * link-up event
4212 */
bc7f75fa
AK		 4213 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4214 !txb2b) {
4215 u32 tarc0;
e9ec2c0f 4216 tarc0 = er32(TARC(0));
bc7f75fa 4217 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4218 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4219 }
4220
ad68076e
BA		 4221 /*
4222 * disable TSO for pcie and 10/100 speeds, to avoid
4223 * some hardware issues
4224 */
bc7f75fa
AK		 4225 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4226 switch (adapter->link_speed) {
4227 case SPEED_10:
4228 case SPEED_100:
44defeb3 4229 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4230 netdev->features &= ~NETIF_F_TSO;
4231 netdev->features &= ~NETIF_F_TSO6;
4232 break;
4233 case SPEED_1000:
4234 netdev->features |= NETIF_F_TSO;
4235 netdev->features |= NETIF_F_TSO6;
4236 break;
4237 default:
4238 /* oops */
4239 break;
4240 }
4241 }
4242
ad68076e
BA		 4243 /*
4244 * enable transmits in the hardware, need to do this
4245 * after setting TARC(0)
4246 */
bc7f75fa
AK		 4247 tctl = er32(TCTL);
4248 tctl |= E1000_TCTL_EN;
4249 ew32(TCTL, tctl);
4250
75eb0fad
BA		 4251 /*
4252 * Perform any post-link-up configuration before
4253 * reporting link up.
4254 */
4255 if (phy->ops.cfg_on_link_up)
4256 phy->ops.cfg_on_link_up(hw);
4257
bc7f75fa 4258 netif_carrier_on(netdev);
bc7f75fa
AK		 4259
4260 if (!test_bit(__E1000_DOWN, &adapter->state))
4261 mod_timer(&adapter->phy_info_timer,
4262 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4263 }
4264 } else {
4265 if (netif_carrier_ok(netdev)) {
4266 adapter->link_speed = 0;
4267 adapter->link_duplex = 0;
8f12fe86
BA		 4268 /* Link status message must follow this format */
4269 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4270 adapter->netdev->name);
bc7f75fa 4271 netif_carrier_off(netdev);
bc7f75fa
AK		 4272 if (!test_bit(__E1000_DOWN, &adapter->state))
4273 mod_timer(&adapter->phy_info_timer,
4274 round_jiffies(jiffies + 2 * HZ));
4275
4276 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4277 schedule_work(&adapter->reset_task);
23606cf5
RW		 4278 else
4279 pm_schedule_suspend(netdev->dev.parent,
4280 LINK_TIMEOUT);
bc7f75fa
AK		 4281 }
4282 }
4283
4284link_up:
4285 e1000e_update_stats(adapter);
4286
4287 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4288 adapter->tpt_old = adapter->stats.tpt;
4289 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4290 adapter->colc_old = adapter->stats.colc;
4291
7c25769f
BA		 4292 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4293 adapter->gorc_old = adapter->stats.gorc;
4294 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4295 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4296
4297 e1000e_update_adaptive(&adapter->hw);
4298
4299 if (!netif_carrier_ok(netdev)) {
4300 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4301 tx_ring->count);
4302 if (tx_pending) {
ad68076e
BA		 4303 /*
4304 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4305 * but we've got queued Tx work that's never going
4306 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4307 * (Do the reset outside of interrupt context).
4308 */
bc7f75fa
AK		 4309 adapter->tx_timeout_count++;
4310 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4311 /* return immediately since reset is imminent */
4312 return;
bc7f75fa
AK		 4313 }
4314 }
4315
eab2abf5
JB		 4316 /* Simple mode for Interrupt Throttle Rate (ITR) */
4317 if (adapter->itr_setting == 4) {
4318 /*
4319 * Symmetric Tx/Rx gets a reduced ITR=2000;
4320 * Total asymmetrical Tx or Rx gets ITR=8000;
4321 * everyone else is between 2000-8000.
4322 */
4323 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4324 u32 dif = (adapter->gotc > adapter->gorc ?
4325 adapter->gotc - adapter->gorc :
4326 adapter->gorc - adapter->gotc) / 10000;
4327 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4328
4329 ew32(ITR, 1000000000 / (itr * 256));
4330 }
4331
ad68076e 4332 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4333 if (adapter->msix_entries)
4334 ew32(ICS, adapter->rx_ring->ims_val);
4335 else
4336 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4337
4338 /* Force detection of hung controller every watchdog period */
4339 adapter->detect_tx_hung = 1;
4340
3a3b7586
JB		 4341 /* flush partial descriptors to memory before detecting tx hang */
4342 if (adapter->flags2 & FLAG2_DMA_BURST) {
4343 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4344 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4345 /*
4346 * no need to flush the writes because the timeout code does
4347 * an er32 first thing
4348 */
4349 }
4350
ad68076e
BA		 4351 /*
4352 * With 82571 controllers, LAA may be overwritten due to controller
4353 * reset from the other port. Set the appropriate LAA in RAR[0]
4354 */
bc7f75fa
AK		 4355 if (e1000e_get_laa_state_82571(hw))
4356 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4357
ff10e13c
CW		 4358 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4359 e1000e_check_82574_phy_workaround(adapter);
4360
bc7f75fa
AK		 4361 /* Reset the timer */
4362 if (!test_bit(__E1000_DOWN, &adapter->state))
4363 mod_timer(&adapter->watchdog_timer,
4364 round_jiffies(jiffies + 2 * HZ));
4365}
4366
4367#define E1000_TX_FLAGS_CSUM 0x00000001
4368#define E1000_TX_FLAGS_VLAN 0x00000002
4369#define E1000_TX_FLAGS_TSO 0x00000004
4370#define E1000_TX_FLAGS_IPV4 0x00000008
4371#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4372#define E1000_TX_FLAGS_VLAN_SHIFT 16
4373
4374static int e1000_tso(struct e1000_adapter *adapter,
4375 struct sk_buff *skb)
4376{
4377 struct e1000_ring *tx_ring = adapter->tx_ring;
4378 struct e1000_context_desc *context_desc;
4379 struct e1000_buffer *buffer_info;
4380 unsigned int i;
4381 u32 cmd_length = 0;
4382 u16 ipcse = 0, tucse, mss;
4383 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4384 int err;
4385
3d5e33c9
BA		 4386 if (!skb_is_gso(skb))
4387 return 0;
bc7f75fa 4388
3d5e33c9
BA		 4389 if (skb_header_cloned(skb)) {
4390 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4391 if (err)
4392 return err;
bc7f75fa
AK		 4393 }
4394
3d5e33c9
BA		 4395 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4396 mss = skb_shinfo(skb)->gso_size;
4397 if (skb->protocol == htons(ETH_P_IP)) {
4398 struct iphdr *iph = ip_hdr(skb);
4399 iph->tot_len = 0;
4400 iph->check = 0;
4401 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4402 0, IPPROTO_TCP, 0);
4403 cmd_length = E1000_TXD_CMD_IP;
4404 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4405 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4406 ipv6_hdr(skb)->payload_len = 0;
4407 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4408 &ipv6_hdr(skb)->daddr,
4409 0, IPPROTO_TCP, 0);
4410 ipcse = 0;
4411 }
4412 ipcss = skb_network_offset(skb);
4413 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4414 tucss = skb_transport_offset(skb);
4415 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4416 tucse = 0;
4417
4418 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4419 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4420
4421 i = tx_ring->next_to_use;
4422 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4423 buffer_info = &tx_ring->buffer_info[i];
4424
4425 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4426 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4427 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4428 context_desc->upper_setup.tcp_fields.tucss = tucss;
4429 context_desc->upper_setup.tcp_fields.tucso = tucso;
4430 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4431 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4432 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4433 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4434
4435 buffer_info->time_stamp = jiffies;
4436 buffer_info->next_to_watch = i;
4437
4438 i++;
4439 if (i == tx_ring->count)
4440 i = 0;
4441 tx_ring->next_to_use = i;
4442
4443 return 1;
bc7f75fa
AK		 4444}
4445
4446static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4447{
4448 struct e1000_ring *tx_ring = adapter->tx_ring;
4449 struct e1000_context_desc *context_desc;
4450 struct e1000_buffer *buffer_info;
4451 unsigned int i;
4452 u8 css;
af807c82 4453 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4454 __be16 protocol;
bc7f75fa 4455
af807c82
DG		 4456 if (skb->ip_summed != CHECKSUM_PARTIAL)
4457 return 0;
bc7f75fa 4458
5f66f208
AJ		 4459 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4460 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4461 else
4462 protocol = skb->protocol;
4463
3f518390 4464 switch (protocol) {
09640e63 4465 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4466 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4467 cmd_len |= E1000_TXD_CMD_TCP;
4468 break;
09640e63 4469 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4470 /* XXX not handling all IPV6 headers */
4471 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4472 cmd_len |= E1000_TXD_CMD_TCP;
4473 break;
4474 default:
4475 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4476 e_warn("checksum_partial proto=%x!\n",
4477 be16_to_cpu(protocol));
af807c82 4478 break;
bc7f75fa
AK		 4479 }
4480
0d0b1672 4481 css = skb_checksum_start_offset(skb);
af807c82
DG		 4482
4483 i = tx_ring->next_to_use;
4484 buffer_info = &tx_ring->buffer_info[i];
4485 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4486
4487 context_desc->lower_setup.ip_config = 0;
4488 context_desc->upper_setup.tcp_fields.tucss = css;
4489 context_desc->upper_setup.tcp_fields.tucso =
4490 css + skb->csum_offset;
4491 context_desc->upper_setup.tcp_fields.tucse = 0;
4492 context_desc->tcp_seg_setup.data = 0;
4493 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4494
4495 buffer_info->time_stamp = jiffies;
4496 buffer_info->next_to_watch = i;
4497
4498 i++;
4499 if (i == tx_ring->count)
4500 i = 0;
4501 tx_ring->next_to_use = i;
4502
4503 return 1;
bc7f75fa
AK		 4504}
4505
4506#define E1000_MAX_PER_TXD 8192
4507#define E1000_MAX_TXD_PWR 12
4508
4509static int e1000_tx_map(struct e1000_adapter *adapter,
4510 struct sk_buff *skb, unsigned int first,
4511 unsigned int max_per_txd, unsigned int nr_frags,
4512 unsigned int mss)
4513{
4514 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4515 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4516 struct e1000_buffer *buffer_info;
8ddc951c 4517 unsigned int len = skb_headlen(skb);
03b1320d 4518 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4519 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4520
4521 i = tx_ring->next_to_use;
4522
4523 while (len) {
1b7719c4 4524 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4525 size = min(len, max_per_txd);
4526
bc7f75fa 4527 buffer_info->length = size;
bc7f75fa 4528 buffer_info->time_stamp = jiffies;
bc7f75fa 4529 buffer_info->next_to_watch = i;
0be3f55f
NN		 4530 buffer_info->dma = dma_map_single(&pdev->dev,
4531 skb->data + offset,
4532 size, DMA_TO_DEVICE);
03b1320d 4533 buffer_info->mapped_as_page = false;
0be3f55f 4534 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4535 goto dma_error;
bc7f75fa
AK		 4536
4537 len -= size;
4538 offset += size;
03b1320d 4539 count++;
1b7719c4
AD		 4540
4541 if (len) {
4542 i++;
4543 if (i == tx_ring->count)
4544 i = 0;
4545 }
bc7f75fa
AK		 4546 }
4547
4548 for (f = 0; f < nr_frags; f++) {
4549 struct skb_frag_struct *frag;
4550
4551 frag = &skb_shinfo(skb)->frags[f];
4552 len = frag->size;
03b1320d 4553 offset = frag->page_offset;
bc7f75fa
AK		 4554
4555 while (len) {
1b7719c4
AD		 4556 i++;
4557 if (i == tx_ring->count)
4558 i = 0;
4559
bc7f75fa
AK		 4560 buffer_info = &tx_ring->buffer_info[i];
4561 size = min(len, max_per_txd);
bc7f75fa
AK		 4562
4563 buffer_info->length = size;
4564 buffer_info->time_stamp = jiffies;
bc7f75fa 4565 buffer_info->next_to_watch = i;
0be3f55f 4566 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4567 offset, size,
0be3f55f 4568 DMA_TO_DEVICE);
03b1320d 4569 buffer_info->mapped_as_page = true;
0be3f55f 4570 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4571 goto dma_error;
bc7f75fa
AK		 4572
4573 len -= size;
4574 offset += size;
4575 count++;
bc7f75fa
AK		 4576 }
4577 }
4578
9ed318d5
TH		 4579 segs = skb_shinfo(skb)->gso_segs ?: 1;
4580 /* multiply data chunks by size of headers */
4581 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4582
bc7f75fa 4583 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4584 tx_ring->buffer_info[i].segs = segs;
4585 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4586 tx_ring->buffer_info[first].next_to_watch = i;
4587
4588 return count;
03b1320d
AD		 4589
4590dma_error:
4591 dev_err(&pdev->dev, "TX DMA map failed\n");
4592 buffer_info->dma = 0;
c1fa347f 4593 if (count)
03b1320d 4594 count--;
c1fa347f
RK		 4595
4596 while (count--) {
4597 if (i==0)
03b1320d 4598 i += tx_ring->count;
c1fa347f 4599 i--;
03b1320d 4600 buffer_info = &tx_ring->buffer_info[i];
1d51c418 4601 e1000_put_txbuf(adapter, buffer_info);
03b1320d
AD		 4602 }
4603
4604 return 0;
bc7f75fa
AK		 4605}
4606
4607static void e1000_tx_queue(struct e1000_adapter *adapter,
4608 int tx_flags, int count)
4609{
4610 struct e1000_ring *tx_ring = adapter->tx_ring;
4611 struct e1000_tx_desc *tx_desc = NULL;
4612 struct e1000_buffer *buffer_info;
4613 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4614 unsigned int i;
4615
4616 if (tx_flags & E1000_TX_FLAGS_TSO) {
4617 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4618 E1000_TXD_CMD_TSE;
4619 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4620
4621 if (tx_flags & E1000_TX_FLAGS_IPV4)
4622 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4623 }
4624
4625 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4626 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4627 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4628 }
4629
4630 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4631 txd_lower |= E1000_TXD_CMD_VLE;
4632 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4633 }
4634
4635 i = tx_ring->next_to_use;
4636
36b973df 4637 do {
bc7f75fa
AK		 4638 buffer_info = &tx_ring->buffer_info[i];
4639 tx_desc = E1000_TX_DESC(*tx_ring, i);
4640 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4641 tx_desc->lower.data =
4642 cpu_to_le32(txd_lower | buffer_info->length);
4643 tx_desc->upper.data = cpu_to_le32(txd_upper);
4644
4645 i++;
4646 if (i == tx_ring->count)
4647 i = 0;
36b973df 4648 } while (--count > 0);
bc7f75fa
AK		 4649
4650 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4651
ad68076e
BA		 4652 /*
4653 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4654 * know there are new descriptors to fetch. (Only
4655 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4656 * such as IA-64).
4657 */
bc7f75fa
AK		 4658 wmb();
4659
4660 tx_ring->next_to_use = i;
4661 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4662 /*
4663 * we need this if more than one processor can write to our tail
4664 * at a time, it synchronizes IO on IA64/Altix systems
4665 */
bc7f75fa
AK		 4666 mmiowb();
4667}
4668
4669#define MINIMUM_DHCP_PACKET_SIZE 282
4670static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4671 struct sk_buff *skb)
4672{
4673 struct e1000_hw *hw = &adapter->hw;
4674 u16 length, offset;
4675
4676 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4677 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4678 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4679 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4680 return 0;
4681 }
4682
4683 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4684 return 0;
4685
4686 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4687 return 0;
4688
4689 {
4690 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4691 struct udphdr *udp;
4692
4693 if (ip->protocol != IPPROTO_UDP)
4694 return 0;
4695
4696 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4697 if (ntohs(udp->dest) != 67)
4698 return 0;
4699
4700 offset = (u8 *)udp + 8 - skb->data;
4701 length = skb->len - offset;
4702 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4703 }
4704
4705 return 0;
4706}
4707
4708static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4709{
4710 struct e1000_adapter *adapter = netdev_priv(netdev);
4711
4712 netif_stop_queue(netdev);
ad68076e
BA		 4713 /*
4714 * Herbert's original patch had:
bc7f75fa 4715 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4716 * but since that doesn't exist yet, just open code it.
4717 */
bc7f75fa
AK		 4718 smp_mb();
4719
ad68076e
BA		 4720 /*
4721 * We need to check again in a case another CPU has just
4722 * made room available.
4723 */
bc7f75fa
AK		 4724 if (e1000_desc_unused(adapter->tx_ring) < size)
4725 return -EBUSY;
4726
4727 /* A reprieve! */
4728 netif_start_queue(netdev);
4729 ++adapter->restart_queue;
4730 return 0;
4731}
4732
4733static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4734{
4735 struct e1000_adapter *adapter = netdev_priv(netdev);
4736
4737 if (e1000_desc_unused(adapter->tx_ring) >= size)
4738 return 0;
4739 return __e1000_maybe_stop_tx(netdev, size);
4740}
4741
4742#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4743static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4744 struct net_device *netdev)
bc7f75fa
AK		 4745{
4746 struct e1000_adapter *adapter = netdev_priv(netdev);
4747 struct e1000_ring *tx_ring = adapter->tx_ring;
4748 unsigned int first;
4749 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4750 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4751 unsigned int tx_flags = 0;
e743d313 4752 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4753 unsigned int nr_frags;
4754 unsigned int mss;
bc7f75fa
AK		 4755 int count = 0;
4756 int tso;
4757 unsigned int f;
bc7f75fa
AK		 4758
4759 if (test_bit(__E1000_DOWN, &adapter->state)) {
4760 dev_kfree_skb_any(skb);
4761 return NETDEV_TX_OK;
4762 }
4763
4764 if (skb->len <= 0) {
4765 dev_kfree_skb_any(skb);
4766 return NETDEV_TX_OK;
4767 }
4768
4769 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4770 /*
4771 * The controller does a simple calculation to
bc7f75fa
AK		 4772 * make sure there is enough room in the FIFO before
4773 * initiating the DMA for each buffer. The calc is:
4774 * 4 = ceil(buffer len/mss). To make sure we don't
4775 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4776 * drops.
4777 */
bc7f75fa
AK		 4778 if (mss) {
4779 u8 hdr_len;
4780 max_per_txd = min(mss << 2, max_per_txd);
4781 max_txd_pwr = fls(max_per_txd) - 1;
4782
ad68076e
BA		 4783 /*
4784 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4785 * points to just header, pull a few bytes of payload from
4786 * frags into skb->data
4787 */
bc7f75fa 4788 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4789 /*
4790 * we do this workaround for ES2LAN, but it is un-necessary,
4791 * avoiding it could save a lot of cycles
4792 */
4e6c709c 4793 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4794 unsigned int pull_size;
4795
4796 pull_size = min((unsigned int)4, skb->data_len);
4797 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4798 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4799 dev_kfree_skb_any(skb);
4800 return NETDEV_TX_OK;
4801 }
e743d313 4802 len = skb_headlen(skb);
bc7f75fa
AK		 4803 }
4804 }
4805
4806 /* reserve a descriptor for the offload context */
4807 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4808 count++;
4809 count++;
4810
4811 count += TXD_USE_COUNT(len, max_txd_pwr);
4812
4813 nr_frags = skb_shinfo(skb)->nr_frags;
4814 for (f = 0; f < nr_frags; f++)
4815 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4816 max_txd_pwr);
4817
4818 if (adapter->hw.mac.tx_pkt_filtering)
4819 e1000_transfer_dhcp_info(adapter, skb);
4820
ad68076e
BA		 4821 /*
4822 * need: count + 2 desc gap to keep tail from touching
4823 * head, otherwise try next time
4824 */
92af3e95 4825 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4826 return NETDEV_TX_BUSY;
bc7f75fa 4827
eab6d18d 4828 if (vlan_tx_tag_present(skb)) {
bc7f75fa
AK		 4829 tx_flags |= E1000_TX_FLAGS_VLAN;
4830 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4831 }
4832
4833 first = tx_ring->next_to_use;
4834
4835 tso = e1000_tso(adapter, skb);
4836 if (tso < 0) {
4837 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4838 return NETDEV_TX_OK;
4839 }
4840
4841 if (tso)
4842 tx_flags |= E1000_TX_FLAGS_TSO;
4843 else if (e1000_tx_csum(adapter, skb))
4844 tx_flags |= E1000_TX_FLAGS_CSUM;
4845
ad68076e
BA		 4846 /*
4847 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4848 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4849 * no longer assume, we must.
4850 */
bc7f75fa
AK		 4851 if (skb->protocol == htons(ETH_P_IP))
4852 tx_flags |= E1000_TX_FLAGS_IPV4;
4853
1b7719c4 4854 /* if count is 0 then mapping error has occured */
bc7f75fa 4855 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4856 if (count) {
4857 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4858 /* Make sure there is space in the ring for the next send. */
4859 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4860
4861 } else {
bc7f75fa 4862 dev_kfree_skb_any(skb);
1b7719c4
AD		 4863 tx_ring->buffer_info[first].time_stamp = 0;
4864 tx_ring->next_to_use = first;
bc7f75fa
AK		 4865 }
4866
bc7f75fa
AK		 4867 return NETDEV_TX_OK;
4868}
4869
4870/**
4871 * e1000_tx_timeout - Respond to a Tx Hang
4872 * @netdev: network interface device structure
4873 **/
4874static void e1000_tx_timeout(struct net_device *netdev)
4875{
4876 struct e1000_adapter *adapter = netdev_priv(netdev);
4877
4878 /* Do the reset outside of interrupt context */
4879 adapter->tx_timeout_count++;
4880 schedule_work(&adapter->reset_task);
4881}
4882
4883static void e1000_reset_task(struct work_struct *work)
4884{
4885 struct e1000_adapter *adapter;
4886 adapter = container_of(work, struct e1000_adapter, reset_task);
4887
affa9dfb
CW		 4888 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4889 (adapter->flags & FLAG_RX_RESTART_NOW))) {
4890 e1000e_dump(adapter);
4891 e_err("Reset adapter\n");
4892 }
bc7f75fa
AK		 4893 e1000e_reinit_locked(adapter);
4894}
4895
4896/**
4897 * e1000_get_stats - Get System Network Statistics
4898 * @netdev: network interface device structure
4899 *
4900 * Returns the address of the device statistics structure.
4901 * The statistics are actually updated from the timer callback.
4902 **/
4903static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4904{
bc7f75fa 4905 /* only return the current stats */
7274c20f 4906 return &netdev->stats;
bc7f75fa
AK		 4907}
4908
4909/**
4910 * e1000_change_mtu - Change the Maximum Transfer Unit
4911 * @netdev: network interface device structure
4912 * @new_mtu: new value for maximum frame size
4913 *
4914 * Returns 0 on success, negative on failure
4915 **/
4916static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4917{
4918 struct e1000_adapter *adapter = netdev_priv(netdev);
4919 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4920
2adc55c9
BA		 4921 /* Jumbo frame support */
4922 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4923 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4924 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4925 return -EINVAL;
4926 }
4927
2adc55c9
BA		 4928 /* Supported frame sizes */
4929 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4930 (max_frame > adapter->max_hw_frame_size)) {
4931 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4932 return -EINVAL;
4933 }
4934
a1ce6473
BA		 4935 /* Jumbo frame workaround on 82579 requires CRC be stripped */
4936 if ((adapter->hw.mac.type == e1000_pch2lan) &&
4937 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
4938 (new_mtu > ETH_DATA_LEN)) {
4939 e_err("Jumbo Frames not supported on 82579 when CRC "
4940 "stripping is disabled.\n");
4941 return -EINVAL;
4942 }
4943
6f461f6c
BA		 4944 /* 82573 Errata 17 */
4945 if (((adapter->hw.mac.type == e1000_82573) ||
4946 (adapter->hw.mac.type == e1000_82574)) &&
4947 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4948 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4949 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4950 }
4951
bc7f75fa
AK		 4952 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4953 msleep(1);
610c9928 4954 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4955 adapter->max_frame_size = max_frame;
610c9928
BA		 4956 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4957 netdev->mtu = new_mtu;
bc7f75fa
AK		 4958 if (netif_running(netdev))
4959 e1000e_down(adapter);
4960
ad68076e
BA		 4961 /*
4962 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4963 * means we reserve 2 more, this pushes us to allocate from the next
4964 * larger slab size.
ad68076e 4965 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4966 * However with the new *_jumbo_rx* routines, jumbo receives will use
4967 * fragmented skbs
ad68076e 4968 */
bc7f75fa 4969
9926146b 4970 if (max_frame <= 2048)
bc7f75fa
AK		 4971 adapter->rx_buffer_len = 2048;
4972 else
4973 adapter->rx_buffer_len = 4096;
4974
4975 /* adjust allocation if LPE protects us, and we aren't using SBP */
4976 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4977 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4978 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4979 + ETH_FCS_LEN;
bc7f75fa 4980
bc7f75fa
AK		 4981 if (netif_running(netdev))
4982 e1000e_up(adapter);
4983 else
4984 e1000e_reset(adapter);
4985
4986 clear_bit(__E1000_RESETTING, &adapter->state);
4987
4988 return 0;
4989}
4990
4991static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4992 int cmd)
4993{
4994 struct e1000_adapter *adapter = netdev_priv(netdev);
4995 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4996
318a94d6 4997 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4998 return -EOPNOTSUPP;
4999
5000 switch (cmd) {
5001 case SIOCGMIIPHY:
5002 data->phy_id = adapter->hw.phy.addr;
5003 break;
5004 case SIOCGMIIREG:
b16a002e
BA		 5005 e1000_phy_read_status(adapter);
5006
7c25769f
BA		 5007 switch (data->reg_num & 0x1F) {
5008 case MII_BMCR:
5009 data->val_out = adapter->phy_regs.bmcr;
5010 break;
5011 case MII_BMSR:
5012 data->val_out = adapter->phy_regs.bmsr;
5013 break;
5014 case MII_PHYSID1:
5015 data->val_out = (adapter->hw.phy.id >> 16);
5016 break;
5017 case MII_PHYSID2:
5018 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5019 break;
5020 case MII_ADVERTISE:
5021 data->val_out = adapter->phy_regs.advertise;
5022 break;
5023 case MII_LPA:
5024 data->val_out = adapter->phy_regs.lpa;
5025 break;
5026 case MII_EXPANSION:
5027 data->val_out = adapter->phy_regs.expansion;
5028 break;
5029 case MII_CTRL1000:
5030 data->val_out = adapter->phy_regs.ctrl1000;
5031 break;
5032 case MII_STAT1000:
5033 data->val_out = adapter->phy_regs.stat1000;
5034 break;
5035 case MII_ESTATUS:
5036 data->val_out = adapter->phy_regs.estatus;
5037 break;
5038 default:
bc7f75fa
AK		 5039 return -EIO;
5040 }
bc7f75fa
AK		 5041 break;
5042 case SIOCSMIIREG:
5043 default:
5044 return -EOPNOTSUPP;
5045 }
5046 return 0;
5047}
5048
5049static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5050{
5051 switch (cmd) {
5052 case SIOCGMIIPHY:
5053 case SIOCGMIIREG:
5054 case SIOCSMIIREG:
5055 return e1000_mii_ioctl(netdev, ifr, cmd);
5056 default:
5057 return -EOPNOTSUPP;
5058 }
5059}
5060
a4f58f54
BA		 5061static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5062{
5063 struct e1000_hw *hw = &adapter->hw;
5064 u32 i, mac_reg;
5065 u16 phy_reg;
5066 int retval = 0;
5067
5068 /* copy MAC RARs to PHY RARs */
d3738bb8 5069 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 5070
5071 /* copy MAC MTA to PHY MTA */
5072 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5073 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5074 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
5075 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
5076 }
5077
5078 /* configure PHY Rx Control register */
5079 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
5080 mac_reg = er32(RCTL);
5081 if (mac_reg & E1000_RCTL_UPE)
5082 phy_reg |= BM_RCTL_UPE;
5083 if (mac_reg & E1000_RCTL_MPE)
5084 phy_reg |= BM_RCTL_MPE;
5085 phy_reg &= ~(BM_RCTL_MO_MASK);
5086 if (mac_reg & E1000_RCTL_MO_3)
5087 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5088 << BM_RCTL_MO_SHIFT);
5089 if (mac_reg & E1000_RCTL_BAM)
5090 phy_reg |= BM_RCTL_BAM;
5091 if (mac_reg & E1000_RCTL_PMCF)
5092 phy_reg |= BM_RCTL_PMCF;
5093 mac_reg = er32(CTRL);
5094 if (mac_reg & E1000_CTRL_RFCE)
5095 phy_reg |= BM_RCTL_RFCE;
5096 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
5097
5098 /* enable PHY wakeup in MAC register */
5099 ew32(WUFC, wufc);
5100 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5101
5102 /* configure and enable PHY wakeup in PHY registers */
5103 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
5104 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5105
5106 /* activate PHY wakeup */
94d8186a 5107 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 5108 if (retval) {
5109 e_err("Could not acquire PHY\n");
5110 return retval;
5111 }
5112 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5113 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
5114 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
5115 if (retval) {
5116 e_err("Could not read PHY page 769\n");
5117 goto out;
5118 }
5119 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5120 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5121 if (retval)
5122 e_err("Could not set PHY Host Wakeup bit\n");
5123out:
94d8186a 5124 hw->phy.ops.release(hw);
a4f58f54
BA		 5125
5126 return retval;
5127}
5128
23606cf5
RW		 5129static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5130 bool runtime)
bc7f75fa
AK		 5131{
5132 struct net_device *netdev = pci_get_drvdata(pdev);
5133 struct e1000_adapter *adapter = netdev_priv(netdev);
5134 struct e1000_hw *hw = &adapter->hw;
5135 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5136 /* Runtime suspend should only enable wakeup for link changes */
5137 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5138 int retval = 0;
5139
5140 netif_device_detach(netdev);
5141
5142 if (netif_running(netdev)) {
5143 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5144 e1000e_down(adapter);
5145 e1000_free_irq(adapter);
5146 }
4662e82b 5147 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5148
5149 retval = pci_save_state(pdev);
5150 if (retval)
5151 return retval;
5152
5153 status = er32(STATUS);
5154 if (status & E1000_STATUS_LU)
5155 wufc &= ~E1000_WUFC_LNKC;
5156
5157 if (wufc) {
5158 e1000_setup_rctl(adapter);
5159 e1000_set_multi(netdev);
5160
5161 /* turn on all-multi mode if wake on multicast is enabled */
5162 if (wufc & E1000_WUFC_MC) {
5163 rctl = er32(RCTL);
5164 rctl |= E1000_RCTL_MPE;
5165 ew32(RCTL, rctl);
5166 }
5167
5168 ctrl = er32(CTRL);
5169 /* advertise wake from D3Cold */
5170 #define E1000_CTRL_ADVD3WUC 0x00100000
5171 /* phy power management enable */
5172 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5173 ctrl |= E1000_CTRL_ADVD3WUC;
5174 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5175 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5176 ew32(CTRL, ctrl);
5177
318a94d6
JK		 5178 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5179 adapter->hw.phy.media_type ==
5180 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5181 /* keep the laser running in D3 */
5182 ctrl_ext = er32(CTRL_EXT);
93a23f48 5183 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5184 ew32(CTRL_EXT, ctrl_ext);
5185 }
5186
97ac8cae
BA		 5187 if (adapter->flags & FLAG_IS_ICH)
5188 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5189
bc7f75fa
AK		 5190 /* Allow time for pending master requests to run */
5191 e1000e_disable_pcie_master(&adapter->hw);
5192
82776a4b 5193 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5194 /* enable wakeup by the PHY */
5195 retval = e1000_init_phy_wakeup(adapter, wufc);
5196 if (retval)
5197 return retval;
5198 } else {
5199 /* enable wakeup by the MAC */
5200 ew32(WUFC, wufc);
5201 ew32(WUC, E1000_WUC_PME_EN);
5202 }
bc7f75fa
AK		 5203 } else {
5204 ew32(WUC, 0);
5205 ew32(WUFC, 0);
bc7f75fa
AK		 5206 }
5207
4f9de721
RW		 5208 *enable_wake = !!wufc;
5209
bc7f75fa 5210 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5211 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5212 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5213 *enable_wake = true;
bc7f75fa
AK		 5214
5215 if (adapter->hw.phy.type == e1000_phy_igp_3)
5216 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5217
ad68076e
BA		 5218 /*
5219 * Release control of h/w to f/w. If f/w is AMT enabled, this
5220 * would have already happened in close and is redundant.
5221 */
31dbe5b4 5222 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 5223
5224 pci_disable_device(pdev);
5225
4f9de721
RW		 5226 return 0;
5227}
5228
5229static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5230{
5231 if (sleep && wake) {
5232 pci_prepare_to_sleep(pdev);
5233 return;
5234 }
5235
5236 pci_wake_from_d3(pdev, wake);
5237 pci_set_power_state(pdev, PCI_D3hot);
5238}
5239
5240static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5241 bool wake)
5242{
5243 struct net_device *netdev = pci_get_drvdata(pdev);
5244 struct e1000_adapter *adapter = netdev_priv(netdev);
5245
005cbdfc
AD		 5246 /*
5247 * The pci-e switch on some quad port adapters will report a
5248 * correctable error when the MAC transitions from D0 to D3. To
5249 * prevent this we need to mask off the correctable errors on the
5250 * downstream port of the pci-e switch.
5251 */
5252 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5253 struct pci_dev *us_dev = pdev->bus->self;
5254 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5255 u16 devctl;
5256
5257 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5258 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5259 (devctl & ~PCI_EXP_DEVCTL_CERE));
5260
4f9de721 5261 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5262
5263 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5264 } else {
4f9de721 5265 e1000_power_off(pdev, sleep, wake);
005cbdfc 5266 }
bc7f75fa
AK		 5267}
5268
6f461f6c
BA		 5269#ifdef CONFIG_PCIEASPM
5270static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5271{
5272 pci_disable_link_state(pdev, state);
5273}
5274#else
5275static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5276{
5277 int pos;
6f461f6c 5278 u16 reg16;
1eae4eb2
AK		 5279
5280 /*
6f461f6c
BA		 5281 * Both device and parent should have the same ASPM setting.
5282 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5283 */
6f461f6c
BA		 5284 pos = pci_pcie_cap(pdev);
5285 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5286 reg16 &= ~state;
5287 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5288
0c75ba22
AB		 5289 if (!pdev->bus->self)
5290 return;
5291
6f461f6c
BA		 5292 pos = pci_pcie_cap(pdev->bus->self);
5293 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5294 reg16 &= ~state;
5295 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5296}
5297#endif
5298void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5299{
5300 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5301 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5302 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5303
5304 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5305}
5306
a0340162 5307#ifdef CONFIG_PM_OPS
23606cf5 5308static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5309{
23606cf5 5310 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5311}
5312
23606cf5 5313static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5314{
5315 struct net_device *netdev = pci_get_drvdata(pdev);
5316 struct e1000_adapter *adapter = netdev_priv(netdev);
5317 struct e1000_hw *hw = &adapter->hw;
5318 u32 err;
5319
5320 pci_set_power_state(pdev, PCI_D0);
5321 pci_restore_state(pdev);
28b8f04a 5322 pci_save_state(pdev);
6f461f6c
BA		 5323 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5324 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5325
4662e82b 5326 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5327 if (netif_running(netdev)) {
5328 err = e1000_request_irq(adapter);
5329 if (err)
5330 return err;
5331 }
5332
5333 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5334
5335 /* report the system wakeup cause from S3/S4 */
5336 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5337 u16 phy_data;
5338
5339 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5340 if (phy_data) {
5341 e_info("PHY Wakeup cause - %s\n",
5342 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5343 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5344 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5345 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5346 phy_data & E1000_WUS_LNKC ? "Link Status "
5347 " Change" : "other");
5348 }
5349 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5350 } else {
5351 u32 wus = er32(WUS);
5352 if (wus) {
5353 e_info("MAC Wakeup cause - %s\n",
5354 wus & E1000_WUS_EX ? "Unicast Packet" :
5355 wus & E1000_WUS_MC ? "Multicast Packet" :
5356 wus & E1000_WUS_BC ? "Broadcast Packet" :
5357 wus & E1000_WUS_MAG ? "Magic Packet" :
5358 wus & E1000_WUS_LNKC ? "Link Status Change" :
5359 "other");
5360 }
5361 ew32(WUS, ~0);
5362 }
5363
bc7f75fa 5364 e1000e_reset(adapter);
bc7f75fa 5365
cd791618 5366 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5367
5368 if (netif_running(netdev))
5369 e1000e_up(adapter);
5370
5371 netif_device_attach(netdev);
5372
ad68076e
BA		 5373 /*
5374 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5375 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5376 * under the control of the driver.
5377 */
c43bc57e 5378 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5379 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5380
5381 return 0;
5382}
23606cf5 5383
a0340162
RW		 5384#ifdef CONFIG_PM_SLEEP
5385static int e1000_suspend(struct device *dev)
5386{
5387 struct pci_dev *pdev = to_pci_dev(dev);
5388 int retval;
5389 bool wake;
5390
5391 retval = __e1000_shutdown(pdev, &wake, false);
5392 if (!retval)
5393 e1000_complete_shutdown(pdev, true, wake);
5394
5395 return retval;
5396}
5397
23606cf5
RW		 5398static int e1000_resume(struct device *dev)
5399{
5400 struct pci_dev *pdev = to_pci_dev(dev);
5401 struct net_device *netdev = pci_get_drvdata(pdev);
5402 struct e1000_adapter *adapter = netdev_priv(netdev);
5403
5404 if (e1000e_pm_ready(adapter))
5405 adapter->idle_check = true;
5406
5407 return __e1000_resume(pdev);
5408}
a0340162
RW		 5409#endif /* CONFIG_PM_SLEEP */
5410
5411#ifdef CONFIG_PM_RUNTIME
5412static int e1000_runtime_suspend(struct device *dev)
5413{
5414 struct pci_dev *pdev = to_pci_dev(dev);
5415 struct net_device *netdev = pci_get_drvdata(pdev);
5416 struct e1000_adapter *adapter = netdev_priv(netdev);
5417
5418 if (e1000e_pm_ready(adapter)) {
5419 bool wake;
5420
5421 __e1000_shutdown(pdev, &wake, true);
5422 }
5423
5424 return 0;
5425}
5426
5427static int e1000_idle(struct device *dev)
5428{
5429 struct pci_dev *pdev = to_pci_dev(dev);
5430 struct net_device *netdev = pci_get_drvdata(pdev);
5431 struct e1000_adapter *adapter = netdev_priv(netdev);
5432
5433 if (!e1000e_pm_ready(adapter))
5434 return 0;
5435
5436 if (adapter->idle_check) {
5437 adapter->idle_check = false;
5438 if (!e1000e_has_link(adapter))
5439 pm_schedule_suspend(dev, MSEC_PER_SEC);
5440 }
5441
5442 return -EBUSY;
5443}
23606cf5
RW		 5444
5445static int e1000_runtime_resume(struct device *dev)
5446{
5447 struct pci_dev *pdev = to_pci_dev(dev);
5448 struct net_device *netdev = pci_get_drvdata(pdev);
5449 struct e1000_adapter *adapter = netdev_priv(netdev);
5450
5451 if (!e1000e_pm_ready(adapter))
5452 return 0;
5453
5454 adapter->idle_check = !dev->power.runtime_auto;
5455 return __e1000_resume(pdev);
5456}
a0340162
RW		 5457#endif /* CONFIG_PM_RUNTIME */
5458#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5459
5460static void e1000_shutdown(struct pci_dev *pdev)
5461{
4f9de721
RW		 5462 bool wake = false;
5463
23606cf5 5464 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5465
5466 if (system_state == SYSTEM_POWER_OFF)
5467 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5468}
5469
5470#ifdef CONFIG_NET_POLL_CONTROLLER
147b2c8c
DD		 5471
5472static irqreturn_t e1000_intr_msix(int irq, void *data)
5473{
5474 struct net_device *netdev = data;
5475 struct e1000_adapter *adapter = netdev_priv(netdev);
5476 int vector, msix_irq;
5477
5478 if (adapter->msix_entries) {
5479 vector = 0;
5480 msix_irq = adapter->msix_entries[vector].vector;
5481 disable_irq(msix_irq);
5482 e1000_intr_msix_rx(msix_irq, netdev);
5483 enable_irq(msix_irq);
5484
5485 vector++;
5486 msix_irq = adapter->msix_entries[vector].vector;
5487 disable_irq(msix_irq);
5488 e1000_intr_msix_tx(msix_irq, netdev);
5489 enable_irq(msix_irq);
5490
5491 vector++;
5492 msix_irq = adapter->msix_entries[vector].vector;
5493 disable_irq(msix_irq);
5494 e1000_msix_other(msix_irq, netdev);
5495 enable_irq(msix_irq);
5496 }
5497
5498 return IRQ_HANDLED;
5499}
5500
bc7f75fa
AK		 5501/*
5502 * Polling 'interrupt' - used by things like netconsole to send skbs
5503 * without having to re-enable interrupts. It's not called while
5504 * the interrupt routine is executing.
5505 */
5506static void e1000_netpoll(struct net_device *netdev)
5507{
5508 struct e1000_adapter *adapter = netdev_priv(netdev);
5509
147b2c8c
DD		 5510 switch (adapter->int_mode) {
5511 case E1000E_INT_MODE_MSIX:
5512 e1000_intr_msix(adapter->pdev->irq, netdev);
5513 break;
5514 case E1000E_INT_MODE_MSI:
5515 disable_irq(adapter->pdev->irq);
5516 e1000_intr_msi(adapter->pdev->irq, netdev);
5517 enable_irq(adapter->pdev->irq);
5518 break;
5519 default: /* E1000E_INT_MODE_LEGACY */
5520 disable_irq(adapter->pdev->irq);
5521 e1000_intr(adapter->pdev->irq, netdev);
5522 enable_irq(adapter->pdev->irq);
5523 break;
5524 }
bc7f75fa
AK		 5525}
5526#endif
5527
5528/**
5529 * e1000_io_error_detected - called when PCI error is detected
5530 * @pdev: Pointer to PCI device
5531 * @state: The current pci connection state
5532 *
5533 * This function is called after a PCI bus error affecting
5534 * this device has been detected.
5535 */
5536static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5537 pci_channel_state_t state)
5538{
5539 struct net_device *netdev = pci_get_drvdata(pdev);
5540 struct e1000_adapter *adapter = netdev_priv(netdev);
5541
5542 netif_device_detach(netdev);
5543
c93b5a76
MM		 5544 if (state == pci_channel_io_perm_failure)
5545 return PCI_ERS_RESULT_DISCONNECT;
5546
bc7f75fa
AK		 5547 if (netif_running(netdev))
5548 e1000e_down(adapter);
5549 pci_disable_device(pdev);
5550
5551 /* Request a slot slot reset. */
5552 return PCI_ERS_RESULT_NEED_RESET;
5553}
5554
5555/**
5556 * e1000_io_slot_reset - called after the pci bus has been reset.
5557 * @pdev: Pointer to PCI device
5558 *
5559 * Restart the card from scratch, as if from a cold-boot. Implementation
5560 * resembles the first-half of the e1000_resume routine.
5561 */
5562static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5563{
5564 struct net_device *netdev = pci_get_drvdata(pdev);
5565 struct e1000_adapter *adapter = netdev_priv(netdev);
5566 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5567 int err;
111b9dc5 5568 pci_ers_result_t result;
bc7f75fa 5569
6f461f6c
BA		 5570 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5571 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5572 err = pci_enable_device_mem(pdev);
6e4f6f6b 5573 if (err) {
bc7f75fa
AK		 5574 dev_err(&pdev->dev,
5575 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5576 result = PCI_ERS_RESULT_DISCONNECT;
5577 } else {
5578 pci_set_master(pdev);
23606cf5 5579 pdev->state_saved = true;
111b9dc5 5580 pci_restore_state(pdev);
bc7f75fa 5581
111b9dc5
JB		 5582 pci_enable_wake(pdev, PCI_D3hot, 0);
5583 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5584
111b9dc5
JB		 5585 e1000e_reset(adapter);
5586 ew32(WUS, ~0);
5587 result = PCI_ERS_RESULT_RECOVERED;
5588 }
bc7f75fa 5589
111b9dc5
JB		 5590 pci_cleanup_aer_uncorrect_error_status(pdev);
5591
5592 return result;
bc7f75fa
AK		 5593}
5594
5595/**
5596 * e1000_io_resume - called when traffic can start flowing again.
5597 * @pdev: Pointer to PCI device
5598 *
5599 * This callback is called when the error recovery driver tells us that
5600 * its OK to resume normal operation. Implementation resembles the
5601 * second-half of the e1000_resume routine.
5602 */
5603static void e1000_io_resume(struct pci_dev *pdev)
5604{
5605 struct net_device *netdev = pci_get_drvdata(pdev);
5606 struct e1000_adapter *adapter = netdev_priv(netdev);
5607
cd791618 5608 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5609
5610 if (netif_running(netdev)) {
5611 if (e1000e_up(adapter)) {
5612 dev_err(&pdev->dev,
5613 "can't bring device back up after reset\n");
5614 return;
5615 }
5616 }
5617
5618 netif_device_attach(netdev);
5619
ad68076e
BA		 5620 /*
5621 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5622 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5623 * under the control of the driver.
5624 */
c43bc57e 5625 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5626 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5627
5628}
5629
5630static void e1000_print_device_info(struct e1000_adapter *adapter)
5631{
5632 struct e1000_hw *hw = &adapter->hw;
5633 struct net_device *netdev = adapter->netdev;
073287c0
BA		 5634 u32 ret_val;
5635 u8 pba_str[E1000_PBANUM_LENGTH];
bc7f75fa
AK		 5636
5637 /* print bus type/speed/width info */
7c510e4b 5638 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5639 /* bus width */
5640 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5641 "Width x1"),
5642 /* MAC address */
7c510e4b 5643 netdev->dev_addr);
44defeb3
JK		 5644 e_info("Intel(R) PRO/%s Network Connection\n",
5645 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
073287c0
BA		 5646 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5647 E1000_PBANUM_LENGTH);
5648 if (ret_val)
e0dc4f12 5649 strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1);
073287c0
BA		 5650 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5651 hw->mac.type, hw->phy.type, pba_str);
bc7f75fa
AK		 5652}
5653
10aa4c04
AK		 5654static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5655{
5656 struct e1000_hw *hw = &adapter->hw;
5657 int ret_val;
5658 u16 buf = 0;
5659
5660 if (hw->mac.type != e1000_82573)
5661 return;
5662
5663 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5664 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5665 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5666 dev_warn(&adapter->pdev->dev,
5667 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5668 }
10aa4c04
AK		 5669}
5670
651c2466
SH		 5671static const struct net_device_ops e1000e_netdev_ops = {
5672 .ndo_open = e1000_open,
5673 .ndo_stop = e1000_close,
00829823 5674 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5675 .ndo_get_stats = e1000_get_stats,
5676 .ndo_set_multicast_list = e1000_set_multi,
5677 .ndo_set_mac_address = e1000_set_mac,
5678 .ndo_change_mtu = e1000_change_mtu,
5679 .ndo_do_ioctl = e1000_ioctl,
5680 .ndo_tx_timeout = e1000_tx_timeout,
5681 .ndo_validate_addr = eth_validate_addr,
5682
5683 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5684 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5685 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5686#ifdef CONFIG_NET_POLL_CONTROLLER
5687 .ndo_poll_controller = e1000_netpoll,
5688#endif
5689};
5690
bc7f75fa
AK		 5691/**
5692 * e1000_probe - Device Initialization Routine
5693 * @pdev: PCI device information struct
5694 * @ent: entry in e1000_pci_tbl
5695 *
5696 * Returns 0 on success, negative on failure
5697 *
5698 * e1000_probe initializes an adapter identified by a pci_dev structure.
5699 * The OS initialization, configuring of the adapter private structure,
5700 * and a hardware reset occur.
5701 **/
5702static int __devinit e1000_probe(struct pci_dev *pdev,
5703 const struct pci_device_id *ent)
5704{
5705 struct net_device *netdev;
5706 struct e1000_adapter *adapter;
5707 struct e1000_hw *hw;
5708 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5709 resource_size_t mmio_start, mmio_len;
5710 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5711
5712 static int cards_found;
5713 int i, err, pci_using_dac;
5714 u16 eeprom_data = 0;
5715 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5716
6f461f6c
BA		 5717 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5718 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5719
f0f422e5 5720 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5721 if (err)
5722 return err;
5723
5724 pci_using_dac = 0;
0be3f55f 5725 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5726 if (!err) {
0be3f55f 5727 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5728 if (!err)
5729 pci_using_dac = 1;
5730 } else {
0be3f55f 5731 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5732 if (err) {
0be3f55f
NN		 5733 err = dma_set_coherent_mask(&pdev->dev,
5734 DMA_BIT_MASK(32));
bc7f75fa
AK		 5735 if (err) {
5736 dev_err(&pdev->dev, "No usable DMA "
5737 "configuration, aborting\n");
5738 goto err_dma;
5739 }
5740 }
5741 }
5742
e8de1481 5743 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5744 pci_select_bars(pdev, IORESOURCE_MEM),
5745 e1000e_driver_name);
bc7f75fa
AK		 5746 if (err)
5747 goto err_pci_reg;
5748
68eac460 5749 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5750 pci_enable_pcie_error_reporting(pdev);
68eac460 5751
bc7f75fa 5752 pci_set_master(pdev);
438b365a
BA		 5753 /* PCI config space info */
5754 err = pci_save_state(pdev);
5755 if (err)
5756 goto err_alloc_etherdev;
bc7f75fa
AK		 5757
5758 err = -ENOMEM;
5759 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5760 if (!netdev)
5761 goto err_alloc_etherdev;
5762
bc7f75fa
AK		 5763 SET_NETDEV_DEV(netdev, &pdev->dev);
5764
f85e4dfa
TH		 5765 netdev->irq = pdev->irq;
5766
bc7f75fa
AK		 5767 pci_set_drvdata(pdev, netdev);
5768 adapter = netdev_priv(netdev);
5769 hw = &adapter->hw;
5770 adapter->netdev = netdev;
5771 adapter->pdev = pdev;
5772 adapter->ei = ei;
5773 adapter->pba = ei->pba;
5774 adapter->flags = ei->flags;
eb7c3adb 5775 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5776 adapter->hw.adapter = adapter;
5777 adapter->hw.mac.type = ei->mac;
2adc55c9 5778 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5779 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5780
5781 mmio_start = pci_resource_start(pdev, 0);
5782 mmio_len = pci_resource_len(pdev, 0);
5783
5784 err = -EIO;
5785 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5786 if (!adapter->hw.hw_addr)
5787 goto err_ioremap;
5788
5789 if ((adapter->flags & FLAG_HAS_FLASH) &&
5790 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5791 flash_start = pci_resource_start(pdev, 1);
5792 flash_len = pci_resource_len(pdev, 1);
5793 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5794 if (!adapter->hw.flash_address)
5795 goto err_flashmap;
5796 }
5797
5798 /* construct the net_device struct */
651c2466 5799 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5800 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5801 netdev->watchdog_timeo = 5 * HZ;
5802 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5803 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5804
5805 netdev->mem_start = mmio_start;
5806 netdev->mem_end = mmio_start + mmio_len;
5807
5808 adapter->bd_number = cards_found++;
5809
4662e82b
BA		 5810 e1000e_check_options(adapter);
5811
bc7f75fa
AK		 5812 /* setup adapter struct */
5813 err = e1000_sw_init(adapter);
5814 if (err)
5815 goto err_sw_init;
5816
bc7f75fa
AK		 5817 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5818 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5819 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5820
69e3fd8c 5821 err = ei->get_variants(adapter);
bc7f75fa
AK		 5822 if (err)
5823 goto err_hw_init;
5824
4a770358
BA		 5825 if ((adapter->flags & FLAG_IS_ICH) &&
5826 (adapter->flags & FLAG_READ_ONLY_NVM))
5827 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5828
bc7f75fa
AK		 5829 hw->mac.ops.get_bus_info(&adapter->hw);
5830
318a94d6 5831 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5832
5833 /* Copper options */
318a94d6 5834 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5835 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5836 adapter->hw.phy.disable_polarity_correction = 0;
5837 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5838 }
5839
5840 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5841 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5842
5843 netdev->features = NETIF_F_SG |
5844 NETIF_F_HW_CSUM |
5845 NETIF_F_HW_VLAN_TX |
5846 NETIF_F_HW_VLAN_RX;
5847
5848 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5849 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5850
5851 netdev->features |= NETIF_F_TSO;
5852 netdev->features |= NETIF_F_TSO6;
5853
a5136e23
JK		 5854 netdev->vlan_features |= NETIF_F_TSO;
5855 netdev->vlan_features |= NETIF_F_TSO6;
5856 netdev->vlan_features |= NETIF_F_HW_CSUM;
5857 netdev->vlan_features |= NETIF_F_SG;
5858
7b872a55 5859 if (pci_using_dac) {
bc7f75fa 5860 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 5861 netdev->vlan_features |= NETIF_F_HIGHDMA;
5862 }
bc7f75fa 5863
bc7f75fa
AK		 5864 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5865 adapter->flags |= FLAG_MNG_PT_ENABLED;
5866
ad68076e
BA		 5867 /*
5868 * before reading the NVM, reset the controller to
5869 * put the device in a known good starting state
5870 */
bc7f75fa
AK		 5871 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5872
5873 /*
5874 * systems with ASPM and others may see the checksum fail on the first
5875 * attempt. Let's give it a few tries
5876 */
5877 for (i = 0;; i++) {
5878 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5879 break;
5880 if (i == 2) {
44defeb3 5881 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5882 err = -EIO;
5883 goto err_eeprom;
5884 }
5885 }
5886
10aa4c04
AK		 5887 e1000_eeprom_checks(adapter);
5888
608f8a0d 5889 /* copy the MAC address */
bc7f75fa 5890 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5891 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5892
5893 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5894 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5895
5896 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5897 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5898 err = -EIO;
5899 goto err_eeprom;
5900 }
5901
5902 init_timer(&adapter->watchdog_timer);
c061b18d 5903 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 5904 adapter->watchdog_timer.data = (unsigned long) adapter;
5905
5906 init_timer(&adapter->phy_info_timer);
c061b18d 5907 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 5908 adapter->phy_info_timer.data = (unsigned long) adapter;
5909
5910 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5911 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5912 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5913 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5914 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
9633e63b 5915 INIT_WORK(&adapter->led_blink_task, e1000e_led_blink_task);
bc7f75fa 5916
bc7f75fa
AK		 5917 /* Initialize link parameters. User can change them with ethtool */
5918 adapter->hw.mac.autoneg = 1;
309af40b 5919 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5920 adapter->hw.fc.requested_mode = e1000_fc_default;
5921 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5922 adapter->hw.phy.autoneg_advertised = 0x2f;
5923
5924 /* ring size defaults */
5925 adapter->rx_ring->count = 256;
5926 adapter->tx_ring->count = 256;
5927
5928 /*
5929 * Initial Wake on LAN setting - If APM wake is enabled in
5930 * the EEPROM, enable the ACPI Magic Packet filter
5931 */
5932 if (adapter->flags & FLAG_APME_IN_WUC) {
5933 /* APME bit in EEPROM is mapped to WUC.APME */
5934 eeprom_data = er32(WUC);
5935 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5936 if (eeprom_data & E1000_WUC_PHY_WAKE)
5937 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5938 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5939 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5940 (adapter->hw.bus.func == 1))
5941 e1000_read_nvm(&adapter->hw,
5942 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5943 else
5944 e1000_read_nvm(&adapter->hw,
5945 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5946 }
5947
5948 /* fetch WoL from EEPROM */
5949 if (eeprom_data & eeprom_apme_mask)
5950 adapter->eeprom_wol |= E1000_WUFC_MAG;
5951
5952 /*
5953 * now that we have the eeprom settings, apply the special cases
5954 * where the eeprom may be wrong or the board simply won't support
5955 * wake on lan on a particular port
5956 */
5957 if (!(adapter->flags & FLAG_HAS_WOL))
5958 adapter->eeprom_wol = 0;
5959
5960 /* initialize the wol settings based on the eeprom settings */
5961 adapter->wol = adapter->eeprom_wol;
6ff68026 5962 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5963
84527590
BA		 5964 /* save off EEPROM version number */
5965 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5966
bc7f75fa
AK		 5967 /* reset the hardware with the new settings */
5968 e1000e_reset(adapter);
5969
ad68076e
BA		 5970 /*
5971 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5972 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5973 * under the control of the driver.
5974 */
c43bc57e 5975 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5976 e1000e_get_hw_control(adapter);
bc7f75fa 5977
e0dc4f12 5978 strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1);
bc7f75fa
AK		 5979 err = register_netdev(netdev);
5980 if (err)
5981 goto err_register;
5982
9c563d20
JB		 5983 /* carrier off reporting is important to ethtool even BEFORE open */
5984 netif_carrier_off(netdev);
5985
bc7f75fa
AK		 5986 e1000_print_device_info(adapter);
5987
f3ec4f87
AS		 5988 if (pci_dev_run_wake(pdev))
5989 pm_runtime_put_noidle(&pdev->dev);
23606cf5 5990
bc7f75fa
AK		 5991 return 0;
5992
5993err_register:
c43bc57e 5994 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5995 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 5996err_eeprom:
5997 if (!e1000_check_reset_block(&adapter->hw))
5998 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5999err_hw_init:
bc7f75fa
AK		 6000 kfree(adapter->tx_ring);
6001 kfree(adapter->rx_ring);
6002err_sw_init:
c43bc57e
JB		 6003 if (adapter->hw.flash_address)
6004 iounmap(adapter->hw.flash_address);
e82f54ba 6005 e1000e_reset_interrupt_capability(adapter);
c43bc57e 6006err_flashmap:
bc7f75fa
AK		 6007 iounmap(adapter->hw.hw_addr);
6008err_ioremap:
6009 free_netdev(netdev);
6010err_alloc_etherdev:
f0f422e5
BA		 6011 pci_release_selected_regions(pdev,
6012 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6013err_pci_reg:
6014err_dma:
6015 pci_disable_device(pdev);
6016 return err;
6017}
6018
6019/**
6020 * e1000_remove - Device Removal Routine
6021 * @pdev: PCI device information struct
6022 *
6023 * e1000_remove is called by the PCI subsystem to alert the driver
6024 * that it should release a PCI device. The could be caused by a
6025 * Hot-Plug event, or because the driver is going to be removed from
6026 * memory.
6027 **/
6028static void __devexit e1000_remove(struct pci_dev *pdev)
6029{
6030 struct net_device *netdev = pci_get_drvdata(pdev);
6031 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 6032 bool down = test_bit(__E1000_DOWN, &adapter->state);
6033
ad68076e 6034 /*
23f333a2
TH		 6035 * The timers may be rescheduled, so explicitly disable them
6036 * from being rescheduled.
ad68076e 6037 */
23606cf5
RW		 6038 if (!down)
6039 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 6040 del_timer_sync(&adapter->watchdog_timer);
6041 del_timer_sync(&adapter->phy_info_timer);
6042
41cec6f1
BA		 6043 cancel_work_sync(&adapter->reset_task);
6044 cancel_work_sync(&adapter->watchdog_task);
6045 cancel_work_sync(&adapter->downshift_task);
6046 cancel_work_sync(&adapter->update_phy_task);
23f333a2 6047 cancel_work_sync(&adapter->led_blink_task);
41cec6f1 6048 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa 6049
17f208de
BA		 6050 if (!(netdev->flags & IFF_UP))
6051 e1000_power_down_phy(adapter);
6052
23606cf5
RW		 6053 /* Don't lie to e1000_close() down the road. */
6054 if (!down)
6055 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 6056 unregister_netdev(netdev);
6057
f3ec4f87
AS		 6058 if (pci_dev_run_wake(pdev))
6059 pm_runtime_get_noresume(&pdev->dev);
23606cf5 6060
ad68076e
BA		 6061 /*
6062 * Release control of h/w to f/w. If f/w is AMT enabled, this
6063 * would have already happened in close and is redundant.
6064 */
31dbe5b4 6065 e1000e_release_hw_control(adapter);
bc7f75fa 6066
4662e82b 6067 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 6068 kfree(adapter->tx_ring);
6069 kfree(adapter->rx_ring);
6070
6071 iounmap(adapter->hw.hw_addr);
6072 if (adapter->hw.flash_address)
6073 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 6074 pci_release_selected_regions(pdev,
6075 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6076
6077 free_netdev(netdev);
6078
111b9dc5 6079 /* AER disable */
19d5afd4 6080 pci_disable_pcie_error_reporting(pdev);
111b9dc5 6081
bc7f75fa
AK		 6082 pci_disable_device(pdev);
6083}
6084
6085/* PCI Error Recovery (ERS) */
6086static struct pci_error_handlers e1000_err_handler = {
6087 .error_detected = e1000_io_error_detected,
6088 .slot_reset = e1000_io_slot_reset,
6089 .resume = e1000_io_resume,
6090};
6091
a3aa1884 6092static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 6093 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6094 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6095 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6096 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6097 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6098 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 6099 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 6102
bc7f75fa
AK		 6103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 6107
bc7f75fa
AK		 6108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 6111
4662e82b 6112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 6113 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 6114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 6115
bc7f75fa
AK		 6116 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6117 board_80003es2lan },
6118 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6119 board_80003es2lan },
6120 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6121 board_80003es2lan },
6122 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6123 board_80003es2lan },
ad68076e 6124
bc7f75fa
AK		 6125 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6126 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6127 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6128 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6129 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6130 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6131 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 6132 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 6133
bc7f75fa
AK		 6134 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6135 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6136 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6137 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6138 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 6139 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 6140 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6141 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6142 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6143
6144 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6145 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6146 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 6147
f4187b56
BA		 6148 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6149 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 6150 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 6151
a4f58f54
BA		 6152 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6153 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6154 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6155 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6156
d3738bb8
BA		 6157 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6158 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6159
bc7f75fa
AK		 6160 { } /* terminate list */
6161};
6162MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6163
a0340162 6164#ifdef CONFIG_PM_OPS
23606cf5 6165static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6166 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6167 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6168 e1000_runtime_resume, e1000_idle)
23606cf5 6169};
e50208a0 6170#endif
23606cf5 6171
bc7f75fa
AK		 6172/* PCI Device API Driver */
6173static struct pci_driver e1000_driver = {
6174 .name = e1000e_driver_name,
6175 .id_table = e1000_pci_tbl,
6176 .probe = e1000_probe,
6177 .remove = __devexit_p(e1000_remove),
a0340162 6178#ifdef CONFIG_PM_OPS
23606cf5 6179 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6180#endif
6181 .shutdown = e1000_shutdown,
6182 .err_handler = &e1000_err_handler
6183};
6184
6185/**
6186 * e1000_init_module - Driver Registration Routine
6187 *
6188 * e1000_init_module is the first routine called when the driver is
6189 * loaded. All it does is register with the PCI subsystem.
6190 **/
6191static int __init e1000_init_module(void)
6192{
6193 int ret;
8544b9f7
BA		 6194 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6195 e1000e_driver_version);
451152d9 6196 pr_info("Copyright (c) 1999 - 2010 Intel Corporation.\n");
bc7f75fa 6197 ret = pci_register_driver(&e1000_driver);
53ec5498 6198
bc7f75fa
AK		 6199 return ret;
6200}
6201module_init(e1000_init_module);
6202
6203/**
6204 * e1000_exit_module - Driver Exit Cleanup Routine
6205 *
6206 * e1000_exit_module is called just before the driver is removed
6207 * from memory.
6208 **/
6209static void __exit e1000_exit_module(void)
6210{
6211 pci_unregister_driver(&e1000_driver);
6212}
6213module_exit(e1000_exit_module);
6214
6215
6216MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6217MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6218MODULE_LICENSE("GPL");
6219MODULE_VERSION(DRV_VERSION);
6220
6221/* e1000_main.c */
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