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1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
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5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
5a0e3ad6 39#include <linux/slab.h>
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40#include <net/checksum.h>
41#include <net/ip6_checksum.h>
42#include <linux/mii.h>
43#include <linux/ethtool.h>
44#include <linux/if_vlan.h>
45#include <linux/cpu.h>
46#include <linux/smp.h>
97ac8cae 47#include <linux/pm_qos_params.h>
111b9dc5 48#include <linux/aer.h>
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49
50#include "e1000.h"
51
3be8c940 52#define DRV_VERSION "1.0.2-k2"
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53char e1000e_driver_name[] = "e1000e";
54const char e1000e_driver_version[] = DRV_VERSION;
55
56static const struct e1000_info *e1000_info_tbl[] = {
57 [board_82571] = &e1000_82571_info,
58 [board_82572] = &e1000_82572_info,
59 [board_82573] = &e1000_82573_info,
4662e82b 60 [board_82574] = &e1000_82574_info,
8c81c9c3 61 [board_82583] = &e1000_82583_info,
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62 [board_80003es2lan] = &e1000_es2_info,
63 [board_ich8lan] = &e1000_ich8_info,
64 [board_ich9lan] = &e1000_ich9_info,
f4187b56 65 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 66 [board_pchlan] = &e1000_pch_info,
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67};
68
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69/**
70 * e1000_desc_unused - calculate if we have unused descriptors
71 **/
72static int e1000_desc_unused(struct e1000_ring *ring)
73{
74 if (ring->next_to_clean > ring->next_to_use)
75 return ring->next_to_clean - ring->next_to_use - 1;
76
77 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
78}
79
80/**
ad68076e 81 * e1000_receive_skb - helper function to handle Rx indications
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82 * @adapter: board private structure
83 * @status: descriptor status field as written by hardware
84 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
85 * @skb: pointer to sk_buff to be indicated to stack
86 **/
87static void e1000_receive_skb(struct e1000_adapter *adapter,
88 struct net_device *netdev,
89 struct sk_buff *skb,
a39fe742 90 u8 status, __le16 vlan)
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91{
92 skb->protocol = eth_type_trans(skb, netdev);
93
94 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
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95 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
96 le16_to_cpu(vlan), skb);
bc7f75fa 97 else
89c88b16 98 napi_gro_receive(&adapter->napi, skb);
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99}
100
101/**
102 * e1000_rx_checksum - Receive Checksum Offload for 82543
103 * @adapter: board private structure
104 * @status_err: receive descriptor status and error fields
105 * @csum: receive descriptor csum field
106 * @sk_buff: socket buffer with received data
107 **/
108static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
109 u32 csum, struct sk_buff *skb)
110{
111 u16 status = (u16)status_err;
112 u8 errors = (u8)(status_err >> 24);
113 skb->ip_summed = CHECKSUM_NONE;
114
115 /* Ignore Checksum bit is set */
116 if (status & E1000_RXD_STAT_IXSM)
117 return;
118 /* TCP/UDP checksum error bit is set */
119 if (errors & E1000_RXD_ERR_TCPE) {
120 /* let the stack verify checksum errors */
121 adapter->hw_csum_err++;
122 return;
123 }
124
125 /* TCP/UDP Checksum has not been calculated */
126 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
127 return;
128
129 /* It must be a TCP or UDP packet with a valid checksum */
130 if (status & E1000_RXD_STAT_TCPCS) {
131 /* TCP checksum is good */
132 skb->ip_summed = CHECKSUM_UNNECESSARY;
133 } else {
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134 /*
135 * IP fragment with UDP payload
136 * Hardware complements the payload checksum, so we undo it
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137 * and then put the value in host order for further stack use.
138 */
a39fe742
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139 __sum16 sum = (__force __sum16)htons(csum);
140 skb->csum = csum_unfold(~sum);
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141 skb->ip_summed = CHECKSUM_COMPLETE;
142 }
143 adapter->hw_csum_good++;
144}
145
146/**
147 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
148 * @adapter: address of board private structure
149 **/
150static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
151 int cleaned_count)
152{
153 struct net_device *netdev = adapter->netdev;
154 struct pci_dev *pdev = adapter->pdev;
155 struct e1000_ring *rx_ring = adapter->rx_ring;
156 struct e1000_rx_desc *rx_desc;
157 struct e1000_buffer *buffer_info;
158 struct sk_buff *skb;
159 unsigned int i;
89d71a66 160 unsigned int bufsz = adapter->rx_buffer_len;
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161
162 i = rx_ring->next_to_use;
163 buffer_info = &rx_ring->buffer_info[i];
164
165 while (cleaned_count--) {
166 skb = buffer_info->skb;
167 if (skb) {
168 skb_trim(skb, 0);
169 goto map_skb;
170 }
171
89d71a66 172 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
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173 if (!skb) {
174 /* Better luck next round */
175 adapter->alloc_rx_buff_failed++;
176 break;
177 }
178
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179 buffer_info->skb = skb;
180map_skb:
181 buffer_info->dma = pci_map_single(pdev, skb->data,
182 adapter->rx_buffer_len,
183 PCI_DMA_FROMDEVICE);
8d8bb39b 184 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
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185 dev_err(&pdev->dev, "RX DMA map failed\n");
186 adapter->rx_dma_failed++;
187 break;
188 }
189
190 rx_desc = E1000_RX_DESC(*rx_ring, i);
191 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
192
193 i++;
194 if (i == rx_ring->count)
195 i = 0;
196 buffer_info = &rx_ring->buffer_info[i];
197 }
198
199 if (rx_ring->next_to_use != i) {
200 rx_ring->next_to_use = i;
201 if (i-- == 0)
202 i = (rx_ring->count - 1);
203
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204 /*
205 * Force memory writes to complete before letting h/w
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206 * know there are new descriptors to fetch. (Only
207 * applicable for weak-ordered memory model archs,
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208 * such as IA-64).
209 */
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210 wmb();
211 writel(i, adapter->hw.hw_addr + rx_ring->tail);
212 }
213}
214
215/**
216 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
217 * @adapter: address of board private structure
218 **/
219static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
220 int cleaned_count)
221{
222 struct net_device *netdev = adapter->netdev;
223 struct pci_dev *pdev = adapter->pdev;
224 union e1000_rx_desc_packet_split *rx_desc;
225 struct e1000_ring *rx_ring = adapter->rx_ring;
226 struct e1000_buffer *buffer_info;
227 struct e1000_ps_page *ps_page;
228 struct sk_buff *skb;
229 unsigned int i, j;
230
231 i = rx_ring->next_to_use;
232 buffer_info = &rx_ring->buffer_info[i];
233
234 while (cleaned_count--) {
235 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
236
237 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
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238 ps_page = &buffer_info->ps_pages[j];
239 if (j >= adapter->rx_ps_pages) {
240 /* all unused desc entries get hw null ptr */
a39fe742 241 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
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242 continue;
243 }
244 if (!ps_page->page) {
245 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 246 if (!ps_page->page) {
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247 adapter->alloc_rx_buff_failed++;
248 goto no_buffers;
249 }
250 ps_page->dma = pci_map_page(pdev,
251 ps_page->page,
252 0, PAGE_SIZE,
253 PCI_DMA_FROMDEVICE);
8d8bb39b 254 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
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255 dev_err(&adapter->pdev->dev,
256 "RX DMA page map failed\n");
257 adapter->rx_dma_failed++;
258 goto no_buffers;
bc7f75fa 259 }
bc7f75fa 260 }
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261 /*
262 * Refresh the desc even if buffer_addrs
263 * didn't change because each write-back
264 * erases this info.
265 */
266 rx_desc->read.buffer_addr[j+1] =
267 cpu_to_le64(ps_page->dma);
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268 }
269
89d71a66
ED
270 skb = netdev_alloc_skb_ip_align(netdev,
271 adapter->rx_ps_bsize0);
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272
273 if (!skb) {
274 adapter->alloc_rx_buff_failed++;
275 break;
276 }
277
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278 buffer_info->skb = skb;
279 buffer_info->dma = pci_map_single(pdev, skb->data,
280 adapter->rx_ps_bsize0,
281 PCI_DMA_FROMDEVICE);
8d8bb39b 282 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
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283 dev_err(&pdev->dev, "RX DMA map failed\n");
284 adapter->rx_dma_failed++;
285 /* cleanup skb */
286 dev_kfree_skb_any(skb);
287 buffer_info->skb = NULL;
288 break;
289 }
290
291 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
292
293 i++;
294 if (i == rx_ring->count)
295 i = 0;
296 buffer_info = &rx_ring->buffer_info[i];
297 }
298
299no_buffers:
300 if (rx_ring->next_to_use != i) {
301 rx_ring->next_to_use = i;
302
303 if (!(i--))
304 i = (rx_ring->count - 1);
305
ad68076e
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306 /*
307 * Force memory writes to complete before letting h/w
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308 * know there are new descriptors to fetch. (Only
309 * applicable for weak-ordered memory model archs,
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310 * such as IA-64).
311 */
bc7f75fa 312 wmb();
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313 /*
314 * Hardware increments by 16 bytes, but packet split
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315 * descriptors are 32 bytes...so we increment tail
316 * twice as much.
317 */
318 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
319 }
320}
321
97ac8cae
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322/**
323 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
324 * @adapter: address of board private structure
97ac8cae
BA
325 * @cleaned_count: number of buffers to allocate this pass
326 **/
327
328static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
329 int cleaned_count)
330{
331 struct net_device *netdev = adapter->netdev;
332 struct pci_dev *pdev = adapter->pdev;
333 struct e1000_rx_desc *rx_desc;
334 struct e1000_ring *rx_ring = adapter->rx_ring;
335 struct e1000_buffer *buffer_info;
336 struct sk_buff *skb;
337 unsigned int i;
89d71a66 338 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
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339
340 i = rx_ring->next_to_use;
341 buffer_info = &rx_ring->buffer_info[i];
342
343 while (cleaned_count--) {
344 skb = buffer_info->skb;
345 if (skb) {
346 skb_trim(skb, 0);
347 goto check_page;
348 }
349
89d71a66 350 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA
351 if (unlikely(!skb)) {
352 /* Better luck next round */
353 adapter->alloc_rx_buff_failed++;
354 break;
355 }
356
97ac8cae
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357 buffer_info->skb = skb;
358check_page:
359 /* allocate a new page if necessary */
360 if (!buffer_info->page) {
361 buffer_info->page = alloc_page(GFP_ATOMIC);
362 if (unlikely(!buffer_info->page)) {
363 adapter->alloc_rx_buff_failed++;
364 break;
365 }
366 }
367
368 if (!buffer_info->dma)
369 buffer_info->dma = pci_map_page(pdev,
370 buffer_info->page, 0,
371 PAGE_SIZE,
372 PCI_DMA_FROMDEVICE);
373
374 rx_desc = E1000_RX_DESC(*rx_ring, i);
375 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
376
377 if (unlikely(++i == rx_ring->count))
378 i = 0;
379 buffer_info = &rx_ring->buffer_info[i];
380 }
381
382 if (likely(rx_ring->next_to_use != i)) {
383 rx_ring->next_to_use = i;
384 if (unlikely(i-- == 0))
385 i = (rx_ring->count - 1);
386
387 /* Force memory writes to complete before letting h/w
388 * know there are new descriptors to fetch. (Only
389 * applicable for weak-ordered memory model archs,
390 * such as IA-64). */
391 wmb();
392 writel(i, adapter->hw.hw_addr + rx_ring->tail);
393 }
394}
395
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396/**
397 * e1000_clean_rx_irq - Send received data up the network stack; legacy
398 * @adapter: board private structure
399 *
400 * the return value indicates whether actual cleaning was done, there
401 * is no guarantee that everything was cleaned
402 **/
403static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
404 int *work_done, int work_to_do)
405{
406 struct net_device *netdev = adapter->netdev;
407 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 408 struct e1000_hw *hw = &adapter->hw;
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409 struct e1000_ring *rx_ring = adapter->rx_ring;
410 struct e1000_rx_desc *rx_desc, *next_rxd;
411 struct e1000_buffer *buffer_info, *next_buffer;
412 u32 length;
413 unsigned int i;
414 int cleaned_count = 0;
415 bool cleaned = 0;
416 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
417
418 i = rx_ring->next_to_clean;
419 rx_desc = E1000_RX_DESC(*rx_ring, i);
420 buffer_info = &rx_ring->buffer_info[i];
421
422 while (rx_desc->status & E1000_RXD_STAT_DD) {
423 struct sk_buff *skb;
424 u8 status;
425
426 if (*work_done >= work_to_do)
427 break;
428 (*work_done)++;
429
430 status = rx_desc->status;
431 skb = buffer_info->skb;
432 buffer_info->skb = NULL;
433
434 prefetch(skb->data - NET_IP_ALIGN);
435
436 i++;
437 if (i == rx_ring->count)
438 i = 0;
439 next_rxd = E1000_RX_DESC(*rx_ring, i);
440 prefetch(next_rxd);
441
442 next_buffer = &rx_ring->buffer_info[i];
443
444 cleaned = 1;
445 cleaned_count++;
446 pci_unmap_single(pdev,
447 buffer_info->dma,
448 adapter->rx_buffer_len,
449 PCI_DMA_FROMDEVICE);
450 buffer_info->dma = 0;
451
452 length = le16_to_cpu(rx_desc->length);
453
b94b5028
JB
454 /*
455 * !EOP means multiple descriptors were used to store a single
456 * packet, if that's the case we need to toss it. In fact, we
457 * need to toss every packet with the EOP bit clear and the
458 * next frame that _does_ have the EOP bit set, as it is by
459 * definition only a frame fragment
460 */
461 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
462 adapter->flags2 |= FLAG2_IS_DISCARDING;
463
464 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 465 /* All receives must fit into a single buffer */
3bb99fe2 466 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
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467 /* recycle */
468 buffer_info->skb = skb;
b94b5028
JB
469 if (status & E1000_RXD_STAT_EOP)
470 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
471 goto next_desc;
472 }
473
474 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
475 /* recycle */
476 buffer_info->skb = skb;
477 goto next_desc;
478 }
479
eb7c3adb
JK
480 /* adjust length to remove Ethernet CRC */
481 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
482 length -= 4;
483
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484 total_rx_bytes += length;
485 total_rx_packets++;
486
ad68076e
BA
487 /*
488 * code added for copybreak, this should improve
bc7f75fa 489 * performance for small packets with large amounts
ad68076e
BA
490 * of reassembly being done in the stack
491 */
bc7f75fa
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492 if (length < copybreak) {
493 struct sk_buff *new_skb =
89d71a66 494 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 495 if (new_skb) {
808ff676
BA
496 skb_copy_to_linear_data_offset(new_skb,
497 -NET_IP_ALIGN,
498 (skb->data -
499 NET_IP_ALIGN),
500 (length +
501 NET_IP_ALIGN));
bc7f75fa
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502 /* save the skb in buffer_info as good */
503 buffer_info->skb = skb;
504 skb = new_skb;
505 }
506 /* else just continue with the old one */
507 }
508 /* end copybreak code */
509 skb_put(skb, length);
510
511 /* Receive Checksum Offload */
512 e1000_rx_checksum(adapter,
513 (u32)(status) |
514 ((u32)(rx_desc->errors) << 24),
515 le16_to_cpu(rx_desc->csum), skb);
516
517 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
518
519next_desc:
520 rx_desc->status = 0;
521
522 /* return some buffers to hardware, one at a time is too slow */
523 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
524 adapter->alloc_rx_buf(adapter, cleaned_count);
525 cleaned_count = 0;
526 }
527
528 /* use prefetched values */
529 rx_desc = next_rxd;
530 buffer_info = next_buffer;
531 }
532 rx_ring->next_to_clean = i;
533
534 cleaned_count = e1000_desc_unused(rx_ring);
535 if (cleaned_count)
536 adapter->alloc_rx_buf(adapter, cleaned_count);
537
bc7f75fa 538 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 539 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
540 netdev->stats.rx_bytes += total_rx_bytes;
541 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK
542 return cleaned;
543}
544
bc7f75fa
AK
545static void e1000_put_txbuf(struct e1000_adapter *adapter,
546 struct e1000_buffer *buffer_info)
547{
03b1320d
AD
548 if (buffer_info->dma) {
549 if (buffer_info->mapped_as_page)
550 pci_unmap_page(adapter->pdev, buffer_info->dma,
551 buffer_info->length, PCI_DMA_TODEVICE);
552 else
553 pci_unmap_single(adapter->pdev, buffer_info->dma,
554 buffer_info->length,
555 PCI_DMA_TODEVICE);
556 buffer_info->dma = 0;
557 }
bc7f75fa
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558 if (buffer_info->skb) {
559 dev_kfree_skb_any(buffer_info->skb);
560 buffer_info->skb = NULL;
561 }
1b7719c4 562 buffer_info->time_stamp = 0;
bc7f75fa
AK
563}
564
41cec6f1 565static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 566{
41cec6f1
BA
567 struct e1000_adapter *adapter = container_of(work,
568 struct e1000_adapter,
569 print_hang_task);
bc7f75fa
AK
570 struct e1000_ring *tx_ring = adapter->tx_ring;
571 unsigned int i = tx_ring->next_to_clean;
572 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
573 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA
574 struct e1000_hw *hw = &adapter->hw;
575 u16 phy_status, phy_1000t_status, phy_ext_status;
576 u16 pci_status;
577
578 e1e_rphy(hw, PHY_STATUS, &phy_status);
579 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
580 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 581
41cec6f1
BA
582 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
583
584 /* detected Hardware unit hang */
585 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK
586 " TDH <%x>\n"
587 " TDT <%x>\n"
588 " next_to_use <%x>\n"
589 " next_to_clean <%x>\n"
590 "buffer_info[next_to_clean]:\n"
591 " time_stamp <%lx>\n"
592 " next_to_watch <%x>\n"
593 " jiffies <%lx>\n"
41cec6f1
BA
594 " next_to_watch.status <%x>\n"
595 "MAC Status <%x>\n"
596 "PHY Status <%x>\n"
597 "PHY 1000BASE-T Status <%x>\n"
598 "PHY Extended Status <%x>\n"
599 "PCI Status <%x>\n",
44defeb3
JK
600 readl(adapter->hw.hw_addr + tx_ring->head),
601 readl(adapter->hw.hw_addr + tx_ring->tail),
602 tx_ring->next_to_use,
603 tx_ring->next_to_clean,
604 tx_ring->buffer_info[eop].time_stamp,
605 eop,
606 jiffies,
41cec6f1
BA
607 eop_desc->upper.fields.status,
608 er32(STATUS),
609 phy_status,
610 phy_1000t_status,
611 phy_ext_status,
612 pci_status);
bc7f75fa
AK
613}
614
615/**
616 * e1000_clean_tx_irq - Reclaim resources after transmit completes
617 * @adapter: board private structure
618 *
619 * the return value indicates whether actual cleaning was done, there
620 * is no guarantee that everything was cleaned
621 **/
622static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
623{
624 struct net_device *netdev = adapter->netdev;
625 struct e1000_hw *hw = &adapter->hw;
626 struct e1000_ring *tx_ring = adapter->tx_ring;
627 struct e1000_tx_desc *tx_desc, *eop_desc;
628 struct e1000_buffer *buffer_info;
629 unsigned int i, eop;
630 unsigned int count = 0;
bc7f75fa
AK
631 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
632
633 i = tx_ring->next_to_clean;
634 eop = tx_ring->buffer_info[i].next_to_watch;
635 eop_desc = E1000_TX_DESC(*tx_ring, eop);
636
12d04a3c
AD
637 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
638 (count < tx_ring->count)) {
a86043c2
JB
639 bool cleaned = false;
640 for (; !cleaned; count++) {
bc7f75fa
AK
641 tx_desc = E1000_TX_DESC(*tx_ring, i);
642 buffer_info = &tx_ring->buffer_info[i];
643 cleaned = (i == eop);
644
645 if (cleaned) {
646 struct sk_buff *skb = buffer_info->skb;
647 unsigned int segs, bytecount;
648 segs = skb_shinfo(skb)->gso_segs ?: 1;
649 /* multiply data chunks by size of headers */
650 bytecount = ((segs - 1) * skb_headlen(skb)) +
651 skb->len;
652 total_tx_packets += segs;
653 total_tx_bytes += bytecount;
654 }
655
656 e1000_put_txbuf(adapter, buffer_info);
657 tx_desc->upper.data = 0;
658
659 i++;
660 if (i == tx_ring->count)
661 i = 0;
662 }
663
664 eop = tx_ring->buffer_info[i].next_to_watch;
665 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK
666 }
667
668 tx_ring->next_to_clean = i;
669
670#define TX_WAKE_THRESHOLD 32
a86043c2
JB
671 if (count && netif_carrier_ok(netdev) &&
672 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK
673 /* Make sure that anybody stopping the queue after this
674 * sees the new next_to_clean.
675 */
676 smp_mb();
677
678 if (netif_queue_stopped(netdev) &&
679 !(test_bit(__E1000_DOWN, &adapter->state))) {
680 netif_wake_queue(netdev);
681 ++adapter->restart_queue;
682 }
683 }
684
685 if (adapter->detect_tx_hung) {
41cec6f1
BA
686 /*
687 * Detect a transmit hang in hardware, this serializes the
688 * check with the clearing of time_stamp and movement of i
689 */
bc7f75fa 690 adapter->detect_tx_hung = 0;
12d04a3c
AD
691 if (tx_ring->buffer_info[i].time_stamp &&
692 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP
693 + (adapter->tx_timeout_factor * HZ)) &&
694 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 695 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK
696 netif_stop_queue(netdev);
697 }
698 }
699 adapter->total_tx_bytes += total_tx_bytes;
700 adapter->total_tx_packets += total_tx_packets;
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AK
701 netdev->stats.tx_bytes += total_tx_bytes;
702 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 703 return (count < tx_ring->count);
bc7f75fa
AK
704}
705
bc7f75fa
AK
706/**
707 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
708 * @adapter: board private structure
709 *
710 * the return value indicates whether actual cleaning was done, there
711 * is no guarantee that everything was cleaned
712 **/
713static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
714 int *work_done, int work_to_do)
715{
3bb99fe2 716 struct e1000_hw *hw = &adapter->hw;
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717 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
718 struct net_device *netdev = adapter->netdev;
719 struct pci_dev *pdev = adapter->pdev;
720 struct e1000_ring *rx_ring = adapter->rx_ring;
721 struct e1000_buffer *buffer_info, *next_buffer;
722 struct e1000_ps_page *ps_page;
723 struct sk_buff *skb;
724 unsigned int i, j;
725 u32 length, staterr;
726 int cleaned_count = 0;
727 bool cleaned = 0;
728 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
729
730 i = rx_ring->next_to_clean;
731 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
732 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
733 buffer_info = &rx_ring->buffer_info[i];
734
735 while (staterr & E1000_RXD_STAT_DD) {
736 if (*work_done >= work_to_do)
737 break;
738 (*work_done)++;
739 skb = buffer_info->skb;
740
741 /* in the packet split case this is header only */
742 prefetch(skb->data - NET_IP_ALIGN);
743
744 i++;
745 if (i == rx_ring->count)
746 i = 0;
747 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
748 prefetch(next_rxd);
749
750 next_buffer = &rx_ring->buffer_info[i];
751
752 cleaned = 1;
753 cleaned_count++;
754 pci_unmap_single(pdev, buffer_info->dma,
755 adapter->rx_ps_bsize0,
756 PCI_DMA_FROMDEVICE);
757 buffer_info->dma = 0;
758
b94b5028
JB
759 /* see !EOP comment in other rx routine */
760 if (!(staterr & E1000_RXD_STAT_EOP))
761 adapter->flags2 |= FLAG2_IS_DISCARDING;
762
763 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA
764 e_dbg("Packet Split buffers didn't pick up the full "
765 "packet\n");
bc7f75fa 766 dev_kfree_skb_irq(skb);
b94b5028
JB
767 if (staterr & E1000_RXD_STAT_EOP)
768 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
769 goto next_desc;
770 }
771
772 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
773 dev_kfree_skb_irq(skb);
774 goto next_desc;
775 }
776
777 length = le16_to_cpu(rx_desc->wb.middle.length0);
778
779 if (!length) {
3bb99fe2
BA
780 e_dbg("Last part of the packet spanning multiple "
781 "descriptors\n");
bc7f75fa
AK
782 dev_kfree_skb_irq(skb);
783 goto next_desc;
784 }
785
786 /* Good Receive */
787 skb_put(skb, length);
788
789 {
ad68076e
BA
790 /*
791 * this looks ugly, but it seems compiler issues make it
792 * more efficient than reusing j
793 */
bc7f75fa
AK
794 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
795
ad68076e
BA
796 /*
797 * page alloc/put takes too long and effects small packet
798 * throughput, so unsplit small packets and save the alloc/put
799 * only valid in softirq (napi) context to call kmap_*
800 */
bc7f75fa
AK
801 if (l1 && (l1 <= copybreak) &&
802 ((length + l1) <= adapter->rx_ps_bsize0)) {
803 u8 *vaddr;
804
47f44e40 805 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 806
ad68076e
BA
807 /*
808 * there is no documentation about how to call
bc7f75fa 809 * kmap_atomic, so we can't hold the mapping
ad68076e
BA
810 * very long
811 */
bc7f75fa
AK
812 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
813 PAGE_SIZE, PCI_DMA_FROMDEVICE);
814 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
815 memcpy(skb_tail_pointer(skb), vaddr, l1);
816 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
817 pci_dma_sync_single_for_device(pdev, ps_page->dma,
818 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 819
eb7c3adb
JK
820 /* remove the CRC */
821 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
822 l1 -= 4;
823
bc7f75fa
AK
824 skb_put(skb, l1);
825 goto copydone;
826 } /* if */
827 }
828
829 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
830 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
831 if (!length)
832 break;
833
47f44e40 834 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK
835 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
836 PCI_DMA_FROMDEVICE);
837 ps_page->dma = 0;
838 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
839 ps_page->page = NULL;
840 skb->len += length;
841 skb->data_len += length;
842 skb->truesize += length;
843 }
844
eb7c3adb
JK
845 /* strip the ethernet crc, problem is we're using pages now so
846 * this whole operation can get a little cpu intensive
847 */
848 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
849 pskb_trim(skb, skb->len - 4);
850
bc7f75fa
AK
851copydone:
852 total_rx_bytes += skb->len;
853 total_rx_packets++;
854
855 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
856 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
857
858 if (rx_desc->wb.upper.header_status &
859 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
860 adapter->rx_hdr_split++;
861
862 e1000_receive_skb(adapter, netdev, skb,
863 staterr, rx_desc->wb.middle.vlan);
864
865next_desc:
866 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
867 buffer_info->skb = NULL;
868
869 /* return some buffers to hardware, one at a time is too slow */
870 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
871 adapter->alloc_rx_buf(adapter, cleaned_count);
872 cleaned_count = 0;
873 }
874
875 /* use prefetched values */
876 rx_desc = next_rxd;
877 buffer_info = next_buffer;
878
879 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
880 }
881 rx_ring->next_to_clean = i;
882
883 cleaned_count = e1000_desc_unused(rx_ring);
884 if (cleaned_count)
885 adapter->alloc_rx_buf(adapter, cleaned_count);
886
bc7f75fa 887 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 888 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
889 netdev->stats.rx_bytes += total_rx_bytes;
890 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK
891 return cleaned;
892}
893
97ac8cae
BA
894/**
895 * e1000_consume_page - helper function
896 **/
897static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
898 u16 length)
899{
900 bi->page = NULL;
901 skb->len += length;
902 skb->data_len += length;
903 skb->truesize += length;
904}
905
906/**
907 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
908 * @adapter: board private structure
909 *
910 * the return value indicates whether actual cleaning was done, there
911 * is no guarantee that everything was cleaned
912 **/
913
914static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
915 int *work_done, int work_to_do)
916{
917 struct net_device *netdev = adapter->netdev;
918 struct pci_dev *pdev = adapter->pdev;
919 struct e1000_ring *rx_ring = adapter->rx_ring;
920 struct e1000_rx_desc *rx_desc, *next_rxd;
921 struct e1000_buffer *buffer_info, *next_buffer;
922 u32 length;
923 unsigned int i;
924 int cleaned_count = 0;
925 bool cleaned = false;
926 unsigned int total_rx_bytes=0, total_rx_packets=0;
927
928 i = rx_ring->next_to_clean;
929 rx_desc = E1000_RX_DESC(*rx_ring, i);
930 buffer_info = &rx_ring->buffer_info[i];
931
932 while (rx_desc->status & E1000_RXD_STAT_DD) {
933 struct sk_buff *skb;
934 u8 status;
935
936 if (*work_done >= work_to_do)
937 break;
938 (*work_done)++;
939
940 status = rx_desc->status;
941 skb = buffer_info->skb;
942 buffer_info->skb = NULL;
943
944 ++i;
945 if (i == rx_ring->count)
946 i = 0;
947 next_rxd = E1000_RX_DESC(*rx_ring, i);
948 prefetch(next_rxd);
949
950 next_buffer = &rx_ring->buffer_info[i];
951
952 cleaned = true;
953 cleaned_count++;
954 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
955 PCI_DMA_FROMDEVICE);
956 buffer_info->dma = 0;
957
958 length = le16_to_cpu(rx_desc->length);
959
960 /* errors is only valid for DD + EOP descriptors */
961 if (unlikely((status & E1000_RXD_STAT_EOP) &&
962 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
963 /* recycle both page and skb */
964 buffer_info->skb = skb;
965 /* an error means any chain goes out the window
966 * too */
967 if (rx_ring->rx_skb_top)
968 dev_kfree_skb(rx_ring->rx_skb_top);
969 rx_ring->rx_skb_top = NULL;
970 goto next_desc;
971 }
972
973#define rxtop rx_ring->rx_skb_top
974 if (!(status & E1000_RXD_STAT_EOP)) {
975 /* this descriptor is only the beginning (or middle) */
976 if (!rxtop) {
977 /* this is the beginning of a chain */
978 rxtop = skb;
979 skb_fill_page_desc(rxtop, 0, buffer_info->page,
980 0, length);
981 } else {
982 /* this is the middle of a chain */
983 skb_fill_page_desc(rxtop,
984 skb_shinfo(rxtop)->nr_frags,
985 buffer_info->page, 0, length);
986 /* re-use the skb, only consumed the page */
987 buffer_info->skb = skb;
988 }
989 e1000_consume_page(buffer_info, rxtop, length);
990 goto next_desc;
991 } else {
992 if (rxtop) {
993 /* end of the chain */
994 skb_fill_page_desc(rxtop,
995 skb_shinfo(rxtop)->nr_frags,
996 buffer_info->page, 0, length);
997 /* re-use the current skb, we only consumed the
998 * page */
999 buffer_info->skb = skb;
1000 skb = rxtop;
1001 rxtop = NULL;
1002 e1000_consume_page(buffer_info, skb, length);
1003 } else {
1004 /* no chain, got EOP, this buf is the packet
1005 * copybreak to save the put_page/alloc_page */
1006 if (length <= copybreak &&
1007 skb_tailroom(skb) >= length) {
1008 u8 *vaddr;
1009 vaddr = kmap_atomic(buffer_info->page,
1010 KM_SKB_DATA_SOFTIRQ);
1011 memcpy(skb_tail_pointer(skb), vaddr,
1012 length);
1013 kunmap_atomic(vaddr,
1014 KM_SKB_DATA_SOFTIRQ);
1015 /* re-use the page, so don't erase
1016 * buffer_info->page */
1017 skb_put(skb, length);
1018 } else {
1019 skb_fill_page_desc(skb, 0,
1020 buffer_info->page, 0,
1021 length);
1022 e1000_consume_page(buffer_info, skb,
1023 length);
1024 }
1025 }
1026 }
1027
1028 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1029 e1000_rx_checksum(adapter,
1030 (u32)(status) |
1031 ((u32)(rx_desc->errors) << 24),
1032 le16_to_cpu(rx_desc->csum), skb);
1033
1034 /* probably a little skewed due to removing CRC */
1035 total_rx_bytes += skb->len;
1036 total_rx_packets++;
1037
1038 /* eth type trans needs skb->data to point to something */
1039 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1040 e_err("pskb_may_pull failed.\n");
97ac8cae
BA
1041 dev_kfree_skb(skb);
1042 goto next_desc;
1043 }
1044
1045 e1000_receive_skb(adapter, netdev, skb, status,
1046 rx_desc->special);
1047
1048next_desc:
1049 rx_desc->status = 0;
1050
1051 /* return some buffers to hardware, one at a time is too slow */
1052 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1053 adapter->alloc_rx_buf(adapter, cleaned_count);
1054 cleaned_count = 0;
1055 }
1056
1057 /* use prefetched values */
1058 rx_desc = next_rxd;
1059 buffer_info = next_buffer;
1060 }
1061 rx_ring->next_to_clean = i;
1062
1063 cleaned_count = e1000_desc_unused(rx_ring);
1064 if (cleaned_count)
1065 adapter->alloc_rx_buf(adapter, cleaned_count);
1066
1067 adapter->total_rx_bytes += total_rx_bytes;
1068 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
1069 netdev->stats.rx_bytes += total_rx_bytes;
1070 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA
1071 return cleaned;
1072}
1073
bc7f75fa
AK
1074/**
1075 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1076 * @adapter: board private structure
1077 **/
1078static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1079{
1080 struct e1000_ring *rx_ring = adapter->rx_ring;
1081 struct e1000_buffer *buffer_info;
1082 struct e1000_ps_page *ps_page;
1083 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
1084 unsigned int i, j;
1085
1086 /* Free all the Rx ring sk_buffs */
1087 for (i = 0; i < rx_ring->count; i++) {
1088 buffer_info = &rx_ring->buffer_info[i];
1089 if (buffer_info->dma) {
1090 if (adapter->clean_rx == e1000_clean_rx_irq)
1091 pci_unmap_single(pdev, buffer_info->dma,
1092 adapter->rx_buffer_len,
1093 PCI_DMA_FROMDEVICE);
97ac8cae
BA
1094 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1095 pci_unmap_page(pdev, buffer_info->dma,
1096 PAGE_SIZE,
1097 PCI_DMA_FROMDEVICE);
bc7f75fa
AK
1098 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1099 pci_unmap_single(pdev, buffer_info->dma,
1100 adapter->rx_ps_bsize0,
1101 PCI_DMA_FROMDEVICE);
1102 buffer_info->dma = 0;
1103 }
1104
97ac8cae
BA
1105 if (buffer_info->page) {
1106 put_page(buffer_info->page);
1107 buffer_info->page = NULL;
1108 }
1109
bc7f75fa
AK
1110 if (buffer_info->skb) {
1111 dev_kfree_skb(buffer_info->skb);
1112 buffer_info->skb = NULL;
1113 }
1114
1115 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1116 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK
1117 if (!ps_page->page)
1118 break;
1119 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1120 PCI_DMA_FROMDEVICE);
1121 ps_page->dma = 0;
1122 put_page(ps_page->page);
1123 ps_page->page = NULL;
1124 }
1125 }
1126
1127 /* there also may be some cached data from a chained receive */
1128 if (rx_ring->rx_skb_top) {
1129 dev_kfree_skb(rx_ring->rx_skb_top);
1130 rx_ring->rx_skb_top = NULL;
1131 }
1132
bc7f75fa
AK
1133 /* Zero out the descriptor ring */
1134 memset(rx_ring->desc, 0, rx_ring->size);
1135
1136 rx_ring->next_to_clean = 0;
1137 rx_ring->next_to_use = 0;
b94b5028 1138 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
1139
1140 writel(0, adapter->hw.hw_addr + rx_ring->head);
1141 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1142}
1143
a8f88ff5
JB
1144static void e1000e_downshift_workaround(struct work_struct *work)
1145{
1146 struct e1000_adapter *adapter = container_of(work,
1147 struct e1000_adapter, downshift_task);
1148
1149 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1150}
1151
bc7f75fa
AK
1152/**
1153 * e1000_intr_msi - Interrupt Handler
1154 * @irq: interrupt number
1155 * @data: pointer to a network interface device structure
1156 **/
1157static irqreturn_t e1000_intr_msi(int irq, void *data)
1158{
1159 struct net_device *netdev = data;
1160 struct e1000_adapter *adapter = netdev_priv(netdev);
1161 struct e1000_hw *hw = &adapter->hw;
1162 u32 icr = er32(ICR);
1163
ad68076e
BA
1164 /*
1165 * read ICR disables interrupts using IAM
1166 */
bc7f75fa 1167
573cca8c 1168 if (icr & E1000_ICR_LSC) {
bc7f75fa 1169 hw->mac.get_link_status = 1;
ad68076e
BA
1170 /*
1171 * ICH8 workaround-- Call gig speed drop workaround on cable
1172 * disconnect (LSC) before accessing any PHY registers
1173 */
bc7f75fa
AK
1174 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1175 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1176 schedule_work(&adapter->downshift_task);
bc7f75fa 1177
ad68076e
BA
1178 /*
1179 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1180 * link down event; disable receives here in the ISR and reset
ad68076e
BA
1181 * adapter in watchdog
1182 */
bc7f75fa
AK
1183 if (netif_carrier_ok(netdev) &&
1184 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1185 /* disable receives */
1186 u32 rctl = er32(RCTL);
1187 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1188 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK
1189 }
1190 /* guard against interrupt when we're going down */
1191 if (!test_bit(__E1000_DOWN, &adapter->state))
1192 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1193 }
1194
288379f0 1195 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK
1196 adapter->total_tx_bytes = 0;
1197 adapter->total_tx_packets = 0;
1198 adapter->total_rx_bytes = 0;
1199 adapter->total_rx_packets = 0;
288379f0 1200 __napi_schedule(&adapter->napi);
bc7f75fa
AK
1201 }
1202
1203 return IRQ_HANDLED;
1204}
1205
1206/**
1207 * e1000_intr - Interrupt Handler
1208 * @irq: interrupt number
1209 * @data: pointer to a network interface device structure
1210 **/
1211static irqreturn_t e1000_intr(int irq, void *data)
1212{
1213 struct net_device *netdev = data;
1214 struct e1000_adapter *adapter = netdev_priv(netdev);
1215 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1216 u32 rctl, icr = er32(ICR);
4662e82b 1217
a68ea775 1218 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK
1219 return IRQ_NONE; /* Not our interrupt */
1220
ad68076e
BA
1221 /*
1222 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1223 * not set, then the adapter didn't send an interrupt
1224 */
bc7f75fa
AK
1225 if (!(icr & E1000_ICR_INT_ASSERTED))
1226 return IRQ_NONE;
1227
ad68076e
BA
1228 /*
1229 * Interrupt Auto-Mask...upon reading ICR,
1230 * interrupts are masked. No need for the
1231 * IMC write
1232 */
bc7f75fa 1233
573cca8c 1234 if (icr & E1000_ICR_LSC) {
bc7f75fa 1235 hw->mac.get_link_status = 1;
ad68076e
BA
1236 /*
1237 * ICH8 workaround-- Call gig speed drop workaround on cable
1238 * disconnect (LSC) before accessing any PHY registers
1239 */
bc7f75fa
AK
1240 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1241 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1242 schedule_work(&adapter->downshift_task);
bc7f75fa 1243
ad68076e
BA
1244 /*
1245 * 80003ES2LAN workaround--
bc7f75fa
AK
1246 * For packet buffer work-around on link down event;
1247 * disable receives here in the ISR and
1248 * reset adapter in watchdog
1249 */
1250 if (netif_carrier_ok(netdev) &&
1251 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1252 /* disable receives */
1253 rctl = er32(RCTL);
1254 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1255 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK
1256 }
1257 /* guard against interrupt when we're going down */
1258 if (!test_bit(__E1000_DOWN, &adapter->state))
1259 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1260 }
1261
288379f0 1262 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK
1263 adapter->total_tx_bytes = 0;
1264 adapter->total_tx_packets = 0;
1265 adapter->total_rx_bytes = 0;
1266 adapter->total_rx_packets = 0;
288379f0 1267 __napi_schedule(&adapter->napi);
bc7f75fa
AK
1268 }
1269
1270 return IRQ_HANDLED;
1271}
1272
4662e82b
BA
1273static irqreturn_t e1000_msix_other(int irq, void *data)
1274{
1275 struct net_device *netdev = data;
1276 struct e1000_adapter *adapter = netdev_priv(netdev);
1277 struct e1000_hw *hw = &adapter->hw;
1278 u32 icr = er32(ICR);
1279
1280 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB
1281 if (!test_bit(__E1000_DOWN, &adapter->state))
1282 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA
1283 return IRQ_NONE;
1284 }
1285
1286 if (icr & adapter->eiac_mask)
1287 ew32(ICS, (icr & adapter->eiac_mask));
1288
1289 if (icr & E1000_ICR_OTHER) {
1290 if (!(icr & E1000_ICR_LSC))
1291 goto no_link_interrupt;
1292 hw->mac.get_link_status = 1;
1293 /* guard against interrupt when we're going down */
1294 if (!test_bit(__E1000_DOWN, &adapter->state))
1295 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1296 }
1297
1298no_link_interrupt:
a3c69fef
JB
1299 if (!test_bit(__E1000_DOWN, &adapter->state))
1300 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA
1301
1302 return IRQ_HANDLED;
1303}
1304
1305
1306static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1307{
1308 struct net_device *netdev = data;
1309 struct e1000_adapter *adapter = netdev_priv(netdev);
1310 struct e1000_hw *hw = &adapter->hw;
1311 struct e1000_ring *tx_ring = adapter->tx_ring;
1312
1313
1314 adapter->total_tx_bytes = 0;
1315 adapter->total_tx_packets = 0;
1316
1317 if (!e1000_clean_tx_irq(adapter))
1318 /* Ring was not completely cleaned, so fire another interrupt */
1319 ew32(ICS, tx_ring->ims_val);
1320
1321 return IRQ_HANDLED;
1322}
1323
1324static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1325{
1326 struct net_device *netdev = data;
1327 struct e1000_adapter *adapter = netdev_priv(netdev);
1328
1329 /* Write the ITR value calculated at the end of the
1330 * previous interrupt.
1331 */
1332 if (adapter->rx_ring->set_itr) {
1333 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1334 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1335 adapter->rx_ring->set_itr = 0;
1336 }
1337
288379f0 1338 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA
1339 adapter->total_rx_bytes = 0;
1340 adapter->total_rx_packets = 0;
288379f0 1341 __napi_schedule(&adapter->napi);
4662e82b
BA
1342 }
1343 return IRQ_HANDLED;
1344}
1345
1346/**
1347 * e1000_configure_msix - Configure MSI-X hardware
1348 *
1349 * e1000_configure_msix sets up the hardware to properly
1350 * generate MSI-X interrupts.
1351 **/
1352static void e1000_configure_msix(struct e1000_adapter *adapter)
1353{
1354 struct e1000_hw *hw = &adapter->hw;
1355 struct e1000_ring *rx_ring = adapter->rx_ring;
1356 struct e1000_ring *tx_ring = adapter->tx_ring;
1357 int vector = 0;
1358 u32 ctrl_ext, ivar = 0;
1359
1360 adapter->eiac_mask = 0;
1361
1362 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1363 if (hw->mac.type == e1000_82574) {
1364 u32 rfctl = er32(RFCTL);
1365 rfctl |= E1000_RFCTL_ACK_DIS;
1366 ew32(RFCTL, rfctl);
1367 }
1368
1369#define E1000_IVAR_INT_ALLOC_VALID 0x8
1370 /* Configure Rx vector */
1371 rx_ring->ims_val = E1000_IMS_RXQ0;
1372 adapter->eiac_mask |= rx_ring->ims_val;
1373 if (rx_ring->itr_val)
1374 writel(1000000000 / (rx_ring->itr_val * 256),
1375 hw->hw_addr + rx_ring->itr_register);
1376 else
1377 writel(1, hw->hw_addr + rx_ring->itr_register);
1378 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1379
1380 /* Configure Tx vector */
1381 tx_ring->ims_val = E1000_IMS_TXQ0;
1382 vector++;
1383 if (tx_ring->itr_val)
1384 writel(1000000000 / (tx_ring->itr_val * 256),
1385 hw->hw_addr + tx_ring->itr_register);
1386 else
1387 writel(1, hw->hw_addr + tx_ring->itr_register);
1388 adapter->eiac_mask |= tx_ring->ims_val;
1389 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1390
1391 /* set vector for Other Causes, e.g. link changes */
1392 vector++;
1393 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1394 if (rx_ring->itr_val)
1395 writel(1000000000 / (rx_ring->itr_val * 256),
1396 hw->hw_addr + E1000_EITR_82574(vector));
1397 else
1398 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1399
1400 /* Cause Tx interrupts on every write back */
1401 ivar |= (1 << 31);
1402
1403 ew32(IVAR, ivar);
1404
1405 /* enable MSI-X PBA support */
1406 ctrl_ext = er32(CTRL_EXT);
1407 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1408
1409 /* Auto-Mask Other interrupts upon ICR read */
1410#define E1000_EIAC_MASK_82574 0x01F00000
1411 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1412 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1413 ew32(CTRL_EXT, ctrl_ext);
1414 e1e_flush();
1415}
1416
1417void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1418{
1419 if (adapter->msix_entries) {
1420 pci_disable_msix(adapter->pdev);
1421 kfree(adapter->msix_entries);
1422 adapter->msix_entries = NULL;
1423 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1424 pci_disable_msi(adapter->pdev);
1425 adapter->flags &= ~FLAG_MSI_ENABLED;
1426 }
1427
1428 return;
1429}
1430
1431/**
1432 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1433 *
1434 * Attempt to configure interrupts using the best available
1435 * capabilities of the hardware and kernel.
1436 **/
1437void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1438{
1439 int err;
1440 int numvecs, i;
1441
1442
1443 switch (adapter->int_mode) {
1444 case E1000E_INT_MODE_MSIX:
1445 if (adapter->flags & FLAG_HAS_MSIX) {
1446 numvecs = 3; /* RxQ0, TxQ0 and other */
1447 adapter->msix_entries = kcalloc(numvecs,
1448 sizeof(struct msix_entry),
1449 GFP_KERNEL);
1450 if (adapter->msix_entries) {
1451 for (i = 0; i < numvecs; i++)
1452 adapter->msix_entries[i].entry = i;
1453
1454 err = pci_enable_msix(adapter->pdev,
1455 adapter->msix_entries,
1456 numvecs);
1457 if (err == 0)
1458 return;
1459 }
1460 /* MSI-X failed, so fall through and try MSI */
1461 e_err("Failed to initialize MSI-X interrupts. "
1462 "Falling back to MSI interrupts.\n");
1463 e1000e_reset_interrupt_capability(adapter);
1464 }
1465 adapter->int_mode = E1000E_INT_MODE_MSI;
1466 /* Fall through */
1467 case E1000E_INT_MODE_MSI:
1468 if (!pci_enable_msi(adapter->pdev)) {
1469 adapter->flags |= FLAG_MSI_ENABLED;
1470 } else {
1471 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1472 e_err("Failed to initialize MSI interrupts. Falling "
1473 "back to legacy interrupts.\n");
1474 }
1475 /* Fall through */
1476 case E1000E_INT_MODE_LEGACY:
1477 /* Don't do anything; this is the system default */
1478 break;
1479 }
1480
1481 return;
1482}
1483
1484/**
1485 * e1000_request_msix - Initialize MSI-X interrupts
1486 *
1487 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1488 * kernel.
1489 **/
1490static int e1000_request_msix(struct e1000_adapter *adapter)
1491{
1492 struct net_device *netdev = adapter->netdev;
1493 int err = 0, vector = 0;
1494
1495 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1496 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA
1497 else
1498 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1499 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1500 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA
1501 netdev);
1502 if (err)
1503 goto out;
1504 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1505 adapter->rx_ring->itr_val = adapter->itr;
1506 vector++;
1507
1508 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1509 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA
1510 else
1511 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1512 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1513 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA
1514 netdev);
1515 if (err)
1516 goto out;
1517 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1518 adapter->tx_ring->itr_val = adapter->itr;
1519 vector++;
1520
1521 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1522 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA
1523 if (err)
1524 goto out;
1525
1526 e1000_configure_msix(adapter);
1527 return 0;
1528out:
1529 return err;
1530}
1531
f8d59f78
BA
1532/**
1533 * e1000_request_irq - initialize interrupts
1534 *
1535 * Attempts to configure interrupts using the best available
1536 * capabilities of the hardware and kernel.
1537 **/
bc7f75fa
AK
1538static int e1000_request_irq(struct e1000_adapter *adapter)
1539{
1540 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK
1541 int err;
1542
4662e82b
BA
1543 if (adapter->msix_entries) {
1544 err = e1000_request_msix(adapter);
1545 if (!err)
1546 return err;
1547 /* fall back to MSI */
1548 e1000e_reset_interrupt_capability(adapter);
1549 adapter->int_mode = E1000E_INT_MODE_MSI;
1550 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1551 }
4662e82b 1552 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1553 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA
1554 netdev->name, netdev);
1555 if (!err)
1556 return err;
bc7f75fa 1557
4662e82b
BA
1558 /* fall back to legacy interrupt */
1559 e1000e_reset_interrupt_capability(adapter);
1560 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK
1561 }
1562
a0607fd3 1563 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA
1564 netdev->name, netdev);
1565 if (err)
1566 e_err("Unable to allocate interrupt, Error: %d\n", err);
1567
bc7f75fa
AK
1568 return err;
1569}
1570
1571static void e1000_free_irq(struct e1000_adapter *adapter)
1572{
1573 struct net_device *netdev = adapter->netdev;
1574
4662e82b
BA
1575 if (adapter->msix_entries) {
1576 int vector = 0;
1577
1578 free_irq(adapter->msix_entries[vector].vector, netdev);
1579 vector++;
1580
1581 free_irq(adapter->msix_entries[vector].vector, netdev);
1582 vector++;
1583
1584 /* Other Causes interrupt vector */
1585 free_irq(adapter->msix_entries[vector].vector, netdev);
1586 return;
bc7f75fa 1587 }
4662e82b
BA
1588
1589 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK
1590}
1591
1592/**
1593 * e1000_irq_disable - Mask off interrupt generation on the NIC
1594 **/
1595static void e1000_irq_disable(struct e1000_adapter *adapter)
1596{
1597 struct e1000_hw *hw = &adapter->hw;
1598
bc7f75fa 1599 ew32(IMC, ~0);
4662e82b
BA
1600 if (adapter->msix_entries)
1601 ew32(EIAC_82574, 0);
bc7f75fa
AK
1602 e1e_flush();
1603 synchronize_irq(adapter->pdev->irq);
1604}
1605
1606/**
1607 * e1000_irq_enable - Enable default interrupt generation settings
1608 **/
1609static void e1000_irq_enable(struct e1000_adapter *adapter)
1610{
1611 struct e1000_hw *hw = &adapter->hw;
1612
4662e82b
BA
1613 if (adapter->msix_entries) {
1614 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1615 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1616 } else {
1617 ew32(IMS, IMS_ENABLE_MASK);
1618 }
74ef9c39 1619 e1e_flush();
bc7f75fa
AK
1620}
1621
1622/**
1623 * e1000_get_hw_control - get control of the h/w from f/w
1624 * @adapter: address of board private structure
1625 *
489815ce 1626 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK
1627 * For ASF and Pass Through versions of f/w this means that
1628 * the driver is loaded. For AMT version (only with 82573)
1629 * of the f/w this means that the network i/f is open.
1630 **/
1631static void e1000_get_hw_control(struct e1000_adapter *adapter)
1632{
1633 struct e1000_hw *hw = &adapter->hw;
1634 u32 ctrl_ext;
1635 u32 swsm;
1636
1637 /* Let firmware know the driver has taken over */
1638 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1639 swsm = er32(SWSM);
1640 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1641 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1642 ctrl_ext = er32(CTRL_EXT);
ad68076e 1643 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK
1644 }
1645}
1646
1647/**
1648 * e1000_release_hw_control - release control of the h/w to f/w
1649 * @adapter: address of board private structure
1650 *
489815ce 1651 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK
1652 * For ASF and Pass Through versions of f/w this means that the
1653 * driver is no longer loaded. For AMT version (only with 82573) i
1654 * of the f/w this means that the network i/f is closed.
1655 *
1656 **/
1657static void e1000_release_hw_control(struct e1000_adapter *adapter)
1658{
1659 struct e1000_hw *hw = &adapter->hw;
1660 u32 ctrl_ext;
1661 u32 swsm;
1662
1663 /* Let firmware taken over control of h/w */
1664 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1665 swsm = er32(SWSM);
1666 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1667 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1668 ctrl_ext = er32(CTRL_EXT);
ad68076e 1669 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK
1670 }
1671}
1672
bc7f75fa
AK
1673/**
1674 * @e1000_alloc_ring - allocate memory for a ring structure
1675 **/
1676static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1677 struct e1000_ring *ring)
1678{
1679 struct pci_dev *pdev = adapter->pdev;
1680
1681 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1682 GFP_KERNEL);
1683 if (!ring->desc)
1684 return -ENOMEM;
1685
1686 return 0;
1687}
1688
1689/**
1690 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1691 * @adapter: board private structure
1692 *
1693 * Return 0 on success, negative on failure
1694 **/
1695int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1696{
1697 struct e1000_ring *tx_ring = adapter->tx_ring;
1698 int err = -ENOMEM, size;
1699
1700 size = sizeof(struct e1000_buffer) * tx_ring->count;
1701 tx_ring->buffer_info = vmalloc(size);
1702 if (!tx_ring->buffer_info)
1703 goto err;
1704 memset(tx_ring->buffer_info, 0, size);
1705
1706 /* round up to nearest 4K */
1707 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1708 tx_ring->size = ALIGN(tx_ring->size, 4096);
1709
1710 err = e1000_alloc_ring_dma(adapter, tx_ring);
1711 if (err)
1712 goto err;
1713
1714 tx_ring->next_to_use = 0;
1715 tx_ring->next_to_clean = 0;
bc7f75fa
AK
1716
1717 return 0;
1718err:
1719 vfree(tx_ring->buffer_info);
44defeb3 1720 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK
1721 return err;
1722}
1723
1724/**
1725 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1726 * @adapter: board private structure
1727 *
1728 * Returns 0 on success, negative on failure
1729 **/
1730int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1731{
1732 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK
1733 struct e1000_buffer *buffer_info;
1734 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK
1735
1736 size = sizeof(struct e1000_buffer) * rx_ring->count;
1737 rx_ring->buffer_info = vmalloc(size);
1738 if (!rx_ring->buffer_info)
1739 goto err;
1740 memset(rx_ring->buffer_info, 0, size);
1741
47f44e40
AK
1742 for (i = 0; i < rx_ring->count; i++) {
1743 buffer_info = &rx_ring->buffer_info[i];
1744 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1745 sizeof(struct e1000_ps_page),
1746 GFP_KERNEL);
1747 if (!buffer_info->ps_pages)
1748 goto err_pages;
1749 }
bc7f75fa
AK
1750
1751 desc_len = sizeof(union e1000_rx_desc_packet_split);
1752
1753 /* Round up to nearest 4K */
1754 rx_ring->size = rx_ring->count * desc_len;
1755 rx_ring->size = ALIGN(rx_ring->size, 4096);
1756
1757 err = e1000_alloc_ring_dma(adapter, rx_ring);
1758 if (err)
47f44e40 1759 goto err_pages;
bc7f75fa
AK
1760
1761 rx_ring->next_to_clean = 0;
1762 rx_ring->next_to_use = 0;
1763 rx_ring->rx_skb_top = NULL;
1764
1765 return 0;
47f44e40
AK
1766
1767err_pages:
1768 for (i = 0; i < rx_ring->count; i++) {
1769 buffer_info = &rx_ring->buffer_info[i];
1770 kfree(buffer_info->ps_pages);
1771 }
bc7f75fa
AK
1772err:
1773 vfree(rx_ring->buffer_info);
44defeb3 1774 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK
1775 return err;
1776}
1777
1778/**
1779 * e1000_clean_tx_ring - Free Tx Buffers
1780 * @adapter: board private structure
1781 **/
1782static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1783{
1784 struct e1000_ring *tx_ring = adapter->tx_ring;
1785 struct e1000_buffer *buffer_info;
1786 unsigned long size;
1787 unsigned int i;
1788
1789 for (i = 0; i < tx_ring->count; i++) {
1790 buffer_info = &tx_ring->buffer_info[i];
1791 e1000_put_txbuf(adapter, buffer_info);
1792 }
1793
1794 size = sizeof(struct e1000_buffer) * tx_ring->count;
1795 memset(tx_ring->buffer_info, 0, size);
1796
1797 memset(tx_ring->desc, 0, tx_ring->size);
1798
1799 tx_ring->next_to_use = 0;
1800 tx_ring->next_to_clean = 0;
1801
1802 writel(0, adapter->hw.hw_addr + tx_ring->head);
1803 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1804}
1805
1806/**
1807 * e1000e_free_tx_resources - Free Tx Resources per Queue
1808 * @adapter: board private structure
1809 *
1810 * Free all transmit software resources
1811 **/
1812void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1813{
1814 struct pci_dev *pdev = adapter->pdev;
1815 struct e1000_ring *tx_ring = adapter->tx_ring;
1816
1817 e1000_clean_tx_ring(adapter);
1818
1819 vfree(tx_ring->buffer_info);
1820 tx_ring->buffer_info = NULL;
1821
1822 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1823 tx_ring->dma);
1824 tx_ring->desc = NULL;
1825}
1826
1827/**
1828 * e1000e_free_rx_resources - Free Rx Resources
1829 * @adapter: board private structure
1830 *
1831 * Free all receive software resources
1832 **/
1833
1834void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1835{
1836 struct pci_dev *pdev = adapter->pdev;
1837 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1838 int i;
bc7f75fa
AK
1839
1840 e1000_clean_rx_ring(adapter);
1841
47f44e40
AK
1842 for (i = 0; i < rx_ring->count; i++) {
1843 kfree(rx_ring->buffer_info[i].ps_pages);
1844 }
1845
bc7f75fa
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1846 vfree(rx_ring->buffer_info);
1847 rx_ring->buffer_info = NULL;
1848
bc7f75fa
AK
1849 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1850 rx_ring->dma);
1851 rx_ring->desc = NULL;
1852}
1853
1854/**
1855 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK
1856 * @adapter: pointer to adapter
1857 * @itr_setting: current adapter->itr
1858 * @packets: the number of packets during this measurement interval
1859 * @bytes: the number of bytes during this measurement interval
1860 *
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1861 * Stores a new ITR value based on packets and byte
1862 * counts during the last interrupt. The advantage of per interrupt
1863 * computation is faster updates and more accurate ITR for the current
1864 * traffic pattern. Constants in this function were computed
1865 * based on theoretical maximum wire speed and thresholds were set based
1866 * on testing data as well as attempting to minimize response time
4662e82b
BA
1867 * while increasing bulk throughput. This functionality is controlled
1868 * by the InterruptThrottleRate module parameter.
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1869 **/
1870static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1871 u16 itr_setting, int packets,
1872 int bytes)
1873{
1874 unsigned int retval = itr_setting;
1875
1876 if (packets == 0)
1877 goto update_itr_done;
1878
1879 switch (itr_setting) {
1880 case lowest_latency:
1881 /* handle TSO and jumbo frames */
1882 if (bytes/packets > 8000)
1883 retval = bulk_latency;
1884 else if ((packets < 5) && (bytes > 512)) {
1885 retval = low_latency;
1886 }
1887 break;
1888 case low_latency: /* 50 usec aka 20000 ints/s */
1889 if (bytes > 10000) {
1890 /* this if handles the TSO accounting */
1891 if (bytes/packets > 8000) {
1892 retval = bulk_latency;
1893 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1894 retval = bulk_latency;
1895 } else if ((packets > 35)) {
1896 retval = lowest_latency;
1897 }
1898 } else if (bytes/packets > 2000) {
1899 retval = bulk_latency;
1900 } else if (packets <= 2 && bytes < 512) {
1901 retval = lowest_latency;
1902 }
1903 break;
1904 case bulk_latency: /* 250 usec aka 4000 ints/s */
1905 if (bytes > 25000) {
1906 if (packets > 35) {
1907 retval = low_latency;
1908 }
1909 } else if (bytes < 6000) {
1910 retval = low_latency;
1911 }
1912 break;
1913 }
1914
1915update_itr_done:
1916 return retval;
1917}
1918
1919static void e1000_set_itr(struct e1000_adapter *adapter)
1920{
1921 struct e1000_hw *hw = &adapter->hw;
1922 u16 current_itr;
1923 u32 new_itr = adapter->itr;
1924
1925 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1926 if (adapter->link_speed != SPEED_1000) {
1927 current_itr = 0;
1928 new_itr = 4000;
1929 goto set_itr_now;
1930 }
1931
1932 adapter->tx_itr = e1000_update_itr(adapter,
1933 adapter->tx_itr,
1934 adapter->total_tx_packets,
1935 adapter->total_tx_bytes);
1936 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1937 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1938 adapter->tx_itr = low_latency;
1939
1940 adapter->rx_itr = e1000_update_itr(adapter,
1941 adapter->rx_itr,
1942 adapter->total_rx_packets,
1943 adapter->total_rx_bytes);
1944 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1945 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1946 adapter->rx_itr = low_latency;
1947
1948 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1949
1950 switch (current_itr) {
1951 /* counts and packets in update_itr are dependent on these numbers */
1952 case lowest_latency:
1953 new_itr = 70000;
1954 break;
1955 case low_latency:
1956 new_itr = 20000; /* aka hwitr = ~200 */
1957 break;
1958 case bulk_latency:
1959 new_itr = 4000;
1960 break;
1961 default:
1962 break;
1963 }
1964
1965set_itr_now:
1966 if (new_itr != adapter->itr) {
ad68076e
BA
1967 /*
1968 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1969 * by adding intermediate steps when interrupt rate is
ad68076e
BA
1970 * increasing
1971 */
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AK
1972 new_itr = new_itr > adapter->itr ?
1973 min(adapter->itr + (new_itr >> 2), new_itr) :
1974 new_itr;
1975 adapter->itr = new_itr;
4662e82b
BA
1976 adapter->rx_ring->itr_val = new_itr;
1977 if (adapter->msix_entries)
1978 adapter->rx_ring->set_itr = 1;
1979 else
1980 ew32(ITR, 1000000000 / (new_itr * 256));
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AK
1981 }
1982}
1983
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BA
1984/**
1985 * e1000_alloc_queues - Allocate memory for all rings
1986 * @adapter: board private structure to initialize
1987 **/
1988static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1989{
1990 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1991 if (!adapter->tx_ring)
1992 goto err;
1993
1994 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1995 if (!adapter->rx_ring)
1996 goto err;
1997
1998 return 0;
1999err:
2000 e_err("Unable to allocate memory for queues\n");
2001 kfree(adapter->rx_ring);
2002 kfree(adapter->tx_ring);
2003 return -ENOMEM;
2004}
2005
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2006/**
2007 * e1000_clean - NAPI Rx polling callback
ad68076e 2008 * @napi: struct associated with this polling callback
489815ce 2009 * @budget: amount of packets driver is allowed to process this poll
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2010 **/
2011static int e1000_clean(struct napi_struct *napi, int budget)
2012{
2013 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2014 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2015 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2016 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2017
4cf1653a 2018 adapter = netdev_priv(poll_dev);
bc7f75fa 2019
4662e82b
BA
2020 if (adapter->msix_entries &&
2021 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2022 goto clean_rx;
2023
92af3e95 2024 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2025
4662e82b 2026clean_rx:
bc7f75fa 2027 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2028
12d04a3c 2029 if (!tx_cleaned)
d2c7ddd6 2030 work_done = budget;
bc7f75fa 2031
53e52c72
DM
2032 /* If budget not fully consumed, exit the polling mode */
2033 if (work_done < budget) {
bc7f75fa
AK
2034 if (adapter->itr_setting & 3)
2035 e1000_set_itr(adapter);
288379f0 2036 napi_complete(napi);
a3c69fef
JB
2037 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2038 if (adapter->msix_entries)
2039 ew32(IMS, adapter->rx_ring->ims_val);
2040 else
2041 e1000_irq_enable(adapter);
2042 }
bc7f75fa
AK
2043 }
2044
2045 return work_done;
2046}
2047
2048static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2049{
2050 struct e1000_adapter *adapter = netdev_priv(netdev);
2051 struct e1000_hw *hw = &adapter->hw;
2052 u32 vfta, index;
2053
2054 /* don't update vlan cookie if already programmed */
2055 if ((adapter->hw.mng_cookie.status &
2056 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2057 (vid == adapter->mng_vlan_id))
2058 return;
caaddaf8 2059
bc7f75fa 2060 /* add VID to filter table */
caaddaf8
BA
2061 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2062 index = (vid >> 5) & 0x7F;
2063 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2064 vfta |= (1 << (vid & 0x1F));
2065 hw->mac.ops.write_vfta(hw, index, vfta);
2066 }
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AK
2067}
2068
2069static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2070{
2071 struct e1000_adapter *adapter = netdev_priv(netdev);
2072 struct e1000_hw *hw = &adapter->hw;
2073 u32 vfta, index;
2074
74ef9c39
JB
2075 if (!test_bit(__E1000_DOWN, &adapter->state))
2076 e1000_irq_disable(adapter);
bc7f75fa 2077 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB
2078
2079 if (!test_bit(__E1000_DOWN, &adapter->state))
2080 e1000_irq_enable(adapter);
bc7f75fa
AK
2081
2082 if ((adapter->hw.mng_cookie.status &
2083 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2084 (vid == adapter->mng_vlan_id)) {
2085 /* release control to f/w */
2086 e1000_release_hw_control(adapter);
2087 return;
2088 }
2089
2090 /* remove VID from filter table */
caaddaf8
BA
2091 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2092 index = (vid >> 5) & 0x7F;
2093 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2094 vfta &= ~(1 << (vid & 0x1F));
2095 hw->mac.ops.write_vfta(hw, index, vfta);
2096 }
bc7f75fa
AK
2097}
2098
2099static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2100{
2101 struct net_device *netdev = adapter->netdev;
2102 u16 vid = adapter->hw.mng_cookie.vlan_id;
2103 u16 old_vid = adapter->mng_vlan_id;
2104
2105 if (!adapter->vlgrp)
2106 return;
2107
2108 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2109 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2110 if (adapter->hw.mng_cookie.status &
2111 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2112 e1000_vlan_rx_add_vid(netdev, vid);
2113 adapter->mng_vlan_id = vid;
2114 }
2115
2116 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2117 (vid != old_vid) &&
2118 !vlan_group_get_device(adapter->vlgrp, old_vid))
2119 e1000_vlan_rx_kill_vid(netdev, old_vid);
2120 } else {
2121 adapter->mng_vlan_id = vid;
2122 }
2123}
2124
2125
2126static void e1000_vlan_rx_register(struct net_device *netdev,
2127 struct vlan_group *grp)
2128{
2129 struct e1000_adapter *adapter = netdev_priv(netdev);
2130 struct e1000_hw *hw = &adapter->hw;
2131 u32 ctrl, rctl;
2132
74ef9c39
JB
2133 if (!test_bit(__E1000_DOWN, &adapter->state))
2134 e1000_irq_disable(adapter);
bc7f75fa
AK
2135 adapter->vlgrp = grp;
2136
2137 if (grp) {
2138 /* enable VLAN tag insert/strip */
2139 ctrl = er32(CTRL);
2140 ctrl |= E1000_CTRL_VME;
2141 ew32(CTRL, ctrl);
2142
2143 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2144 /* enable VLAN receive filtering */
2145 rctl = er32(RCTL);
bc7f75fa
AK
2146 rctl &= ~E1000_RCTL_CFIEN;
2147 ew32(RCTL, rctl);
2148 e1000_update_mng_vlan(adapter);
2149 }
2150 } else {
2151 /* disable VLAN tag insert/strip */
2152 ctrl = er32(CTRL);
2153 ctrl &= ~E1000_CTRL_VME;
2154 ew32(CTRL, ctrl);
2155
2156 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK
2157 if (adapter->mng_vlan_id !=
2158 (u16)E1000_MNG_VLAN_NONE) {
2159 e1000_vlan_rx_kill_vid(netdev,
2160 adapter->mng_vlan_id);
2161 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2162 }
2163 }
2164 }
2165
74ef9c39
JB
2166 if (!test_bit(__E1000_DOWN, &adapter->state))
2167 e1000_irq_enable(adapter);
bc7f75fa
AK
2168}
2169
2170static void e1000_restore_vlan(struct e1000_adapter *adapter)
2171{
2172 u16 vid;
2173
2174 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2175
2176 if (!adapter->vlgrp)
2177 return;
2178
2179 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2180 if (!vlan_group_get_device(adapter->vlgrp, vid))
2181 continue;
2182 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2183 }
2184}
2185
2186static void e1000_init_manageability(struct e1000_adapter *adapter)
2187{
2188 struct e1000_hw *hw = &adapter->hw;
2189 u32 manc, manc2h;
2190
2191 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2192 return;
2193
2194 manc = er32(MANC);
2195
ad68076e
BA
2196 /*
2197 * enable receiving management packets to the host. this will probably
bc7f75fa 2198 * generate destination unreachable messages from the host OS, but
ad68076e
BA
2199 * the packets will be handled on SMBUS
2200 */
bc7f75fa
AK
2201 manc |= E1000_MANC_EN_MNG2HOST;
2202 manc2h = er32(MANC2H);
2203#define E1000_MNG2HOST_PORT_623 (1 << 5)
2204#define E1000_MNG2HOST_PORT_664 (1 << 6)
2205 manc2h |= E1000_MNG2HOST_PORT_623;
2206 manc2h |= E1000_MNG2HOST_PORT_664;
2207 ew32(MANC2H, manc2h);
2208 ew32(MANC, manc);
2209}
2210
2211/**
2212 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2213 * @adapter: board private structure
2214 *
2215 * Configure the Tx unit of the MAC after a reset.
2216 **/
2217static void e1000_configure_tx(struct e1000_adapter *adapter)
2218{
2219 struct e1000_hw *hw = &adapter->hw;
2220 struct e1000_ring *tx_ring = adapter->tx_ring;
2221 u64 tdba;
2222 u32 tdlen, tctl, tipg, tarc;
2223 u32 ipgr1, ipgr2;
2224
2225 /* Setup the HW Tx Head and Tail descriptor pointers */
2226 tdba = tx_ring->dma;
2227 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2228 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK
2229 ew32(TDBAH, (tdba >> 32));
2230 ew32(TDLEN, tdlen);
2231 ew32(TDH, 0);
2232 ew32(TDT, 0);
2233 tx_ring->head = E1000_TDH;
2234 tx_ring->tail = E1000_TDT;
2235
2236 /* Set the default values for the Tx Inter Packet Gap timer */
2237 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2238 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2239 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2240
2241 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2242 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2243
2244 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2245 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2246 ew32(TIPG, tipg);
2247
2248 /* Set the Tx Interrupt Delay register */
2249 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2250 /* Tx irq moderation */
bc7f75fa
AK
2251 ew32(TADV, adapter->tx_abs_int_delay);
2252
2253 /* Program the Transmit Control Register */
2254 tctl = er32(TCTL);
2255 tctl &= ~E1000_TCTL_CT;
2256 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2257 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2258
2259 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2260 tarc = er32(TARC(0));
ad68076e
BA
2261 /*
2262 * set the speed mode bit, we'll clear it if we're not at
2263 * gigabit link later
2264 */
bc7f75fa
AK
2265#define SPEED_MODE_BIT (1 << 21)
2266 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2267 ew32(TARC(0), tarc);
bc7f75fa
AK
2268 }
2269
2270 /* errata: program both queues to unweighted RR */
2271 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2272 tarc = er32(TARC(0));
bc7f75fa 2273 tarc |= 1;
e9ec2c0f
JK
2274 ew32(TARC(0), tarc);
2275 tarc = er32(TARC(1));
bc7f75fa 2276 tarc |= 1;
e9ec2c0f 2277 ew32(TARC(1), tarc);
bc7f75fa
AK
2278 }
2279
bc7f75fa
AK
2280 /* Setup Transmit Descriptor Settings for eop descriptor */
2281 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2282
2283 /* only set IDE if we are delaying interrupts using the timers */
2284 if (adapter->tx_int_delay)
2285 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2286
2287 /* enable Report Status bit */
2288 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2289
2290 ew32(TCTL, tctl);
2291
edfea6e6 2292 e1000e_config_collision_dist(hw);
bc7f75fa
AK
2293}
2294
2295/**
2296 * e1000_setup_rctl - configure the receive control registers
2297 * @adapter: Board private structure
2298 **/
2299#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2300 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2301static void e1000_setup_rctl(struct e1000_adapter *adapter)
2302{
2303 struct e1000_hw *hw = &adapter->hw;
2304 u32 rctl, rfctl;
2305 u32 psrctl = 0;
2306 u32 pages = 0;
2307
2308 /* Program MC offset vector base */
2309 rctl = er32(RCTL);
2310 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2311 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2312 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2313 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2314
2315 /* Do not Store bad packets */
2316 rctl &= ~E1000_RCTL_SBP;
2317
2318 /* Enable Long Packet receive */
2319 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2320 rctl &= ~E1000_RCTL_LPE;
2321 else
2322 rctl |= E1000_RCTL_LPE;
2323
eb7c3adb
JK
2324 /* Some systems expect that the CRC is included in SMBUS traffic. The
2325 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2326 * host memory when this is enabled
2327 */
2328 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2329 rctl |= E1000_RCTL_SECRC;
5918bd88 2330
a4f58f54
BA
2331 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2332 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2333 u16 phy_data;
2334
2335 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2336 phy_data &= 0xfff8;
2337 phy_data |= (1 << 2);
2338 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2339
2340 e1e_rphy(hw, 22, &phy_data);
2341 phy_data &= 0x0fff;
2342 phy_data |= (1 << 14);
2343 e1e_wphy(hw, 0x10, 0x2823);
2344 e1e_wphy(hw, 0x11, 0x0003);
2345 e1e_wphy(hw, 22, phy_data);
2346 }
2347
bc7f75fa
AK
2348 /* Setup buffer sizes */
2349 rctl &= ~E1000_RCTL_SZ_4096;
2350 rctl |= E1000_RCTL_BSEX;
2351 switch (adapter->rx_buffer_len) {
bc7f75fa
AK
2352 case 2048:
2353 default:
2354 rctl |= E1000_RCTL_SZ_2048;
2355 rctl &= ~E1000_RCTL_BSEX;
2356 break;
2357 case 4096:
2358 rctl |= E1000_RCTL_SZ_4096;
2359 break;
2360 case 8192:
2361 rctl |= E1000_RCTL_SZ_8192;
2362 break;
2363 case 16384:
2364 rctl |= E1000_RCTL_SZ_16384;
2365 break;
2366 }
2367
2368 /*
2369 * 82571 and greater support packet-split where the protocol
2370 * header is placed in skb->data and the packet data is
2371 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2372 * In the case of a non-split, skb->data is linearly filled,
2373 * followed by the page buffers. Therefore, skb->data is
2374 * sized to hold the largest protocol header.
2375 *
2376 * allocations using alloc_page take too long for regular MTU
2377 * so only enable packet split for jumbo frames
2378 *
2379 * Using pages when the page size is greater than 16k wastes
2380 * a lot of memory, since we allocate 3 pages at all times
2381 * per packet.
2382 */
bc7f75fa 2383 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA
2384 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2385 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2386 adapter->rx_ps_pages = pages;
97ac8cae
BA
2387 else
2388 adapter->rx_ps_pages = 0;
bc7f75fa
AK
2389
2390 if (adapter->rx_ps_pages) {
2391 /* Configure extra packet-split registers */
2392 rfctl = er32(RFCTL);
2393 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA
2394 /*
2395 * disable packet split support for IPv6 extension headers,
2396 * because some malformed IPv6 headers can hang the Rx
2397 */
bc7f75fa
AK
2398 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2399 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2400
2401 ew32(RFCTL, rfctl);
2402
140a7480
AK
2403 /* Enable Packet split descriptors */
2404 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK
2405
2406 psrctl |= adapter->rx_ps_bsize0 >>
2407 E1000_PSRCTL_BSIZE0_SHIFT;
2408
2409 switch (adapter->rx_ps_pages) {
2410 case 3:
2411 psrctl |= PAGE_SIZE <<
2412 E1000_PSRCTL_BSIZE3_SHIFT;
2413 case 2:
2414 psrctl |= PAGE_SIZE <<
2415 E1000_PSRCTL_BSIZE2_SHIFT;
2416 case 1:
2417 psrctl |= PAGE_SIZE >>
2418 E1000_PSRCTL_BSIZE1_SHIFT;
2419 break;
2420 }
2421
2422 ew32(PSRCTL, psrctl);
2423 }
2424
2425 ew32(RCTL, rctl);
318a94d6
JK
2426 /* just started the receive unit, no need to restart */
2427 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK
2428}
2429
2430/**
2431 * e1000_configure_rx - Configure Receive Unit after Reset
2432 * @adapter: board private structure
2433 *
2434 * Configure the Rx unit of the MAC after a reset.
2435 **/
2436static void e1000_configure_rx(struct e1000_adapter *adapter)
2437{
2438 struct e1000_hw *hw = &adapter->hw;
2439 struct e1000_ring *rx_ring = adapter->rx_ring;
2440 u64 rdba;
2441 u32 rdlen, rctl, rxcsum, ctrl_ext;
2442
2443 if (adapter->rx_ps_pages) {
2444 /* this is a 32 byte descriptor */
2445 rdlen = rx_ring->count *
2446 sizeof(union e1000_rx_desc_packet_split);
2447 adapter->clean_rx = e1000_clean_rx_irq_ps;
2448 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA
2449 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2450 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2451 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2452 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2453 } else {
97ac8cae 2454 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK
2455 adapter->clean_rx = e1000_clean_rx_irq;
2456 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2457 }
2458
2459 /* disable receives while setting up the descriptors */
2460 rctl = er32(RCTL);
2461 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2462 e1e_flush();
2463 msleep(10);
2464
2465 /* set the Receive Delay Timer Register */
2466 ew32(RDTR, adapter->rx_int_delay);
2467
2468 /* irq moderation */
2469 ew32(RADV, adapter->rx_abs_int_delay);
2470 if (adapter->itr_setting != 0)
ad68076e 2471 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK
2472
2473 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK
2474 /* Auto-Mask interrupts upon ICR access */
2475 ctrl_ext |= E1000_CTRL_EXT_IAME;
2476 ew32(IAM, 0xffffffff);
2477 ew32(CTRL_EXT, ctrl_ext);
2478 e1e_flush();
2479
ad68076e
BA
2480 /*
2481 * Setup the HW Rx Head and Tail Descriptor Pointers and
2482 * the Base and Length of the Rx Descriptor Ring
2483 */
bc7f75fa 2484 rdba = rx_ring->dma;
284901a9 2485 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK
2486 ew32(RDBAH, (rdba >> 32));
2487 ew32(RDLEN, rdlen);
2488 ew32(RDH, 0);
2489 ew32(RDT, 0);
2490 rx_ring->head = E1000_RDH;
2491 rx_ring->tail = E1000_RDT;
2492
2493 /* Enable Receive Checksum Offload for TCP and UDP */
2494 rxcsum = er32(RXCSUM);
2495 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2496 rxcsum |= E1000_RXCSUM_TUOFL;
2497
ad68076e
BA
2498 /*
2499 * IPv4 payload checksum for UDP fragments must be
2500 * used in conjunction with packet-split.
2501 */
bc7f75fa
AK
2502 if (adapter->rx_ps_pages)
2503 rxcsum |= E1000_RXCSUM_IPPCSE;
2504 } else {
2505 rxcsum &= ~E1000_RXCSUM_TUOFL;
2506 /* no need to clear IPPCSE as it defaults to 0 */
2507 }
2508 ew32(RXCSUM, rxcsum);
2509
ad68076e
BA
2510 /*
2511 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2512 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA
2513 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2514 */
53ec5498
BA
2515 if (adapter->flags & FLAG_HAS_ERT) {
2516 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2517 u32 rxdctl = er32(RXDCTL(0));
2518 ew32(RXDCTL(0), rxdctl | 0x3);
2519 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2520 /*
2521 * With jumbo frames and early-receive enabled,
2522 * excessive C-state transition latencies result in
2523 * dropped transactions.
2524 */
2525 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2526 adapter->netdev->name, 55);
2527 } else {
2528 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2529 adapter->netdev->name,
2530 PM_QOS_DEFAULT_VALUE);
2531 }
97ac8cae 2532 }
bc7f75fa
AK
2533
2534 /* Enable Receives */
2535 ew32(RCTL, rctl);
2536}
2537
2538/**
e2de3eb6 2539 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK
2540 * @hw: pointer to the HW structure
2541 * @mc_addr_list: array of multicast addresses to program
2542 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2543 *
ab8932f3 2544 * Updates the Multicast Table Array.
bc7f75fa 2545 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2546 **/
e2de3eb6 2547static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2548 u32 mc_addr_count)
bc7f75fa 2549{
ab8932f3 2550 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK
2551}
2552
2553/**
2554 * e1000_set_multi - Multicast and Promiscuous mode set
2555 * @netdev: network interface device structure
2556 *
2557 * The set_multi entry point is called whenever the multicast address
2558 * list or the network interface flags are updated. This routine is
2559 * responsible for configuring the hardware for proper multicast,
2560 * promiscuous mode, and all-multi behavior.
2561 **/
2562static void e1000_set_multi(struct net_device *netdev)
2563{
2564 struct e1000_adapter *adapter = netdev_priv(netdev);
2565 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK
2566 struct dev_mc_list *mc_ptr;
2567 u8 *mta_list;
2568 u32 rctl;
2569 int i;
2570
2571 /* Check for Promiscuous and All Multicast modes */
2572
2573 rctl = er32(RCTL);
2574
2575 if (netdev->flags & IFF_PROMISC) {
2576 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2577 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2578 } else {
746b9f02
PM
2579 if (netdev->flags & IFF_ALLMULTI) {
2580 rctl |= E1000_RCTL_MPE;
2581 rctl &= ~E1000_RCTL_UPE;
2582 } else {
2583 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2584 }
78ed11a5 2585 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2586 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK
2587 }
2588
2589 ew32(RCTL, rctl);
2590
7aeef972
JP
2591 if (!netdev_mc_empty(netdev)) {
2592 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK
2593 if (!mta_list)
2594 return;
2595
2596 /* prepare a packed array of only addresses. */
7aeef972
JP
2597 i = 0;
2598 netdev_for_each_mc_addr(mc_ptr, netdev)
2599 memcpy(mta_list + (i++ * ETH_ALEN),
2600 mc_ptr->dmi_addr, ETH_ALEN);
bc7f75fa 2601
ab8932f3 2602 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK
2603 kfree(mta_list);
2604 } else {
2605 /*
2606 * if we're called from probe, we might not have
2607 * anything to do here, so clear out the list
2608 */
ab8932f3 2609 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK
2610 }
2611}
2612
2613/**
ad68076e 2614 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK
2615 * @adapter: private board structure
2616 **/
2617static void e1000_configure(struct e1000_adapter *adapter)
2618{
2619 e1000_set_multi(adapter->netdev);
2620
2621 e1000_restore_vlan(adapter);
2622 e1000_init_manageability(adapter);
2623
2624 e1000_configure_tx(adapter);
2625 e1000_setup_rctl(adapter);
2626 e1000_configure_rx(adapter);
ad68076e 2627 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK
2628}
2629
2630/**
2631 * e1000e_power_up_phy - restore link in case the phy was powered down
2632 * @adapter: address of board private structure
2633 *
2634 * The phy may be powered down to save power and turn off link when the
2635 * driver is unloaded and wake on lan is not enabled (among others)
2636 * *** this routine MUST be followed by a call to e1000e_reset ***
2637 **/
2638void e1000e_power_up_phy(struct e1000_adapter *adapter)
2639{
17f208de
BA
2640 if (adapter->hw.phy.ops.power_up)
2641 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK
2642
2643 adapter->hw.mac.ops.setup_link(&adapter->hw);
2644}
2645
2646/**
2647 * e1000_power_down_phy - Power down the PHY
2648 *
17f208de
BA
2649 * Power down the PHY so no link is implied when interface is down.
2650 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK
2651 */
2652static void e1000_power_down_phy(struct e1000_adapter *adapter)
2653{
bc7f75fa 2654 /* WoL is enabled */
23b66e2b 2655 if (adapter->wol)
bc7f75fa
AK
2656 return;
2657
17f208de
BA
2658 if (adapter->hw.phy.ops.power_down)
2659 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK
2660}
2661
2662/**
2663 * e1000e_reset - bring the hardware into a known good state
2664 *
2665 * This function boots the hardware and enables some settings that
2666 * require a configuration cycle of the hardware - those cannot be
2667 * set/changed during runtime. After reset the device needs to be
ad68076e 2668 * properly configured for Rx, Tx etc.
bc7f75fa
AK
2669 */
2670void e1000e_reset(struct e1000_adapter *adapter)
2671{
2672 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2673 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK
2674 struct e1000_hw *hw = &adapter->hw;
2675 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2676 u32 pba = adapter->pba;
bc7f75fa
AK
2677 u16 hwm;
2678
ad68076e 2679 /* reset Packet Buffer Allocation to default */
318a94d6 2680 ew32(PBA, pba);
df762464 2681
318a94d6 2682 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA
2683 /*
2684 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK
2685 * large enough to accommodate two full transmit packets,
2686 * rounded up to the next 1KB and expressed in KB. Likewise,
2687 * the Rx FIFO should be large enough to accommodate at least
2688 * one full receive packet and is similarly rounded up and
ad68076e
BA
2689 * expressed in KB.
2690 */
df762464 2691 pba = er32(PBA);
bc7f75fa 2692 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2693 tx_space = pba >> 16;
bc7f75fa 2694 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2695 pba &= 0xffff;
ad68076e
BA
2696 /*
2697 * the Tx fifo also stores 16 bytes of information about the tx
2698 * but don't include ethernet FCS because hardware appends it
318a94d6
JK
2699 */
2700 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK
2701 sizeof(struct e1000_tx_desc) -
2702 ETH_FCS_LEN) * 2;
2703 min_tx_space = ALIGN(min_tx_space, 1024);
2704 min_tx_space >>= 10;
2705 /* software strips receive CRC, so leave room for it */
318a94d6 2706 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK
2707 min_rx_space = ALIGN(min_rx_space, 1024);
2708 min_rx_space >>= 10;
2709
ad68076e
BA
2710 /*
2711 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2712 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA
2713 * allocation, take space away from current Rx allocation
2714 */
df762464
AK
2715 if ((tx_space < min_tx_space) &&
2716 ((min_tx_space - tx_space) < pba)) {
2717 pba -= min_tx_space - tx_space;
bc7f75fa 2718
ad68076e
BA
2719 /*
2720 * if short on Rx space, Rx wins and must trump tx
2721 * adjustment or use Early Receive if available
2722 */
df762464 2723 if ((pba < min_rx_space) &&
bc7f75fa
AK
2724 (!(adapter->flags & FLAG_HAS_ERT)))
2725 /* ERT enabled in e1000_configure_rx */
df762464 2726 pba = min_rx_space;
bc7f75fa 2727 }
df762464
AK
2728
2729 ew32(PBA, pba);
bc7f75fa
AK
2730 }
2731
bc7f75fa 2732
ad68076e
BA
2733 /*
2734 * flow control settings
2735 *
38eb394e 2736 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK
2737 * (or the size used for early receive) above it in the Rx FIFO.
2738 * Set it to the lower of:
2739 * - 90% of the Rx FIFO size, and
2740 * - the full Rx FIFO size minus the early receive size (for parts
2741 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 2742 * - the full Rx FIFO size minus one full frame
ad68076e 2743 */
38eb394e
BA
2744 if (hw->mac.type == e1000_pchlan) {
2745 /*
2746 * Workaround PCH LOM adapter hangs with certain network
2747 * loads. If hangs persist, try disabling Tx flow control.
2748 */
2749 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2750 fc->high_water = 0x3500;
2751 fc->low_water = 0x1500;
2752 } else {
2753 fc->high_water = 0x5000;
2754 fc->low_water = 0x3000;
2755 }
2756 } else {
2757 if ((adapter->flags & FLAG_HAS_ERT) &&
2758 (adapter->netdev->mtu > ETH_DATA_LEN))
2759 hwm = min(((pba << 10) * 9 / 10),
2760 ((pba << 10) - (E1000_ERT_2048 << 3)));
2761 else
2762 hwm = min(((pba << 10) * 9 / 10),
2763 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2764
38eb394e
BA
2765 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2766 fc->low_water = fc->high_water - 8;
2767 }
bc7f75fa
AK
2768
2769 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2770 fc->pause_time = 0xFFFF;
bc7f75fa 2771 else
318a94d6
JK
2772 fc->pause_time = E1000_FC_PAUSE_TIME;
2773 fc->send_xon = 1;
5c48ef3e 2774 fc->current_mode = fc->requested_mode;
bc7f75fa
AK
2775
2776 /* Allow time for pending master requests to run */
2777 mac->ops.reset_hw(hw);
97ac8cae
BA
2778
2779 /*
2780 * For parts with AMT enabled, let the firmware know
2781 * that the network interface is in control
2782 */
c43bc57e 2783 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA
2784 e1000_get_hw_control(adapter);
2785
bc7f75fa 2786 ew32(WUC, 0);
a4f58f54
BA
2787 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2788 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK
2789
2790 if (mac->ops.init_hw(hw))
44defeb3 2791 e_err("Hardware Error\n");
bc7f75fa 2792
38eb394e
BA
2793 /* additional part of the flow-control workaround above */
2794 if (hw->mac.type == e1000_pchlan)
2795 ew32(FCRTV_PCH, 0x1000);
2796
bc7f75fa
AK
2797 e1000_update_mng_vlan(adapter);
2798
2799 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2800 ew32(VET, ETH_P_8021Q);
2801
2802 e1000e_reset_adaptive(hw);
2803 e1000_get_phy_info(hw);
2804
918d7197
BA
2805 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2806 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2807 u16 phy_data = 0;
ad68076e
BA
2808 /*
2809 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2810 * the return value of this function because there is nothing
ad68076e
BA
2811 * different we would do if it failed
2812 */
bc7f75fa
AK
2813 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2814 phy_data &= ~IGP02E1000_PM_SPD;
2815 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2816 }
bc7f75fa
AK
2817}
2818
2819int e1000e_up(struct e1000_adapter *adapter)
2820{
2821 struct e1000_hw *hw = &adapter->hw;
2822
53ec5498
BA
2823 /* DMA latency requirement to workaround early-receive/jumbo issue */
2824 if (adapter->flags & FLAG_HAS_ERT)
2825 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
2826 adapter->netdev->name,
2827 PM_QOS_DEFAULT_VALUE);
2828
bc7f75fa
AK
2829 /* hardware has been reset, we need to reload some things */
2830 e1000_configure(adapter);
2831
2832 clear_bit(__E1000_DOWN, &adapter->state);
2833
2834 napi_enable(&adapter->napi);
4662e82b
BA
2835 if (adapter->msix_entries)
2836 e1000_configure_msix(adapter);
bc7f75fa
AK
2837 e1000_irq_enable(adapter);
2838
4cb9be7a
JB
2839 netif_wake_queue(adapter->netdev);
2840
bc7f75fa
AK
2841 /* fire a link change interrupt to start the watchdog */
2842 ew32(ICS, E1000_ICS_LSC);
2843 return 0;
2844}
2845
2846void e1000e_down(struct e1000_adapter *adapter)
2847{
2848 struct net_device *netdev = adapter->netdev;
2849 struct e1000_hw *hw = &adapter->hw;
2850 u32 tctl, rctl;
2851
ad68076e
BA
2852 /*
2853 * signal that we're down so the interrupt handler does not
2854 * reschedule our watchdog timer
2855 */
bc7f75fa
AK
2856 set_bit(__E1000_DOWN, &adapter->state);
2857
2858 /* disable receives in the hardware */
2859 rctl = er32(RCTL);
2860 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2861 /* flush and sleep below */
2862
4cb9be7a 2863 netif_stop_queue(netdev);
bc7f75fa
AK
2864
2865 /* disable transmits in the hardware */
2866 tctl = er32(TCTL);
2867 tctl &= ~E1000_TCTL_EN;
2868 ew32(TCTL, tctl);
2869 /* flush both disables and wait for them to finish */
2870 e1e_flush();
2871 msleep(10);
2872
2873 napi_disable(&adapter->napi);
2874 e1000_irq_disable(adapter);
2875
2876 del_timer_sync(&adapter->watchdog_timer);
2877 del_timer_sync(&adapter->phy_info_timer);
2878
bc7f75fa
AK
2879 netif_carrier_off(netdev);
2880 adapter->link_speed = 0;
2881 adapter->link_duplex = 0;
2882
52cc3086
JK
2883 if (!pci_channel_offline(adapter->pdev))
2884 e1000e_reset(adapter);
bc7f75fa
AK
2885 e1000_clean_tx_ring(adapter);
2886 e1000_clean_rx_ring(adapter);
2887
53ec5498
BA
2888 if (adapter->flags & FLAG_HAS_ERT)
2889 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
2890 adapter->netdev->name);
2891
bc7f75fa
AK
2892 /*
2893 * TODO: for power management, we could drop the link and
2894 * pci_disable_device here.
2895 */
2896}
2897
2898void e1000e_reinit_locked(struct e1000_adapter *adapter)
2899{
2900 might_sleep();
2901 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2902 msleep(1);
2903 e1000e_down(adapter);
2904 e1000e_up(adapter);
2905 clear_bit(__E1000_RESETTING, &adapter->state);
2906}
2907
2908/**
2909 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2910 * @adapter: board private structure to initialize
2911 *
2912 * e1000_sw_init initializes the Adapter private data structure.
2913 * Fields are initialized based on PCI device information and
2914 * OS network device settings (MTU size).
2915 **/
2916static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2917{
bc7f75fa
AK
2918 struct net_device *netdev = adapter->netdev;
2919
2920 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2921 adapter->rx_ps_bsize0 = 128;
318a94d6
JK
2922 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2923 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2924
4662e82b 2925 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2926
4662e82b
BA
2927 if (e1000_alloc_queues(adapter))
2928 return -ENOMEM;
bc7f75fa 2929
bc7f75fa 2930 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK
2931 e1000_irq_disable(adapter);
2932
bc7f75fa
AK
2933 set_bit(__E1000_DOWN, &adapter->state);
2934 return 0;
bc7f75fa
AK
2935}
2936
f8d59f78
BA
2937/**
2938 * e1000_intr_msi_test - Interrupt Handler
2939 * @irq: interrupt number
2940 * @data: pointer to a network interface device structure
2941 **/
2942static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2943{
2944 struct net_device *netdev = data;
2945 struct e1000_adapter *adapter = netdev_priv(netdev);
2946 struct e1000_hw *hw = &adapter->hw;
2947 u32 icr = er32(ICR);
2948
3bb99fe2 2949 e_dbg("icr is %08X\n", icr);
f8d59f78
BA
2950 if (icr & E1000_ICR_RXSEQ) {
2951 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2952 wmb();
2953 }
2954
2955 return IRQ_HANDLED;
2956}
2957
2958/**
2959 * e1000_test_msi_interrupt - Returns 0 for successful test
2960 * @adapter: board private struct
2961 *
2962 * code flow taken from tg3.c
2963 **/
2964static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2965{
2966 struct net_device *netdev = adapter->netdev;
2967 struct e1000_hw *hw = &adapter->hw;
2968 int err;
2969
2970 /* poll_enable hasn't been called yet, so don't need disable */
2971 /* clear any pending events */
2972 er32(ICR);
2973
2974 /* free the real vector and request a test handler */
2975 e1000_free_irq(adapter);
4662e82b 2976 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA
2977
2978 /* Assume that the test fails, if it succeeds then the test
2979 * MSI irq handler will unset this flag */
2980 adapter->flags |= FLAG_MSI_TEST_FAILED;
2981
2982 err = pci_enable_msi(adapter->pdev);
2983 if (err)
2984 goto msi_test_failed;
2985
a0607fd3 2986 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA
2987 netdev->name, netdev);
2988 if (err) {
2989 pci_disable_msi(adapter->pdev);
2990 goto msi_test_failed;
2991 }
2992
2993 wmb();
2994
2995 e1000_irq_enable(adapter);
2996
2997 /* fire an unusual interrupt on the test handler */
2998 ew32(ICS, E1000_ICS_RXSEQ);
2999 e1e_flush();
3000 msleep(50);
3001
3002 e1000_irq_disable(adapter);
3003
3004 rmb();
3005
3006 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3007 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA
3008 err = -EIO;
3009 e_info("MSI interrupt test failed!\n");
3010 }
3011
3012 free_irq(adapter->pdev->irq, netdev);
3013 pci_disable_msi(adapter->pdev);
3014
3015 if (err == -EIO)
3016 goto msi_test_failed;
3017
3018 /* okay so the test worked, restore settings */
3bb99fe2 3019 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3020msi_test_failed:
4662e82b 3021 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA
3022 e1000_request_irq(adapter);
3023 return err;
3024}
3025
3026/**
3027 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3028 * @adapter: board private struct
3029 *
3030 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3031 **/
3032static int e1000_test_msi(struct e1000_adapter *adapter)
3033{
3034 int err;
3035 u16 pci_cmd;
3036
3037 if (!(adapter->flags & FLAG_MSI_ENABLED))
3038 return 0;
3039
3040 /* disable SERR in case the MSI write causes a master abort */
3041 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3042 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3043 pci_cmd & ~PCI_COMMAND_SERR);
3044
3045 err = e1000_test_msi_interrupt(adapter);
3046
3047 /* restore previous setting of command word */
3048 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3049
3050 /* success ! */
3051 if (!err)
3052 return 0;
3053
3054 /* EIO means MSI test failed */
3055 if (err != -EIO)
3056 return err;
3057
3058 /* back to INTx mode */
3059 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3060
3061 e1000_free_irq(adapter);
3062
3063 err = e1000_request_irq(adapter);
3064
3065 return err;
3066}
3067
bc7f75fa
AK
3068/**
3069 * e1000_open - Called when a network interface is made active
3070 * @netdev: network interface device structure
3071 *
3072 * Returns 0 on success, negative value on failure
3073 *
3074 * The open entry point is called when a network interface is made
3075 * active by the system (IFF_UP). At this point all resources needed
3076 * for transmit and receive operations are allocated, the interrupt
3077 * handler is registered with the OS, the watchdog timer is started,
3078 * and the stack is notified that the interface is ready.
3079 **/
3080static int e1000_open(struct net_device *netdev)
3081{
3082 struct e1000_adapter *adapter = netdev_priv(netdev);
3083 struct e1000_hw *hw = &adapter->hw;
3084 int err;
3085
3086 /* disallow open during test */
3087 if (test_bit(__E1000_TESTING, &adapter->state))
3088 return -EBUSY;
3089
9c563d20
JB
3090 netif_carrier_off(netdev);
3091
bc7f75fa
AK
3092 /* allocate transmit descriptors */
3093 err = e1000e_setup_tx_resources(adapter);
3094 if (err)
3095 goto err_setup_tx;
3096
3097 /* allocate receive descriptors */
3098 err = e1000e_setup_rx_resources(adapter);
3099 if (err)
3100 goto err_setup_rx;
3101
3102 e1000e_power_up_phy(adapter);
3103
3104 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3105 if ((adapter->hw.mng_cookie.status &
3106 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3107 e1000_update_mng_vlan(adapter);
3108
ad68076e
BA
3109 /*
3110 * If AMT is enabled, let the firmware know that the network
3111 * interface is now open
3112 */
c43bc57e 3113 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
3114 e1000_get_hw_control(adapter);
3115
ad68076e
BA
3116 /*
3117 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK
3118 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3119 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA
3120 * clean_rx handler before we do so.
3121 */
bc7f75fa
AK
3122 e1000_configure(adapter);
3123
3124 err = e1000_request_irq(adapter);
3125 if (err)
3126 goto err_req_irq;
3127
f8d59f78
BA
3128 /*
3129 * Work around PCIe errata with MSI interrupts causing some chipsets to
3130 * ignore e1000e MSI messages, which means we need to test our MSI
3131 * interrupt now
3132 */
4662e82b 3133 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA
3134 err = e1000_test_msi(adapter);
3135 if (err) {
3136 e_err("Interrupt allocation failed\n");
3137 goto err_req_irq;
3138 }
3139 }
3140
bc7f75fa
AK
3141 /* From here on the code is the same as e1000e_up() */
3142 clear_bit(__E1000_DOWN, &adapter->state);
3143
3144 napi_enable(&adapter->napi);
3145
3146 e1000_irq_enable(adapter);
3147
4cb9be7a 3148 netif_start_queue(netdev);
d55b53ff 3149
bc7f75fa
AK
3150 /* fire a link status change interrupt to start the watchdog */
3151 ew32(ICS, E1000_ICS_LSC);
3152
3153 return 0;
3154
3155err_req_irq:
3156 e1000_release_hw_control(adapter);
3157 e1000_power_down_phy(adapter);
3158 e1000e_free_rx_resources(adapter);
3159err_setup_rx:
3160 e1000e_free_tx_resources(adapter);
3161err_setup_tx:
3162 e1000e_reset(adapter);
3163
3164 return err;
3165}
3166
3167/**
3168 * e1000_close - Disables a network interface
3169 * @netdev: network interface device structure
3170 *
3171 * Returns 0, this is not allowed to fail
3172 *
3173 * The close entry point is called when an interface is de-activated
3174 * by the OS. The hardware is still under the drivers control, but
3175 * needs to be disabled. A global MAC reset is issued to stop the
3176 * hardware, and all transmit and receive resources are freed.
3177 **/
3178static int e1000_close(struct net_device *netdev)
3179{
3180 struct e1000_adapter *adapter = netdev_priv(netdev);
3181
3182 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3183 e1000e_down(adapter);
3184 e1000_power_down_phy(adapter);
3185 e1000_free_irq(adapter);
3186
3187 e1000e_free_tx_resources(adapter);
3188 e1000e_free_rx_resources(adapter);
3189
ad68076e
BA
3190 /*
3191 * kill manageability vlan ID if supported, but not if a vlan with
3192 * the same ID is registered on the host OS (let 8021q kill it)
3193 */
bc7f75fa
AK
3194 if ((adapter->hw.mng_cookie.status &
3195 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3196 !(adapter->vlgrp &&
3197 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3198 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3199
ad68076e
BA
3200 /*
3201 * If AMT is enabled, let the firmware know that the network
3202 * interface is now closed
3203 */
c43bc57e 3204 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
3205 e1000_release_hw_control(adapter);
3206
3207 return 0;
3208}
3209/**
3210 * e1000_set_mac - Change the Ethernet Address of the NIC
3211 * @netdev: network interface device structure
3212 * @p: pointer to an address structure
3213 *
3214 * Returns 0 on success, negative on failure
3215 **/
3216static int e1000_set_mac(struct net_device *netdev, void *p)
3217{
3218 struct e1000_adapter *adapter = netdev_priv(netdev);
3219 struct sockaddr *addr = p;
3220
3221 if (!is_valid_ether_addr(addr->sa_data))
3222 return -EADDRNOTAVAIL;
3223
3224 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3225 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3226
3227 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3228
3229 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3230 /* activate the work around */
3231 e1000e_set_laa_state_82571(&adapter->hw, 1);
3232
ad68076e
BA
3233 /*
3234 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK
3235 * between the time RAR[0] gets clobbered and the time it
3236 * gets fixed (in e1000_watchdog), the actual LAA is in one
3237 * of the RARs and no incoming packets directed to this port
3238 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA
3239 * RAR[14]
3240 */
bc7f75fa
AK
3241 e1000e_rar_set(&adapter->hw,
3242 adapter->hw.mac.addr,
3243 adapter->hw.mac.rar_entry_count - 1);
3244 }
3245
3246 return 0;
3247}
3248
a8f88ff5
JB
3249/**
3250 * e1000e_update_phy_task - work thread to update phy
3251 * @work: pointer to our work struct
3252 *
3253 * this worker thread exists because we must acquire a
3254 * semaphore to read the phy, which we could msleep while
3255 * waiting for it, and we can't msleep in a timer.
3256 **/
3257static void e1000e_update_phy_task(struct work_struct *work)
3258{
3259 struct e1000_adapter *adapter = container_of(work,
3260 struct e1000_adapter, update_phy_task);
3261 e1000_get_phy_info(&adapter->hw);
3262}
3263
ad68076e
BA
3264/*
3265 * Need to wait a few seconds after link up to get diagnostic information from
3266 * the phy
3267 */
bc7f75fa
AK
3268static void e1000_update_phy_info(unsigned long data)
3269{
3270 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3271 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK
3272}
3273
3274/**
3275 * e1000e_update_stats - Update the board statistics counters
3276 * @adapter: board private structure
3277 **/
3278void e1000e_update_stats(struct e1000_adapter *adapter)
3279{
7274c20f 3280 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK
3281 struct e1000_hw *hw = &adapter->hw;
3282 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3283 u16 phy_data;
bc7f75fa
AK
3284
3285 /*
3286 * Prevent stats update while adapter is being reset, or if the pci
3287 * connection is down.
3288 */
3289 if (adapter->link_speed == 0)
3290 return;
3291 if (pci_channel_offline(pdev))
3292 return;
3293
bc7f75fa
AK
3294 adapter->stats.crcerrs += er32(CRCERRS);
3295 adapter->stats.gprc += er32(GPRC);
7c25769f
BA
3296 adapter->stats.gorc += er32(GORCL);
3297 er32(GORCH); /* Clear gorc */
bc7f75fa
AK
3298 adapter->stats.bprc += er32(BPRC);
3299 adapter->stats.mprc += er32(MPRC);
3300 adapter->stats.roc += er32(ROC);
3301
bc7f75fa 3302 adapter->stats.mpc += er32(MPC);
a4f58f54
BA
3303 if ((hw->phy.type == e1000_phy_82578) ||
3304 (hw->phy.type == e1000_phy_82577)) {
3305 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
29477e24
BA
3306 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3307 adapter->stats.scc += phy_data;
a4f58f54
BA
3308
3309 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
29477e24
BA
3310 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3311 adapter->stats.ecol += phy_data;
a4f58f54
BA
3312
3313 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
29477e24
BA
3314 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3315 adapter->stats.mcc += phy_data;
a4f58f54
BA
3316
3317 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
29477e24
BA
3318 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3319 adapter->stats.latecol += phy_data;
a4f58f54
BA
3320
3321 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
29477e24
BA
3322 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3323 adapter->stats.dc += phy_data;
a4f58f54
BA
3324 } else {
3325 adapter->stats.scc += er32(SCC);
3326 adapter->stats.ecol += er32(ECOL);
3327 adapter->stats.mcc += er32(MCC);
3328 adapter->stats.latecol += er32(LATECOL);
3329 adapter->stats.dc += er32(DC);
3330 }
bc7f75fa
AK
3331 adapter->stats.xonrxc += er32(XONRXC);
3332 adapter->stats.xontxc += er32(XONTXC);
3333 adapter->stats.xoffrxc += er32(XOFFRXC);
3334 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3335 adapter->stats.gptc += er32(GPTC);
7c25769f
BA
3336 adapter->stats.gotc += er32(GOTCL);
3337 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK
3338 adapter->stats.rnbc += er32(RNBC);
3339 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK
3340
3341 adapter->stats.mptc += er32(MPTC);
3342 adapter->stats.bptc += er32(BPTC);
3343
3344 /* used for adaptive IFS */
3345
3346 hw->mac.tx_packet_delta = er32(TPT);
3347 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA
3348 if ((hw->phy.type == e1000_phy_82578) ||
3349 (hw->phy.type == e1000_phy_82577)) {
3350 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
29477e24
BA
3351 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3352 hw->mac.collision_delta = phy_data;
a4f58f54
BA
3353 } else {
3354 hw->mac.collision_delta = er32(COLC);
3355 }
bc7f75fa
AK
3356 adapter->stats.colc += hw->mac.collision_delta;
3357
3358 adapter->stats.algnerrc += er32(ALGNERRC);
3359 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA
3360 if ((hw->phy.type == e1000_phy_82578) ||
3361 (hw->phy.type == e1000_phy_82577)) {
3362 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
29477e24
BA
3363 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3364 adapter->stats.tncrs += phy_data;
a4f58f54
BA
3365 } else {
3366 if ((hw->mac.type != e1000_82574) &&
3367 (hw->mac.type != e1000_82583))
3368 adapter->stats.tncrs += er32(TNCRS);
3369 }
bc7f75fa
AK
3370 adapter->stats.cexterr += er32(CEXTERR);
3371 adapter->stats.tsctc += er32(TSCTC);
3372 adapter->stats.tsctfc += er32(TSCTFC);
3373
bc7f75fa 3374 /* Fill out the OS statistics structure */
7274c20f
AK
3375 netdev->stats.multicast = adapter->stats.mprc;
3376 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK
3377
3378 /* Rx Errors */
3379
ad68076e
BA
3380 /*
3381 * RLEC on some newer hardware can be incorrect so build
3382 * our own version based on RUC and ROC
3383 */
7274c20f 3384 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK
3385 adapter->stats.crcerrs + adapter->stats.algnerrc +
3386 adapter->stats.ruc + adapter->stats.roc +
3387 adapter->stats.cexterr;
7274c20f 3388 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3389 adapter->stats.roc;
7274c20f
AK
3390 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3391 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3392 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK
3393
3394 /* Tx Errors */
7274c20f 3395 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3396 adapter->stats.latecol;
7274c20f
AK
3397 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3398 netdev->stats.tx_window_errors = adapter->stats.latecol;
3399 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK
3400
3401 /* Tx Dropped needs to be maintained elsewhere */
3402
bc7f75fa
AK
3403 /* Management Stats */
3404 adapter->stats.mgptc += er32(MGTPTC);
3405 adapter->stats.mgprc += er32(MGTPRC);
3406 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK
3407}
3408
7c25769f
BA
3409/**
3410 * e1000_phy_read_status - Update the PHY register status snapshot
3411 * @adapter: board private structure
3412 **/
3413static void e1000_phy_read_status(struct e1000_adapter *adapter)
3414{
3415 struct e1000_hw *hw = &adapter->hw;
3416 struct e1000_phy_regs *phy = &adapter->phy_regs;
3417 int ret_val;
7c25769f
BA
3418
3419 if ((er32(STATUS) & E1000_STATUS_LU) &&
3420 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3421 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3422 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3423 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3424 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3425 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3426 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3427 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3428 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3429 if (ret_val)
44defeb3 3430 e_warn("Error reading PHY register\n");
7c25769f
BA
3431 } else {
3432 /*
3433 * Do not read PHY registers if link is not up
3434 * Set values to typical power-on defaults
3435 */
3436 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3437 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3438 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3439 BMSR_ERCAP);
3440 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3441 ADVERTISE_ALL | ADVERTISE_CSMA);
3442 phy->lpa = 0;
3443 phy->expansion = EXPANSION_ENABLENPAGE;
3444 phy->ctrl1000 = ADVERTISE_1000FULL;
3445 phy->stat1000 = 0;
3446 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3447 }
7c25769f
BA
3448}
3449
bc7f75fa
AK
3450static void e1000_print_link_info(struct e1000_adapter *adapter)
3451{
bc7f75fa
AK
3452 struct e1000_hw *hw = &adapter->hw;
3453 u32 ctrl = er32(CTRL);
3454
8f12fe86
BA
3455 /* Link status message must follow this format for user tools */
3456 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3457 "Flow Control: %s\n",
3458 adapter->netdev->name,
44defeb3
JK
3459 adapter->link_speed,
3460 (adapter->link_duplex == FULL_DUPLEX) ?
3461 "Full Duplex" : "Half Duplex",
3462 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3463 "RX/TX" :
3464 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3465 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK
3466}
3467
b405e8df 3468bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK
3469{
3470 struct e1000_hw *hw = &adapter->hw;
3471 bool link_active = 0;
3472 s32 ret_val = 0;
3473
3474 /*
3475 * get_link_status is set on LSC (link status) interrupt or
3476 * Rx sequence error interrupt. get_link_status will stay
3477 * false until the check_for_link establishes link
3478 * for copper adapters ONLY
3479 */
3480 switch (hw->phy.media_type) {
3481 case e1000_media_type_copper:
3482 if (hw->mac.get_link_status) {
3483 ret_val = hw->mac.ops.check_for_link(hw);
3484 link_active = !hw->mac.get_link_status;
3485 } else {
3486 link_active = 1;
3487 }
3488 break;
3489 case e1000_media_type_fiber:
3490 ret_val = hw->mac.ops.check_for_link(hw);
3491 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3492 break;
3493 case e1000_media_type_internal_serdes:
3494 ret_val = hw->mac.ops.check_for_link(hw);
3495 link_active = adapter->hw.mac.serdes_has_link;
3496 break;
3497 default:
3498 case e1000_media_type_unknown:
3499 break;
3500 }
3501
3502 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3503 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3504 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3505 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK
3506 }
3507
3508 return link_active;
3509}
3510
3511static void e1000e_enable_receives(struct e1000_adapter *adapter)
3512{
3513 /* make sure the receive unit is started */
3514 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3515 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3516 struct e1000_hw *hw = &adapter->hw;
3517 u32 rctl = er32(RCTL);
3518 ew32(RCTL, rctl | E1000_RCTL_EN);
3519 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3520 }
3521}
3522
bc7f75fa
AK
3523/**
3524 * e1000_watchdog - Timer Call-back
3525 * @data: pointer to adapter cast into an unsigned long
3526 **/
3527static void e1000_watchdog(unsigned long data)
3528{
3529 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3530
3531 /* Do the rest outside of interrupt context */
3532 schedule_work(&adapter->watchdog_task);
3533
3534 /* TODO: make this use queue_delayed_work() */
3535}
3536
3537static void e1000_watchdog_task(struct work_struct *work)
3538{
3539 struct e1000_adapter *adapter = container_of(work,
3540 struct e1000_adapter, watchdog_task);
bc7f75fa
AK
3541 struct net_device *netdev = adapter->netdev;
3542 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3543 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK
3544 struct e1000_ring *tx_ring = adapter->tx_ring;
3545 struct e1000_hw *hw = &adapter->hw;
3546 u32 link, tctl;
bc7f75fa
AK
3547 int tx_pending = 0;
3548
b405e8df 3549 link = e1000e_has_link(adapter);
318a94d6
JK
3550 if ((netif_carrier_ok(netdev)) && link) {
3551 e1000e_enable_receives(adapter);
bc7f75fa 3552 goto link_up;
bc7f75fa
AK
3553 }
3554
3555 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3556 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3557 e1000_update_mng_vlan(adapter);
3558
bc7f75fa
AK
3559 if (link) {
3560 if (!netif_carrier_ok(netdev)) {
3561 bool txb2b = 1;
318a94d6 3562 /* update snapshot of PHY registers on LSC */
7c25769f 3563 e1000_phy_read_status(adapter);
bc7f75fa
AK
3564 mac->ops.get_link_up_info(&adapter->hw,
3565 &adapter->link_speed,
3566 &adapter->link_duplex);
3567 e1000_print_link_info(adapter);
f4187b56
BA
3568 /*
3569 * On supported PHYs, check for duplex mismatch only
3570 * if link has autonegotiated at 10/100 half
3571 */
3572 if ((hw->phy.type == e1000_phy_igp_3 ||
3573 hw->phy.type == e1000_phy_bm) &&
3574 (hw->mac.autoneg == true) &&
3575 (adapter->link_speed == SPEED_10 ||
3576 adapter->link_speed == SPEED_100) &&
3577 (adapter->link_duplex == HALF_DUPLEX)) {
3578 u16 autoneg_exp;
3579
3580 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3581
3582 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3583 e_info("Autonegotiated half duplex but"
3584 " link partner cannot autoneg. "
3585 " Try forcing full duplex if "
3586 "link gets many collisions.\n");
3587 }
3588
f49c57e1 3589 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK
3590 adapter->tx_timeout_factor = 1;
3591 switch (adapter->link_speed) {
3592 case SPEED_10:
3593 txb2b = 0;
10f1b492 3594 adapter->tx_timeout_factor = 16;
bc7f75fa
AK
3595 break;
3596 case SPEED_100:
3597 txb2b = 0;
4c86e0b9 3598 adapter->tx_timeout_factor = 10;
bc7f75fa
AK
3599 break;
3600 }
3601
ad68076e
BA
3602 /*
3603 * workaround: re-program speed mode bit after
3604 * link-up event
3605 */
bc7f75fa
AK
3606 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3607 !txb2b) {
3608 u32 tarc0;
e9ec2c0f 3609 tarc0 = er32(TARC(0));
bc7f75fa 3610 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3611 ew32(TARC(0), tarc0);
bc7f75fa
AK
3612 }
3613
ad68076e
BA
3614 /*
3615 * disable TSO for pcie and 10/100 speeds, to avoid
3616 * some hardware issues
3617 */
bc7f75fa
AK
3618 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3619 switch (adapter->link_speed) {
3620 case SPEED_10:
3621 case SPEED_100:
44defeb3 3622 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK
3623 netdev->features &= ~NETIF_F_TSO;
3624 netdev->features &= ~NETIF_F_TSO6;
3625 break;
3626 case SPEED_1000:
3627 netdev->features |= NETIF_F_TSO;
3628 netdev->features |= NETIF_F_TSO6;
3629 break;
3630 default:
3631 /* oops */
3632 break;
3633 }
3634 }
3635
ad68076e
BA
3636 /*
3637 * enable transmits in the hardware, need to do this
3638 * after setting TARC(0)
3639 */
bc7f75fa
AK
3640 tctl = er32(TCTL);
3641 tctl |= E1000_TCTL_EN;
3642 ew32(TCTL, tctl);
3643
75eb0fad
BA
3644 /*
3645 * Perform any post-link-up configuration before
3646 * reporting link up.
3647 */
3648 if (phy->ops.cfg_on_link_up)
3649 phy->ops.cfg_on_link_up(hw);
3650
bc7f75fa 3651 netif_carrier_on(netdev);
bc7f75fa
AK
3652
3653 if (!test_bit(__E1000_DOWN, &adapter->state))
3654 mod_timer(&adapter->phy_info_timer,
3655 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK
3656 }
3657 } else {
3658 if (netif_carrier_ok(netdev)) {
3659 adapter->link_speed = 0;
3660 adapter->link_duplex = 0;
8f12fe86
BA
3661 /* Link status message must follow this format */
3662 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3663 adapter->netdev->name);
bc7f75fa 3664 netif_carrier_off(netdev);
bc7f75fa
AK
3665 if (!test_bit(__E1000_DOWN, &adapter->state))
3666 mod_timer(&adapter->phy_info_timer,
3667 round_jiffies(jiffies + 2 * HZ));
3668
3669 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3670 schedule_work(&adapter->reset_task);
3671 }
3672 }
3673
3674link_up:
3675 e1000e_update_stats(adapter);
3676
3677 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3678 adapter->tpt_old = adapter->stats.tpt;
3679 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3680 adapter->colc_old = adapter->stats.colc;
3681
7c25769f
BA
3682 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3683 adapter->gorc_old = adapter->stats.gorc;
3684 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3685 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK
3686
3687 e1000e_update_adaptive(&adapter->hw);
3688
3689 if (!netif_carrier_ok(netdev)) {
3690 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3691 tx_ring->count);
3692 if (tx_pending) {
ad68076e
BA
3693 /*
3694 * We've lost link, so the controller stops DMA,
bc7f75fa
AK
3695 * but we've got queued Tx work that's never going
3696 * to get done, so reset controller to flush Tx.
ad68076e
BA
3697 * (Do the reset outside of interrupt context).
3698 */
bc7f75fa
AK
3699 adapter->tx_timeout_count++;
3700 schedule_work(&adapter->reset_task);
c2d5ab49
JB
3701 /* return immediately since reset is imminent */
3702 return;
bc7f75fa
AK
3703 }
3704 }
3705
ad68076e 3706 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA
3707 if (adapter->msix_entries)
3708 ew32(ICS, adapter->rx_ring->ims_val);
3709 else
3710 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK
3711
3712 /* Force detection of hung controller every watchdog period */
3713 adapter->detect_tx_hung = 1;
3714
ad68076e
BA
3715 /*
3716 * With 82571 controllers, LAA may be overwritten due to controller
3717 * reset from the other port. Set the appropriate LAA in RAR[0]
3718 */
bc7f75fa
AK
3719 if (e1000e_get_laa_state_82571(hw))
3720 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3721
3722 /* Reset the timer */
3723 if (!test_bit(__E1000_DOWN, &adapter->state))
3724 mod_timer(&adapter->watchdog_timer,
3725 round_jiffies(jiffies + 2 * HZ));
3726}
3727
3728#define E1000_TX_FLAGS_CSUM 0x00000001
3729#define E1000_TX_FLAGS_VLAN 0x00000002
3730#define E1000_TX_FLAGS_TSO 0x00000004
3731#define E1000_TX_FLAGS_IPV4 0x00000008
3732#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3733#define E1000_TX_FLAGS_VLAN_SHIFT 16
3734
3735static int e1000_tso(struct e1000_adapter *adapter,
3736 struct sk_buff *skb)
3737{
3738 struct e1000_ring *tx_ring = adapter->tx_ring;
3739 struct e1000_context_desc *context_desc;
3740 struct e1000_buffer *buffer_info;
3741 unsigned int i;
3742 u32 cmd_length = 0;
3743 u16 ipcse = 0, tucse, mss;
3744 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3745 int err;
3746
3d5e33c9
BA
3747 if (!skb_is_gso(skb))
3748 return 0;
bc7f75fa 3749
3d5e33c9
BA
3750 if (skb_header_cloned(skb)) {
3751 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3752 if (err)
3753 return err;
bc7f75fa
AK
3754 }
3755
3d5e33c9
BA
3756 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3757 mss = skb_shinfo(skb)->gso_size;
3758 if (skb->protocol == htons(ETH_P_IP)) {
3759 struct iphdr *iph = ip_hdr(skb);
3760 iph->tot_len = 0;
3761 iph->check = 0;
3762 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
3763 0, IPPROTO_TCP, 0);
3764 cmd_length = E1000_TXD_CMD_IP;
3765 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 3766 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA
3767 ipv6_hdr(skb)->payload_len = 0;
3768 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3769 &ipv6_hdr(skb)->daddr,
3770 0, IPPROTO_TCP, 0);
3771 ipcse = 0;
3772 }
3773 ipcss = skb_network_offset(skb);
3774 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3775 tucss = skb_transport_offset(skb);
3776 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3777 tucse = 0;
3778
3779 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3780 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3781
3782 i = tx_ring->next_to_use;
3783 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3784 buffer_info = &tx_ring->buffer_info[i];
3785
3786 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3787 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3788 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3789 context_desc->upper_setup.tcp_fields.tucss = tucss;
3790 context_desc->upper_setup.tcp_fields.tucso = tucso;
3791 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3792 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3793 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3794 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3795
3796 buffer_info->time_stamp = jiffies;
3797 buffer_info->next_to_watch = i;
3798
3799 i++;
3800 if (i == tx_ring->count)
3801 i = 0;
3802 tx_ring->next_to_use = i;
3803
3804 return 1;
bc7f75fa
AK
3805}
3806
3807static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3808{
3809 struct e1000_ring *tx_ring = adapter->tx_ring;
3810 struct e1000_context_desc *context_desc;
3811 struct e1000_buffer *buffer_info;
3812 unsigned int i;
3813 u8 css;
af807c82 3814 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3815 __be16 protocol;
bc7f75fa 3816
af807c82
DG
3817 if (skb->ip_summed != CHECKSUM_PARTIAL)
3818 return 0;
bc7f75fa 3819
5f66f208
AJ
3820 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3821 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3822 else
3823 protocol = skb->protocol;
3824
3f518390 3825 switch (protocol) {
09640e63 3826 case cpu_to_be16(ETH_P_IP):
af807c82
DG
3827 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3828 cmd_len |= E1000_TXD_CMD_TCP;
3829 break;
09640e63 3830 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG
3831 /* XXX not handling all IPV6 headers */
3832 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3833 cmd_len |= E1000_TXD_CMD_TCP;
3834 break;
3835 default:
3836 if (unlikely(net_ratelimit()))
5f66f208
AJ
3837 e_warn("checksum_partial proto=%x!\n",
3838 be16_to_cpu(protocol));
af807c82 3839 break;
bc7f75fa
AK
3840 }
3841
af807c82
DG
3842 css = skb_transport_offset(skb);
3843
3844 i = tx_ring->next_to_use;
3845 buffer_info = &tx_ring->buffer_info[i];
3846 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3847
3848 context_desc->lower_setup.ip_config = 0;
3849 context_desc->upper_setup.tcp_fields.tucss = css;
3850 context_desc->upper_setup.tcp_fields.tucso =
3851 css + skb->csum_offset;
3852 context_desc->upper_setup.tcp_fields.tucse = 0;
3853 context_desc->tcp_seg_setup.data = 0;
3854 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3855
3856 buffer_info->time_stamp = jiffies;
3857 buffer_info->next_to_watch = i;
3858
3859 i++;
3860 if (i == tx_ring->count)
3861 i = 0;
3862 tx_ring->next_to_use = i;
3863
3864 return 1;
bc7f75fa
AK
3865}
3866
3867#define E1000_MAX_PER_TXD 8192
3868#define E1000_MAX_TXD_PWR 12
3869
3870static int e1000_tx_map(struct e1000_adapter *adapter,
3871 struct sk_buff *skb, unsigned int first,
3872 unsigned int max_per_txd, unsigned int nr_frags,
3873 unsigned int mss)
3874{
3875 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 3876 struct pci_dev *pdev = adapter->pdev;
1b7719c4 3877 struct e1000_buffer *buffer_info;
8ddc951c 3878 unsigned int len = skb_headlen(skb);
03b1320d 3879 unsigned int offset = 0, size, count = 0, i;
bc7f75fa
AK
3880 unsigned int f;
3881
3882 i = tx_ring->next_to_use;
3883
3884 while (len) {
1b7719c4 3885 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK
3886 size = min(len, max_per_txd);
3887
bc7f75fa 3888 buffer_info->length = size;
bc7f75fa 3889 buffer_info->time_stamp = jiffies;
bc7f75fa 3890 buffer_info->next_to_watch = i;
03b1320d
AD
3891 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
3892 size, PCI_DMA_TODEVICE);
3893 buffer_info->mapped_as_page = false;
3894 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3895 goto dma_error;
bc7f75fa
AK
3896
3897 len -= size;
3898 offset += size;
03b1320d 3899 count++;
1b7719c4
AD
3900
3901 if (len) {
3902 i++;
3903 if (i == tx_ring->count)
3904 i = 0;
3905 }
bc7f75fa
AK
3906 }
3907
3908 for (f = 0; f < nr_frags; f++) {
3909 struct skb_frag_struct *frag;
3910
3911 frag = &skb_shinfo(skb)->frags[f];
3912 len = frag->size;
03b1320d 3913 offset = frag->page_offset;
bc7f75fa
AK
3914
3915 while (len) {
1b7719c4
AD
3916 i++;
3917 if (i == tx_ring->count)
3918 i = 0;
3919
bc7f75fa
AK
3920 buffer_info = &tx_ring->buffer_info[i];
3921 size = min(len, max_per_txd);
bc7f75fa
AK
3922
3923 buffer_info->length = size;
3924 buffer_info->time_stamp = jiffies;
bc7f75fa 3925 buffer_info->next_to_watch = i;
03b1320d
AD
3926 buffer_info->dma = pci_map_page(pdev, frag->page,
3927 offset, size,
3928 PCI_DMA_TODEVICE);
3929 buffer_info->mapped_as_page = true;
3930 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3931 goto dma_error;
bc7f75fa
AK
3932
3933 len -= size;
3934 offset += size;
3935 count++;
bc7f75fa
AK
3936 }
3937 }
3938
bc7f75fa
AK
3939 tx_ring->buffer_info[i].skb = skb;
3940 tx_ring->buffer_info[first].next_to_watch = i;
3941
3942 return count;
03b1320d
AD
3943
3944dma_error:
3945 dev_err(&pdev->dev, "TX DMA map failed\n");
3946 buffer_info->dma = 0;
c1fa347f 3947 if (count)
03b1320d 3948 count--;
c1fa347f
RK
3949
3950 while (count--) {
3951 if (i==0)
03b1320d 3952 i += tx_ring->count;
c1fa347f 3953 i--;
03b1320d
AD
3954 buffer_info = &tx_ring->buffer_info[i];
3955 e1000_put_txbuf(adapter, buffer_info);;
3956 }
3957
3958 return 0;
bc7f75fa
AK
3959}
3960
3961static void e1000_tx_queue(struct e1000_adapter *adapter,
3962 int tx_flags, int count)
3963{
3964 struct e1000_ring *tx_ring = adapter->tx_ring;
3965 struct e1000_tx_desc *tx_desc = NULL;
3966 struct e1000_buffer *buffer_info;
3967 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3968 unsigned int i;
3969
3970 if (tx_flags & E1000_TX_FLAGS_TSO) {
3971 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3972 E1000_TXD_CMD_TSE;
3973 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3974
3975 if (tx_flags & E1000_TX_FLAGS_IPV4)
3976 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3977 }
3978
3979 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3980 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3981 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3982 }
3983
3984 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3985 txd_lower |= E1000_TXD_CMD_VLE;
3986 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3987 }
3988
3989 i = tx_ring->next_to_use;
3990
3991 while (count--) {
3992 buffer_info = &tx_ring->buffer_info[i];
3993 tx_desc = E1000_TX_DESC(*tx_ring, i);
3994 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3995 tx_desc->lower.data =
3996 cpu_to_le32(txd_lower | buffer_info->length);
3997 tx_desc->upper.data = cpu_to_le32(txd_upper);
3998
3999 i++;
4000 if (i == tx_ring->count)
4001 i = 0;
4002 }
4003
4004 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4005
ad68076e
BA
4006 /*
4007 * Force memory writes to complete before letting h/w
bc7f75fa
AK
4008 * know there are new descriptors to fetch. (Only
4009 * applicable for weak-ordered memory model archs,
ad68076e
BA
4010 * such as IA-64).
4011 */
bc7f75fa
AK
4012 wmb();
4013
4014 tx_ring->next_to_use = i;
4015 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA
4016 /*
4017 * we need this if more than one processor can write to our tail
4018 * at a time, it synchronizes IO on IA64/Altix systems
4019 */
bc7f75fa
AK
4020 mmiowb();
4021}
4022
4023#define MINIMUM_DHCP_PACKET_SIZE 282
4024static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4025 struct sk_buff *skb)
4026{
4027 struct e1000_hw *hw = &adapter->hw;
4028 u16 length, offset;
4029
4030 if (vlan_tx_tag_present(skb)) {
8e95a202
JP
4031 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4032 (adapter->hw.mng_cookie.status &
bc7f75fa
AK
4033 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4034 return 0;
4035 }
4036
4037 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4038 return 0;
4039
4040 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4041 return 0;
4042
4043 {
4044 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4045 struct udphdr *udp;
4046
4047 if (ip->protocol != IPPROTO_UDP)
4048 return 0;
4049
4050 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4051 if (ntohs(udp->dest) != 67)
4052 return 0;
4053
4054 offset = (u8 *)udp + 8 - skb->data;
4055 length = skb->len - offset;
4056 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4057 }
4058
4059 return 0;
4060}
4061
4062static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4063{
4064 struct e1000_adapter *adapter = netdev_priv(netdev);
4065
4066 netif_stop_queue(netdev);
ad68076e
BA
4067 /*
4068 * Herbert's original patch had:
bc7f75fa 4069 * smp_mb__after_netif_stop_queue();
ad68076e
BA
4070 * but since that doesn't exist yet, just open code it.
4071 */
bc7f75fa
AK
4072 smp_mb();
4073
ad68076e
BA
4074 /*
4075 * We need to check again in a case another CPU has just
4076 * made room available.
4077 */
bc7f75fa
AK
4078 if (e1000_desc_unused(adapter->tx_ring) < size)
4079 return -EBUSY;
4080
4081 /* A reprieve! */
4082 netif_start_queue(netdev);
4083 ++adapter->restart_queue;
4084 return 0;
4085}
4086
4087static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4088{
4089 struct e1000_adapter *adapter = netdev_priv(netdev);
4090
4091 if (e1000_desc_unused(adapter->tx_ring) >= size)
4092 return 0;
4093 return __e1000_maybe_stop_tx(netdev, size);
4094}
4095
4096#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH
4097static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4098 struct net_device *netdev)
bc7f75fa
AK
4099{
4100 struct e1000_adapter *adapter = netdev_priv(netdev);
4101 struct e1000_ring *tx_ring = adapter->tx_ring;
4102 unsigned int first;
4103 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4104 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4105 unsigned int tx_flags = 0;
4e6c709c 4106 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK
4107 unsigned int nr_frags;
4108 unsigned int mss;
bc7f75fa
AK
4109 int count = 0;
4110 int tso;
4111 unsigned int f;
bc7f75fa
AK
4112
4113 if (test_bit(__E1000_DOWN, &adapter->state)) {
4114 dev_kfree_skb_any(skb);
4115 return NETDEV_TX_OK;
4116 }
4117
4118 if (skb->len <= 0) {
4119 dev_kfree_skb_any(skb);
4120 return NETDEV_TX_OK;
4121 }
4122
4123 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA
4124 /*
4125 * The controller does a simple calculation to
bc7f75fa
AK
4126 * make sure there is enough room in the FIFO before
4127 * initiating the DMA for each buffer. The calc is:
4128 * 4 = ceil(buffer len/mss). To make sure we don't
4129 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA
4130 * drops.
4131 */
bc7f75fa
AK
4132 if (mss) {
4133 u8 hdr_len;
4134 max_per_txd = min(mss << 2, max_per_txd);
4135 max_txd_pwr = fls(max_per_txd) - 1;
4136
ad68076e
BA
4137 /*
4138 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4139 * points to just header, pull a few bytes of payload from
4140 * frags into skb->data
4141 */
bc7f75fa 4142 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA
4143 /*
4144 * we do this workaround for ES2LAN, but it is un-necessary,
4145 * avoiding it could save a lot of cycles
4146 */
4e6c709c 4147 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK
4148 unsigned int pull_size;
4149
4150 pull_size = min((unsigned int)4, skb->data_len);
4151 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4152 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK
4153 dev_kfree_skb_any(skb);
4154 return NETDEV_TX_OK;
4155 }
4156 len = skb->len - skb->data_len;
4157 }
4158 }
4159
4160 /* reserve a descriptor for the offload context */
4161 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4162 count++;
4163 count++;
4164
4165 count += TXD_USE_COUNT(len, max_txd_pwr);
4166
4167 nr_frags = skb_shinfo(skb)->nr_frags;
4168 for (f = 0; f < nr_frags; f++)
4169 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4170 max_txd_pwr);
4171
4172 if (adapter->hw.mac.tx_pkt_filtering)
4173 e1000_transfer_dhcp_info(adapter, skb);
4174
ad68076e
BA
4175 /*
4176 * need: count + 2 desc gap to keep tail from touching
4177 * head, otherwise try next time
4178 */
92af3e95 4179 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4180 return NETDEV_TX_BUSY;
bc7f75fa
AK
4181
4182 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4183 tx_flags |= E1000_TX_FLAGS_VLAN;
4184 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4185 }
4186
4187 first = tx_ring->next_to_use;
4188
4189 tso = e1000_tso(adapter, skb);
4190 if (tso < 0) {
4191 dev_kfree_skb_any(skb);
bc7f75fa
AK
4192 return NETDEV_TX_OK;
4193 }
4194
4195 if (tso)
4196 tx_flags |= E1000_TX_FLAGS_TSO;
4197 else if (e1000_tx_csum(adapter, skb))
4198 tx_flags |= E1000_TX_FLAGS_CSUM;
4199
ad68076e
BA
4200 /*
4201 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4202 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA
4203 * no longer assume, we must.
4204 */
bc7f75fa
AK
4205 if (skb->protocol == htons(ETH_P_IP))
4206 tx_flags |= E1000_TX_FLAGS_IPV4;
4207
1b7719c4 4208 /* if count is 0 then mapping error has occured */
bc7f75fa 4209 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD
4210 if (count) {
4211 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD
4212 /* Make sure there is space in the ring for the next send. */
4213 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4214
4215 } else {
bc7f75fa 4216 dev_kfree_skb_any(skb);
1b7719c4
AD
4217 tx_ring->buffer_info[first].time_stamp = 0;
4218 tx_ring->next_to_use = first;
bc7f75fa
AK
4219 }
4220
bc7f75fa
AK
4221 return NETDEV_TX_OK;
4222}
4223
4224/**
4225 * e1000_tx_timeout - Respond to a Tx Hang
4226 * @netdev: network interface device structure
4227 **/
4228static void e1000_tx_timeout(struct net_device *netdev)
4229{
4230 struct e1000_adapter *adapter = netdev_priv(netdev);
4231
4232 /* Do the reset outside of interrupt context */
4233 adapter->tx_timeout_count++;
4234 schedule_work(&adapter->reset_task);
4235}
4236
4237static void e1000_reset_task(struct work_struct *work)
4238{
4239 struct e1000_adapter *adapter;
4240 adapter = container_of(work, struct e1000_adapter, reset_task);
4241
4242 e1000e_reinit_locked(adapter);
4243}
4244
4245/**
4246 * e1000_get_stats - Get System Network Statistics
4247 * @netdev: network interface device structure
4248 *
4249 * Returns the address of the device statistics structure.
4250 * The statistics are actually updated from the timer callback.
4251 **/
4252static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4253{
bc7f75fa 4254 /* only return the current stats */
7274c20f 4255 return &netdev->stats;
bc7f75fa
AK
4256}
4257
4258/**
4259 * e1000_change_mtu - Change the Maximum Transfer Unit
4260 * @netdev: network interface device structure
4261 * @new_mtu: new value for maximum frame size
4262 *
4263 * Returns 0 on success, negative on failure
4264 **/
4265static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4266{
4267 struct e1000_adapter *adapter = netdev_priv(netdev);
4268 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4269
2adc55c9
BA
4270 /* Jumbo frame support */
4271 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4272 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4273 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK
4274 return -EINVAL;
4275 }
4276
2adc55c9
BA
4277 /* Supported frame sizes */
4278 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4279 (max_frame > adapter->max_hw_frame_size)) {
4280 e_err("Unsupported MTU setting\n");
bc7f75fa
AK
4281 return -EINVAL;
4282 }
4283
4284 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4285 msleep(1);
610c9928 4286 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4287 adapter->max_frame_size = max_frame;
610c9928
BA
4288 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4289 netdev->mtu = new_mtu;
bc7f75fa
AK
4290 if (netif_running(netdev))
4291 e1000e_down(adapter);
4292
ad68076e
BA
4293 /*
4294 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK
4295 * means we reserve 2 more, this pushes us to allocate from the next
4296 * larger slab size.
ad68076e 4297 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA
4298 * However with the new *_jumbo_rx* routines, jumbo receives will use
4299 * fragmented skbs
ad68076e 4300 */
bc7f75fa 4301
9926146b 4302 if (max_frame <= 2048)
bc7f75fa
AK
4303 adapter->rx_buffer_len = 2048;
4304 else
4305 adapter->rx_buffer_len = 4096;
4306
4307 /* adjust allocation if LPE protects us, and we aren't using SBP */
4308 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4309 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4310 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4311 + ETH_FCS_LEN;
bc7f75fa 4312
bc7f75fa
AK
4313 if (netif_running(netdev))
4314 e1000e_up(adapter);
4315 else
4316 e1000e_reset(adapter);
4317
4318 clear_bit(__E1000_RESETTING, &adapter->state);
4319
4320 return 0;
4321}
4322
4323static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4324 int cmd)
4325{
4326 struct e1000_adapter *adapter = netdev_priv(netdev);
4327 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4328
318a94d6 4329 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK
4330 return -EOPNOTSUPP;
4331
4332 switch (cmd) {
4333 case SIOCGMIIPHY:
4334 data->phy_id = adapter->hw.phy.addr;
4335 break;
4336 case SIOCGMIIREG:
b16a002e
BA
4337 e1000_phy_read_status(adapter);
4338
7c25769f
BA
4339 switch (data->reg_num & 0x1F) {
4340 case MII_BMCR:
4341 data->val_out = adapter->phy_regs.bmcr;
4342 break;
4343 case MII_BMSR:
4344 data->val_out = adapter->phy_regs.bmsr;
4345 break;
4346 case MII_PHYSID1:
4347 data->val_out = (adapter->hw.phy.id >> 16);
4348 break;
4349 case MII_PHYSID2:
4350 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4351 break;
4352 case MII_ADVERTISE:
4353 data->val_out = adapter->phy_regs.advertise;
4354 break;
4355 case MII_LPA:
4356 data->val_out = adapter->phy_regs.lpa;
4357 break;
4358 case MII_EXPANSION:
4359 data->val_out = adapter->phy_regs.expansion;
4360 break;
4361 case MII_CTRL1000:
4362 data->val_out = adapter->phy_regs.ctrl1000;
4363 break;
4364 case MII_STAT1000:
4365 data->val_out = adapter->phy_regs.stat1000;
4366 break;
4367 case MII_ESTATUS:
4368 data->val_out = adapter->phy_regs.estatus;
4369 break;
4370 default:
bc7f75fa
AK
4371 return -EIO;
4372 }
bc7f75fa
AK
4373 break;
4374 case SIOCSMIIREG:
4375 default:
4376 return -EOPNOTSUPP;
4377 }
4378 return 0;
4379}
4380
4381static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4382{
4383 switch (cmd) {
4384 case SIOCGMIIPHY:
4385 case SIOCGMIIREG:
4386 case SIOCSMIIREG:
4387 return e1000_mii_ioctl(netdev, ifr, cmd);
4388 default:
4389 return -EOPNOTSUPP;
4390 }
4391}
4392
a4f58f54
BA
4393static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4394{
4395 struct e1000_hw *hw = &adapter->hw;
4396 u32 i, mac_reg;
4397 u16 phy_reg;
4398 int retval = 0;
4399
4400 /* copy MAC RARs to PHY RARs */
4401 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4402 mac_reg = er32(RAL(i));
4403 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4404 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4405 mac_reg = er32(RAH(i));
4406 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4407 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4408 }
4409
4410 /* copy MAC MTA to PHY MTA */
4411 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4412 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4413 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4414 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4415 }
4416
4417 /* configure PHY Rx Control register */
4418 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4419 mac_reg = er32(RCTL);
4420 if (mac_reg & E1000_RCTL_UPE)
4421 phy_reg |= BM_RCTL_UPE;
4422 if (mac_reg & E1000_RCTL_MPE)
4423 phy_reg |= BM_RCTL_MPE;
4424 phy_reg &= ~(BM_RCTL_MO_MASK);
4425 if (mac_reg & E1000_RCTL_MO_3)
4426 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4427 << BM_RCTL_MO_SHIFT);
4428 if (mac_reg & E1000_RCTL_BAM)
4429 phy_reg |= BM_RCTL_BAM;
4430 if (mac_reg & E1000_RCTL_PMCF)
4431 phy_reg |= BM_RCTL_PMCF;
4432 mac_reg = er32(CTRL);
4433 if (mac_reg & E1000_CTRL_RFCE)
4434 phy_reg |= BM_RCTL_RFCE;
4435 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4436
4437 /* enable PHY wakeup in MAC register */
4438 ew32(WUFC, wufc);
4439 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4440
4441 /* configure and enable PHY wakeup in PHY registers */
4442 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4443 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4444
4445 /* activate PHY wakeup */
94d8186a 4446 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA
4447 if (retval) {
4448 e_err("Could not acquire PHY\n");
4449 return retval;
4450 }
4451 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4452 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4453 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4454 if (retval) {
4455 e_err("Could not read PHY page 769\n");
4456 goto out;
4457 }
4458 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4459 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4460 if (retval)
4461 e_err("Could not set PHY Host Wakeup bit\n");
4462out:
94d8186a 4463 hw->phy.ops.release(hw);
a4f58f54
BA
4464
4465 return retval;
4466}
4467
4f9de721 4468static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
bc7f75fa
AK
4469{
4470 struct net_device *netdev = pci_get_drvdata(pdev);
4471 struct e1000_adapter *adapter = netdev_priv(netdev);
4472 struct e1000_hw *hw = &adapter->hw;
4473 u32 ctrl, ctrl_ext, rctl, status;
4474 u32 wufc = adapter->wol;
4475 int retval = 0;
4476
4477 netif_device_detach(netdev);
4478
4479 if (netif_running(netdev)) {
4480 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4481 e1000e_down(adapter);
4482 e1000_free_irq(adapter);
4483 }
4662e82b 4484 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK
4485
4486 retval = pci_save_state(pdev);
4487 if (retval)
4488 return retval;
4489
4490 status = er32(STATUS);
4491 if (status & E1000_STATUS_LU)
4492 wufc &= ~E1000_WUFC_LNKC;
4493
4494 if (wufc) {
4495 e1000_setup_rctl(adapter);
4496 e1000_set_multi(netdev);
4497
4498 /* turn on all-multi mode if wake on multicast is enabled */
4499 if (wufc & E1000_WUFC_MC) {
4500 rctl = er32(RCTL);
4501 rctl |= E1000_RCTL_MPE;
4502 ew32(RCTL, rctl);
4503 }
4504
4505 ctrl = er32(CTRL);
4506 /* advertise wake from D3Cold */
4507 #define E1000_CTRL_ADVD3WUC 0x00100000
4508 /* phy power management enable */
4509 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA
4510 ctrl |= E1000_CTRL_ADVD3WUC;
4511 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4512 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK
4513 ew32(CTRL, ctrl);
4514
318a94d6
JK
4515 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4516 adapter->hw.phy.media_type ==
4517 e1000_media_type_internal_serdes) {
bc7f75fa
AK
4518 /* keep the laser running in D3 */
4519 ctrl_ext = er32(CTRL_EXT);
93a23f48 4520 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK
4521 ew32(CTRL_EXT, ctrl_ext);
4522 }
4523
97ac8cae
BA
4524 if (adapter->flags & FLAG_IS_ICH)
4525 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4526
bc7f75fa
AK
4527 /* Allow time for pending master requests to run */
4528 e1000e_disable_pcie_master(&adapter->hw);
4529
82776a4b 4530 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA
4531 /* enable wakeup by the PHY */
4532 retval = e1000_init_phy_wakeup(adapter, wufc);
4533 if (retval)
4534 return retval;
4535 } else {
4536 /* enable wakeup by the MAC */
4537 ew32(WUFC, wufc);
4538 ew32(WUC, E1000_WUC_PME_EN);
4539 }
bc7f75fa
AK
4540 } else {
4541 ew32(WUC, 0);
4542 ew32(WUFC, 0);
bc7f75fa
AK
4543 }
4544
4f9de721
RW
4545 *enable_wake = !!wufc;
4546
bc7f75fa 4547 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA
4548 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4549 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4550 *enable_wake = true;
bc7f75fa
AK
4551
4552 if (adapter->hw.phy.type == e1000_phy_igp_3)
4553 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4554
ad68076e
BA
4555 /*
4556 * Release control of h/w to f/w. If f/w is AMT enabled, this
4557 * would have already happened in close and is redundant.
4558 */
bc7f75fa
AK
4559 e1000_release_hw_control(adapter);
4560
4561 pci_disable_device(pdev);
4562
4f9de721
RW
4563 return 0;
4564}
4565
4566static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4567{
4568 if (sleep && wake) {
4569 pci_prepare_to_sleep(pdev);
4570 return;
4571 }
4572
4573 pci_wake_from_d3(pdev, wake);
4574 pci_set_power_state(pdev, PCI_D3hot);
4575}
4576
4577static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4578 bool wake)
4579{
4580 struct net_device *netdev = pci_get_drvdata(pdev);
4581 struct e1000_adapter *adapter = netdev_priv(netdev);
4582
005cbdfc
AD
4583 /*
4584 * The pci-e switch on some quad port adapters will report a
4585 * correctable error when the MAC transitions from D0 to D3. To
4586 * prevent this we need to mask off the correctable errors on the
4587 * downstream port of the pci-e switch.
4588 */
4589 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4590 struct pci_dev *us_dev = pdev->bus->self;
4591 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4592 u16 devctl;
4593
4594 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4595 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4596 (devctl & ~PCI_EXP_DEVCTL_CERE));
4597
4f9de721 4598 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD
4599
4600 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4601 } else {
4f9de721 4602 e1000_power_off(pdev, sleep, wake);
005cbdfc 4603 }
bc7f75fa
AK
4604}
4605
1eae4eb2
AK
4606static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4607{
4608 int pos;
1eae4eb2
AK
4609 u16 val;
4610
4611 /*
4612 * 82573 workaround - disable L1 ASPM on mobile chipsets
4613 *
4614 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4615 * resulting in lost data or garbage information on the pci-e link
4616 * level. This could result in (false) bad EEPROM checksum errors,
4617 * long ping times (up to 2s) or even a system freeze/hang.
4618 *
4619 * Unfortunately this feature saves about 1W power consumption when
4620 * active.
4621 */
4622 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK
4623 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4624 if (val & 0x2) {
4625 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4626 val &= ~0x2;
4627 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4628 }
4629}
4630
bc7f75fa 4631#ifdef CONFIG_PM
4f9de721
RW
4632static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4633{
4634 int retval;
4635 bool wake;
4636
4637 retval = __e1000_shutdown(pdev, &wake);
4638 if (!retval)
4639 e1000_complete_shutdown(pdev, true, wake);
4640
4641 return retval;
4642}
4643
bc7f75fa
AK
4644static int e1000_resume(struct pci_dev *pdev)
4645{
4646 struct net_device *netdev = pci_get_drvdata(pdev);
4647 struct e1000_adapter *adapter = netdev_priv(netdev);
4648 struct e1000_hw *hw = &adapter->hw;
4649 u32 err;
4650
4651 pci_set_power_state(pdev, PCI_D0);
4652 pci_restore_state(pdev);
28b8f04a 4653 pci_save_state(pdev);
1eae4eb2 4654 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4655
f0f422e5 4656 err = pci_enable_device_mem(pdev);
bc7f75fa
AK
4657 if (err) {
4658 dev_err(&pdev->dev,
4659 "Cannot enable PCI device from suspend\n");
4660 return err;
4661 }
4662
4663 pci_set_master(pdev);
4664
4665 pci_enable_wake(pdev, PCI_D3hot, 0);
4666 pci_enable_wake(pdev, PCI_D3cold, 0);
4667
4662e82b 4668 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK
4669 if (netif_running(netdev)) {
4670 err = e1000_request_irq(adapter);
4671 if (err)
4672 return err;
4673 }
4674
4675 e1000e_power_up_phy(adapter);
a4f58f54
BA
4676
4677 /* report the system wakeup cause from S3/S4 */
4678 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4679 u16 phy_data;
4680
4681 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4682 if (phy_data) {
4683 e_info("PHY Wakeup cause - %s\n",
4684 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4685 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4686 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4687 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4688 phy_data & E1000_WUS_LNKC ? "Link Status "
4689 " Change" : "other");
4690 }
4691 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4692 } else {
4693 u32 wus = er32(WUS);
4694 if (wus) {
4695 e_info("MAC Wakeup cause - %s\n",
4696 wus & E1000_WUS_EX ? "Unicast Packet" :
4697 wus & E1000_WUS_MC ? "Multicast Packet" :
4698 wus & E1000_WUS_BC ? "Broadcast Packet" :
4699 wus & E1000_WUS_MAG ? "Magic Packet" :
4700 wus & E1000_WUS_LNKC ? "Link Status Change" :
4701 "other");
4702 }
4703 ew32(WUS, ~0);
4704 }
4705
bc7f75fa 4706 e1000e_reset(adapter);
bc7f75fa
AK
4707
4708 e1000_init_manageability(adapter);
4709
4710 if (netif_running(netdev))
4711 e1000e_up(adapter);
4712
4713 netif_device_attach(netdev);
4714
ad68076e
BA
4715 /*
4716 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4717 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
4718 * under the control of the driver.
4719 */
c43bc57e 4720 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
4721 e1000_get_hw_control(adapter);
4722
4723 return 0;
4724}
4725#endif
4726
4727static void e1000_shutdown(struct pci_dev *pdev)
4728{
4f9de721
RW
4729 bool wake = false;
4730
4731 __e1000_shutdown(pdev, &wake);
4732
4733 if (system_state == SYSTEM_POWER_OFF)
4734 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK
4735}
4736
4737#ifdef CONFIG_NET_POLL_CONTROLLER
4738/*
4739 * Polling 'interrupt' - used by things like netconsole to send skbs
4740 * without having to re-enable interrupts. It's not called while
4741 * the interrupt routine is executing.
4742 */
4743static void e1000_netpoll(struct net_device *netdev)
4744{
4745 struct e1000_adapter *adapter = netdev_priv(netdev);
4746
4747 disable_irq(adapter->pdev->irq);
4748 e1000_intr(adapter->pdev->irq, netdev);
4749
bc7f75fa
AK
4750 enable_irq(adapter->pdev->irq);
4751}
4752#endif
4753
4754/**
4755 * e1000_io_error_detected - called when PCI error is detected
4756 * @pdev: Pointer to PCI device
4757 * @state: The current pci connection state
4758 *
4759 * This function is called after a PCI bus error affecting
4760 * this device has been detected.
4761 */
4762static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4763 pci_channel_state_t state)
4764{
4765 struct net_device *netdev = pci_get_drvdata(pdev);
4766 struct e1000_adapter *adapter = netdev_priv(netdev);
4767
4768 netif_device_detach(netdev);
4769
c93b5a76
MM
4770 if (state == pci_channel_io_perm_failure)
4771 return PCI_ERS_RESULT_DISCONNECT;
4772
bc7f75fa
AK
4773 if (netif_running(netdev))
4774 e1000e_down(adapter);
4775 pci_disable_device(pdev);
4776
4777 /* Request a slot slot reset. */
4778 return PCI_ERS_RESULT_NEED_RESET;
4779}
4780
4781/**
4782 * e1000_io_slot_reset - called after the pci bus has been reset.
4783 * @pdev: Pointer to PCI device
4784 *
4785 * Restart the card from scratch, as if from a cold-boot. Implementation
4786 * resembles the first-half of the e1000_resume routine.
4787 */
4788static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4789{
4790 struct net_device *netdev = pci_get_drvdata(pdev);
4791 struct e1000_adapter *adapter = netdev_priv(netdev);
4792 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4793 int err;
111b9dc5 4794 pci_ers_result_t result;
bc7f75fa 4795
1eae4eb2 4796 e1000e_disable_l1aspm(pdev);
f0f422e5 4797 err = pci_enable_device_mem(pdev);
6e4f6f6b 4798 if (err) {
bc7f75fa
AK
4799 dev_err(&pdev->dev,
4800 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB
4801 result = PCI_ERS_RESULT_DISCONNECT;
4802 } else {
4803 pci_set_master(pdev);
4804 pci_restore_state(pdev);
28b8f04a 4805 pci_save_state(pdev);
bc7f75fa 4806
111b9dc5
JB
4807 pci_enable_wake(pdev, PCI_D3hot, 0);
4808 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4809
111b9dc5
JB
4810 e1000e_reset(adapter);
4811 ew32(WUS, ~0);
4812 result = PCI_ERS_RESULT_RECOVERED;
4813 }
bc7f75fa 4814
111b9dc5
JB
4815 pci_cleanup_aer_uncorrect_error_status(pdev);
4816
4817 return result;
bc7f75fa
AK
4818}
4819
4820/**
4821 * e1000_io_resume - called when traffic can start flowing again.
4822 * @pdev: Pointer to PCI device
4823 *
4824 * This callback is called when the error recovery driver tells us that
4825 * its OK to resume normal operation. Implementation resembles the
4826 * second-half of the e1000_resume routine.
4827 */
4828static void e1000_io_resume(struct pci_dev *pdev)
4829{
4830 struct net_device *netdev = pci_get_drvdata(pdev);
4831 struct e1000_adapter *adapter = netdev_priv(netdev);
4832
4833 e1000_init_manageability(adapter);
4834
4835 if (netif_running(netdev)) {
4836 if (e1000e_up(adapter)) {
4837 dev_err(&pdev->dev,
4838 "can't bring device back up after reset\n");
4839 return;
4840 }
4841 }
4842
4843 netif_device_attach(netdev);
4844
ad68076e
BA
4845 /*
4846 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4847 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
4848 * under the control of the driver.
4849 */
c43bc57e 4850 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
4851 e1000_get_hw_control(adapter);
4852
4853}
4854
4855static void e1000_print_device_info(struct e1000_adapter *adapter)
4856{
4857 struct e1000_hw *hw = &adapter->hw;
4858 struct net_device *netdev = adapter->netdev;
69e3fd8c 4859 u32 pba_num;
bc7f75fa
AK
4860
4861 /* print bus type/speed/width info */
7c510e4b 4862 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK
4863 /* bus width */
4864 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4865 "Width x1"),
4866 /* MAC address */
7c510e4b 4867 netdev->dev_addr);
44defeb3
JK
4868 e_info("Intel(R) PRO/%s Network Connection\n",
4869 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4870 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK
4871 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4872 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK
4873}
4874
10aa4c04
AK
4875static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4876{
4877 struct e1000_hw *hw = &adapter->hw;
4878 int ret_val;
4879 u16 buf = 0;
4880
4881 if (hw->mac.type != e1000_82573)
4882 return;
4883
4884 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4885 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4886 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP
4887 dev_warn(&adapter->pdev->dev,
4888 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK
4889 }
4890
4891 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4892 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4893 /* ASPM enable */
6c2a9efa
FP
4894 dev_warn(&adapter->pdev->dev,
4895 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK
4896 }
4897}
4898
651c2466
SH
4899static const struct net_device_ops e1000e_netdev_ops = {
4900 .ndo_open = e1000_open,
4901 .ndo_stop = e1000_close,
00829823 4902 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH
4903 .ndo_get_stats = e1000_get_stats,
4904 .ndo_set_multicast_list = e1000_set_multi,
4905 .ndo_set_mac_address = e1000_set_mac,
4906 .ndo_change_mtu = e1000_change_mtu,
4907 .ndo_do_ioctl = e1000_ioctl,
4908 .ndo_tx_timeout = e1000_tx_timeout,
4909 .ndo_validate_addr = eth_validate_addr,
4910
4911 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4912 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4913 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4914#ifdef CONFIG_NET_POLL_CONTROLLER
4915 .ndo_poll_controller = e1000_netpoll,
4916#endif
4917};
4918
bc7f75fa
AK
4919/**
4920 * e1000_probe - Device Initialization Routine
4921 * @pdev: PCI device information struct
4922 * @ent: entry in e1000_pci_tbl
4923 *
4924 * Returns 0 on success, negative on failure
4925 *
4926 * e1000_probe initializes an adapter identified by a pci_dev structure.
4927 * The OS initialization, configuring of the adapter private structure,
4928 * and a hardware reset occur.
4929 **/
4930static int __devinit e1000_probe(struct pci_dev *pdev,
4931 const struct pci_device_id *ent)
4932{
4933 struct net_device *netdev;
4934 struct e1000_adapter *adapter;
4935 struct e1000_hw *hw;
4936 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB
4937 resource_size_t mmio_start, mmio_len;
4938 resource_size_t flash_start, flash_len;
bc7f75fa
AK
4939
4940 static int cards_found;
4941 int i, err, pci_using_dac;
4942 u16 eeprom_data = 0;
4943 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4944
1eae4eb2 4945 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4946
f0f422e5 4947 err = pci_enable_device_mem(pdev);
bc7f75fa
AK
4948 if (err)
4949 return err;
4950
4951 pci_using_dac = 0;
6a35528a 4952 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 4953 if (!err) {
6a35528a 4954 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK
4955 if (!err)
4956 pci_using_dac = 1;
4957 } else {
284901a9 4958 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK
4959 if (err) {
4960 err = pci_set_consistent_dma_mask(pdev,
284901a9 4961 DMA_BIT_MASK(32));
bc7f75fa
AK
4962 if (err) {
4963 dev_err(&pdev->dev, "No usable DMA "
4964 "configuration, aborting\n");
4965 goto err_dma;
4966 }
4967 }
4968 }
4969
e8de1481 4970 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA
4971 pci_select_bars(pdev, IORESOURCE_MEM),
4972 e1000e_driver_name);
bc7f75fa
AK
4973 if (err)
4974 goto err_pci_reg;
4975
68eac460 4976 /* AER (Advanced Error Reporting) hooks */
19d5afd4 4977 pci_enable_pcie_error_reporting(pdev);
68eac460 4978
bc7f75fa 4979 pci_set_master(pdev);
438b365a
BA
4980 /* PCI config space info */
4981 err = pci_save_state(pdev);
4982 if (err)
4983 goto err_alloc_etherdev;
bc7f75fa
AK
4984
4985 err = -ENOMEM;
4986 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
4987 if (!netdev)
4988 goto err_alloc_etherdev;
4989
bc7f75fa
AK
4990 SET_NETDEV_DEV(netdev, &pdev->dev);
4991
4992 pci_set_drvdata(pdev, netdev);
4993 adapter = netdev_priv(netdev);
4994 hw = &adapter->hw;
4995 adapter->netdev = netdev;
4996 adapter->pdev = pdev;
4997 adapter->ei = ei;
4998 adapter->pba = ei->pba;
4999 adapter->flags = ei->flags;
eb7c3adb 5000 adapter->flags2 = ei->flags2;
bc7f75fa
AK
5001 adapter->hw.adapter = adapter;
5002 adapter->hw.mac.type = ei->mac;
2adc55c9 5003 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK
5004 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5005
5006 mmio_start = pci_resource_start(pdev, 0);
5007 mmio_len = pci_resource_len(pdev, 0);
5008
5009 err = -EIO;
5010 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5011 if (!adapter->hw.hw_addr)
5012 goto err_ioremap;
5013
5014 if ((adapter->flags & FLAG_HAS_FLASH) &&
5015 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5016 flash_start = pci_resource_start(pdev, 1);
5017 flash_len = pci_resource_len(pdev, 1);
5018 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5019 if (!adapter->hw.flash_address)
5020 goto err_flashmap;
5021 }
5022
5023 /* construct the net_device struct */
651c2466 5024 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5025 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK
5026 netdev->watchdog_timeo = 5 * HZ;
5027 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK
5028 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5029
5030 netdev->mem_start = mmio_start;
5031 netdev->mem_end = mmio_start + mmio_len;
5032
5033 adapter->bd_number = cards_found++;
5034
4662e82b
BA
5035 e1000e_check_options(adapter);
5036
bc7f75fa
AK
5037 /* setup adapter struct */
5038 err = e1000_sw_init(adapter);
5039 if (err)
5040 goto err_sw_init;
5041
5042 err = -EIO;
5043
5044 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5045 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5046 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5047
69e3fd8c 5048 err = ei->get_variants(adapter);
bc7f75fa
AK
5049 if (err)
5050 goto err_hw_init;
5051
4a770358
BA
5052 if ((adapter->flags & FLAG_IS_ICH) &&
5053 (adapter->flags & FLAG_READ_ONLY_NVM))
5054 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5055
bc7f75fa
AK
5056 hw->mac.ops.get_bus_info(&adapter->hw);
5057
318a94d6 5058 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK
5059
5060 /* Copper options */
318a94d6 5061 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK
5062 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5063 adapter->hw.phy.disable_polarity_correction = 0;
5064 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5065 }
5066
5067 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5068 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK
5069
5070 netdev->features = NETIF_F_SG |
5071 NETIF_F_HW_CSUM |
5072 NETIF_F_HW_VLAN_TX |
5073 NETIF_F_HW_VLAN_RX;
5074
5075 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5076 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5077
5078 netdev->features |= NETIF_F_TSO;
5079 netdev->features |= NETIF_F_TSO6;
5080
a5136e23
JK
5081 netdev->vlan_features |= NETIF_F_TSO;
5082 netdev->vlan_features |= NETIF_F_TSO6;
5083 netdev->vlan_features |= NETIF_F_HW_CSUM;
5084 netdev->vlan_features |= NETIF_F_SG;
5085
bc7f75fa
AK
5086 if (pci_using_dac)
5087 netdev->features |= NETIF_F_HIGHDMA;
5088
bc7f75fa
AK
5089 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5090 adapter->flags |= FLAG_MNG_PT_ENABLED;
5091
ad68076e
BA
5092 /*
5093 * before reading the NVM, reset the controller to
5094 * put the device in a known good starting state
5095 */
bc7f75fa
AK
5096 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5097
5098 /*
5099 * systems with ASPM and others may see the checksum fail on the first
5100 * attempt. Let's give it a few tries
5101 */
5102 for (i = 0;; i++) {
5103 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5104 break;
5105 if (i == 2) {
44defeb3 5106 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK
5107 err = -EIO;
5108 goto err_eeprom;
5109 }
5110 }
5111
10aa4c04
AK
5112 e1000_eeprom_checks(adapter);
5113
608f8a0d 5114 /* copy the MAC address */
bc7f75fa 5115 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5116 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK
5117
5118 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5119 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5120
5121 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5122 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK
5123 err = -EIO;
5124 goto err_eeprom;
5125 }
5126
5127 init_timer(&adapter->watchdog_timer);
5128 adapter->watchdog_timer.function = &e1000_watchdog;
5129 adapter->watchdog_timer.data = (unsigned long) adapter;
5130
5131 init_timer(&adapter->phy_info_timer);
5132 adapter->phy_info_timer.function = &e1000_update_phy_info;
5133 adapter->phy_info_timer.data = (unsigned long) adapter;
5134
5135 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5136 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB
5137 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5138 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5139 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5140
bc7f75fa
AK
5141 /* Initialize link parameters. User can change them with ethtool */
5142 adapter->hw.mac.autoneg = 1;
309af40b 5143 adapter->fc_autoneg = 1;
5c48ef3e
BA
5144 adapter->hw.fc.requested_mode = e1000_fc_default;
5145 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK
5146 adapter->hw.phy.autoneg_advertised = 0x2f;
5147
5148 /* ring size defaults */
5149 adapter->rx_ring->count = 256;
5150 adapter->tx_ring->count = 256;
5151
5152 /*
5153 * Initial Wake on LAN setting - If APM wake is enabled in
5154 * the EEPROM, enable the ACPI Magic Packet filter
5155 */
5156 if (adapter->flags & FLAG_APME_IN_WUC) {
5157 /* APME bit in EEPROM is mapped to WUC.APME */
5158 eeprom_data = er32(WUC);
5159 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA
5160 if (eeprom_data & E1000_WUC_PHY_WAKE)
5161 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK
5162 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5163 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5164 (adapter->hw.bus.func == 1))
5165 e1000_read_nvm(&adapter->hw,
5166 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5167 else
5168 e1000_read_nvm(&adapter->hw,
5169 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5170 }
5171
5172 /* fetch WoL from EEPROM */
5173 if (eeprom_data & eeprom_apme_mask)
5174 adapter->eeprom_wol |= E1000_WUFC_MAG;
5175
5176 /*
5177 * now that we have the eeprom settings, apply the special cases
5178 * where the eeprom may be wrong or the board simply won't support
5179 * wake on lan on a particular port
5180 */
5181 if (!(adapter->flags & FLAG_HAS_WOL))
5182 adapter->eeprom_wol = 0;
5183
5184 /* initialize the wol settings based on the eeprom settings */
5185 adapter->wol = adapter->eeprom_wol;
6ff68026 5186 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5187
84527590
BA
5188 /* save off EEPROM version number */
5189 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5190
bc7f75fa
AK
5191 /* reset the hardware with the new settings */
5192 e1000e_reset(adapter);
5193
ad68076e
BA
5194 /*
5195 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5196 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
5197 * under the control of the driver.
5198 */
c43bc57e 5199 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
5200 e1000_get_hw_control(adapter);
5201
bc7f75fa
AK
5202 strcpy(netdev->name, "eth%d");
5203 err = register_netdev(netdev);
5204 if (err)
5205 goto err_register;
5206
9c563d20
JB
5207 /* carrier off reporting is important to ethtool even BEFORE open */
5208 netif_carrier_off(netdev);
5209
bc7f75fa
AK
5210 e1000_print_device_info(adapter);
5211
5212 return 0;
5213
5214err_register:
c43bc57e
JB
5215 if (!(adapter->flags & FLAG_HAS_AMT))
5216 e1000_release_hw_control(adapter);
bc7f75fa
AK
5217err_eeprom:
5218 if (!e1000_check_reset_block(&adapter->hw))
5219 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5220err_hw_init:
bc7f75fa 5221
bc7f75fa
AK
5222 kfree(adapter->tx_ring);
5223 kfree(adapter->rx_ring);
5224err_sw_init:
c43bc57e
JB
5225 if (adapter->hw.flash_address)
5226 iounmap(adapter->hw.flash_address);
e82f54ba 5227 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5228err_flashmap:
bc7f75fa
AK
5229 iounmap(adapter->hw.hw_addr);
5230err_ioremap:
5231 free_netdev(netdev);
5232err_alloc_etherdev:
f0f422e5
BA
5233 pci_release_selected_regions(pdev,
5234 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
5235err_pci_reg:
5236err_dma:
5237 pci_disable_device(pdev);
5238 return err;
5239}
5240
5241/**
5242 * e1000_remove - Device Removal Routine
5243 * @pdev: PCI device information struct
5244 *
5245 * e1000_remove is called by the PCI subsystem to alert the driver
5246 * that it should release a PCI device. The could be caused by a
5247 * Hot-Plug event, or because the driver is going to be removed from
5248 * memory.
5249 **/
5250static void __devexit e1000_remove(struct pci_dev *pdev)
5251{
5252 struct net_device *netdev = pci_get_drvdata(pdev);
5253 struct e1000_adapter *adapter = netdev_priv(netdev);
5254
ad68076e
BA
5255 /*
5256 * flush_scheduled work may reschedule our watchdog task, so
5257 * explicitly disable watchdog tasks from being rescheduled
5258 */
bc7f75fa
AK
5259 set_bit(__E1000_DOWN, &adapter->state);
5260 del_timer_sync(&adapter->watchdog_timer);
5261 del_timer_sync(&adapter->phy_info_timer);
5262
41cec6f1
BA
5263 cancel_work_sync(&adapter->reset_task);
5264 cancel_work_sync(&adapter->watchdog_task);
5265 cancel_work_sync(&adapter->downshift_task);
5266 cancel_work_sync(&adapter->update_phy_task);
5267 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK
5268 flush_scheduled_work();
5269
17f208de
BA
5270 if (!(netdev->flags & IFF_UP))
5271 e1000_power_down_phy(adapter);
5272
5273 unregister_netdev(netdev);
5274
ad68076e
BA
5275 /*
5276 * Release control of h/w to f/w. If f/w is AMT enabled, this
5277 * would have already happened in close and is redundant.
5278 */
bc7f75fa
AK
5279 e1000_release_hw_control(adapter);
5280
4662e82b 5281 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK
5282 kfree(adapter->tx_ring);
5283 kfree(adapter->rx_ring);
5284
5285 iounmap(adapter->hw.hw_addr);
5286 if (adapter->hw.flash_address)
5287 iounmap(adapter->hw.flash_address);
f0f422e5
BA
5288 pci_release_selected_regions(pdev,
5289 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
5290
5291 free_netdev(netdev);
5292
111b9dc5 5293 /* AER disable */
19d5afd4 5294 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5295
bc7f75fa
AK
5296 pci_disable_device(pdev);
5297}
5298
5299/* PCI Error Recovery (ERS) */
5300static struct pci_error_handlers e1000_err_handler = {
5301 .error_detected = e1000_io_error_detected,
5302 .slot_reset = e1000_io_slot_reset,
5303 .resume = e1000_io_resume,
5304};
5305
a3aa1884 5306static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK
5307 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5308 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5309 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5310 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5311 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5312 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK
5313 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5314 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5315 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5316
bc7f75fa
AK
5317 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5318 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5319 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5320 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5321
bc7f75fa
AK
5322 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5323 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5324 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5325
4662e82b 5326 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5327 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5328 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5329
bc7f75fa
AK
5330 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5331 board_80003es2lan },
5332 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5333 board_80003es2lan },
5334 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5335 board_80003es2lan },
5336 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5337 board_80003es2lan },
ad68076e 5338
bc7f75fa
AK
5339 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5340 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5341 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5342 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5343 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5344 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5345 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5346 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5347
bc7f75fa
AK
5348 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5349 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5350 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5351 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5352 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5353 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA
5354 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5355 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5356 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5357
5358 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5359 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5360 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5361
f4187b56
BA
5362 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5363 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5364
a4f58f54
BA
5365 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5366 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5367 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5368 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5369
bc7f75fa
AK
5370 { } /* terminate list */
5371};
5372MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5373
5374/* PCI Device API Driver */
5375static struct pci_driver e1000_driver = {
5376 .name = e1000e_driver_name,
5377 .id_table = e1000_pci_tbl,
5378 .probe = e1000_probe,
5379 .remove = __devexit_p(e1000_remove),
5380#ifdef CONFIG_PM
ad68076e 5381 /* Power Management Hooks */
bc7f75fa
AK
5382 .suspend = e1000_suspend,
5383 .resume = e1000_resume,
5384#endif
5385 .shutdown = e1000_shutdown,
5386 .err_handler = &e1000_err_handler
5387};
5388
5389/**
5390 * e1000_init_module - Driver Registration Routine
5391 *
5392 * e1000_init_module is the first routine called when the driver is
5393 * loaded. All it does is register with the PCI subsystem.
5394 **/
5395static int __init e1000_init_module(void)
5396{
5397 int ret;
5398 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5399 e1000e_driver_name, e1000e_driver_version);
c7e54b1b 5400 printk(KERN_INFO "%s: Copyright (c) 1999 - 2009 Intel Corporation.\n",
bc7f75fa
AK
5401 e1000e_driver_name);
5402 ret = pci_register_driver(&e1000_driver);
53ec5498 5403
bc7f75fa
AK
5404 return ret;
5405}
5406module_init(e1000_init_module);
5407
5408/**
5409 * e1000_exit_module - Driver Exit Cleanup Routine
5410 *
5411 * e1000_exit_module is called just before the driver is removed
5412 * from memory.
5413 **/
5414static void __exit e1000_exit_module(void)
5415{
5416 pci_unregister_driver(&e1000_driver);
5417}
5418module_exit(e1000_exit_module);
5419
5420
5421MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5422MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5423MODULE_LICENSE("GPL");
5424MODULE_VERSION(DRV_VERSION);
5425
5426/* e1000_main.c */