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cxgb3: remove unnecessary read of PCI_CAP_ID_EXP
[mirror_ubuntu-artful-kernel.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
0d6057e4 4 Copyright(c) 1999 - 2011 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
a6b7a407 34#include <linux/interrupt.h>
bc7f75fa
AK		 35#include <linux/pci.h>
36#include <linux/vmalloc.h>
37#include <linux/pagemap.h>
38#include <linux/delay.h>
39#include <linux/netdevice.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
bc7f75fa
AK		 43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/mii.h>
46#include <linux/ethtool.h>
47#include <linux/if_vlan.h>
48#include <linux/cpu.h>
49#include <linux/smp.h>
97ac8cae 50#include <linux/pm_qos_params.h>
23606cf5 51#include <linux/pm_runtime.h>
111b9dc5 52#include <linux/aer.h>
70c71606 53#include <linux/prefetch.h>
bc7f75fa
AK		 54
55#include "e1000.h"
56
b3ccf267 57#define DRV_EXTRAVERSION "-k"
c14c643b 58
b3ccf267 59#define DRV_VERSION "1.3.16" DRV_EXTRAVERSION
bc7f75fa
AK		 60char e1000e_driver_name[] = "e1000e";
61const char e1000e_driver_version[] = DRV_VERSION;
62
78cd29d5
BA		 63static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
64
bc7f75fa
AK		 65static const struct e1000_info *e1000_info_tbl[] = {
66 [board_82571] = &e1000_82571_info,
67 [board_82572] = &e1000_82572_info,
68 [board_82573] = &e1000_82573_info,
4662e82b 69 [board_82574] = &e1000_82574_info,
8c81c9c3 70 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 71 [board_80003es2lan] = &e1000_es2_info,
72 [board_ich8lan] = &e1000_ich8_info,
73 [board_ich9lan] = &e1000_ich9_info,
f4187b56 74 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 75 [board_pchlan] = &e1000_pch_info,
d3738bb8 76 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 77};
78
84f4ee90
TI		 79struct e1000_reg_info {
80 u32 ofs;
81 char *name;
82};
83
af667a29
BA		 84#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
85#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
86#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
87#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
88#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
89
90#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
91#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
92#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
93#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
94#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
84f4ee90
TI		 95
96static const struct e1000_reg_info e1000_reg_info_tbl[] = {
97
98 /* General Registers */
99 {E1000_CTRL, "CTRL"},
100 {E1000_STATUS, "STATUS"},
101 {E1000_CTRL_EXT, "CTRL_EXT"},
102
103 /* Interrupt Registers */
104 {E1000_ICR, "ICR"},
105
af667a29 106 /* Rx Registers */
84f4ee90
TI		 107 {E1000_RCTL, "RCTL"},
108 {E1000_RDLEN, "RDLEN"},
109 {E1000_RDH, "RDH"},
110 {E1000_RDT, "RDT"},
111 {E1000_RDTR, "RDTR"},
112 {E1000_RXDCTL(0), "RXDCTL"},
113 {E1000_ERT, "ERT"},
114 {E1000_RDBAL, "RDBAL"},
115 {E1000_RDBAH, "RDBAH"},
116 {E1000_RDFH, "RDFH"},
117 {E1000_RDFT, "RDFT"},
118 {E1000_RDFHS, "RDFHS"},
119 {E1000_RDFTS, "RDFTS"},
120 {E1000_RDFPC, "RDFPC"},
121
af667a29 122 /* Tx Registers */
84f4ee90
TI		 123 {E1000_TCTL, "TCTL"},
124 {E1000_TDBAL, "TDBAL"},
125 {E1000_TDBAH, "TDBAH"},
126 {E1000_TDLEN, "TDLEN"},
127 {E1000_TDH, "TDH"},
128 {E1000_TDT, "TDT"},
129 {E1000_TIDV, "TIDV"},
130 {E1000_TXDCTL(0), "TXDCTL"},
131 {E1000_TADV, "TADV"},
132 {E1000_TARC(0), "TARC"},
133 {E1000_TDFH, "TDFH"},
134 {E1000_TDFT, "TDFT"},
135 {E1000_TDFHS, "TDFHS"},
136 {E1000_TDFTS, "TDFTS"},
137 {E1000_TDFPC, "TDFPC"},
138
139 /* List Terminator */
140 {}
141};
142
143/*
144 * e1000_regdump - register printout routine
145 */
146static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
147{
148 int n = 0;
149 char rname[16];
150 u32 regs[8];
151
152 switch (reginfo->ofs) {
153 case E1000_RXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_RXDCTL(n));
156 break;
157 case E1000_TXDCTL(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TXDCTL(n));
160 break;
161 case E1000_TARC(0):
162 for (n = 0; n < 2; n++)
163 regs[n] = __er32(hw, E1000_TARC(n));
164 break;
165 default:
166 printk(KERN_INFO "%-15s %08x\n",
af667a29 167 reginfo->name, __er32(hw, reginfo->ofs));
84f4ee90
TI		 168 return;
169 }
170
171 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
172 printk(KERN_INFO "%-15s ", rname);
173 for (n = 0; n < 2; n++)
174 printk(KERN_CONT "%08x ", regs[n]);
175 printk(KERN_CONT "\n");
176}
177
84f4ee90 178/*
af667a29 179 * e1000e_dump - Print registers, Tx-ring and Rx-ring
84f4ee90
TI		 180 */
181static void e1000e_dump(struct e1000_adapter *adapter)
182{
183 struct net_device *netdev = adapter->netdev;
184 struct e1000_hw *hw = &adapter->hw;
185 struct e1000_reg_info *reginfo;
186 struct e1000_ring *tx_ring = adapter->tx_ring;
187 struct e1000_tx_desc *tx_desc;
af667a29
BA		 188 struct my_u0 {
189 u64 a;
190 u64 b;
191 } *u0;
84f4ee90
TI		 192 struct e1000_buffer *buffer_info;
193 struct e1000_ring *rx_ring = adapter->rx_ring;
194 union e1000_rx_desc_packet_split *rx_desc_ps;
195 struct e1000_rx_desc *rx_desc;
af667a29
BA		 196 struct my_u1 {
197 u64 a;
198 u64 b;
199 u64 c;
200 u64 d;
201 } *u1;
84f4ee90
TI		 202 u32 staterr;
203 int i = 0;
204
205 if (!netif_msg_hw(adapter))
206 return;
207
208 /* Print netdevice Info */
209 if (netdev) {
210 dev_info(&adapter->pdev->dev, "Net device Info\n");
211 printk(KERN_INFO "Device Name state "
af667a29 212 "trans_start last_rx\n");
84f4ee90 213 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
af667a29
BA		 214 netdev->name, netdev->state, netdev->trans_start,
215 netdev->last_rx);
84f4ee90
TI		 216 }
217
218 /* Print Registers */
219 dev_info(&adapter->pdev->dev, "Register Dump\n");
220 printk(KERN_INFO " Register Name Value\n");
221 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
222 reginfo->name; reginfo++) {
223 e1000_regdump(hw, reginfo);
224 }
225
af667a29 226 /* Print Tx Ring Summary */
84f4ee90
TI		 227 if (!netdev || !netif_running(netdev))
228 goto exit;
229
af667a29 230 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
84f4ee90 231 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
af667a29 232 " leng ntw timestamp\n");
84f4ee90
TI		 233 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
234 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
af667a29
BA		 235 0, tx_ring->next_to_use, tx_ring->next_to_clean,
236 (unsigned long long)buffer_info->dma,
237 buffer_info->length,
238 buffer_info->next_to_watch,
239 (unsigned long long)buffer_info->time_stamp);
84f4ee90 240
af667a29 241 /* Print Tx Ring */
84f4ee90
TI		 242 if (!netif_msg_tx_done(adapter))
243 goto rx_ring_summary;
244
af667a29 245 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
84f4ee90
TI		 246
247 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
248 *
249 * Legacy Transmit Descriptor
250 * +--------------------------------------------------------------+
251 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
252 * +--------------------------------------------------------------+
253 * 8 | Special | CSS | Status | CMD | CSO | Length |
254 * +--------------------------------------------------------------+
255 * 63 48 47 36 35 32 31 24 23 16 15 0
256 *
257 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
258 * 63 48 47 40 39 32 31 16 15 8 7 0
259 * +----------------------------------------------------------------+
260 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
261 * +----------------------------------------------------------------+
262 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
263 * +----------------------------------------------------------------+
264 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
265 *
266 * Extended Data Descriptor (DTYP=0x1)
267 * +----------------------------------------------------------------+
268 * 0 | Buffer Address [63:0] |
269 * +----------------------------------------------------------------+
270 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
271 * +----------------------------------------------------------------+
272 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
273 */
274 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
af667a29
BA		 275 " [bi->dma ] leng ntw timestamp bi->skb "
276 "<-- Legacy format\n");
84f4ee90 277 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
af667a29
BA		 278 " [bi->dma ] leng ntw timestamp bi->skb "
279 "<-- Ext Context format\n");
84f4ee90 280 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
af667a29
BA		 281 " [bi->dma ] leng ntw timestamp bi->skb "
282 "<-- Ext Data format\n");
84f4ee90
TI		 283 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
284 tx_desc = E1000_TX_DESC(*tx_ring, i);
285 buffer_info = &tx_ring->buffer_info[i];
286 u0 = (struct my_u0 *)tx_desc;
287 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
af667a29
BA		 288 "%04X %3X %016llX %p",
289 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
290 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 291 (unsigned long long)le64_to_cpu(u0->a),
292 (unsigned long long)le64_to_cpu(u0->b),
293 (unsigned long long)buffer_info->dma,
294 buffer_info->length, buffer_info->next_to_watch,
295 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 296 buffer_info->skb);
297 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
298 printk(KERN_CONT " NTC/U\n");
299 else if (i == tx_ring->next_to_use)
300 printk(KERN_CONT " NTU\n");
301 else if (i == tx_ring->next_to_clean)
302 printk(KERN_CONT " NTC\n");
303 else
304 printk(KERN_CONT "\n");
305
306 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
307 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
af667a29
BA		 308 16, 1, phys_to_virt(buffer_info->dma),
309 buffer_info->length, true);
84f4ee90
TI		 310 }
311
af667a29 312 /* Print Rx Ring Summary */
84f4ee90 313rx_ring_summary:
af667a29 314 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
84f4ee90
TI		 315 printk(KERN_INFO "Queue [NTU] [NTC]\n");
316 printk(KERN_INFO " %5d %5X %5X\n", 0,
af667a29 317 rx_ring->next_to_use, rx_ring->next_to_clean);
84f4ee90 318
af667a29 319 /* Print Rx Ring */
84f4ee90
TI		 320 if (!netif_msg_rx_status(adapter))
321 goto exit;
322
af667a29 323 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
84f4ee90
TI		 324 switch (adapter->rx_ps_pages) {
325 case 1:
326 case 2:
327 case 3:
328 /* [Extended] Packet Split Receive Descriptor Format
329 *
330 * +-----------------------------------------------------+
331 * 0 | Buffer Address 0 [63:0] |
332 * +-----------------------------------------------------+
333 * 8 | Buffer Address 1 [63:0] |
334 * +-----------------------------------------------------+
335 * 16 | Buffer Address 2 [63:0] |
336 * +-----------------------------------------------------+
337 * 24 | Buffer Address 3 [63:0] |
338 * +-----------------------------------------------------+
339 */
340 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
af667a29 341 "[buffer 1 63:0 ] "
84f4ee90
TI		 342 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
343 "[bi->skb] <-- Ext Pkt Split format\n");
344 /* [Extended] Receive Descriptor (Write-Back) Format
345 *
346 * 63 48 47 32 31 13 12 8 7 4 3 0
347 * +------------------------------------------------------+
348 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
349 * | Checksum | Ident | | Queue | | Type |
350 * +------------------------------------------------------+
351 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
352 * +------------------------------------------------------+
353 * 63 48 47 32 31 20 19 0
354 */
355 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
af667a29 356 "[vl l0 ee es] "
84f4ee90
TI		 357 "[ l3 l2 l1 hs] [reserved ] ---------------- "
358 "[bi->skb] <-- Ext Rx Write-Back format\n");
359 for (i = 0; i < rx_ring->count; i++) {
360 buffer_info = &rx_ring->buffer_info[i];
361 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
362 u1 = (struct my_u1 *)rx_desc_ps;
363 staterr =
af667a29 364 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
84f4ee90
TI		 365 if (staterr & E1000_RXD_STAT_DD) {
366 /* Descriptor Done */
367 printk(KERN_INFO "RWB[0x%03X] %016llX "
af667a29
BA		 368 "%016llX %016llX %016llX "
369 "---------------- %p", i,
370 (unsigned long long)le64_to_cpu(u1->a),
371 (unsigned long long)le64_to_cpu(u1->b),
372 (unsigned long long)le64_to_cpu(u1->c),
373 (unsigned long long)le64_to_cpu(u1->d),
374 buffer_info->skb);
84f4ee90
TI		 375 } else {
376 printk(KERN_INFO "R [0x%03X] %016llX "
af667a29
BA		 377 "%016llX %016llX %016llX %016llX %p", i,
378 (unsigned long long)le64_to_cpu(u1->a),
379 (unsigned long long)le64_to_cpu(u1->b),
380 (unsigned long long)le64_to_cpu(u1->c),
381 (unsigned long long)le64_to_cpu(u1->d),
382 (unsigned long long)buffer_info->dma,
383 buffer_info->skb);
84f4ee90
TI		 384
385 if (netif_msg_pktdata(adapter))
386 print_hex_dump(KERN_INFO, "",
387 DUMP_PREFIX_ADDRESS, 16, 1,
388 phys_to_virt(buffer_info->dma),
389 adapter->rx_ps_bsize0, true);
390 }
391
392 if (i == rx_ring->next_to_use)
393 printk(KERN_CONT " NTU\n");
394 else if (i == rx_ring->next_to_clean)
395 printk(KERN_CONT " NTC\n");
396 else
397 printk(KERN_CONT "\n");
398 }
399 break;
400 default:
401 case 0:
402 /* Legacy Receive Descriptor Format
403 *
404 * +-----------------------------------------------------+
405 * | Buffer Address [63:0] |
406 * +-----------------------------------------------------+
407 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
408 * +-----------------------------------------------------+
409 * 63 48 47 40 39 32 31 16 15 0
410 */
411 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
af667a29
BA		 412 "[vl er S cks ln] [bi->dma ] [bi->skb] "
413 "<-- Legacy format\n");
84f4ee90
TI		 414 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
415 rx_desc = E1000_RX_DESC(*rx_ring, i);
416 buffer_info = &rx_ring->buffer_info[i];
417 u0 = (struct my_u0 *)rx_desc;
418 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
af667a29
BA		 419 "%016llX %p", i,
420 (unsigned long long)le64_to_cpu(u0->a),
421 (unsigned long long)le64_to_cpu(u0->b),
422 (unsigned long long)buffer_info->dma,
423 buffer_info->skb);
84f4ee90
TI		 424 if (i == rx_ring->next_to_use)
425 printk(KERN_CONT " NTU\n");
426 else if (i == rx_ring->next_to_clean)
427 printk(KERN_CONT " NTC\n");
428 else
429 printk(KERN_CONT "\n");
430
431 if (netif_msg_pktdata(adapter))
432 print_hex_dump(KERN_INFO, "",
af667a29
BA		 433 DUMP_PREFIX_ADDRESS,
434 16, 1,
435 phys_to_virt(buffer_info->dma),
436 adapter->rx_buffer_len, true);
84f4ee90
TI		 437 }
438 }
439
440exit:
441 return;
442}
443
bc7f75fa
AK		 444/**
445 * e1000_desc_unused - calculate if we have unused descriptors
446 **/
447static int e1000_desc_unused(struct e1000_ring *ring)
448{
449 if (ring->next_to_clean > ring->next_to_use)
450 return ring->next_to_clean - ring->next_to_use - 1;
451
452 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
453}
454
455/**
ad68076e 456 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 457 * @adapter: board private structure
458 * @status: descriptor status field as written by hardware
459 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
460 * @skb: pointer to sk_buff to be indicated to stack
461 **/
462static void e1000_receive_skb(struct e1000_adapter *adapter,
af667a29 463 struct net_device *netdev, struct sk_buff *skb,
a39fe742 464 u8 status, __le16 vlan)
bc7f75fa 465{
86d70e53 466 u16 tag = le16_to_cpu(vlan);
bc7f75fa
AK		 467 skb->protocol = eth_type_trans(skb, netdev);
468
86d70e53
JK		 469 if (status & E1000_RXD_STAT_VP)
470 __vlan_hwaccel_put_tag(skb, tag);
471
472 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 473}
474
475/**
af667a29 476 * e1000_rx_checksum - Receive Checksum Offload
bc7f75fa
AK		 477 * @adapter: board private structure
478 * @status_err: receive descriptor status and error fields
479 * @csum: receive descriptor csum field
480 * @sk_buff: socket buffer with received data
481 **/
482static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
483 u32 csum, struct sk_buff *skb)
484{
485 u16 status = (u16)status_err;
486 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 487
488 skb_checksum_none_assert(skb);
bc7f75fa
AK		 489
490 /* Ignore Checksum bit is set */
491 if (status & E1000_RXD_STAT_IXSM)
492 return;
493 /* TCP/UDP checksum error bit is set */
494 if (errors & E1000_RXD_ERR_TCPE) {
495 /* let the stack verify checksum errors */
496 adapter->hw_csum_err++;
497 return;
498 }
499
500 /* TCP/UDP Checksum has not been calculated */
501 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
502 return;
503
504 /* It must be a TCP or UDP packet with a valid checksum */
505 if (status & E1000_RXD_STAT_TCPCS) {
506 /* TCP checksum is good */
507 skb->ip_summed = CHECKSUM_UNNECESSARY;
508 } else {
ad68076e
BA		 509 /*
510 * IP fragment with UDP payload
511 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 512 * and then put the value in host order for further stack use.
513 */
a39fe742
AV		 514 __sum16 sum = (__force __sum16)htons(csum);
515 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 516 skb->ip_summed = CHECKSUM_COMPLETE;
517 }
518 adapter->hw_csum_good++;
519}
520
521/**
522 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
523 * @adapter: address of board private structure
524 **/
525static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
526 int cleaned_count)
527{
528 struct net_device *netdev = adapter->netdev;
529 struct pci_dev *pdev = adapter->pdev;
530 struct e1000_ring *rx_ring = adapter->rx_ring;
531 struct e1000_rx_desc *rx_desc;
532 struct e1000_buffer *buffer_info;
533 struct sk_buff *skb;
534 unsigned int i;
89d71a66 535 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 536
537 i = rx_ring->next_to_use;
538 buffer_info = &rx_ring->buffer_info[i];
539
540 while (cleaned_count--) {
541 skb = buffer_info->skb;
542 if (skb) {
543 skb_trim(skb, 0);
544 goto map_skb;
545 }
546
89d71a66 547 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 548 if (!skb) {
549 /* Better luck next round */
550 adapter->alloc_rx_buff_failed++;
551 break;
552 }
553
bc7f75fa
AK		 554 buffer_info->skb = skb;
555map_skb:
0be3f55f 556 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 557 adapter->rx_buffer_len,
0be3f55f
NN		 558 DMA_FROM_DEVICE);
559 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
af667a29 560 dev_err(&pdev->dev, "Rx DMA map failed\n");
bc7f75fa
AK		 561 adapter->rx_dma_failed++;
562 break;
563 }
564
565 rx_desc = E1000_RX_DESC(*rx_ring, i);
566 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
567
50849d79
TH		 568 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
569 /*
570 * Force memory writes to complete before letting h/w
571 * know there are new descriptors to fetch. (Only
572 * applicable for weak-ordered memory model archs,
573 * such as IA-64).
574 */
575 wmb();
576 writel(i, adapter->hw.hw_addr + rx_ring->tail);
577 }
bc7f75fa
AK		 578 i++;
579 if (i == rx_ring->count)
580 i = 0;
581 buffer_info = &rx_ring->buffer_info[i];
582 }
583
50849d79 584 rx_ring->next_to_use = i;
bc7f75fa
AK		 585}
586
587/**
588 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
589 * @adapter: address of board private structure
590 **/
591static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
592 int cleaned_count)
593{
594 struct net_device *netdev = adapter->netdev;
595 struct pci_dev *pdev = adapter->pdev;
596 union e1000_rx_desc_packet_split *rx_desc;
597 struct e1000_ring *rx_ring = adapter->rx_ring;
598 struct e1000_buffer *buffer_info;
599 struct e1000_ps_page *ps_page;
600 struct sk_buff *skb;
601 unsigned int i, j;
602
603 i = rx_ring->next_to_use;
604 buffer_info = &rx_ring->buffer_info[i];
605
606 while (cleaned_count--) {
607 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
608
609 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 610 ps_page = &buffer_info->ps_pages[j];
611 if (j >= adapter->rx_ps_pages) {
612 /* all unused desc entries get hw null ptr */
af667a29
BA		 613 rx_desc->read.buffer_addr[j + 1] =
614 ~cpu_to_le64(0);
47f44e40
AK		 615 continue;
616 }
617 if (!ps_page->page) {
618 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 619 if (!ps_page->page) {
47f44e40
AK		 620 adapter->alloc_rx_buff_failed++;
621 goto no_buffers;
622 }
0be3f55f
NN		 623 ps_page->dma = dma_map_page(&pdev->dev,
624 ps_page->page,
625 0, PAGE_SIZE,
626 DMA_FROM_DEVICE);
627 if (dma_mapping_error(&pdev->dev,
628 ps_page->dma)) {
47f44e40 629 dev_err(&adapter->pdev->dev,
af667a29 630 "Rx DMA page map failed\n");
47f44e40
AK		 631 adapter->rx_dma_failed++;
632 goto no_buffers;
bc7f75fa 633 }
bc7f75fa 634 }
47f44e40
AK		 635 /*
636 * Refresh the desc even if buffer_addrs
637 * didn't change because each write-back
638 * erases this info.
639 */
af667a29
BA		 640 rx_desc->read.buffer_addr[j + 1] =
641 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 642 }
643
89d71a66
ED		 644 skb = netdev_alloc_skb_ip_align(netdev,
645 adapter->rx_ps_bsize0);
bc7f75fa
AK		 646
647 if (!skb) {
648 adapter->alloc_rx_buff_failed++;
649 break;
650 }
651
bc7f75fa 652 buffer_info->skb = skb;
0be3f55f 653 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 654 adapter->rx_ps_bsize0,
0be3f55f
NN		 655 DMA_FROM_DEVICE);
656 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
af667a29 657 dev_err(&pdev->dev, "Rx DMA map failed\n");
bc7f75fa
AK		 658 adapter->rx_dma_failed++;
659 /* cleanup skb */
660 dev_kfree_skb_any(skb);
661 buffer_info->skb = NULL;
662 break;
663 }
664
665 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
666
50849d79
TH		 667 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
668 /*
669 * Force memory writes to complete before letting h/w
670 * know there are new descriptors to fetch. (Only
671 * applicable for weak-ordered memory model archs,
672 * such as IA-64).
673 */
674 wmb();
af667a29 675 writel(i << 1, adapter->hw.hw_addr + rx_ring->tail);
50849d79
TH		 676 }
677
bc7f75fa
AK		 678 i++;
679 if (i == rx_ring->count)
680 i = 0;
681 buffer_info = &rx_ring->buffer_info[i];
682 }
683
684no_buffers:
50849d79 685 rx_ring->next_to_use = i;
bc7f75fa
AK		 686}
687
97ac8cae
BA		 688/**
689 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
690 * @adapter: address of board private structure
97ac8cae
BA		 691 * @cleaned_count: number of buffers to allocate this pass
692 **/
693
694static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
695 int cleaned_count)
696{
697 struct net_device *netdev = adapter->netdev;
698 struct pci_dev *pdev = adapter->pdev;
699 struct e1000_rx_desc *rx_desc;
700 struct e1000_ring *rx_ring = adapter->rx_ring;
701 struct e1000_buffer *buffer_info;
702 struct sk_buff *skb;
703 unsigned int i;
89d71a66 704 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 705
706 i = rx_ring->next_to_use;
707 buffer_info = &rx_ring->buffer_info[i];
708
709 while (cleaned_count--) {
710 skb = buffer_info->skb;
711 if (skb) {
712 skb_trim(skb, 0);
713 goto check_page;
714 }
715
89d71a66 716 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 717 if (unlikely(!skb)) {
718 /* Better luck next round */
719 adapter->alloc_rx_buff_failed++;
720 break;
721 }
722
97ac8cae
BA		 723 buffer_info->skb = skb;
724check_page:
725 /* allocate a new page if necessary */
726 if (!buffer_info->page) {
727 buffer_info->page = alloc_page(GFP_ATOMIC);
728 if (unlikely(!buffer_info->page)) {
729 adapter->alloc_rx_buff_failed++;
730 break;
731 }
732 }
733
734 if (!buffer_info->dma)
0be3f55f 735 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 736 buffer_info->page, 0,
737 PAGE_SIZE,
0be3f55f 738 DMA_FROM_DEVICE);
97ac8cae
BA		 739
740 rx_desc = E1000_RX_DESC(*rx_ring, i);
741 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
742
743 if (unlikely(++i == rx_ring->count))
744 i = 0;
745 buffer_info = &rx_ring->buffer_info[i];
746 }
747
748 if (likely(rx_ring->next_to_use != i)) {
749 rx_ring->next_to_use = i;
750 if (unlikely(i-- == 0))
751 i = (rx_ring->count - 1);
752
753 /* Force memory writes to complete before letting h/w
754 * know there are new descriptors to fetch. (Only
755 * applicable for weak-ordered memory model archs,
756 * such as IA-64). */
757 wmb();
758 writel(i, adapter->hw.hw_addr + rx_ring->tail);
759 }
760}
761
bc7f75fa
AK		 762/**
763 * e1000_clean_rx_irq - Send received data up the network stack; legacy
764 * @adapter: board private structure
765 *
766 * the return value indicates whether actual cleaning was done, there
767 * is no guarantee that everything was cleaned
768 **/
769static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
770 int *work_done, int work_to_do)
771{
772 struct net_device *netdev = adapter->netdev;
773 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 774 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 775 struct e1000_ring *rx_ring = adapter->rx_ring;
776 struct e1000_rx_desc *rx_desc, *next_rxd;
777 struct e1000_buffer *buffer_info, *next_buffer;
778 u32 length;
779 unsigned int i;
780 int cleaned_count = 0;
781 bool cleaned = 0;
782 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
783
784 i = rx_ring->next_to_clean;
785 rx_desc = E1000_RX_DESC(*rx_ring, i);
786 buffer_info = &rx_ring->buffer_info[i];
787
788 while (rx_desc->status & E1000_RXD_STAT_DD) {
789 struct sk_buff *skb;
790 u8 status;
791
792 if (*work_done >= work_to_do)
793 break;
794 (*work_done)++;
2d0bb1c1 795 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 796
797 status = rx_desc->status;
798 skb = buffer_info->skb;
799 buffer_info->skb = NULL;
800
801 prefetch(skb->data - NET_IP_ALIGN);
802
803 i++;
804 if (i == rx_ring->count)
805 i = 0;
806 next_rxd = E1000_RX_DESC(*rx_ring, i);
807 prefetch(next_rxd);
808
809 next_buffer = &rx_ring->buffer_info[i];
810
811 cleaned = 1;
812 cleaned_count++;
0be3f55f 813 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 814 buffer_info->dma,
815 adapter->rx_buffer_len,
0be3f55f 816 DMA_FROM_DEVICE);
bc7f75fa
AK		 817 buffer_info->dma = 0;
818
819 length = le16_to_cpu(rx_desc->length);
820
b94b5028
JB		 821 /*
822 * !EOP means multiple descriptors were used to store a single
823 * packet, if that's the case we need to toss it. In fact, we
824 * need to toss every packet with the EOP bit clear and the
825 * next frame that _does_ have the EOP bit set, as it is by
826 * definition only a frame fragment
827 */
828 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
829 adapter->flags2 |= FLAG2_IS_DISCARDING;
830
831 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 832 /* All receives must fit into a single buffer */
3bb99fe2 833 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 834 /* recycle */
835 buffer_info->skb = skb;
b94b5028
JB		 836 if (status & E1000_RXD_STAT_EOP)
837 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 838 goto next_desc;
839 }
840
841 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
842 /* recycle */
843 buffer_info->skb = skb;
844 goto next_desc;
845 }
846
eb7c3adb
JK		 847 /* adjust length to remove Ethernet CRC */
848 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
849 length -= 4;
850
bc7f75fa
AK		 851 total_rx_bytes += length;
852 total_rx_packets++;
853
ad68076e
BA		 854 /*
855 * code added for copybreak, this should improve
bc7f75fa 856 * performance for small packets with large amounts
ad68076e
BA		 857 * of reassembly being done in the stack
858 */
bc7f75fa
AK		 859 if (length < copybreak) {
860 struct sk_buff *new_skb =
89d71a66 861 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 862 if (new_skb) {
808ff676
BA		 863 skb_copy_to_linear_data_offset(new_skb,
864 -NET_IP_ALIGN,
865 (skb->data -
866 NET_IP_ALIGN),
867 (length +
868 NET_IP_ALIGN));
bc7f75fa
AK		 869 /* save the skb in buffer_info as good */
870 buffer_info->skb = skb;
871 skb = new_skb;
872 }
873 /* else just continue with the old one */
874 }
875 /* end copybreak code */
876 skb_put(skb, length);
877
878 /* Receive Checksum Offload */
879 e1000_rx_checksum(adapter,
880 (u32)(status) |
881 ((u32)(rx_desc->errors) << 24),
882 le16_to_cpu(rx_desc->csum), skb);
883
884 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
885
886next_desc:
887 rx_desc->status = 0;
888
889 /* return some buffers to hardware, one at a time is too slow */
890 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
891 adapter->alloc_rx_buf(adapter, cleaned_count);
892 cleaned_count = 0;
893 }
894
895 /* use prefetched values */
896 rx_desc = next_rxd;
897 buffer_info = next_buffer;
898 }
899 rx_ring->next_to_clean = i;
900
901 cleaned_count = e1000_desc_unused(rx_ring);
902 if (cleaned_count)
903 adapter->alloc_rx_buf(adapter, cleaned_count);
904
bc7f75fa 905 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 906 adapter->total_rx_packets += total_rx_packets;
bc7f75fa
AK		 907 return cleaned;
908}
909
bc7f75fa
AK		 910static void e1000_put_txbuf(struct e1000_adapter *adapter,
911 struct e1000_buffer *buffer_info)
912{
03b1320d
AD		 913 if (buffer_info->dma) {
914 if (buffer_info->mapped_as_page)
0be3f55f
NN		 915 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
916 buffer_info->length, DMA_TO_DEVICE);
03b1320d 917 else
0be3f55f
NN		 918 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
919 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 920 buffer_info->dma = 0;
921 }
bc7f75fa
AK		 922 if (buffer_info->skb) {
923 dev_kfree_skb_any(buffer_info->skb);
924 buffer_info->skb = NULL;
925 }
1b7719c4 926 buffer_info->time_stamp = 0;
bc7f75fa
AK		 927}
928
41cec6f1 929static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 930{
41cec6f1
BA		 931 struct e1000_adapter *adapter = container_of(work,
932 struct e1000_adapter,
933 print_hang_task);
bc7f75fa
AK		 934 struct e1000_ring *tx_ring = adapter->tx_ring;
935 unsigned int i = tx_ring->next_to_clean;
936 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
937 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 938 struct e1000_hw *hw = &adapter->hw;
939 u16 phy_status, phy_1000t_status, phy_ext_status;
940 u16 pci_status;
941
615b32af
JB		 942 if (test_bit(__E1000_DOWN, &adapter->state))
943 return;
944
41cec6f1
BA		 945 e1e_rphy(hw, PHY_STATUS, &phy_status);
946 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
947 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 948
41cec6f1
BA		 949 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
950
951 /* detected Hardware unit hang */
952 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 953 " TDH <%x>\n"
954 " TDT <%x>\n"
955 " next_to_use <%x>\n"
956 " next_to_clean <%x>\n"
957 "buffer_info[next_to_clean]:\n"
958 " time_stamp <%lx>\n"
959 " next_to_watch <%x>\n"
960 " jiffies <%lx>\n"
41cec6f1
BA		 961 " next_to_watch.status <%x>\n"
962 "MAC Status <%x>\n"
963 "PHY Status <%x>\n"
964 "PHY 1000BASE-T Status <%x>\n"
965 "PHY Extended Status <%x>\n"
966 "PCI Status <%x>\n",
44defeb3
JK		 967 readl(adapter->hw.hw_addr + tx_ring->head),
968 readl(adapter->hw.hw_addr + tx_ring->tail),
969 tx_ring->next_to_use,
970 tx_ring->next_to_clean,
971 tx_ring->buffer_info[eop].time_stamp,
972 eop,
973 jiffies,
41cec6f1
BA		 974 eop_desc->upper.fields.status,
975 er32(STATUS),
976 phy_status,
977 phy_1000t_status,
978 phy_ext_status,
979 pci_status);
bc7f75fa
AK		 980}
981
982/**
983 * e1000_clean_tx_irq - Reclaim resources after transmit completes
984 * @adapter: board private structure
985 *
986 * the return value indicates whether actual cleaning was done, there
987 * is no guarantee that everything was cleaned
988 **/
989static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
990{
991 struct net_device *netdev = adapter->netdev;
992 struct e1000_hw *hw = &adapter->hw;
993 struct e1000_ring *tx_ring = adapter->tx_ring;
994 struct e1000_tx_desc *tx_desc, *eop_desc;
995 struct e1000_buffer *buffer_info;
996 unsigned int i, eop;
997 unsigned int count = 0;
bc7f75fa
AK		 998 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
999
1000 i = tx_ring->next_to_clean;
1001 eop = tx_ring->buffer_info[i].next_to_watch;
1002 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1003
12d04a3c
AD		 1004 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1005 (count < tx_ring->count)) {
a86043c2 1006 bool cleaned = false;
2d0bb1c1 1007 rmb(); /* read buffer_info after eop_desc */
a86043c2 1008 for (; !cleaned; count++) {
bc7f75fa
AK		 1009 tx_desc = E1000_TX_DESC(*tx_ring, i);
1010 buffer_info = &tx_ring->buffer_info[i];
1011 cleaned = (i == eop);
1012
1013 if (cleaned) {
9ed318d5
TH		 1014 total_tx_packets += buffer_info->segs;
1015 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1016 }
1017
1018 e1000_put_txbuf(adapter, buffer_info);
1019 tx_desc->upper.data = 0;
1020
1021 i++;
1022 if (i == tx_ring->count)
1023 i = 0;
1024 }
1025
dac87619
TL		 1026 if (i == tx_ring->next_to_use)
1027 break;
bc7f75fa
AK		 1028 eop = tx_ring->buffer_info[i].next_to_watch;
1029 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1030 }
1031
1032 tx_ring->next_to_clean = i;
1033
1034#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1035 if (count && netif_carrier_ok(netdev) &&
1036 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1037 /* Make sure that anybody stopping the queue after this
1038 * sees the new next_to_clean.
1039 */
1040 smp_mb();
1041
1042 if (netif_queue_stopped(netdev) &&
1043 !(test_bit(__E1000_DOWN, &adapter->state))) {
1044 netif_wake_queue(netdev);
1045 ++adapter->restart_queue;
1046 }
1047 }
1048
1049 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1050 /*
1051 * Detect a transmit hang in hardware, this serializes the
1052 * check with the clearing of time_stamp and movement of i
1053 */
bc7f75fa 1054 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1055 if (tx_ring->buffer_info[i].time_stamp &&
1056 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1057 + (adapter->tx_timeout_factor * HZ)) &&
1058 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1059 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1060 netif_stop_queue(netdev);
1061 }
1062 }
1063 adapter->total_tx_bytes += total_tx_bytes;
1064 adapter->total_tx_packets += total_tx_packets;
807540ba 1065 return count < tx_ring->count;
bc7f75fa
AK		 1066}
1067
bc7f75fa
AK		 1068/**
1069 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1070 * @adapter: board private structure
1071 *
1072 * the return value indicates whether actual cleaning was done, there
1073 * is no guarantee that everything was cleaned
1074 **/
1075static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1076 int *work_done, int work_to_do)
1077{
3bb99fe2 1078 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1079 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1080 struct net_device *netdev = adapter->netdev;
1081 struct pci_dev *pdev = adapter->pdev;
1082 struct e1000_ring *rx_ring = adapter->rx_ring;
1083 struct e1000_buffer *buffer_info, *next_buffer;
1084 struct e1000_ps_page *ps_page;
1085 struct sk_buff *skb;
1086 unsigned int i, j;
1087 u32 length, staterr;
1088 int cleaned_count = 0;
1089 bool cleaned = 0;
1090 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1091
1092 i = rx_ring->next_to_clean;
1093 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1094 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1095 buffer_info = &rx_ring->buffer_info[i];
1096
1097 while (staterr & E1000_RXD_STAT_DD) {
1098 if (*work_done >= work_to_do)
1099 break;
1100 (*work_done)++;
1101 skb = buffer_info->skb;
2d0bb1c1 1102 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1103
1104 /* in the packet split case this is header only */
1105 prefetch(skb->data - NET_IP_ALIGN);
1106
1107 i++;
1108 if (i == rx_ring->count)
1109 i = 0;
1110 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1111 prefetch(next_rxd);
1112
1113 next_buffer = &rx_ring->buffer_info[i];
1114
1115 cleaned = 1;
1116 cleaned_count++;
0be3f55f 1117 dma_unmap_single(&pdev->dev, buffer_info->dma,
af667a29 1118 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
bc7f75fa
AK		 1119 buffer_info->dma = 0;
1120
af667a29 1121 /* see !EOP comment in other Rx routine */
b94b5028
JB		 1122 if (!(staterr & E1000_RXD_STAT_EOP))
1123 adapter->flags2 |= FLAG2_IS_DISCARDING;
1124
1125 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1126 e_dbg("Packet Split buffers didn't pick up the full "
1127 "packet\n");
bc7f75fa 1128 dev_kfree_skb_irq(skb);
b94b5028
JB		 1129 if (staterr & E1000_RXD_STAT_EOP)
1130 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1131 goto next_desc;
1132 }
1133
1134 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1135 dev_kfree_skb_irq(skb);
1136 goto next_desc;
1137 }
1138
1139 length = le16_to_cpu(rx_desc->wb.middle.length0);
1140
1141 if (!length) {
3bb99fe2
BA		 1142 e_dbg("Last part of the packet spanning multiple "
1143 "descriptors\n");
bc7f75fa
AK		 1144 dev_kfree_skb_irq(skb);
1145 goto next_desc;
1146 }
1147
1148 /* Good Receive */
1149 skb_put(skb, length);
1150
1151 {
ad68076e
BA		 1152 /*
1153 * this looks ugly, but it seems compiler issues make it
1154 * more efficient than reusing j
1155 */
bc7f75fa
AK		 1156 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1157
ad68076e
BA		 1158 /*
1159 * page alloc/put takes too long and effects small packet
1160 * throughput, so unsplit small packets and save the alloc/put
1161 * only valid in softirq (napi) context to call kmap_*
1162 */
bc7f75fa
AK		 1163 if (l1 && (l1 <= copybreak) &&
1164 ((length + l1) <= adapter->rx_ps_bsize0)) {
1165 u8 *vaddr;
1166
47f44e40 1167 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1168
ad68076e
BA		 1169 /*
1170 * there is no documentation about how to call
bc7f75fa 1171 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1172 * very long
1173 */
0be3f55f
NN		 1174 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1175 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1176 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1177 memcpy(skb_tail_pointer(skb), vaddr, l1);
1178 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1179 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1180 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1181
eb7c3adb
JK		 1182 /* remove the CRC */
1183 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1184 l1 -= 4;
1185
bc7f75fa
AK		 1186 skb_put(skb, l1);
1187 goto copydone;
1188 } /* if */
1189 }
1190
1191 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1192 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1193 if (!length)
1194 break;
1195
47f44e40 1196 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1197 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1198 DMA_FROM_DEVICE);
bc7f75fa
AK		 1199 ps_page->dma = 0;
1200 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1201 ps_page->page = NULL;
1202 skb->len += length;
1203 skb->data_len += length;
1204 skb->truesize += length;
1205 }
1206
eb7c3adb
JK		 1207 /* strip the ethernet crc, problem is we're using pages now so
1208 * this whole operation can get a little cpu intensive
1209 */
1210 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1211 pskb_trim(skb, skb->len - 4);
1212
bc7f75fa
AK		 1213copydone:
1214 total_rx_bytes += skb->len;
1215 total_rx_packets++;
1216
1217 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1218 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1219
1220 if (rx_desc->wb.upper.header_status &
1221 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1222 adapter->rx_hdr_split++;
1223
1224 e1000_receive_skb(adapter, netdev, skb,
1225 staterr, rx_desc->wb.middle.vlan);
1226
1227next_desc:
1228 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1229 buffer_info->skb = NULL;
1230
1231 /* return some buffers to hardware, one at a time is too slow */
1232 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1233 adapter->alloc_rx_buf(adapter, cleaned_count);
1234 cleaned_count = 0;
1235 }
1236
1237 /* use prefetched values */
1238 rx_desc = next_rxd;
1239 buffer_info = next_buffer;
1240
1241 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1242 }
1243 rx_ring->next_to_clean = i;
1244
1245 cleaned_count = e1000_desc_unused(rx_ring);
1246 if (cleaned_count)
1247 adapter->alloc_rx_buf(adapter, cleaned_count);
1248
bc7f75fa 1249 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1250 adapter->total_rx_packets += total_rx_packets;
bc7f75fa
AK		 1251 return cleaned;
1252}
1253
97ac8cae
BA		 1254/**
1255 * e1000_consume_page - helper function
1256 **/
1257static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1258 u16 length)
1259{
1260 bi->page = NULL;
1261 skb->len += length;
1262 skb->data_len += length;
1263 skb->truesize += length;
1264}
1265
1266/**
1267 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1268 * @adapter: board private structure
1269 *
1270 * the return value indicates whether actual cleaning was done, there
1271 * is no guarantee that everything was cleaned
1272 **/
1273
1274static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1275 int *work_done, int work_to_do)
1276{
1277 struct net_device *netdev = adapter->netdev;
1278 struct pci_dev *pdev = adapter->pdev;
1279 struct e1000_ring *rx_ring = adapter->rx_ring;
1280 struct e1000_rx_desc *rx_desc, *next_rxd;
1281 struct e1000_buffer *buffer_info, *next_buffer;
1282 u32 length;
1283 unsigned int i;
1284 int cleaned_count = 0;
1285 bool cleaned = false;
1286 unsigned int total_rx_bytes=0, total_rx_packets=0;
1287
1288 i = rx_ring->next_to_clean;
1289 rx_desc = E1000_RX_DESC(*rx_ring, i);
1290 buffer_info = &rx_ring->buffer_info[i];
1291
1292 while (rx_desc->status & E1000_RXD_STAT_DD) {
1293 struct sk_buff *skb;
1294 u8 status;
1295
1296 if (*work_done >= work_to_do)
1297 break;
1298 (*work_done)++;
2d0bb1c1 1299 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae
BA		 1300
1301 status = rx_desc->status;
1302 skb = buffer_info->skb;
1303 buffer_info->skb = NULL;
1304
1305 ++i;
1306 if (i == rx_ring->count)
1307 i = 0;
1308 next_rxd = E1000_RX_DESC(*rx_ring, i);
1309 prefetch(next_rxd);
1310
1311 next_buffer = &rx_ring->buffer_info[i];
1312
1313 cleaned = true;
1314 cleaned_count++;
0be3f55f
NN		 1315 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1316 DMA_FROM_DEVICE);
97ac8cae
BA		 1317 buffer_info->dma = 0;
1318
1319 length = le16_to_cpu(rx_desc->length);
1320
1321 /* errors is only valid for DD + EOP descriptors */
1322 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1323 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1324 /* recycle both page and skb */
1325 buffer_info->skb = skb;
1326 /* an error means any chain goes out the window
1327 * too */
1328 if (rx_ring->rx_skb_top)
ef5ab89c 1329 dev_kfree_skb_irq(rx_ring->rx_skb_top);
97ac8cae
BA		 1330 rx_ring->rx_skb_top = NULL;
1331 goto next_desc;
1332 }
1333
f0f1a172 1334#define rxtop (rx_ring->rx_skb_top)
97ac8cae
BA		 1335 if (!(status & E1000_RXD_STAT_EOP)) {
1336 /* this descriptor is only the beginning (or middle) */
1337 if (!rxtop) {
1338 /* this is the beginning of a chain */
1339 rxtop = skb;
1340 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1341 0, length);
1342 } else {
1343 /* this is the middle of a chain */
1344 skb_fill_page_desc(rxtop,
1345 skb_shinfo(rxtop)->nr_frags,
1346 buffer_info->page, 0, length);
1347 /* re-use the skb, only consumed the page */
1348 buffer_info->skb = skb;
1349 }
1350 e1000_consume_page(buffer_info, rxtop, length);
1351 goto next_desc;
1352 } else {
1353 if (rxtop) {
1354 /* end of the chain */
1355 skb_fill_page_desc(rxtop,
1356 skb_shinfo(rxtop)->nr_frags,
1357 buffer_info->page, 0, length);
1358 /* re-use the current skb, we only consumed the
1359 * page */
1360 buffer_info->skb = skb;
1361 skb = rxtop;
1362 rxtop = NULL;
1363 e1000_consume_page(buffer_info, skb, length);
1364 } else {
1365 /* no chain, got EOP, this buf is the packet
1366 * copybreak to save the put_page/alloc_page */
1367 if (length <= copybreak &&
1368 skb_tailroom(skb) >= length) {
1369 u8 *vaddr;
1370 vaddr = kmap_atomic(buffer_info->page,
1371 KM_SKB_DATA_SOFTIRQ);
1372 memcpy(skb_tail_pointer(skb), vaddr,
1373 length);
1374 kunmap_atomic(vaddr,
1375 KM_SKB_DATA_SOFTIRQ);
1376 /* re-use the page, so don't erase
1377 * buffer_info->page */
1378 skb_put(skb, length);
1379 } else {
1380 skb_fill_page_desc(skb, 0,
1381 buffer_info->page, 0,
1382 length);
1383 e1000_consume_page(buffer_info, skb,
1384 length);
1385 }
1386 }
1387 }
1388
1389 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1390 e1000_rx_checksum(adapter,
1391 (u32)(status) |
1392 ((u32)(rx_desc->errors) << 24),
1393 le16_to_cpu(rx_desc->csum), skb);
1394
1395 /* probably a little skewed due to removing CRC */
1396 total_rx_bytes += skb->len;
1397 total_rx_packets++;
1398
1399 /* eth type trans needs skb->data to point to something */
1400 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1401 e_err("pskb_may_pull failed.\n");
ef5ab89c 1402 dev_kfree_skb_irq(skb);
97ac8cae
BA		 1403 goto next_desc;
1404 }
1405
1406 e1000_receive_skb(adapter, netdev, skb, status,
1407 rx_desc->special);
1408
1409next_desc:
1410 rx_desc->status = 0;
1411
1412 /* return some buffers to hardware, one at a time is too slow */
1413 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1414 adapter->alloc_rx_buf(adapter, cleaned_count);
1415 cleaned_count = 0;
1416 }
1417
1418 /* use prefetched values */
1419 rx_desc = next_rxd;
1420 buffer_info = next_buffer;
1421 }
1422 rx_ring->next_to_clean = i;
1423
1424 cleaned_count = e1000_desc_unused(rx_ring);
1425 if (cleaned_count)
1426 adapter->alloc_rx_buf(adapter, cleaned_count);
1427
1428 adapter->total_rx_bytes += total_rx_bytes;
1429 adapter->total_rx_packets += total_rx_packets;
97ac8cae
BA		 1430 return cleaned;
1431}
1432
bc7f75fa
AK		 1433/**
1434 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1435 * @adapter: board private structure
1436 **/
1437static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1438{
1439 struct e1000_ring *rx_ring = adapter->rx_ring;
1440 struct e1000_buffer *buffer_info;
1441 struct e1000_ps_page *ps_page;
1442 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1443 unsigned int i, j;
1444
1445 /* Free all the Rx ring sk_buffs */
1446 for (i = 0; i < rx_ring->count; i++) {
1447 buffer_info = &rx_ring->buffer_info[i];
1448 if (buffer_info->dma) {
1449 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1450 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1451 adapter->rx_buffer_len,
0be3f55f 1452 DMA_FROM_DEVICE);
97ac8cae 1453 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1454 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1455 PAGE_SIZE,
0be3f55f 1456 DMA_FROM_DEVICE);
bc7f75fa 1457 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1458 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1459 adapter->rx_ps_bsize0,
0be3f55f 1460 DMA_FROM_DEVICE);
bc7f75fa
AK		 1461 buffer_info->dma = 0;
1462 }
1463
97ac8cae
BA		 1464 if (buffer_info->page) {
1465 put_page(buffer_info->page);
1466 buffer_info->page = NULL;
1467 }
1468
bc7f75fa
AK		 1469 if (buffer_info->skb) {
1470 dev_kfree_skb(buffer_info->skb);
1471 buffer_info->skb = NULL;
1472 }
1473
1474 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1475 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1476 if (!ps_page->page)
1477 break;
0be3f55f
NN		 1478 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1479 DMA_FROM_DEVICE);
bc7f75fa
AK		 1480 ps_page->dma = 0;
1481 put_page(ps_page->page);
1482 ps_page->page = NULL;
1483 }
1484 }
1485
1486 /* there also may be some cached data from a chained receive */
1487 if (rx_ring->rx_skb_top) {
1488 dev_kfree_skb(rx_ring->rx_skb_top);
1489 rx_ring->rx_skb_top = NULL;
1490 }
1491
bc7f75fa
AK		 1492 /* Zero out the descriptor ring */
1493 memset(rx_ring->desc, 0, rx_ring->size);
1494
1495 rx_ring->next_to_clean = 0;
1496 rx_ring->next_to_use = 0;
b94b5028 1497 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1498
1499 writel(0, adapter->hw.hw_addr + rx_ring->head);
1500 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1501}
1502
a8f88ff5
JB		 1503static void e1000e_downshift_workaround(struct work_struct *work)
1504{
1505 struct e1000_adapter *adapter = container_of(work,
1506 struct e1000_adapter, downshift_task);
1507
615b32af
JB		 1508 if (test_bit(__E1000_DOWN, &adapter->state))
1509 return;
1510
a8f88ff5
JB		 1511 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1512}
1513
bc7f75fa
AK		 1514/**
1515 * e1000_intr_msi - Interrupt Handler
1516 * @irq: interrupt number
1517 * @data: pointer to a network interface device structure
1518 **/
1519static irqreturn_t e1000_intr_msi(int irq, void *data)
1520{
1521 struct net_device *netdev = data;
1522 struct e1000_adapter *adapter = netdev_priv(netdev);
1523 struct e1000_hw *hw = &adapter->hw;
1524 u32 icr = er32(ICR);
1525
ad68076e
BA		 1526 /*
1527 * read ICR disables interrupts using IAM
1528 */
bc7f75fa 1529
573cca8c 1530 if (icr & E1000_ICR_LSC) {
bc7f75fa 1531 hw->mac.get_link_status = 1;
ad68076e
BA		 1532 /*
1533 * ICH8 workaround-- Call gig speed drop workaround on cable
1534 * disconnect (LSC) before accessing any PHY registers
1535 */
bc7f75fa
AK		 1536 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1537 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1538 schedule_work(&adapter->downshift_task);
bc7f75fa 1539
ad68076e
BA		 1540 /*
1541 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1542 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1543 * adapter in watchdog
1544 */
bc7f75fa
AK		 1545 if (netif_carrier_ok(netdev) &&
1546 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1547 /* disable receives */
1548 u32 rctl = er32(RCTL);
1549 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1550 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1551 }
1552 /* guard against interrupt when we're going down */
1553 if (!test_bit(__E1000_DOWN, &adapter->state))
1554 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1555 }
1556
288379f0 1557 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1558 adapter->total_tx_bytes = 0;
1559 adapter->total_tx_packets = 0;
1560 adapter->total_rx_bytes = 0;
1561 adapter->total_rx_packets = 0;
288379f0 1562 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1563 }
1564
1565 return IRQ_HANDLED;
1566}
1567
1568/**
1569 * e1000_intr - Interrupt Handler
1570 * @irq: interrupt number
1571 * @data: pointer to a network interface device structure
1572 **/
1573static irqreturn_t e1000_intr(int irq, void *data)
1574{
1575 struct net_device *netdev = data;
1576 struct e1000_adapter *adapter = netdev_priv(netdev);
1577 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1578 u32 rctl, icr = er32(ICR);
4662e82b 1579
a68ea775 1580 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1581 return IRQ_NONE; /* Not our interrupt */
1582
ad68076e
BA		 1583 /*
1584 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1585 * not set, then the adapter didn't send an interrupt
1586 */
bc7f75fa
AK		 1587 if (!(icr & E1000_ICR_INT_ASSERTED))
1588 return IRQ_NONE;
1589
ad68076e
BA		 1590 /*
1591 * Interrupt Auto-Mask...upon reading ICR,
1592 * interrupts are masked. No need for the
1593 * IMC write
1594 */
bc7f75fa 1595
573cca8c 1596 if (icr & E1000_ICR_LSC) {
bc7f75fa 1597 hw->mac.get_link_status = 1;
ad68076e
BA		 1598 /*
1599 * ICH8 workaround-- Call gig speed drop workaround on cable
1600 * disconnect (LSC) before accessing any PHY registers
1601 */
bc7f75fa
AK		 1602 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1603 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1604 schedule_work(&adapter->downshift_task);
bc7f75fa 1605
ad68076e
BA		 1606 /*
1607 * 80003ES2LAN workaround--
bc7f75fa
AK		 1608 * For packet buffer work-around on link down event;
1609 * disable receives here in the ISR and
1610 * reset adapter in watchdog
1611 */
1612 if (netif_carrier_ok(netdev) &&
1613 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1614 /* disable receives */
1615 rctl = er32(RCTL);
1616 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1617 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1618 }
1619 /* guard against interrupt when we're going down */
1620 if (!test_bit(__E1000_DOWN, &adapter->state))
1621 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1622 }
1623
288379f0 1624 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1625 adapter->total_tx_bytes = 0;
1626 adapter->total_tx_packets = 0;
1627 adapter->total_rx_bytes = 0;
1628 adapter->total_rx_packets = 0;
288379f0 1629 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1630 }
1631
1632 return IRQ_HANDLED;
1633}
1634
4662e82b
BA		 1635static irqreturn_t e1000_msix_other(int irq, void *data)
1636{
1637 struct net_device *netdev = data;
1638 struct e1000_adapter *adapter = netdev_priv(netdev);
1639 struct e1000_hw *hw = &adapter->hw;
1640 u32 icr = er32(ICR);
1641
1642 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1643 if (!test_bit(__E1000_DOWN, &adapter->state))
1644 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1645 return IRQ_NONE;
1646 }
1647
1648 if (icr & adapter->eiac_mask)
1649 ew32(ICS, (icr & adapter->eiac_mask));
1650
1651 if (icr & E1000_ICR_OTHER) {
1652 if (!(icr & E1000_ICR_LSC))
1653 goto no_link_interrupt;
1654 hw->mac.get_link_status = 1;
1655 /* guard against interrupt when we're going down */
1656 if (!test_bit(__E1000_DOWN, &adapter->state))
1657 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1658 }
1659
1660no_link_interrupt:
a3c69fef
JB		 1661 if (!test_bit(__E1000_DOWN, &adapter->state))
1662 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1663
1664 return IRQ_HANDLED;
1665}
1666
1667
1668static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1669{
1670 struct net_device *netdev = data;
1671 struct e1000_adapter *adapter = netdev_priv(netdev);
1672 struct e1000_hw *hw = &adapter->hw;
1673 struct e1000_ring *tx_ring = adapter->tx_ring;
1674
1675
1676 adapter->total_tx_bytes = 0;
1677 adapter->total_tx_packets = 0;
1678
1679 if (!e1000_clean_tx_irq(adapter))
1680 /* Ring was not completely cleaned, so fire another interrupt */
1681 ew32(ICS, tx_ring->ims_val);
1682
1683 return IRQ_HANDLED;
1684}
1685
1686static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1687{
1688 struct net_device *netdev = data;
1689 struct e1000_adapter *adapter = netdev_priv(netdev);
1690
1691 /* Write the ITR value calculated at the end of the
1692 * previous interrupt.
1693 */
1694 if (adapter->rx_ring->set_itr) {
1695 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1696 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1697 adapter->rx_ring->set_itr = 0;
1698 }
1699
288379f0 1700 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1701 adapter->total_rx_bytes = 0;
1702 adapter->total_rx_packets = 0;
288379f0 1703 __napi_schedule(&adapter->napi);
4662e82b
BA		 1704 }
1705 return IRQ_HANDLED;
1706}
1707
1708/**
1709 * e1000_configure_msix - Configure MSI-X hardware
1710 *
1711 * e1000_configure_msix sets up the hardware to properly
1712 * generate MSI-X interrupts.
1713 **/
1714static void e1000_configure_msix(struct e1000_adapter *adapter)
1715{
1716 struct e1000_hw *hw = &adapter->hw;
1717 struct e1000_ring *rx_ring = adapter->rx_ring;
1718 struct e1000_ring *tx_ring = adapter->tx_ring;
1719 int vector = 0;
1720 u32 ctrl_ext, ivar = 0;
1721
1722 adapter->eiac_mask = 0;
1723
1724 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1725 if (hw->mac.type == e1000_82574) {
1726 u32 rfctl = er32(RFCTL);
1727 rfctl |= E1000_RFCTL_ACK_DIS;
1728 ew32(RFCTL, rfctl);
1729 }
1730
1731#define E1000_IVAR_INT_ALLOC_VALID 0x8
1732 /* Configure Rx vector */
1733 rx_ring->ims_val = E1000_IMS_RXQ0;
1734 adapter->eiac_mask |= rx_ring->ims_val;
1735 if (rx_ring->itr_val)
1736 writel(1000000000 / (rx_ring->itr_val * 256),
1737 hw->hw_addr + rx_ring->itr_register);
1738 else
1739 writel(1, hw->hw_addr + rx_ring->itr_register);
1740 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1741
1742 /* Configure Tx vector */
1743 tx_ring->ims_val = E1000_IMS_TXQ0;
1744 vector++;
1745 if (tx_ring->itr_val)
1746 writel(1000000000 / (tx_ring->itr_val * 256),
1747 hw->hw_addr + tx_ring->itr_register);
1748 else
1749 writel(1, hw->hw_addr + tx_ring->itr_register);
1750 adapter->eiac_mask |= tx_ring->ims_val;
1751 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1752
1753 /* set vector for Other Causes, e.g. link changes */
1754 vector++;
1755 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1756 if (rx_ring->itr_val)
1757 writel(1000000000 / (rx_ring->itr_val * 256),
1758 hw->hw_addr + E1000_EITR_82574(vector));
1759 else
1760 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1761
1762 /* Cause Tx interrupts on every write back */
1763 ivar |= (1 << 31);
1764
1765 ew32(IVAR, ivar);
1766
1767 /* enable MSI-X PBA support */
1768 ctrl_ext = er32(CTRL_EXT);
1769 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1770
1771 /* Auto-Mask Other interrupts upon ICR read */
1772#define E1000_EIAC_MASK_82574 0x01F00000
1773 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1774 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1775 ew32(CTRL_EXT, ctrl_ext);
1776 e1e_flush();
1777}
1778
1779void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1780{
1781 if (adapter->msix_entries) {
1782 pci_disable_msix(adapter->pdev);
1783 kfree(adapter->msix_entries);
1784 adapter->msix_entries = NULL;
1785 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1786 pci_disable_msi(adapter->pdev);
1787 adapter->flags &= ~FLAG_MSI_ENABLED;
1788 }
4662e82b
BA		 1789}
1790
1791/**
1792 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1793 *
1794 * Attempt to configure interrupts using the best available
1795 * capabilities of the hardware and kernel.
1796 **/
1797void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1798{
1799 int err;
8e86acd7 1800 int i;
4662e82b
BA		 1801
1802 switch (adapter->int_mode) {
1803 case E1000E_INT_MODE_MSIX:
1804 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1805 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1806 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1807 sizeof(struct msix_entry),
1808 GFP_KERNEL);
1809 if (adapter->msix_entries) {
8e86acd7 1810 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1811 adapter->msix_entries[i].entry = i;
1812
1813 err = pci_enable_msix(adapter->pdev,
1814 adapter->msix_entries,
8e86acd7 1815 adapter->num_vectors);
b1cdfead 1816 if (err == 0)
4662e82b
BA		 1817 return;
1818 }
1819 /* MSI-X failed, so fall through and try MSI */
1820 e_err("Failed to initialize MSI-X interrupts. "
1821 "Falling back to MSI interrupts.\n");
1822 e1000e_reset_interrupt_capability(adapter);
1823 }
1824 adapter->int_mode = E1000E_INT_MODE_MSI;
1825 /* Fall through */
1826 case E1000E_INT_MODE_MSI:
1827 if (!pci_enable_msi(adapter->pdev)) {
1828 adapter->flags |= FLAG_MSI_ENABLED;
1829 } else {
1830 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1831 e_err("Failed to initialize MSI interrupts. Falling "
1832 "back to legacy interrupts.\n");
1833 }
1834 /* Fall through */
1835 case E1000E_INT_MODE_LEGACY:
1836 /* Don't do anything; this is the system default */
1837 break;
1838 }
8e86acd7
JK		 1839
1840 /* store the number of vectors being used */
1841 adapter->num_vectors = 1;
4662e82b
BA		 1842}
1843
1844/**
1845 * e1000_request_msix - Initialize MSI-X interrupts
1846 *
1847 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1848 * kernel.
1849 **/
1850static int e1000_request_msix(struct e1000_adapter *adapter)
1851{
1852 struct net_device *netdev = adapter->netdev;
1853 int err = 0, vector = 0;
1854
1855 if (strlen(netdev->name) < (IFNAMSIZ - 5))
79f5e840
BA		 1856 snprintf(adapter->rx_ring->name,
1857 sizeof(adapter->rx_ring->name) - 1,
1858 "%s-rx-0", netdev->name);
4662e82b
BA		 1859 else
1860 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1861 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1862 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1863 netdev);
1864 if (err)
1865 goto out;
1866 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1867 adapter->rx_ring->itr_val = adapter->itr;
1868 vector++;
1869
1870 if (strlen(netdev->name) < (IFNAMSIZ - 5))
79f5e840
BA		 1871 snprintf(adapter->tx_ring->name,
1872 sizeof(adapter->tx_ring->name) - 1,
1873 "%s-tx-0", netdev->name);
4662e82b
BA		 1874 else
1875 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1876 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1877 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1878 netdev);
1879 if (err)
1880 goto out;
1881 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1882 adapter->tx_ring->itr_val = adapter->itr;
1883 vector++;
1884
1885 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1886 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1887 if (err)
1888 goto out;
1889
1890 e1000_configure_msix(adapter);
1891 return 0;
1892out:
1893 return err;
1894}
1895
f8d59f78
BA		 1896/**
1897 * e1000_request_irq - initialize interrupts
1898 *
1899 * Attempts to configure interrupts using the best available
1900 * capabilities of the hardware and kernel.
1901 **/
bc7f75fa
AK		 1902static int e1000_request_irq(struct e1000_adapter *adapter)
1903{
1904 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1905 int err;
1906
4662e82b
BA		 1907 if (adapter->msix_entries) {
1908 err = e1000_request_msix(adapter);
1909 if (!err)
1910 return err;
1911 /* fall back to MSI */
1912 e1000e_reset_interrupt_capability(adapter);
1913 adapter->int_mode = E1000E_INT_MODE_MSI;
1914 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1915 }
4662e82b 1916 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1917 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1918 netdev->name, netdev);
1919 if (!err)
1920 return err;
bc7f75fa 1921
4662e82b
BA		 1922 /* fall back to legacy interrupt */
1923 e1000e_reset_interrupt_capability(adapter);
1924 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1925 }
1926
a0607fd3 1927 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1928 netdev->name, netdev);
1929 if (err)
1930 e_err("Unable to allocate interrupt, Error: %d\n", err);
1931
bc7f75fa
AK		 1932 return err;
1933}
1934
1935static void e1000_free_irq(struct e1000_adapter *adapter)
1936{
1937 struct net_device *netdev = adapter->netdev;
1938
4662e82b
BA		 1939 if (adapter->msix_entries) {
1940 int vector = 0;
1941
1942 free_irq(adapter->msix_entries[vector].vector, netdev);
1943 vector++;
1944
1945 free_irq(adapter->msix_entries[vector].vector, netdev);
1946 vector++;
1947
1948 /* Other Causes interrupt vector */
1949 free_irq(adapter->msix_entries[vector].vector, netdev);
1950 return;
bc7f75fa 1951 }
4662e82b
BA		 1952
1953 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1954}
1955
1956/**
1957 * e1000_irq_disable - Mask off interrupt generation on the NIC
1958 **/
1959static void e1000_irq_disable(struct e1000_adapter *adapter)
1960{
1961 struct e1000_hw *hw = &adapter->hw;
1962
bc7f75fa 1963 ew32(IMC, ~0);
4662e82b
BA		 1964 if (adapter->msix_entries)
1965 ew32(EIAC_82574, 0);
bc7f75fa 1966 e1e_flush();
8e86acd7
JK		 1967
1968 if (adapter->msix_entries) {
1969 int i;
1970 for (i = 0; i < adapter->num_vectors; i++)
1971 synchronize_irq(adapter->msix_entries[i].vector);
1972 } else {
1973 synchronize_irq(adapter->pdev->irq);
1974 }
bc7f75fa
AK		 1975}
1976
1977/**
1978 * e1000_irq_enable - Enable default interrupt generation settings
1979 **/
1980static void e1000_irq_enable(struct e1000_adapter *adapter)
1981{
1982 struct e1000_hw *hw = &adapter->hw;
1983
4662e82b
BA		 1984 if (adapter->msix_entries) {
1985 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1986 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1987 } else {
1988 ew32(IMS, IMS_ENABLE_MASK);
1989 }
74ef9c39 1990 e1e_flush();
bc7f75fa
AK		 1991}
1992
1993/**
31dbe5b4 1994 * e1000e_get_hw_control - get control of the h/w from f/w
bc7f75fa
AK		 1995 * @adapter: address of board private structure
1996 *
31dbe5b4 1997 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1998 * For ASF and Pass Through versions of f/w this means that
1999 * the driver is loaded. For AMT version (only with 82573)
2000 * of the f/w this means that the network i/f is open.
2001 **/
31dbe5b4 2002void e1000e_get_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 2003{
2004 struct e1000_hw *hw = &adapter->hw;
2005 u32 ctrl_ext;
2006 u32 swsm;
2007
2008 /* Let firmware know the driver has taken over */
2009 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2010 swsm = er32(SWSM);
2011 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2012 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2013 ctrl_ext = er32(CTRL_EXT);
ad68076e 2014 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2015 }
2016}
2017
2018/**
31dbe5b4 2019 * e1000e_release_hw_control - release control of the h/w to f/w
bc7f75fa
AK		 2020 * @adapter: address of board private structure
2021 *
31dbe5b4 2022 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2023 * For ASF and Pass Through versions of f/w this means that the
2024 * driver is no longer loaded. For AMT version (only with 82573) i
2025 * of the f/w this means that the network i/f is closed.
2026 *
2027 **/
31dbe5b4 2028void e1000e_release_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 2029{
2030 struct e1000_hw *hw = &adapter->hw;
2031 u32 ctrl_ext;
2032 u32 swsm;
2033
2034 /* Let firmware taken over control of h/w */
2035 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2036 swsm = er32(SWSM);
2037 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2038 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2039 ctrl_ext = er32(CTRL_EXT);
ad68076e 2040 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2041 }
2042}
2043
bc7f75fa
AK		 2044/**
2045 * @e1000_alloc_ring - allocate memory for a ring structure
2046 **/
2047static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2048 struct e1000_ring *ring)
2049{
2050 struct pci_dev *pdev = adapter->pdev;
2051
2052 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2053 GFP_KERNEL);
2054 if (!ring->desc)
2055 return -ENOMEM;
2056
2057 return 0;
2058}
2059
2060/**
2061 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2062 * @adapter: board private structure
2063 *
2064 * Return 0 on success, negative on failure
2065 **/
2066int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2067{
2068 struct e1000_ring *tx_ring = adapter->tx_ring;
2069 int err = -ENOMEM, size;
2070
2071 size = sizeof(struct e1000_buffer) * tx_ring->count;
89bf67f1 2072 tx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2073 if (!tx_ring->buffer_info)
2074 goto err;
bc7f75fa
AK		 2075
2076 /* round up to nearest 4K */
2077 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2078 tx_ring->size = ALIGN(tx_ring->size, 4096);
2079
2080 err = e1000_alloc_ring_dma(adapter, tx_ring);
2081 if (err)
2082 goto err;
2083
2084 tx_ring->next_to_use = 0;
2085 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2086
2087 return 0;
2088err:
2089 vfree(tx_ring->buffer_info);
44defeb3 2090 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2091 return err;
2092}
2093
2094/**
2095 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2096 * @adapter: board private structure
2097 *
2098 * Returns 0 on success, negative on failure
2099 **/
2100int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2101{
2102 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2103 struct e1000_buffer *buffer_info;
2104 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2105
2106 size = sizeof(struct e1000_buffer) * rx_ring->count;
89bf67f1 2107 rx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2108 if (!rx_ring->buffer_info)
2109 goto err;
bc7f75fa 2110
47f44e40
AK		 2111 for (i = 0; i < rx_ring->count; i++) {
2112 buffer_info = &rx_ring->buffer_info[i];
2113 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2114 sizeof(struct e1000_ps_page),
2115 GFP_KERNEL);
2116 if (!buffer_info->ps_pages)
2117 goto err_pages;
2118 }
bc7f75fa
AK		 2119
2120 desc_len = sizeof(union e1000_rx_desc_packet_split);
2121
2122 /* Round up to nearest 4K */
2123 rx_ring->size = rx_ring->count * desc_len;
2124 rx_ring->size = ALIGN(rx_ring->size, 4096);
2125
2126 err = e1000_alloc_ring_dma(adapter, rx_ring);
2127 if (err)
47f44e40 2128 goto err_pages;
bc7f75fa
AK		 2129
2130 rx_ring->next_to_clean = 0;
2131 rx_ring->next_to_use = 0;
2132 rx_ring->rx_skb_top = NULL;
2133
2134 return 0;
47f44e40
AK		 2135
2136err_pages:
2137 for (i = 0; i < rx_ring->count; i++) {
2138 buffer_info = &rx_ring->buffer_info[i];
2139 kfree(buffer_info->ps_pages);
2140 }
bc7f75fa
AK		 2141err:
2142 vfree(rx_ring->buffer_info);
e9262447 2143 e_err("Unable to allocate memory for the receive descriptor ring\n");
bc7f75fa
AK		 2144 return err;
2145}
2146
2147/**
2148 * e1000_clean_tx_ring - Free Tx Buffers
2149 * @adapter: board private structure
2150 **/
2151static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2152{
2153 struct e1000_ring *tx_ring = adapter->tx_ring;
2154 struct e1000_buffer *buffer_info;
2155 unsigned long size;
2156 unsigned int i;
2157
2158 for (i = 0; i < tx_ring->count; i++) {
2159 buffer_info = &tx_ring->buffer_info[i];
2160 e1000_put_txbuf(adapter, buffer_info);
2161 }
2162
2163 size = sizeof(struct e1000_buffer) * tx_ring->count;
2164 memset(tx_ring->buffer_info, 0, size);
2165
2166 memset(tx_ring->desc, 0, tx_ring->size);
2167
2168 tx_ring->next_to_use = 0;
2169 tx_ring->next_to_clean = 0;
2170
2171 writel(0, adapter->hw.hw_addr + tx_ring->head);
2172 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2173}
2174
2175/**
2176 * e1000e_free_tx_resources - Free Tx Resources per Queue
2177 * @adapter: board private structure
2178 *
2179 * Free all transmit software resources
2180 **/
2181void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2182{
2183 struct pci_dev *pdev = adapter->pdev;
2184 struct e1000_ring *tx_ring = adapter->tx_ring;
2185
2186 e1000_clean_tx_ring(adapter);
2187
2188 vfree(tx_ring->buffer_info);
2189 tx_ring->buffer_info = NULL;
2190
2191 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2192 tx_ring->dma);
2193 tx_ring->desc = NULL;
2194}
2195
2196/**
2197 * e1000e_free_rx_resources - Free Rx Resources
2198 * @adapter: board private structure
2199 *
2200 * Free all receive software resources
2201 **/
2202
2203void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2204{
2205 struct pci_dev *pdev = adapter->pdev;
2206 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2207 int i;
bc7f75fa
AK		 2208
2209 e1000_clean_rx_ring(adapter);
2210
b1cdfead 2211 for (i = 0; i < rx_ring->count; i++)
47f44e40 2212 kfree(rx_ring->buffer_info[i].ps_pages);
47f44e40 2213
bc7f75fa
AK		 2214 vfree(rx_ring->buffer_info);
2215 rx_ring->buffer_info = NULL;
2216
bc7f75fa
AK		 2217 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2218 rx_ring->dma);
2219 rx_ring->desc = NULL;
2220}
2221
2222/**
2223 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2224 * @adapter: pointer to adapter
2225 * @itr_setting: current adapter->itr
2226 * @packets: the number of packets during this measurement interval
2227 * @bytes: the number of bytes during this measurement interval
2228 *
bc7f75fa
AK		 2229 * Stores a new ITR value based on packets and byte
2230 * counts during the last interrupt. The advantage of per interrupt
2231 * computation is faster updates and more accurate ITR for the current
2232 * traffic pattern. Constants in this function were computed
2233 * based on theoretical maximum wire speed and thresholds were set based
2234 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2235 * while increasing bulk throughput. This functionality is controlled
2236 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2237 **/
2238static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2239 u16 itr_setting, int packets,
2240 int bytes)
2241{
2242 unsigned int retval = itr_setting;
2243
2244 if (packets == 0)
2245 goto update_itr_done;
2246
2247 switch (itr_setting) {
2248 case lowest_latency:
2249 /* handle TSO and jumbo frames */
2250 if (bytes/packets > 8000)
2251 retval = bulk_latency;
b1cdfead 2252 else if ((packets < 5) && (bytes > 512))
bc7f75fa 2253 retval = low_latency;
bc7f75fa
AK		 2254 break;
2255 case low_latency: /* 50 usec aka 20000 ints/s */
2256 if (bytes > 10000) {
2257 /* this if handles the TSO accounting */
b1cdfead 2258 if (bytes/packets > 8000)
bc7f75fa 2259 retval = bulk_latency;
b1cdfead 2260 else if ((packets < 10) || ((bytes/packets) > 1200))
bc7f75fa 2261 retval = bulk_latency;
b1cdfead 2262 else if ((packets > 35))
bc7f75fa 2263 retval = lowest_latency;
bc7f75fa
AK		 2264 } else if (bytes/packets > 2000) {
2265 retval = bulk_latency;
2266 } else if (packets <= 2 && bytes < 512) {
2267 retval = lowest_latency;
2268 }
2269 break;
2270 case bulk_latency: /* 250 usec aka 4000 ints/s */
2271 if (bytes > 25000) {
b1cdfead 2272 if (packets > 35)
bc7f75fa 2273 retval = low_latency;
bc7f75fa
AK		 2274 } else if (bytes < 6000) {
2275 retval = low_latency;
2276 }
2277 break;
2278 }
2279
2280update_itr_done:
2281 return retval;
2282}
2283
2284static void e1000_set_itr(struct e1000_adapter *adapter)
2285{
2286 struct e1000_hw *hw = &adapter->hw;
2287 u16 current_itr;
2288 u32 new_itr = adapter->itr;
2289
2290 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2291 if (adapter->link_speed != SPEED_1000) {
2292 current_itr = 0;
2293 new_itr = 4000;
2294 goto set_itr_now;
2295 }
2296
828bac87
BA		 2297 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2298 new_itr = 0;
2299 goto set_itr_now;
2300 }
2301
bc7f75fa
AK		 2302 adapter->tx_itr = e1000_update_itr(adapter,
2303 adapter->tx_itr,
2304 adapter->total_tx_packets,
2305 adapter->total_tx_bytes);
2306 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2307 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2308 adapter->tx_itr = low_latency;
2309
2310 adapter->rx_itr = e1000_update_itr(adapter,
2311 adapter->rx_itr,
2312 adapter->total_rx_packets,
2313 adapter->total_rx_bytes);
2314 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2315 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2316 adapter->rx_itr = low_latency;
2317
2318 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2319
2320 switch (current_itr) {
2321 /* counts and packets in update_itr are dependent on these numbers */
2322 case lowest_latency:
2323 new_itr = 70000;
2324 break;
2325 case low_latency:
2326 new_itr = 20000; /* aka hwitr = ~200 */
2327 break;
2328 case bulk_latency:
2329 new_itr = 4000;
2330 break;
2331 default:
2332 break;
2333 }
2334
2335set_itr_now:
2336 if (new_itr != adapter->itr) {
ad68076e
BA		 2337 /*
2338 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2339 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2340 * increasing
2341 */
bc7f75fa
AK		 2342 new_itr = new_itr > adapter->itr ?
2343 min(adapter->itr + (new_itr >> 2), new_itr) :
2344 new_itr;
2345 adapter->itr = new_itr;
4662e82b
BA		 2346 adapter->rx_ring->itr_val = new_itr;
2347 if (adapter->msix_entries)
2348 adapter->rx_ring->set_itr = 1;
2349 else
828bac87
BA		 2350 if (new_itr)
2351 ew32(ITR, 1000000000 / (new_itr * 256));
2352 else
2353 ew32(ITR, 0);
bc7f75fa
AK		 2354 }
2355}
2356
4662e82b
BA		 2357/**
2358 * e1000_alloc_queues - Allocate memory for all rings
2359 * @adapter: board private structure to initialize
2360 **/
2361static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2362{
2363 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2364 if (!adapter->tx_ring)
2365 goto err;
2366
2367 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2368 if (!adapter->rx_ring)
2369 goto err;
2370
2371 return 0;
2372err:
2373 e_err("Unable to allocate memory for queues\n");
2374 kfree(adapter->rx_ring);
2375 kfree(adapter->tx_ring);
2376 return -ENOMEM;
2377}
2378
bc7f75fa
AK		 2379/**
2380 * e1000_clean - NAPI Rx polling callback
ad68076e 2381 * @napi: struct associated with this polling callback
489815ce 2382 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2383 **/
2384static int e1000_clean(struct napi_struct *napi, int budget)
2385{
2386 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2387 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2388 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2389 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2390
4cf1653a 2391 adapter = netdev_priv(poll_dev);
bc7f75fa 2392
4662e82b
BA		 2393 if (adapter->msix_entries &&
2394 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2395 goto clean_rx;
2396
92af3e95 2397 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2398
4662e82b 2399clean_rx:
bc7f75fa 2400 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2401
12d04a3c 2402 if (!tx_cleaned)
d2c7ddd6 2403 work_done = budget;
bc7f75fa 2404
53e52c72
DM		 2405 /* If budget not fully consumed, exit the polling mode */
2406 if (work_done < budget) {
bc7f75fa
AK		 2407 if (adapter->itr_setting & 3)
2408 e1000_set_itr(adapter);
288379f0 2409 napi_complete(napi);
a3c69fef
JB		 2410 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2411 if (adapter->msix_entries)
2412 ew32(IMS, adapter->rx_ring->ims_val);
2413 else
2414 e1000_irq_enable(adapter);
2415 }
bc7f75fa
AK		 2416 }
2417
2418 return work_done;
2419}
2420
2421static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2422{
2423 struct e1000_adapter *adapter = netdev_priv(netdev);
2424 struct e1000_hw *hw = &adapter->hw;
2425 u32 vfta, index;
2426
2427 /* don't update vlan cookie if already programmed */
2428 if ((adapter->hw.mng_cookie.status &
2429 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2430 (vid == adapter->mng_vlan_id))
2431 return;
caaddaf8 2432
bc7f75fa 2433 /* add VID to filter table */
caaddaf8
BA		 2434 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2435 index = (vid >> 5) & 0x7F;
2436 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2437 vfta |= (1 << (vid & 0x1F));
2438 hw->mac.ops.write_vfta(hw, index, vfta);
2439 }
86d70e53
JK		 2440
2441 set_bit(vid, adapter->active_vlans);
bc7f75fa
AK		 2442}
2443
2444static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2445{
2446 struct e1000_adapter *adapter = netdev_priv(netdev);
2447 struct e1000_hw *hw = &adapter->hw;
2448 u32 vfta, index;
2449
bc7f75fa
AK		 2450 if ((adapter->hw.mng_cookie.status &
2451 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2452 (vid == adapter->mng_vlan_id)) {
2453 /* release control to f/w */
31dbe5b4 2454 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 2455 return;
2456 }
2457
2458 /* remove VID from filter table */
caaddaf8
BA		 2459 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2460 index = (vid >> 5) & 0x7F;
2461 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2462 vfta &= ~(1 << (vid & 0x1F));
2463 hw->mac.ops.write_vfta(hw, index, vfta);
2464 }
86d70e53
JK		 2465
2466 clear_bit(vid, adapter->active_vlans);
bc7f75fa
AK		 2467}
2468
86d70e53
JK		 2469/**
2470 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2471 * @adapter: board private structure to initialize
2472 **/
2473static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
bc7f75fa
AK		 2474{
2475 struct net_device *netdev = adapter->netdev;
86d70e53
JK		 2476 struct e1000_hw *hw = &adapter->hw;
2477 u32 rctl;
bc7f75fa 2478
86d70e53
JK		 2479 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2480 /* disable VLAN receive filtering */
2481 rctl = er32(RCTL);
2482 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2483 ew32(RCTL, rctl);
2484
2485 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2486 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2487 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
bc7f75fa 2488 }
bc7f75fa
AK		 2489 }
2490}
2491
86d70e53
JK		 2492/**
2493 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2494 * @adapter: board private structure to initialize
2495 **/
2496static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2497{
2498 struct e1000_hw *hw = &adapter->hw;
2499 u32 rctl;
2500
2501 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2502 /* enable VLAN receive filtering */
2503 rctl = er32(RCTL);
2504 rctl |= E1000_RCTL_VFE;
2505 rctl &= ~E1000_RCTL_CFIEN;
2506 ew32(RCTL, rctl);
2507 }
2508}
bc7f75fa 2509
86d70e53
JK		 2510/**
2511 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2512 * @adapter: board private structure to initialize
2513 **/
2514static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
bc7f75fa 2515{
bc7f75fa 2516 struct e1000_hw *hw = &adapter->hw;
86d70e53 2517 u32 ctrl;
bc7f75fa 2518
86d70e53
JK		 2519 /* disable VLAN tag insert/strip */
2520 ctrl = er32(CTRL);
2521 ctrl &= ~E1000_CTRL_VME;
2522 ew32(CTRL, ctrl);
2523}
bc7f75fa 2524
86d70e53
JK		 2525/**
2526 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2527 * @adapter: board private structure to initialize
2528 **/
2529static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2530{
2531 struct e1000_hw *hw = &adapter->hw;
2532 u32 ctrl;
bc7f75fa 2533
86d70e53
JK		 2534 /* enable VLAN tag insert/strip */
2535 ctrl = er32(CTRL);
2536 ctrl |= E1000_CTRL_VME;
2537 ew32(CTRL, ctrl);
2538}
bc7f75fa 2539
86d70e53
JK		 2540static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2541{
2542 struct net_device *netdev = adapter->netdev;
2543 u16 vid = adapter->hw.mng_cookie.vlan_id;
2544 u16 old_vid = adapter->mng_vlan_id;
2545
2546 if (adapter->hw.mng_cookie.status &
2547 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2548 e1000_vlan_rx_add_vid(netdev, vid);
2549 adapter->mng_vlan_id = vid;
bc7f75fa
AK		 2550 }
2551
86d70e53
JK		 2552 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2553 e1000_vlan_rx_kill_vid(netdev, old_vid);
bc7f75fa
AK		 2554}
2555
2556static void e1000_restore_vlan(struct e1000_adapter *adapter)
2557{
2558 u16 vid;
2559
86d70e53 2560 e1000_vlan_rx_add_vid(adapter->netdev, 0);
bc7f75fa 2561
86d70e53 2562 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
bc7f75fa 2563 e1000_vlan_rx_add_vid(adapter->netdev, vid);
bc7f75fa
AK		 2564}
2565
cd791618 2566static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2567{
2568 struct e1000_hw *hw = &adapter->hw;
cd791618 2569 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2570
2571 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2572 return;
2573
2574 manc = er32(MANC);
2575
ad68076e
BA		 2576 /*
2577 * enable receiving management packets to the host. this will probably
bc7f75fa 2578 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2579 * the packets will be handled on SMBUS
2580 */
bc7f75fa
AK		 2581 manc |= E1000_MANC_EN_MNG2HOST;
2582 manc2h = er32(MANC2H);
cd791618
BA		 2583
2584 switch (hw->mac.type) {
2585 default:
2586 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2587 break;
2588 case e1000_82574:
2589 case e1000_82583:
2590 /*
2591 * Check if IPMI pass-through decision filter already exists;
2592 * if so, enable it.
2593 */
2594 for (i = 0, j = 0; i < 8; i++) {
2595 mdef = er32(MDEF(i));
2596
2597 /* Ignore filters with anything other than IPMI ports */
3b21b508 2598 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2599 continue;
2600
2601 /* Enable this decision filter in MANC2H */
2602 if (mdef)
2603 manc2h |= (1 << i);
2604
2605 j |= mdef;
2606 }
2607
2608 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2609 break;
2610
2611 /* Create new decision filter in an empty filter */
2612 for (i = 0, j = 0; i < 8; i++)
2613 if (er32(MDEF(i)) == 0) {
2614 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2615 E1000_MDEF_PORT_664));
2616 manc2h |= (1 << 1);
2617 j++;
2618 break;
2619 }
2620
2621 if (!j)
2622 e_warn("Unable to create IPMI pass-through filter\n");
2623 break;
2624 }
2625
bc7f75fa
AK		 2626 ew32(MANC2H, manc2h);
2627 ew32(MANC, manc);
2628}
2629
2630/**
af667a29 2631 * e1000_configure_tx - Configure Transmit Unit after Reset
bc7f75fa
AK		 2632 * @adapter: board private structure
2633 *
2634 * Configure the Tx unit of the MAC after a reset.
2635 **/
2636static void e1000_configure_tx(struct e1000_adapter *adapter)
2637{
2638 struct e1000_hw *hw = &adapter->hw;
2639 struct e1000_ring *tx_ring = adapter->tx_ring;
2640 u64 tdba;
2641 u32 tdlen, tctl, tipg, tarc;
2642 u32 ipgr1, ipgr2;
2643
2644 /* Setup the HW Tx Head and Tail descriptor pointers */
2645 tdba = tx_ring->dma;
2646 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2647 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2648 ew32(TDBAH, (tdba >> 32));
2649 ew32(TDLEN, tdlen);
2650 ew32(TDH, 0);
2651 ew32(TDT, 0);
2652 tx_ring->head = E1000_TDH;
2653 tx_ring->tail = E1000_TDT;
2654
2655 /* Set the default values for the Tx Inter Packet Gap timer */
2656 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2657 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2658 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2659
2660 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2661 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2662
2663 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2664 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2665 ew32(TIPG, tipg);
2666
2667 /* Set the Tx Interrupt Delay register */
2668 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2669 /* Tx irq moderation */
bc7f75fa
AK		 2670 ew32(TADV, adapter->tx_abs_int_delay);
2671
3a3b7586
JB		 2672 if (adapter->flags2 & FLAG2_DMA_BURST) {
2673 u32 txdctl = er32(TXDCTL(0));
2674 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2675 E1000_TXDCTL_WTHRESH);
2676 /*
2677 * set up some performance related parameters to encourage the
2678 * hardware to use the bus more efficiently in bursts, depends
2679 * on the tx_int_delay to be enabled,
2680 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2681 * hthresh = 1 ==> prefetch when one or more available
2682 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2683 * BEWARE: this seems to work but should be considered first if
af667a29 2684 * there are Tx hangs or other Tx related bugs
3a3b7586
JB		 2685 */
2686 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2687 ew32(TXDCTL(0), txdctl);
2688 /* erratum work around: set txdctl the same for both queues */
2689 ew32(TXDCTL(1), txdctl);
2690 }
2691
bc7f75fa
AK		 2692 /* Program the Transmit Control Register */
2693 tctl = er32(TCTL);
2694 tctl &= ~E1000_TCTL_CT;
2695 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2696 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2697
2698 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2699 tarc = er32(TARC(0));
ad68076e
BA		 2700 /*
2701 * set the speed mode bit, we'll clear it if we're not at
2702 * gigabit link later
2703 */
bc7f75fa
AK		 2704#define SPEED_MODE_BIT (1 << 21)
2705 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2706 ew32(TARC(0), tarc);
bc7f75fa
AK		 2707 }
2708
2709 /* errata: program both queues to unweighted RR */
2710 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2711 tarc = er32(TARC(0));
bc7f75fa 2712 tarc |= 1;
e9ec2c0f
JK		 2713 ew32(TARC(0), tarc);
2714 tarc = er32(TARC(1));
bc7f75fa 2715 tarc |= 1;
e9ec2c0f 2716 ew32(TARC(1), tarc);
bc7f75fa
AK		 2717 }
2718
bc7f75fa
AK		 2719 /* Setup Transmit Descriptor Settings for eop descriptor */
2720 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2721
2722 /* only set IDE if we are delaying interrupts using the timers */
2723 if (adapter->tx_int_delay)
2724 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2725
2726 /* enable Report Status bit */
2727 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2728
2729 ew32(TCTL, tctl);
2730
edfea6e6 2731 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2732}
2733
2734/**
2735 * e1000_setup_rctl - configure the receive control registers
2736 * @adapter: Board private structure
2737 **/
2738#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2739 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2740static void e1000_setup_rctl(struct e1000_adapter *adapter)
2741{
2742 struct e1000_hw *hw = &adapter->hw;
2743 u32 rctl, rfctl;
bc7f75fa
AK		 2744 u32 pages = 0;
2745
a1ce6473
BA		 2746 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2747 if (hw->mac.type == e1000_pch2lan) {
2748 s32 ret_val;
2749
2750 if (adapter->netdev->mtu > ETH_DATA_LEN)
2751 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2752 else
2753 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
dd93f95e
BA		 2754
2755 if (ret_val)
2756 e_dbg("failed to enable jumbo frame workaround mode\n");
a1ce6473
BA		 2757 }
2758
bc7f75fa
AK		 2759 /* Program MC offset vector base */
2760 rctl = er32(RCTL);
2761 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2762 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2763 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2764 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2765
2766 /* Do not Store bad packets */
2767 rctl &= ~E1000_RCTL_SBP;
2768
2769 /* Enable Long Packet receive */
2770 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2771 rctl &= ~E1000_RCTL_LPE;
2772 else
2773 rctl |= E1000_RCTL_LPE;
2774
eb7c3adb
JK		 2775 /* Some systems expect that the CRC is included in SMBUS traffic. The
2776 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2777 * host memory when this is enabled
2778 */
2779 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2780 rctl |= E1000_RCTL_SECRC;
5918bd88 2781
a4f58f54
BA		 2782 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2783 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2784 u16 phy_data;
2785
2786 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2787 phy_data &= 0xfff8;
2788 phy_data |= (1 << 2);
2789 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2790
2791 e1e_rphy(hw, 22, &phy_data);
2792 phy_data &= 0x0fff;
2793 phy_data |= (1 << 14);
2794 e1e_wphy(hw, 0x10, 0x2823);
2795 e1e_wphy(hw, 0x11, 0x0003);
2796 e1e_wphy(hw, 22, phy_data);
2797 }
2798
bc7f75fa
AK		 2799 /* Setup buffer sizes */
2800 rctl &= ~E1000_RCTL_SZ_4096;
2801 rctl |= E1000_RCTL_BSEX;
2802 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2803 case 2048:
2804 default:
2805 rctl |= E1000_RCTL_SZ_2048;
2806 rctl &= ~E1000_RCTL_BSEX;
2807 break;
2808 case 4096:
2809 rctl |= E1000_RCTL_SZ_4096;
2810 break;
2811 case 8192:
2812 rctl |= E1000_RCTL_SZ_8192;
2813 break;
2814 case 16384:
2815 rctl |= E1000_RCTL_SZ_16384;
2816 break;
2817 }
2818
2819 /*
2820 * 82571 and greater support packet-split where the protocol
2821 * header is placed in skb->data and the packet data is
2822 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2823 * In the case of a non-split, skb->data is linearly filled,
2824 * followed by the page buffers. Therefore, skb->data is
2825 * sized to hold the largest protocol header.
2826 *
2827 * allocations using alloc_page take too long for regular MTU
2828 * so only enable packet split for jumbo frames
2829 *
2830 * Using pages when the page size is greater than 16k wastes
2831 * a lot of memory, since we allocate 3 pages at all times
2832 * per packet.
2833 */
bc7f75fa 2834 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2835 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2836 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2837 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2838 else
2839 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2840
2841 if (adapter->rx_ps_pages) {
90da0669
BA		 2842 u32 psrctl = 0;
2843
bc7f75fa
AK		 2844 /* Configure extra packet-split registers */
2845 rfctl = er32(RFCTL);
2846 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2847 /*
2848 * disable packet split support for IPv6 extension headers,
2849 * because some malformed IPv6 headers can hang the Rx
2850 */
bc7f75fa
AK		 2851 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2852 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2853
2854 ew32(RFCTL, rfctl);
2855
140a7480
AK		 2856 /* Enable Packet split descriptors */
2857 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2858
2859 psrctl |= adapter->rx_ps_bsize0 >>
2860 E1000_PSRCTL_BSIZE0_SHIFT;
2861
2862 switch (adapter->rx_ps_pages) {
2863 case 3:
2864 psrctl |= PAGE_SIZE <<
2865 E1000_PSRCTL_BSIZE3_SHIFT;
2866 case 2:
2867 psrctl |= PAGE_SIZE <<
2868 E1000_PSRCTL_BSIZE2_SHIFT;
2869 case 1:
2870 psrctl |= PAGE_SIZE >>
2871 E1000_PSRCTL_BSIZE1_SHIFT;
2872 break;
2873 }
2874
2875 ew32(PSRCTL, psrctl);
2876 }
2877
2878 ew32(RCTL, rctl);
318a94d6
JK		 2879 /* just started the receive unit, no need to restart */
2880 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2881}
2882
2883/**
2884 * e1000_configure_rx - Configure Receive Unit after Reset
2885 * @adapter: board private structure
2886 *
2887 * Configure the Rx unit of the MAC after a reset.
2888 **/
2889static void e1000_configure_rx(struct e1000_adapter *adapter)
2890{
2891 struct e1000_hw *hw = &adapter->hw;
2892 struct e1000_ring *rx_ring = adapter->rx_ring;
2893 u64 rdba;
2894 u32 rdlen, rctl, rxcsum, ctrl_ext;
2895
2896 if (adapter->rx_ps_pages) {
2897 /* this is a 32 byte descriptor */
2898 rdlen = rx_ring->count *
af667a29 2899 sizeof(union e1000_rx_desc_packet_split);
bc7f75fa
AK		 2900 adapter->clean_rx = e1000_clean_rx_irq_ps;
2901 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2902 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2903 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2904 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2905 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2906 } else {
97ac8cae 2907 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2908 adapter->clean_rx = e1000_clean_rx_irq;
2909 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2910 }
2911
2912 /* disable receives while setting up the descriptors */
2913 rctl = er32(RCTL);
2914 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2915 e1e_flush();
1bba4386 2916 usleep_range(10000, 20000);
bc7f75fa 2917
3a3b7586
JB		 2918 if (adapter->flags2 & FLAG2_DMA_BURST) {
2919 /*
2920 * set the writeback threshold (only takes effect if the RDTR
2921 * is set). set GRAN=1 and write back up to 0x4 worth, and
af667a29 2922 * enable prefetching of 0x20 Rx descriptors
3a3b7586
JB		 2923 * granularity = 01
2924 * wthresh = 04,
2925 * hthresh = 04,
2926 * pthresh = 0x20
2927 */
2928 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
2929 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
2930
2931 /*
2932 * override the delay timers for enabling bursting, only if
2933 * the value was not set by the user via module options
2934 */
2935 if (adapter->rx_int_delay == DEFAULT_RDTR)
2936 adapter->rx_int_delay = BURST_RDTR;
2937 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
2938 adapter->rx_abs_int_delay = BURST_RADV;
2939 }
2940
bc7f75fa
AK		 2941 /* set the Receive Delay Timer Register */
2942 ew32(RDTR, adapter->rx_int_delay);
2943
2944 /* irq moderation */
2945 ew32(RADV, adapter->rx_abs_int_delay);
828bac87 2946 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
ad68076e 2947 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2948
2949 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2950 /* Auto-Mask interrupts upon ICR access */
2951 ctrl_ext |= E1000_CTRL_EXT_IAME;
2952 ew32(IAM, 0xffffffff);
2953 ew32(CTRL_EXT, ctrl_ext);
2954 e1e_flush();
2955
ad68076e
BA		 2956 /*
2957 * Setup the HW Rx Head and Tail Descriptor Pointers and
2958 * the Base and Length of the Rx Descriptor Ring
2959 */
bc7f75fa 2960 rdba = rx_ring->dma;
284901a9 2961 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2962 ew32(RDBAH, (rdba >> 32));
2963 ew32(RDLEN, rdlen);
2964 ew32(RDH, 0);
2965 ew32(RDT, 0);
2966 rx_ring->head = E1000_RDH;
2967 rx_ring->tail = E1000_RDT;
2968
2969 /* Enable Receive Checksum Offload for TCP and UDP */
2970 rxcsum = er32(RXCSUM);
2971 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2972 rxcsum |= E1000_RXCSUM_TUOFL;
2973
ad68076e
BA		 2974 /*
2975 * IPv4 payload checksum for UDP fragments must be
2976 * used in conjunction with packet-split.
2977 */
bc7f75fa
AK		 2978 if (adapter->rx_ps_pages)
2979 rxcsum |= E1000_RXCSUM_IPPCSE;
2980 } else {
2981 rxcsum &= ~E1000_RXCSUM_TUOFL;
2982 /* no need to clear IPPCSE as it defaults to 0 */
2983 }
2984 ew32(RXCSUM, rxcsum);
2985
ad68076e
BA		 2986 /*
2987 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2988 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2989 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2990 */
828bac87
BA		 2991 if ((adapter->flags & FLAG_HAS_ERT) ||
2992 (adapter->hw.mac.type == e1000_pch2lan)) {
53ec5498
BA		 2993 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2994 u32 rxdctl = er32(RXDCTL(0));
2995 ew32(RXDCTL(0), rxdctl | 0x3);
828bac87
BA		 2996 if (adapter->flags & FLAG_HAS_ERT)
2997 ew32(ERT, E1000_ERT_2048 | (1 << 13));
53ec5498
BA		 2998 /*
2999 * With jumbo frames and early-receive enabled,
3000 * excessive C-state transition latencies result in
3001 * dropped transactions.
3002 */
af667a29 3003 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
53ec5498 3004 } else {
af667a29
BA		 3005 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3006 PM_QOS_DEFAULT_VALUE);
53ec5498 3007 }
97ac8cae 3008 }
bc7f75fa
AK		 3009
3010 /* Enable Receives */
3011 ew32(RCTL, rctl);
3012}
3013
3014/**
e2de3eb6 3015 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 3016 * @hw: pointer to the HW structure
3017 * @mc_addr_list: array of multicast addresses to program
3018 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 3019 *
ab8932f3 3020 * Updates the Multicast Table Array.
bc7f75fa 3021 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 3022 **/
e2de3eb6 3023static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 3024 u32 mc_addr_count)
bc7f75fa 3025{
ab8932f3 3026 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 3027}
3028
3029/**
3030 * e1000_set_multi - Multicast and Promiscuous mode set
3031 * @netdev: network interface device structure
3032 *
3033 * The set_multi entry point is called whenever the multicast address
3034 * list or the network interface flags are updated. This routine is
3035 * responsible for configuring the hardware for proper multicast,
3036 * promiscuous mode, and all-multi behavior.
3037 **/
3038static void e1000_set_multi(struct net_device *netdev)
3039{
3040 struct e1000_adapter *adapter = netdev_priv(netdev);
3041 struct e1000_hw *hw = &adapter->hw;
22bedad3 3042 struct netdev_hw_addr *ha;
bc7f75fa
AK		 3043 u8 *mta_list;
3044 u32 rctl;
bc7f75fa
AK		 3045
3046 /* Check for Promiscuous and All Multicast modes */
3047
3048 rctl = er32(RCTL);
3049
3050 if (netdev->flags & IFF_PROMISC) {
3051 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 3052 rctl &= ~E1000_RCTL_VFE;
86d70e53
JK		 3053 /* Do not hardware filter VLANs in promisc mode */
3054 e1000e_vlan_filter_disable(adapter);
bc7f75fa 3055 } else {
746b9f02
PM		 3056 if (netdev->flags & IFF_ALLMULTI) {
3057 rctl |= E1000_RCTL_MPE;
3058 rctl &= ~E1000_RCTL_UPE;
3059 } else {
3060 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3061 }
86d70e53 3062 e1000e_vlan_filter_enable(adapter);
bc7f75fa
AK		 3063 }
3064
3065 ew32(RCTL, rctl);
3066
7aeef972 3067 if (!netdev_mc_empty(netdev)) {
90da0669
BA		 3068 int i = 0;
3069
7aeef972 3070 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 3071 if (!mta_list)
3072 return;
3073
3074 /* prepare a packed array of only addresses. */
22bedad3
JP		 3075 netdev_for_each_mc_addr(ha, netdev)
3076 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3077
ab8932f3 3078 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3079 kfree(mta_list);
3080 } else {
3081 /*
3082 * if we're called from probe, we might not have
3083 * anything to do here, so clear out the list
3084 */
ab8932f3 3085 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa 3086 }
86d70e53
JK		 3087
3088 if (netdev->features & NETIF_F_HW_VLAN_RX)
3089 e1000e_vlan_strip_enable(adapter);
3090 else
3091 e1000e_vlan_strip_disable(adapter);
bc7f75fa
AK		 3092}
3093
3094/**
ad68076e 3095 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3096 * @adapter: private board structure
3097 **/
3098static void e1000_configure(struct e1000_adapter *adapter)
3099{
3100 e1000_set_multi(adapter->netdev);
3101
3102 e1000_restore_vlan(adapter);
cd791618 3103 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3104
3105 e1000_configure_tx(adapter);
3106 e1000_setup_rctl(adapter);
3107 e1000_configure_rx(adapter);
ad68076e 3108 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3109}
3110
3111/**
3112 * e1000e_power_up_phy - restore link in case the phy was powered down
3113 * @adapter: address of board private structure
3114 *
3115 * The phy may be powered down to save power and turn off link when the
3116 * driver is unloaded and wake on lan is not enabled (among others)
3117 * *** this routine MUST be followed by a call to e1000e_reset ***
3118 **/
3119void e1000e_power_up_phy(struct e1000_adapter *adapter)
3120{
17f208de
BA		 3121 if (adapter->hw.phy.ops.power_up)
3122 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3123
3124 adapter->hw.mac.ops.setup_link(&adapter->hw);
3125}
3126
3127/**
3128 * e1000_power_down_phy - Power down the PHY
3129 *
17f208de
BA		 3130 * Power down the PHY so no link is implied when interface is down.
3131 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3132 */
3133static void e1000_power_down_phy(struct e1000_adapter *adapter)
3134{
bc7f75fa 3135 /* WoL is enabled */
23b66e2b 3136 if (adapter->wol)
bc7f75fa
AK		 3137 return;
3138
17f208de
BA		 3139 if (adapter->hw.phy.ops.power_down)
3140 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3141}
3142
3143/**
3144 * e1000e_reset - bring the hardware into a known good state
3145 *
3146 * This function boots the hardware and enables some settings that
3147 * require a configuration cycle of the hardware - those cannot be
3148 * set/changed during runtime. After reset the device needs to be
ad68076e 3149 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3150 */
3151void e1000e_reset(struct e1000_adapter *adapter)
3152{
3153 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3154 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3155 struct e1000_hw *hw = &adapter->hw;
3156 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3157 u32 pba = adapter->pba;
bc7f75fa
AK		 3158 u16 hwm;
3159
ad68076e 3160 /* reset Packet Buffer Allocation to default */
318a94d6 3161 ew32(PBA, pba);
df762464 3162
318a94d6 3163 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3164 /*
3165 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3166 * large enough to accommodate two full transmit packets,
3167 * rounded up to the next 1KB and expressed in KB. Likewise,
3168 * the Rx FIFO should be large enough to accommodate at least
3169 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3170 * expressed in KB.
3171 */
df762464 3172 pba = er32(PBA);
bc7f75fa 3173 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3174 tx_space = pba >> 16;
bc7f75fa 3175 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3176 pba &= 0xffff;
ad68076e 3177 /*
af667a29 3178 * the Tx fifo also stores 16 bytes of information about the Tx
ad68076e 3179 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3180 */
3181 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3182 sizeof(struct e1000_tx_desc) -
3183 ETH_FCS_LEN) * 2;
3184 min_tx_space = ALIGN(min_tx_space, 1024);
3185 min_tx_space >>= 10;
3186 /* software strips receive CRC, so leave room for it */
318a94d6 3187 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3188 min_rx_space = ALIGN(min_rx_space, 1024);
3189 min_rx_space >>= 10;
3190
ad68076e
BA		 3191 /*
3192 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3193 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3194 * allocation, take space away from current Rx allocation
3195 */
df762464
AK		 3196 if ((tx_space < min_tx_space) &&
3197 ((min_tx_space - tx_space) < pba)) {
3198 pba -= min_tx_space - tx_space;
bc7f75fa 3199
ad68076e 3200 /*
af667a29 3201 * if short on Rx space, Rx wins and must trump Tx
ad68076e
BA		 3202 * adjustment or use Early Receive if available
3203 */
df762464 3204 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3205 (!(adapter->flags & FLAG_HAS_ERT)))
3206 /* ERT enabled in e1000_configure_rx */
df762464 3207 pba = min_rx_space;
bc7f75fa 3208 }
df762464
AK		 3209
3210 ew32(PBA, pba);
bc7f75fa
AK		 3211 }
3212
ad68076e
BA		 3213 /*
3214 * flow control settings
3215 *
38eb394e 3216 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3217 * (or the size used for early receive) above it in the Rx FIFO.
3218 * Set it to the lower of:
3219 * - 90% of the Rx FIFO size, and
3220 * - the full Rx FIFO size minus the early receive size (for parts
3221 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3222 * - the full Rx FIFO size minus one full frame
ad68076e 3223 */
d3738bb8
BA		 3224 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3225 fc->pause_time = 0xFFFF;
3226 else
3227 fc->pause_time = E1000_FC_PAUSE_TIME;
3228 fc->send_xon = 1;
3229 fc->current_mode = fc->requested_mode;
3230
3231 switch (hw->mac.type) {
3232 default:
3233 if ((adapter->flags & FLAG_HAS_ERT) &&
3234 (adapter->netdev->mtu > ETH_DATA_LEN))
3235 hwm = min(((pba << 10) * 9 / 10),
3236 ((pba << 10) - (E1000_ERT_2048 << 3)));
3237 else
3238 hwm = min(((pba << 10) * 9 / 10),
3239 ((pba << 10) - adapter->max_frame_size));
3240
3241 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3242 fc->low_water = fc->high_water - 8;
3243 break;
3244 case e1000_pchlan:
38eb394e
BA		 3245 /*
3246 * Workaround PCH LOM adapter hangs with certain network
3247 * loads. If hangs persist, try disabling Tx flow control.
3248 */
3249 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3250 fc->high_water = 0x3500;
3251 fc->low_water = 0x1500;
3252 } else {
3253 fc->high_water = 0x5000;
3254 fc->low_water = 0x3000;
3255 }
a305595b 3256 fc->refresh_time = 0x1000;
d3738bb8
BA		 3257 break;
3258 case e1000_pch2lan:
3259 fc->high_water = 0x05C20;
3260 fc->low_water = 0x05048;
3261 fc->pause_time = 0x0650;
3262 fc->refresh_time = 0x0400;
828bac87
BA		 3263 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3264 pba = 14;
3265 ew32(PBA, pba);
3266 }
d3738bb8 3267 break;
38eb394e 3268 }
bc7f75fa 3269
828bac87
BA		 3270 /*
3271 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3272 * fit in receive buffer and early-receive not supported.
3273 */
3274 if (adapter->itr_setting & 0x3) {
3275 if (((adapter->max_frame_size * 2) > (pba << 10)) &&
3276 !(adapter->flags & FLAG_HAS_ERT)) {
3277 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3278 dev_info(&adapter->pdev->dev,
3279 "Interrupt Throttle Rate turned off\n");
3280 adapter->flags2 |= FLAG2_DISABLE_AIM;
3281 ew32(ITR, 0);
3282 }
3283 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3284 dev_info(&adapter->pdev->dev,
3285 "Interrupt Throttle Rate turned on\n");
3286 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3287 adapter->itr = 20000;
3288 ew32(ITR, 1000000000 / (adapter->itr * 256));
3289 }
3290 }
3291
bc7f75fa
AK		 3292 /* Allow time for pending master requests to run */
3293 mac->ops.reset_hw(hw);
97ac8cae
BA		 3294
3295 /*
3296 * For parts with AMT enabled, let the firmware know
3297 * that the network interface is in control
3298 */
c43bc57e 3299 if (adapter->flags & FLAG_HAS_AMT)
31dbe5b4 3300 e1000e_get_hw_control(adapter);
97ac8cae 3301
bc7f75fa
AK		 3302 ew32(WUC, 0);
3303
3304 if (mac->ops.init_hw(hw))
44defeb3 3305 e_err("Hardware Error\n");
bc7f75fa
AK		 3306
3307 e1000_update_mng_vlan(adapter);
3308
3309 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3310 ew32(VET, ETH_P_8021Q);
3311
3312 e1000e_reset_adaptive(hw);
31dbe5b4
BA		 3313
3314 if (!netif_running(adapter->netdev) &&
3315 !test_bit(__E1000_TESTING, &adapter->state)) {
3316 e1000_power_down_phy(adapter);
3317 return;
3318 }
3319
bc7f75fa
AK		 3320 e1000_get_phy_info(hw);
3321
918d7197
BA		 3322 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3323 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3324 u16 phy_data = 0;
ad68076e
BA		 3325 /*
3326 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3327 * the return value of this function because there is nothing
ad68076e
BA		 3328 * different we would do if it failed
3329 */
bc7f75fa
AK		 3330 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3331 phy_data &= ~IGP02E1000_PM_SPD;
3332 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3333 }
bc7f75fa
AK		 3334}
3335
3336int e1000e_up(struct e1000_adapter *adapter)
3337{
3338 struct e1000_hw *hw = &adapter->hw;
3339
3340 /* hardware has been reset, we need to reload some things */
3341 e1000_configure(adapter);
3342
3343 clear_bit(__E1000_DOWN, &adapter->state);
3344
3345 napi_enable(&adapter->napi);
4662e82b
BA		 3346 if (adapter->msix_entries)
3347 e1000_configure_msix(adapter);
bc7f75fa
AK		 3348 e1000_irq_enable(adapter);
3349
400484fa 3350 netif_start_queue(adapter->netdev);
4cb9be7a 3351
bc7f75fa 3352 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3353 if (adapter->msix_entries)
3354 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3355 else
3356 ew32(ICS, E1000_ICS_LSC);
3357
bc7f75fa
AK		 3358 return 0;
3359}
3360
713b3c9e
JB		 3361static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3362{
3363 struct e1000_hw *hw = &adapter->hw;
3364
3365 if (!(adapter->flags2 & FLAG2_DMA_BURST))
3366 return;
3367
3368 /* flush pending descriptor writebacks to memory */
3369 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3370 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3371
3372 /* execute the writes immediately */
3373 e1e_flush();
3374}
3375
67fd4fcb
JK		 3376static void e1000e_update_stats(struct e1000_adapter *adapter);
3377
bc7f75fa
AK		 3378void e1000e_down(struct e1000_adapter *adapter)
3379{
3380 struct net_device *netdev = adapter->netdev;
3381 struct e1000_hw *hw = &adapter->hw;
3382 u32 tctl, rctl;
3383
ad68076e
BA		 3384 /*
3385 * signal that we're down so the interrupt handler does not
3386 * reschedule our watchdog timer
3387 */
bc7f75fa
AK		 3388 set_bit(__E1000_DOWN, &adapter->state);
3389
3390 /* disable receives in the hardware */
3391 rctl = er32(RCTL);
3392 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3393 /* flush and sleep below */
3394
4cb9be7a 3395 netif_stop_queue(netdev);
bc7f75fa
AK		 3396
3397 /* disable transmits in the hardware */
3398 tctl = er32(TCTL);
3399 tctl &= ~E1000_TCTL_EN;
3400 ew32(TCTL, tctl);
3401 /* flush both disables and wait for them to finish */
3402 e1e_flush();
1bba4386 3403 usleep_range(10000, 20000);
bc7f75fa
AK		 3404
3405 napi_disable(&adapter->napi);
3406 e1000_irq_disable(adapter);
3407
3408 del_timer_sync(&adapter->watchdog_timer);
3409 del_timer_sync(&adapter->phy_info_timer);
3410
bc7f75fa 3411 netif_carrier_off(netdev);
67fd4fcb
JK		 3412
3413 spin_lock(&adapter->stats64_lock);
3414 e1000e_update_stats(adapter);
3415 spin_unlock(&adapter->stats64_lock);
3416
400484fa
BA		 3417 e1000e_flush_descriptors(adapter);
3418 e1000_clean_tx_ring(adapter);
3419 e1000_clean_rx_ring(adapter);
3420
bc7f75fa
AK		 3421 adapter->link_speed = 0;
3422 adapter->link_duplex = 0;
3423
52cc3086
JK		 3424 if (!pci_channel_offline(adapter->pdev))
3425 e1000e_reset(adapter);
713b3c9e 3426
bc7f75fa
AK		 3427 /*
3428 * TODO: for power management, we could drop the link and
3429 * pci_disable_device here.
3430 */
3431}
3432
3433void e1000e_reinit_locked(struct e1000_adapter *adapter)
3434{
3435 might_sleep();
3436 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 3437 usleep_range(1000, 2000);
bc7f75fa
AK		 3438 e1000e_down(adapter);
3439 e1000e_up(adapter);
3440 clear_bit(__E1000_RESETTING, &adapter->state);
3441}
3442
3443/**
3444 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3445 * @adapter: board private structure to initialize
3446 *
3447 * e1000_sw_init initializes the Adapter private data structure.
3448 * Fields are initialized based on PCI device information and
3449 * OS network device settings (MTU size).
3450 **/
3451static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3452{
bc7f75fa
AK		 3453 struct net_device *netdev = adapter->netdev;
3454
3455 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3456 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3457 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3458 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3459
67fd4fcb
JK		 3460 spin_lock_init(&adapter->stats64_lock);
3461
4662e82b 3462 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3463
4662e82b
BA		 3464 if (e1000_alloc_queues(adapter))
3465 return -ENOMEM;
bc7f75fa 3466
bc7f75fa 3467 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3468 e1000_irq_disable(adapter);
3469
bc7f75fa
AK		 3470 set_bit(__E1000_DOWN, &adapter->state);
3471 return 0;
bc7f75fa
AK		 3472}
3473
f8d59f78
BA		 3474/**
3475 * e1000_intr_msi_test - Interrupt Handler
3476 * @irq: interrupt number
3477 * @data: pointer to a network interface device structure
3478 **/
3479static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3480{
3481 struct net_device *netdev = data;
3482 struct e1000_adapter *adapter = netdev_priv(netdev);
3483 struct e1000_hw *hw = &adapter->hw;
3484 u32 icr = er32(ICR);
3485
3bb99fe2 3486 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3487 if (icr & E1000_ICR_RXSEQ) {
3488 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3489 wmb();
3490 }
3491
3492 return IRQ_HANDLED;
3493}
3494
3495/**
3496 * e1000_test_msi_interrupt - Returns 0 for successful test
3497 * @adapter: board private struct
3498 *
3499 * code flow taken from tg3.c
3500 **/
3501static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3502{
3503 struct net_device *netdev = adapter->netdev;
3504 struct e1000_hw *hw = &adapter->hw;
3505 int err;
3506
3507 /* poll_enable hasn't been called yet, so don't need disable */
3508 /* clear any pending events */
3509 er32(ICR);
3510
3511 /* free the real vector and request a test handler */
3512 e1000_free_irq(adapter);
4662e82b 3513 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3514
3515 /* Assume that the test fails, if it succeeds then the test
3516 * MSI irq handler will unset this flag */
3517 adapter->flags |= FLAG_MSI_TEST_FAILED;
3518
3519 err = pci_enable_msi(adapter->pdev);
3520 if (err)
3521 goto msi_test_failed;
3522
a0607fd3 3523 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3524 netdev->name, netdev);
3525 if (err) {
3526 pci_disable_msi(adapter->pdev);
3527 goto msi_test_failed;
3528 }
3529
3530 wmb();
3531
3532 e1000_irq_enable(adapter);
3533
3534 /* fire an unusual interrupt on the test handler */
3535 ew32(ICS, E1000_ICS_RXSEQ);
3536 e1e_flush();
3537 msleep(50);
3538
3539 e1000_irq_disable(adapter);
3540
3541 rmb();
3542
3543 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3544 adapter->int_mode = E1000E_INT_MODE_LEGACY;
068e8a30
JD		 3545 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3546 } else
3547 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78
BA		 3548
3549 free_irq(adapter->pdev->irq, netdev);
3550 pci_disable_msi(adapter->pdev);
3551
f8d59f78 3552msi_test_failed:
4662e82b 3553 e1000e_set_interrupt_capability(adapter);
068e8a30 3554 return e1000_request_irq(adapter);
f8d59f78
BA		 3555}
3556
3557/**
3558 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3559 * @adapter: board private struct
3560 *
3561 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3562 **/
3563static int e1000_test_msi(struct e1000_adapter *adapter)
3564{
3565 int err;
3566 u16 pci_cmd;
3567
3568 if (!(adapter->flags & FLAG_MSI_ENABLED))
3569 return 0;
3570
3571 /* disable SERR in case the MSI write causes a master abort */
3572 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3573 if (pci_cmd & PCI_COMMAND_SERR)
3574 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3575 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3576
3577 err = e1000_test_msi_interrupt(adapter);
3578
36f2407f
DN		 3579 /* re-enable SERR */
3580 if (pci_cmd & PCI_COMMAND_SERR) {
3581 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3582 pci_cmd |= PCI_COMMAND_SERR;
3583 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3584 }
f8d59f78 3585
f8d59f78
BA		 3586 return err;
3587}
3588
bc7f75fa
AK		 3589/**
3590 * e1000_open - Called when a network interface is made active
3591 * @netdev: network interface device structure
3592 *
3593 * Returns 0 on success, negative value on failure
3594 *
3595 * The open entry point is called when a network interface is made
3596 * active by the system (IFF_UP). At this point all resources needed
3597 * for transmit and receive operations are allocated, the interrupt
3598 * handler is registered with the OS, the watchdog timer is started,
3599 * and the stack is notified that the interface is ready.
3600 **/
3601static int e1000_open(struct net_device *netdev)
3602{
3603 struct e1000_adapter *adapter = netdev_priv(netdev);
3604 struct e1000_hw *hw = &adapter->hw;
23606cf5 3605 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3606 int err;
3607
3608 /* disallow open during test */
3609 if (test_bit(__E1000_TESTING, &adapter->state))
3610 return -EBUSY;
3611
23606cf5
RW		 3612 pm_runtime_get_sync(&pdev->dev);
3613
9c563d20
JB		 3614 netif_carrier_off(netdev);
3615
bc7f75fa
AK		 3616 /* allocate transmit descriptors */
3617 err = e1000e_setup_tx_resources(adapter);
3618 if (err)
3619 goto err_setup_tx;
3620
3621 /* allocate receive descriptors */
3622 err = e1000e_setup_rx_resources(adapter);
3623 if (err)
3624 goto err_setup_rx;
3625
11b08be8
BA		 3626 /*
3627 * If AMT is enabled, let the firmware know that the network
3628 * interface is now open and reset the part to a known state.
3629 */
3630 if (adapter->flags & FLAG_HAS_AMT) {
31dbe5b4 3631 e1000e_get_hw_control(adapter);
11b08be8
BA		 3632 e1000e_reset(adapter);
3633 }
3634
bc7f75fa
AK		 3635 e1000e_power_up_phy(adapter);
3636
3637 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3638 if ((adapter->hw.mng_cookie.status &
3639 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3640 e1000_update_mng_vlan(adapter);
3641
c128ec29 3642 /* DMA latency requirement to workaround early-receive/jumbo issue */
828bac87
BA		 3643 if ((adapter->flags & FLAG_HAS_ERT) ||
3644 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014
LT		 3645 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3646 PM_QOS_CPU_DMA_LATENCY,
3647 PM_QOS_DEFAULT_VALUE);
c128ec29 3648
ad68076e
BA		 3649 /*
3650 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3651 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3652 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3653 * clean_rx handler before we do so.
3654 */
bc7f75fa
AK		 3655 e1000_configure(adapter);
3656
3657 err = e1000_request_irq(adapter);
3658 if (err)
3659 goto err_req_irq;
3660
f8d59f78
BA		 3661 /*
3662 * Work around PCIe errata with MSI interrupts causing some chipsets to
3663 * ignore e1000e MSI messages, which means we need to test our MSI
3664 * interrupt now
3665 */
4662e82b 3666 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3667 err = e1000_test_msi(adapter);
3668 if (err) {
3669 e_err("Interrupt allocation failed\n");
3670 goto err_req_irq;
3671 }
3672 }
3673
bc7f75fa
AK		 3674 /* From here on the code is the same as e1000e_up() */
3675 clear_bit(__E1000_DOWN, &adapter->state);
3676
3677 napi_enable(&adapter->napi);
3678
3679 e1000_irq_enable(adapter);
3680
4cb9be7a 3681 netif_start_queue(netdev);
d55b53ff 3682
23606cf5
RW		 3683 adapter->idle_check = true;
3684 pm_runtime_put(&pdev->dev);
3685
bc7f75fa 3686 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3687 if (adapter->msix_entries)
3688 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3689 else
3690 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3691
3692 return 0;
3693
3694err_req_irq:
31dbe5b4 3695 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 3696 e1000_power_down_phy(adapter);
3697 e1000e_free_rx_resources(adapter);
3698err_setup_rx:
3699 e1000e_free_tx_resources(adapter);
3700err_setup_tx:
3701 e1000e_reset(adapter);
23606cf5 3702 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3703
3704 return err;
3705}
3706
3707/**
3708 * e1000_close - Disables a network interface
3709 * @netdev: network interface device structure
3710 *
3711 * Returns 0, this is not allowed to fail
3712 *
3713 * The close entry point is called when an interface is de-activated
3714 * by the OS. The hardware is still under the drivers control, but
3715 * needs to be disabled. A global MAC reset is issued to stop the
3716 * hardware, and all transmit and receive resources are freed.
3717 **/
3718static int e1000_close(struct net_device *netdev)
3719{
3720 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3721 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3722
3723 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3724
3725 pm_runtime_get_sync(&pdev->dev);
3726
3727 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3728 e1000e_down(adapter);
3729 e1000_free_irq(adapter);
3730 }
bc7f75fa 3731 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3732
3733 e1000e_free_tx_resources(adapter);
3734 e1000e_free_rx_resources(adapter);
3735
ad68076e
BA		 3736 /*
3737 * kill manageability vlan ID if supported, but not if a vlan with
3738 * the same ID is registered on the host OS (let 8021q kill it)
3739 */
86d70e53
JK		 3740 if (adapter->hw.mng_cookie.status &
3741 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
bc7f75fa
AK		 3742 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3743
ad68076e
BA		 3744 /*
3745 * If AMT is enabled, let the firmware know that the network
3746 * interface is now closed
3747 */
31dbe5b4
BA		 3748 if ((adapter->flags & FLAG_HAS_AMT) &&
3749 !test_bit(__E1000_TESTING, &adapter->state))
3750 e1000e_release_hw_control(adapter);
bc7f75fa 3751
828bac87
BA		 3752 if ((adapter->flags & FLAG_HAS_ERT) ||
3753 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014 3754 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3755
23606cf5
RW		 3756 pm_runtime_put_sync(&pdev->dev);
3757
bc7f75fa
AK		 3758 return 0;
3759}
3760/**
3761 * e1000_set_mac - Change the Ethernet Address of the NIC
3762 * @netdev: network interface device structure
3763 * @p: pointer to an address structure
3764 *
3765 * Returns 0 on success, negative on failure
3766 **/
3767static int e1000_set_mac(struct net_device *netdev, void *p)
3768{
3769 struct e1000_adapter *adapter = netdev_priv(netdev);
3770 struct sockaddr *addr = p;
3771
3772 if (!is_valid_ether_addr(addr->sa_data))
3773 return -EADDRNOTAVAIL;
3774
3775 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3776 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3777
3778 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3779
3780 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3781 /* activate the work around */
3782 e1000e_set_laa_state_82571(&adapter->hw, 1);
3783
ad68076e
BA		 3784 /*
3785 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3786 * between the time RAR[0] gets clobbered and the time it
3787 * gets fixed (in e1000_watchdog), the actual LAA is in one
3788 * of the RARs and no incoming packets directed to this port
3789 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3790 * RAR[14]
3791 */
bc7f75fa
AK		 3792 e1000e_rar_set(&adapter->hw,
3793 adapter->hw.mac.addr,
3794 adapter->hw.mac.rar_entry_count - 1);
3795 }
3796
3797 return 0;
3798}
3799
a8f88ff5
JB		 3800/**
3801 * e1000e_update_phy_task - work thread to update phy
3802 * @work: pointer to our work struct
3803 *
3804 * this worker thread exists because we must acquire a
3805 * semaphore to read the phy, which we could msleep while
3806 * waiting for it, and we can't msleep in a timer.
3807 **/
3808static void e1000e_update_phy_task(struct work_struct *work)
3809{
3810 struct e1000_adapter *adapter = container_of(work,
3811 struct e1000_adapter, update_phy_task);
615b32af
JB		 3812
3813 if (test_bit(__E1000_DOWN, &adapter->state))
3814 return;
3815
a8f88ff5
JB		 3816 e1000_get_phy_info(&adapter->hw);
3817}
3818
ad68076e
BA		 3819/*
3820 * Need to wait a few seconds after link up to get diagnostic information from
3821 * the phy
3822 */
bc7f75fa
AK		 3823static void e1000_update_phy_info(unsigned long data)
3824{
3825 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
615b32af
JB		 3826
3827 if (test_bit(__E1000_DOWN, &adapter->state))
3828 return;
3829
a8f88ff5 3830 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3831}
3832
8c7bbb92
BA		 3833/**
3834 * e1000e_update_phy_stats - Update the PHY statistics counters
3835 * @adapter: board private structure
2b6b168d
BA		 3836 *
3837 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
8c7bbb92
BA		 3838 **/
3839static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3840{
3841 struct e1000_hw *hw = &adapter->hw;
3842 s32 ret_val;
3843 u16 phy_data;
3844
3845 ret_val = hw->phy.ops.acquire(hw);
3846 if (ret_val)
3847 return;
3848
8c7bbb92
BA		 3849 /*
3850 * A page set is expensive so check if already on desired page.
3851 * If not, set to the page with the PHY status registers.
3852 */
2b6b168d 3853 hw->phy.addr = 1;
8c7bbb92
BA		 3854 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3855 &phy_data);
3856 if (ret_val)
3857 goto release;
2b6b168d
BA		 3858 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
3859 ret_val = hw->phy.ops.set_page(hw,
3860 HV_STATS_PAGE << IGP_PAGE_SHIFT);
8c7bbb92
BA		 3861 if (ret_val)
3862 goto release;
3863 }
3864
8c7bbb92 3865 /* Single Collision Count */
2b6b168d
BA		 3866 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
3867 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
8c7bbb92
BA		 3868 if (!ret_val)
3869 adapter->stats.scc += phy_data;
3870
3871 /* Excessive Collision Count */
2b6b168d
BA		 3872 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
3873 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
8c7bbb92
BA		 3874 if (!ret_val)
3875 adapter->stats.ecol += phy_data;
3876
3877 /* Multiple Collision Count */
2b6b168d
BA		 3878 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
3879 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
8c7bbb92
BA		 3880 if (!ret_val)
3881 adapter->stats.mcc += phy_data;
3882
3883 /* Late Collision Count */
2b6b168d
BA		 3884 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
3885 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
8c7bbb92
BA		 3886 if (!ret_val)
3887 adapter->stats.latecol += phy_data;
3888
3889 /* Collision Count - also used for adaptive IFS */
2b6b168d
BA		 3890 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
3891 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
8c7bbb92
BA		 3892 if (!ret_val)
3893 hw->mac.collision_delta = phy_data;
3894
3895 /* Defer Count */
2b6b168d
BA		 3896 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
3897 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
8c7bbb92
BA		 3898 if (!ret_val)
3899 adapter->stats.dc += phy_data;
3900
3901 /* Transmit with no CRS */
2b6b168d
BA		 3902 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
3903 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
8c7bbb92
BA		 3904 if (!ret_val)
3905 adapter->stats.tncrs += phy_data;
3906
3907release:
3908 hw->phy.ops.release(hw);
3909}
3910
bc7f75fa
AK		 3911/**
3912 * e1000e_update_stats - Update the board statistics counters
3913 * @adapter: board private structure
3914 **/
67fd4fcb 3915static void e1000e_update_stats(struct e1000_adapter *adapter)
bc7f75fa 3916{
7274c20f 3917 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3918 struct e1000_hw *hw = &adapter->hw;
3919 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3920
3921 /*
3922 * Prevent stats update while adapter is being reset, or if the pci
3923 * connection is down.
3924 */
3925 if (adapter->link_speed == 0)
3926 return;
3927 if (pci_channel_offline(pdev))
3928 return;
3929
bc7f75fa
AK		 3930 adapter->stats.crcerrs += er32(CRCERRS);
3931 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3932 adapter->stats.gorc += er32(GORCL);
3933 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3934 adapter->stats.bprc += er32(BPRC);
3935 adapter->stats.mprc += er32(MPRC);
3936 adapter->stats.roc += er32(ROC);
3937
bc7f75fa 3938 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3939
3940 /* Half-duplex statistics */
3941 if (adapter->link_duplex == HALF_DUPLEX) {
3942 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3943 e1000e_update_phy_stats(adapter);
3944 } else {
3945 adapter->stats.scc += er32(SCC);
3946 adapter->stats.ecol += er32(ECOL);
3947 adapter->stats.mcc += er32(MCC);
3948 adapter->stats.latecol += er32(LATECOL);
3949 adapter->stats.dc += er32(DC);
3950
3951 hw->mac.collision_delta = er32(COLC);
3952
3953 if ((hw->mac.type != e1000_82574) &&
3954 (hw->mac.type != e1000_82583))
3955 adapter->stats.tncrs += er32(TNCRS);
3956 }
3957 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3958 }
8c7bbb92 3959
bc7f75fa
AK		 3960 adapter->stats.xonrxc += er32(XONRXC);
3961 adapter->stats.xontxc += er32(XONTXC);
3962 adapter->stats.xoffrxc += er32(XOFFRXC);
3963 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3964 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3965 adapter->stats.gotc += er32(GOTCL);
3966 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3967 adapter->stats.rnbc += er32(RNBC);
3968 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3969
3970 adapter->stats.mptc += er32(MPTC);
3971 adapter->stats.bptc += er32(BPTC);
3972
3973 /* used for adaptive IFS */
3974
3975 hw->mac.tx_packet_delta = er32(TPT);
3976 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3977
3978 adapter->stats.algnerrc += er32(ALGNERRC);
3979 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3980 adapter->stats.cexterr += er32(CEXTERR);
3981 adapter->stats.tsctc += er32(TSCTC);
3982 adapter->stats.tsctfc += er32(TSCTFC);
3983
bc7f75fa 3984 /* Fill out the OS statistics structure */
7274c20f
AK		 3985 netdev->stats.multicast = adapter->stats.mprc;
3986 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3987
3988 /* Rx Errors */
3989
ad68076e
BA		 3990 /*
3991 * RLEC on some newer hardware can be incorrect so build
3992 * our own version based on RUC and ROC
3993 */
7274c20f 3994 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3995 adapter->stats.crcerrs + adapter->stats.algnerrc +
3996 adapter->stats.ruc + adapter->stats.roc +
3997 adapter->stats.cexterr;
7274c20f 3998 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3999 adapter->stats.roc;
7274c20f
AK		 4000 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4001 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4002 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 4003
4004 /* Tx Errors */
7274c20f 4005 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 4006 adapter->stats.latecol;
7274c20f
AK		 4007 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4008 netdev->stats.tx_window_errors = adapter->stats.latecol;
4009 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 4010
4011 /* Tx Dropped needs to be maintained elsewhere */
4012
bc7f75fa
AK		 4013 /* Management Stats */
4014 adapter->stats.mgptc += er32(MGTPTC);
4015 adapter->stats.mgprc += er32(MGTPRC);
4016 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 4017}
4018
7c25769f
BA		 4019/**
4020 * e1000_phy_read_status - Update the PHY register status snapshot
4021 * @adapter: board private structure
4022 **/
4023static void e1000_phy_read_status(struct e1000_adapter *adapter)
4024{
4025 struct e1000_hw *hw = &adapter->hw;
4026 struct e1000_phy_regs *phy = &adapter->phy_regs;
7c25769f
BA		 4027
4028 if ((er32(STATUS) & E1000_STATUS_LU) &&
4029 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
90da0669
BA		 4030 int ret_val;
4031
7c25769f
BA		 4032 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4033 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4034 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4035 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4036 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4037 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4038 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4039 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4040 if (ret_val)
44defeb3 4041 e_warn("Error reading PHY register\n");
7c25769f
BA		 4042 } else {
4043 /*
4044 * Do not read PHY registers if link is not up
4045 * Set values to typical power-on defaults
4046 */
4047 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4048 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4049 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4050 BMSR_ERCAP);
4051 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4052 ADVERTISE_ALL | ADVERTISE_CSMA);
4053 phy->lpa = 0;
4054 phy->expansion = EXPANSION_ENABLENPAGE;
4055 phy->ctrl1000 = ADVERTISE_1000FULL;
4056 phy->stat1000 = 0;
4057 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4058 }
7c25769f
BA		 4059}
4060
bc7f75fa
AK		 4061static void e1000_print_link_info(struct e1000_adapter *adapter)
4062{
bc7f75fa
AK		 4063 struct e1000_hw *hw = &adapter->hw;
4064 u32 ctrl = er32(CTRL);
4065
8f12fe86
BA		 4066 /* Link status message must follow this format for user tools */
4067 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
4068 "Flow Control: %s\n",
4069 adapter->netdev->name,
44defeb3
JK		 4070 adapter->link_speed,
4071 (adapter->link_duplex == FULL_DUPLEX) ?
af667a29 4072 "Full Duplex" : "Half Duplex",
44defeb3 4073 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
af667a29
BA		 4074 "Rx/Tx" :
4075 ((ctrl & E1000_CTRL_RFCE) ? "Rx" :
4076 ((ctrl & E1000_CTRL_TFCE) ? "Tx" : "None")));
bc7f75fa
AK		 4077}
4078
0c6bdb30 4079static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 4080{
4081 struct e1000_hw *hw = &adapter->hw;
4082 bool link_active = 0;
4083 s32 ret_val = 0;
4084
4085 /*
4086 * get_link_status is set on LSC (link status) interrupt or
4087 * Rx sequence error interrupt. get_link_status will stay
4088 * false until the check_for_link establishes link
4089 * for copper adapters ONLY
4090 */
4091 switch (hw->phy.media_type) {
4092 case e1000_media_type_copper:
4093 if (hw->mac.get_link_status) {
4094 ret_val = hw->mac.ops.check_for_link(hw);
4095 link_active = !hw->mac.get_link_status;
4096 } else {
4097 link_active = 1;
4098 }
4099 break;
4100 case e1000_media_type_fiber:
4101 ret_val = hw->mac.ops.check_for_link(hw);
4102 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4103 break;
4104 case e1000_media_type_internal_serdes:
4105 ret_val = hw->mac.ops.check_for_link(hw);
4106 link_active = adapter->hw.mac.serdes_has_link;
4107 break;
4108 default:
4109 case e1000_media_type_unknown:
4110 break;
4111 }
4112
4113 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4114 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4115 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4116 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4117 }
4118
4119 return link_active;
4120}
4121
4122static void e1000e_enable_receives(struct e1000_adapter *adapter)
4123{
4124 /* make sure the receive unit is started */
4125 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4126 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4127 struct e1000_hw *hw = &adapter->hw;
4128 u32 rctl = er32(RCTL);
4129 ew32(RCTL, rctl | E1000_RCTL_EN);
4130 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4131 }
4132}
4133
ff10e13c
CW		 4134static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4135{
4136 struct e1000_hw *hw = &adapter->hw;
4137
4138 /*
4139 * With 82574 controllers, PHY needs to be checked periodically
4140 * for hung state and reset, if two calls return true
4141 */
4142 if (e1000_check_phy_82574(hw))
4143 adapter->phy_hang_count++;
4144 else
4145 adapter->phy_hang_count = 0;
4146
4147 if (adapter->phy_hang_count > 1) {
4148 adapter->phy_hang_count = 0;
4149 schedule_work(&adapter->reset_task);
4150 }
4151}
4152
bc7f75fa
AK		 4153/**
4154 * e1000_watchdog - Timer Call-back
4155 * @data: pointer to adapter cast into an unsigned long
4156 **/
4157static void e1000_watchdog(unsigned long data)
4158{
4159 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4160
4161 /* Do the rest outside of interrupt context */
4162 schedule_work(&adapter->watchdog_task);
4163
4164 /* TODO: make this use queue_delayed_work() */
4165}
4166
4167static void e1000_watchdog_task(struct work_struct *work)
4168{
4169 struct e1000_adapter *adapter = container_of(work,
4170 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4171 struct net_device *netdev = adapter->netdev;
4172 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4173 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4174 struct e1000_ring *tx_ring = adapter->tx_ring;
4175 struct e1000_hw *hw = &adapter->hw;
4176 u32 link, tctl;
bc7f75fa 4177
615b32af
JB		 4178 if (test_bit(__E1000_DOWN, &adapter->state))
4179 return;
4180
b405e8df 4181 link = e1000e_has_link(adapter);
318a94d6 4182 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4183 /* Cancel scheduled suspend requests. */
4184 pm_runtime_resume(netdev->dev.parent);
4185
318a94d6 4186 e1000e_enable_receives(adapter);
bc7f75fa 4187 goto link_up;
bc7f75fa
AK		 4188 }
4189
4190 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4191 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4192 e1000_update_mng_vlan(adapter);
4193
bc7f75fa
AK		 4194 if (link) {
4195 if (!netif_carrier_ok(netdev)) {
4196 bool txb2b = 1;
23606cf5
RW		 4197
4198 /* Cancel scheduled suspend requests. */
4199 pm_runtime_resume(netdev->dev.parent);
4200
318a94d6 4201 /* update snapshot of PHY registers on LSC */
7c25769f 4202 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4203 mac->ops.get_link_up_info(&adapter->hw,
4204 &adapter->link_speed,
4205 &adapter->link_duplex);
4206 e1000_print_link_info(adapter);
f4187b56
BA		 4207 /*
4208 * On supported PHYs, check for duplex mismatch only
4209 * if link has autonegotiated at 10/100 half
4210 */
4211 if ((hw->phy.type == e1000_phy_igp_3 ||
4212 hw->phy.type == e1000_phy_bm) &&
4213 (hw->mac.autoneg == true) &&
4214 (adapter->link_speed == SPEED_10 ||
4215 adapter->link_speed == SPEED_100) &&
4216 (adapter->link_duplex == HALF_DUPLEX)) {
4217 u16 autoneg_exp;
4218
4219 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4220
4221 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4222 e_info("Autonegotiated half duplex but"
4223 " link partner cannot autoneg. "
4224 " Try forcing full duplex if "
4225 "link gets many collisions.\n");
4226 }
4227
f49c57e1 4228 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4229 adapter->tx_timeout_factor = 1;
4230 switch (adapter->link_speed) {
4231 case SPEED_10:
4232 txb2b = 0;
10f1b492 4233 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4234 break;
4235 case SPEED_100:
4236 txb2b = 0;
4c86e0b9 4237 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4238 break;
4239 }
4240
ad68076e
BA		 4241 /*
4242 * workaround: re-program speed mode bit after
4243 * link-up event
4244 */
bc7f75fa
AK		 4245 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4246 !txb2b) {
4247 u32 tarc0;
e9ec2c0f 4248 tarc0 = er32(TARC(0));
bc7f75fa 4249 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4250 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4251 }
4252
ad68076e
BA		 4253 /*
4254 * disable TSO for pcie and 10/100 speeds, to avoid
4255 * some hardware issues
4256 */
bc7f75fa
AK		 4257 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4258 switch (adapter->link_speed) {
4259 case SPEED_10:
4260 case SPEED_100:
44defeb3 4261 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4262 netdev->features &= ~NETIF_F_TSO;
4263 netdev->features &= ~NETIF_F_TSO6;
4264 break;
4265 case SPEED_1000:
4266 netdev->features |= NETIF_F_TSO;
4267 netdev->features |= NETIF_F_TSO6;
4268 break;
4269 default:
4270 /* oops */
4271 break;
4272 }
4273 }
4274
ad68076e
BA		 4275 /*
4276 * enable transmits in the hardware, need to do this
4277 * after setting TARC(0)
4278 */
bc7f75fa
AK		 4279 tctl = er32(TCTL);
4280 tctl |= E1000_TCTL_EN;
4281 ew32(TCTL, tctl);
4282
75eb0fad
BA		 4283 /*
4284 * Perform any post-link-up configuration before
4285 * reporting link up.
4286 */
4287 if (phy->ops.cfg_on_link_up)
4288 phy->ops.cfg_on_link_up(hw);
4289
bc7f75fa 4290 netif_carrier_on(netdev);
bc7f75fa
AK		 4291
4292 if (!test_bit(__E1000_DOWN, &adapter->state))
4293 mod_timer(&adapter->phy_info_timer,
4294 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4295 }
4296 } else {
4297 if (netif_carrier_ok(netdev)) {
4298 adapter->link_speed = 0;
4299 adapter->link_duplex = 0;
8f12fe86
BA		 4300 /* Link status message must follow this format */
4301 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4302 adapter->netdev->name);
bc7f75fa 4303 netif_carrier_off(netdev);
bc7f75fa
AK		 4304 if (!test_bit(__E1000_DOWN, &adapter->state))
4305 mod_timer(&adapter->phy_info_timer,
4306 round_jiffies(jiffies + 2 * HZ));
4307
4308 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4309 schedule_work(&adapter->reset_task);
23606cf5
RW		 4310 else
4311 pm_schedule_suspend(netdev->dev.parent,
4312 LINK_TIMEOUT);
bc7f75fa
AK		 4313 }
4314 }
4315
4316link_up:
67fd4fcb 4317 spin_lock(&adapter->stats64_lock);
bc7f75fa
AK		 4318 e1000e_update_stats(adapter);
4319
4320 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4321 adapter->tpt_old = adapter->stats.tpt;
4322 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4323 adapter->colc_old = adapter->stats.colc;
4324
7c25769f
BA		 4325 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4326 adapter->gorc_old = adapter->stats.gorc;
4327 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4328 adapter->gotc_old = adapter->stats.gotc;
2084b114 4329 spin_unlock(&adapter->stats64_lock);
bc7f75fa
AK		 4330
4331 e1000e_update_adaptive(&adapter->hw);
4332
90da0669
BA		 4333 if (!netif_carrier_ok(netdev) &&
4334 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) {
4335 /*
4336 * We've lost link, so the controller stops DMA,
4337 * but we've got queued Tx work that's never going
4338 * to get done, so reset controller to flush Tx.
4339 * (Do the reset outside of interrupt context).
4340 */
90da0669
BA		 4341 schedule_work(&adapter->reset_task);
4342 /* return immediately since reset is imminent */
4343 return;
bc7f75fa
AK		 4344 }
4345
eab2abf5
JB		 4346 /* Simple mode for Interrupt Throttle Rate (ITR) */
4347 if (adapter->itr_setting == 4) {
4348 /*
4349 * Symmetric Tx/Rx gets a reduced ITR=2000;
4350 * Total asymmetrical Tx or Rx gets ITR=8000;
4351 * everyone else is between 2000-8000.
4352 */
4353 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4354 u32 dif = (adapter->gotc > adapter->gorc ?
4355 adapter->gotc - adapter->gorc :
4356 adapter->gorc - adapter->gotc) / 10000;
4357 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4358
4359 ew32(ITR, 1000000000 / (itr * 256));
4360 }
4361
ad68076e 4362 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4363 if (adapter->msix_entries)
4364 ew32(ICS, adapter->rx_ring->ims_val);
4365 else
4366 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa 4367
713b3c9e
JB		 4368 /* flush pending descriptors to memory before detecting Tx hang */
4369 e1000e_flush_descriptors(adapter);
4370
bc7f75fa
AK		 4371 /* Force detection of hung controller every watchdog period */
4372 adapter->detect_tx_hung = 1;
4373
ad68076e
BA		 4374 /*
4375 * With 82571 controllers, LAA may be overwritten due to controller
4376 * reset from the other port. Set the appropriate LAA in RAR[0]
4377 */
bc7f75fa
AK		 4378 if (e1000e_get_laa_state_82571(hw))
4379 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4380
ff10e13c
CW		 4381 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4382 e1000e_check_82574_phy_workaround(adapter);
4383
bc7f75fa
AK		 4384 /* Reset the timer */
4385 if (!test_bit(__E1000_DOWN, &adapter->state))
4386 mod_timer(&adapter->watchdog_timer,
4387 round_jiffies(jiffies + 2 * HZ));
4388}
4389
4390#define E1000_TX_FLAGS_CSUM 0x00000001
4391#define E1000_TX_FLAGS_VLAN 0x00000002
4392#define E1000_TX_FLAGS_TSO 0x00000004
4393#define E1000_TX_FLAGS_IPV4 0x00000008
4394#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4395#define E1000_TX_FLAGS_VLAN_SHIFT 16
4396
4397static int e1000_tso(struct e1000_adapter *adapter,
4398 struct sk_buff *skb)
4399{
4400 struct e1000_ring *tx_ring = adapter->tx_ring;
4401 struct e1000_context_desc *context_desc;
4402 struct e1000_buffer *buffer_info;
4403 unsigned int i;
4404 u32 cmd_length = 0;
4405 u16 ipcse = 0, tucse, mss;
4406 u8 ipcss, ipcso, tucss, tucso, hdr_len;
bc7f75fa 4407
3d5e33c9
BA		 4408 if (!skb_is_gso(skb))
4409 return 0;
bc7f75fa 4410
3d5e33c9 4411 if (skb_header_cloned(skb)) {
90da0669
BA		 4412 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4413
3d5e33c9
BA		 4414 if (err)
4415 return err;
bc7f75fa
AK		 4416 }
4417
3d5e33c9
BA		 4418 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4419 mss = skb_shinfo(skb)->gso_size;
4420 if (skb->protocol == htons(ETH_P_IP)) {
4421 struct iphdr *iph = ip_hdr(skb);
4422 iph->tot_len = 0;
4423 iph->check = 0;
4424 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4425 0, IPPROTO_TCP, 0);
4426 cmd_length = E1000_TXD_CMD_IP;
4427 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4428 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4429 ipv6_hdr(skb)->payload_len = 0;
4430 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4431 &ipv6_hdr(skb)->daddr,
4432 0, IPPROTO_TCP, 0);
4433 ipcse = 0;
4434 }
4435 ipcss = skb_network_offset(skb);
4436 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4437 tucss = skb_transport_offset(skb);
4438 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4439 tucse = 0;
4440
4441 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4442 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4443
4444 i = tx_ring->next_to_use;
4445 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4446 buffer_info = &tx_ring->buffer_info[i];
4447
4448 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4449 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4450 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4451 context_desc->upper_setup.tcp_fields.tucss = tucss;
4452 context_desc->upper_setup.tcp_fields.tucso = tucso;
4453 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4454 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4455 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4456 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4457
4458 buffer_info->time_stamp = jiffies;
4459 buffer_info->next_to_watch = i;
4460
4461 i++;
4462 if (i == tx_ring->count)
4463 i = 0;
4464 tx_ring->next_to_use = i;
4465
4466 return 1;
bc7f75fa
AK		 4467}
4468
4469static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4470{
4471 struct e1000_ring *tx_ring = adapter->tx_ring;
4472 struct e1000_context_desc *context_desc;
4473 struct e1000_buffer *buffer_info;
4474 unsigned int i;
4475 u8 css;
af807c82 4476 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4477 __be16 protocol;
bc7f75fa 4478
af807c82
DG		 4479 if (skb->ip_summed != CHECKSUM_PARTIAL)
4480 return 0;
bc7f75fa 4481
5f66f208
AJ		 4482 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4483 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4484 else
4485 protocol = skb->protocol;
4486
3f518390 4487 switch (protocol) {
09640e63 4488 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4489 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4490 cmd_len |= E1000_TXD_CMD_TCP;
4491 break;
09640e63 4492 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4493 /* XXX not handling all IPV6 headers */
4494 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4495 cmd_len |= E1000_TXD_CMD_TCP;
4496 break;
4497 default:
4498 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4499 e_warn("checksum_partial proto=%x!\n",
4500 be16_to_cpu(protocol));
af807c82 4501 break;
bc7f75fa
AK		 4502 }
4503
0d0b1672 4504 css = skb_checksum_start_offset(skb);
af807c82
DG		 4505
4506 i = tx_ring->next_to_use;
4507 buffer_info = &tx_ring->buffer_info[i];
4508 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4509
4510 context_desc->lower_setup.ip_config = 0;
4511 context_desc->upper_setup.tcp_fields.tucss = css;
4512 context_desc->upper_setup.tcp_fields.tucso =
4513 css + skb->csum_offset;
4514 context_desc->upper_setup.tcp_fields.tucse = 0;
4515 context_desc->tcp_seg_setup.data = 0;
4516 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4517
4518 buffer_info->time_stamp = jiffies;
4519 buffer_info->next_to_watch = i;
4520
4521 i++;
4522 if (i == tx_ring->count)
4523 i = 0;
4524 tx_ring->next_to_use = i;
4525
4526 return 1;
bc7f75fa
AK		 4527}
4528
4529#define E1000_MAX_PER_TXD 8192
4530#define E1000_MAX_TXD_PWR 12
4531
4532static int e1000_tx_map(struct e1000_adapter *adapter,
4533 struct sk_buff *skb, unsigned int first,
4534 unsigned int max_per_txd, unsigned int nr_frags,
4535 unsigned int mss)
4536{
4537 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4538 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4539 struct e1000_buffer *buffer_info;
8ddc951c 4540 unsigned int len = skb_headlen(skb);
03b1320d 4541 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4542 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4543
4544 i = tx_ring->next_to_use;
4545
4546 while (len) {
1b7719c4 4547 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4548 size = min(len, max_per_txd);
4549
bc7f75fa 4550 buffer_info->length = size;
bc7f75fa 4551 buffer_info->time_stamp = jiffies;
bc7f75fa 4552 buffer_info->next_to_watch = i;
0be3f55f
NN		 4553 buffer_info->dma = dma_map_single(&pdev->dev,
4554 skb->data + offset,
af667a29 4555 size, DMA_TO_DEVICE);
03b1320d 4556 buffer_info->mapped_as_page = false;
0be3f55f 4557 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4558 goto dma_error;
bc7f75fa
AK		 4559
4560 len -= size;
4561 offset += size;
03b1320d 4562 count++;
1b7719c4
AD		 4563
4564 if (len) {
4565 i++;
4566 if (i == tx_ring->count)
4567 i = 0;
4568 }
bc7f75fa
AK		 4569 }
4570
4571 for (f = 0; f < nr_frags; f++) {
4572 struct skb_frag_struct *frag;
4573
4574 frag = &skb_shinfo(skb)->frags[f];
4575 len = frag->size;
03b1320d 4576 offset = frag->page_offset;
bc7f75fa
AK		 4577
4578 while (len) {
1b7719c4
AD		 4579 i++;
4580 if (i == tx_ring->count)
4581 i = 0;
4582
bc7f75fa
AK		 4583 buffer_info = &tx_ring->buffer_info[i];
4584 size = min(len, max_per_txd);
bc7f75fa
AK		 4585
4586 buffer_info->length = size;
4587 buffer_info->time_stamp = jiffies;
bc7f75fa 4588 buffer_info->next_to_watch = i;
0be3f55f 4589 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4590 offset, size,
0be3f55f 4591 DMA_TO_DEVICE);
03b1320d 4592 buffer_info->mapped_as_page = true;
0be3f55f 4593 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4594 goto dma_error;
bc7f75fa
AK		 4595
4596 len -= size;
4597 offset += size;
4598 count++;
bc7f75fa
AK		 4599 }
4600 }
4601
af667a29 4602 segs = skb_shinfo(skb)->gso_segs ? : 1;
9ed318d5
TH		 4603 /* multiply data chunks by size of headers */
4604 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4605
bc7f75fa 4606 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4607 tx_ring->buffer_info[i].segs = segs;
4608 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4609 tx_ring->buffer_info[first].next_to_watch = i;
4610
4611 return count;
03b1320d
AD		 4612
4613dma_error:
af667a29 4614 dev_err(&pdev->dev, "Tx DMA map failed\n");
03b1320d 4615 buffer_info->dma = 0;
c1fa347f 4616 if (count)
03b1320d 4617 count--;
c1fa347f
RK		 4618
4619 while (count--) {
af667a29 4620 if (i == 0)
03b1320d 4621 i += tx_ring->count;
c1fa347f 4622 i--;
03b1320d 4623 buffer_info = &tx_ring->buffer_info[i];
1d51c418 4624 e1000_put_txbuf(adapter, buffer_info);
03b1320d
AD		 4625 }
4626
4627 return 0;
bc7f75fa
AK		 4628}
4629
4630static void e1000_tx_queue(struct e1000_adapter *adapter,
4631 int tx_flags, int count)
4632{
4633 struct e1000_ring *tx_ring = adapter->tx_ring;
4634 struct e1000_tx_desc *tx_desc = NULL;
4635 struct e1000_buffer *buffer_info;
4636 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4637 unsigned int i;
4638
4639 if (tx_flags & E1000_TX_FLAGS_TSO) {
4640 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4641 E1000_TXD_CMD_TSE;
4642 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4643
4644 if (tx_flags & E1000_TX_FLAGS_IPV4)
4645 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4646 }
4647
4648 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4649 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4650 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4651 }
4652
4653 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4654 txd_lower |= E1000_TXD_CMD_VLE;
4655 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4656 }
4657
4658 i = tx_ring->next_to_use;
4659
36b973df 4660 do {
bc7f75fa
AK		 4661 buffer_info = &tx_ring->buffer_info[i];
4662 tx_desc = E1000_TX_DESC(*tx_ring, i);
4663 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4664 tx_desc->lower.data =
4665 cpu_to_le32(txd_lower | buffer_info->length);
4666 tx_desc->upper.data = cpu_to_le32(txd_upper);
4667
4668 i++;
4669 if (i == tx_ring->count)
4670 i = 0;
36b973df 4671 } while (--count > 0);
bc7f75fa
AK		 4672
4673 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4674
ad68076e
BA		 4675 /*
4676 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4677 * know there are new descriptors to fetch. (Only
4678 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4679 * such as IA-64).
4680 */
bc7f75fa
AK		 4681 wmb();
4682
4683 tx_ring->next_to_use = i;
4684 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4685 /*
4686 * we need this if more than one processor can write to our tail
4687 * at a time, it synchronizes IO on IA64/Altix systems
4688 */
bc7f75fa
AK		 4689 mmiowb();
4690}
4691
4692#define MINIMUM_DHCP_PACKET_SIZE 282
4693static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4694 struct sk_buff *skb)
4695{
4696 struct e1000_hw *hw = &adapter->hw;
4697 u16 length, offset;
4698
4699 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4700 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4701 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4702 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4703 return 0;
4704 }
4705
4706 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4707 return 0;
4708
4709 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4710 return 0;
4711
4712 {
4713 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4714 struct udphdr *udp;
4715
4716 if (ip->protocol != IPPROTO_UDP)
4717 return 0;
4718
4719 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4720 if (ntohs(udp->dest) != 67)
4721 return 0;
4722
4723 offset = (u8 *)udp + 8 - skb->data;
4724 length = skb->len - offset;
4725 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4726 }
4727
4728 return 0;
4729}
4730
4731static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4732{
4733 struct e1000_adapter *adapter = netdev_priv(netdev);
4734
4735 netif_stop_queue(netdev);
ad68076e
BA		 4736 /*
4737 * Herbert's original patch had:
bc7f75fa 4738 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4739 * but since that doesn't exist yet, just open code it.
4740 */
bc7f75fa
AK		 4741 smp_mb();
4742
ad68076e
BA		 4743 /*
4744 * We need to check again in a case another CPU has just
4745 * made room available.
4746 */
bc7f75fa
AK		 4747 if (e1000_desc_unused(adapter->tx_ring) < size)
4748 return -EBUSY;
4749
4750 /* A reprieve! */
4751 netif_start_queue(netdev);
4752 ++adapter->restart_queue;
4753 return 0;
4754}
4755
4756static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4757{
4758 struct e1000_adapter *adapter = netdev_priv(netdev);
4759
4760 if (e1000_desc_unused(adapter->tx_ring) >= size)
4761 return 0;
4762 return __e1000_maybe_stop_tx(netdev, size);
4763}
4764
4765#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4766static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4767 struct net_device *netdev)
bc7f75fa
AK		 4768{
4769 struct e1000_adapter *adapter = netdev_priv(netdev);
4770 struct e1000_ring *tx_ring = adapter->tx_ring;
4771 unsigned int first;
4772 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4773 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4774 unsigned int tx_flags = 0;
e743d313 4775 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4776 unsigned int nr_frags;
4777 unsigned int mss;
bc7f75fa
AK		 4778 int count = 0;
4779 int tso;
4780 unsigned int f;
bc7f75fa
AK		 4781
4782 if (test_bit(__E1000_DOWN, &adapter->state)) {
4783 dev_kfree_skb_any(skb);
4784 return NETDEV_TX_OK;
4785 }
4786
4787 if (skb->len <= 0) {
4788 dev_kfree_skb_any(skb);
4789 return NETDEV_TX_OK;
4790 }
4791
4792 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4793 /*
4794 * The controller does a simple calculation to
bc7f75fa
AK		 4795 * make sure there is enough room in the FIFO before
4796 * initiating the DMA for each buffer. The calc is:
4797 * 4 = ceil(buffer len/mss). To make sure we don't
4798 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4799 * drops.
4800 */
bc7f75fa
AK		 4801 if (mss) {
4802 u8 hdr_len;
4803 max_per_txd = min(mss << 2, max_per_txd);
4804 max_txd_pwr = fls(max_per_txd) - 1;
4805
ad68076e
BA		 4806 /*
4807 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4808 * points to just header, pull a few bytes of payload from
4809 * frags into skb->data
4810 */
bc7f75fa 4811 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4812 /*
4813 * we do this workaround for ES2LAN, but it is un-necessary,
4814 * avoiding it could save a lot of cycles
4815 */
4e6c709c 4816 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4817 unsigned int pull_size;
4818
4819 pull_size = min((unsigned int)4, skb->data_len);
4820 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4821 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4822 dev_kfree_skb_any(skb);
4823 return NETDEV_TX_OK;
4824 }
e743d313 4825 len = skb_headlen(skb);
bc7f75fa
AK		 4826 }
4827 }
4828
4829 /* reserve a descriptor for the offload context */
4830 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4831 count++;
4832 count++;
4833
4834 count += TXD_USE_COUNT(len, max_txd_pwr);
4835
4836 nr_frags = skb_shinfo(skb)->nr_frags;
4837 for (f = 0; f < nr_frags; f++)
4838 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4839 max_txd_pwr);
4840
4841 if (adapter->hw.mac.tx_pkt_filtering)
4842 e1000_transfer_dhcp_info(adapter, skb);
4843
ad68076e
BA		 4844 /*
4845 * need: count + 2 desc gap to keep tail from touching
4846 * head, otherwise try next time
4847 */
92af3e95 4848 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4849 return NETDEV_TX_BUSY;
bc7f75fa 4850
eab6d18d 4851 if (vlan_tx_tag_present(skb)) {
bc7f75fa
AK		 4852 tx_flags |= E1000_TX_FLAGS_VLAN;
4853 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4854 }
4855
4856 first = tx_ring->next_to_use;
4857
4858 tso = e1000_tso(adapter, skb);
4859 if (tso < 0) {
4860 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4861 return NETDEV_TX_OK;
4862 }
4863
4864 if (tso)
4865 tx_flags |= E1000_TX_FLAGS_TSO;
4866 else if (e1000_tx_csum(adapter, skb))
4867 tx_flags |= E1000_TX_FLAGS_CSUM;
4868
ad68076e
BA		 4869 /*
4870 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4871 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4872 * no longer assume, we must.
4873 */
bc7f75fa
AK		 4874 if (skb->protocol == htons(ETH_P_IP))
4875 tx_flags |= E1000_TX_FLAGS_IPV4;
4876
25985edc 4877 /* if count is 0 then mapping error has occurred */
bc7f75fa 4878 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4879 if (count) {
4880 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4881 /* Make sure there is space in the ring for the next send. */
4882 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4883
4884 } else {
bc7f75fa 4885 dev_kfree_skb_any(skb);
1b7719c4
AD		 4886 tx_ring->buffer_info[first].time_stamp = 0;
4887 tx_ring->next_to_use = first;
bc7f75fa
AK		 4888 }
4889
bc7f75fa
AK		 4890 return NETDEV_TX_OK;
4891}
4892
4893/**
4894 * e1000_tx_timeout - Respond to a Tx Hang
4895 * @netdev: network interface device structure
4896 **/
4897static void e1000_tx_timeout(struct net_device *netdev)
4898{
4899 struct e1000_adapter *adapter = netdev_priv(netdev);
4900
4901 /* Do the reset outside of interrupt context */
4902 adapter->tx_timeout_count++;
4903 schedule_work(&adapter->reset_task);
4904}
4905
4906static void e1000_reset_task(struct work_struct *work)
4907{
4908 struct e1000_adapter *adapter;
4909 adapter = container_of(work, struct e1000_adapter, reset_task);
4910
615b32af
JB		 4911 /* don't run the task if already down */
4912 if (test_bit(__E1000_DOWN, &adapter->state))
4913 return;
4914
affa9dfb
CW		 4915 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4916 (adapter->flags & FLAG_RX_RESTART_NOW))) {
4917 e1000e_dump(adapter);
4918 e_err("Reset adapter\n");
4919 }
bc7f75fa
AK		 4920 e1000e_reinit_locked(adapter);
4921}
4922
4923/**
67fd4fcb 4924 * e1000_get_stats64 - Get System Network Statistics
bc7f75fa 4925 * @netdev: network interface device structure
67fd4fcb 4926 * @stats: rtnl_link_stats64 pointer
bc7f75fa
AK		 4927 *
4928 * Returns the address of the device statistics structure.
bc7f75fa 4929 **/
67fd4fcb
JK		 4930struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
4931 struct rtnl_link_stats64 *stats)
bc7f75fa 4932{
67fd4fcb
JK		 4933 struct e1000_adapter *adapter = netdev_priv(netdev);
4934
4935 memset(stats, 0, sizeof(struct rtnl_link_stats64));
4936 spin_lock(&adapter->stats64_lock);
4937 e1000e_update_stats(adapter);
4938 /* Fill out the OS statistics structure */
4939 stats->rx_bytes = adapter->stats.gorc;
4940 stats->rx_packets = adapter->stats.gprc;
4941 stats->tx_bytes = adapter->stats.gotc;
4942 stats->tx_packets = adapter->stats.gptc;
4943 stats->multicast = adapter->stats.mprc;
4944 stats->collisions = adapter->stats.colc;
4945
4946 /* Rx Errors */
4947
4948 /*
4949 * RLEC on some newer hardware can be incorrect so build
4950 * our own version based on RUC and ROC
4951 */
4952 stats->rx_errors = adapter->stats.rxerrc +
4953 adapter->stats.crcerrs + adapter->stats.algnerrc +
4954 adapter->stats.ruc + adapter->stats.roc +
4955 adapter->stats.cexterr;
4956 stats->rx_length_errors = adapter->stats.ruc +
4957 adapter->stats.roc;
4958 stats->rx_crc_errors = adapter->stats.crcerrs;
4959 stats->rx_frame_errors = adapter->stats.algnerrc;
4960 stats->rx_missed_errors = adapter->stats.mpc;
4961
4962 /* Tx Errors */
4963 stats->tx_errors = adapter->stats.ecol +
4964 adapter->stats.latecol;
4965 stats->tx_aborted_errors = adapter->stats.ecol;
4966 stats->tx_window_errors = adapter->stats.latecol;
4967 stats->tx_carrier_errors = adapter->stats.tncrs;
4968
4969 /* Tx Dropped needs to be maintained elsewhere */
4970
4971 spin_unlock(&adapter->stats64_lock);
4972 return stats;
bc7f75fa
AK		 4973}
4974
4975/**
4976 * e1000_change_mtu - Change the Maximum Transfer Unit
4977 * @netdev: network interface device structure
4978 * @new_mtu: new value for maximum frame size
4979 *
4980 * Returns 0 on success, negative on failure
4981 **/
4982static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4983{
4984 struct e1000_adapter *adapter = netdev_priv(netdev);
4985 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4986
2adc55c9
BA		 4987 /* Jumbo frame support */
4988 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4989 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4990 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4991 return -EINVAL;
4992 }
4993
2adc55c9
BA		 4994 /* Supported frame sizes */
4995 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4996 (max_frame > adapter->max_hw_frame_size)) {
4997 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4998 return -EINVAL;
4999 }
5000
a1ce6473
BA		 5001 /* Jumbo frame workaround on 82579 requires CRC be stripped */
5002 if ((adapter->hw.mac.type == e1000_pch2lan) &&
5003 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5004 (new_mtu > ETH_DATA_LEN)) {
5005 e_err("Jumbo Frames not supported on 82579 when CRC "
5006 "stripping is disabled.\n");
5007 return -EINVAL;
5008 }
5009
6f461f6c
BA		 5010 /* 82573 Errata 17 */
5011 if (((adapter->hw.mac.type == e1000_82573) ||
5012 (adapter->hw.mac.type == e1000_82574)) &&
5013 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
5014 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
5015 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
5016 }
5017
bc7f75fa 5018 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 5019 usleep_range(1000, 2000);
610c9928 5020 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 5021 adapter->max_frame_size = max_frame;
610c9928
BA		 5022 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5023 netdev->mtu = new_mtu;
bc7f75fa
AK		 5024 if (netif_running(netdev))
5025 e1000e_down(adapter);
5026
ad68076e
BA		 5027 /*
5028 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 5029 * means we reserve 2 more, this pushes us to allocate from the next
5030 * larger slab size.
ad68076e 5031 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 5032 * However with the new *_jumbo_rx* routines, jumbo receives will use
5033 * fragmented skbs
ad68076e 5034 */
bc7f75fa 5035
9926146b 5036 if (max_frame <= 2048)
bc7f75fa
AK		 5037 adapter->rx_buffer_len = 2048;
5038 else
5039 adapter->rx_buffer_len = 4096;
5040
5041 /* adjust allocation if LPE protects us, and we aren't using SBP */
5042 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5043 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5044 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 5045 + ETH_FCS_LEN;
bc7f75fa 5046
bc7f75fa
AK		 5047 if (netif_running(netdev))
5048 e1000e_up(adapter);
5049 else
5050 e1000e_reset(adapter);
5051
5052 clear_bit(__E1000_RESETTING, &adapter->state);
5053
5054 return 0;
5055}
5056
5057static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5058 int cmd)
5059{
5060 struct e1000_adapter *adapter = netdev_priv(netdev);
5061 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 5062
318a94d6 5063 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 5064 return -EOPNOTSUPP;
5065
5066 switch (cmd) {
5067 case SIOCGMIIPHY:
5068 data->phy_id = adapter->hw.phy.addr;
5069 break;
5070 case SIOCGMIIREG:
b16a002e
BA		 5071 e1000_phy_read_status(adapter);
5072
7c25769f
BA		 5073 switch (data->reg_num & 0x1F) {
5074 case MII_BMCR:
5075 data->val_out = adapter->phy_regs.bmcr;
5076 break;
5077 case MII_BMSR:
5078 data->val_out = adapter->phy_regs.bmsr;
5079 break;
5080 case MII_PHYSID1:
5081 data->val_out = (adapter->hw.phy.id >> 16);
5082 break;
5083 case MII_PHYSID2:
5084 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5085 break;
5086 case MII_ADVERTISE:
5087 data->val_out = adapter->phy_regs.advertise;
5088 break;
5089 case MII_LPA:
5090 data->val_out = adapter->phy_regs.lpa;
5091 break;
5092 case MII_EXPANSION:
5093 data->val_out = adapter->phy_regs.expansion;
5094 break;
5095 case MII_CTRL1000:
5096 data->val_out = adapter->phy_regs.ctrl1000;
5097 break;
5098 case MII_STAT1000:
5099 data->val_out = adapter->phy_regs.stat1000;
5100 break;
5101 case MII_ESTATUS:
5102 data->val_out = adapter->phy_regs.estatus;
5103 break;
5104 default:
bc7f75fa
AK		 5105 return -EIO;
5106 }
bc7f75fa
AK		 5107 break;
5108 case SIOCSMIIREG:
5109 default:
5110 return -EOPNOTSUPP;
5111 }
5112 return 0;
5113}
5114
5115static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5116{
5117 switch (cmd) {
5118 case SIOCGMIIPHY:
5119 case SIOCGMIIREG:
5120 case SIOCSMIIREG:
5121 return e1000_mii_ioctl(netdev, ifr, cmd);
5122 default:
5123 return -EOPNOTSUPP;
5124 }
5125}
5126
a4f58f54
BA		 5127static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5128{
5129 struct e1000_hw *hw = &adapter->hw;
5130 u32 i, mac_reg;
2b6b168d 5131 u16 phy_reg, wuc_enable;
a4f58f54
BA		 5132 int retval = 0;
5133
5134 /* copy MAC RARs to PHY RARs */
d3738bb8 5135 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54 5136
2b6b168d
BA		 5137 retval = hw->phy.ops.acquire(hw);
5138 if (retval) {
5139 e_err("Could not acquire PHY\n");
5140 return retval;
5141 }
5142
5143 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5144 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5145 if (retval)
5146 goto out;
5147
5148 /* copy MAC MTA to PHY MTA - only needed for pchlan */
a4f58f54
BA		 5149 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5150 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
2b6b168d
BA		 5151 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5152 (u16)(mac_reg & 0xFFFF));
5153 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5154 (u16)((mac_reg >> 16) & 0xFFFF));
a4f58f54
BA		 5155 }
5156
5157 /* configure PHY Rx Control register */
2b6b168d 5158 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
a4f58f54
BA		 5159 mac_reg = er32(RCTL);
5160 if (mac_reg & E1000_RCTL_UPE)
5161 phy_reg |= BM_RCTL_UPE;
5162 if (mac_reg & E1000_RCTL_MPE)
5163 phy_reg |= BM_RCTL_MPE;
5164 phy_reg &= ~(BM_RCTL_MO_MASK);
5165 if (mac_reg & E1000_RCTL_MO_3)
5166 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5167 << BM_RCTL_MO_SHIFT);
5168 if (mac_reg & E1000_RCTL_BAM)
5169 phy_reg |= BM_RCTL_BAM;
5170 if (mac_reg & E1000_RCTL_PMCF)
5171 phy_reg |= BM_RCTL_PMCF;
5172 mac_reg = er32(CTRL);
5173 if (mac_reg & E1000_CTRL_RFCE)
5174 phy_reg |= BM_RCTL_RFCE;
2b6b168d 5175 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
a4f58f54
BA		 5176
5177 /* enable PHY wakeup in MAC register */
5178 ew32(WUFC, wufc);
5179 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5180
5181 /* configure and enable PHY wakeup in PHY registers */
2b6b168d
BA		 5182 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5183 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
a4f58f54
BA		 5184
5185 /* activate PHY wakeup */
2b6b168d
BA		 5186 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5187 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
a4f58f54
BA		 5188 if (retval)
5189 e_err("Could not set PHY Host Wakeup bit\n");
5190out:
94d8186a 5191 hw->phy.ops.release(hw);
a4f58f54
BA		 5192
5193 return retval;
5194}
5195
23606cf5
RW		 5196static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5197 bool runtime)
bc7f75fa
AK		 5198{
5199 struct net_device *netdev = pci_get_drvdata(pdev);
5200 struct e1000_adapter *adapter = netdev_priv(netdev);
5201 struct e1000_hw *hw = &adapter->hw;
5202 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5203 /* Runtime suspend should only enable wakeup for link changes */
5204 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5205 int retval = 0;
5206
5207 netif_device_detach(netdev);
5208
5209 if (netif_running(netdev)) {
5210 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5211 e1000e_down(adapter);
5212 e1000_free_irq(adapter);
5213 }
4662e82b 5214 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5215
5216 retval = pci_save_state(pdev);
5217 if (retval)
5218 return retval;
5219
5220 status = er32(STATUS);
5221 if (status & E1000_STATUS_LU)
5222 wufc &= ~E1000_WUFC_LNKC;
5223
5224 if (wufc) {
5225 e1000_setup_rctl(adapter);
5226 e1000_set_multi(netdev);
5227
5228 /* turn on all-multi mode if wake on multicast is enabled */
5229 if (wufc & E1000_WUFC_MC) {
5230 rctl = er32(RCTL);
5231 rctl |= E1000_RCTL_MPE;
5232 ew32(RCTL, rctl);
5233 }
5234
5235 ctrl = er32(CTRL);
5236 /* advertise wake from D3Cold */
5237 #define E1000_CTRL_ADVD3WUC 0x00100000
5238 /* phy power management enable */
5239 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5240 ctrl |= E1000_CTRL_ADVD3WUC;
5241 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5242 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5243 ew32(CTRL, ctrl);
5244
318a94d6
JK		 5245 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5246 adapter->hw.phy.media_type ==
5247 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5248 /* keep the laser running in D3 */
5249 ctrl_ext = er32(CTRL_EXT);
93a23f48 5250 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5251 ew32(CTRL_EXT, ctrl_ext);
5252 }
5253
97ac8cae 5254 if (adapter->flags & FLAG_IS_ICH)
99730e4c 5255 e1000_suspend_workarounds_ich8lan(&adapter->hw);
97ac8cae 5256
bc7f75fa
AK		 5257 /* Allow time for pending master requests to run */
5258 e1000e_disable_pcie_master(&adapter->hw);
5259
82776a4b 5260 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5261 /* enable wakeup by the PHY */
5262 retval = e1000_init_phy_wakeup(adapter, wufc);
5263 if (retval)
5264 return retval;
5265 } else {
5266 /* enable wakeup by the MAC */
5267 ew32(WUFC, wufc);
5268 ew32(WUC, E1000_WUC_PME_EN);
5269 }
bc7f75fa
AK		 5270 } else {
5271 ew32(WUC, 0);
5272 ew32(WUFC, 0);
bc7f75fa
AK		 5273 }
5274
4f9de721
RW		 5275 *enable_wake = !!wufc;
5276
bc7f75fa 5277 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5278 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5279 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5280 *enable_wake = true;
bc7f75fa
AK		 5281
5282 if (adapter->hw.phy.type == e1000_phy_igp_3)
5283 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5284
ad68076e
BA		 5285 /*
5286 * Release control of h/w to f/w. If f/w is AMT enabled, this
5287 * would have already happened in close and is redundant.
5288 */
31dbe5b4 5289 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 5290
5291 pci_disable_device(pdev);
5292
4f9de721
RW		 5293 return 0;
5294}
5295
5296static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5297{
5298 if (sleep && wake) {
5299 pci_prepare_to_sleep(pdev);
5300 return;
5301 }
5302
5303 pci_wake_from_d3(pdev, wake);
5304 pci_set_power_state(pdev, PCI_D3hot);
5305}
5306
5307static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5308 bool wake)
5309{
5310 struct net_device *netdev = pci_get_drvdata(pdev);
5311 struct e1000_adapter *adapter = netdev_priv(netdev);
5312
005cbdfc
AD		 5313 /*
5314 * The pci-e switch on some quad port adapters will report a
5315 * correctable error when the MAC transitions from D0 to D3. To
5316 * prevent this we need to mask off the correctable errors on the
5317 * downstream port of the pci-e switch.
5318 */
5319 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5320 struct pci_dev *us_dev = pdev->bus->self;
5321 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5322 u16 devctl;
5323
5324 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5325 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5326 (devctl & ~PCI_EXP_DEVCTL_CERE));
5327
4f9de721 5328 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5329
5330 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5331 } else {
4f9de721 5332 e1000_power_off(pdev, sleep, wake);
005cbdfc 5333 }
bc7f75fa
AK		 5334}
5335
6f461f6c
BA		 5336#ifdef CONFIG_PCIEASPM
5337static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5338{
9f728f53 5339 pci_disable_link_state_locked(pdev, state);
6f461f6c
BA		 5340}
5341#else
5342static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5343{
5344 int pos;
6f461f6c 5345 u16 reg16;
1eae4eb2
AK		 5346
5347 /*
6f461f6c
BA		 5348 * Both device and parent should have the same ASPM setting.
5349 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5350 */
6f461f6c
BA		 5351 pos = pci_pcie_cap(pdev);
5352 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5353 reg16 &= ~state;
5354 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5355
0c75ba22
AB		 5356 if (!pdev->bus->self)
5357 return;
5358
6f461f6c
BA		 5359 pos = pci_pcie_cap(pdev->bus->self);
5360 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5361 reg16 &= ~state;
5362 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5363}
5364#endif
78cd29d5 5365static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6f461f6c
BA		 5366{
5367 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5368 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5369 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5370
5371 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5372}
5373
aa338601 5374#ifdef CONFIG_PM
23606cf5 5375static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5376{
23606cf5 5377 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5378}
5379
23606cf5 5380static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5381{
5382 struct net_device *netdev = pci_get_drvdata(pdev);
5383 struct e1000_adapter *adapter = netdev_priv(netdev);
5384 struct e1000_hw *hw = &adapter->hw;
78cd29d5 5385 u16 aspm_disable_flag = 0;
bc7f75fa
AK		 5386 u32 err;
5387
78cd29d5
BA		 5388 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5389 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5390 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5391 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5392 if (aspm_disable_flag)
5393 e1000e_disable_aspm(pdev, aspm_disable_flag);
5394
bc7f75fa
AK		 5395 pci_set_power_state(pdev, PCI_D0);
5396 pci_restore_state(pdev);
28b8f04a 5397 pci_save_state(pdev);
6e4f6f6b 5398
4662e82b 5399 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5400 if (netif_running(netdev)) {
5401 err = e1000_request_irq(adapter);
5402 if (err)
5403 return err;
5404 }
5405
99730e4c
BA		 5406 if (hw->mac.type == e1000_pch2lan)
5407 e1000_resume_workarounds_pchlan(&adapter->hw);
5408
bc7f75fa 5409 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5410
5411 /* report the system wakeup cause from S3/S4 */
5412 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5413 u16 phy_data;
5414
5415 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5416 if (phy_data) {
5417 e_info("PHY Wakeup cause - %s\n",
5418 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5419 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5420 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5421 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5422 phy_data & E1000_WUS_LNKC ? "Link Status "
5423 " Change" : "other");
5424 }
5425 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5426 } else {
5427 u32 wus = er32(WUS);
5428 if (wus) {
5429 e_info("MAC Wakeup cause - %s\n",
5430 wus & E1000_WUS_EX ? "Unicast Packet" :
5431 wus & E1000_WUS_MC ? "Multicast Packet" :
5432 wus & E1000_WUS_BC ? "Broadcast Packet" :
5433 wus & E1000_WUS_MAG ? "Magic Packet" :
5434 wus & E1000_WUS_LNKC ? "Link Status Change" :
5435 "other");
5436 }
5437 ew32(WUS, ~0);
5438 }
5439
bc7f75fa 5440 e1000e_reset(adapter);
bc7f75fa 5441
cd791618 5442 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5443
5444 if (netif_running(netdev))
5445 e1000e_up(adapter);
5446
5447 netif_device_attach(netdev);
5448
ad68076e
BA		 5449 /*
5450 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5451 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5452 * under the control of the driver.
5453 */
c43bc57e 5454 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5455 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5456
5457 return 0;
5458}
23606cf5 5459
a0340162
RW		 5460#ifdef CONFIG_PM_SLEEP
5461static int e1000_suspend(struct device *dev)
5462{
5463 struct pci_dev *pdev = to_pci_dev(dev);
5464 int retval;
5465 bool wake;
5466
5467 retval = __e1000_shutdown(pdev, &wake, false);
5468 if (!retval)
5469 e1000_complete_shutdown(pdev, true, wake);
5470
5471 return retval;
5472}
5473
23606cf5
RW		 5474static int e1000_resume(struct device *dev)
5475{
5476 struct pci_dev *pdev = to_pci_dev(dev);
5477 struct net_device *netdev = pci_get_drvdata(pdev);
5478 struct e1000_adapter *adapter = netdev_priv(netdev);
5479
5480 if (e1000e_pm_ready(adapter))
5481 adapter->idle_check = true;
5482
5483 return __e1000_resume(pdev);
5484}
a0340162
RW		 5485#endif /* CONFIG_PM_SLEEP */
5486
5487#ifdef CONFIG_PM_RUNTIME
5488static int e1000_runtime_suspend(struct device *dev)
5489{
5490 struct pci_dev *pdev = to_pci_dev(dev);
5491 struct net_device *netdev = pci_get_drvdata(pdev);
5492 struct e1000_adapter *adapter = netdev_priv(netdev);
5493
5494 if (e1000e_pm_ready(adapter)) {
5495 bool wake;
5496
5497 __e1000_shutdown(pdev, &wake, true);
5498 }
5499
5500 return 0;
5501}
5502
5503static int e1000_idle(struct device *dev)
5504{
5505 struct pci_dev *pdev = to_pci_dev(dev);
5506 struct net_device *netdev = pci_get_drvdata(pdev);
5507 struct e1000_adapter *adapter = netdev_priv(netdev);
5508
5509 if (!e1000e_pm_ready(adapter))
5510 return 0;
5511
5512 if (adapter->idle_check) {
5513 adapter->idle_check = false;
5514 if (!e1000e_has_link(adapter))
5515 pm_schedule_suspend(dev, MSEC_PER_SEC);
5516 }
5517
5518 return -EBUSY;
5519}
23606cf5
RW		 5520
5521static int e1000_runtime_resume(struct device *dev)
5522{
5523 struct pci_dev *pdev = to_pci_dev(dev);
5524 struct net_device *netdev = pci_get_drvdata(pdev);
5525 struct e1000_adapter *adapter = netdev_priv(netdev);
5526
5527 if (!e1000e_pm_ready(adapter))
5528 return 0;
5529
5530 adapter->idle_check = !dev->power.runtime_auto;
5531 return __e1000_resume(pdev);
5532}
a0340162 5533#endif /* CONFIG_PM_RUNTIME */
aa338601 5534#endif /* CONFIG_PM */
bc7f75fa
AK		 5535
5536static void e1000_shutdown(struct pci_dev *pdev)
5537{
4f9de721
RW		 5538 bool wake = false;
5539
23606cf5 5540 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5541
5542 if (system_state == SYSTEM_POWER_OFF)
5543 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5544}
5545
5546#ifdef CONFIG_NET_POLL_CONTROLLER
147b2c8c
DD		 5547
5548static irqreturn_t e1000_intr_msix(int irq, void *data)
5549{
5550 struct net_device *netdev = data;
5551 struct e1000_adapter *adapter = netdev_priv(netdev);
147b2c8c
DD		 5552
5553 if (adapter->msix_entries) {
90da0669
BA		 5554 int vector, msix_irq;
5555
147b2c8c
DD		 5556 vector = 0;
5557 msix_irq = adapter->msix_entries[vector].vector;
5558 disable_irq(msix_irq);
5559 e1000_intr_msix_rx(msix_irq, netdev);
5560 enable_irq(msix_irq);
5561
5562 vector++;
5563 msix_irq = adapter->msix_entries[vector].vector;
5564 disable_irq(msix_irq);
5565 e1000_intr_msix_tx(msix_irq, netdev);
5566 enable_irq(msix_irq);
5567
5568 vector++;
5569 msix_irq = adapter->msix_entries[vector].vector;
5570 disable_irq(msix_irq);
5571 e1000_msix_other(msix_irq, netdev);
5572 enable_irq(msix_irq);
5573 }
5574
5575 return IRQ_HANDLED;
5576}
5577
bc7f75fa
AK		 5578/*
5579 * Polling 'interrupt' - used by things like netconsole to send skbs
5580 * without having to re-enable interrupts. It's not called while
5581 * the interrupt routine is executing.
5582 */
5583static void e1000_netpoll(struct net_device *netdev)
5584{
5585 struct e1000_adapter *adapter = netdev_priv(netdev);
5586
147b2c8c
DD		 5587 switch (adapter->int_mode) {
5588 case E1000E_INT_MODE_MSIX:
5589 e1000_intr_msix(adapter->pdev->irq, netdev);
5590 break;
5591 case E1000E_INT_MODE_MSI:
5592 disable_irq(adapter->pdev->irq);
5593 e1000_intr_msi(adapter->pdev->irq, netdev);
5594 enable_irq(adapter->pdev->irq);
5595 break;
5596 default: /* E1000E_INT_MODE_LEGACY */
5597 disable_irq(adapter->pdev->irq);
5598 e1000_intr(adapter->pdev->irq, netdev);
5599 enable_irq(adapter->pdev->irq);
5600 break;
5601 }
bc7f75fa
AK		 5602}
5603#endif
5604
5605/**
5606 * e1000_io_error_detected - called when PCI error is detected
5607 * @pdev: Pointer to PCI device
5608 * @state: The current pci connection state
5609 *
5610 * This function is called after a PCI bus error affecting
5611 * this device has been detected.
5612 */
5613static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5614 pci_channel_state_t state)
5615{
5616 struct net_device *netdev = pci_get_drvdata(pdev);
5617 struct e1000_adapter *adapter = netdev_priv(netdev);
5618
5619 netif_device_detach(netdev);
5620
c93b5a76
MM		 5621 if (state == pci_channel_io_perm_failure)
5622 return PCI_ERS_RESULT_DISCONNECT;
5623
bc7f75fa
AK		 5624 if (netif_running(netdev))
5625 e1000e_down(adapter);
5626 pci_disable_device(pdev);
5627
5628 /* Request a slot slot reset. */
5629 return PCI_ERS_RESULT_NEED_RESET;
5630}
5631
5632/**
5633 * e1000_io_slot_reset - called after the pci bus has been reset.
5634 * @pdev: Pointer to PCI device
5635 *
5636 * Restart the card from scratch, as if from a cold-boot. Implementation
5637 * resembles the first-half of the e1000_resume routine.
5638 */
5639static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5640{
5641 struct net_device *netdev = pci_get_drvdata(pdev);
5642 struct e1000_adapter *adapter = netdev_priv(netdev);
5643 struct e1000_hw *hw = &adapter->hw;
78cd29d5 5644 u16 aspm_disable_flag = 0;
6e4f6f6b 5645 int err;
111b9dc5 5646 pci_ers_result_t result;
bc7f75fa 5647
78cd29d5
BA		 5648 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5649 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6f461f6c 5650 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
78cd29d5
BA		 5651 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5652 if (aspm_disable_flag)
5653 e1000e_disable_aspm(pdev, aspm_disable_flag);
5654
f0f422e5 5655 err = pci_enable_device_mem(pdev);
6e4f6f6b 5656 if (err) {
bc7f75fa
AK		 5657 dev_err(&pdev->dev,
5658 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5659 result = PCI_ERS_RESULT_DISCONNECT;
5660 } else {
5661 pci_set_master(pdev);
23606cf5 5662 pdev->state_saved = true;
111b9dc5 5663 pci_restore_state(pdev);
bc7f75fa 5664
111b9dc5
JB		 5665 pci_enable_wake(pdev, PCI_D3hot, 0);
5666 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5667
111b9dc5
JB		 5668 e1000e_reset(adapter);
5669 ew32(WUS, ~0);
5670 result = PCI_ERS_RESULT_RECOVERED;
5671 }
bc7f75fa 5672
111b9dc5
JB		 5673 pci_cleanup_aer_uncorrect_error_status(pdev);
5674
5675 return result;
bc7f75fa
AK		 5676}
5677
5678/**
5679 * e1000_io_resume - called when traffic can start flowing again.
5680 * @pdev: Pointer to PCI device
5681 *
5682 * This callback is called when the error recovery driver tells us that
5683 * its OK to resume normal operation. Implementation resembles the
5684 * second-half of the e1000_resume routine.
5685 */
5686static void e1000_io_resume(struct pci_dev *pdev)
5687{
5688 struct net_device *netdev = pci_get_drvdata(pdev);
5689 struct e1000_adapter *adapter = netdev_priv(netdev);
5690
cd791618 5691 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5692
5693 if (netif_running(netdev)) {
5694 if (e1000e_up(adapter)) {
5695 dev_err(&pdev->dev,
5696 "can't bring device back up after reset\n");
5697 return;
5698 }
5699 }
5700
5701 netif_device_attach(netdev);
5702
ad68076e
BA		 5703 /*
5704 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5705 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5706 * under the control of the driver.
5707 */
c43bc57e 5708 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5709 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5710
5711}
5712
5713static void e1000_print_device_info(struct e1000_adapter *adapter)
5714{
5715 struct e1000_hw *hw = &adapter->hw;
5716 struct net_device *netdev = adapter->netdev;
073287c0
BA		 5717 u32 ret_val;
5718 u8 pba_str[E1000_PBANUM_LENGTH];
bc7f75fa
AK		 5719
5720 /* print bus type/speed/width info */
a5cc7642 5721 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
44defeb3
JK		 5722 /* bus width */
5723 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5724 "Width x1"),
5725 /* MAC address */
7c510e4b 5726 netdev->dev_addr);
44defeb3
JK		 5727 e_info("Intel(R) PRO/%s Network Connection\n",
5728 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
073287c0
BA		 5729 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5730 E1000_PBANUM_LENGTH);
5731 if (ret_val)
e0dc4f12 5732 strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1);
073287c0
BA		 5733 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5734 hw->mac.type, hw->phy.type, pba_str);
bc7f75fa
AK		 5735}
5736
10aa4c04
AK		 5737static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5738{
5739 struct e1000_hw *hw = &adapter->hw;
5740 int ret_val;
5741 u16 buf = 0;
5742
5743 if (hw->mac.type != e1000_82573)
5744 return;
5745
5746 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5747 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5748 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5749 dev_warn(&adapter->pdev->dev,
5750 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5751 }
10aa4c04
AK		 5752}
5753
651c2466
SH		 5754static const struct net_device_ops e1000e_netdev_ops = {
5755 .ndo_open = e1000_open,
5756 .ndo_stop = e1000_close,
00829823 5757 .ndo_start_xmit = e1000_xmit_frame,
67fd4fcb 5758 .ndo_get_stats64 = e1000e_get_stats64,
651c2466
SH		 5759 .ndo_set_multicast_list = e1000_set_multi,
5760 .ndo_set_mac_address = e1000_set_mac,
5761 .ndo_change_mtu = e1000_change_mtu,
5762 .ndo_do_ioctl = e1000_ioctl,
5763 .ndo_tx_timeout = e1000_tx_timeout,
5764 .ndo_validate_addr = eth_validate_addr,
5765
651c2466
SH		 5766 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5767 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5768#ifdef CONFIG_NET_POLL_CONTROLLER
5769 .ndo_poll_controller = e1000_netpoll,
5770#endif
5771};
5772
bc7f75fa
AK		 5773/**
5774 * e1000_probe - Device Initialization Routine
5775 * @pdev: PCI device information struct
5776 * @ent: entry in e1000_pci_tbl
5777 *
5778 * Returns 0 on success, negative on failure
5779 *
5780 * e1000_probe initializes an adapter identified by a pci_dev structure.
5781 * The OS initialization, configuring of the adapter private structure,
5782 * and a hardware reset occur.
5783 **/
5784static int __devinit e1000_probe(struct pci_dev *pdev,
5785 const struct pci_device_id *ent)
5786{
5787 struct net_device *netdev;
5788 struct e1000_adapter *adapter;
5789 struct e1000_hw *hw;
5790 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5791 resource_size_t mmio_start, mmio_len;
5792 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5793
5794 static int cards_found;
78cd29d5 5795 u16 aspm_disable_flag = 0;
bc7f75fa
AK		 5796 int i, err, pci_using_dac;
5797 u16 eeprom_data = 0;
5798 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5799
78cd29d5
BA		 5800 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
5801 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6f461f6c 5802 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
78cd29d5
BA		 5803 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5804 if (aspm_disable_flag)
5805 e1000e_disable_aspm(pdev, aspm_disable_flag);
6e4f6f6b 5806
f0f422e5 5807 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5808 if (err)
5809 return err;
5810
5811 pci_using_dac = 0;
0be3f55f 5812 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5813 if (!err) {
0be3f55f 5814 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5815 if (!err)
5816 pci_using_dac = 1;
5817 } else {
0be3f55f 5818 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5819 if (err) {
0be3f55f
NN		 5820 err = dma_set_coherent_mask(&pdev->dev,
5821 DMA_BIT_MASK(32));
bc7f75fa
AK		 5822 if (err) {
5823 dev_err(&pdev->dev, "No usable DMA "
5824 "configuration, aborting\n");
5825 goto err_dma;
5826 }
5827 }
5828 }
5829
e8de1481 5830 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5831 pci_select_bars(pdev, IORESOURCE_MEM),
5832 e1000e_driver_name);
bc7f75fa
AK		 5833 if (err)
5834 goto err_pci_reg;
5835
68eac460 5836 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5837 pci_enable_pcie_error_reporting(pdev);
68eac460 5838
bc7f75fa 5839 pci_set_master(pdev);
438b365a
BA		 5840 /* PCI config space info */
5841 err = pci_save_state(pdev);
5842 if (err)
5843 goto err_alloc_etherdev;
bc7f75fa
AK		 5844
5845 err = -ENOMEM;
5846 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5847 if (!netdev)
5848 goto err_alloc_etherdev;
5849
bc7f75fa
AK		 5850 SET_NETDEV_DEV(netdev, &pdev->dev);
5851
f85e4dfa
TH		 5852 netdev->irq = pdev->irq;
5853
bc7f75fa
AK		 5854 pci_set_drvdata(pdev, netdev);
5855 adapter = netdev_priv(netdev);
5856 hw = &adapter->hw;
5857 adapter->netdev = netdev;
5858 adapter->pdev = pdev;
5859 adapter->ei = ei;
5860 adapter->pba = ei->pba;
5861 adapter->flags = ei->flags;
eb7c3adb 5862 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5863 adapter->hw.adapter = adapter;
5864 adapter->hw.mac.type = ei->mac;
2adc55c9 5865 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5866 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5867
5868 mmio_start = pci_resource_start(pdev, 0);
5869 mmio_len = pci_resource_len(pdev, 0);
5870
5871 err = -EIO;
5872 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5873 if (!adapter->hw.hw_addr)
5874 goto err_ioremap;
5875
5876 if ((adapter->flags & FLAG_HAS_FLASH) &&
5877 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5878 flash_start = pci_resource_start(pdev, 1);
5879 flash_len = pci_resource_len(pdev, 1);
5880 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5881 if (!adapter->hw.flash_address)
5882 goto err_flashmap;
5883 }
5884
5885 /* construct the net_device struct */
651c2466 5886 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5887 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5888 netdev->watchdog_timeo = 5 * HZ;
5889 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5890 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5891
5892 netdev->mem_start = mmio_start;
5893 netdev->mem_end = mmio_start + mmio_len;
5894
5895 adapter->bd_number = cards_found++;
5896
4662e82b
BA		 5897 e1000e_check_options(adapter);
5898
bc7f75fa
AK		 5899 /* setup adapter struct */
5900 err = e1000_sw_init(adapter);
5901 if (err)
5902 goto err_sw_init;
5903
bc7f75fa
AK		 5904 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5905 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5906 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5907
69e3fd8c 5908 err = ei->get_variants(adapter);
bc7f75fa
AK		 5909 if (err)
5910 goto err_hw_init;
5911
4a770358
BA		 5912 if ((adapter->flags & FLAG_IS_ICH) &&
5913 (adapter->flags & FLAG_READ_ONLY_NVM))
5914 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5915
bc7f75fa
AK		 5916 hw->mac.ops.get_bus_info(&adapter->hw);
5917
318a94d6 5918 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5919
5920 /* Copper options */
318a94d6 5921 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5922 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5923 adapter->hw.phy.disable_polarity_correction = 0;
5924 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5925 }
5926
5927 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5928 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5929
5930 netdev->features = NETIF_F_SG |
5931 NETIF_F_HW_CSUM |
5932 NETIF_F_HW_VLAN_TX |
5933 NETIF_F_HW_VLAN_RX;
5934
5935 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5936 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5937
5938 netdev->features |= NETIF_F_TSO;
5939 netdev->features |= NETIF_F_TSO6;
5940
a5136e23
JK		 5941 netdev->vlan_features |= NETIF_F_TSO;
5942 netdev->vlan_features |= NETIF_F_TSO6;
5943 netdev->vlan_features |= NETIF_F_HW_CSUM;
5944 netdev->vlan_features |= NETIF_F_SG;
5945
7b872a55 5946 if (pci_using_dac) {
bc7f75fa 5947 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 5948 netdev->vlan_features |= NETIF_F_HIGHDMA;
5949 }
bc7f75fa 5950
bc7f75fa
AK		 5951 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5952 adapter->flags |= FLAG_MNG_PT_ENABLED;
5953
ad68076e
BA		 5954 /*
5955 * before reading the NVM, reset the controller to
5956 * put the device in a known good starting state
5957 */
bc7f75fa
AK		 5958 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5959
5960 /*
5961 * systems with ASPM and others may see the checksum fail on the first
5962 * attempt. Let's give it a few tries
5963 */
5964 for (i = 0;; i++) {
5965 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5966 break;
5967 if (i == 2) {
44defeb3 5968 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5969 err = -EIO;
5970 goto err_eeprom;
5971 }
5972 }
5973
10aa4c04
AK		 5974 e1000_eeprom_checks(adapter);
5975
608f8a0d 5976 /* copy the MAC address */
bc7f75fa 5977 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5978 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5979
5980 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5981 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5982
5983 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5984 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5985 err = -EIO;
5986 goto err_eeprom;
5987 }
5988
5989 init_timer(&adapter->watchdog_timer);
c061b18d 5990 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 5991 adapter->watchdog_timer.data = (unsigned long) adapter;
5992
5993 init_timer(&adapter->phy_info_timer);
c061b18d 5994 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 5995 adapter->phy_info_timer.data = (unsigned long) adapter;
5996
5997 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5998 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5999 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6000 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 6001 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 6002
bc7f75fa
AK		 6003 /* Initialize link parameters. User can change them with ethtool */
6004 adapter->hw.mac.autoneg = 1;
309af40b 6005 adapter->fc_autoneg = 1;
5c48ef3e
BA		 6006 adapter->hw.fc.requested_mode = e1000_fc_default;
6007 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 6008 adapter->hw.phy.autoneg_advertised = 0x2f;
6009
6010 /* ring size defaults */
6011 adapter->rx_ring->count = 256;
6012 adapter->tx_ring->count = 256;
6013
6014 /*
6015 * Initial Wake on LAN setting - If APM wake is enabled in
6016 * the EEPROM, enable the ACPI Magic Packet filter
6017 */
6018 if (adapter->flags & FLAG_APME_IN_WUC) {
6019 /* APME bit in EEPROM is mapped to WUC.APME */
6020 eeprom_data = er32(WUC);
6021 eeprom_apme_mask = E1000_WUC_APME;
4def99bb
BA		 6022 if ((hw->mac.type > e1000_ich10lan) &&
6023 (eeprom_data & E1000_WUC_PHY_WAKE))
a4f58f54 6024 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 6025 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6026 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6027 (adapter->hw.bus.func == 1))
6028 e1000_read_nvm(&adapter->hw,
6029 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
6030 else
6031 e1000_read_nvm(&adapter->hw,
6032 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
6033 }
6034
6035 /* fetch WoL from EEPROM */
6036 if (eeprom_data & eeprom_apme_mask)
6037 adapter->eeprom_wol |= E1000_WUFC_MAG;
6038
6039 /*
6040 * now that we have the eeprom settings, apply the special cases
6041 * where the eeprom may be wrong or the board simply won't support
6042 * wake on lan on a particular port
6043 */
6044 if (!(adapter->flags & FLAG_HAS_WOL))
6045 adapter->eeprom_wol = 0;
6046
6047 /* initialize the wol settings based on the eeprom settings */
6048 adapter->wol = adapter->eeprom_wol;
6ff68026 6049 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 6050
84527590
BA		 6051 /* save off EEPROM version number */
6052 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6053
bc7f75fa
AK		 6054 /* reset the hardware with the new settings */
6055 e1000e_reset(adapter);
6056
ad68076e
BA		 6057 /*
6058 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 6059 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 6060 * under the control of the driver.
6061 */
c43bc57e 6062 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 6063 e1000e_get_hw_control(adapter);
bc7f75fa 6064
e0dc4f12 6065 strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1);
bc7f75fa
AK		 6066 err = register_netdev(netdev);
6067 if (err)
6068 goto err_register;
6069
9c563d20
JB		 6070 /* carrier off reporting is important to ethtool even BEFORE open */
6071 netif_carrier_off(netdev);
6072
bc7f75fa
AK		 6073 e1000_print_device_info(adapter);
6074
f3ec4f87
AS		 6075 if (pci_dev_run_wake(pdev))
6076 pm_runtime_put_noidle(&pdev->dev);
23606cf5 6077
bc7f75fa
AK		 6078 return 0;
6079
6080err_register:
c43bc57e 6081 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 6082 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 6083err_eeprom:
6084 if (!e1000_check_reset_block(&adapter->hw))
6085 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 6086err_hw_init:
bc7f75fa
AK		 6087 kfree(adapter->tx_ring);
6088 kfree(adapter->rx_ring);
6089err_sw_init:
c43bc57e
JB		 6090 if (adapter->hw.flash_address)
6091 iounmap(adapter->hw.flash_address);
e82f54ba 6092 e1000e_reset_interrupt_capability(adapter);
c43bc57e 6093err_flashmap:
bc7f75fa
AK		 6094 iounmap(adapter->hw.hw_addr);
6095err_ioremap:
6096 free_netdev(netdev);
6097err_alloc_etherdev:
f0f422e5
BA		 6098 pci_release_selected_regions(pdev,
6099 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6100err_pci_reg:
6101err_dma:
6102 pci_disable_device(pdev);
6103 return err;
6104}
6105
6106/**
6107 * e1000_remove - Device Removal Routine
6108 * @pdev: PCI device information struct
6109 *
6110 * e1000_remove is called by the PCI subsystem to alert the driver
6111 * that it should release a PCI device. The could be caused by a
6112 * Hot-Plug event, or because the driver is going to be removed from
6113 * memory.
6114 **/
6115static void __devexit e1000_remove(struct pci_dev *pdev)
6116{
6117 struct net_device *netdev = pci_get_drvdata(pdev);
6118 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 6119 bool down = test_bit(__E1000_DOWN, &adapter->state);
6120
ad68076e 6121 /*
23f333a2
TH		 6122 * The timers may be rescheduled, so explicitly disable them
6123 * from being rescheduled.
ad68076e 6124 */
23606cf5
RW		 6125 if (!down)
6126 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 6127 del_timer_sync(&adapter->watchdog_timer);
6128 del_timer_sync(&adapter->phy_info_timer);
6129
41cec6f1
BA		 6130 cancel_work_sync(&adapter->reset_task);
6131 cancel_work_sync(&adapter->watchdog_task);
6132 cancel_work_sync(&adapter->downshift_task);
6133 cancel_work_sync(&adapter->update_phy_task);
6134 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa 6135
17f208de
BA		 6136 if (!(netdev->flags & IFF_UP))
6137 e1000_power_down_phy(adapter);
6138
23606cf5
RW		 6139 /* Don't lie to e1000_close() down the road. */
6140 if (!down)
6141 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 6142 unregister_netdev(netdev);
6143
f3ec4f87
AS		 6144 if (pci_dev_run_wake(pdev))
6145 pm_runtime_get_noresume(&pdev->dev);
23606cf5 6146
ad68076e
BA		 6147 /*
6148 * Release control of h/w to f/w. If f/w is AMT enabled, this
6149 * would have already happened in close and is redundant.
6150 */
31dbe5b4 6151 e1000e_release_hw_control(adapter);
bc7f75fa 6152
4662e82b 6153 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 6154 kfree(adapter->tx_ring);
6155 kfree(adapter->rx_ring);
6156
6157 iounmap(adapter->hw.hw_addr);
6158 if (adapter->hw.flash_address)
6159 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 6160 pci_release_selected_regions(pdev,
6161 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6162
6163 free_netdev(netdev);
6164
111b9dc5 6165 /* AER disable */
19d5afd4 6166 pci_disable_pcie_error_reporting(pdev);
111b9dc5 6167
bc7f75fa
AK		 6168 pci_disable_device(pdev);
6169}
6170
6171/* PCI Error Recovery (ERS) */
6172static struct pci_error_handlers e1000_err_handler = {
6173 .error_detected = e1000_io_error_detected,
6174 .slot_reset = e1000_io_slot_reset,
6175 .resume = e1000_io_resume,
6176};
6177
a3aa1884 6178static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 6179 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6180 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6181 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6182 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6183 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6184 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 6185 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6186 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6187 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 6188
bc7f75fa
AK		 6189 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6190 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6191 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6192 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 6193
bc7f75fa
AK		 6194 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6195 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6196 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 6197
4662e82b 6198 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 6199 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 6200 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 6201
bc7f75fa
AK		 6202 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6203 board_80003es2lan },
6204 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6205 board_80003es2lan },
6206 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6207 board_80003es2lan },
6208 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6209 board_80003es2lan },
ad68076e 6210
bc7f75fa
AK		 6211 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6212 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6213 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6214 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6215 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6216 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6217 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 6218 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 6219
bc7f75fa
AK		 6220 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6221 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6222 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6223 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6224 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 6225 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 6226 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6227 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6228 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6229
6230 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6231 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6232 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 6233
f4187b56
BA		 6234 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6235 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 6236 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 6237
a4f58f54
BA		 6238 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6239 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6240 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6241 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6242
d3738bb8
BA		 6243 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6244 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6245
bc7f75fa
AK		 6246 { } /* terminate list */
6247};
6248MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6249
aa338601 6250#ifdef CONFIG_PM
23606cf5 6251static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6252 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6253 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6254 e1000_runtime_resume, e1000_idle)
23606cf5 6255};
e50208a0 6256#endif
23606cf5 6257
bc7f75fa
AK		 6258/* PCI Device API Driver */
6259static struct pci_driver e1000_driver = {
6260 .name = e1000e_driver_name,
6261 .id_table = e1000_pci_tbl,
6262 .probe = e1000_probe,
6263 .remove = __devexit_p(e1000_remove),
aa338601 6264#ifdef CONFIG_PM
23606cf5 6265 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6266#endif
6267 .shutdown = e1000_shutdown,
6268 .err_handler = &e1000_err_handler
6269};
6270
6271/**
6272 * e1000_init_module - Driver Registration Routine
6273 *
6274 * e1000_init_module is the first routine called when the driver is
6275 * loaded. All it does is register with the PCI subsystem.
6276 **/
6277static int __init e1000_init_module(void)
6278{
6279 int ret;
8544b9f7
BA		 6280 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6281 e1000e_driver_version);
0d6057e4 6282 pr_info("Copyright(c) 1999 - 2011 Intel Corporation.\n");
bc7f75fa 6283 ret = pci_register_driver(&e1000_driver);
53ec5498 6284
bc7f75fa
AK		 6285 return ret;
6286}
6287module_init(e1000_init_module);
6288
6289/**
6290 * e1000_exit_module - Driver Exit Cleanup Routine
6291 *
6292 * e1000_exit_module is called just before the driver is removed
6293 * from memory.
6294 **/
6295static void __exit e1000_exit_module(void)
6296{
6297 pci_unregister_driver(&e1000_driver);
6298}
6299module_exit(e1000_exit_module);
6300
6301
6302MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6303MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6304MODULE_LICENSE("GPL");
6305MODULE_VERSION(DRV_VERSION);
6306
6307/* e1000_main.c */
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