]>
Commit | Line | Data |
---|---|---|
01f2e4ea | 1 | /* |
29046f9b | 2 | * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. |
01f2e4ea SF |
3 | * Copyright 2007 Nuova Systems, Inc. All rights reserved. |
4 | * | |
5 | * This program is free software; you may redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; version 2 of the License. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
10 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
11 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
12 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
13 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
15 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
16 | * SOFTWARE. | |
17 | * | |
18 | */ | |
19 | ||
20 | #ifndef _ENIC_H_ | |
21 | #define _ENIC_H_ | |
22 | ||
01f2e4ea SF |
23 | #include "vnic_enet.h" |
24 | #include "vnic_dev.h" | |
25 | #include "vnic_wq.h" | |
26 | #include "vnic_rq.h" | |
27 | #include "vnic_cq.h" | |
28 | #include "vnic_intr.h" | |
29 | #include "vnic_stats.h" | |
6ba9cdc0 | 30 | #include "vnic_nic.h" |
717258ba | 31 | #include "vnic_rss.h" |
01f2e4ea SF |
32 | |
33 | #define DRV_NAME "enic" | |
641cb85e | 34 | #define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver" |
1f4f067f | 35 | #define DRV_VERSION "1.4.1.7" |
29046f9b | 36 | #define DRV_COPYRIGHT "Copyright 2008-2010 Cisco Systems, Inc" |
01f2e4ea | 37 | |
27e6c7d3 SF |
38 | #define ENIC_BARS_MAX 6 |
39 | ||
6ba9cdc0 SF |
40 | #define ENIC_WQ_MAX 8 |
41 | #define ENIC_RQ_MAX 8 | |
42 | #define ENIC_CQ_MAX (ENIC_WQ_MAX + ENIC_RQ_MAX) | |
43 | #define ENIC_INTR_MAX (ENIC_CQ_MAX + 2) | |
44 | ||
01f2e4ea SF |
45 | struct enic_msix_entry { |
46 | int requested; | |
47 | char devname[IFNAMSIZ]; | |
48 | irqreturn_t (*isr)(int, void *); | |
49 | void *devid; | |
50 | }; | |
51 | ||
08f382eb SF |
52 | #define ENIC_SET_APPLIED (1 << 0) |
53 | #define ENIC_SET_REQUEST (1 << 1) | |
54 | #define ENIC_SET_NAME (1 << 2) | |
55 | #define ENIC_SET_INSTANCE (1 << 3) | |
56 | #define ENIC_SET_HOST (1 << 4) | |
57 | ||
f8bd9091 | 58 | struct enic_port_profile { |
08f382eb | 59 | u32 set; |
f8bd9091 SF |
60 | u8 request; |
61 | char name[PORT_PROFILE_MAX]; | |
62 | u8 instance_uuid[PORT_UUID_MAX]; | |
63 | u8 host_uuid[PORT_UUID_MAX]; | |
64 | }; | |
65 | ||
01f2e4ea SF |
66 | /* Per-instance private data structure */ |
67 | struct enic { | |
68 | struct net_device *netdev; | |
69 | struct pci_dev *pdev; | |
70 | struct vnic_enet_config config; | |
27e6c7d3 | 71 | struct vnic_dev_bar bar[ENIC_BARS_MAX]; |
01f2e4ea | 72 | struct vnic_dev *vdev; |
01f2e4ea SF |
73 | struct timer_list notify_timer; |
74 | struct work_struct reset; | |
717258ba VK |
75 | struct msix_entry msix_entry[ENIC_INTR_MAX]; |
76 | struct enic_msix_entry msix[ENIC_INTR_MAX]; | |
01f2e4ea SF |
77 | u32 msg_enable; |
78 | spinlock_t devcmd_lock; | |
79 | u8 mac_addr[ETH_ALEN]; | |
80 | u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN]; | |
9959a185 | 81 | unsigned int flags; |
01f2e4ea SF |
82 | unsigned int mc_count; |
83 | int csum_rx_enabled; | |
84 | u32 port_mtu; | |
7c844599 SF |
85 | u32 rx_coalesce_usecs; |
86 | u32 tx_coalesce_usecs; | |
f8bd9091 | 87 | struct enic_port_profile pp; |
01f2e4ea SF |
88 | |
89 | /* work queue cache line section */ | |
6ba9cdc0 SF |
90 | ____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX]; |
91 | spinlock_t wq_lock[ENIC_WQ_MAX]; | |
01f2e4ea SF |
92 | unsigned int wq_count; |
93 | struct vlan_group *vlan_group; | |
1825aca6 VK |
94 | u16 loop_enable; |
95 | u16 loop_tag; | |
01f2e4ea SF |
96 | |
97 | /* receive queue cache line section */ | |
6ba9cdc0 | 98 | ____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX]; |
01f2e4ea SF |
99 | unsigned int rq_count; |
100 | int (*rq_alloc_buf)(struct vnic_rq *rq); | |
350991e1 | 101 | u64 rq_truncated_pkts; |
bd9fb1a4 | 102 | u64 rq_bad_fcs; |
717258ba | 103 | struct napi_struct napi[ENIC_RQ_MAX]; |
01f2e4ea SF |
104 | |
105 | /* interrupt resource cache line section */ | |
6ba9cdc0 | 106 | ____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX]; |
01f2e4ea SF |
107 | unsigned int intr_count; |
108 | u32 __iomem *legacy_pba; /* memory-mapped */ | |
109 | ||
110 | /* completion queue cache line section */ | |
111 | ____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX]; | |
112 | unsigned int cq_count; | |
113 | }; | |
114 | ||
a7a79deb VK |
115 | static inline struct device *enic_get_dev(struct enic *enic) |
116 | { | |
117 | return &(enic->pdev->dev); | |
118 | } | |
119 | ||
01f2e4ea | 120 | #endif /* _ENIC_H_ */ |