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enic: Cleanups in port profile helper code
[mirror_ubuntu-focal-kernel.git] / drivers / net / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
26#include <linux/workqueue.h>
27#include <linux/pci.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/if_ether.h>
31#include <linux/if_vlan.h>
32#include <linux/ethtool.h>
33#include <linux/in.h>
34#include <linux/ip.h>
35#include <linux/ipv6.h>
36#include <linux/tcp.h>
29046f9b 37#include <linux/rtnetlink.h>
b7c6bfb7 38#include <net/ip6_checksum.h>
01f2e4ea
SF		 39
40#include "cq_enet_desc.h"
41#include "vnic_dev.h"
42#include "vnic_intr.h"
43#include "vnic_stats.h"
f8bd9091 44#include "vnic_vic.h"
01f2e4ea
SF		 45#include "enic_res.h"
46#include "enic.h"
51987461 47#include "enic_dev.h"
01f2e4ea
SF		 48
49#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 50#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
51#define MAX_TSO (1 << 16)
52#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
53
54#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 55#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
01f2e4ea
SF		 56
57/* Supported devices */
a3aa1884 58static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 59 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 60 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
01f2e4ea
SF		 61 { 0, } /* end of table */
62};
63
64MODULE_DESCRIPTION(DRV_DESCRIPTION);
65MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
66MODULE_LICENSE("GPL");
67MODULE_VERSION(DRV_VERSION);
68MODULE_DEVICE_TABLE(pci, enic_id_table);
69
70struct enic_stat {
71 char name[ETH_GSTRING_LEN];
72 unsigned int offset;
73};
74
75#define ENIC_TX_STAT(stat) \
76 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
77#define ENIC_RX_STAT(stat) \
78 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
79
80static const struct enic_stat enic_tx_stats[] = {
81 ENIC_TX_STAT(tx_frames_ok),
82 ENIC_TX_STAT(tx_unicast_frames_ok),
83 ENIC_TX_STAT(tx_multicast_frames_ok),
84 ENIC_TX_STAT(tx_broadcast_frames_ok),
85 ENIC_TX_STAT(tx_bytes_ok),
86 ENIC_TX_STAT(tx_unicast_bytes_ok),
87 ENIC_TX_STAT(tx_multicast_bytes_ok),
88 ENIC_TX_STAT(tx_broadcast_bytes_ok),
89 ENIC_TX_STAT(tx_drops),
90 ENIC_TX_STAT(tx_errors),
91 ENIC_TX_STAT(tx_tso),
92};
93
94static const struct enic_stat enic_rx_stats[] = {
95 ENIC_RX_STAT(rx_frames_ok),
96 ENIC_RX_STAT(rx_frames_total),
97 ENIC_RX_STAT(rx_unicast_frames_ok),
98 ENIC_RX_STAT(rx_multicast_frames_ok),
99 ENIC_RX_STAT(rx_broadcast_frames_ok),
100 ENIC_RX_STAT(rx_bytes_ok),
101 ENIC_RX_STAT(rx_unicast_bytes_ok),
102 ENIC_RX_STAT(rx_multicast_bytes_ok),
103 ENIC_RX_STAT(rx_broadcast_bytes_ok),
104 ENIC_RX_STAT(rx_drop),
105 ENIC_RX_STAT(rx_no_bufs),
106 ENIC_RX_STAT(rx_errors),
107 ENIC_RX_STAT(rx_rss),
108 ENIC_RX_STAT(rx_crc_errors),
109 ENIC_RX_STAT(rx_frames_64),
110 ENIC_RX_STAT(rx_frames_127),
111 ENIC_RX_STAT(rx_frames_255),
112 ENIC_RX_STAT(rx_frames_511),
113 ENIC_RX_STAT(rx_frames_1023),
114 ENIC_RX_STAT(rx_frames_1518),
115 ENIC_RX_STAT(rx_frames_to_max),
116};
117
118static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
119static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
120
f8bd9091
SF		 121static int enic_is_dynamic(struct enic *enic)
122{
123 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
124}
125
717258ba
VK		 126static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
127{
128 return rq;
129}
130
131static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
132{
133 return enic->rq_count + wq;
134}
135
136static inline unsigned int enic_legacy_io_intr(void)
137{
138 return 0;
139}
140
141static inline unsigned int enic_legacy_err_intr(void)
142{
143 return 1;
144}
145
146static inline unsigned int enic_legacy_notify_intr(void)
147{
148 return 2;
149}
150
151static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
152{
153 return rq;
154}
155
156static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
157{
158 return enic->rq_count + wq;
159}
160
161static inline unsigned int enic_msix_err_intr(struct enic *enic)
162{
163 return enic->rq_count + enic->wq_count;
164}
165
166static inline unsigned int enic_msix_notify_intr(struct enic *enic)
167{
168 return enic->rq_count + enic->wq_count + 1;
169}
170
01f2e4ea
SF		 171static int enic_get_settings(struct net_device *netdev,
172 struct ethtool_cmd *ecmd)
173{
174 struct enic *enic = netdev_priv(netdev);
175
176 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
177 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
178 ecmd->port = PORT_FIBRE;
179 ecmd->transceiver = XCVR_EXTERNAL;
180
181 if (netif_carrier_ok(netdev)) {
182 ecmd->speed = vnic_dev_port_speed(enic->vdev);
183 ecmd->duplex = DUPLEX_FULL;
184 } else {
185 ecmd->speed = -1;
186 ecmd->duplex = -1;
187 }
188
189 ecmd->autoneg = AUTONEG_DISABLE;
190
191 return 0;
192}
193
194static void enic_get_drvinfo(struct net_device *netdev,
195 struct ethtool_drvinfo *drvinfo)
196{
197 struct enic *enic = netdev_priv(netdev);
198 struct vnic_devcmd_fw_info *fw_info;
199
383ab92f 200 enic_dev_fw_info(enic, &fw_info);
01f2e4ea
SF		 201
202 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
203 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
204 strncpy(drvinfo->fw_version, fw_info->fw_version,
205 sizeof(drvinfo->fw_version));
206 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
207 sizeof(drvinfo->bus_info));
208}
209
210static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
211{
212 unsigned int i;
213
214 switch (stringset) {
215 case ETH_SS_STATS:
216 for (i = 0; i < enic_n_tx_stats; i++) {
217 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
218 data += ETH_GSTRING_LEN;
219 }
220 for (i = 0; i < enic_n_rx_stats; i++) {
221 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
222 data += ETH_GSTRING_LEN;
223 }
224 break;
225 }
226}
227
25f0a061 228static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 229{
25f0a061
SF		 230 switch (sset) {
231 case ETH_SS_STATS:
232 return enic_n_tx_stats + enic_n_rx_stats;
233 default:
234 return -EOPNOTSUPP;
235 }
01f2e4ea
SF		 236}
237
238static void enic_get_ethtool_stats(struct net_device *netdev,
239 struct ethtool_stats *stats, u64 *data)
240{
241 struct enic *enic = netdev_priv(netdev);
242 struct vnic_stats *vstats;
243 unsigned int i;
244
383ab92f 245 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 246
247 for (i = 0; i < enic_n_tx_stats; i++)
248 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
249 for (i = 0; i < enic_n_rx_stats; i++)
250 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
251}
252
253static u32 enic_get_rx_csum(struct net_device *netdev)
254{
255 struct enic *enic = netdev_priv(netdev);
256 return enic->csum_rx_enabled;
257}
258
259static int enic_set_rx_csum(struct net_device *netdev, u32 data)
260{
261 struct enic *enic = netdev_priv(netdev);
262
25f0a061
SF		 263 if (data && !ENIC_SETTING(enic, RXCSUM))
264 return -EINVAL;
265
266 enic->csum_rx_enabled = !!data;
01f2e4ea
SF		 267
268 return 0;
269}
270
271static int enic_set_tx_csum(struct net_device *netdev, u32 data)
272{
273 struct enic *enic = netdev_priv(netdev);
274
25f0a061
SF		 275 if (data && !ENIC_SETTING(enic, TXCSUM))
276 return -EINVAL;
277
278 if (data)
01f2e4ea
SF		 279 netdev->features |= NETIF_F_HW_CSUM;
280 else
281 netdev->features &= ~NETIF_F_HW_CSUM;
282
283 return 0;
284}
285
286static int enic_set_tso(struct net_device *netdev, u32 data)
287{
288 struct enic *enic = netdev_priv(netdev);
289
25f0a061
SF		 290 if (data && !ENIC_SETTING(enic, TSO))
291 return -EINVAL;
292
293 if (data)
01f2e4ea
SF		 294 netdev->features |=
295 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN;
296 else
297 netdev->features &=
298 ~(NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN);
299
300 return 0;
301}
302
303static u32 enic_get_msglevel(struct net_device *netdev)
304{
305 struct enic *enic = netdev_priv(netdev);
306 return enic->msg_enable;
307}
308
309static void enic_set_msglevel(struct net_device *netdev, u32 value)
310{
311 struct enic *enic = netdev_priv(netdev);
312 enic->msg_enable = value;
313}
314
7c844599
SF		 315static int enic_get_coalesce(struct net_device *netdev,
316 struct ethtool_coalesce *ecmd)
317{
318 struct enic *enic = netdev_priv(netdev);
319
320 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
321 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
322
323 return 0;
324}
325
326static int enic_set_coalesce(struct net_device *netdev,
327 struct ethtool_coalesce *ecmd)
328{
329 struct enic *enic = netdev_priv(netdev);
330 u32 tx_coalesce_usecs;
331 u32 rx_coalesce_usecs;
717258ba 332 unsigned int i, intr;
7c844599
SF		 333
334 tx_coalesce_usecs = min_t(u32,
335 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
336 ecmd->tx_coalesce_usecs);
337 rx_coalesce_usecs = min_t(u32,
338 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
339 ecmd->rx_coalesce_usecs);
340
341 switch (vnic_dev_get_intr_mode(enic->vdev)) {
342 case VNIC_DEV_INTR_MODE_INTX:
343 if (tx_coalesce_usecs != rx_coalesce_usecs)
344 return -EINVAL;
345
717258ba
VK		 346 intr = enic_legacy_io_intr();
347 vnic_intr_coalescing_timer_set(&enic->intr[intr],
7c844599
SF		 348 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
349 break;
350 case VNIC_DEV_INTR_MODE_MSI:
351 if (tx_coalesce_usecs != rx_coalesce_usecs)
352 return -EINVAL;
353
354 vnic_intr_coalescing_timer_set(&enic->intr[0],
355 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
356 break;
357 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 358 for (i = 0; i < enic->wq_count; i++) {
359 intr = enic_msix_wq_intr(enic, i);
360 vnic_intr_coalescing_timer_set(&enic->intr[intr],
361 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
362 }
363
364 for (i = 0; i < enic->rq_count; i++) {
365 intr = enic_msix_rq_intr(enic, i);
366 vnic_intr_coalescing_timer_set(&enic->intr[intr],
367 INTR_COALESCE_USEC_TO_HW(rx_coalesce_usecs));
368 }
369
7c844599
SF		 370 break;
371 default:
372 break;
373 }
374
375 enic->tx_coalesce_usecs = tx_coalesce_usecs;
376 enic->rx_coalesce_usecs = rx_coalesce_usecs;
377
378 return 0;
379}
380
0fc0b732 381static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 382 .get_settings = enic_get_settings,
383 .get_drvinfo = enic_get_drvinfo,
384 .get_msglevel = enic_get_msglevel,
385 .set_msglevel = enic_set_msglevel,
386 .get_link = ethtool_op_get_link,
387 .get_strings = enic_get_strings,
25f0a061 388 .get_sset_count = enic_get_sset_count,
01f2e4ea
SF		 389 .get_ethtool_stats = enic_get_ethtool_stats,
390 .get_rx_csum = enic_get_rx_csum,
391 .set_rx_csum = enic_set_rx_csum,
392 .get_tx_csum = ethtool_op_get_tx_csum,
393 .set_tx_csum = enic_set_tx_csum,
394 .get_sg = ethtool_op_get_sg,
395 .set_sg = ethtool_op_set_sg,
396 .get_tso = ethtool_op_get_tso,
397 .set_tso = enic_set_tso,
7c844599
SF		 398 .get_coalesce = enic_get_coalesce,
399 .set_coalesce = enic_set_coalesce,
86ca9db7 400 .get_flags = ethtool_op_get_flags,
01f2e4ea
SF		 401};
402
403static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
404{
405 struct enic *enic = vnic_dev_priv(wq->vdev);
406
407 if (buf->sop)
408 pci_unmap_single(enic->pdev, buf->dma_addr,
409 buf->len, PCI_DMA_TODEVICE);
410 else
411 pci_unmap_page(enic->pdev, buf->dma_addr,
412 buf->len, PCI_DMA_TODEVICE);
413
414 if (buf->os_buf)
415 dev_kfree_skb_any(buf->os_buf);
416}
417
418static void enic_wq_free_buf(struct vnic_wq *wq,
419 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
420{
421 enic_free_wq_buf(wq, buf);
422}
423
424static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
425 u8 type, u16 q_number, u16 completed_index, void *opaque)
426{
427 struct enic *enic = vnic_dev_priv(vdev);
428
429 spin_lock(&enic->wq_lock[q_number]);
430
431 vnic_wq_service(&enic->wq[q_number], cq_desc,
432 completed_index, enic_wq_free_buf,
433 opaque);
434
435 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 436 vnic_wq_desc_avail(&enic->wq[q_number]) >=
437 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 438 netif_wake_queue(enic->netdev);
439
440 spin_unlock(&enic->wq_lock[q_number]);
441
442 return 0;
443}
444
445static void enic_log_q_error(struct enic *enic)
446{
447 unsigned int i;
448 u32 error_status;
449
450 for (i = 0; i < enic->wq_count; i++) {
451 error_status = vnic_wq_error_status(&enic->wq[i]);
452 if (error_status)
a7a79deb
VK		 453 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
454 i, error_status);
01f2e4ea
SF		 455 }
456
457 for (i = 0; i < enic->rq_count; i++) {
458 error_status = vnic_rq_error_status(&enic->rq[i]);
459 if (error_status)
a7a79deb
VK		 460 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
461 i, error_status);
01f2e4ea
SF		 462 }
463}
464
383ab92f 465static void enic_msglvl_check(struct enic *enic)
01f2e4ea 466{
383ab92f 467 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 468
383ab92f 469 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 470 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
471 enic->msg_enable, msg_enable);
383ab92f 472 enic->msg_enable = msg_enable;
01f2e4ea
SF		 473 }
474}
475
476static void enic_mtu_check(struct enic *enic)
477{
478 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 479 struct net_device *netdev = enic->netdev;
01f2e4ea 480
491598a4 481 if (mtu && mtu != enic->port_mtu) {
7c844599 482 enic->port_mtu = mtu;
a7a79deb
VK		 483 if (mtu < netdev->mtu)
484 netdev_warn(netdev,
485 "interface MTU (%d) set higher "
01f2e4ea 486 "than switch port MTU (%d)\n",
a7a79deb 487 netdev->mtu, mtu);
01f2e4ea
SF		 488 }
489}
490
383ab92f 491static void enic_link_check(struct enic *enic)
01f2e4ea 492{
383ab92f
VK		 493 int link_status = vnic_dev_link_status(enic->vdev);
494 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 495
383ab92f 496 if (link_status && !carrier_ok) {
a7a79deb 497 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 498 netif_carrier_on(enic->netdev);
499 } else if (!link_status && carrier_ok) {
a7a79deb 500 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 501 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 502 }
503}
504
505static void enic_notify_check(struct enic *enic)
506{
507 enic_msglvl_check(enic);
508 enic_mtu_check(enic);
509 enic_link_check(enic);
510}
511
512#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
513
514static irqreturn_t enic_isr_legacy(int irq, void *data)
515{
516 struct net_device *netdev = data;
517 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 518 unsigned int io_intr = enic_legacy_io_intr();
519 unsigned int err_intr = enic_legacy_err_intr();
520 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 521 u32 pba;
522
717258ba 523 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 524
525 pba = vnic_intr_legacy_pba(enic->legacy_pba);
526 if (!pba) {
717258ba 527 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 528 return IRQ_NONE; /* not our interrupt */
529 }
530
717258ba
VK		 531 if (ENIC_TEST_INTR(pba, notify_intr)) {
532 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 533 enic_notify_check(enic);
ed8af6b2 534 }
01f2e4ea 535
717258ba
VK		 536 if (ENIC_TEST_INTR(pba, err_intr)) {
537 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 538 enic_log_q_error(enic);
539 /* schedule recovery from WQ/RQ error */
540 schedule_work(&enic->reset);
541 return IRQ_HANDLED;
542 }
543
717258ba
VK		 544 if (ENIC_TEST_INTR(pba, io_intr)) {
545 if (napi_schedule_prep(&enic->napi[0]))
546 __napi_schedule(&enic->napi[0]);
01f2e4ea 547 } else {
717258ba 548 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 549 }
550
551 return IRQ_HANDLED;
552}
553
554static irqreturn_t enic_isr_msi(int irq, void *data)
555{
556 struct enic *enic = data;
557
558 /* With MSI, there is no sharing of interrupts, so this is
559 * our interrupt and there is no need to ack it. The device
560 * is not providing per-vector masking, so the OS will not
561 * write to PCI config space to mask/unmask the interrupt.
562 * We're using mask_on_assertion for MSI, so the device
563 * automatically masks the interrupt when the interrupt is
564 * generated. Later, when exiting polling, the interrupt
565 * will be unmasked (see enic_poll).
566 *
567 * Also, the device uses the same PCIe Traffic Class (TC)
568 * for Memory Write data and MSI, so there are no ordering
569 * issues; the MSI will always arrive at the Root Complex
570 * _after_ corresponding Memory Writes (i.e. descriptor
571 * writes).
572 */
573
717258ba 574 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 575
576 return IRQ_HANDLED;
577}
578
579static irqreturn_t enic_isr_msix_rq(int irq, void *data)
580{
717258ba 581 struct napi_struct *napi = data;
01f2e4ea
SF		 582
583 /* schedule NAPI polling for RQ cleanup */
717258ba 584 napi_schedule(napi);
01f2e4ea
SF		 585
586 return IRQ_HANDLED;
587}
588
589static irqreturn_t enic_isr_msix_wq(int irq, void *data)
590{
591 struct enic *enic = data;
717258ba
VK		 592 unsigned int cq = enic_cq_wq(enic, 0);
593 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 594 unsigned int wq_work_to_do = -1; /* no limit */
595 unsigned int wq_work_done;
596
717258ba 597 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 598 wq_work_to_do, enic_wq_service, NULL);
599
717258ba 600 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 601 wq_work_done,
602 1 /* unmask intr */,
603 1 /* reset intr timer */);
604
605 return IRQ_HANDLED;
606}
607
608static irqreturn_t enic_isr_msix_err(int irq, void *data)
609{
610 struct enic *enic = data;
717258ba 611 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 612
717258ba 613 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 614
01f2e4ea
SF		 615 enic_log_q_error(enic);
616
617 /* schedule recovery from WQ/RQ error */
618 schedule_work(&enic->reset);
619
620 return IRQ_HANDLED;
621}
622
623static irqreturn_t enic_isr_msix_notify(int irq, void *data)
624{
625 struct enic *enic = data;
717258ba 626 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 627
717258ba 628 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 629 enic_notify_check(enic);
01f2e4ea
SF		 630
631 return IRQ_HANDLED;
632}
633
634static inline void enic_queue_wq_skb_cont(struct enic *enic,
635 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 636 unsigned int len_left, int loopback)
01f2e4ea
SF		 637{
638 skb_frag_t *frag;
639
640 /* Queue additional data fragments */
641 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
642 len_left -= frag->size;
643 enic_queue_wq_desc_cont(wq, skb,
644 pci_map_page(enic->pdev, frag->page,
645 frag->page_offset, frag->size,
646 PCI_DMA_TODEVICE),
647 frag->size,
1825aca6
VK		 648 (len_left == 0), /* EOP? */
649 loopback);
01f2e4ea
SF		 650 }
651}
652
653static inline void enic_queue_wq_skb_vlan(struct enic *enic,
654 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 655 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 656{
657 unsigned int head_len = skb_headlen(skb);
658 unsigned int len_left = skb->len - head_len;
659 int eop = (len_left == 0);
660
ea0d7d91
SF		 661 /* Queue the main skb fragment. The fragments are no larger
662 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
663 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
664 * per fragment is queued.
665 */
01f2e4ea
SF		 666 enic_queue_wq_desc(wq, skb,
667 pci_map_single(enic->pdev, skb->data,
668 head_len, PCI_DMA_TODEVICE),
669 head_len,
670 vlan_tag_insert, vlan_tag,
1825aca6 671 eop, loopback);
01f2e4ea
SF		 672
673 if (!eop)
1825aca6 674 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 675}
676
677static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
678 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 679 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 680{
681 unsigned int head_len = skb_headlen(skb);
682 unsigned int len_left = skb->len - head_len;
0d0b1672 683 unsigned int hdr_len = skb_checksum_start_offset(skb);
01f2e4ea
SF		 684 unsigned int csum_offset = hdr_len + skb->csum_offset;
685 int eop = (len_left == 0);
686
ea0d7d91
SF		 687 /* Queue the main skb fragment. The fragments are no larger
688 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
689 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
690 * per fragment is queued.
691 */
01f2e4ea
SF		 692 enic_queue_wq_desc_csum_l4(wq, skb,
693 pci_map_single(enic->pdev, skb->data,
694 head_len, PCI_DMA_TODEVICE),
695 head_len,
696 csum_offset,
697 hdr_len,
698 vlan_tag_insert, vlan_tag,
1825aca6 699 eop, loopback);
01f2e4ea
SF		 700
701 if (!eop)
1825aca6 702 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 703}
704
705static inline void enic_queue_wq_skb_tso(struct enic *enic,
706 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 707 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 708{
ea0d7d91
SF		 709 unsigned int frag_len_left = skb_headlen(skb);
710 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 711 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
712 int eop = (len_left == 0);
ea0d7d91
SF		 713 unsigned int len;
714 dma_addr_t dma_addr;
715 unsigned int offset = 0;
716 skb_frag_t *frag;
01f2e4ea
SF		 717
718 /* Preload TCP csum field with IP pseudo hdr calculated
719 * with IP length set to zero. HW will later add in length
720 * to each TCP segment resulting from the TSO.
721 */
722
09640e63 723 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 724 ip_hdr(skb)->check = 0;
725 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
726 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 727 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 728 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
729 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
730 }
731
ea0d7d91
SF		 732 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
733 * for the main skb fragment
734 */
735 while (frag_len_left) {
736 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
737 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
738 len, PCI_DMA_TODEVICE);
739 enic_queue_wq_desc_tso(wq, skb,
740 dma_addr,
741 len,
742 mss, hdr_len,
743 vlan_tag_insert, vlan_tag,
1825aca6 744 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 745 frag_len_left -= len;
746 offset += len;
747 }
01f2e4ea 748
ea0d7d91
SF		 749 if (eop)
750 return;
751
752 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
753 * for additional data fragments
754 */
755 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
756 len_left -= frag->size;
757 frag_len_left = frag->size;
758 offset = frag->page_offset;
759
760 while (frag_len_left) {
761 len = min(frag_len_left,
762 (unsigned int)WQ_ENET_MAX_DESC_LEN);
763 dma_addr = pci_map_page(enic->pdev, frag->page,
764 offset, len,
765 PCI_DMA_TODEVICE);
766 enic_queue_wq_desc_cont(wq, skb,
767 dma_addr,
768 len,
769 (len_left == 0) &&
1825aca6
VK		 770 (len == frag_len_left), /* EOP? */
771 loopback);
ea0d7d91
SF		 772 frag_len_left -= len;
773 offset += len;
774 }
775 }
01f2e4ea
SF		 776}
777
778static inline void enic_queue_wq_skb(struct enic *enic,
779 struct vnic_wq *wq, struct sk_buff *skb)
780{
781 unsigned int mss = skb_shinfo(skb)->gso_size;
782 unsigned int vlan_tag = 0;
783 int vlan_tag_insert = 0;
1825aca6 784 int loopback = 0;
01f2e4ea 785
eab6d18d 786 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 787 /* VLAN tag from trunking driver */
788 vlan_tag_insert = 1;
789 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 790 } else if (enic->loop_enable) {
791 vlan_tag = enic->loop_tag;
792 loopback = 1;
01f2e4ea
SF		 793 }
794
795 if (mss)
796 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 797 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 798 else if (skb->ip_summed == CHECKSUM_PARTIAL)
799 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 800 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 801 else
802 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 803 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 804}
805
ed8af6b2 806/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 807static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 808 struct net_device *netdev)
01f2e4ea
SF		 809{
810 struct enic *enic = netdev_priv(netdev);
811 struct vnic_wq *wq = &enic->wq[0];
812 unsigned long flags;
813
814 if (skb->len <= 0) {
815 dev_kfree_skb(skb);
816 return NETDEV_TX_OK;
817 }
818
819 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
820 * which is very likely. In the off chance it's going to take
821 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
822 */
823
824 if (skb_shinfo(skb)->gso_size == 0 &&
825 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
826 skb_linearize(skb)) {
827 dev_kfree_skb(skb);
828 return NETDEV_TX_OK;
829 }
830
831 spin_lock_irqsave(&enic->wq_lock[0], flags);
832
ea0d7d91
SF		 833 if (vnic_wq_desc_avail(wq) <
834 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 835 netif_stop_queue(netdev);
836 /* This is a hard error, log it */
a7a79deb 837 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 838 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
839 return NETDEV_TX_BUSY;
840 }
841
842 enic_queue_wq_skb(enic, wq, skb);
843
ea0d7d91 844 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 845 netif_stop_queue(netdev);
846
01f2e4ea
SF		 847 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
848
849 return NETDEV_TX_OK;
850}
851
852/* dev_base_lock rwlock held, nominally process context */
853static struct net_device_stats *enic_get_stats(struct net_device *netdev)
854{
855 struct enic *enic = netdev_priv(netdev);
25f0a061 856 struct net_device_stats *net_stats = &netdev->stats;
01f2e4ea
SF		 857 struct vnic_stats *stats;
858
383ab92f 859 enic_dev_stats_dump(enic, &stats);
01f2e4ea 860
25f0a061
SF		 861 net_stats->tx_packets = stats->tx.tx_frames_ok;
862 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
863 net_stats->tx_errors = stats->tx.tx_errors;
864 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 865
25f0a061
SF		 866 net_stats->rx_packets = stats->rx.rx_frames_ok;
867 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
868 net_stats->rx_errors = stats->rx.rx_errors;
869 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 870 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 871 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 872 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 873
25f0a061 874 return net_stats;
01f2e4ea
SF		 875}
876
e0afe53f 877static void enic_reset_addr_lists(struct enic *enic)
01f2e4ea
SF		 878{
879 enic->mc_count = 0;
e0afe53f 880 enic->uc_count = 0;
99ef5639 881 enic->flags = 0;
01f2e4ea
SF		 882}
883
884static int enic_set_mac_addr(struct net_device *netdev, char *addr)
885{
f8bd9091
SF		 886 struct enic *enic = netdev_priv(netdev);
887
888 if (enic_is_dynamic(enic)) {
889 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
890 return -EADDRNOTAVAIL;
891 } else {
892 if (!is_valid_ether_addr(addr))
893 return -EADDRNOTAVAIL;
894 }
01f2e4ea
SF		 895
896 memcpy(netdev->dev_addr, addr, netdev->addr_len);
897
898 return 0;
899}
900
f8bd9091
SF		 901static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
902{
903 struct enic *enic = netdev_priv(netdev);
904 struct sockaddr *saddr = p;
905 char *addr = saddr->sa_data;
906 int err;
907
908 if (netif_running(enic->netdev)) {
909 err = enic_dev_del_station_addr(enic);
910 if (err)
911 return err;
912 }
913
914 err = enic_set_mac_addr(netdev, addr);
915 if (err)
916 return err;
917
918 if (netif_running(enic->netdev)) {
919 err = enic_dev_add_station_addr(enic);
920 if (err)
921 return err;
922 }
923
924 return err;
925}
926
927static int enic_set_mac_address(struct net_device *netdev, void *p)
928{
294dab25 929 struct sockaddr *saddr = p;
c76fd32d
VK		 930 char *addr = saddr->sa_data;
931 struct enic *enic = netdev_priv(netdev);
932 int err;
933
934 err = enic_dev_del_station_addr(enic);
935 if (err)
936 return err;
937
938 err = enic_set_mac_addr(netdev, addr);
939 if (err)
940 return err;
294dab25 941
c76fd32d 942 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 943}
944
e0afe53f 945static void enic_update_multicast_addr_list(struct enic *enic)
01f2e4ea 946{
319d7e84 947 struct net_device *netdev = enic->netdev;
22bedad3 948 struct netdev_hw_addr *ha;
4cd24eaf 949 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 950 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 951 unsigned int i, j;
952
319d7e84
RP		 953 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
954 netdev_warn(netdev, "Registering only %d out of %d "
955 "multicast addresses\n",
956 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 957 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 958 }
01f2e4ea
SF		 959
960 /* Is there an easier way? Trying to minimize to
961 * calls to add/del multicast addrs. We keep the
962 * addrs from the last call in enic->mc_addr and
963 * look for changes to add/del.
964 */
965
48e2f183 966 i = 0;
22bedad3 967 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 968 if (i == mc_count)
969 break;
22bedad3 970 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 971 }
972
973 for (i = 0; i < enic->mc_count; i++) {
974 for (j = 0; j < mc_count; j++)
975 if (compare_ether_addr(enic->mc_addr[i],
976 mc_addr[j]) == 0)
977 break;
978 if (j == mc_count)
319d7e84 979 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 980 }
981
982 for (i = 0; i < mc_count; i++) {
983 for (j = 0; j < enic->mc_count; j++)
984 if (compare_ether_addr(mc_addr[i],
985 enic->mc_addr[j]) == 0)
986 break;
987 if (j == enic->mc_count)
319d7e84 988 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 989 }
990
991 /* Save the list to compare against next time
992 */
993
994 for (i = 0; i < mc_count; i++)
995 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
996
997 enic->mc_count = mc_count;
01f2e4ea
SF		 998}
999
e0afe53f 1000static void enic_update_unicast_addr_list(struct enic *enic)
319d7e84
RP		 1001{
1002 struct net_device *netdev = enic->netdev;
1003 struct netdev_hw_addr *ha;
1004 unsigned int uc_count = netdev_uc_count(netdev);
1005 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
1006 unsigned int i, j;
1007
1008 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
1009 netdev_warn(netdev, "Registering only %d out of %d "
1010 "unicast addresses\n",
1011 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
1012 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
1013 }
1014
1015 /* Is there an easier way? Trying to minimize to
1016 * calls to add/del unicast addrs. We keep the
1017 * addrs from the last call in enic->uc_addr and
1018 * look for changes to add/del.
1019 */
1020
1021 i = 0;
1022 netdev_for_each_uc_addr(ha, netdev) {
1023 if (i == uc_count)
1024 break;
1025 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
1026 }
1027
1028 for (i = 0; i < enic->uc_count; i++) {
1029 for (j = 0; j < uc_count; j++)
1030 if (compare_ether_addr(enic->uc_addr[i],
1031 uc_addr[j]) == 0)
1032 break;
1033 if (j == uc_count)
1034 enic_dev_del_addr(enic, enic->uc_addr[i]);
1035 }
1036
1037 for (i = 0; i < uc_count; i++) {
1038 for (j = 0; j < enic->uc_count; j++)
1039 if (compare_ether_addr(uc_addr[i],
1040 enic->uc_addr[j]) == 0)
1041 break;
1042 if (j == enic->uc_count)
1043 enic_dev_add_addr(enic, uc_addr[i]);
1044 }
1045
1046 /* Save the list to compare against next time
1047 */
1048
1049 for (i = 0; i < uc_count; i++)
1050 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
1051
1052 enic->uc_count = uc_count;
1053}
1054
1055/* netif_tx_lock held, BHs disabled */
1056static void enic_set_rx_mode(struct net_device *netdev)
1057{
1058 struct enic *enic = netdev_priv(netdev);
1059 int directed = 1;
1060 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1061 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1062 int promisc = (netdev->flags & IFF_PROMISC) ||
1063 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1064 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1065 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1066 unsigned int flags = netdev->flags |
1067 (allmulti ? IFF_ALLMULTI : 0) |
1068 (promisc ? IFF_PROMISC : 0);
1069
1070 if (enic->flags != flags) {
1071 enic->flags = flags;
1072 enic_dev_packet_filter(enic, directed,
1073 multicast, broadcast, promisc, allmulti);
1074 }
1075
1076 if (!promisc) {
e0afe53f 1077 enic_update_unicast_addr_list(enic);
319d7e84 1078 if (!allmulti)
e0afe53f 1079 enic_update_multicast_addr_list(enic);
319d7e84
RP		 1080 }
1081}
1082
01f2e4ea
SF		 1083/* rtnl lock is held */
1084static void enic_vlan_rx_register(struct net_device *netdev,
1085 struct vlan_group *vlan_group)
1086{
1087 struct enic *enic = netdev_priv(netdev);
1088 enic->vlan_group = vlan_group;
1089}
1090
01f2e4ea
SF		 1091/* netif_tx_lock held, BHs disabled */
1092static void enic_tx_timeout(struct net_device *netdev)
1093{
1094 struct enic *enic = netdev_priv(netdev);
1095 schedule_work(&enic->reset);
1096}
1097
0b1c00fc
RP		 1098static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1099{
1100 struct enic *enic = netdev_priv(netdev);
1101
1102 if (vf != PORT_SELF_VF)
1103 return -EOPNOTSUPP;
1104
1105 /* Ignore the vf argument for now. We can assume the request
1106 * is coming on a vf.
1107 */
1108 if (is_valid_ether_addr(mac)) {
1109 memcpy(enic->pp.vf_mac, mac, ETH_ALEN);
1110 return 0;
1111 } else
1112 return -EINVAL;
1113}
1114
08f382eb 1115static int enic_set_port_profile(struct enic *enic, u8 *mac)
f8bd9091
SF		 1116{
1117 struct vic_provinfo *vp;
1118 u8 oui[3] = VIC_PROVINFO_CISCO_OUI;
6c2c9d96 1119 u16 os_type = VIC_GENERIC_PROV_OS_TYPE_LINUX;
f8bd9091 1120 char uuid_str[38];
6c2c9d96
RP		 1121 char client_mac_str[18];
1122 u8 *client_mac;
f8bd9091
SF		 1123 int err;
1124
08f382eb
SF		 1125 err = enic_vnic_dev_deinit(enic);
1126 if (err)
1127 return err;
f8bd9091 1128
8da83f8e
RP		 1129 enic_reset_addr_lists(enic);
1130
08f382eb 1131 switch (enic->pp.request) {
f8bd9091 1132
08f382eb 1133 case PORT_REQUEST_ASSOCIATE:
f8bd9091 1134
08f382eb
SF		 1135 if (!(enic->pp.set & ENIC_SET_NAME) || !strlen(enic->pp.name))
1136 return -EINVAL;
f8bd9091 1137
08f382eb
SF		 1138 if (!is_valid_ether_addr(mac))
1139 return -EADDRNOTAVAIL;
f8bd9091 1140
08f382eb 1141 vp = vic_provinfo_alloc(GFP_KERNEL, oui,
6c2c9d96 1142 VIC_PROVINFO_GENERIC_TYPE);
08f382eb
SF		 1143 if (!vp)
1144 return -ENOMEM;
f8bd9091 1145
f8bd9091 1146 vic_provinfo_add_tlv(vp,
6c2c9d96 1147 VIC_GENERIC_PROV_TLV_PORT_PROFILE_NAME_STR,
08f382eb 1148 strlen(enic->pp.name) + 1, enic->pp.name);
f8bd9091 1149
29639059 1150 if (!is_zero_ether_addr(enic->pp.mac_addr))
6c2c9d96 1151 client_mac = enic->pp.mac_addr;
29639059 1152 else
6c2c9d96
RP		 1153 client_mac = mac;
1154
1155 vic_provinfo_add_tlv(vp,
1156 VIC_GENERIC_PROV_TLV_CLIENT_MAC_ADDR,
1157 ETH_ALEN, client_mac);
1158
1159 sprintf(client_mac_str, "%pM", client_mac);
1160 vic_provinfo_add_tlv(vp,
1161 VIC_GENERIC_PROV_TLV_CLUSTER_PORT_UUID_STR,
1162 sizeof(client_mac_str), client_mac_str);
08f382eb
SF		 1163
1164 if (enic->pp.set & ENIC_SET_INSTANCE) {
c33788b4 1165 sprintf(uuid_str, "%pUB", enic->pp.instance_uuid);
08f382eb 1166 vic_provinfo_add_tlv(vp,
6c2c9d96 1167 VIC_GENERIC_PROV_TLV_CLIENT_UUID_STR,
08f382eb
SF		 1168 sizeof(uuid_str), uuid_str);
1169 }
f8bd9091 1170
08f382eb 1171 if (enic->pp.set & ENIC_SET_HOST) {
c33788b4 1172 sprintf(uuid_str, "%pUB", enic->pp.host_uuid);
08f382eb 1173 vic_provinfo_add_tlv(vp,
6c2c9d96 1174 VIC_GENERIC_PROV_TLV_HOST_UUID_STR,
08f382eb
SF		 1175 sizeof(uuid_str), uuid_str);
1176 }
f8bd9091 1177
6c2c9d96
RP		 1178 os_type = htons(os_type);
1179 vic_provinfo_add_tlv(vp,
1180 VIC_GENERIC_PROV_TLV_OS_TYPE,
1181 sizeof(os_type), &os_type);
1182
08f382eb
SF		 1183 err = enic_dev_init_prov(enic, vp);
1184 vic_provinfo_free(vp);
1185 if (err)
1186 return err;
1187 break;
f8bd9091 1188
08f382eb
SF		 1189 case PORT_REQUEST_DISASSOCIATE:
1190 break;
f8bd9091 1191
08f382eb
SF		 1192 default:
1193 return -EINVAL;
1194 }
f8bd9091 1195
4dce2396
RP		 1196 /* Set flag to indicate that the port assoc/disassoc
1197 * request has been sent out to fw
1198 */
1199 enic->pp.set |= ENIC_PORT_REQUEST_APPLIED;
1200
08f382eb 1201 return 0;
f8bd9091
SF		 1202}
1203
1204static int enic_set_vf_port(struct net_device *netdev, int vf,
1205 struct nlattr *port[])
1206{
1207 struct enic *enic = netdev_priv(netdev);
29639059
RP		 1208 struct enic_port_profile new_pp;
1209 int err = 0;
08f382eb 1210
29639059 1211 memset(&new_pp, 0, sizeof(new_pp));
08f382eb
SF		 1212
1213 if (port[IFLA_PORT_REQUEST]) {
29639059
RP		 1214 new_pp.set |= ENIC_SET_REQUEST;
1215 new_pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
08f382eb
SF		 1216 }
1217
1218 if (port[IFLA_PORT_PROFILE]) {
29639059
RP		 1219 new_pp.set |= ENIC_SET_NAME;
1220 memcpy(new_pp.name, nla_data(port[IFLA_PORT_PROFILE]),
08f382eb
SF		 1221 PORT_PROFILE_MAX);
1222 }
1223
1224 if (port[IFLA_PORT_INSTANCE_UUID]) {
29639059
RP		 1225 new_pp.set |= ENIC_SET_INSTANCE;
1226 memcpy(new_pp.instance_uuid,
08f382eb
SF		 1227 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1228 }
1229
1230 if (port[IFLA_PORT_HOST_UUID]) {
29639059
RP		 1231 new_pp.set |= ENIC_SET_HOST;
1232 memcpy(new_pp.host_uuid,
08f382eb
SF		 1233 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1234 }
f8bd9091
SF		 1235
1236 /* don't support VFs, yet */
1237 if (vf != PORT_SELF_VF)
1238 return -EOPNOTSUPP;
1239
29639059 1240 if (!(new_pp.set & ENIC_SET_REQUEST))
08f382eb 1241 return -EOPNOTSUPP;
f8bd9091 1242
29639059
RP		 1243 if (new_pp.request == PORT_REQUEST_ASSOCIATE) {
1244 /* Special case handling */
1245 if (!is_zero_ether_addr(enic->pp.vf_mac))
1246 memcpy(new_pp.mac_addr, enic->pp.vf_mac, ETH_ALEN);
418c437d
SF		 1247
1248 if (is_zero_ether_addr(netdev->dev_addr))
1249 random_ether_addr(netdev->dev_addr);
f8bd9091
SF		 1250 }
1251
29639059
RP		 1252 memcpy(&enic->pp, &new_pp, sizeof(struct enic_port_profile));
1253
1254 err = enic_set_port_profile(enic, netdev->dev_addr);
1255 if (err)
1256 goto set_port_profile_cleanup;
1257
29639059
RP		 1258set_port_profile_cleanup:
1259 memset(enic->pp.vf_mac, 0, ETH_ALEN);
1260
1261 if (err || enic->pp.request == PORT_REQUEST_DISASSOCIATE) {
1262 memset(netdev->dev_addr, 0, ETH_ALEN);
1263 memset(enic->pp.mac_addr, 0, ETH_ALEN);
1264 }
1265
1266 return err;
f8bd9091
SF		 1267}
1268
1269static int enic_get_vf_port(struct net_device *netdev, int vf,
1270 struct sk_buff *skb)
1271{
1272 struct enic *enic = netdev_priv(netdev);
1273 int err, error, done;
1274 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
1275
4dce2396 1276 if (!(enic->pp.set & ENIC_PORT_REQUEST_APPLIED))
08f382eb 1277 return -ENODATA;
f8bd9091
SF		 1278
1279 err = enic_dev_init_done(enic, &done, &error);
f8bd9091 1280 if (err)
08f382eb 1281 error = err;
f8bd9091
SF		 1282
1283 switch (error) {
1284 case ERR_SUCCESS:
1285 if (!done)
1286 response = PORT_PROFILE_RESPONSE_INPROGRESS;
1287 break;
1288 case ERR_EINVAL:
1289 response = PORT_PROFILE_RESPONSE_INVALID;
1290 break;
1291 case ERR_EBADSTATE:
1292 response = PORT_PROFILE_RESPONSE_BADSTATE;
1293 break;
1294 case ERR_ENOMEM:
1295 response = PORT_PROFILE_RESPONSE_INSUFFICIENT_RESOURCES;
1296 break;
1297 default:
1298 response = PORT_PROFILE_RESPONSE_ERROR;
1299 break;
1300 }
1301
1302 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1303 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF		 1304 if (enic->pp.set & ENIC_SET_NAME)
1305 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1306 enic->pp.name);
1307 if (enic->pp.set & ENIC_SET_INSTANCE)
1308 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1309 enic->pp.instance_uuid);
1310 if (enic->pp.set & ENIC_SET_HOST)
1311 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1312 enic->pp.host_uuid);
f8bd9091
SF		 1313
1314 return 0;
1315
1316nla_put_failure:
1317 return -EMSGSIZE;
1318}
1319
01f2e4ea
SF		 1320static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1321{
1322 struct enic *enic = vnic_dev_priv(rq->vdev);
1323
1324 if (!buf->os_buf)
1325 return;
1326
1327 pci_unmap_single(enic->pdev, buf->dma_addr,
1328 buf->len, PCI_DMA_FROMDEVICE);
1329 dev_kfree_skb_any(buf->os_buf);
1330}
1331
01f2e4ea
SF		 1332static int enic_rq_alloc_buf(struct vnic_rq *rq)
1333{
1334 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1335 struct net_device *netdev = enic->netdev;
01f2e4ea 1336 struct sk_buff *skb;
1825aca6 1337 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1338 unsigned int os_buf_index = 0;
1339 dma_addr_t dma_addr;
1340
89d71a66 1341 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1342 if (!skb)
1343 return -ENOMEM;
1344
1345 dma_addr = pci_map_single(enic->pdev, skb->data,
1346 len, PCI_DMA_FROMDEVICE);
1347
1348 enic_queue_rq_desc(rq, skb, os_buf_index,
1349 dma_addr, len);
1350
1351 return 0;
1352}
1353
01f2e4ea
SF		 1354static void enic_rq_indicate_buf(struct vnic_rq *rq,
1355 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1356 int skipped, void *opaque)
1357{
1358 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1359 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1360 struct sk_buff *skb;
1361
1362 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1363 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1364 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1365 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1366 u8 packet_error;
f8cac14a 1367 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1368 u32 rss_hash;
1369
1370 if (skipped)
1371 return;
1372
1373 skb = buf->os_buf;
1374 prefetch(skb->data - NET_IP_ALIGN);
1375 pci_unmap_single(enic->pdev, buf->dma_addr,
1376 buf->len, PCI_DMA_FROMDEVICE);
1377
1378 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1379 &type, &color, &q_number, &completed_index,
1380 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1381 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1382 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1383 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1384 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1385 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1386 &fcs_ok);
1387
1388 if (packet_error) {
1389
350991e1
SF		 1390 if (!fcs_ok) {
1391 if (bytes_written > 0)
1392 enic->rq_bad_fcs++;
1393 else if (bytes_written == 0)
1394 enic->rq_truncated_pkts++;
1395 }
01f2e4ea
SF		 1396
1397 dev_kfree_skb_any(skb);
1398
1399 return;
1400 }
1401
1402 if (eop && bytes_written > 0) {
1403
1404 /* Good receive
1405 */
1406
1407 skb_put(skb, bytes_written);
86ca9db7 1408 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea
SF		 1409
1410 if (enic->csum_rx_enabled && !csum_not_calc) {
1411 skb->csum = htons(checksum);
1412 skb->ip_summed = CHECKSUM_COMPLETE;
1413 }
1414
86ca9db7 1415 skb->dev = netdev;
01f2e4ea 1416
f8cac14a
VK		 1417 if (enic->vlan_group && vlan_stripped &&
1418 (vlan_tci & CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK)) {
01f2e4ea 1419
88132f55 1420 if (netdev->features & NETIF_F_GRO)
717258ba
VK		 1421 vlan_gro_receive(&enic->napi[q_number],
1422 enic->vlan_group, vlan_tci, skb);
01f2e4ea
SF		 1423 else
1424 vlan_hwaccel_receive_skb(skb,
f8cac14a 1425 enic->vlan_group, vlan_tci);
01f2e4ea
SF		 1426
1427 } else {
1428
88132f55 1429 if (netdev->features & NETIF_F_GRO)
717258ba 1430 napi_gro_receive(&enic->napi[q_number], skb);
01f2e4ea
SF		 1431 else
1432 netif_receive_skb(skb);
1433
1434 }
01f2e4ea
SF		 1435 } else {
1436
1437 /* Buffer overflow
1438 */
1439
1440 dev_kfree_skb_any(skb);
1441 }
1442}
1443
1444static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1445 u8 type, u16 q_number, u16 completed_index, void *opaque)
1446{
1447 struct enic *enic = vnic_dev_priv(vdev);
1448
1449 vnic_rq_service(&enic->rq[q_number], cq_desc,
1450 completed_index, VNIC_RQ_RETURN_DESC,
1451 enic_rq_indicate_buf, opaque);
1452
1453 return 0;
1454}
1455
01f2e4ea
SF		 1456static int enic_poll(struct napi_struct *napi, int budget)
1457{
717258ba
VK		 1458 struct net_device *netdev = napi->dev;
1459 struct enic *enic = netdev_priv(netdev);
1460 unsigned int cq_rq = enic_cq_rq(enic, 0);
1461 unsigned int cq_wq = enic_cq_wq(enic, 0);
1462 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1463 unsigned int rq_work_to_do = budget;
1464 unsigned int wq_work_to_do = -1; /* no limit */
1465 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1466 int err;
01f2e4ea
SF		 1467
1468 /* Service RQ (first) and WQ
1469 */
1470
717258ba 1471 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1472 rq_work_to_do, enic_rq_service, NULL);
1473
717258ba 1474 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1475 wq_work_to_do, enic_wq_service, NULL);
1476
1477 /* Accumulate intr event credits for this polling
1478 * cycle. An intr event is the completion of a
1479 * a WQ or RQ packet.
1480 */
1481
1482 work_done = rq_work_done + wq_work_done;
1483
1484 if (work_done > 0)
717258ba 1485 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1486 work_done,
1487 0 /* don't unmask intr */,
1488 0 /* don't reset intr timer */);
1489
0eb26022 1490 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
01f2e4ea 1491
2d6ddced
SF		 1492 /* Buffer allocation failed. Stay in polling
1493 * mode so we can try to fill the ring again.
1494 */
01f2e4ea 1495
2d6ddced
SF		 1496 if (err)
1497 rq_work_done = rq_work_to_do;
01f2e4ea 1498
2d6ddced 1499 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1500
2d6ddced 1501 /* Some work done, but not enough to stay in polling,
88132f55 1502 * exit polling
01f2e4ea
SF		 1503 */
1504
288379f0 1505 napi_complete(napi);
717258ba 1506 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1507 }
1508
1509 return rq_work_done;
1510}
1511
1512static int enic_poll_msix(struct napi_struct *napi, int budget)
1513{
717258ba
VK		 1514 struct net_device *netdev = napi->dev;
1515 struct enic *enic = netdev_priv(netdev);
1516 unsigned int rq = (napi - &enic->napi[0]);
1517 unsigned int cq = enic_cq_rq(enic, rq);
1518 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1519 unsigned int work_to_do = budget;
1520 unsigned int work_done;
2d6ddced 1521 int err;
01f2e4ea
SF		 1522
1523 /* Service RQ
1524 */
1525
717258ba 1526 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1527 work_to_do, enic_rq_service, NULL);
1528
2d6ddced
SF		 1529 /* Return intr event credits for this polling
1530 * cycle. An intr event is the completion of a
1531 * RQ packet.
1532 */
01f2e4ea 1533
2d6ddced 1534 if (work_done > 0)
717258ba 1535 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1536 work_done,
1537 0 /* don't unmask intr */,
1538 0 /* don't reset intr timer */);
01f2e4ea 1539
0eb26022 1540 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
2d6ddced
SF		 1541
1542 /* Buffer allocation failed. Stay in polling mode
1543 * so we can try to fill the ring again.
1544 */
1545
1546 if (err)
1547 work_done = work_to_do;
1548
1549 if (work_done < work_to_do) {
1550
1551 /* Some work done, but not enough to stay in polling,
88132f55 1552 * exit polling
01f2e4ea
SF		 1553 */
1554
288379f0 1555 napi_complete(napi);
717258ba 1556 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1557 }
1558
1559 return work_done;
1560}
1561
1562static void enic_notify_timer(unsigned long data)
1563{
1564 struct enic *enic = (struct enic *)data;
1565
1566 enic_notify_check(enic);
1567
25f0a061
SF		 1568 mod_timer(&enic->notify_timer,
1569 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1570}
1571
1572static void enic_free_intr(struct enic *enic)
1573{
1574 struct net_device *netdev = enic->netdev;
1575 unsigned int i;
1576
1577 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1578 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1579 free_irq(enic->pdev->irq, netdev);
1580 break;
8f4d248c
SF		 1581 case VNIC_DEV_INTR_MODE_MSI:
1582 free_irq(enic->pdev->irq, enic);
1583 break;
01f2e4ea
SF		 1584 case VNIC_DEV_INTR_MODE_MSIX:
1585 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1586 if (enic->msix[i].requested)
1587 free_irq(enic->msix_entry[i].vector,
1588 enic->msix[i].devid);
1589 break;
1590 default:
1591 break;
1592 }
1593}
1594
1595static int enic_request_intr(struct enic *enic)
1596{
1597 struct net_device *netdev = enic->netdev;
717258ba 1598 unsigned int i, intr;
01f2e4ea
SF		 1599 int err = 0;
1600
1601 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1602
1603 case VNIC_DEV_INTR_MODE_INTX:
1604
1605 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1606 IRQF_SHARED, netdev->name, netdev);
1607 break;
1608
1609 case VNIC_DEV_INTR_MODE_MSI:
1610
1611 err = request_irq(enic->pdev->irq, enic_isr_msi,
1612 0, netdev->name, enic);
1613 break;
1614
1615 case VNIC_DEV_INTR_MODE_MSIX:
1616
717258ba
VK		 1617 for (i = 0; i < enic->rq_count; i++) {
1618 intr = enic_msix_rq_intr(enic, i);
1619 sprintf(enic->msix[intr].devname,
1620 "%.11s-rx-%d", netdev->name, i);
1621 enic->msix[intr].isr = enic_isr_msix_rq;
1622 enic->msix[intr].devid = &enic->napi[i];
1623 }
01f2e4ea 1624
717258ba
VK		 1625 for (i = 0; i < enic->wq_count; i++) {
1626 intr = enic_msix_wq_intr(enic, i);
1627 sprintf(enic->msix[intr].devname,
1628 "%.11s-tx-%d", netdev->name, i);
1629 enic->msix[intr].isr = enic_isr_msix_wq;
1630 enic->msix[intr].devid = enic;
1631 }
01f2e4ea 1632
717258ba
VK		 1633 intr = enic_msix_err_intr(enic);
1634 sprintf(enic->msix[intr].devname,
01f2e4ea 1635 "%.11s-err", netdev->name);
717258ba
VK		 1636 enic->msix[intr].isr = enic_isr_msix_err;
1637 enic->msix[intr].devid = enic;
01f2e4ea 1638
717258ba
VK		 1639 intr = enic_msix_notify_intr(enic);
1640 sprintf(enic->msix[intr].devname,
01f2e4ea 1641 "%.11s-notify", netdev->name);
717258ba
VK		 1642 enic->msix[intr].isr = enic_isr_msix_notify;
1643 enic->msix[intr].devid = enic;
1644
1645 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1646 enic->msix[i].requested = 0;
01f2e4ea 1647
717258ba 1648 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1649 err = request_irq(enic->msix_entry[i].vector,
1650 enic->msix[i].isr, 0,
1651 enic->msix[i].devname,
1652 enic->msix[i].devid);
1653 if (err) {
1654 enic_free_intr(enic);
1655 break;
1656 }
1657 enic->msix[i].requested = 1;
1658 }
1659
1660 break;
1661
1662 default:
1663 break;
1664 }
1665
1666 return err;
1667}
1668
b3d18d19
SF		 1669static void enic_synchronize_irqs(struct enic *enic)
1670{
1671 unsigned int i;
1672
1673 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1674 case VNIC_DEV_INTR_MODE_INTX:
1675 case VNIC_DEV_INTR_MODE_MSI:
1676 synchronize_irq(enic->pdev->irq);
1677 break;
1678 case VNIC_DEV_INTR_MODE_MSIX:
1679 for (i = 0; i < enic->intr_count; i++)
1680 synchronize_irq(enic->msix_entry[i].vector);
1681 break;
1682 default:
1683 break;
1684 }
1685}
1686
383ab92f 1687static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1688{
1689 int err;
1690
56ac88b3 1691 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1692 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1693 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1694 err = vnic_dev_notify_set(enic->vdev,
1695 enic_legacy_notify_intr());
01f2e4ea
SF		 1696 break;
1697 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1698 err = vnic_dev_notify_set(enic->vdev,
1699 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1700 break;
1701 default:
1702 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1703 break;
1704 }
56ac88b3 1705 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1706
1707 return err;
1708}
1709
1710static void enic_notify_timer_start(struct enic *enic)
1711{
1712 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1713 case VNIC_DEV_INTR_MODE_MSI:
1714 mod_timer(&enic->notify_timer, jiffies);
1715 break;
1716 default:
1717 /* Using intr for notification for INTx/MSI-X */
1718 break;
1719 };
1720}
1721
1722/* rtnl lock is held, process context */
1723static int enic_open(struct net_device *netdev)
1724{
1725 struct enic *enic = netdev_priv(netdev);
1726 unsigned int i;
1727 int err;
1728
4b75a442
SF		 1729 err = enic_request_intr(enic);
1730 if (err) {
a7a79deb 1731 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1732 return err;
1733 }
1734
383ab92f 1735 err = enic_dev_notify_set(enic);
4b75a442 1736 if (err) {
a7a79deb
VK		 1737 netdev_err(netdev,
1738 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1739 goto err_out_free_intr;
1740 }
1741
01f2e4ea 1742 for (i = 0; i < enic->rq_count; i++) {
0eb26022 1743 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
2d6ddced
SF		 1744 /* Need at least one buffer on ring to get going */
1745 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1746 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1747 err = -ENOMEM;
4b75a442 1748 goto err_out_notify_unset;
01f2e4ea
SF		 1749 }
1750 }
1751
1752 for (i = 0; i < enic->wq_count; i++)
1753 vnic_wq_enable(&enic->wq[i]);
1754 for (i = 0; i < enic->rq_count; i++)
1755 vnic_rq_enable(&enic->rq[i]);
1756
29639059
RP		 1757 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1758 enic_dev_add_addr(enic, enic->pp.mac_addr);
1759 else
1760 enic_dev_add_station_addr(enic);
319d7e84 1761 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1762
1763 netif_wake_queue(netdev);
717258ba
VK		 1764
1765 for (i = 0; i < enic->rq_count; i++)
1766 napi_enable(&enic->napi[i]);
1767
383ab92f 1768 enic_dev_enable(enic);
01f2e4ea
SF		 1769
1770 for (i = 0; i < enic->intr_count; i++)
1771 vnic_intr_unmask(&enic->intr[i]);
1772
1773 enic_notify_timer_start(enic);
1774
1775 return 0;
4b75a442
SF		 1776
1777err_out_notify_unset:
383ab92f 1778 enic_dev_notify_unset(enic);
4b75a442
SF		 1779err_out_free_intr:
1780 enic_free_intr(enic);
1781
1782 return err;
01f2e4ea
SF		 1783}
1784
1785/* rtnl lock is held, process context */
1786static int enic_stop(struct net_device *netdev)
1787{
1788 struct enic *enic = netdev_priv(netdev);
1789 unsigned int i;
1790 int err;
1791
29046f9b 1792 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1793 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1794 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1795 }
b3d18d19
SF		 1796
1797 enic_synchronize_irqs(enic);
1798
01f2e4ea
SF		 1799 del_timer_sync(&enic->notify_timer);
1800
383ab92f 1801 enic_dev_disable(enic);
717258ba
VK		 1802
1803 for (i = 0; i < enic->rq_count; i++)
1804 napi_disable(&enic->napi[i]);
1805
b3d18d19
SF		 1806 netif_carrier_off(netdev);
1807 netif_tx_disable(netdev);
29639059
RP		 1808 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1809 enic_dev_del_addr(enic, enic->pp.mac_addr);
1810 else
1811 enic_dev_del_station_addr(enic);
f8bd9091 1812
01f2e4ea
SF		 1813 for (i = 0; i < enic->wq_count; i++) {
1814 err = vnic_wq_disable(&enic->wq[i]);
1815 if (err)
1816 return err;
1817 }
1818 for (i = 0; i < enic->rq_count; i++) {
1819 err = vnic_rq_disable(&enic->rq[i]);
1820 if (err)
1821 return err;
1822 }
1823
383ab92f 1824 enic_dev_notify_unset(enic);
4b75a442
SF		 1825 enic_free_intr(enic);
1826
01f2e4ea
SF		 1827 for (i = 0; i < enic->wq_count; i++)
1828 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1829 for (i = 0; i < enic->rq_count; i++)
1830 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1831 for (i = 0; i < enic->cq_count; i++)
1832 vnic_cq_clean(&enic->cq[i]);
1833 for (i = 0; i < enic->intr_count; i++)
1834 vnic_intr_clean(&enic->intr[i]);
1835
1836 return 0;
1837}
1838
1839static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1840{
1841 struct enic *enic = netdev_priv(netdev);
1842 int running = netif_running(netdev);
1843
25f0a061
SF		 1844 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1845 return -EINVAL;
1846
01f2e4ea
SF		 1847 if (running)
1848 enic_stop(netdev);
1849
01f2e4ea
SF		 1850 netdev->mtu = new_mtu;
1851
1852 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1853 netdev_warn(netdev,
1854 "interface MTU (%d) set higher than port MTU (%d)\n",
1855 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1856
1857 if (running)
1858 enic_open(netdev);
1859
1860 return 0;
1861}
1862
1863#ifdef CONFIG_NET_POLL_CONTROLLER
1864static void enic_poll_controller(struct net_device *netdev)
1865{
1866 struct enic *enic = netdev_priv(netdev);
1867 struct vnic_dev *vdev = enic->vdev;
717258ba 1868 unsigned int i, intr;
01f2e4ea
SF		 1869
1870 switch (vnic_dev_get_intr_mode(vdev)) {
1871 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1872 for (i = 0; i < enic->rq_count; i++) {
1873 intr = enic_msix_rq_intr(enic, i);
79aeec58
VK		 1874 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1875 &enic->napi[i]);
717258ba
VK		 1876 }
1877 intr = enic_msix_wq_intr(enic, i);
1878 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
01f2e4ea
SF		 1879 break;
1880 case VNIC_DEV_INTR_MODE_MSI:
1881 enic_isr_msi(enic->pdev->irq, enic);
1882 break;
1883 case VNIC_DEV_INTR_MODE_INTX:
1884 enic_isr_legacy(enic->pdev->irq, netdev);
1885 break;
1886 default:
1887 break;
1888 }
1889}
1890#endif
1891
1892static int enic_dev_wait(struct vnic_dev *vdev,
1893 int (*start)(struct vnic_dev *, int),
1894 int (*finished)(struct vnic_dev *, int *),
1895 int arg)
1896{
1897 unsigned long time;
1898 int done;
1899 int err;
1900
1901 BUG_ON(in_interrupt());
1902
1903 err = start(vdev, arg);
1904 if (err)
1905 return err;
1906
1907 /* Wait for func to complete...2 seconds max
1908 */
1909
1910 time = jiffies + (HZ * 2);
1911 do {
1912
1913 err = finished(vdev, &done);
1914 if (err)
1915 return err;
1916
1917 if (done)
1918 return 0;
1919
1920 schedule_timeout_uninterruptible(HZ / 10);
1921
1922 } while (time_after(time, jiffies));
1923
1924 return -ETIMEDOUT;
1925}
1926
1927static int enic_dev_open(struct enic *enic)
1928{
1929 int err;
1930
1931 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1932 vnic_dev_open_done, 0);
1933 if (err)
a7a79deb
VK		 1934 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1935 err);
01f2e4ea
SF		 1936
1937 return err;
1938}
1939
99ef5639 1940static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1941{
1942 int err;
1943
99ef5639
VK		 1944 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1945 vnic_dev_hang_reset_done, 0);
01f2e4ea 1946 if (err)
a7a79deb
VK		 1947 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1948 err);
01f2e4ea
SF		 1949
1950 return err;
1951}
1952
717258ba
VK		 1953static int enic_set_rsskey(struct enic *enic)
1954{
1f4f067f 1955 dma_addr_t rss_key_buf_pa;
717258ba
VK		 1956 union vnic_rss_key *rss_key_buf_va = NULL;
1957 union vnic_rss_key rss_key = {
1958 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1959 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1960 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1961 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1962 };
1963 int err;
1964
1965 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1966 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1967 if (!rss_key_buf_va)
1968 return -ENOMEM;
1969
1970 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1971
1972 spin_lock(&enic->devcmd_lock);
1973 err = enic_set_rss_key(enic,
1974 rss_key_buf_pa,
1975 sizeof(union vnic_rss_key));
1976 spin_unlock(&enic->devcmd_lock);
1977
1978 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1979 rss_key_buf_va, rss_key_buf_pa);
1980
1981 return err;
1982}
1983
1984static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1985{
1f4f067f 1986 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 1987 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1988 unsigned int i;
1989 int err;
1990
1991 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1992 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1993 if (!rss_cpu_buf_va)
1994 return -ENOMEM;
1995
1996 for (i = 0; i < (1 << rss_hash_bits); i++)
1997 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1998
1999 spin_lock(&enic->devcmd_lock);
2000 err = enic_set_rss_cpu(enic,
2001 rss_cpu_buf_pa,
2002 sizeof(union vnic_rss_cpu));
2003 spin_unlock(&enic->devcmd_lock);
2004
2005 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
2006 rss_cpu_buf_va, rss_cpu_buf_pa);
2007
2008 return err;
2009}
2010
2011static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
2012 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 2013{
68f71708
SF		 2014 const u8 tso_ipid_split_en = 0;
2015 const u8 ig_vlan_strip_en = 1;
383ab92f 2016 int err;
68f71708 2017
717258ba
VK		 2018 /* Enable VLAN tag stripping.
2019 */
68f71708 2020
383ab92f
VK		 2021 spin_lock(&enic->devcmd_lock);
2022 err = enic_set_nic_cfg(enic,
68f71708
SF		 2023 rss_default_cpu, rss_hash_type,
2024 rss_hash_bits, rss_base_cpu,
2025 rss_enable, tso_ipid_split_en,
2026 ig_vlan_strip_en);
383ab92f
VK		 2027 spin_unlock(&enic->devcmd_lock);
2028
2029 return err;
2030}
2031
717258ba
VK		 2032static int enic_set_rss_nic_cfg(struct enic *enic)
2033{
2034 struct device *dev = enic_get_dev(enic);
2035 const u8 rss_default_cpu = 0;
2036 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
2037 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
2038 NIC_CFG_RSS_HASH_TYPE_IPV6 |
2039 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
2040 const u8 rss_hash_bits = 7;
2041 const u8 rss_base_cpu = 0;
2042 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
2043
2044 if (rss_enable) {
2045 if (!enic_set_rsskey(enic)) {
2046 if (enic_set_rsscpu(enic, rss_hash_bits)) {
2047 rss_enable = 0;
2048 dev_warn(dev, "RSS disabled, "
2049 "Failed to set RSS cpu indirection table.");
2050 }
2051 } else {
2052 rss_enable = 0;
2053 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
2054 }
2055 }
2056
2057 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
2058 rss_hash_bits, rss_base_cpu, rss_enable);
f8cac14a
VK		 2059}
2060
01f2e4ea
SF		 2061static void enic_reset(struct work_struct *work)
2062{
2063 struct enic *enic = container_of(work, struct enic, reset);
2064
2065 if (!netif_running(enic->netdev))
2066 return;
2067
2068 rtnl_lock();
2069
383ab92f 2070 enic_dev_hang_notify(enic);
01f2e4ea 2071 enic_stop(enic->netdev);
99ef5639 2072 enic_dev_hang_reset(enic);
e0afe53f 2073 enic_reset_addr_lists(enic);
01f2e4ea 2074 enic_init_vnic_resources(enic);
717258ba 2075 enic_set_rss_nic_cfg(enic);
f8cac14a 2076 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 2077 enic_open(enic->netdev);
2078
2079 rtnl_unlock();
2080}
2081
2082static int enic_set_intr_mode(struct enic *enic)
2083{
717258ba 2084 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1cbb1a61 2085 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
01f2e4ea
SF		 2086 unsigned int i;
2087
2088 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 2089 * on system capabilities.
01f2e4ea
SF		 2090 *
2091 * Try MSI-X first
2092 *
2093 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2094 * (the second to last INTR is used for WQ/RQ errors)
2095 * (the last INTR is used for notifications)
2096 */
2097
2098 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2099 for (i = 0; i < n + m + 2; i++)
2100 enic->msix_entry[i].entry = i;
2101
717258ba
VK		 2102 /* Use multiple RQs if RSS is enabled
2103 */
2104
2105 if (ENIC_SETTING(enic, RSS) &&
2106 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 2107 enic->rq_count >= n &&
2108 enic->wq_count >= m &&
2109 enic->cq_count >= n + m &&
717258ba 2110 enic->intr_count >= n + m + 2) {
01f2e4ea 2111
717258ba 2112 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2113
717258ba
VK		 2114 enic->rq_count = n;
2115 enic->wq_count = m;
2116 enic->cq_count = n + m;
2117 enic->intr_count = n + m + 2;
01f2e4ea 2118
717258ba
VK		 2119 vnic_dev_set_intr_mode(enic->vdev,
2120 VNIC_DEV_INTR_MODE_MSIX);
2121
2122 return 0;
2123 }
2124 }
2125
2126 if (enic->config.intr_mode < 1 &&
2127 enic->rq_count >= 1 &&
2128 enic->wq_count >= m &&
2129 enic->cq_count >= 1 + m &&
2130 enic->intr_count >= 1 + m + 2) {
2131 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2132
2133 enic->rq_count = 1;
2134 enic->wq_count = m;
2135 enic->cq_count = 1 + m;
2136 enic->intr_count = 1 + m + 2;
2137
2138 vnic_dev_set_intr_mode(enic->vdev,
2139 VNIC_DEV_INTR_MODE_MSIX);
2140
2141 return 0;
2142 }
01f2e4ea
SF		 2143 }
2144
2145 /* Next try MSI
2146 *
2147 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2148 */
2149
2150 if (enic->config.intr_mode < 2 &&
2151 enic->rq_count >= 1 &&
2152 enic->wq_count >= 1 &&
2153 enic->cq_count >= 2 &&
2154 enic->intr_count >= 1 &&
2155 !pci_enable_msi(enic->pdev)) {
2156
2157 enic->rq_count = 1;
2158 enic->wq_count = 1;
2159 enic->cq_count = 2;
2160 enic->intr_count = 1;
2161
2162 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2163
2164 return 0;
2165 }
2166
2167 /* Next try INTx
2168 *
2169 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2170 * (the first INTR is used for WQ/RQ)
2171 * (the second INTR is used for WQ/RQ errors)
2172 * (the last INTR is used for notifications)
2173 */
2174
2175 if (enic->config.intr_mode < 3 &&
2176 enic->rq_count >= 1 &&
2177 enic->wq_count >= 1 &&
2178 enic->cq_count >= 2 &&
2179 enic->intr_count >= 3) {
2180
2181 enic->rq_count = 1;
2182 enic->wq_count = 1;
2183 enic->cq_count = 2;
2184 enic->intr_count = 3;
2185
2186 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2187
2188 return 0;
2189 }
2190
2191 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2192
2193 return -EINVAL;
2194}
2195
2196static void enic_clear_intr_mode(struct enic *enic)
2197{
2198 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2199 case VNIC_DEV_INTR_MODE_MSIX:
2200 pci_disable_msix(enic->pdev);
2201 break;
2202 case VNIC_DEV_INTR_MODE_MSI:
2203 pci_disable_msi(enic->pdev);
2204 break;
2205 default:
2206 break;
2207 }
2208
2209 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2210}
2211
f8bd9091
SF		 2212static const struct net_device_ops enic_netdev_dynamic_ops = {
2213 .ndo_open = enic_open,
2214 .ndo_stop = enic_stop,
2215 .ndo_start_xmit = enic_hard_start_xmit,
2216 .ndo_get_stats = enic_get_stats,
2217 .ndo_validate_addr = eth_validate_addr,
319d7e84
RP		 2218 .ndo_set_rx_mode = enic_set_rx_mode,
2219 .ndo_set_multicast_list = enic_set_rx_mode,
f8bd9091
SF		 2220 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2221 .ndo_change_mtu = enic_change_mtu,
2222 .ndo_vlan_rx_register = enic_vlan_rx_register,
2223 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2224 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2225 .ndo_tx_timeout = enic_tx_timeout,
2226 .ndo_set_vf_port = enic_set_vf_port,
2227 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc 2228 .ndo_set_vf_mac = enic_set_vf_mac,
f8bd9091
SF		 2229#ifdef CONFIG_NET_POLL_CONTROLLER
2230 .ndo_poll_controller = enic_poll_controller,
2231#endif
2232};
2233
afe29f7a
SH		 2234static const struct net_device_ops enic_netdev_ops = {
2235 .ndo_open = enic_open,
2236 .ndo_stop = enic_stop,
00829823 2237 .ndo_start_xmit = enic_hard_start_xmit,
afe29f7a
SH		 2238 .ndo_get_stats = enic_get_stats,
2239 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2240 .ndo_set_mac_address = enic_set_mac_address,
319d7e84
RP		 2241 .ndo_set_rx_mode = enic_set_rx_mode,
2242 .ndo_set_multicast_list = enic_set_rx_mode,
afe29f7a
SH		 2243 .ndo_change_mtu = enic_change_mtu,
2244 .ndo_vlan_rx_register = enic_vlan_rx_register,
2245 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2246 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2247 .ndo_tx_timeout = enic_tx_timeout,
2248#ifdef CONFIG_NET_POLL_CONTROLLER
2249 .ndo_poll_controller = enic_poll_controller,
2250#endif
2251};
2252
2fdba388 2253static void enic_dev_deinit(struct enic *enic)
6fdfa970 2254{
717258ba
VK		 2255 unsigned int i;
2256
2257 for (i = 0; i < enic->rq_count; i++)
2258 netif_napi_del(&enic->napi[i]);
2259
6fdfa970
SF		 2260 enic_free_vnic_resources(enic);
2261 enic_clear_intr_mode(enic);
2262}
2263
2fdba388 2264static int enic_dev_init(struct enic *enic)
6fdfa970 2265{
a7a79deb 2266 struct device *dev = enic_get_dev(enic);
6fdfa970 2267 struct net_device *netdev = enic->netdev;
717258ba 2268 unsigned int i;
6fdfa970
SF		 2269 int err;
2270
2271 /* Get vNIC configuration
2272 */
2273
2274 err = enic_get_vnic_config(enic);
2275 if (err) {
a7a79deb 2276 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2277 return err;
2278 }
2279
2280 /* Get available resource counts
2281 */
2282
2283 enic_get_res_counts(enic);
2284
2285 /* Set interrupt mode based on resource counts and system
2286 * capabilities
2287 */
2288
2289 err = enic_set_intr_mode(enic);
2290 if (err) {
a7a79deb
VK		 2291 dev_err(dev, "Failed to set intr mode based on resource "
2292 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2293 return err;
2294 }
2295
2296 /* Allocate and configure vNIC resources
2297 */
2298
2299 err = enic_alloc_vnic_resources(enic);
2300 if (err) {
a7a79deb 2301 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2302 goto err_out_free_vnic_resources;
2303 }
2304
2305 enic_init_vnic_resources(enic);
2306
717258ba 2307 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2308 if (err) {
a7a79deb 2309 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2310 goto err_out_free_vnic_resources;
2311 }
2312
2313 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2314 default:
717258ba 2315 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2316 break;
2317 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2318 for (i = 0; i < enic->rq_count; i++)
2319 netif_napi_add(netdev, &enic->napi[i],
2320 enic_poll_msix, 64);
6fdfa970
SF		 2321 break;
2322 }
2323
2324 return 0;
2325
2326err_out_free_vnic_resources:
2327 enic_clear_intr_mode(enic);
2328 enic_free_vnic_resources(enic);
2329
2330 return err;
2331}
2332
27e6c7d3
SF		 2333static void enic_iounmap(struct enic *enic)
2334{
2335 unsigned int i;
2336
2337 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2338 if (enic->bar[i].vaddr)
2339 iounmap(enic->bar[i].vaddr);
2340}
2341
01f2e4ea
SF		 2342static int __devinit enic_probe(struct pci_dev *pdev,
2343 const struct pci_device_id *ent)
2344{
a7a79deb 2345 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2346 struct net_device *netdev;
2347 struct enic *enic;
2348 int using_dac = 0;
2349 unsigned int i;
2350 int err;
2351
01f2e4ea
SF		 2352 /* Allocate net device structure and initialize. Private
2353 * instance data is initialized to zero.
2354 */
2355
2356 netdev = alloc_etherdev(sizeof(struct enic));
2357 if (!netdev) {
a7a79deb 2358 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF		 2359 return -ENOMEM;
2360 }
2361
01f2e4ea
SF		 2362 pci_set_drvdata(pdev, netdev);
2363
2364 SET_NETDEV_DEV(netdev, &pdev->dev);
2365
2366 enic = netdev_priv(netdev);
2367 enic->netdev = netdev;
2368 enic->pdev = pdev;
2369
2370 /* Setup PCI resources
2371 */
2372
29046f9b 2373 err = pci_enable_device_mem(pdev);
01f2e4ea 2374 if (err) {
a7a79deb 2375 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2376 goto err_out_free_netdev;
2377 }
2378
2379 err = pci_request_regions(pdev, DRV_NAME);
2380 if (err) {
a7a79deb 2381 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2382 goto err_out_disable_device;
2383 }
2384
2385 pci_set_master(pdev);
2386
2387 /* Query PCI controller on system for DMA addressing
2388 * limitation for the device. Try 40-bit first, and
2389 * fail to 32-bit.
2390 */
2391
50cf156a 2392 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2393 if (err) {
284901a9 2394 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2395 if (err) {
a7a79deb 2396 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2397 goto err_out_release_regions;
2398 }
284901a9 2399 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2400 if (err) {
a7a79deb
VK		 2401 dev_err(dev, "Unable to obtain %u-bit DMA "
2402 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2403 goto err_out_release_regions;
2404 }
2405 } else {
50cf156a 2406 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2407 if (err) {
a7a79deb
VK		 2408 dev_err(dev, "Unable to obtain %u-bit DMA "
2409 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2410 goto err_out_release_regions;
2411 }
2412 using_dac = 1;
2413 }
2414
27e6c7d3 2415 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2416 */
2417
27e6c7d3
SF		 2418 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2419 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2420 continue;
2421 enic->bar[i].len = pci_resource_len(pdev, i);
2422 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2423 if (!enic->bar[i].vaddr) {
a7a79deb 2424 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2425 err = -ENODEV;
2426 goto err_out_iounmap;
2427 }
2428 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2429 }
2430
2431 /* Register vNIC device
2432 */
2433
27e6c7d3
SF		 2434 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2435 ARRAY_SIZE(enic->bar));
01f2e4ea 2436 if (!enic->vdev) {
a7a79deb 2437 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2438 err = -ENODEV;
2439 goto err_out_iounmap;
2440 }
2441
2442 /* Issue device open to get device in known state
2443 */
2444
2445 err = enic_dev_open(enic);
2446 if (err) {
a7a79deb 2447 dev_err(dev, "vNIC dev open failed, aborting\n");
01f2e4ea
SF		 2448 goto err_out_vnic_unregister;
2449 }
2450
69161425
VK		 2451 /* Setup devcmd lock
2452 */
2453
2454 spin_lock_init(&enic->devcmd_lock);
2455
2456 /*
2457 * Set ingress vlan rewrite mode before vnic initialization
2458 */
2459
2460 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2461 if (err) {
2462 dev_err(dev,
2463 "Failed to set ingress vlan rewrite mode, aborting.\n");
2464 goto err_out_dev_close;
2465 }
2466
01f2e4ea
SF		 2467 /* Issue device init to initialize the vnic-to-switch link.
2468 * We'll start with carrier off and wait for link UP
2469 * notification later to turn on carrier. We don't need
2470 * to wait here for the vnic-to-switch link initialization
2471 * to complete; link UP notification is the indication that
2472 * the process is complete.
2473 */
2474
2475 netif_carrier_off(netdev);
2476
a7a79deb
VK		 2477 /* Do not call dev_init for a dynamic vnic.
2478 * For a dynamic vnic, init_prov_info will be
2479 * called later by an upper layer.
2480 */
2481
f8bd9091
SF		 2482 if (!enic_is_dynamic(enic)) {
2483 err = vnic_dev_init(enic->vdev, 0);
2484 if (err) {
a7a79deb 2485 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2486 goto err_out_dev_close;
2487 }
01f2e4ea
SF		 2488 }
2489
6fdfa970 2490 err = enic_dev_init(enic);
01f2e4ea 2491 if (err) {
a7a79deb 2492 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2493 goto err_out_dev_close;
2494 }
2495
383ab92f 2496 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2497 */
2498
2499 init_timer(&enic->notify_timer);
2500 enic->notify_timer.function = enic_notify_timer;
2501 enic->notify_timer.data = (unsigned long)enic;
2502
2503 INIT_WORK(&enic->reset, enic_reset);
2504
2505 for (i = 0; i < enic->wq_count; i++)
2506 spin_lock_init(&enic->wq_lock[i]);
2507
01f2e4ea
SF		 2508 /* Register net device
2509 */
2510
2511 enic->port_mtu = enic->config.mtu;
2512 (void)enic_change_mtu(netdev, enic->port_mtu);
2513
2514 err = enic_set_mac_addr(netdev, enic->mac_addr);
2515 if (err) {
a7a79deb 2516 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2517 goto err_out_dev_deinit;
01f2e4ea
SF		 2518 }
2519
7c844599
SF		 2520 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2521 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2522
f8bd9091
SF		 2523 if (enic_is_dynamic(enic))
2524 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2525 else
2526 netdev->netdev_ops = &enic_netdev_ops;
2527
01f2e4ea
SF		 2528 netdev->watchdog_timeo = 2 * HZ;
2529 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2530
73c1ea9b 2531 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2532 if (ENIC_SETTING(enic, LOOP)) {
2533 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2534 enic->loop_enable = 1;
2535 enic->loop_tag = enic->config.loop_tag;
2536 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2537 }
01f2e4ea
SF		 2538 if (ENIC_SETTING(enic, TXCSUM))
2539 netdev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2540 if (ENIC_SETTING(enic, TSO))
2541 netdev->features |= NETIF_F_TSO |
2542 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
86ca9db7 2543 if (ENIC_SETTING(enic, LRO))
88132f55 2544 netdev->features |= NETIF_F_GRO;
01f2e4ea
SF		 2545 if (using_dac)
2546 netdev->features |= NETIF_F_HIGHDMA;
2547
01f2e4ea
SF		 2548 enic->csum_rx_enabled = ENIC_SETTING(enic, RXCSUM);
2549
01f2e4ea
SF		 2550 err = register_netdev(netdev);
2551 if (err) {
a7a79deb 2552 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2553 goto err_out_dev_deinit;
01f2e4ea
SF		 2554 }
2555
2556 return 0;
2557
6fdfa970
SF		 2558err_out_dev_deinit:
2559 enic_dev_deinit(enic);
01f2e4ea
SF		 2560err_out_dev_close:
2561 vnic_dev_close(enic->vdev);
2562err_out_vnic_unregister:
01f2e4ea
SF		 2563 vnic_dev_unregister(enic->vdev);
2564err_out_iounmap:
2565 enic_iounmap(enic);
2566err_out_release_regions:
2567 pci_release_regions(pdev);
2568err_out_disable_device:
2569 pci_disable_device(pdev);
2570err_out_free_netdev:
2571 pci_set_drvdata(pdev, NULL);
2572 free_netdev(netdev);
2573
2574 return err;
2575}
2576
2577static void __devexit enic_remove(struct pci_dev *pdev)
2578{
2579 struct net_device *netdev = pci_get_drvdata(pdev);
2580
2581 if (netdev) {
2582 struct enic *enic = netdev_priv(netdev);
2583
23f333a2 2584 cancel_work_sync(&enic->reset);
01f2e4ea 2585 unregister_netdev(netdev);
6fdfa970 2586 enic_dev_deinit(enic);
01f2e4ea 2587 vnic_dev_close(enic->vdev);
01f2e4ea
SF		 2588 vnic_dev_unregister(enic->vdev);
2589 enic_iounmap(enic);
2590 pci_release_regions(pdev);
2591 pci_disable_device(pdev);
2592 pci_set_drvdata(pdev, NULL);
2593 free_netdev(netdev);
2594 }
2595}
2596
2597static struct pci_driver enic_driver = {
2598 .name = DRV_NAME,
2599 .id_table = enic_id_table,
2600 .probe = enic_probe,
2601 .remove = __devexit_p(enic_remove),
2602};
2603
2604static int __init enic_init_module(void)
2605{
a7a79deb 2606 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2607
2608 return pci_register_driver(&enic_driver);
2609}
2610
2611static void __exit enic_cleanup_module(void)
2612{
2613 pci_unregister_driver(&enic_driver);
2614}
2615
2616module_init(enic_init_module);
2617module_exit(enic_cleanup_module);
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