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1da177e4 1/* eth16i.c An ICL EtherTeam 16i and 32 EISA ethernet driver for Linux
6aa20a22 2
1da177e4 3 Written 1994-1999 by Mika Kuoppala
6aa20a22 4
1da177e4
LT
5 Copyright (C) 1994-1999 by Mika Kuoppala
6 Based on skeleton.c and heavily on at1700.c by Donald Becker
7
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
10
11 The author may be reached as miku@iki.fi
12
13 This driver supports following cards :
14 - ICL EtherTeam 16i
6aa20a22 15 - ICL EtherTeam 32 EISA
1da177e4
LT
16 (Uses true 32 bit transfers rather than 16i compability mode)
17
18 Example Module usage:
19 insmod eth16i.o io=0x2a0 mediatype=bnc
20
21 mediatype can be one of the following: bnc,tp,dix,auto,eprom
22
23 'auto' will try to autoprobe mediatype.
24 'eprom' will use whatever type defined in eprom.
25
26 I have benchmarked driver with PII/300Mhz as a ftp client
27 and 486/33Mhz as a ftp server. Top speed was 1128.37 kilobytes/sec.
6aa20a22 28
1da177e4
LT
29 Sources:
30 - skeleton.c a sample network driver core for linux,
31 written by Donald Becker <becker@scyld.com>
6aa20a22 32 - at1700.c a driver for Allied Telesis AT1700, written
1da177e4
LT
33 by Donald Becker.
34 - e16iSRV.asm a Netware 3.X Server Driver for ICL EtherTeam16i
35 written by Markku Viima
36 - The Fujitsu MB86965 databook.
6aa20a22
JG
37
38 Author thanks following persons due to their valueble assistance:
1da177e4 39 Markku Viima (ICL)
6aa20a22 40 Ari Valve (ICL)
1da177e4
LT
41 Donald Becker
42 Kurt Huwig <kurt@huwig.de>
43
44 Revision history:
45
46 Version Date Description
6aa20a22 47
1da177e4
LT
48 0.01 15.12-94 Initial version (card detection)
49 0.02 23.01-95 Interrupt is now hooked correctly
50 0.03 01.02-95 Rewrote initialization part
51 0.04 07.02-95 Base skeleton done...
52 Made a few changes to signature checking
53 to make it a bit reliable.
54 - fixed bug in tx_buf mapping
55 - fixed bug in initialization (DLC_EN
56 wasn't enabled when initialization
57 was done.)
58 0.05 08.02-95 If there were more than one packet to send,
59 transmit was jammed due to invalid
60 register write...now fixed
6aa20a22 61 0.06 19.02-95 Rewrote interrupt handling
1da177e4
LT
62 0.07 13.04-95 Wrote EEPROM read routines
63 Card configuration now set according to
64 data read from EEPROM
65 0.08 23.06-95 Wrote part that tries to probe used interface
66 port if AUTO is selected
67
68 0.09 01.09-95 Added module support
6aa20a22 69
1da177e4
LT
70 0.10 04.09-95 Fixed receive packet allocation to work
71 with kernels > 1.3.x
1da177e4 72
6aa20a22
JG
73 0.20 20.09-95 Added support for EtherTeam32 EISA
74
75 0.21 17.10-95 Removed the unnecessary extern
1da177e4
LT
76 init_etherdev() declaration. Some
77 other cleanups.
6aa20a22 78
1da177e4
LT
79 0.22 22.02-96 Receive buffer was not flushed
80 correctly when faulty packet was
81 received. Now fixed.
82
6aa20a22 83 0.23 26.02-96 Made resetting the adapter
1da177e4 84 more reliable.
6aa20a22 85
1da177e4
LT
86 0.24 27.02-96 Rewrote faulty packet handling in eth16i_rx
87
88 0.25 22.05-96 kfree() was missing from cleanup_module.
89
6aa20a22 90 0.26 11.06-96 Sometimes card was not found by
1da177e4 91 check_signature(). Now made more reliable.
6aa20a22
JG
92
93 0.27 23.06-96 Oops. 16 consecutive collisions halted
94 adapter. Now will try to retransmit
1da177e4 95 MAX_COL_16 times before finally giving up.
6aa20a22 96
1da177e4
LT
97 0.28 28.10-97 Added dev_id parameter (NULL) for free_irq
98
99 0.29 29.10-97 Multiple card support for module users
100
101 0.30 30.10-97 Fixed irq allocation bug.
102 (request_irq moved from probe to open)
103
104 0.30a 21.08-98 Card detection made more relaxed. Driver
105 had problems with some TCP/IP-PROM boots
6aa20a22 106 to find the card. Suggested by
1da177e4
LT
107 Kurt Huwig <kurt@huwig.de>
108
109 0.31 28.08-98 Media interface port can now be selected
110 with module parameters or kernel
6aa20a22 111 boot parameters.
1da177e4 112
6aa20a22 113 0.32 31.08-98 IRQ was never freed if open/close
1da177e4 114 pair wasn't called. Now fixed.
6aa20a22 115
1da177e4
LT
116 0.33 10.09-98 When eth16i_open() was called after
117 eth16i_close() chip never recovered.
118 Now more shallow reset is made on
119 close.
120
121 0.34 29.06-99 Fixed one bad #ifdef.
122 Changed ioaddr -> io for consistency
123
124 0.35 01.07-99 transmit,-receive bytes were never
6aa20a22 125 updated in stats.
1da177e4
LT
126
127 Bugs:
6aa20a22
JG
128 In some cases the media interface autoprobing code doesn't find
129 the correct interface type. In this case you can
130 manually choose the interface type in DOS with E16IC.EXE which is
1da177e4
LT
131 configuration software for EtherTeam16i and EtherTeam32 cards.
132 This is also true for IRQ setting. You cannot use module
6aa20a22 133 parameter to configure IRQ of the card (yet).
1da177e4
LT
134
135 To do:
136 - Real multicast support
137 - Rewrite the media interface autoprobing code. Its _horrible_ !
138 - Possibly merge all the MB86965 specific code to external
139 module for use by eth16.c and Donald's at1700.c
140 - IRQ configuration with module parameter. I will do
141 this when i will get enough info about setting
142 irq without configuration utility.
143*/
144
6aa20a22 145static char *version =
1da177e4
LT
146 "eth16i.c: v0.35 01-Jul-1999 Mika Kuoppala (miku@iki.fi)\n";
147
148#include <linux/module.h>
149#include <linux/kernel.h>
6aa20a22
JG
150#include <linux/types.h>
151#include <linux/fcntl.h>
152#include <linux/interrupt.h>
153#include <linux/ioport.h>
154#include <linux/in.h>
155#include <linux/slab.h>
156#include <linux/string.h>
1da177e4
LT
157#include <linux/errno.h>
158#include <linux/init.h>
159#include <linux/spinlock.h>
160#include <linux/netdevice.h>
161#include <linux/etherdevice.h>
162#include <linux/skbuff.h>
163#include <linux/bitops.h>
ff5688ae 164#include <linux/jiffies.h>
53d5ed62 165#include <linux/io.h>
1da177e4 166
6aa20a22 167#include <asm/system.h>
1da177e4
LT
168#include <asm/dma.h>
169
170
171
172/* Few macros */
6aa20a22 173#define BITSET(ioaddr, bnum) ((outb(((inb(ioaddr)) | (bnum)), ioaddr)))
1da177e4
LT
174#define BITCLR(ioaddr, bnum) ((outb(((inb(ioaddr)) & (~(bnum))), ioaddr)))
175
176/* This is the I/O address space for Etherteam 16i adapter. */
177#define ETH16I_IO_EXTENT 32
178
179/* Ticks before deciding that transmit has timed out */
180#define TX_TIMEOUT (400*HZ/1000)
181
182/* Maximum loop count when receiving packets */
183#define MAX_RX_LOOP 20
184
185/* Some interrupt masks */
186#define ETH16I_INTR_ON 0xef8a /* Higher is receive mask */
187#define ETH16I_INTR_OFF 0x0000
6aa20a22 188
1da177e4
LT
189/* Buffers header status byte meanings */
190#define PKT_GOOD BIT(5)
191#define PKT_GOOD_RMT BIT(4)
192#define PKT_SHORT BIT(3)
193#define PKT_ALIGN_ERR BIT(2)
194#define PKT_CRC_ERR BIT(1)
195#define PKT_RX_BUF_OVERFLOW BIT(0)
196
197/* Transmit status register (DLCR0) */
198#define TX_STATUS_REG 0
199#define TX_DONE BIT(7)
200#define NET_BUSY BIT(6)
201#define TX_PKT_RCD BIT(5)
202#define CR_LOST BIT(4)
203#define TX_JABBER_ERR BIT(3)
204#define COLLISION BIT(2)
205#define COLLISIONS_16 BIT(1)
206
207/* Receive status register (DLCR1) */
208#define RX_STATUS_REG 1
209#define RX_PKT BIT(7) /* Packet received */
210#define BUS_RD_ERR BIT(6)
211#define SHORT_PKT_ERR BIT(3)
212#define ALIGN_ERR BIT(2)
213#define CRC_ERR BIT(1)
214#define RX_BUF_OVERFLOW BIT(0)
6aa20a22 215
1da177e4
LT
216/* Transmit Interrupt Enable Register (DLCR2) */
217#define TX_INTR_REG 2
218#define TX_INTR_DONE BIT(7)
219#define TX_INTR_COL BIT(2)
220#define TX_INTR_16_COL BIT(1)
221
222/* Receive Interrupt Enable Register (DLCR3) */
223#define RX_INTR_REG 3
224#define RX_INTR_RECEIVE BIT(7)
225#define RX_INTR_SHORT_PKT BIT(3)
226#define RX_INTR_CRC_ERR BIT(1)
227#define RX_INTR_BUF_OVERFLOW BIT(0)
228
229/* Transmit Mode Register (DLCR4) */
230#define TRANSMIT_MODE_REG 4
231#define LOOPBACK_CONTROL BIT(1)
232#define CONTROL_OUTPUT BIT(2)
233
234/* Receive Mode Register (DLCR5) */
235#define RECEIVE_MODE_REG 5
236#define RX_BUFFER_EMPTY BIT(6)
237#define ACCEPT_BAD_PACKETS BIT(5)
238#define RECEIVE_SHORT_ADDR BIT(4)
239#define ACCEPT_SHORT_PACKETS BIT(3)
240#define REMOTE_RESET BIT(2)
241
242#define ADDRESS_FILTER_MODE BIT(1) | BIT(0)
243#define REJECT_ALL 0
244#define ACCEPT_ALL 3
245#define MODE_1 1 /* NODE ID, BC, MC, 2-24th bit */
246#define MODE_2 2 /* NODE ID, BC, MC, Hash Table */
247
248/* Configuration Register 0 (DLCR6) */
249#define CONFIG_REG_0 6
250#define DLC_EN BIT(7)
251#define SRAM_CYCLE_TIME_100NS BIT(6)
252#define SYSTEM_BUS_WIDTH_8 BIT(5) /* 1 = 8bit, 0 = 16bit */
253#define BUFFER_WIDTH_8 BIT(4) /* 1 = 8bit, 0 = 16bit */
6aa20a22 254#define TBS1 BIT(3)
1da177e4
LT
255#define TBS0 BIT(2)
256#define SRAM_BS1 BIT(1) /* 00=8kb, 01=16kb */
257#define SRAM_BS0 BIT(0) /* 10=32kb, 11=64kb */
258
6aa20a22 259#ifndef ETH16I_TX_BUF_SIZE /* 0 = 2kb, 1 = 4kb */
1da177e4 260#define ETH16I_TX_BUF_SIZE 3 /* 2 = 8kb, 3 = 16kb */
6aa20a22 261#endif
1da177e4
LT
262#define TX_BUF_1x2048 0
263#define TX_BUF_2x2048 1
264#define TX_BUF_2x4098 2
265#define TX_BUF_2x8192 3
266
267/* Configuration Register 1 (DLCR7) */
268#define CONFIG_REG_1 7
269#define POWERUP BIT(5)
270
271/* Transmit start register */
272#define TRANSMIT_START_REG 10
273#define TRANSMIT_START_RB 2
274#define TX_START BIT(7) /* Rest of register bit indicate*/
275 /* number of packets in tx buffer*/
276/* Node ID registers (DLCR8-13) */
277#define NODE_ID_0 8
278#define NODE_ID_RB 0
279
280/* Hash Table registers (HT8-15) */
281#define HASH_TABLE_0 8
282#define HASH_TABLE_RB 1
283
284/* Buffer memory ports */
285#define BUFFER_MEM_PORT_LB 8
286#define DATAPORT BUFFER_MEM_PORT_LB
287#define BUFFER_MEM_PORT_HB 9
288
289/* 16 Collision control register (BMPR11) */
290#define COL_16_REG 11
291#define HALT_ON_16 0x00
292#define RETRANS_AND_HALT_ON_16 0x02
293
294/* Maximum number of attempts to send after 16 concecutive collisions */
295#define MAX_COL_16 10
296
297/* DMA Burst and Transceiver Mode Register (BMPR13) */
298#define TRANSCEIVER_MODE_REG 13
6aa20a22 299#define TRANSCEIVER_MODE_RB 2
1da177e4
LT
300#define IO_BASE_UNLOCK BIT(7)
301#define LOWER_SQUELCH_TRESH BIT(6)
302#define LINK_TEST_DISABLE BIT(5)
303#define AUI_SELECT BIT(4)
304#define DIS_AUTO_PORT_SEL BIT(3)
305
306/* Filter Self Receive Register (BMPR14) */
307#define FILTER_SELF_RX_REG 14
308#define SKIP_RX_PACKET BIT(2)
309#define FILTER_SELF_RECEIVE BIT(0)
310
311/* EEPROM Control Register (BMPR 16) */
312#define EEPROM_CTRL_REG 16
313
314/* EEPROM Data Register (BMPR 17) */
315#define EEPROM_DATA_REG 17
316
317/* NMC93CSx6 EEPROM Control Bits */
318#define CS_0 0x00
319#define CS_1 0x20
320#define SK_0 0x00
321#define SK_1 0x40
322#define DI_0 0x00
323#define DI_1 0x80
324
325/* NMC93CSx6 EEPROM Instructions */
326#define EEPROM_READ 0x80
327
328/* NMC93CSx6 EEPROM Addresses */
329#define E_NODEID_0 0x02
330#define E_NODEID_1 0x03
331#define E_NODEID_2 0x04
332#define E_PORT_SELECT 0x14
333 #define E_PORT_BNC 0x00
334 #define E_PORT_DIX 0x01
335 #define E_PORT_TP 0x02
336 #define E_PORT_AUTO 0x03
337 #define E_PORT_FROM_EPROM 0x04
338#define E_PRODUCT_CFG 0x30
6aa20a22 339
1da177e4
LT
340
341/* Macro to slow down io between EEPROM clock transitions */
342#define eeprom_slow_io() do { int _i = 40; while(--_i > 0) { inb(0x80); }}while(0)
343
344/* Jumperless Configuration Register (BMPR19) */
345#define JUMPERLESS_CONFIG 19
346
347/* ID ROM registers, writing to them also resets some parts of chip */
348#define ID_ROM_0 24
349#define ID_ROM_7 31
350#define RESET ID_ROM_0
351
352/* This is the I/O address list to be probed when seeking the card */
353static unsigned int eth16i_portlist[] __initdata = {
6aa20a22 354 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300, 0
1da177e4
LT
355};
356
6aa20a22 357static unsigned int eth32i_portlist[] __initdata = {
1da177e4 358 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000, 0x8000,
6aa20a22 359 0x9000, 0xA000, 0xB000, 0xC000, 0xD000, 0xE000, 0xF000, 0
1da177e4
LT
360};
361
362/* This is the Interrupt lookup table for Eth16i card */
363static unsigned int eth16i_irqmap[] __initdata = { 9, 10, 5, 15, 0 };
364#define NUM_OF_ISA_IRQS 4
365
366/* This is the Interrupt lookup table for Eth32i card */
6aa20a22 367static unsigned int eth32i_irqmap[] __initdata = { 3, 5, 7, 9, 10, 11, 12, 15, 0 };
1da177e4
LT
368#define EISA_IRQ_REG 0xc89
369#define NUM_OF_EISA_IRQS 8
370
371static unsigned int eth16i_tx_buf_map[] = { 2048, 2048, 4096, 8192 };
372
373/* Use 0 for production, 1 for verification, >2 for debug */
374#ifndef ETH16I_DEBUG
375#define ETH16I_DEBUG 0
376#endif
377static unsigned int eth16i_debug = ETH16I_DEBUG;
378
379/* Information for each board */
380
381struct eth16i_local {
1da177e4
LT
382 unsigned char tx_started;
383 unsigned char tx_buf_busy;
384 unsigned short tx_queue; /* Number of packets in transmit buffer */
6aa20a22 385 unsigned short tx_queue_len;
1da177e4
LT
386 unsigned int tx_buf_size;
387 unsigned long open_time;
388 unsigned long tx_buffered_packets;
389 unsigned long tx_buffered_bytes;
390 unsigned long col_16;
391 spinlock_t lock;
392};
393
394/* Function prototypes */
395
396static int eth16i_probe1(struct net_device *dev, int ioaddr);
397static int eth16i_check_signature(int ioaddr);
398static int eth16i_probe_port(int ioaddr);
399static void eth16i_set_port(int ioaddr, int porttype);
400static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l);
401static int eth16i_receive_probe_packet(int ioaddr);
402static int eth16i_get_irq(int ioaddr);
403static int eth16i_read_eeprom(int ioaddr, int offset);
404static int eth16i_read_eeprom_word(int ioaddr);
405static void eth16i_eeprom_cmd(int ioaddr, unsigned char command);
406static int eth16i_open(struct net_device *dev);
407static int eth16i_close(struct net_device *dev);
408static int eth16i_tx(struct sk_buff *skb, struct net_device *dev);
409static void eth16i_rx(struct net_device *dev);
410static void eth16i_timeout(struct net_device *dev);
7d12e780 411static irqreturn_t eth16i_interrupt(int irq, void *dev_id);
1da177e4
LT
412static void eth16i_reset(struct net_device *dev);
413static void eth16i_timeout(struct net_device *dev);
414static void eth16i_skip_packet(struct net_device *dev);
6aa20a22 415static void eth16i_multicast(struct net_device *dev);
1da177e4
LT
416static void eth16i_select_regbank(unsigned char regbank, int ioaddr);
417static void eth16i_initialize(struct net_device *dev, int boot);
418
419#if 0
420static int eth16i_set_irq(struct net_device *dev);
421#endif
422
423#ifdef MODULE
424static ushort eth16i_parse_mediatype(const char* s);
425#endif
426
1da177e4
LT
427static char cardname[] __initdata = "ICL EtherTeam 16i/32";
428
429static int __init do_eth16i_probe(struct net_device *dev)
430{
431 int i;
432 int ioaddr;
433 int base_addr = dev->base_addr;
6aa20a22 434
6aa20a22 435 if(eth16i_debug > 4)
1da177e4
LT
436 printk(KERN_DEBUG "Probing started for %s\n", cardname);
437
438 if(base_addr > 0x1ff) /* Check only single location */
439 return eth16i_probe1(dev, base_addr);
440 else if(base_addr != 0) /* Don't probe at all */
441 return -ENXIO;
442
443 /* Seek card from the ISA io address space */
444 for(i = 0; (ioaddr = eth16i_portlist[i]) ; i++)
445 if(eth16i_probe1(dev, ioaddr) == 0)
446 return 0;
447
448 /* Seek card from the EISA io address space */
449 for(i = 0; (ioaddr = eth32i_portlist[i]) ; i++)
450 if(eth16i_probe1(dev, ioaddr) == 0)
451 return 0;
452
453 return -ENODEV;
454}
455
456#ifndef MODULE
457struct net_device * __init eth16i_probe(int unit)
458{
459 struct net_device *dev = alloc_etherdev(sizeof(struct eth16i_local));
460 int err;
461
462 if (!dev)
463 return ERR_PTR(-ENOMEM);
464
465 sprintf(dev->name, "eth%d", unit);
466 netdev_boot_setup_check(dev);
467
468 err = do_eth16i_probe(dev);
469 if (err)
470 goto out;
1da177e4 471 return dev;
1da177e4
LT
472out:
473 free_netdev(dev);
474 return ERR_PTR(err);
475}
476#endif
477
6d1ec781
SH
478static const struct net_device_ops eth16i_netdev_ops = {
479 .ndo_open = eth16i_open,
480 .ndo_stop = eth16i_close,
481 .ndo_start_xmit = eth16i_tx,
482 .ndo_set_multicast_list = eth16i_multicast,
483 .ndo_tx_timeout = eth16i_timeout,
484 .ndo_change_mtu = eth_change_mtu,
485 .ndo_set_mac_address = eth_mac_addr,
486 .ndo_validate_addr = eth_validate_addr,
487};
488
1da177e4
LT
489static int __init eth16i_probe1(struct net_device *dev, int ioaddr)
490{
491 struct eth16i_local *lp = netdev_priv(dev);
492 static unsigned version_printed;
493 int retval;
494
495 /* Let's grab the region */
496 if (!request_region(ioaddr, ETH16I_IO_EXTENT, cardname))
497 return -EBUSY;
498
499 /*
6aa20a22 500 The MB86985 chip has on register which holds information in which
1da177e4
LT
501 io address the chip lies. First read this register and compare
502 it to our current io address and if match then this could
503 be our chip.
504 */
505
506 if(ioaddr < 0x1000) {
6aa20a22 507 if(eth16i_portlist[(inb(ioaddr + JUMPERLESS_CONFIG) & 0x07)]
1da177e4
LT
508 != ioaddr) {
509 retval = -ENODEV;
510 goto out;
511 }
512 }
513
514 /* Now we will go a bit deeper and try to find the chip's signature */
515
516 if(eth16i_check_signature(ioaddr) != 0) {
517 retval = -ENODEV;
518 goto out;
519 }
520
6aa20a22 521 /*
1da177e4 522 Now it seems that we have found a ethernet chip in this particular
6aa20a22 523 ioaddr. The MB86985 chip has this feature, that when you read a
1da177e4
LT
524 certain register it will increase it's io base address to next
525 configurable slot. Now when we have found the chip, first thing is
526 to make sure that the chip's ioaddr will hold still here.
527 */
528
529 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
530 outb(0x00, ioaddr + TRANSCEIVER_MODE_REG);
531
532 outb(0x00, ioaddr + RESET); /* Reset some parts of chip */
533 BITSET(ioaddr + CONFIG_REG_0, BIT(7)); /* Disable the data link */
534
535 if( (eth16i_debug & version_printed++) == 0)
536 printk(KERN_INFO "%s", version);
537
538 dev->base_addr = ioaddr;
539 dev->irq = eth16i_get_irq(ioaddr);
540
541 /* Try to obtain interrupt vector */
542
543 if ((retval = request_irq(dev->irq, (void *)&eth16i_interrupt, 0, cardname, dev))) {
6aa20a22 544 printk(KERN_WARNING "%s at %#3x, but is unusable due to conflicting IRQ %d.\n",
1da177e4
LT
545 cardname, ioaddr, dev->irq);
546 goto out;
547 }
548
549 printk(KERN_INFO "%s: %s at %#3x, IRQ %d, ",
550 dev->name, cardname, ioaddr, dev->irq);
551
552
553 /* Now we will have to lock the chip's io address */
554 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
6aa20a22 555 outb(0x38, ioaddr + TRANSCEIVER_MODE_REG);
1da177e4
LT
556
557 eth16i_initialize(dev, 1); /* Initialize rest of the chip's registers */
558
559 /* Now let's same some energy by shutting down the chip ;) */
560 BITCLR(ioaddr + CONFIG_REG_1, POWERUP);
561
562 /* Initialize the device structure */
6d1ec781 563 dev->netdev_ops = &eth16i_netdev_ops;
1da177e4
LT
564 dev->watchdog_timeo = TX_TIMEOUT;
565 spin_lock_init(&lp->lock);
b1fc5505
HX
566
567 retval = register_netdev(dev);
568 if (retval)
569 goto out1;
1da177e4 570 return 0;
b1fc5505
HX
571out1:
572 free_irq(dev->irq, dev);
1da177e4
LT
573out:
574 release_region(ioaddr, ETH16I_IO_EXTENT);
575 return retval;
576}
577
578
579static void eth16i_initialize(struct net_device *dev, int boot)
580{
581 int ioaddr = dev->base_addr;
582 int i, node_w = 0;
583 unsigned char node_byte = 0;
584
585 /* Setup station address */
586 eth16i_select_regbank(NODE_ID_RB, ioaddr);
587 for(i = 0 ; i < 3 ; i++) {
588 unsigned short node_val = eth16i_read_eeprom(ioaddr, E_NODEID_0 + i);
589 ((unsigned short *)dev->dev_addr)[i] = ntohs(node_val);
590 }
591
6aa20a22 592 for(i = 0; i < 6; i++) {
1da177e4
LT
593 outb( ((unsigned char *)dev->dev_addr)[i], ioaddr + NODE_ID_0 + i);
594 if(boot) {
595 printk("%02x", inb(ioaddr + NODE_ID_0 + i));
596 if(i != 5)
597 printk(":");
598 }
599 }
600
601 /* Now we will set multicast addresses to accept none */
602 eth16i_select_regbank(HASH_TABLE_RB, ioaddr);
6aa20a22 603 for(i = 0; i < 8; i++)
1da177e4
LT
604 outb(0x00, ioaddr + HASH_TABLE_0 + i);
605
606 /*
6aa20a22 607 Now let's disable the transmitter and receiver, set the buffer ram
1da177e4
LT
608 cycle time, bus width and buffer data path width. Also we shall
609 set transmit buffer size and total buffer size.
610 */
611
612 eth16i_select_regbank(2, ioaddr);
613
614 node_byte = 0;
615 node_w = eth16i_read_eeprom(ioaddr, E_PRODUCT_CFG);
616
617 if( (node_w & 0xFF00) == 0x0800)
618 node_byte |= BUFFER_WIDTH_8;
619
620 node_byte |= SRAM_BS1;
621
622 if( (node_w & 0x00FF) == 64)
623 node_byte |= SRAM_BS0;
624
625 node_byte |= DLC_EN | SRAM_CYCLE_TIME_100NS | (ETH16I_TX_BUF_SIZE << 2);
626
627 outb(node_byte, ioaddr + CONFIG_REG_0);
628
629 /* We shall halt the transmitting, if 16 collisions are detected */
630 outb(HALT_ON_16, ioaddr + COL_16_REG);
631
632#ifdef MODULE
633 /* if_port already set by init_module() */
634#else
6aa20a22 635 dev->if_port = (dev->mem_start < E_PORT_FROM_EPROM) ?
1da177e4
LT
636 dev->mem_start : E_PORT_FROM_EPROM;
637#endif
638
639 /* Set interface port type */
640 if(boot) {
641 char *porttype[] = {"BNC", "DIX", "TP", "AUTO", "FROM_EPROM" };
642
643 switch(dev->if_port)
644 {
645
646 case E_PORT_FROM_EPROM:
647 dev->if_port = eth16i_read_eeprom(ioaddr, E_PORT_SELECT);
648 break;
649
650 case E_PORT_AUTO:
651 dev->if_port = eth16i_probe_port(ioaddr);
652 break;
6aa20a22 653
1da177e4
LT
654 case E_PORT_BNC:
655 case E_PORT_TP:
656 case E_PORT_DIX:
657 break;
658 }
659
660 printk(" %s interface.\n", porttype[dev->if_port]);
661
662 eth16i_set_port(ioaddr, dev->if_port);
663 }
664
665 /* Set Receive Mode to normal operation */
666 outb(MODE_2, ioaddr + RECEIVE_MODE_REG);
667}
668
669static int eth16i_probe_port(int ioaddr)
670{
671 int i;
672 int retcode;
673 unsigned char dummy_packet[64];
674
675 /* Powerup the chip */
676 outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
677
678 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
679
680 eth16i_select_regbank(NODE_ID_RB, ioaddr);
681
682 for(i = 0; i < 6; i++) {
683 dummy_packet[i] = inb(ioaddr + NODE_ID_0 + i);
684 dummy_packet[i+6] = inb(ioaddr + NODE_ID_0 + i);
685 }
686
687 dummy_packet[12] = 0x00;
688 dummy_packet[13] = 0x04;
689 memset(dummy_packet + 14, 0, sizeof(dummy_packet) - 14);
690
691 eth16i_select_regbank(2, ioaddr);
692
693 for(i = 0; i < 3; i++) {
694 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
695 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
696 eth16i_set_port(ioaddr, i);
697
698 if(eth16i_debug > 1)
699 printk(KERN_DEBUG "Set port number %d\n", i);
700
701 retcode = eth16i_send_probe_packet(ioaddr, dummy_packet, 64);
702 if(retcode == 0) {
703 retcode = eth16i_receive_probe_packet(ioaddr);
704 if(retcode != -1) {
705 if(eth16i_debug > 1)
706 printk(KERN_DEBUG "Eth16i interface port found at %d\n", i);
707 return i;
708 }
709 }
710 else {
711 if(eth16i_debug > 1)
712 printk(KERN_DEBUG "TRANSMIT_DONE timeout when probing interface port\n");
713 }
714 }
715
716 if( eth16i_debug > 1)
717 printk(KERN_DEBUG "Using default port\n");
718
719 return E_PORT_BNC;
720}
721
722static void eth16i_set_port(int ioaddr, int porttype)
6aa20a22 723{
1da177e4
LT
724 unsigned short temp = 0;
725
726 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
727 outb(LOOPBACK_CONTROL, ioaddr + TRANSMIT_MODE_REG);
728
729 temp |= DIS_AUTO_PORT_SEL;
730
731 switch(porttype) {
732
733 case E_PORT_BNC :
734 temp |= AUI_SELECT;
735 break;
736
737 case E_PORT_TP :
738 break;
739
740 case E_PORT_DIX :
741 temp |= AUI_SELECT;
742 BITSET(ioaddr + TRANSMIT_MODE_REG, CONTROL_OUTPUT);
743 break;
6aa20a22 744 }
1da177e4
LT
745
746 outb(temp, ioaddr + TRANSCEIVER_MODE_REG);
747
748 if(eth16i_debug > 1) {
749 printk(KERN_DEBUG "TRANSMIT_MODE_REG = %x\n", inb(ioaddr + TRANSMIT_MODE_REG));
6aa20a22 750 printk(KERN_DEBUG "TRANSCEIVER_MODE_REG = %x\n",
1da177e4
LT
751 inb(ioaddr+TRANSCEIVER_MODE_REG));
752 }
753}
754
755static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
756{
ff5688ae 757 unsigned long starttime;
1da177e4
LT
758
759 outb(0xff, ioaddr + TX_STATUS_REG);
760
761 outw(l, ioaddr + DATAPORT);
6aa20a22 762 outsw(ioaddr + DATAPORT, (unsigned short *)b, (l + 1) >> 1);
1da177e4
LT
763
764 starttime = jiffies;
6aa20a22 765 outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
1da177e4
LT
766
767 while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
ff5688ae 768 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT
769 return -1;
770 }
771 }
772
773 return 0;
774}
775
776static int eth16i_receive_probe_packet(int ioaddr)
777{
ff5688ae 778 unsigned long starttime;
1da177e4
LT
779
780 starttime = jiffies;
781
782 while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
ff5688ae 783 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT
784
785 if(eth16i_debug > 1)
786 printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
787 starttime = jiffies;
788 while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
ff5688ae 789 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT
790 if(eth16i_debug > 1)
791 printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
792 return -1;
793 }
794 }
795
796 if(eth16i_debug > 1)
797 printk(KERN_DEBUG "RECEIVE_PACKET\n");
798 return(0); /* Found receive packet */
799 }
800 }
801
802 if(eth16i_debug > 1) {
803 printk(KERN_DEBUG "TRANSMIT_PACKET_RECEIVED %x\n", inb(ioaddr + TX_STATUS_REG));
804 printk(KERN_DEBUG "RX_STATUS_REG = %x\n", inb(ioaddr + RX_STATUS_REG));
805 }
806
807 return(0); /* Return success */
808}
809
810#if 0
811static int eth16i_set_irq(struct net_device* dev)
812{
813 const int ioaddr = dev->base_addr;
814 const int irq = dev->irq;
815 int i = 0;
816
6aa20a22 817 if(ioaddr < 0x1000) {
1da177e4
LT
818 while(eth16i_irqmap[i] && eth16i_irqmap[i] != irq)
819 i++;
6aa20a22 820
1da177e4
LT
821 if(i < NUM_OF_ISA_IRQS) {
822 u8 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
823 cbyte = (cbyte & 0x3F) | (i << 6);
824 outb(cbyte, ioaddr + JUMPERLESS_CONFIG);
825 return 0;
826 }
827 }
828 else {
829 printk(KERN_NOTICE "%s: EISA Interrupt cannot be set. Use EISA Configuration utility.\n", dev->name);
830 }
6aa20a22 831
1da177e4
LT
832 return -1;
833
834}
835#endif
836
837static int __init eth16i_get_irq(int ioaddr)
838{
839 unsigned char cbyte;
840
841 if( ioaddr < 0x1000) {
842 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
843 return( eth16i_irqmap[ ((cbyte & 0xC0) >> 6) ] );
844 } else { /* Oh..the card is EISA so method getting IRQ different */
845 unsigned short index = 0;
846 cbyte = inb(ioaddr + EISA_IRQ_REG);
847 while( (cbyte & 0x01) == 0) {
848 cbyte = cbyte >> 1;
849 index++;
850 }
851 return( eth32i_irqmap[ index ] );
852 }
853}
854
855static int __init eth16i_check_signature(int ioaddr)
856{
857 int i;
858 unsigned char creg[4] = { 0 };
859
860 for(i = 0; i < 4 ; i++) {
861
862 creg[i] = inb(ioaddr + TRANSMIT_MODE_REG + i);
863
864 if(eth16i_debug > 1)
6aa20a22 865 printk("eth16i: read signature byte %x at %x\n",
1da177e4
LT
866 creg[i],
867 ioaddr + TRANSMIT_MODE_REG + i);
868 }
869
870 creg[0] &= 0x0F; /* Mask collision cnr */
871 creg[2] &= 0x7F; /* Mask DCLEN bit */
872
873#if 0
6aa20a22 874 /*
1da177e4
LT
875 This was removed because the card was sometimes left to state
876 from which it couldn't be find anymore. If there is need
877 to more strict check still this have to be fixed.
878 */
879 if( ! ((creg[0] == 0x06) && (creg[1] == 0x41)) ) {
880 if(creg[1] != 0x42)
881 return -1;
882 }
883#endif
884
885 if( !((creg[2] == 0x36) && (creg[3] == 0xE0)) ) {
886 creg[2] &= 0x40;
887 creg[3] &= 0x03;
6aa20a22 888
1da177e4
LT
889 if( !((creg[2] == 0x40) && (creg[3] == 0x00)) )
890 return -1;
891 }
6aa20a22 892
1da177e4
LT
893 if(eth16i_read_eeprom(ioaddr, E_NODEID_0) != 0)
894 return -1;
6aa20a22 895
1da177e4
LT
896 if((eth16i_read_eeprom(ioaddr, E_NODEID_1) & 0xFF00) != 0x4B00)
897 return -1;
898
899 return 0;
900}
901
902static int eth16i_read_eeprom(int ioaddr, int offset)
903{
904 int data = 0;
905
906 eth16i_eeprom_cmd(ioaddr, EEPROM_READ | offset);
907 outb(CS_1, ioaddr + EEPROM_CTRL_REG);
908 data = eth16i_read_eeprom_word(ioaddr);
909 outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
910
6aa20a22 911 return(data);
1da177e4
LT
912}
913
914static int eth16i_read_eeprom_word(int ioaddr)
915{
916 int i;
917 int data = 0;
6aa20a22 918
1da177e4
LT
919 for(i = 16; i > 0; i--) {
920 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
921 eeprom_slow_io();
922 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
923 eeprom_slow_io();
6aa20a22 924 data = (data << 1) |
1da177e4 925 ((inb(ioaddr + EEPROM_DATA_REG) & DI_1) ? 1 : 0);
6aa20a22 926
1da177e4
LT
927 eeprom_slow_io();
928 }
929
930 return(data);
931}
932
933static void eth16i_eeprom_cmd(int ioaddr, unsigned char command)
934{
935 int i;
936
937 outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
938 outb(DI_0, ioaddr + EEPROM_DATA_REG);
939 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
940 outb(DI_1, ioaddr + EEPROM_DATA_REG);
941 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
942
943 for(i = 7; i >= 0; i--) {
944 short cmd = ( (command & (1 << i)) ? DI_1 : DI_0 );
945 outb(cmd, ioaddr + EEPROM_DATA_REG);
946 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
947 eeprom_slow_io();
948 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
949 eeprom_slow_io();
6aa20a22 950 }
1da177e4
LT
951}
952
953static int eth16i_open(struct net_device *dev)
954{
955 struct eth16i_local *lp = netdev_priv(dev);
956 int ioaddr = dev->base_addr;
6aa20a22 957
1da177e4
LT
958 /* Powerup the chip */
959 outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
960
961 /* Initialize the chip */
6aa20a22 962 eth16i_initialize(dev, 0);
1da177e4
LT
963
964 /* Set the transmit buffer size */
965 lp->tx_buf_size = eth16i_tx_buf_map[ETH16I_TX_BUF_SIZE & 0x03];
966
967 if(eth16i_debug > 0)
6aa20a22 968 printk(KERN_DEBUG "%s: transmit buffer size %d\n",
1da177e4
LT
969 dev->name, lp->tx_buf_size);
970
971 /* Now enable Transmitter and Receiver sections */
972 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
973
974 /* Now switch to register bank 2, for run time operation */
975 eth16i_select_regbank(2, ioaddr);
976
977 lp->open_time = jiffies;
978 lp->tx_started = 0;
979 lp->tx_queue = 0;
980 lp->tx_queue_len = 0;
981
982 /* Turn on interrupts*/
6aa20a22 983 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1da177e4
LT
984
985 netif_start_queue(dev);
986 return 0;
987}
988
989static int eth16i_close(struct net_device *dev)
990{
991 struct eth16i_local *lp = netdev_priv(dev);
992 int ioaddr = dev->base_addr;
993
994 eth16i_reset(dev);
995
996 /* Turn off interrupts*/
6aa20a22 997 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1da177e4
LT
998
999 netif_stop_queue(dev);
6aa20a22 1000
1da177e4
LT
1001 lp->open_time = 0;
1002
1003 /* Disable transmit and receive */
1004 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
1005
1006 /* Reset the chip */
1007 /* outb(0xff, ioaddr + RESET); */
1008 /* outw(0xffff, ioaddr + TX_STATUS_REG); */
6aa20a22 1009
1da177e4
LT
1010 outb(0x00, ioaddr + CONFIG_REG_1);
1011
1012 return 0;
1013}
1014
1015static void eth16i_timeout(struct net_device *dev)
1016{
1017 struct eth16i_local *lp = netdev_priv(dev);
1018 int ioaddr = dev->base_addr;
6aa20a22
JG
1019 /*
1020 If we get here, some higher level has decided that
1021 we are broken. There should really be a "kick me"
1022 function call instead.
1da177e4
LT
1023 */
1024
1025 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
6aa20a22 1026 printk(KERN_WARNING "%s: transmit timed out with status %04x, %s ?\n",
1da177e4 1027 dev->name,
6aa20a22 1028 inw(ioaddr + TX_STATUS_REG), (inb(ioaddr + TX_STATUS_REG) & TX_DONE) ?
1da177e4
LT
1029 "IRQ conflict" : "network cable problem");
1030
1031 dev->trans_start = jiffies;
1032
1033 /* Let's dump all registers */
6aa20a22 1034 if(eth16i_debug > 0) {
1da177e4 1035 printk(KERN_DEBUG "%s: timeout: %02x %02x %02x %02x %02x %02x %02x %02x.\n",
6aa20a22
JG
1036 dev->name, inb(ioaddr + 0),
1037 inb(ioaddr + 1), inb(ioaddr + 2),
1038 inb(ioaddr + 3), inb(ioaddr + 4),
1da177e4
LT
1039 inb(ioaddr + 5),
1040 inb(ioaddr + 6), inb(ioaddr + 7));
1041
1042 printk(KERN_DEBUG "%s: transmit start reg: %02x. collision reg %02x\n",
1043 dev->name, inb(ioaddr + TRANSMIT_START_REG),
1044 inb(ioaddr + COL_16_REG));
1045 printk(KERN_DEBUG "lp->tx_queue = %d\n", lp->tx_queue);
1046 printk(KERN_DEBUG "lp->tx_queue_len = %d\n", lp->tx_queue_len);
1047 printk(KERN_DEBUG "lp->tx_started = %d\n", lp->tx_started);
1048 }
09f75cd7 1049 dev->stats.tx_errors++;
1da177e4
LT
1050 eth16i_reset(dev);
1051 dev->trans_start = jiffies;
1052 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1053 netif_wake_queue(dev);
1054}
1055
1056static int eth16i_tx(struct sk_buff *skb, struct net_device *dev)
1057{
1058 struct eth16i_local *lp = netdev_priv(dev);
1059 int ioaddr = dev->base_addr;
1060 int status = 0;
1061 ushort length = skb->len;
1062 unsigned char *buf;
1063 unsigned long flags;
1064
1065 if (length < ETH_ZLEN) {
5b057c6b 1066 if (skb_padto(skb, ETH_ZLEN))
6ed10654 1067 return NETDEV_TX_OK;
1da177e4
LT
1068 length = ETH_ZLEN;
1069 }
1070 buf = skb->data;
1071
1072 netif_stop_queue(dev);
6aa20a22 1073
1da177e4
LT
1074 /* Turn off TX interrupts */
1075 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
6aa20a22 1076
1da177e4
LT
1077 /* We would be better doing the disable_irq tricks the 3c509 does,
1078 that would make this suck a lot less */
6aa20a22 1079
1da177e4
LT
1080 spin_lock_irqsave(&lp->lock, flags);
1081
1082 if( (length + 2) > (lp->tx_buf_size - lp->tx_queue_len)) {
6aa20a22
JG
1083 if(eth16i_debug > 0)
1084 printk(KERN_WARNING "%s: Transmit buffer full.\n", dev->name);
1085 }
1da177e4
LT
1086 else {
1087 outw(length, ioaddr + DATAPORT);
1088
6aa20a22 1089 if( ioaddr < 0x1000 )
1da177e4
LT
1090 outsw(ioaddr + DATAPORT, buf, (length + 1) >> 1);
1091 else {
1092 unsigned char frag = length % 4;
1093 outsl(ioaddr + DATAPORT, buf, length >> 2);
1094 if( frag != 0 ) {
1095 outsw(ioaddr + DATAPORT, (buf + (length & 0xFFFC)), 1);
6aa20a22
JG
1096 if( frag == 3 )
1097 outsw(ioaddr + DATAPORT,
1da177e4
LT
1098 (buf + (length & 0xFFFC) + 2), 1);
1099 }
1100 }
1101 lp->tx_buffered_packets++;
1102 lp->tx_buffered_bytes = length;
1103 lp->tx_queue++;
1104 lp->tx_queue_len += length + 2;
1105 }
1106 lp->tx_buf_busy = 0;
1107
1108 if(lp->tx_started == 0) {
1109 /* If the transmitter is idle..always trigger a transmit */
1110 outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1111 lp->tx_queue = 0;
1112 lp->tx_queue_len = 0;
1113 dev->trans_start = jiffies;
1114 lp->tx_started = 1;
1115 netif_wake_queue(dev);
1116 }
1117 else if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1118 /* There is still more room for one more packet in tx buffer */
1119 netif_wake_queue(dev);
1120 }
6aa20a22 1121
1da177e4 1122 spin_unlock_irqrestore(&lp->lock, flags);
6aa20a22 1123
1da177e4
LT
1124 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1125 /* Turn TX interrupts back on */
1126 /* outb(TX_INTR_DONE | TX_INTR_16_COL, ioaddr + TX_INTR_REG); */
1127 status = 0;
1128 dev_kfree_skb(skb);
6ed10654 1129 return NETDEV_TX_OK;
1da177e4
LT
1130}
1131
1132static void eth16i_rx(struct net_device *dev)
1133{
1da177e4
LT
1134 int ioaddr = dev->base_addr;
1135 int boguscount = MAX_RX_LOOP;
1136
1137 /* Loop until all packets have been read */
1138 while( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) {
1139
6aa20a22 1140 /* Read status byte from receive buffer */
1da177e4
LT
1141 ushort status = inw(ioaddr + DATAPORT);
1142
1143 /* Get the size of the packet from receive buffer */
1144 ushort pkt_len = inw(ioaddr + DATAPORT);
1145
1146 if(eth16i_debug > 4)
6aa20a22
JG
1147 printk(KERN_DEBUG "%s: Receiving packet mode %02x status %04x.\n",
1148 dev->name,
1da177e4 1149 inb(ioaddr + RECEIVE_MODE_REG), status);
6aa20a22 1150
1da177e4 1151 if( !(status & PKT_GOOD) ) {
09f75cd7 1152 dev->stats.rx_errors++;
1da177e4
LT
1153
1154 if( (pkt_len < ETH_ZLEN) || (pkt_len > ETH_FRAME_LEN) ) {
09f75cd7 1155 dev->stats.rx_length_errors++;
1da177e4 1156 eth16i_reset(dev);
6aa20a22 1157 return;
1da177e4 1158 }
6aa20a22 1159 else {
1da177e4 1160 eth16i_skip_packet(dev);
09f75cd7 1161 dev->stats.rx_dropped++;
6aa20a22 1162 }
1da177e4
LT
1163 }
1164 else { /* Ok so now we should have a good packet */
1165 struct sk_buff *skb;
1166
1167 skb = dev_alloc_skb(pkt_len + 3);
1168 if( skb == NULL ) {
6aa20a22 1169 printk(KERN_WARNING "%s: Could'n allocate memory for packet (len %d)\n",
1da177e4
LT
1170 dev->name, pkt_len);
1171 eth16i_skip_packet(dev);
09f75cd7 1172 dev->stats.rx_dropped++;
1da177e4
LT
1173 break;
1174 }
1175
1da177e4 1176 skb_reserve(skb,2);
6aa20a22
JG
1177
1178 /*
1da177e4
LT
1179 Now let's get the packet out of buffer.
1180 size is (pkt_len + 1) >> 1, cause we are now reading words
1181 and it have to be even aligned.
6aa20a22
JG
1182 */
1183
1184 if(ioaddr < 0x1000)
1185 insw(ioaddr + DATAPORT, skb_put(skb, pkt_len),
1da177e4 1186 (pkt_len + 1) >> 1);
6aa20a22 1187 else {
1da177e4
LT
1188 unsigned char *buf = skb_put(skb, pkt_len);
1189 unsigned char frag = pkt_len % 4;
1190
1191 insl(ioaddr + DATAPORT, buf, pkt_len >> 2);
1192
1193 if(frag != 0) {
1194 unsigned short rest[2];
1195 rest[0] = inw( ioaddr + DATAPORT );
1196 if(frag == 3)
1197 rest[1] = inw( ioaddr + DATAPORT );
1198
1199 memcpy(buf + (pkt_len & 0xfffc), (char *)rest, frag);
1200 }
1201 }
1202
1203 skb->protocol=eth_type_trans(skb, dev);
1204
1205 if( eth16i_debug > 5 ) {
1206 int i;
6aa20a22 1207 printk(KERN_DEBUG "%s: Received packet of length %d.\n",
1da177e4 1208 dev->name, pkt_len);
6aa20a22 1209 for(i = 0; i < 14; i++)
1da177e4
LT
1210 printk(KERN_DEBUG " %02x", skb->data[i]);
1211 printk(KERN_DEBUG ".\n");
1212 }
1213 netif_rx(skb);
09f75cd7
JG
1214 dev->stats.rx_packets++;
1215 dev->stats.rx_bytes += pkt_len;
1da177e4
LT
1216
1217 } /* else */
1218
1219 if(--boguscount <= 0)
1220 break;
1221
1222 } /* while */
1223}
1224
7d12e780 1225static irqreturn_t eth16i_interrupt(int irq, void *dev_id)
1da177e4
LT
1226{
1227 struct net_device *dev = dev_id;
1228 struct eth16i_local *lp;
1229 int ioaddr = 0, status;
1230 int handled = 0;
1231
1232 ioaddr = dev->base_addr;
1233 lp = netdev_priv(dev);
1234
1235 /* Turn off all interrupts from adapter */
1236 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1237
1238 /* eth16i_tx won't be called */
1239 spin_lock(&lp->lock);
1240
1241 status = inw(ioaddr + TX_STATUS_REG); /* Get the status */
1242 outw(status, ioaddr + TX_STATUS_REG); /* Clear status bits */
1243
1244 if (status)
1245 handled = 1;
1246
1247 if(eth16i_debug > 3)
1248 printk(KERN_DEBUG "%s: Interrupt with status %04x.\n", dev->name, status);
1249
1250 if( status & 0x7f00 ) {
1251
09f75cd7 1252 dev->stats.rx_errors++;
1da177e4 1253
6aa20a22 1254 if(status & (BUS_RD_ERR << 8) )
1da177e4 1255 printk(KERN_WARNING "%s: Bus read error.\n",dev->name);
09f75cd7
JG
1256 if(status & (SHORT_PKT_ERR << 8) ) dev->stats.rx_length_errors++;
1257 if(status & (ALIGN_ERR << 8) ) dev->stats.rx_frame_errors++;
1258 if(status & (CRC_ERR << 8) ) dev->stats.rx_crc_errors++;
1259 if(status & (RX_BUF_OVERFLOW << 8) ) dev->stats.rx_over_errors++;
1da177e4
LT
1260 }
1261 if( status & 0x001a) {
1262
09f75cd7 1263 dev->stats.tx_errors++;
1da177e4 1264
09f75cd7
JG
1265 if(status & CR_LOST) dev->stats.tx_carrier_errors++;
1266 if(status & TX_JABBER_ERR) dev->stats.tx_window_errors++;
1da177e4 1267
6aa20a22 1268#if 0
1da177e4 1269 if(status & COLLISION) {
09f75cd7 1270 dev->stats.collisions +=
1da177e4
LT
1271 ((inb(ioaddr+TRANSMIT_MODE_REG) & 0xF0) >> 4);
1272 }
1273#endif
1274 if(status & COLLISIONS_16) {
6aa20a22 1275 if(lp->col_16 < MAX_COL_16) {
1da177e4 1276 lp->col_16++;
09f75cd7 1277 dev->stats.collisions++;
1da177e4
LT
1278 /* Resume transmitting, skip failed packet */
1279 outb(0x02, ioaddr + COL_16_REG);
1280 }
1281 else {
1282 printk(KERN_WARNING "%s: bailing out due to many consecutive 16-in-a-row collisions. Network cable problem?\n", dev->name);
1283 }
1284 }
1285 }
1286
1287 if( status & 0x00ff ) { /* Let's check the transmit status reg */
1288
1289 if(status & TX_DONE) { /* The transmit has been done */
09f75cd7
JG
1290 dev->stats.tx_packets = lp->tx_buffered_packets;
1291 dev->stats.tx_bytes += lp->tx_buffered_bytes;
6aa20a22 1292 lp->col_16 = 0;
1da177e4
LT
1293
1294 if(lp->tx_queue) { /* Is there still packets ? */
1295 /* There was packet(s) so start transmitting and write also
1296 how many packets there is to be sended */
1297 outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1298 lp->tx_queue = 0;
1299 lp->tx_queue_len = 0;
1300 lp->tx_started = 1;
1301 }
1302 else {
1303 lp->tx_started = 0;
1304 }
1305 netif_wake_queue(dev);
1306 }
1307 }
1308
6aa20a22 1309 if( ( status & 0x8000 ) ||
1da177e4
LT
1310 ( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) ) {
1311 eth16i_rx(dev); /* We have packet in receive buffer */
6aa20a22
JG
1312 }
1313
1da177e4
LT
1314 /* Turn interrupts back on */
1315 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
6aa20a22 1316
1da177e4
LT
1317 if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1318 /* There is still more room for one more packet in tx buffer */
1319 netif_wake_queue(dev);
1320 }
6aa20a22 1321
1da177e4 1322 spin_unlock(&lp->lock);
6aa20a22 1323
1da177e4
LT
1324 return IRQ_RETVAL(handled);
1325}
1326
1327static void eth16i_skip_packet(struct net_device *dev)
6aa20a22 1328{
1da177e4
LT
1329 int ioaddr = dev->base_addr;
1330
1331 inw(ioaddr + DATAPORT);
1332 inw(ioaddr + DATAPORT);
1333 inw(ioaddr + DATAPORT);
1334
1335 outb(SKIP_RX_PACKET, ioaddr + FILTER_SELF_RX_REG);
1336 while( inb( ioaddr + FILTER_SELF_RX_REG ) != 0);
1337}
1338
1339static void eth16i_reset(struct net_device *dev)
1340{
1341 struct eth16i_local *lp = netdev_priv(dev);
1342 int ioaddr = dev->base_addr;
1343
6aa20a22 1344 if(eth16i_debug > 1)
1da177e4
LT
1345 printk(KERN_DEBUG "%s: Resetting device.\n", dev->name);
1346
1347 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
6aa20a22 1348 outw(0xffff, ioaddr + TX_STATUS_REG);
1da177e4
LT
1349 eth16i_select_regbank(2, ioaddr);
1350
1351 lp->tx_started = 0;
1352 lp->tx_buf_busy = 0;
1353 lp->tx_queue = 0;
6aa20a22 1354 lp->tx_queue_len = 0;
1da177e4
LT
1355 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
1356}
1357
1358static void eth16i_multicast(struct net_device *dev)
1359{
1360 int ioaddr = dev->base_addr;
6aa20a22
JG
1361
1362 if(dev->mc_count || dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
1da177e4 1363 {
6aa20a22 1364 outb(3, ioaddr + RECEIVE_MODE_REG);
1da177e4
LT
1365 } else {
1366 outb(2, ioaddr + RECEIVE_MODE_REG);
1367 }
1368}
1369
1da177e4
LT
1370static void eth16i_select_regbank(unsigned char banknbr, int ioaddr)
1371{
1372 unsigned char data;
1373
1374 data = inb(ioaddr + CONFIG_REG_1);
6aa20a22 1375 outb( ((data & 0xF3) | ( (banknbr & 0x03) << 2)), ioaddr + CONFIG_REG_1);
1da177e4
LT
1376}
1377
1378#ifdef MODULE
1379
1380static ushort eth16i_parse_mediatype(const char* s)
1381{
1382 if(!s)
1383 return E_PORT_FROM_EPROM;
6aa20a22 1384
1da177e4
LT
1385 if (!strncmp(s, "bnc", 3))
1386 return E_PORT_BNC;
1387 else if (!strncmp(s, "tp", 2))
1388 return E_PORT_TP;
1389 else if (!strncmp(s, "dix", 3))
1390 return E_PORT_DIX;
1391 else if (!strncmp(s, "auto", 4))
1392 return E_PORT_AUTO;
1393 else
1394 return E_PORT_FROM_EPROM;
1395}
1396
1397#define MAX_ETH16I_CARDS 4 /* Max number of Eth16i cards per module */
1398
1399static struct net_device *dev_eth16i[MAX_ETH16I_CARDS];
1400static int io[MAX_ETH16I_CARDS];
1401#if 0
1402static int irq[MAX_ETH16I_CARDS];
1403#endif
1404static char* mediatype[MAX_ETH16I_CARDS];
1405static int debug = -1;
1406
1407MODULE_AUTHOR("Mika Kuoppala <miku@iki.fi>");
1408MODULE_DESCRIPTION("ICL EtherTeam 16i/32 driver");
1409MODULE_LICENSE("GPL");
1410
1411
1412module_param_array(io, int, NULL, 0);
1413MODULE_PARM_DESC(io, "eth16i I/O base address(es)");
1414
1415#if 0
1416module_param_array(irq, int, NULL, 0);
1417MODULE_PARM_DESC(irq, "eth16i interrupt request number");
1418#endif
1419
1420module_param_array(mediatype, charp, NULL, 0);
1421MODULE_PARM_DESC(mediatype, "eth16i media type of interface(s) (bnc,tp,dix,auto,eprom)");
1422
1423module_param(debug, int, 0);
1424MODULE_PARM_DESC(debug, "eth16i debug level (0-6)");
1425
58f149fc 1426int __init init_module(void)
1da177e4
LT
1427{
1428 int this_dev, found = 0;
1429 struct net_device *dev;
1430
1431 for (this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1432 dev = alloc_etherdev(sizeof(struct eth16i_local));
1433 if (!dev)
1434 break;
1435
1436 dev->base_addr = io[this_dev];
1437
1438 if(debug != -1)
1439 eth16i_debug = debug;
1440
1441 if(eth16i_debug > 1)
1442 printk(KERN_NOTICE "eth16i(%d): interface type %s\n", this_dev, mediatype[this_dev] ? mediatype[this_dev] : "none" );
1443
1444 dev->if_port = eth16i_parse_mediatype(mediatype[this_dev]);
1445
1446 if(io[this_dev] == 0) {
1447 if(this_dev != 0) /* Only autoprobe 1st one */
1448 break;
1449
1450 printk(KERN_NOTICE "eth16i.c: Presently autoprobing (not recommended) for a single card.\n");
1451 }
1452
1453 if (do_eth16i_probe(dev) == 0) {
b1fc5505
HX
1454 dev_eth16i[found++] = dev;
1455 continue;
1da177e4
LT
1456 }
1457 printk(KERN_WARNING "eth16i.c No Eth16i card found (i/o = 0x%x).\n",
1458 io[this_dev]);
1459 free_netdev(dev);
1460 break;
1461 }
1462 if (found)
1463 return 0;
1464 return -ENXIO;
1465}
6aa20a22 1466
afc8eb46 1467void __exit cleanup_module(void)
1da177e4
LT
1468{
1469 int this_dev;
1470
1471 for(this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1472 struct net_device *dev = dev_eth16i[this_dev];
6aa20a22 1473
4cf1653a 1474 if (netdev_priv(dev)) {
1da177e4
LT
1475 unregister_netdev(dev);
1476 free_irq(dev->irq, dev);
1477 release_region(dev->base_addr, ETH16I_IO_EXTENT);
1478 free_netdev(dev);
1479 }
1480 }
1481}
1482#endif /* MODULE */