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[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / aeroflex / greth.c
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2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
d4c41139
KG		 2/*
3 * Aeroflex Gaisler GRETH 10/100/1G Ethernet MAC.
4 *
0f73f2c5 5 * 2005-2010 (c) Aeroflex Gaisler AB
d4c41139
KG		 6 *
7 * This driver supports GRETH 10/100 and GRETH 10/100/1G Ethernet MACs
8 * available in the GRLIB VHDL IP core library.
9 *
10 * Full documentation of both cores can be found here:
11 * http://www.gaisler.com/products/grlib/grip.pdf
12 *
13 * The Gigabit version supports scatter/gather DMA, any alignment of
14 * buffers and checksum offloading.
15 *
d4c41139
KG		 16 * Contributors: Kristoffer Glembo
17 * Daniel Hellstrom
18 * Marko Isomaki
19 */
20
b7f080cf 21#include <linux/dma-mapping.h>
d4c41139
KG		 22#include <linux/module.h>
23#include <linux/uaccess.h>
a6b7a407 24#include <linux/interrupt.h>
d4c41139
KG		 25#include <linux/netdevice.h>
26#include <linux/etherdevice.h>
27#include <linux/ethtool.h>
28#include <linux/skbuff.h>
29#include <linux/io.h>
30#include <linux/crc32.h>
31#include <linux/mii.h>
32#include <linux/of_device.h>
726bceca 33#include <linux/of_net.h>
d4c41139 34#include <linux/of_platform.h>
5a0e3ad6 35#include <linux/slab.h>
d4c41139
KG		 36#include <asm/cacheflush.h>
37#include <asm/byteorder.h>
38
39#ifdef CONFIG_SPARC
40#include <asm/idprom.h>
41#endif
42
43#include "greth.h"
44
45#define GRETH_DEF_MSG_ENABLE \
46 (NETIF_MSG_DRV | \
47 NETIF_MSG_PROBE | \
48 NETIF_MSG_LINK | \
49 NETIF_MSG_IFDOWN | \
50 NETIF_MSG_IFUP | \
51 NETIF_MSG_RX_ERR | \
52 NETIF_MSG_TX_ERR)
53
54static int greth_debug = -1; /* -1 == use GRETH_DEF_MSG_ENABLE as value */
55module_param(greth_debug, int, 0);
56MODULE_PARM_DESC(greth_debug, "GRETH bitmapped debugging message enable value");
57
58/* Accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
59static int macaddr[6];
60module_param_array(macaddr, int, NULL, 0);
61MODULE_PARM_DESC(macaddr, "GRETH Ethernet MAC address");
62
63static int greth_edcl = 1;
64module_param(greth_edcl, int, 0);
65MODULE_PARM_DESC(greth_edcl, "GRETH EDCL usage indicator. Set to 1 if EDCL is used.");
66
67static int greth_open(struct net_device *dev);
41a655ba 68static netdev_tx_t greth_start_xmit(struct sk_buff *skb,
69 struct net_device *dev);
70static netdev_tx_t greth_start_xmit_gbit(struct sk_buff *skb,
71 struct net_device *dev);
d4c41139
KG		 72static int greth_rx(struct net_device *dev, int limit);
73static int greth_rx_gbit(struct net_device *dev, int limit);
74static void greth_clean_tx(struct net_device *dev);
75static void greth_clean_tx_gbit(struct net_device *dev);
76static irqreturn_t greth_interrupt(int irq, void *dev_id);
77static int greth_close(struct net_device *dev);
78static int greth_set_mac_add(struct net_device *dev, void *p);
79static void greth_set_multicast_list(struct net_device *dev);
80
81#define GRETH_REGLOAD(a) (be32_to_cpu(__raw_readl(&(a))))
82#define GRETH_REGSAVE(a, v) (__raw_writel(cpu_to_be32(v), &(a)))
83#define GRETH_REGORIN(a, v) (GRETH_REGSAVE(a, (GRETH_REGLOAD(a) | (v))))
84#define GRETH_REGANDIN(a, v) (GRETH_REGSAVE(a, (GRETH_REGLOAD(a) & (v))))
85
86#define NEXT_TX(N) (((N) + 1) & GRETH_TXBD_NUM_MASK)
87#define SKIP_TX(N, C) (((N) + C) & GRETH_TXBD_NUM_MASK)
88#define NEXT_RX(N) (((N) + 1) & GRETH_RXBD_NUM_MASK)
89
90static void greth_print_rx_packet(void *addr, int len)
91{
92 print_hex_dump(KERN_DEBUG, "RX: ", DUMP_PREFIX_OFFSET, 16, 1,
93 addr, len, true);
94}
95
96static void greth_print_tx_packet(struct sk_buff *skb)
97{
98 int i;
99 int length;
100
101 if (skb_shinfo(skb)->nr_frags == 0)
102 length = skb->len;
103 else
104 length = skb_headlen(skb);
105
106 print_hex_dump(KERN_DEBUG, "TX: ", DUMP_PREFIX_OFFSET, 16, 1,
107 skb->data, length, true);
108
109 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
110
111 print_hex_dump(KERN_DEBUG, "TX: ", DUMP_PREFIX_OFFSET, 16, 1,
ab7e11d9
IC		 112 skb_frag_address(&skb_shinfo(skb)->frags[i]),
113 skb_shinfo(skb)->frags[i].size, true);
d4c41139
KG		 114 }
115}
116
117static inline void greth_enable_tx(struct greth_private *greth)
118{
119 wmb();
120 GRETH_REGORIN(greth->regs->control, GRETH_TXEN);
121}
122
e1743a16
DH		 123static inline void greth_enable_tx_and_irq(struct greth_private *greth)
124{
125 wmb(); /* BDs must been written to memory before enabling TX */
126 GRETH_REGORIN(greth->regs->control, GRETH_TXEN | GRETH_TXI);
127}
128
d4c41139
KG		 129static inline void greth_disable_tx(struct greth_private *greth)
130{
131 GRETH_REGANDIN(greth->regs->control, ~GRETH_TXEN);
132}
133
134static inline void greth_enable_rx(struct greth_private *greth)
135{
136 wmb();
137 GRETH_REGORIN(greth->regs->control, GRETH_RXEN);
138}
139
140static inline void greth_disable_rx(struct greth_private *greth)
141{
142 GRETH_REGANDIN(greth->regs->control, ~GRETH_RXEN);
143}
144
145static inline void greth_enable_irqs(struct greth_private *greth)
146{
147 GRETH_REGORIN(greth->regs->control, GRETH_RXI | GRETH_TXI);
148}
149
150static inline void greth_disable_irqs(struct greth_private *greth)
151{
152 GRETH_REGANDIN(greth->regs->control, ~(GRETH_RXI|GRETH_TXI));
153}
154
155static inline void greth_write_bd(u32 *bd, u32 val)
156{
157 __raw_writel(cpu_to_be32(val), bd);
158}
159
160static inline u32 greth_read_bd(u32 *bd)
161{
162 return be32_to_cpu(__raw_readl(bd));
163}
164
165static void greth_clean_rings(struct greth_private *greth)
166{
167 int i;
168 struct greth_bd *rx_bdp = greth->rx_bd_base;
169 struct greth_bd *tx_bdp = greth->tx_bd_base;
170
171 if (greth->gbit_mac) {
172
173 /* Free and unmap RX buffers */
174 for (i = 0; i < GRETH_RXBD_NUM; i++, rx_bdp++) {
175 if (greth->rx_skbuff[i] != NULL) {
176 dev_kfree_skb(greth->rx_skbuff[i]);
177 dma_unmap_single(greth->dev,
178 greth_read_bd(&rx_bdp->addr),
179 MAX_FRAME_SIZE+NET_IP_ALIGN,
180 DMA_FROM_DEVICE);
181 }
182 }
183
184 /* TX buffers */
185 while (greth->tx_free < GRETH_TXBD_NUM) {
186
187 struct sk_buff *skb = greth->tx_skbuff[greth->tx_last];
188 int nr_frags = skb_shinfo(skb)->nr_frags;
189 tx_bdp = greth->tx_bd_base + greth->tx_last;
190 greth->tx_last = NEXT_TX(greth->tx_last);
191
192 dma_unmap_single(greth->dev,
193 greth_read_bd(&tx_bdp->addr),
194 skb_headlen(skb),
195 DMA_TO_DEVICE);
196
197 for (i = 0; i < nr_frags; i++) {
198 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
199 tx_bdp = greth->tx_bd_base + greth->tx_last;
200
201 dma_unmap_page(greth->dev,
202 greth_read_bd(&tx_bdp->addr),
9e903e08 203 skb_frag_size(frag),
d4c41139
KG		 204 DMA_TO_DEVICE);
205
206 greth->tx_last = NEXT_TX(greth->tx_last);
207 }
208 greth->tx_free += nr_frags+1;
209 dev_kfree_skb(skb);
210 }
211
212
213 } else { /* 10/100 Mbps MAC */
214
215 for (i = 0; i < GRETH_RXBD_NUM; i++, rx_bdp++) {
216 kfree(greth->rx_bufs[i]);
217 dma_unmap_single(greth->dev,
218 greth_read_bd(&rx_bdp->addr),
219 MAX_FRAME_SIZE,
220 DMA_FROM_DEVICE);
221 }
222 for (i = 0; i < GRETH_TXBD_NUM; i++, tx_bdp++) {
223 kfree(greth->tx_bufs[i]);
224 dma_unmap_single(greth->dev,
225 greth_read_bd(&tx_bdp->addr),
226 MAX_FRAME_SIZE,
227 DMA_TO_DEVICE);
228 }
229 }
230}
231
232static int greth_init_rings(struct greth_private *greth)
233{
234 struct sk_buff *skb;
235 struct greth_bd *rx_bd, *tx_bd;
236 u32 dma_addr;
237 int i;
238
239 rx_bd = greth->rx_bd_base;
240 tx_bd = greth->tx_bd_base;
241
242 /* Initialize descriptor rings and buffers */
243 if (greth->gbit_mac) {
244
245 for (i = 0; i < GRETH_RXBD_NUM; i++) {
246 skb = netdev_alloc_skb(greth->netdev, MAX_FRAME_SIZE+NET_IP_ALIGN);
247 if (skb == NULL) {
248 if (netif_msg_ifup(greth))
249 dev_err(greth->dev, "Error allocating DMA ring.\n");
250 goto cleanup;
251 }
252 skb_reserve(skb, NET_IP_ALIGN);
253 dma_addr = dma_map_single(greth->dev,
254 skb->data,
255 MAX_FRAME_SIZE+NET_IP_ALIGN,
256 DMA_FROM_DEVICE);
257
258 if (dma_mapping_error(greth->dev, dma_addr)) {
259 if (netif_msg_ifup(greth))
260 dev_err(greth->dev, "Could not create initial DMA mapping\n");
261 goto cleanup;
262 }
263 greth->rx_skbuff[i] = skb;
264 greth_write_bd(&rx_bd[i].addr, dma_addr);
265 greth_write_bd(&rx_bd[i].stat, GRETH_BD_EN | GRETH_BD_IE);
266 }
267
268 } else {
269
270 /* 10/100 MAC uses a fixed set of buffers and copy to/from SKBs */
271 for (i = 0; i < GRETH_RXBD_NUM; i++) {
272
273 greth->rx_bufs[i] = kmalloc(MAX_FRAME_SIZE, GFP_KERNEL);
274
275 if (greth->rx_bufs[i] == NULL) {
276 if (netif_msg_ifup(greth))
277 dev_err(greth->dev, "Error allocating DMA ring.\n");
278 goto cleanup;
279 }
280
281 dma_addr = dma_map_single(greth->dev,
282 greth->rx_bufs[i],
283 MAX_FRAME_SIZE,
284 DMA_FROM_DEVICE);
285
286 if (dma_mapping_error(greth->dev, dma_addr)) {
287 if (netif_msg_ifup(greth))
288 dev_err(greth->dev, "Could not create initial DMA mapping\n");
289 goto cleanup;
290 }
291 greth_write_bd(&rx_bd[i].addr, dma_addr);
292 greth_write_bd(&rx_bd[i].stat, GRETH_BD_EN | GRETH_BD_IE);
293 }
294 for (i = 0; i < GRETH_TXBD_NUM; i++) {
295
296 greth->tx_bufs[i] = kmalloc(MAX_FRAME_SIZE, GFP_KERNEL);
297
298 if (greth->tx_bufs[i] == NULL) {
299 if (netif_msg_ifup(greth))
300 dev_err(greth->dev, "Error allocating DMA ring.\n");
301 goto cleanup;
302 }
303
304 dma_addr = dma_map_single(greth->dev,
305 greth->tx_bufs[i],
306 MAX_FRAME_SIZE,
307 DMA_TO_DEVICE);
308
309 if (dma_mapping_error(greth->dev, dma_addr)) {
310 if (netif_msg_ifup(greth))
311 dev_err(greth->dev, "Could not create initial DMA mapping\n");
312 goto cleanup;
313 }
314 greth_write_bd(&tx_bd[i].addr, dma_addr);
315 greth_write_bd(&tx_bd[i].stat, 0);
316 }
317 }
318 greth_write_bd(&rx_bd[GRETH_RXBD_NUM - 1].stat,
319 greth_read_bd(&rx_bd[GRETH_RXBD_NUM - 1].stat) | GRETH_BD_WR);
320
321 /* Initialize pointers. */
322 greth->rx_cur = 0;
323 greth->tx_next = 0;
324 greth->tx_last = 0;
325 greth->tx_free = GRETH_TXBD_NUM;
326
327 /* Initialize descriptor base address */
328 GRETH_REGSAVE(greth->regs->tx_desc_p, greth->tx_bd_base_phys);
329 GRETH_REGSAVE(greth->regs->rx_desc_p, greth->rx_bd_base_phys);
330
331 return 0;
332
333cleanup:
334 greth_clean_rings(greth);
335 return -ENOMEM;
336}
337
338static int greth_open(struct net_device *dev)
339{
340 struct greth_private *greth = netdev_priv(dev);
341 int err;
342
343 err = greth_init_rings(greth);
344 if (err) {
345 if (netif_msg_ifup(greth))
346 dev_err(&dev->dev, "Could not allocate memory for DMA rings\n");
347 return err;
348 }
349
350 err = request_irq(greth->irq, greth_interrupt, 0, "eth", (void *) dev);
351 if (err) {
352 if (netif_msg_ifup(greth))
353 dev_err(&dev->dev, "Could not allocate interrupt %d\n", dev->irq);
354 greth_clean_rings(greth);
355 return err;
356 }
357
358 if (netif_msg_ifup(greth))
359 dev_dbg(&dev->dev, " starting queue\n");
360 netif_start_queue(dev);
361
bbe9e637
DH		 362 GRETH_REGSAVE(greth->regs->status, 0xFF);
363
d4c41139
KG		 364 napi_enable(&greth->napi);
365
366 greth_enable_irqs(greth);
367 greth_enable_tx(greth);
368 greth_enable_rx(greth);
369 return 0;
370
371}
372
373static int greth_close(struct net_device *dev)
374{
375 struct greth_private *greth = netdev_priv(dev);
376
377 napi_disable(&greth->napi);
378
bbe9e637 379 greth_disable_irqs(greth);
d4c41139 380 greth_disable_tx(greth);
bbe9e637 381 greth_disable_rx(greth);
d4c41139
KG		 382
383 netif_stop_queue(dev);
384
385 free_irq(greth->irq, (void *) dev);
386
387 greth_clean_rings(greth);
388
389 return 0;
390}
391
41a655ba 392static netdev_tx_t
393greth_start_xmit(struct sk_buff *skb, struct net_device *dev)
d4c41139
KG		 394{
395 struct greth_private *greth = netdev_priv(dev);
396 struct greth_bd *bdp;
397 int err = NETDEV_TX_OK;
0f73f2c5
DH		 398 u32 status, dma_addr, ctrl;
399 unsigned long flags;
d4c41139 400
0f73f2c5
DH		 401 /* Clean TX Ring */
402 greth_clean_tx(greth->netdev);
d4c41139
KG		 403
404 if (unlikely(greth->tx_free <= 0)) {
0f73f2c5
DH		 405 spin_lock_irqsave(&greth->devlock, flags);/*save from poll/irq*/
406 ctrl = GRETH_REGLOAD(greth->regs->control);
407 /* Enable TX IRQ only if not already in poll() routine */
408 if (ctrl & GRETH_RXI)
409 GRETH_REGSAVE(greth->regs->control, ctrl | GRETH_TXI);
d4c41139 410 netif_stop_queue(dev);
0f73f2c5 411 spin_unlock_irqrestore(&greth->devlock, flags);
d4c41139
KG		 412 return NETDEV_TX_BUSY;
413 }
414
415 if (netif_msg_pktdata(greth))
416 greth_print_tx_packet(skb);
417
418
419 if (unlikely(skb->len > MAX_FRAME_SIZE)) {
420 dev->stats.tx_errors++;
421 goto out;
422 }
423
0f73f2c5 424 bdp = greth->tx_bd_base + greth->tx_next;
d4c41139
KG		 425 dma_addr = greth_read_bd(&bdp->addr);
426
427 memcpy((unsigned char *) phys_to_virt(dma_addr), skb->data, skb->len);
428
429 dma_sync_single_for_device(greth->dev, dma_addr, skb->len, DMA_TO_DEVICE);
430
0f73f2c5 431 status = GRETH_BD_EN | GRETH_BD_IE | (skb->len & GRETH_BD_LEN);
6af29a96 432 greth->tx_bufs_length[greth->tx_next] = skb->len & GRETH_BD_LEN;
d4c41139
KG		 433
434 /* Wrap around descriptor ring */
435 if (greth->tx_next == GRETH_TXBD_NUM_MASK) {
436 status |= GRETH_BD_WR;
437 }
438
439 greth->tx_next = NEXT_TX(greth->tx_next);
440 greth->tx_free--;
441
d4c41139
KG		 442 /* Write descriptor control word and enable transmission */
443 greth_write_bd(&bdp->stat, status);
0f73f2c5 444 spin_lock_irqsave(&greth->devlock, flags); /*save from poll/irq*/
d4c41139 445 greth_enable_tx(greth);
0f73f2c5 446 spin_unlock_irqrestore(&greth->devlock, flags);
d4c41139
KG		 447
448out:
449 dev_kfree_skb(skb);
450 return err;
451}
452
e1743a16
DH		 453static inline u16 greth_num_free_bds(u16 tx_last, u16 tx_next)
454{
455 if (tx_next < tx_last)
456 return (tx_last - tx_next) - 1;
457 else
458 return GRETH_TXBD_NUM - (tx_next - tx_last) - 1;
459}
d4c41139 460
41a655ba 461static netdev_tx_t
462greth_start_xmit_gbit(struct sk_buff *skb, struct net_device *dev)
d4c41139
KG		 463{
464 struct greth_private *greth = netdev_priv(dev);
465 struct greth_bd *bdp;
e1743a16 466 u32 status, dma_addr;
d4c41139 467 int curr_tx, nr_frags, i, err = NETDEV_TX_OK;
0f73f2c5 468 unsigned long flags;
e1743a16 469 u16 tx_last;
d4c41139
KG		 470
471 nr_frags = skb_shinfo(skb)->nr_frags;
e1743a16
DH		 472 tx_last = greth->tx_last;
473 rmb(); /* tx_last is updated by the poll task */
d4c41139 474
e1743a16 475 if (greth_num_free_bds(tx_last, greth->tx_next) < nr_frags + 1) {
d4c41139
KG		 476 netif_stop_queue(dev);
477 err = NETDEV_TX_BUSY;
478 goto out;
479 }
480
481 if (netif_msg_pktdata(greth))
482 greth_print_tx_packet(skb);
483
484 if (unlikely(skb->len > MAX_FRAME_SIZE)) {
485 dev->stats.tx_errors++;
486 goto out;
487 }
488
489 /* Save skb pointer. */
490 greth->tx_skbuff[greth->tx_next] = skb;
491
492 /* Linear buf */
493 if (nr_frags != 0)
494 status = GRETH_TXBD_MORE;
e1743a16
DH		 495 else
496 status = GRETH_BD_IE;
d4c41139 497
d706f00f
DH		 498 if (skb->ip_summed == CHECKSUM_PARTIAL)
499 status |= GRETH_TXBD_CSALL;
d4c41139
KG		 500 status |= skb_headlen(skb) & GRETH_BD_LEN;
501 if (greth->tx_next == GRETH_TXBD_NUM_MASK)
502 status |= GRETH_BD_WR;
503
504
505 bdp = greth->tx_bd_base + greth->tx_next;
506 greth_write_bd(&bdp->stat, status);
507 dma_addr = dma_map_single(greth->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
508
509 if (unlikely(dma_mapping_error(greth->dev, dma_addr)))
510 goto map_error;
511
512 greth_write_bd(&bdp->addr, dma_addr);
513
514 curr_tx = NEXT_TX(greth->tx_next);
515
516 /* Frags */
517 for (i = 0; i < nr_frags; i++) {
518 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
519 greth->tx_skbuff[curr_tx] = NULL;
520 bdp = greth->tx_bd_base + curr_tx;
521
d706f00f
DH		 522 status = GRETH_BD_EN;
523 if (skb->ip_summed == CHECKSUM_PARTIAL)
524 status |= GRETH_TXBD_CSALL;
9e903e08 525 status |= skb_frag_size(frag) & GRETH_BD_LEN;
d4c41139
KG		 526
527 /* Wrap around descriptor ring */
528 if (curr_tx == GRETH_TXBD_NUM_MASK)
529 status |= GRETH_BD_WR;
530
531 /* More fragments left */
532 if (i < nr_frags - 1)
533 status |= GRETH_TXBD_MORE;
0f73f2c5
DH		 534 else
535 status |= GRETH_BD_IE; /* enable IRQ on last fragment */
d4c41139
KG		 536
537 greth_write_bd(&bdp->stat, status);
538
9e903e08 539 dma_addr = skb_frag_dma_map(greth->dev, frag, 0, skb_frag_size(frag),
ab7e11d9 540 DMA_TO_DEVICE);
d4c41139
KG		 541
542 if (unlikely(dma_mapping_error(greth->dev, dma_addr)))
543 goto frag_map_error;
544
545 greth_write_bd(&bdp->addr, dma_addr);
546
547 curr_tx = NEXT_TX(curr_tx);
548 }
549
550 wmb();
551
2a2bc012
DH		 552 /* Enable the descriptor chain by enabling the first descriptor */
553 bdp = greth->tx_bd_base + greth->tx_next;
e1743a16
DH		 554 greth_write_bd(&bdp->stat,
555 greth_read_bd(&bdp->stat) | GRETH_BD_EN);
d4c41139 556
0f73f2c5 557 spin_lock_irqsave(&greth->devlock, flags); /*save from poll/irq*/
e1743a16
DH		 558 greth->tx_next = curr_tx;
559 greth_enable_tx_and_irq(greth);
0f73f2c5 560 spin_unlock_irqrestore(&greth->devlock, flags);
d4c41139
KG		 561
562 return NETDEV_TX_OK;
563
564frag_map_error:
2a2bc012 565 /* Unmap SKB mappings that succeeded and disable descriptor */
d4c41139
KG		 566 for (i = 0; greth->tx_next + i != curr_tx; i++) {
567 bdp = greth->tx_bd_base + greth->tx_next + i;
568 dma_unmap_single(greth->dev,
569 greth_read_bd(&bdp->addr),
570 greth_read_bd(&bdp->stat) & GRETH_BD_LEN,
571 DMA_TO_DEVICE);
2a2bc012 572 greth_write_bd(&bdp->stat, 0);
d4c41139
KG		 573 }
574map_error:
575 if (net_ratelimit())
576 dev_warn(greth->dev, "Could not create TX DMA mapping\n");
577 dev_kfree_skb(skb);
d4c41139
KG		 578out:
579 return err;
580}
581
d4c41139
KG		 582static irqreturn_t greth_interrupt(int irq, void *dev_id)
583{
584 struct net_device *dev = dev_id;
585 struct greth_private *greth;
0f73f2c5 586 u32 status, ctrl;
d4c41139
KG		 587 irqreturn_t retval = IRQ_NONE;
588
589 greth = netdev_priv(dev);
590
591 spin_lock(&greth->devlock);
592
593 /* Get the interrupt events that caused us to be here. */
594 status = GRETH_REGLOAD(greth->regs->status);
595
0f73f2c5
DH		 596 /* Must see if interrupts are enabled also, INT_TX|INT_RX flags may be
597 * set regardless of whether IRQ is enabled or not. Especially
598 * important when shared IRQ.
599 */
600 ctrl = GRETH_REGLOAD(greth->regs->control);
d4c41139 601
0f73f2c5
DH		 602 /* Handle rx and tx interrupts through poll */
603 if (((status & (GRETH_INT_RE | GRETH_INT_RX)) && (ctrl & GRETH_RXI)) ||
604 ((status & (GRETH_INT_TE | GRETH_INT_TX)) && (ctrl & GRETH_TXI))) {
d4c41139
KG		 605 retval = IRQ_HANDLED;
606
607 /* Disable interrupts and schedule poll() */
608 greth_disable_irqs(greth);
609 napi_schedule(&greth->napi);
610 }
611
d4c41139
KG		 612 spin_unlock(&greth->devlock);
613
614 return retval;
615}
616
617static void greth_clean_tx(struct net_device *dev)
618{
619 struct greth_private *greth;
620 struct greth_bd *bdp;
621 u32 stat;
622
623 greth = netdev_priv(dev);
624
625 while (1) {
626 bdp = greth->tx_bd_base + greth->tx_last;
0f73f2c5
DH		 627 GRETH_REGSAVE(greth->regs->status, GRETH_INT_TE | GRETH_INT_TX);
628 mb();
d4c41139
KG		 629 stat = greth_read_bd(&bdp->stat);
630
631 if (unlikely(stat & GRETH_BD_EN))
632 break;
633
634 if (greth->tx_free == GRETH_TXBD_NUM)
635 break;
636
637 /* Check status for errors */
638 if (unlikely(stat & GRETH_TXBD_STATUS)) {
639 dev->stats.tx_errors++;
640 if (stat & GRETH_TXBD_ERR_AL)
641 dev->stats.tx_aborted_errors++;
642 if (stat & GRETH_TXBD_ERR_UE)
643 dev->stats.tx_fifo_errors++;
644 }
645 dev->stats.tx_packets++;
6af29a96 646 dev->stats.tx_bytes += greth->tx_bufs_length[greth->tx_last];
d4c41139
KG		 647 greth->tx_last = NEXT_TX(greth->tx_last);
648 greth->tx_free++;
649 }
650
651 if (greth->tx_free > 0) {
652 netif_wake_queue(dev);
653 }
d4c41139
KG		 654}
655
656static inline void greth_update_tx_stats(struct net_device *dev, u32 stat)
657{
658 /* Check status for errors */
659 if (unlikely(stat & GRETH_TXBD_STATUS)) {
660 dev->stats.tx_errors++;
661 if (stat & GRETH_TXBD_ERR_AL)
662 dev->stats.tx_aborted_errors++;
663 if (stat & GRETH_TXBD_ERR_UE)
664 dev->stats.tx_fifo_errors++;
665 if (stat & GRETH_TXBD_ERR_LC)
666 dev->stats.tx_aborted_errors++;
667 }
668 dev->stats.tx_packets++;
669}
670
671static void greth_clean_tx_gbit(struct net_device *dev)
672{
673 struct greth_private *greth;
674 struct greth_bd *bdp, *bdp_last_frag;
e1743a16 675 struct sk_buff *skb = NULL;
d4c41139
KG		 676 u32 stat;
677 int nr_frags, i;
e1743a16 678 u16 tx_last;
d4c41139
KG		 679
680 greth = netdev_priv(dev);
e1743a16 681 tx_last = greth->tx_last;
d4c41139 682
e1743a16 683 while (tx_last != greth->tx_next) {
d4c41139 684
e1743a16 685 skb = greth->tx_skbuff[tx_last];
d4c41139
KG		 686
687 nr_frags = skb_shinfo(skb)->nr_frags;
688
689 /* We only clean fully completed SKBs */
e1743a16 690 bdp_last_frag = greth->tx_bd_base + SKIP_TX(tx_last, nr_frags);
0f73f2c5
DH		 691
692 GRETH_REGSAVE(greth->regs->status, GRETH_INT_TE | GRETH_INT_TX);
693 mb();
694 stat = greth_read_bd(&bdp_last_frag->stat);
d4c41139
KG		 695
696 if (stat & GRETH_BD_EN)
697 break;
698
e1743a16 699 greth->tx_skbuff[tx_last] = NULL;
d4c41139
KG		 700
701 greth_update_tx_stats(dev, stat);
6af29a96 702 dev->stats.tx_bytes += skb->len;
d4c41139 703
e1743a16 704 bdp = greth->tx_bd_base + tx_last;
d4c41139 705
e1743a16 706 tx_last = NEXT_TX(tx_last);
d4c41139
KG		 707
708 dma_unmap_single(greth->dev,
709 greth_read_bd(&bdp->addr),
710 skb_headlen(skb),
711 DMA_TO_DEVICE);
712
713 for (i = 0; i < nr_frags; i++) {
714 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
e1743a16 715 bdp = greth->tx_bd_base + tx_last;
d4c41139
KG		 716
717 dma_unmap_page(greth->dev,
718 greth_read_bd(&bdp->addr),
9e903e08 719 skb_frag_size(frag),
d4c41139
KG		 720 DMA_TO_DEVICE);
721
e1743a16 722 tx_last = NEXT_TX(tx_last);
d4c41139 723 }
d4c41139
KG		 724 dev_kfree_skb(skb);
725 }
e1743a16
DH		 726 if (skb) { /* skb is set only if the above while loop was entered */
727 wmb();
728 greth->tx_last = tx_last;
d4c41139 729
e1743a16
DH		 730 if (netif_queue_stopped(dev) &&
731 (greth_num_free_bds(tx_last, greth->tx_next) >
732 (MAX_SKB_FRAGS+1)))
733 netif_wake_queue(dev);
734 }
d4c41139
KG		 735}
736
737static int greth_rx(struct net_device *dev, int limit)
738{
739 struct greth_private *greth;
740 struct greth_bd *bdp;
741 struct sk_buff *skb;
742 int pkt_len;
743 int bad, count;
744 u32 status, dma_addr;
0f73f2c5 745 unsigned long flags;
d4c41139
KG		 746
747 greth = netdev_priv(dev);
748
749 for (count = 0; count < limit; ++count) {
750
751 bdp = greth->rx_bd_base + greth->rx_cur;
0f73f2c5
DH		 752 GRETH_REGSAVE(greth->regs->status, GRETH_INT_RE | GRETH_INT_RX);
753 mb();
d4c41139 754 status = greth_read_bd(&bdp->stat);
d4c41139
KG		 755
756 if (unlikely(status & GRETH_BD_EN)) {
757 break;
758 }
759
0f73f2c5
DH		 760 dma_addr = greth_read_bd(&bdp->addr);
761 bad = 0;
762
d4c41139
KG		 763 /* Check status for errors. */
764 if (unlikely(status & GRETH_RXBD_STATUS)) {
765 if (status & GRETH_RXBD_ERR_FT) {
766 dev->stats.rx_length_errors++;
767 bad = 1;
768 }
769 if (status & (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE)) {
770 dev->stats.rx_frame_errors++;
771 bad = 1;
772 }
773 if (status & GRETH_RXBD_ERR_CRC) {
774 dev->stats.rx_crc_errors++;
775 bad = 1;
776 }
777 }
778 if (unlikely(bad)) {
779 dev->stats.rx_errors++;
780
781 } else {
782
783 pkt_len = status & GRETH_BD_LEN;
784
785 skb = netdev_alloc_skb(dev, pkt_len + NET_IP_ALIGN);
786
787 if (unlikely(skb == NULL)) {
788
789 if (net_ratelimit())
790 dev_warn(&dev->dev, "low on memory - " "packet dropped\n");
791
792 dev->stats.rx_dropped++;
793
794 } else {
795 skb_reserve(skb, NET_IP_ALIGN);
d4c41139
KG		 796
797 dma_sync_single_for_cpu(greth->dev,
798 dma_addr,
799 pkt_len,
800 DMA_FROM_DEVICE);
801
802 if (netif_msg_pktdata(greth))
803 greth_print_rx_packet(phys_to_virt(dma_addr), pkt_len);
804
59ae1d12
JB		 805 skb_put_data(skb, phys_to_virt(dma_addr),
806 pkt_len);
d4c41139
KG		 807
808 skb->protocol = eth_type_trans(skb, dev);
6af29a96 809 dev->stats.rx_bytes += pkt_len;
d4c41139
KG		 810 dev->stats.rx_packets++;
811 netif_receive_skb(skb);
812 }
813 }
814
815 status = GRETH_BD_EN | GRETH_BD_IE;
816 if (greth->rx_cur == GRETH_RXBD_NUM_MASK) {
817 status |= GRETH_BD_WR;
818 }
819
820 wmb();
821 greth_write_bd(&bdp->stat, status);
822
823 dma_sync_single_for_device(greth->dev, dma_addr, MAX_FRAME_SIZE, DMA_FROM_DEVICE);
824
0f73f2c5 825 spin_lock_irqsave(&greth->devlock, flags); /* save from XMIT */
d4c41139 826 greth_enable_rx(greth);
0f73f2c5 827 spin_unlock_irqrestore(&greth->devlock, flags);
d4c41139
KG		 828
829 greth->rx_cur = NEXT_RX(greth->rx_cur);
830 }
831
832 return count;
833}
834
835static inline int hw_checksummed(u32 status)
836{
837
838 if (status & GRETH_RXBD_IP_FRAG)
839 return 0;
840
841 if (status & GRETH_RXBD_IP && status & GRETH_RXBD_IP_CSERR)
842 return 0;
843
844 if (status & GRETH_RXBD_UDP && status & GRETH_RXBD_UDP_CSERR)
845 return 0;
846
847 if (status & GRETH_RXBD_TCP && status & GRETH_RXBD_TCP_CSERR)
848 return 0;
849
850 return 1;
851}
852
853static int greth_rx_gbit(struct net_device *dev, int limit)
854{
855 struct greth_private *greth;
856 struct greth_bd *bdp;
857 struct sk_buff *skb, *newskb;
858 int pkt_len;
859 int bad, count = 0;
860 u32 status, dma_addr;
0f73f2c5 861 unsigned long flags;
d4c41139
KG		 862
863 greth = netdev_priv(dev);
864
865 for (count = 0; count < limit; ++count) {
866
867 bdp = greth->rx_bd_base + greth->rx_cur;
868 skb = greth->rx_skbuff[greth->rx_cur];
0f73f2c5
DH		 869 GRETH_REGSAVE(greth->regs->status, GRETH_INT_RE | GRETH_INT_RX);
870 mb();
d4c41139
KG		 871 status = greth_read_bd(&bdp->stat);
872 bad = 0;
873
874 if (status & GRETH_BD_EN)
875 break;
876
877 /* Check status for errors. */
878 if (unlikely(status & GRETH_RXBD_STATUS)) {
879
880 if (status & GRETH_RXBD_ERR_FT) {
881 dev->stats.rx_length_errors++;
882 bad = 1;
883 } else if (status &
884 (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE | GRETH_RXBD_ERR_LE)) {
885 dev->stats.rx_frame_errors++;
886 bad = 1;
887 } else if (status & GRETH_RXBD_ERR_CRC) {
888 dev->stats.rx_crc_errors++;
889 bad = 1;
890 }
891 }
892
b669e7f0
DH		 893 /* Allocate new skb to replace current, not needed if the
894 * current skb can be reused */
895 if (!bad && (newskb=netdev_alloc_skb(dev, MAX_FRAME_SIZE + NET_IP_ALIGN))) {
d4c41139
KG		 896 skb_reserve(newskb, NET_IP_ALIGN);
897
898 dma_addr = dma_map_single(greth->dev,
899 newskb->data,
900 MAX_FRAME_SIZE + NET_IP_ALIGN,
901 DMA_FROM_DEVICE);
902
903 if (!dma_mapping_error(greth->dev, dma_addr)) {
904 /* Process the incoming frame. */
905 pkt_len = status & GRETH_BD_LEN;
906
907 dma_unmap_single(greth->dev,
908 greth_read_bd(&bdp->addr),
909 MAX_FRAME_SIZE + NET_IP_ALIGN,
910 DMA_FROM_DEVICE);
911
912 if (netif_msg_pktdata(greth))
913 greth_print_rx_packet(phys_to_virt(greth_read_bd(&bdp->addr)), pkt_len);
914
915 skb_put(skb, pkt_len);
916
131ae329 917 if (dev->features & NETIF_F_RXCSUM && hw_checksummed(status))
d4c41139
KG		 918 skb->ip_summed = CHECKSUM_UNNECESSARY;
919 else
bc8acf2c 920 skb_checksum_none_assert(skb);
d4c41139 921
d4c41139
KG		 922 skb->protocol = eth_type_trans(skb, dev);
923 dev->stats.rx_packets++;
6af29a96 924 dev->stats.rx_bytes += pkt_len;
d4c41139
KG		 925 netif_receive_skb(skb);
926
927 greth->rx_skbuff[greth->rx_cur] = newskb;
928 greth_write_bd(&bdp->addr, dma_addr);
929 } else {
930 if (net_ratelimit())
931 dev_warn(greth->dev, "Could not create DMA mapping, dropping packet\n");
932 dev_kfree_skb(newskb);
b669e7f0 933 /* reusing current skb, so it is a drop */
d4c41139
KG		 934 dev->stats.rx_dropped++;
935 }
b669e7f0
DH		 936 } else if (bad) {
937 /* Bad Frame transfer, the skb is reused */
938 dev->stats.rx_dropped++;
d4c41139 939 } else {
b669e7f0
DH		 940 /* Failed Allocating a new skb. This is rather stupid
941 * but the current "filled" skb is reused, as if
942 * transfer failure. One could argue that RX descriptor
943 * table handling should be divided into cleaning and
944 * filling as the TX part of the driver
945 */
d4c41139
KG		 946 if (net_ratelimit())
947 dev_warn(greth->dev, "Could not allocate SKB, dropping packet\n");
b669e7f0 948 /* reusing current skb, so it is a drop */
d4c41139
KG		 949 dev->stats.rx_dropped++;
950 }
951
952 status = GRETH_BD_EN | GRETH_BD_IE;
953 if (greth->rx_cur == GRETH_RXBD_NUM_MASK) {
954 status |= GRETH_BD_WR;
955 }
956
957 wmb();
958 greth_write_bd(&bdp->stat, status);
0f73f2c5 959 spin_lock_irqsave(&greth->devlock, flags);
d4c41139 960 greth_enable_rx(greth);
0f73f2c5 961 spin_unlock_irqrestore(&greth->devlock, flags);
d4c41139
KG		 962 greth->rx_cur = NEXT_RX(greth->rx_cur);
963 }
964
965 return count;
966
967}
968
969static int greth_poll(struct napi_struct *napi, int budget)
970{
971 struct greth_private *greth;
972 int work_done = 0;
0f73f2c5
DH		 973 unsigned long flags;
974 u32 mask, ctrl;
d4c41139
KG		 975 greth = container_of(napi, struct greth_private, napi);
976
0f73f2c5 977restart_txrx_poll:
d4c41139 978 if (greth->gbit_mac) {
e1743a16 979 greth_clean_tx_gbit(greth->netdev);
d4c41139
KG		 980 work_done += greth_rx_gbit(greth->netdev, budget - work_done);
981 } else {
e1743a16
DH		 982 if (netif_queue_stopped(greth->netdev))
983 greth_clean_tx(greth->netdev);
d4c41139
KG		 984 work_done += greth_rx(greth->netdev, budget - work_done);
985 }
986
987 if (work_done < budget) {
988
0f73f2c5 989 spin_lock_irqsave(&greth->devlock, flags);
d4c41139 990
0f73f2c5 991 ctrl = GRETH_REGLOAD(greth->regs->control);
e1743a16
DH		 992 if ((greth->gbit_mac && (greth->tx_last != greth->tx_next)) ||
993 (!greth->gbit_mac && netif_queue_stopped(greth->netdev))) {
0f73f2c5
DH		 994 GRETH_REGSAVE(greth->regs->control,
995 ctrl | GRETH_TXI | GRETH_RXI);
996 mask = GRETH_INT_RX | GRETH_INT_RE |
997 GRETH_INT_TX | GRETH_INT_TE;
998 } else {
999 GRETH_REGSAVE(greth->regs->control, ctrl | GRETH_RXI);
1000 mask = GRETH_INT_RX | GRETH_INT_RE;
1001 }
1002
1003 if (GRETH_REGLOAD(greth->regs->status) & mask) {
1004 GRETH_REGSAVE(greth->regs->control, ctrl);
1005 spin_unlock_irqrestore(&greth->devlock, flags);
1006 goto restart_txrx_poll;
1007 } else {
32e19300 1008 napi_complete_done(napi, work_done);
0f73f2c5 1009 spin_unlock_irqrestore(&greth->devlock, flags);
d4c41139
KG		 1010 }
1011 }
1012
d4c41139
KG		 1013 return work_done;
1014}
1015
1016static int greth_set_mac_add(struct net_device *dev, void *p)
1017{
1018 struct sockaddr *addr = p;
1019 struct greth_private *greth;
1020 struct greth_regs *regs;
1021
6e03718c 1022 greth = netdev_priv(dev);
64699336 1023 regs = greth->regs;
d4c41139
KG		 1024
1025 if (!is_valid_ether_addr(addr->sa_data))
504f9b5a 1026 return -EADDRNOTAVAIL;
d4c41139
KG		 1027
1028 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
9b9cfe7c
KG		 1029 GRETH_REGSAVE(regs->esa_msb, dev->dev_addr[0] << 8 | dev->dev_addr[1]);
1030 GRETH_REGSAVE(regs->esa_lsb, dev->dev_addr[2] << 24 | dev->dev_addr[3] << 16 |
1031 dev->dev_addr[4] << 8 | dev->dev_addr[5]);
d4c41139 1032
d4c41139
KG		 1033 return 0;
1034}
1035
1036static u32 greth_hash_get_index(__u8 *addr)
1037{
1038 return (ether_crc(6, addr)) & 0x3F;
1039}
1040
1041static void greth_set_hash_filter(struct net_device *dev)
1042{
22bedad3 1043 struct netdev_hw_addr *ha;
6e03718c 1044 struct greth_private *greth = netdev_priv(dev);
64699336 1045 struct greth_regs *regs = greth->regs;
d4c41139 1046 u32 mc_filter[2];
6e03718c 1047 unsigned int bitnr;
d4c41139
KG		 1048
1049 mc_filter[0] = mc_filter[1] = 0;
1050
22bedad3
JP		 1051 netdev_for_each_mc_addr(ha, dev) {
1052 bitnr = greth_hash_get_index(ha->addr);
d4c41139
KG		 1053 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
1054 }
1055
1056 GRETH_REGSAVE(regs->hash_msb, mc_filter[1]);
1057 GRETH_REGSAVE(regs->hash_lsb, mc_filter[0]);
1058}
1059
1060static void greth_set_multicast_list(struct net_device *dev)
1061{
1062 int cfg;
1063 struct greth_private *greth = netdev_priv(dev);
64699336 1064 struct greth_regs *regs = greth->regs;
d4c41139
KG		 1065
1066 cfg = GRETH_REGLOAD(regs->control);
1067 if (dev->flags & IFF_PROMISC)
1068 cfg |= GRETH_CTRL_PR;
1069 else
1070 cfg &= ~GRETH_CTRL_PR;
1071
1072 if (greth->multicast) {
1073 if (dev->flags & IFF_ALLMULTI) {
1074 GRETH_REGSAVE(regs->hash_msb, -1);
1075 GRETH_REGSAVE(regs->hash_lsb, -1);
1076 cfg |= GRETH_CTRL_MCEN;
1077 GRETH_REGSAVE(regs->control, cfg);
1078 return;
1079 }
1080
6e03718c 1081 if (netdev_mc_empty(dev)) {
d4c41139
KG		 1082 cfg &= ~GRETH_CTRL_MCEN;
1083 GRETH_REGSAVE(regs->control, cfg);
1084 return;
1085 }
1086
1087 /* Setup multicast filter */
1088 greth_set_hash_filter(dev);
1089 cfg |= GRETH_CTRL_MCEN;
1090 }
1091 GRETH_REGSAVE(regs->control, cfg);
1092}
1093
1094static u32 greth_get_msglevel(struct net_device *dev)
1095{
1096 struct greth_private *greth = netdev_priv(dev);
1097 return greth->msg_enable;
1098}
1099
1100static void greth_set_msglevel(struct net_device *dev, u32 value)
1101{
1102 struct greth_private *greth = netdev_priv(dev);
1103 greth->msg_enable = value;
1104}
d4c41139
KG		 1105
1106static int greth_get_regs_len(struct net_device *dev)
1107{
1108 return sizeof(struct greth_regs);
1109}
1110
1111static void greth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1112{
1113 struct greth_private *greth = netdev_priv(dev);
1114
7826d43f
JP		 1115 strlcpy(info->driver, dev_driver_string(greth->dev),
1116 sizeof(info->driver));
1117 strlcpy(info->version, "revision: 1.0", sizeof(info->version));
1118 strlcpy(info->bus_info, greth->dev->bus->name, sizeof(info->bus_info));
1119 strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
d4c41139
KG		 1120}
1121
1122static void greth_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
1123{
1124 int i;
1125 struct greth_private *greth = netdev_priv(dev);
1126 u32 __iomem *greth_regs = (u32 __iomem *) greth->regs;
1127 u32 *buff = p;
1128
1129 for (i = 0; i < sizeof(struct greth_regs) / sizeof(u32); i++)
1130 buff[i] = greth_read_bd(&greth_regs[i]);
1131}
1132
d4c41139
KG		 1133static const struct ethtool_ops greth_ethtool_ops = {
1134 .get_msglevel = greth_get_msglevel,
1135 .set_msglevel = greth_set_msglevel,
d4c41139
KG		 1136 .get_drvinfo = greth_get_drvinfo,
1137 .get_regs_len = greth_get_regs_len,
1138 .get_regs = greth_get_regs,
d4c41139 1139 .get_link = ethtool_op_get_link,
72582fdb
PR		 1140 .get_link_ksettings = phy_ethtool_get_link_ksettings,
1141 .set_link_ksettings = phy_ethtool_set_link_ksettings,
d4c41139
KG		 1142};
1143
1144static struct net_device_ops greth_netdev_ops = {
0f73f2c5
DH		 1145 .ndo_open = greth_open,
1146 .ndo_stop = greth_close,
1147 .ndo_start_xmit = greth_start_xmit,
1148 .ndo_set_mac_address = greth_set_mac_add,
1149 .ndo_validate_addr = eth_validate_addr,
d4c41139
KG		 1150};
1151
1152static inline int wait_for_mdio(struct greth_private *greth)
1153{
1154 unsigned long timeout = jiffies + 4*HZ/100;
1155 while (GRETH_REGLOAD(greth->regs->mdio) & GRETH_MII_BUSY) {
1156 if (time_after(jiffies, timeout))
1157 return 0;
1158 }
1159 return 1;
1160}
1161
1162static int greth_mdio_read(struct mii_bus *bus, int phy, int reg)
1163{
1164 struct greth_private *greth = bus->priv;
1165 int data;
1166
1167 if (!wait_for_mdio(greth))
1168 return -EBUSY;
1169
1170 GRETH_REGSAVE(greth->regs->mdio, ((phy & 0x1F) << 11) | ((reg & 0x1F) << 6) | 2);
1171
1172 if (!wait_for_mdio(greth))
1173 return -EBUSY;
1174
1175 if (!(GRETH_REGLOAD(greth->regs->mdio) & GRETH_MII_NVALID)) {
1176 data = (GRETH_REGLOAD(greth->regs->mdio) >> 16) & 0xFFFF;
1177 return data;
1178
1179 } else {
1180 return -1;
1181 }
1182}
1183
1184static int greth_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)
1185{
1186 struct greth_private *greth = bus->priv;
1187
1188 if (!wait_for_mdio(greth))
1189 return -EBUSY;
1190
1191 GRETH_REGSAVE(greth->regs->mdio,
1192 ((val & 0xFFFF) << 16) | ((phy & 0x1F) << 11) | ((reg & 0x1F) << 6) | 1);
1193
1194 if (!wait_for_mdio(greth))
1195 return -EBUSY;
1196
1197 return 0;
1198}
1199
d4c41139
KG		 1200static void greth_link_change(struct net_device *dev)
1201{
1202 struct greth_private *greth = netdev_priv(dev);
65752dda 1203 struct phy_device *phydev = dev->phydev;
d4c41139 1204 unsigned long flags;
d4c41139 1205 int status_change = 0;
2436af8c 1206 u32 ctrl;
d4c41139
KG		 1207
1208 spin_lock_irqsave(&greth->devlock, flags);
1209
1210 if (phydev->link) {
1211
1212 if ((greth->speed != phydev->speed) || (greth->duplex != phydev->duplex)) {
2436af8c
DH		 1213 ctrl = GRETH_REGLOAD(greth->regs->control) &
1214 ~(GRETH_CTRL_FD | GRETH_CTRL_SP | GRETH_CTRL_GB);
d4c41139
KG		 1215
1216 if (phydev->duplex)
2436af8c 1217 ctrl |= GRETH_CTRL_FD;
d4c41139 1218
2436af8c
DH		 1219 if (phydev->speed == SPEED_100)
1220 ctrl |= GRETH_CTRL_SP;
d4c41139 1221 else if (phydev->speed == SPEED_1000)
2436af8c 1222 ctrl |= GRETH_CTRL_GB;
d4c41139 1223
2436af8c 1224 GRETH_REGSAVE(greth->regs->control, ctrl);
d4c41139
KG		 1225 greth->speed = phydev->speed;
1226 greth->duplex = phydev->duplex;
1227 status_change = 1;
1228 }
1229 }
1230
1231 if (phydev->link != greth->link) {
1232 if (!phydev->link) {
1233 greth->speed = 0;
1234 greth->duplex = -1;
1235 }
1236 greth->link = phydev->link;
1237
1238 status_change = 1;
1239 }
1240
1241 spin_unlock_irqrestore(&greth->devlock, flags);
1242
1243 if (status_change) {
1244 if (phydev->link)
1245 pr_debug("%s: link up (%d/%s)\n",
1246 dev->name, phydev->speed,
1247 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
1248 else
1249 pr_debug("%s: link down\n", dev->name);
1250 }
1251}
1252
1253static int greth_mdio_probe(struct net_device *dev)
1254{
1255 struct greth_private *greth = netdev_priv(dev);
1256 struct phy_device *phy = NULL;
6e03718c 1257 int ret;
d4c41139
KG		 1258
1259 /* Find the first PHY */
6e03718c 1260 phy = phy_find_first(greth->mdio);
1261
d4c41139
KG		 1262 if (!phy) {
1263 if (netif_msg_probe(greth))
1264 dev_err(&dev->dev, "no PHY found\n");
1265 return -ENXIO;
1266 }
1267
6e03718c 1268 ret = phy_connect_direct(dev, phy, &greth_link_change,
f9a8f83b 1269 greth->gbit_mac ? PHY_INTERFACE_MODE_GMII : PHY_INTERFACE_MODE_MII);
6e03718c 1270 if (ret) {
1271 if (netif_msg_ifup(greth))
1272 dev_err(&dev->dev, "could not attach to PHY\n");
1273 return ret;
1274 }
d4c41139
KG		 1275
1276 if (greth->gbit_mac)
58056c1e 1277 phy_set_max_speed(phy, SPEED_1000);
d4c41139 1278 else
58056c1e 1279 phy_set_max_speed(phy, SPEED_100);
d4c41139 1280
3c1bcc86 1281 linkmode_copy(phy->advertising, phy->supported);
d4c41139 1282
d4c41139
KG		 1283 greth->link = 0;
1284 greth->speed = 0;
1285 greth->duplex = -1;
d4c41139
KG		 1286
1287 return 0;
1288}
1289
d4c41139
KG		 1290static int greth_mdio_init(struct greth_private *greth)
1291{
b1ac6b7b 1292 int ret;
d4c41139 1293 unsigned long timeout;
65752dda 1294 struct net_device *ndev = greth->netdev;
d4c41139
KG		 1295
1296 greth->mdio = mdiobus_alloc();
1297 if (!greth->mdio) {
1298 return -ENOMEM;
1299 }
1300
1301 greth->mdio->name = "greth-mdio";
1302 snprintf(greth->mdio->id, MII_BUS_ID_SIZE, "%s-%d", greth->mdio->name, greth->irq);
1303 greth->mdio->read = greth_mdio_read;
1304 greth->mdio->write = greth_mdio_write;
d4c41139
KG		 1305 greth->mdio->priv = greth;
1306
d4c41139
KG		 1307 ret = mdiobus_register(greth->mdio);
1308 if (ret) {
1309 goto error;
1310 }
1311
1312 ret = greth_mdio_probe(greth->netdev);
1313 if (ret) {
1314 if (netif_msg_probe(greth))
1315 dev_err(&greth->netdev->dev, "failed to probe MDIO bus\n");
1316 goto unreg_mdio;
1317 }
1318
65752dda 1319 phy_start(ndev->phydev);
d4c41139
KG		 1320
1321 /* If Ethernet debug link is used make autoneg happen right away */
1322 if (greth->edcl && greth_edcl == 1) {
65752dda 1323 phy_start_aneg(ndev->phydev);
d4c41139 1324 timeout = jiffies + 6*HZ;
65752dda
PR		 1325 while (!phy_aneg_done(ndev->phydev) &&
1326 time_before(jiffies, timeout)) {
d4c41139 1327 }
65752dda 1328 phy_read_status(ndev->phydev);
d4c41139
KG		 1329 greth_link_change(greth->netdev);
1330 }
1331
1332 return 0;
1333
1334unreg_mdio:
1335 mdiobus_unregister(greth->mdio);
1336error:
1337 mdiobus_free(greth->mdio);
1338 return ret;
1339}
1340
1341/* Initialize the GRETH MAC */
c0c0e29d 1342static int greth_of_probe(struct platform_device *ofdev)
d4c41139
KG		 1343{
1344 struct net_device *dev;
1345 struct greth_private *greth;
1346 struct greth_regs *regs;
1347
1348 int i;
1349 int err;
1350 int tmp;
1351 unsigned long timeout;
1352
1353 dev = alloc_etherdev(sizeof(struct greth_private));
1354
1355 if (dev == NULL)
1356 return -ENOMEM;
1357
1358 greth = netdev_priv(dev);
1359 greth->netdev = dev;
1360 greth->dev = &ofdev->dev;
1361
1362 if (greth_debug > 0)
1363 greth->msg_enable = greth_debug;
1364 else
1365 greth->msg_enable = GRETH_DEF_MSG_ENABLE;
1366
1367 spin_lock_init(&greth->devlock);
1368
1369 greth->regs = of_ioremap(&ofdev->resource[0], 0,
1370 resource_size(&ofdev->resource[0]),
1371 "grlib-greth regs");
1372
1373 if (greth->regs == NULL) {
1374 if (netif_msg_probe(greth))
1375 dev_err(greth->dev, "ioremap failure.\n");
1376 err = -EIO;
1377 goto error1;
1378 }
1379
64699336 1380 regs = greth->regs;
19e4875f 1381 greth->irq = ofdev->archdata.irqs[0];
d4c41139
KG		 1382
1383 dev_set_drvdata(greth->dev, dev);
1384 SET_NETDEV_DEV(dev, greth->dev);
1385
1386 if (netif_msg_probe(greth))
72e60278 1387 dev_dbg(greth->dev, "resetting controller.\n");
d4c41139
KG		 1388
1389 /* Reset the controller. */
1390 GRETH_REGSAVE(regs->control, GRETH_RESET);
1391
1392 /* Wait for MAC to reset itself */
1393 timeout = jiffies + HZ/100;
1394 while (GRETH_REGLOAD(regs->control) & GRETH_RESET) {
1395 if (time_after(jiffies, timeout)) {
1396 err = -EIO;
1397 if (netif_msg_probe(greth))
1398 dev_err(greth->dev, "timeout when waiting for reset.\n");
1399 goto error2;
1400 }
1401 }
1402
1403 /* Get default PHY address */
1404 greth->phyaddr = (GRETH_REGLOAD(regs->mdio) >> 11) & 0x1F;
1405
1406 /* Check if we have GBIT capable MAC */
1407 tmp = GRETH_REGLOAD(regs->control);
1408 greth->gbit_mac = (tmp >> 27) & 1;
1409
1410 /* Check for multicast capability */
1411 greth->multicast = (tmp >> 25) & 1;
1412
1413 greth->edcl = (tmp >> 31) & 1;
1414
1415 /* If we have EDCL we disable the EDCL speed-duplex FSM so
1416 * it doesn't interfere with the software */
1417 if (greth->edcl != 0)
1418 GRETH_REGORIN(regs->control, GRETH_CTRL_DISDUPLEX);
1419
1420 /* Check if MAC can handle MDIO interrupts */
1421 greth->mdio_int_en = (tmp >> 26) & 1;
1422
1423 err = greth_mdio_init(greth);
1424 if (err) {
1425 if (netif_msg_probe(greth))
1426 dev_err(greth->dev, "failed to register MDIO bus\n");
1427 goto error2;
1428 }
1429
1430 /* Allocate TX descriptor ring in coherent memory */
750afb08
LC		 1431 greth->tx_bd_base = dma_alloc_coherent(greth->dev, 1024,
1432 &greth->tx_bd_base_phys,
1433 GFP_KERNEL);
d4c41139 1434 if (!greth->tx_bd_base) {
d4c41139
KG		 1435 err = -ENOMEM;
1436 goto error3;
1437 }
1438
d4c41139 1439 /* Allocate RX descriptor ring in coherent memory */
750afb08
LC		 1440 greth->rx_bd_base = dma_alloc_coherent(greth->dev, 1024,
1441 &greth->rx_bd_base_phys,
1442 GFP_KERNEL);
d4c41139 1443 if (!greth->rx_bd_base) {
d4c41139
KG		 1444 err = -ENOMEM;
1445 goto error4;
1446 }
1447
d4c41139
KG		 1448 /* Get MAC address from: module param, OF property or ID prom */
1449 for (i = 0; i < 6; i++) {
1450 if (macaddr[i] != 0)
1451 break;
1452 }
1453 if (i == 6) {
726bceca
TK		 1454 const u8 *addr;
1455
1456 addr = of_get_mac_address(ofdev->dev.of_node);
a51645f7 1457 if (!IS_ERR(addr)) {
d4c41139
KG		 1458 for (i = 0; i < 6; i++)
1459 macaddr[i] = (unsigned int) addr[i];
1460 } else {
1461#ifdef CONFIG_SPARC
1462 for (i = 0; i < 6; i++)
1463 macaddr[i] = (unsigned int) idprom->id_ethaddr[i];
1464#endif
1465 }
1466 }
1467
1468 for (i = 0; i < 6; i++)
1469 dev->dev_addr[i] = macaddr[i];
1470
1471 macaddr[5]++;
1472
1473 if (!is_valid_ether_addr(&dev->dev_addr[0])) {
1474 if (netif_msg_probe(greth))
1475 dev_err(greth->dev, "no valid ethernet address, aborting.\n");
1476 err = -EINVAL;
1477 goto error5;
1478 }
1479
1480 GRETH_REGSAVE(regs->esa_msb, dev->dev_addr[0] << 8 | dev->dev_addr[1]);
1481 GRETH_REGSAVE(regs->esa_lsb, dev->dev_addr[2] << 24 | dev->dev_addr[3] << 16 |
1482 dev->dev_addr[4] << 8 | dev->dev_addr[5]);
1483
1484 /* Clear all pending interrupts except PHY irq */
1485 GRETH_REGSAVE(regs->status, 0xFF);
1486
1487 if (greth->gbit_mac) {
131ae329
MM		 1488 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
1489 NETIF_F_RXCSUM;
1490 dev->features = dev->hw_features | NETIF_F_HIGHDMA;
d4c41139 1491 greth_netdev_ops.ndo_start_xmit = greth_start_xmit_gbit;
d4c41139
KG		 1492 }
1493
1494 if (greth->multicast) {
afc4b13d 1495 greth_netdev_ops.ndo_set_rx_mode = greth_set_multicast_list;
d4c41139
KG		 1496 dev->flags |= IFF_MULTICAST;
1497 } else {
1498 dev->flags &= ~IFF_MULTICAST;
1499 }
1500
1501 dev->netdev_ops = &greth_netdev_ops;
1502 dev->ethtool_ops = &greth_ethtool_ops;
1503
cb5d991a
TK		 1504 err = register_netdev(dev);
1505 if (err) {
d4c41139
KG		 1506 if (netif_msg_probe(greth))
1507 dev_err(greth->dev, "netdevice registration failed.\n");
d4c41139
KG		 1508 goto error5;
1509 }
1510
1511 /* setup NAPI */
d4c41139
KG		 1512 netif_napi_add(dev, &greth->napi, greth_poll, 64);
1513
1514 return 0;
1515
1516error5:
1517 dma_free_coherent(greth->dev, 1024, greth->rx_bd_base, greth->rx_bd_base_phys);
1518error4:
1519 dma_free_coherent(greth->dev, 1024, greth->tx_bd_base, greth->tx_bd_base_phys);
1520error3:
1521 mdiobus_unregister(greth->mdio);
1522error2:
1523 of_iounmap(&ofdev->resource[0], greth->regs, resource_size(&ofdev->resource[0]));
1524error1:
1525 free_netdev(dev);
1526 return err;
1527}
1528
c0c0e29d 1529static int greth_of_remove(struct platform_device *of_dev)
d4c41139 1530{
8513fbd8 1531 struct net_device *ndev = platform_get_drvdata(of_dev);
d4c41139
KG		 1532 struct greth_private *greth = netdev_priv(ndev);
1533
1534 /* Free descriptor areas */
1535 dma_free_coherent(&of_dev->dev, 1024, greth->rx_bd_base, greth->rx_bd_base_phys);
1536
1537 dma_free_coherent(&of_dev->dev, 1024, greth->tx_bd_base, greth->tx_bd_base_phys);
1538
65752dda
PR		 1539 if (ndev->phydev)
1540 phy_stop(ndev->phydev);
d4c41139
KG		 1541 mdiobus_unregister(greth->mdio);
1542
1543 unregister_netdev(ndev);
1544 free_netdev(ndev);
1545
1546 of_iounmap(&of_dev->resource[0], greth->regs, resource_size(&of_dev->resource[0]));
1547
1548 return 0;
1549}
1550
73c70474 1551static const struct of_device_id greth_of_match[] = {
d4c41139
KG		 1552 {
1553 .name = "GAISLER_ETHMAC",
1554 },
ad4650a8
DH		 1555 {
1556 .name = "01_01d",
1557 },
d4c41139
KG		 1558 {},
1559};
1560
1561MODULE_DEVICE_TABLE(of, greth_of_match);
1562
74888760 1563static struct platform_driver greth_of_driver = {
bc284f94
DM		 1564 .driver = {
1565 .name = "grlib-greth",
bc284f94
DM		 1566 .of_match_table = greth_of_match,
1567 },
d4c41139 1568 .probe = greth_of_probe,
c0c0e29d 1569 .remove = greth_of_remove,
d4c41139
KG		 1570};
1571
db62f684 1572module_platform_driver(greth_of_driver);
d4c41139
KG		 1573
1574MODULE_AUTHOR("Aeroflex Gaisler AB.");
1575MODULE_DESCRIPTION("Aeroflex Gaisler Ethernet MAC driver");
1576MODULE_LICENSE("GPL");
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