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[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / altera / altera_tse_main.c
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bbd2190c
VB		 1/* Altera Triple-Speed Ethernet MAC driver
2 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
3 *
4 * Contributors:
5 * Dalon Westergreen
6 * Thomas Chou
7 * Ian Abbott
8 * Yuriy Kozlov
9 * Tobias Klauser
10 * Andriy Smolskyy
11 * Roman Bulgakov
12 * Dmytro Mytarchuk
13 * Matthew Gerlach
14 *
15 * Original driver contributed by SLS.
16 * Major updates contributed by GlobalLogic
17 *
18 * This program is free software; you can redistribute it and/or modify it
19 * under the terms and conditions of the GNU General Public License,
20 * version 2, as published by the Free Software Foundation.
21 *
22 * This program is distributed in the hope it will be useful, but WITHOUT
23 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
24 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
25 * more details.
26 *
27 * You should have received a copy of the GNU General Public License along with
28 * this program. If not, see <http://www.gnu.org/licenses/>.
29 */
30
31#include <linux/atomic.h>
32#include <linux/delay.h>
33#include <linux/etherdevice.h>
34#include <linux/if_vlan.h>
35#include <linux/init.h>
36#include <linux/interrupt.h>
37#include <linux/io.h>
38#include <linux/kernel.h>
39#include <linux/module.h>
40#include <linux/netdevice.h>
41#include <linux/of_device.h>
42#include <linux/of_mdio.h>
43#include <linux/of_net.h>
44#include <linux/of_platform.h>
45#include <linux/phy.h>
46#include <linux/platform_device.h>
47#include <linux/skbuff.h>
48#include <asm/cacheflush.h>
49
50#include "altera_utils.h"
51#include "altera_tse.h"
52#include "altera_sgdma.h"
53#include "altera_msgdma.h"
54
55static atomic_t instance_count = ATOMIC_INIT(~0);
56/* Module parameters */
57static int debug = -1;
58module_param(debug, int, S_IRUGO | S_IWUSR);
59MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
60
61static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
62 NETIF_MSG_LINK | NETIF_MSG_IFUP |
63 NETIF_MSG_IFDOWN);
64
65#define RX_DESCRIPTORS 64
66static int dma_rx_num = RX_DESCRIPTORS;
67module_param(dma_rx_num, int, S_IRUGO | S_IWUSR);
68MODULE_PARM_DESC(dma_rx_num, "Number of descriptors in the RX list");
69
70#define TX_DESCRIPTORS 64
71static int dma_tx_num = TX_DESCRIPTORS;
72module_param(dma_tx_num, int, S_IRUGO | S_IWUSR);
73MODULE_PARM_DESC(dma_tx_num, "Number of descriptors in the TX list");
74
75
76#define POLL_PHY (-1)
77
78/* Make sure DMA buffer size is larger than the max frame size
79 * plus some alignment offset and a VLAN header. If the max frame size is
80 * 1518, a VLAN header would be additional 4 bytes and additional
81 * headroom for alignment is 2 bytes, 2048 is just fine.
82 */
83#define ALTERA_RXDMABUFFER_SIZE 2048
84
85/* Allow network stack to resume queueing packets after we've
86 * finished transmitting at least 1/4 of the packets in the queue.
87 */
88#define TSE_TX_THRESH(x) (x->tx_ring_size / 4)
89
90#define TXQUEUESTOP_THRESHHOLD 2
91
27260530 92static const struct of_device_id altera_tse_ids[];
bbd2190c
VB		 93
94static inline u32 tse_tx_avail(struct altera_tse_private *priv)
95{
96 return priv->tx_cons + priv->tx_ring_size - priv->tx_prod - 1;
97}
98
99/* MDIO specific functions
100 */
101static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
102{
89830580
VB		 103 struct net_device *ndev = bus->priv;
104 struct altera_tse_private *priv = netdev_priv(ndev);
bbd2190c
VB		 105
106 /* set MDIO address */
89830580 107 csrwr32((mii_id & 0x1f), priv->mac_dev,
a923fc73 108 tse_csroffs(mdio_phy1_addr));
bbd2190c
VB		 109
110 /* get the data */
89830580 111 return csrrd32(priv->mac_dev,
a923fc73 112 tse_csroffs(mdio_phy1) + regnum * 4) & 0xffff;
bbd2190c
VB		 113}
114
115static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
116 u16 value)
117{
89830580
VB		 118 struct net_device *ndev = bus->priv;
119 struct altera_tse_private *priv = netdev_priv(ndev);
bbd2190c
VB		 120
121 /* set MDIO address */
89830580 122 csrwr32((mii_id & 0x1f), priv->mac_dev,
a923fc73 123 tse_csroffs(mdio_phy1_addr));
bbd2190c
VB		 124
125 /* write the data */
a923fc73 126 csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy1) + regnum * 4);
bbd2190c
VB		 127 return 0;
128}
129
130static int altera_tse_mdio_create(struct net_device *dev, unsigned int id)
131{
132 struct altera_tse_private *priv = netdev_priv(dev);
133 int ret;
bbd2190c
VB		 134 struct device_node *mdio_node = NULL;
135 struct mii_bus *mdio = NULL;
136 struct device_node *child_node = NULL;
137
138 for_each_child_of_node(priv->device->of_node, child_node) {
139 if (of_device_is_compatible(child_node, "altr,tse-mdio")) {
140 mdio_node = child_node;
141 break;
142 }
143 }
144
145 if (mdio_node) {
146 netdev_dbg(dev, "FOUND MDIO subnode\n");
147 } else {
148 netdev_dbg(dev, "NO MDIO subnode\n");
149 return 0;
150 }
151
152 mdio = mdiobus_alloc();
153 if (mdio == NULL) {
154 netdev_err(dev, "Error allocating MDIO bus\n");
155 return -ENOMEM;
156 }
157
158 mdio->name = ALTERA_TSE_RESOURCE_NAME;
159 mdio->read = &altera_tse_mdio_read;
160 mdio->write = &altera_tse_mdio_write;
161 snprintf(mdio->id, MII_BUS_ID_SIZE, "%s-%u", mdio->name, id);
162
89830580 163 mdio->priv = dev;
bbd2190c
VB		 164 mdio->parent = priv->device;
165
166 ret = of_mdiobus_register(mdio, mdio_node);
167 if (ret != 0) {
168 netdev_err(dev, "Cannot register MDIO bus %s\n",
169 mdio->id);
e7f4dc35 170 goto out_free_mdio;
bbd2190c
VB		 171 }
172
173 if (netif_msg_drv(priv))
174 netdev_info(dev, "MDIO bus %s: created\n", mdio->id);
175
176 priv->mdio = mdio;
177 return 0;
bbd2190c
VB		 178out_free_mdio:
179 mdiobus_free(mdio);
180 mdio = NULL;
181 return ret;
182}
183
184static void altera_tse_mdio_destroy(struct net_device *dev)
185{
186 struct altera_tse_private *priv = netdev_priv(dev);
187
188 if (priv->mdio == NULL)
189 return;
190
191 if (netif_msg_drv(priv))
192 netdev_info(dev, "MDIO bus %s: removed\n",
193 priv->mdio->id);
194
195 mdiobus_unregister(priv->mdio);
bbd2190c
VB		 196 mdiobus_free(priv->mdio);
197 priv->mdio = NULL;
198}
199
200static int tse_init_rx_buffer(struct altera_tse_private *priv,
201 struct tse_buffer *rxbuffer, int len)
202{
203 rxbuffer->skb = netdev_alloc_skb_ip_align(priv->dev, len);
204 if (!rxbuffer->skb)
205 return -ENOMEM;
206
207 rxbuffer->dma_addr = dma_map_single(priv->device, rxbuffer->skb->data,
208 len,
209 DMA_FROM_DEVICE);
210
211 if (dma_mapping_error(priv->device, rxbuffer->dma_addr)) {
212 netdev_err(priv->dev, "%s: DMA mapping error\n", __func__);
213 dev_kfree_skb_any(rxbuffer->skb);
214 return -EINVAL;
215 }
37c0ffaa 216 rxbuffer->dma_addr &= (dma_addr_t)~3;
bbd2190c
VB		 217 rxbuffer->len = len;
218 return 0;
219}
220
221static void tse_free_rx_buffer(struct altera_tse_private *priv,
222 struct tse_buffer *rxbuffer)
223{
224 struct sk_buff *skb = rxbuffer->skb;
225 dma_addr_t dma_addr = rxbuffer->dma_addr;
226
227 if (skb != NULL) {
228 if (dma_addr)
229 dma_unmap_single(priv->device, dma_addr,
230 rxbuffer->len,
231 DMA_FROM_DEVICE);
232 dev_kfree_skb_any(skb);
233 rxbuffer->skb = NULL;
234 rxbuffer->dma_addr = 0;
235 }
236}
237
238/* Unmap and free Tx buffer resources
239 */
240static void tse_free_tx_buffer(struct altera_tse_private *priv,
241 struct tse_buffer *buffer)
242{
243 if (buffer->dma_addr) {
244 if (buffer->mapped_as_page)
245 dma_unmap_page(priv->device, buffer->dma_addr,
246 buffer->len, DMA_TO_DEVICE);
247 else
248 dma_unmap_single(priv->device, buffer->dma_addr,
249 buffer->len, DMA_TO_DEVICE);
250 buffer->dma_addr = 0;
251 }
252 if (buffer->skb) {
253 dev_kfree_skb_any(buffer->skb);
254 buffer->skb = NULL;
255 }
256}
257
258static int alloc_init_skbufs(struct altera_tse_private *priv)
259{
260 unsigned int rx_descs = priv->rx_ring_size;
261 unsigned int tx_descs = priv->tx_ring_size;
262 int ret = -ENOMEM;
263 int i;
264
265 /* Create Rx ring buffer */
266 priv->rx_ring = kcalloc(rx_descs, sizeof(struct tse_buffer),
267 GFP_KERNEL);
268 if (!priv->rx_ring)
269 goto err_rx_ring;
270
271 /* Create Tx ring buffer */
272 priv->tx_ring = kcalloc(tx_descs, sizeof(struct tse_buffer),
273 GFP_KERNEL);
274 if (!priv->tx_ring)
275 goto err_tx_ring;
276
277 priv->tx_cons = 0;
278 priv->tx_prod = 0;
279
280 /* Init Rx ring */
281 for (i = 0; i < rx_descs; i++) {
282 ret = tse_init_rx_buffer(priv, &priv->rx_ring[i],
283 priv->rx_dma_buf_sz);
284 if (ret)
285 goto err_init_rx_buffers;
286 }
287
288 priv->rx_cons = 0;
289 priv->rx_prod = 0;
290
291 return 0;
292err_init_rx_buffers:
293 while (--i >= 0)
294 tse_free_rx_buffer(priv, &priv->rx_ring[i]);
295 kfree(priv->tx_ring);
296err_tx_ring:
297 kfree(priv->rx_ring);
298err_rx_ring:
299 return ret;
300}
301
302static void free_skbufs(struct net_device *dev)
303{
304 struct altera_tse_private *priv = netdev_priv(dev);
305 unsigned int rx_descs = priv->rx_ring_size;
306 unsigned int tx_descs = priv->tx_ring_size;
307 int i;
308
309 /* Release the DMA TX/RX socket buffers */
310 for (i = 0; i < rx_descs; i++)
311 tse_free_rx_buffer(priv, &priv->rx_ring[i]);
312 for (i = 0; i < tx_descs; i++)
313 tse_free_tx_buffer(priv, &priv->tx_ring[i]);
314
315
316 kfree(priv->tx_ring);
317}
318
319/* Reallocate the skb for the reception process
320 */
321static inline void tse_rx_refill(struct altera_tse_private *priv)
322{
323 unsigned int rxsize = priv->rx_ring_size;
324 unsigned int entry;
325 int ret;
326
327 for (; priv->rx_cons - priv->rx_prod > 0;
328 priv->rx_prod++) {
329 entry = priv->rx_prod % rxsize;
330 if (likely(priv->rx_ring[entry].skb == NULL)) {
331 ret = tse_init_rx_buffer(priv, &priv->rx_ring[entry],
332 priv->rx_dma_buf_sz);
333 if (unlikely(ret != 0))
334 break;
335 priv->dmaops->add_rx_desc(priv, &priv->rx_ring[entry]);
336 }
337 }
338}
339
340/* Pull out the VLAN tag and fix up the packet
341 */
342static inline void tse_rx_vlan(struct net_device *dev, struct sk_buff *skb)
343{
344 struct ethhdr *eth_hdr;
345 u16 vid;
346 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
347 !__vlan_get_tag(skb, &vid)) {
348 eth_hdr = (struct ethhdr *)skb->data;
349 memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
350 skb_pull(skb, VLAN_HLEN);
351 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
352 }
353}
354
355/* Receive a packet: retrieve and pass over to upper levels
356 */
357static int tse_rx(struct altera_tse_private *priv, int limit)
358{
359 unsigned int count = 0;
360 unsigned int next_entry;
361 struct sk_buff *skb;
362 unsigned int entry = priv->rx_cons % priv->rx_ring_size;
363 u32 rxstatus;
364 u16 pktlength;
365 u16 pktstatus;
366
93ea3378
AO		 367 /* Check for count < limit first as get_rx_status is changing
368 * the response-fifo so we must process the next packet
369 * after calling get_rx_status if a response is pending.
370 * (reading the last byte of the response pops the value from the fifo.)
371 */
372 while ((count < limit) &&
373 ((rxstatus = priv->dmaops->get_rx_status(priv)) != 0)) {
bbd2190c
VB		 374 pktstatus = rxstatus >> 16;
375 pktlength = rxstatus & 0xffff;
376
377 if ((pktstatus & 0xFF) || (pktlength == 0))
378 netdev_err(priv->dev,
379 "RCV pktstatus %08X pktlength %08X\n",
380 pktstatus, pktlength);
381
48734994
VS		 382 /* DMA trasfer from TSE starts with 2 aditional bytes for
383 * IP payload alignment. Status returned by get_rx_status()
384 * contains DMA transfer length. Packet is 2 bytes shorter.
385 */
386 pktlength -= 2;
387
bbd2190c
VB		 388 count++;
389 next_entry = (++priv->rx_cons) % priv->rx_ring_size;
390
391 skb = priv->rx_ring[entry].skb;
392 if (unlikely(!skb)) {
393 netdev_err(priv->dev,
394 "%s: Inconsistent Rx descriptor chain\n",
395 __func__);
396 priv->dev->stats.rx_dropped++;
397 break;
398 }
399 priv->rx_ring[entry].skb = NULL;
400
401 skb_put(skb, pktlength);
402
bbd2190c
VB		 403 dma_unmap_single(priv->device, priv->rx_ring[entry].dma_addr,
404 priv->rx_ring[entry].len, DMA_FROM_DEVICE);
405
406 if (netif_msg_pktdata(priv)) {
407 netdev_info(priv->dev, "frame received %d bytes\n",
408 pktlength);
409 print_hex_dump(KERN_ERR, "data: ", DUMP_PREFIX_OFFSET,
410 16, 1, skb->data, pktlength, true);
411 }
412
413 tse_rx_vlan(priv->dev, skb);
414
415 skb->protocol = eth_type_trans(skb, priv->dev);
416 skb_checksum_none_assert(skb);
417
418 napi_gro_receive(&priv->napi, skb);
419
420 priv->dev->stats.rx_packets++;
421 priv->dev->stats.rx_bytes += pktlength;
422
423 entry = next_entry;
37c0ffaa
VB		 424
425 tse_rx_refill(priv);
bbd2190c
VB		 426 }
427
bbd2190c
VB		 428 return count;
429}
430
431/* Reclaim resources after transmission completes
432 */
433static int tse_tx_complete(struct altera_tse_private *priv)
434{
435 unsigned int txsize = priv->tx_ring_size;
436 u32 ready;
437 unsigned int entry;
438 struct tse_buffer *tx_buff;
439 int txcomplete = 0;
440
441 spin_lock(&priv->tx_lock);
442
443 ready = priv->dmaops->tx_completions(priv);
444
445 /* Free sent buffers */
446 while (ready && (priv->tx_cons != priv->tx_prod)) {
447 entry = priv->tx_cons % txsize;
448 tx_buff = &priv->tx_ring[entry];
449
450 if (netif_msg_tx_done(priv))
451 netdev_dbg(priv->dev, "%s: curr %d, dirty %d\n",
452 __func__, priv->tx_prod, priv->tx_cons);
453
454 if (likely(tx_buff->skb))
455 priv->dev->stats.tx_packets++;
456
457 tse_free_tx_buffer(priv, tx_buff);
458 priv->tx_cons++;
459
460 txcomplete++;
461 ready--;
462 }
463
464 if (unlikely(netif_queue_stopped(priv->dev) &&
465 tse_tx_avail(priv) > TSE_TX_THRESH(priv))) {
bbd2190c
VB		 466 if (netif_queue_stopped(priv->dev) &&
467 tse_tx_avail(priv) > TSE_TX_THRESH(priv)) {
468 if (netif_msg_tx_done(priv))
469 netdev_dbg(priv->dev, "%s: restart transmit\n",
470 __func__);
471 netif_wake_queue(priv->dev);
472 }
bbd2190c
VB		 473 }
474
475 spin_unlock(&priv->tx_lock);
476 return txcomplete;
477}
478
479/* NAPI polling function
480 */
481static int tse_poll(struct napi_struct *napi, int budget)
482{
483 struct altera_tse_private *priv =
484 container_of(napi, struct altera_tse_private, napi);
485 int rxcomplete = 0;
bbd2190c
VB		 486 unsigned long int flags;
487
8d4ac39d 488 tse_tx_complete(priv);
bbd2190c
VB		 489
490 rxcomplete = tse_rx(priv, budget);
491
8d4ac39d 492 if (rxcomplete < budget) {
bbd2190c 493
4548a697 494 napi_complete(napi);
bbd2190c 495
8d4ac39d
VS		 496 netdev_dbg(priv->dev,
497 "NAPI Complete, did %d packets with budget %d\n",
498 rxcomplete, budget);
bbd2190c 499
8d4ac39d
VS		 500 spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
501 priv->dmaops->enable_rxirq(priv);
502 priv->dmaops->enable_txirq(priv);
503 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
504 }
505 return rxcomplete;
bbd2190c
VB		 506}
507
508/* DMA TX & RX FIFO interrupt routing
509 */
510static irqreturn_t altera_isr(int irq, void *dev_id)
511{
512 struct net_device *dev = dev_id;
513 struct altera_tse_private *priv;
bbd2190c 514
bbd2190c
VB		 515 if (unlikely(!dev)) {
516 pr_err("%s: invalid dev pointer\n", __func__);
517 return IRQ_NONE;
518 }
519 priv = netdev_priv(dev);
520
8d4ac39d
VS		 521 spin_lock(&priv->rxdma_irq_lock);
522 /* reset IRQs */
523 priv->dmaops->clear_rxirq(priv);
524 priv->dmaops->clear_txirq(priv);
525 spin_unlock(&priv->rxdma_irq_lock);
bbd2190c
VB		 526
527 if (likely(napi_schedule_prep(&priv->napi))) {
8d4ac39d 528 spin_lock(&priv->rxdma_irq_lock);
bbd2190c
VB		 529 priv->dmaops->disable_rxirq(priv);
530 priv->dmaops->disable_txirq(priv);
8d4ac39d 531 spin_unlock(&priv->rxdma_irq_lock);
bbd2190c
VB		 532 __napi_schedule(&priv->napi);
533 }
534
bbd2190c
VB		 535
536 return IRQ_HANDLED;
537}
538
539/* Transmit a packet (called by the kernel). Dispatches
540 * either the SGDMA method for transmitting or the
541 * MSGDMA method, assumes no scatter/gather support,
542 * implying an assumption that there's only one
543 * physically contiguous fragment starting at
544 * skb->data, for length of skb_headlen(skb).
545 */
546static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev)
547{
548 struct altera_tse_private *priv = netdev_priv(dev);
549 unsigned int txsize = priv->tx_ring_size;
550 unsigned int entry;
551 struct tse_buffer *buffer = NULL;
552 int nfrags = skb_shinfo(skb)->nr_frags;
553 unsigned int nopaged_len = skb_headlen(skb);
554 enum netdev_tx ret = NETDEV_TX_OK;
555 dma_addr_t dma_addr;
bbd2190c
VB		 556
557 spin_lock_bh(&priv->tx_lock);
558
559 if (unlikely(tse_tx_avail(priv) < nfrags + 1)) {
560 if (!netif_queue_stopped(dev)) {
561 netif_stop_queue(dev);
562 /* This is a hard error, log it. */
563 netdev_err(priv->dev,
564 "%s: Tx list full when queue awake\n",
565 __func__);
566 }
567 ret = NETDEV_TX_BUSY;
568 goto out;
569 }
570
571 /* Map the first skb fragment */
572 entry = priv->tx_prod % txsize;
573 buffer = &priv->tx_ring[entry];
574
575 dma_addr = dma_map_single(priv->device, skb->data, nopaged_len,
576 DMA_TO_DEVICE);
577 if (dma_mapping_error(priv->device, dma_addr)) {
578 netdev_err(priv->dev, "%s: DMA mapping error\n", __func__);
579 ret = NETDEV_TX_OK;
580 goto out;
581 }
582
583 buffer->skb = skb;
584 buffer->dma_addr = dma_addr;
585 buffer->len = nopaged_len;
586
89830580 587 priv->dmaops->tx_buffer(priv, buffer);
bbd2190c
VB		 588
589 skb_tx_timestamp(skb);
590
591 priv->tx_prod++;
592 dev->stats.tx_bytes += skb->len;
593
594 if (unlikely(tse_tx_avail(priv) <= TXQUEUESTOP_THRESHHOLD)) {
595 if (netif_msg_hw(priv))
596 netdev_dbg(priv->dev, "%s: stop transmitted packets\n",
597 __func__);
598 netif_stop_queue(dev);
599 }
600
601out:
602 spin_unlock_bh(&priv->tx_lock);
603
604 return ret;
605}
606
607/* Called every time the controller might need to be made
608 * aware of new link state. The PHY code conveys this
609 * information through variables in the phydev structure, and this
610 * function converts those variables into the appropriate
611 * register values, and can bring down the device if needed.
612 */
613static void altera_tse_adjust_link(struct net_device *dev)
614{
615 struct altera_tse_private *priv = netdev_priv(dev);
941ea69e 616 struct phy_device *phydev = dev->phydev;
bbd2190c
VB		 617 int new_state = 0;
618
619 /* only change config if there is a link */
620 spin_lock(&priv->mac_cfg_lock);
621 if (phydev->link) {
622 /* Read old config */
623 u32 cfg_reg = ioread32(&priv->mac_dev->command_config);
624
625 /* Check duplex */
626 if (phydev->duplex != priv->oldduplex) {
627 new_state = 1;
628 if (!(phydev->duplex))
629 cfg_reg |= MAC_CMDCFG_HD_ENA;
630 else
631 cfg_reg &= ~MAC_CMDCFG_HD_ENA;
632
633 netdev_dbg(priv->dev, "%s: Link duplex = 0x%x\n",
634 dev->name, phydev->duplex);
635
636 priv->oldduplex = phydev->duplex;
637 }
638
639 /* Check speed */
640 if (phydev->speed != priv->oldspeed) {
641 new_state = 1;
642 switch (phydev->speed) {
643 case 1000:
644 cfg_reg |= MAC_CMDCFG_ETH_SPEED;
645 cfg_reg &= ~MAC_CMDCFG_ENA_10;
646 break;
647 case 100:
648 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
649 cfg_reg &= ~MAC_CMDCFG_ENA_10;
650 break;
651 case 10:
652 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
653 cfg_reg |= MAC_CMDCFG_ENA_10;
654 break;
655 default:
656 if (netif_msg_link(priv))
657 netdev_warn(dev, "Speed (%d) is not 10/100/1000!\n",
658 phydev->speed);
659 break;
660 }
661 priv->oldspeed = phydev->speed;
662 }
663 iowrite32(cfg_reg, &priv->mac_dev->command_config);
664
665 if (!priv->oldlink) {
666 new_state = 1;
667 priv->oldlink = 1;
668 }
669 } else if (priv->oldlink) {
670 new_state = 1;
671 priv->oldlink = 0;
672 priv->oldspeed = 0;
673 priv->oldduplex = -1;
674 }
675
676 if (new_state && netif_msg_link(priv))
677 phy_print_status(phydev);
678
679 spin_unlock(&priv->mac_cfg_lock);
680}
681static struct phy_device *connect_local_phy(struct net_device *dev)
682{
683 struct altera_tse_private *priv = netdev_priv(dev);
684 struct phy_device *phydev = NULL;
685 char phy_id_fmt[MII_BUS_ID_SIZE + 3];
bbd2190c
VB		 686
687 if (priv->phy_addr != POLL_PHY) {
688 snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT,
689 priv->mdio->id, priv->phy_addr);
690
691 netdev_dbg(dev, "trying to attach to %s\n", phy_id_fmt);
692
693 phydev = phy_connect(dev, phy_id_fmt, &altera_tse_adjust_link,
694 priv->phy_iface);
695 if (IS_ERR(phydev))
696 netdev_err(dev, "Could not attach to PHY\n");
697
698 } else {
89830580 699 int ret;
bbd2190c
VB		 700 phydev = phy_find_first(priv->mdio);
701 if (phydev == NULL) {
702 netdev_err(dev, "No PHY found\n");
703 return phydev;
704 }
705
706 ret = phy_connect_direct(dev, phydev, &altera_tse_adjust_link,
707 priv->phy_iface);
708 if (ret != 0) {
709 netdev_err(dev, "Could not attach to PHY\n");
710 phydev = NULL;
711 }
712 }
713 return phydev;
714}
715
004fa118
WL		 716static int altera_tse_phy_get_addr_mdio_create(struct net_device *dev)
717{
718 struct altera_tse_private *priv = netdev_priv(dev);
719 struct device_node *np = priv->device->of_node;
720 int ret = 0;
721
722 priv->phy_iface = of_get_phy_mode(np);
723
3354313e
WL		 724 /* Avoid get phy addr and create mdio if no phy is present */
725 if (!priv->phy_iface)
726 return 0;
727
004fa118
WL		 728 /* try to get PHY address from device tree, use PHY autodetection if
729 * no valid address is given
730 */
731
732 if (of_property_read_u32(priv->device->of_node, "phy-addr",
733 &priv->phy_addr)) {
734 priv->phy_addr = POLL_PHY;
735 }
736
737 if (!((priv->phy_addr == POLL_PHY) ||
738 ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) {
739 netdev_err(dev, "invalid phy-addr specified %d\n",
740 priv->phy_addr);
741 return -ENODEV;
742 }
743
744 /* Create/attach to MDIO bus */
745 ret = altera_tse_mdio_create(dev,
746 atomic_add_return(1, &instance_count));
747
748 if (ret)
749 return -ENODEV;
750
751 return 0;
752}
753
bbd2190c
VB		 754/* Initialize driver's PHY state, and attach to the PHY
755 */
756static int init_phy(struct net_device *dev)
757{
758 struct altera_tse_private *priv = netdev_priv(dev);
759 struct phy_device *phydev;
760 struct device_node *phynode;
7cdbc6f7
AO		 761 bool fixed_link = false;
762 int rc = 0;
bbd2190c 763
3354313e
WL		 764 /* Avoid init phy in case of no phy present */
765 if (!priv->phy_iface)
766 return 0;
767
bbd2190c
VB		 768 priv->oldlink = 0;
769 priv->oldspeed = 0;
770 priv->oldduplex = -1;
771
772 phynode = of_parse_phandle(priv->device->of_node, "phy-handle", 0);
773
774 if (!phynode) {
7cdbc6f7
AO		 775 /* check if a fixed-link is defined in device-tree */
776 if (of_phy_is_fixed_link(priv->device->of_node)) {
777 rc = of_phy_register_fixed_link(priv->device->of_node);
778 if (rc < 0) {
779 netdev_err(dev, "cannot register fixed PHY\n");
780 return rc;
781 }
782
783 /* In the case of a fixed PHY, the DT node associated
784 * to the PHY is the Ethernet MAC DT node.
785 */
786 phynode = of_node_get(priv->device->of_node);
787 fixed_link = true;
788
789 netdev_dbg(dev, "fixed-link detected\n");
790 phydev = of_phy_connect(dev, phynode,
791 &altera_tse_adjust_link,
792 0, priv->phy_iface);
793 } else {
794 netdev_dbg(dev, "no phy-handle found\n");
795 if (!priv->mdio) {
796 netdev_err(dev, "No phy-handle nor local mdio specified\n");
797 return -ENODEV;
798 }
799 phydev = connect_local_phy(dev);
bbd2190c 800 }
bbd2190c
VB		 801 } else {
802 netdev_dbg(dev, "phy-handle found\n");
803 phydev = of_phy_connect(dev, phynode,
804 &altera_tse_adjust_link, 0, priv->phy_iface);
805 }
5d97222a 806 of_node_put(phynode);
bbd2190c
VB		 807
808 if (!phydev) {
809 netdev_err(dev, "Could not find the PHY\n");
5a89394a
JH		 810 if (fixed_link)
811 of_phy_deregister_fixed_link(priv->device->of_node);
bbd2190c
VB		 812 return -ENODEV;
813 }
814
815 /* Stop Advertising 1000BASE Capability if interface is not GMII
816 * Note: Checkpatch throws CHECKs for the camel case defines below,
817 * it's ok to ignore.
818 */
819 if ((priv->phy_iface == PHY_INTERFACE_MODE_MII) ||
820 (priv->phy_iface == PHY_INTERFACE_MODE_RMII))
821 phydev->advertising &= ~(SUPPORTED_1000baseT_Half |
822 SUPPORTED_1000baseT_Full);
823
824 /* Broken HW is sometimes missing the pull-up resistor on the
825 * MDIO line, which results in reads to non-existent devices returning
826 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
7cdbc6f7 827 * device as well. If a fixed-link is used the phy_id is always 0.
bbd2190c
VB		 828 * Note: phydev->phy_id is the result of reading the UID PHY registers.
829 */
7cdbc6f7 830 if ((phydev->phy_id == 0) && !fixed_link) {
bbd2190c
VB		 831 netdev_err(dev, "Bad PHY UID 0x%08x\n", phydev->phy_id);
832 phy_disconnect(phydev);
833 return -ENODEV;
834 }
835
836 netdev_dbg(dev, "attached to PHY %d UID 0x%08x Link = %d\n",
e5a03bfd 837 phydev->mdio.addr, phydev->phy_id, phydev->link);
bbd2190c 838
bbd2190c
VB		 839 return 0;
840}
841
842static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr)
843{
bbd2190c
VB		 844 u32 msb;
845 u32 lsb;
846
847 msb = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
848 lsb = ((addr[5] << 8) | addr[4]) & 0xffff;
849
850 /* Set primary MAC address */
89830580
VB		 851 csrwr32(msb, priv->mac_dev, tse_csroffs(mac_addr_0));
852 csrwr32(lsb, priv->mac_dev, tse_csroffs(mac_addr_1));
bbd2190c
VB		 853}
854
855/* MAC software reset.
856 * When reset is triggered, the MAC function completes the current
857 * transmission or reception, and subsequently disables the transmit and
858 * receive logic, flushes the receive FIFO buffer, and resets the statistics
859 * counters.
860 */
861static int reset_mac(struct altera_tse_private *priv)
862{
bbd2190c
VB		 863 int counter;
864 u32 dat;
865
89830580 866 dat = csrrd32(priv->mac_dev, tse_csroffs(command_config));
bbd2190c
VB		 867 dat &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA);
868 dat |= MAC_CMDCFG_SW_RESET | MAC_CMDCFG_CNT_RESET;
89830580 869 csrwr32(dat, priv->mac_dev, tse_csroffs(command_config));
bbd2190c
VB		 870
871 counter = 0;
872 while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) {
89830580
VB		 873 if (tse_bit_is_clear(priv->mac_dev, tse_csroffs(command_config),
874 MAC_CMDCFG_SW_RESET))
bbd2190c
VB		 875 break;
876 udelay(1);
877 }
878
879 if (counter >= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) {
89830580 880 dat = csrrd32(priv->mac_dev, tse_csroffs(command_config));
bbd2190c 881 dat &= ~MAC_CMDCFG_SW_RESET;
89830580 882 csrwr32(dat, priv->mac_dev, tse_csroffs(command_config));
bbd2190c
VB		 883 return -1;
884 }
885 return 0;
886}
887
888/* Initialize MAC core registers
889*/
890static int init_mac(struct altera_tse_private *priv)
891{
bbd2190c
VB		 892 unsigned int cmd = 0;
893 u32 frm_length;
894
895 /* Setup Rx FIFO */
89830580
VB		 896 csrwr32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY,
897 priv->mac_dev, tse_csroffs(rx_section_empty));
898
899 csrwr32(ALTERA_TSE_RX_SECTION_FULL, priv->mac_dev,
900 tse_csroffs(rx_section_full));
901
902 csrwr32(ALTERA_TSE_RX_ALMOST_EMPTY, priv->mac_dev,
903 tse_csroffs(rx_almost_empty));
904
905 csrwr32(ALTERA_TSE_RX_ALMOST_FULL, priv->mac_dev,
906 tse_csroffs(rx_almost_full));
bbd2190c
VB		 907
908 /* Setup Tx FIFO */
89830580
VB		 909 csrwr32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY,
910 priv->mac_dev, tse_csroffs(tx_section_empty));
911
912 csrwr32(ALTERA_TSE_TX_SECTION_FULL, priv->mac_dev,
913 tse_csroffs(tx_section_full));
914
915 csrwr32(ALTERA_TSE_TX_ALMOST_EMPTY, priv->mac_dev,
916 tse_csroffs(tx_almost_empty));
917
918 csrwr32(ALTERA_TSE_TX_ALMOST_FULL, priv->mac_dev,
919 tse_csroffs(tx_almost_full));
bbd2190c
VB		 920
921 /* MAC Address Configuration */
922 tse_update_mac_addr(priv, priv->dev->dev_addr);
923
924 /* MAC Function Configuration */
925 frm_length = ETH_HLEN + priv->dev->mtu + ETH_FCS_LEN;
89830580
VB		 926 csrwr32(frm_length, priv->mac_dev, tse_csroffs(frm_length));
927
928 csrwr32(ALTERA_TSE_TX_IPG_LENGTH, priv->mac_dev,
929 tse_csroffs(tx_ipg_length));
bbd2190c
VB		 930
931 /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit
932 * start address
933 */
89830580
VB		 934 tse_set_bit(priv->mac_dev, tse_csroffs(rx_cmd_stat),
935 ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16);
936
937 tse_clear_bit(priv->mac_dev, tse_csroffs(tx_cmd_stat),
938 ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 |
939 ALTERA_TSE_TX_CMD_STAT_OMIT_CRC);
bbd2190c
VB		 940
941 /* Set the MAC options */
89830580 942 cmd = csrrd32(priv->mac_dev, tse_csroffs(command_config));
37c0ffaa 943 cmd &= ~MAC_CMDCFG_PAD_EN; /* No padding Removal on Receive */
bbd2190c
VB		 944 cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */
945 cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames
946 * with CRC errors
947 */
948 cmd |= MAC_CMDCFG_CNTL_FRM_ENA;
949 cmd &= ~MAC_CMDCFG_TX_ENA;
950 cmd &= ~MAC_CMDCFG_RX_ENA;
37c0ffaa
VB		 951
952 /* Default speed and duplex setting, full/100 */
953 cmd &= ~MAC_CMDCFG_HD_ENA;
954 cmd &= ~MAC_CMDCFG_ETH_SPEED;
955 cmd &= ~MAC_CMDCFG_ENA_10;
956
89830580 957 csrwr32(cmd, priv->mac_dev, tse_csroffs(command_config));
bbd2190c 958
89830580
VB		 959 csrwr32(ALTERA_TSE_PAUSE_QUANTA, priv->mac_dev,
960 tse_csroffs(pause_quanta));
5aec4ee3 961
bbd2190c
VB		 962 if (netif_msg_hw(priv))
963 dev_dbg(priv->device,
964 "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd);
965
966 return 0;
967}
968
969/* Start/stop MAC transmission logic
970 */
971static void tse_set_mac(struct altera_tse_private *priv, bool enable)
972{
89830580 973 u32 value = csrrd32(priv->mac_dev, tse_csroffs(command_config));
bbd2190c
VB		 974
975 if (enable)
976 value |= MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA;
977 else
978 value &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA);
979
89830580 980 csrwr32(value, priv->mac_dev, tse_csroffs(command_config));
bbd2190c
VB		 981}
982
983/* Change the MTU
984 */
985static int tse_change_mtu(struct net_device *dev, int new_mtu)
986{
987 struct altera_tse_private *priv = netdev_priv(dev);
988 unsigned int max_mtu = priv->max_mtu;
989 unsigned int min_mtu = ETH_ZLEN + ETH_FCS_LEN;
990
991 if (netif_running(dev)) {
992 netdev_err(dev, "must be stopped to change its MTU\n");
993 return -EBUSY;
994 }
995
996 if ((new_mtu < min_mtu) || (new_mtu > max_mtu)) {
997 netdev_err(dev, "invalid MTU, max MTU is: %u\n", max_mtu);
998 return -EINVAL;
999 }
1000
1001 dev->mtu = new_mtu;
1002 netdev_update_features(dev);
1003
1004 return 0;
1005}
1006
1007static void altera_tse_set_mcfilter(struct net_device *dev)
1008{
1009 struct altera_tse_private *priv = netdev_priv(dev);
bbd2190c
VB		 1010 int i;
1011 struct netdev_hw_addr *ha;
1012
1013 /* clear the hash filter */
1014 for (i = 0; i < 64; i++)
89830580 1015 csrwr32(0, priv->mac_dev, tse_csroffs(hash_table) + i * 4);
bbd2190c
VB		 1016
1017 netdev_for_each_mc_addr(ha, dev) {
1018 unsigned int hash = 0;
1019 int mac_octet;
1020
1021 for (mac_octet = 5; mac_octet >= 0; mac_octet--) {
1022 unsigned char xor_bit = 0;
1023 unsigned char octet = ha->addr[mac_octet];
1024 unsigned int bitshift;
1025
1026 for (bitshift = 0; bitshift < 8; bitshift++)
1027 xor_bit ^= ((octet >> bitshift) & 0x01);
1028
1029 hash = (hash << 1) | xor_bit;
1030 }
89830580 1031 csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + hash * 4);
bbd2190c
VB		 1032 }
1033}
1034
1035
1036static void altera_tse_set_mcfilterall(struct net_device *dev)
1037{
1038 struct altera_tse_private *priv = netdev_priv(dev);
bbd2190c
VB		 1039 int i;
1040
1041 /* set the hash filter */
1042 for (i = 0; i < 64; i++)
89830580 1043 csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + i * 4);
bbd2190c
VB		 1044}
1045
1046/* Set or clear the multicast filter for this adaptor
1047 */
1048static void tse_set_rx_mode_hashfilter(struct net_device *dev)
1049{
1050 struct altera_tse_private *priv = netdev_priv(dev);
bbd2190c
VB		 1051
1052 spin_lock(&priv->mac_cfg_lock);
1053
1054 if (dev->flags & IFF_PROMISC)
89830580
VB		 1055 tse_set_bit(priv->mac_dev, tse_csroffs(command_config),
1056 MAC_CMDCFG_PROMIS_EN);
bbd2190c
VB		 1057
1058 if (dev->flags & IFF_ALLMULTI)
1059 altera_tse_set_mcfilterall(dev);
1060 else
1061 altera_tse_set_mcfilter(dev);
1062
1063 spin_unlock(&priv->mac_cfg_lock);
1064}
1065
1066/* Set or clear the multicast filter for this adaptor
1067 */
1068static void tse_set_rx_mode(struct net_device *dev)
1069{
1070 struct altera_tse_private *priv = netdev_priv(dev);
bbd2190c
VB		 1071
1072 spin_lock(&priv->mac_cfg_lock);
1073
1074 if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) ||
1075 !netdev_mc_empty(dev) || !netdev_uc_empty(dev))
89830580
VB		 1076 tse_set_bit(priv->mac_dev, tse_csroffs(command_config),
1077 MAC_CMDCFG_PROMIS_EN);
bbd2190c 1078 else
89830580
VB		 1079 tse_clear_bit(priv->mac_dev, tse_csroffs(command_config),
1080 MAC_CMDCFG_PROMIS_EN);
bbd2190c
VB		 1081
1082 spin_unlock(&priv->mac_cfg_lock);
1083}
1084
1085/* Open and initialize the interface
1086 */
1087static int tse_open(struct net_device *dev)
1088{
1089 struct altera_tse_private *priv = netdev_priv(dev);
1090 int ret = 0;
1091 int i;
1092 unsigned long int flags;
1093
1094 /* Reset and configure TSE MAC and probe associated PHY */
1095 ret = priv->dmaops->init_dma(priv);
1096 if (ret != 0) {
1097 netdev_err(dev, "Cannot initialize DMA\n");
1098 goto phy_error;
1099 }
1100
1101 if (netif_msg_ifup(priv))
1102 netdev_warn(dev, "device MAC address %pM\n",
1103 dev->dev_addr);
1104
1105 if ((priv->revision < 0xd00) || (priv->revision > 0xe00))
1106 netdev_warn(dev, "TSE revision %x\n", priv->revision);
1107
1108 spin_lock(&priv->mac_cfg_lock);
1109 ret = reset_mac(priv);
ea8860eb
VB		 1110 /* Note that reset_mac will fail if the clocks are gated by the PHY
1111 * due to the PHY being put into isolation or power down mode.
1112 * This is not an error if reset fails due to no clock.
1113 */
bbd2190c 1114 if (ret)
ea8860eb 1115 netdev_dbg(dev, "Cannot reset MAC core (error: %d)\n", ret);
bbd2190c
VB		 1116
1117 ret = init_mac(priv);
1118 spin_unlock(&priv->mac_cfg_lock);
1119 if (ret) {
1120 netdev_err(dev, "Cannot init MAC core (error: %d)\n", ret);
1121 goto alloc_skbuf_error;
1122 }
1123
1124 priv->dmaops->reset_dma(priv);
1125
1126 /* Create and initialize the TX/RX descriptors chains. */
1127 priv->rx_ring_size = dma_rx_num;
1128 priv->tx_ring_size = dma_tx_num;
1129 ret = alloc_init_skbufs(priv);
1130 if (ret) {
1131 netdev_err(dev, "DMA descriptors initialization failed\n");
1132 goto alloc_skbuf_error;
1133 }
1134
1135
1136 /* Register RX interrupt */
1137 ret = request_irq(priv->rx_irq, altera_isr, IRQF_SHARED,
1138 dev->name, dev);
1139 if (ret) {
1140 netdev_err(dev, "Unable to register RX interrupt %d\n",
1141 priv->rx_irq);
1142 goto init_error;
1143 }
1144
1145 /* Register TX interrupt */
1146 ret = request_irq(priv->tx_irq, altera_isr, IRQF_SHARED,
1147 dev->name, dev);
1148 if (ret) {
1149 netdev_err(dev, "Unable to register TX interrupt %d\n",
1150 priv->tx_irq);
1151 goto tx_request_irq_error;
1152 }
1153
1154 /* Enable DMA interrupts */
1155 spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
1156 priv->dmaops->enable_rxirq(priv);
1157 priv->dmaops->enable_txirq(priv);
1158
1159 /* Setup RX descriptor chain */
1160 for (i = 0; i < priv->rx_ring_size; i++)
1161 priv->dmaops->add_rx_desc(priv, &priv->rx_ring[i]);
1162
1163 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1164
941ea69e
PR		 1165 if (dev->phydev)
1166 phy_start(dev->phydev);
bbd2190c
VB		 1167
1168 napi_enable(&priv->napi);
1169 netif_start_queue(dev);
1170
37c0ffaa
VB		 1171 priv->dmaops->start_rxdma(priv);
1172
1173 /* Start MAC Rx/Tx */
1174 spin_lock(&priv->mac_cfg_lock);
1175 tse_set_mac(priv, true);
1176 spin_unlock(&priv->mac_cfg_lock);
1177
bbd2190c
VB		 1178 return 0;
1179
1180tx_request_irq_error:
1181 free_irq(priv->rx_irq, dev);
1182init_error:
1183 free_skbufs(dev);
1184alloc_skbuf_error:
bbd2190c
VB		 1185phy_error:
1186 return ret;
1187}
1188
1189/* Stop TSE MAC interface and put the device in an inactive state
1190 */
1191static int tse_shutdown(struct net_device *dev)
1192{
1193 struct altera_tse_private *priv = netdev_priv(dev);
1194 int ret;
1195 unsigned long int flags;
1196
c484994e 1197 /* Stop the PHY */
941ea69e
PR		 1198 if (dev->phydev)
1199 phy_stop(dev->phydev);
bbd2190c
VB		 1200
1201 netif_stop_queue(dev);
1202 napi_disable(&priv->napi);
1203
1204 /* Disable DMA interrupts */
1205 spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
1206 priv->dmaops->disable_rxirq(priv);
1207 priv->dmaops->disable_txirq(priv);
1208 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1209
1210 /* Free the IRQ lines */
1211 free_irq(priv->rx_irq, dev);
1212 free_irq(priv->tx_irq, dev);
1213
1214 /* disable and reset the MAC, empties fifo */
1215 spin_lock(&priv->mac_cfg_lock);
1216 spin_lock(&priv->tx_lock);
1217
1218 ret = reset_mac(priv);
ea8860eb
VB		 1219 /* Note that reset_mac will fail if the clocks are gated by the PHY
1220 * due to the PHY being put into isolation or power down mode.
1221 * This is not an error if reset fails due to no clock.
1222 */
bbd2190c 1223 if (ret)
ea8860eb 1224 netdev_dbg(dev, "Cannot reset MAC core (error: %d)\n", ret);
bbd2190c
VB		 1225 priv->dmaops->reset_dma(priv);
1226 free_skbufs(dev);
1227
1228 spin_unlock(&priv->tx_lock);
1229 spin_unlock(&priv->mac_cfg_lock);
1230
1231 priv->dmaops->uninit_dma(priv);
1232
1233 return 0;
1234}
1235
1236static struct net_device_ops altera_tse_netdev_ops = {
1237 .ndo_open = tse_open,
1238 .ndo_stop = tse_shutdown,
1239 .ndo_start_xmit = tse_start_xmit,
1240 .ndo_set_mac_address = eth_mac_addr,
1241 .ndo_set_rx_mode = tse_set_rx_mode,
1242 .ndo_change_mtu = tse_change_mtu,
1243 .ndo_validate_addr = eth_validate_addr,
1244};
1245
bbd2190c
VB		 1246static int request_and_map(struct platform_device *pdev, const char *name,
1247 struct resource **res, void __iomem **ptr)
1248{
1249 struct resource *region;
1250 struct device *device = &pdev->dev;
1251
1252 *res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
1253 if (*res == NULL) {
1254 dev_err(device, "resource %s not defined\n", name);
1255 return -ENODEV;
1256 }
1257
1258 region = devm_request_mem_region(device, (*res)->start,
1259 resource_size(*res), dev_name(device));
1260 if (region == NULL) {
1261 dev_err(device, "unable to request %s\n", name);
1262 return -EBUSY;
1263 }
1264
1265 *ptr = devm_ioremap_nocache(device, region->start,
1266 resource_size(region));
1267 if (*ptr == NULL) {
1268 dev_err(device, "ioremap_nocache of %s failed!", name);
1269 return -ENOMEM;
1270 }
1271
1272 return 0;
1273}
1274
1275/* Probe Altera TSE MAC device
1276 */
1277static int altera_tse_probe(struct platform_device *pdev)
1278{
1279 struct net_device *ndev;
1280 int ret = -ENODEV;
1281 struct resource *control_port;
1282 struct resource *dma_res;
1283 struct altera_tse_private *priv;
1284 const unsigned char *macaddr;
bbd2190c
VB		 1285 void __iomem *descmap;
1286 const struct of_device_id *of_id = NULL;
1287
1288 ndev = alloc_etherdev(sizeof(struct altera_tse_private));
1289 if (!ndev) {
1290 dev_err(&pdev->dev, "Could not allocate network device\n");
1291 return -ENODEV;
1292 }
1293
1294 SET_NETDEV_DEV(ndev, &pdev->dev);
1295
1296 priv = netdev_priv(ndev);
1297 priv->device = &pdev->dev;
1298 priv->dev = ndev;
1299 priv->msg_enable = netif_msg_init(debug, default_msg_level);
1300
1301 of_id = of_match_device(altera_tse_ids, &pdev->dev);
1302
1303 if (of_id)
1304 priv->dmaops = (struct altera_dmaops *)of_id->data;
1305
1306
1307 if (priv->dmaops &&
1308 priv->dmaops->altera_dtype == ALTERA_DTYPE_SGDMA) {
1309 /* Get the mapped address to the SGDMA descriptor memory */
1310 ret = request_and_map(pdev, "s1", &dma_res, &descmap);
1311 if (ret)
a7642009 1312 goto err_free_netdev;
bbd2190c
VB		 1313
1314 /* Start of that memory is for transmit descriptors */
1315 priv->tx_dma_desc = descmap;
1316
1317 /* First half is for tx descriptors, other half for tx */
1318 priv->txdescmem = resource_size(dma_res)/2;
1319
1320 priv->txdescmem_busaddr = (dma_addr_t)dma_res->start;
1321
1322 priv->rx_dma_desc = (void __iomem *)((uintptr_t)(descmap +
1323 priv->txdescmem));
1324 priv->rxdescmem = resource_size(dma_res)/2;
1325 priv->rxdescmem_busaddr = dma_res->start;
1326 priv->rxdescmem_busaddr += priv->txdescmem;
1327
1328 if (upper_32_bits(priv->rxdescmem_busaddr)) {
1329 dev_dbg(priv->device,
1330 "SGDMA bus addresses greater than 32-bits\n");
a7642009 1331 goto err_free_netdev;
bbd2190c
VB		 1332 }
1333 if (upper_32_bits(priv->txdescmem_busaddr)) {
1334 dev_dbg(priv->device,
1335 "SGDMA bus addresses greater than 32-bits\n");
a7642009 1336 goto err_free_netdev;
bbd2190c
VB		 1337 }
1338 } else if (priv->dmaops &&
1339 priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) {
1340 ret = request_and_map(pdev, "rx_resp", &dma_res,
1341 &priv->rx_dma_resp);
1342 if (ret)
a7642009 1343 goto err_free_netdev;
bbd2190c
VB		 1344
1345 ret = request_and_map(pdev, "tx_desc", &dma_res,
1346 &priv->tx_dma_desc);
1347 if (ret)
a7642009 1348 goto err_free_netdev;
bbd2190c
VB		 1349
1350 priv->txdescmem = resource_size(dma_res);
1351 priv->txdescmem_busaddr = dma_res->start;
1352
1353 ret = request_and_map(pdev, "rx_desc", &dma_res,
1354 &priv->rx_dma_desc);
1355 if (ret)
a7642009 1356 goto err_free_netdev;
bbd2190c
VB		 1357
1358 priv->rxdescmem = resource_size(dma_res);
1359 priv->rxdescmem_busaddr = dma_res->start;
1360
1361 } else {
a7642009 1362 goto err_free_netdev;
bbd2190c
VB		 1363 }
1364
1365 if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask)))
1366 dma_set_coherent_mask(priv->device,
1367 DMA_BIT_MASK(priv->dmaops->dmamask));
1368 else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32)))
1369 dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32));
1370 else
a7642009 1371 goto err_free_netdev;
bbd2190c
VB		 1372
1373 /* MAC address space */
1374 ret = request_and_map(pdev, "control_port", &control_port,
1375 (void __iomem **)&priv->mac_dev);
1376 if (ret)
a7642009 1377 goto err_free_netdev;
bbd2190c
VB		 1378
1379 /* xSGDMA Rx Dispatcher address space */
1380 ret = request_and_map(pdev, "rx_csr", &dma_res,
1381 &priv->rx_dma_csr);
1382 if (ret)
a7642009 1383 goto err_free_netdev;
bbd2190c
VB		 1384
1385
1386 /* xSGDMA Tx Dispatcher address space */
1387 ret = request_and_map(pdev, "tx_csr", &dma_res,
1388 &priv->tx_dma_csr);
1389 if (ret)
a7642009 1390 goto err_free_netdev;
bbd2190c
VB		 1391
1392
1393 /* Rx IRQ */
1394 priv->rx_irq = platform_get_irq_byname(pdev, "rx_irq");
1395 if (priv->rx_irq == -ENXIO) {
1396 dev_err(&pdev->dev, "cannot obtain Rx IRQ\n");
1397 ret = -ENXIO;
a7642009 1398 goto err_free_netdev;
bbd2190c
VB		 1399 }
1400
1401 /* Tx IRQ */
1402 priv->tx_irq = platform_get_irq_byname(pdev, "tx_irq");
1403 if (priv->tx_irq == -ENXIO) {
1404 dev_err(&pdev->dev, "cannot obtain Tx IRQ\n");
1405 ret = -ENXIO;
a7642009 1406 goto err_free_netdev;
bbd2190c
VB		 1407 }
1408
1409 /* get FIFO depths from device tree */
1410 if (of_property_read_u32(pdev->dev.of_node, "rx-fifo-depth",
1411 &priv->rx_fifo_depth)) {
1412 dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n");
1413 ret = -ENXIO;
a7642009 1414 goto err_free_netdev;
bbd2190c
VB		 1415 }
1416
1417 if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth",
fe6e4081 1418 &priv->tx_fifo_depth)) {
bbd2190c
VB		 1419 dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n");
1420 ret = -ENXIO;
a7642009 1421 goto err_free_netdev;
bbd2190c
VB		 1422 }
1423
1424 /* get hash filter settings for this instance */
1425 priv->hash_filter =
1426 of_property_read_bool(pdev->dev.of_node,
1427 "altr,has-hash-multicast-filter");
1428
d91e5c02
VB		 1429 /* Set hash filter to not set for now until the
1430 * multicast filter receive issue is debugged
1431 */
1432 priv->hash_filter = 0;
1433
bbd2190c
VB		 1434 /* get supplemental address settings for this instance */
1435 priv->added_unicast =
1436 of_property_read_bool(pdev->dev.of_node,
1437 "altr,has-supplementary-unicast");
1438
1439 /* Max MTU is 1500, ETH_DATA_LEN */
1440 priv->max_mtu = ETH_DATA_LEN;
1441
1442 /* Get the max mtu from the device tree. Note that the
1443 * "max-frame-size" parameter is actually max mtu. Definition
1444 * in the ePAPR v1.1 spec and usage differ, so go with usage.
1445 */
1446 of_property_read_u32(pdev->dev.of_node, "max-frame-size",
1447 &priv->max_mtu);
1448
1449 /* The DMA buffer size already accounts for an alignment bias
1450 * to avoid unaligned access exceptions for the NIOS processor,
1451 */
1452 priv->rx_dma_buf_sz = ALTERA_RXDMABUFFER_SIZE;
1453
1454 /* get default MAC address from device tree */
1455 macaddr = of_get_mac_address(pdev->dev.of_node);
1456 if (macaddr)
1457 ether_addr_copy(ndev->dev_addr, macaddr);
1458 else
1459 eth_hw_addr_random(ndev);
1460
004fa118
WL		 1461 /* get phy addr and create mdio */
1462 ret = altera_tse_phy_get_addr_mdio_create(ndev);
bbd2190c
VB		 1463
1464 if (ret)
a7642009 1465 goto err_free_netdev;
bbd2190c
VB		 1466
1467 /* initialize netdev */
bbd2190c
VB		 1468 ndev->mem_start = control_port->start;
1469 ndev->mem_end = control_port->end;
1470 ndev->netdev_ops = &altera_tse_netdev_ops;
1471 altera_tse_set_ethtool_ops(ndev);
1472
1473 altera_tse_netdev_ops.ndo_set_rx_mode = tse_set_rx_mode;
1474
1475 if (priv->hash_filter)
1476 altera_tse_netdev_ops.ndo_set_rx_mode =
1477 tse_set_rx_mode_hashfilter;
1478
1479 /* Scatter/gather IO is not supported,
1480 * so it is turned off
1481 */
1482 ndev->hw_features &= ~NETIF_F_SG;
1483 ndev->features |= ndev->hw_features | NETIF_F_HIGHDMA;
1484
1485 /* VLAN offloading of tagging, stripping and filtering is not
1486 * supported by hardware, but driver will accommodate the
1487 * extra 4-byte VLAN tag for processing by upper layers
1488 */
1489 ndev->features |= NETIF_F_HW_VLAN_CTAG_RX;
1490
1491 /* setup NAPI interface */
1492 netif_napi_add(ndev, &priv->napi, tse_poll, NAPI_POLL_WEIGHT);
1493
1494 spin_lock_init(&priv->mac_cfg_lock);
1495 spin_lock_init(&priv->tx_lock);
1496 spin_lock_init(&priv->rxdma_irq_lock);
1497
d43cefcd 1498 netif_carrier_off(ndev);
bbd2190c
VB		 1499 ret = register_netdev(ndev);
1500 if (ret) {
1501 dev_err(&pdev->dev, "failed to register TSE net device\n");
a7642009 1502 goto err_register_netdev;
bbd2190c
VB		 1503 }
1504
1505 platform_set_drvdata(pdev, ndev);
1506
1507 priv->revision = ioread32(&priv->mac_dev->megacore_revision);
1508
1509 if (netif_msg_probe(priv))
1510 dev_info(&pdev->dev, "Altera TSE MAC version %d.%d at 0x%08lx irq %d/%d\n",
1511 (priv->revision >> 8) & 0xff,
1512 priv->revision & 0xff,
1513 (unsigned long) control_port->start, priv->rx_irq,
1514 priv->tx_irq);
1515
1516 ret = init_phy(ndev);
1517 if (ret != 0) {
1518 netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret);
a7642009 1519 goto err_init_phy;
bbd2190c
VB		 1520 }
1521 return 0;
1522
a7642009
VB		 1523err_init_phy:
1524 unregister_netdev(ndev);
1525err_register_netdev:
1526 netif_napi_del(&priv->napi);
bbd2190c 1527 altera_tse_mdio_destroy(ndev);
a7642009 1528err_free_netdev:
bbd2190c
VB		 1529 free_netdev(ndev);
1530 return ret;
1531}
1532
1533/* Remove Altera TSE MAC device
1534 */
1535static int altera_tse_remove(struct platform_device *pdev)
1536{
1537 struct net_device *ndev = platform_get_drvdata(pdev);
5a89394a 1538 struct altera_tse_private *priv = netdev_priv(ndev);
c484994e 1539
5a89394a 1540 if (ndev->phydev) {
941ea69e 1541 phy_disconnect(ndev->phydev);
bbd2190c 1542
5a89394a
JH		 1543 if (of_phy_is_fixed_link(priv->device->of_node))
1544 of_phy_deregister_fixed_link(priv->device->of_node);
1545 }
1546
bbd2190c
VB		 1547 platform_set_drvdata(pdev, NULL);
1548 altera_tse_mdio_destroy(ndev);
1549 unregister_netdev(ndev);
1550 free_netdev(ndev);
1551
1552 return 0;
1553}
1554
89830580 1555static const struct altera_dmaops altera_dtype_sgdma = {
bbd2190c
VB		 1556 .altera_dtype = ALTERA_DTYPE_SGDMA,
1557 .dmamask = 32,
1558 .reset_dma = sgdma_reset,
1559 .enable_txirq = sgdma_enable_txirq,
1560 .enable_rxirq = sgdma_enable_rxirq,
1561 .disable_txirq = sgdma_disable_txirq,
1562 .disable_rxirq = sgdma_disable_rxirq,
1563 .clear_txirq = sgdma_clear_txirq,
1564 .clear_rxirq = sgdma_clear_rxirq,
1565 .tx_buffer = sgdma_tx_buffer,
1566 .tx_completions = sgdma_tx_completions,
1567 .add_rx_desc = sgdma_add_rx_desc,
1568 .get_rx_status = sgdma_rx_status,
1569 .init_dma = sgdma_initialize,
1570 .uninit_dma = sgdma_uninitialize,
37c0ffaa 1571 .start_rxdma = sgdma_start_rxdma,
bbd2190c
VB		 1572};
1573
89830580 1574static const struct altera_dmaops altera_dtype_msgdma = {
bbd2190c
VB		 1575 .altera_dtype = ALTERA_DTYPE_MSGDMA,
1576 .dmamask = 64,
1577 .reset_dma = msgdma_reset,
1578 .enable_txirq = msgdma_enable_txirq,
1579 .enable_rxirq = msgdma_enable_rxirq,
1580 .disable_txirq = msgdma_disable_txirq,
1581 .disable_rxirq = msgdma_disable_rxirq,
1582 .clear_txirq = msgdma_clear_txirq,
1583 .clear_rxirq = msgdma_clear_rxirq,
1584 .tx_buffer = msgdma_tx_buffer,
1585 .tx_completions = msgdma_tx_completions,
1586 .add_rx_desc = msgdma_add_rx_desc,
1587 .get_rx_status = msgdma_rx_status,
1588 .init_dma = msgdma_initialize,
1589 .uninit_dma = msgdma_uninitialize,
37c0ffaa 1590 .start_rxdma = msgdma_start_rxdma,
bbd2190c
VB		 1591};
1592
27260530 1593static const struct of_device_id altera_tse_ids[] = {
bbd2190c
VB		 1594 { .compatible = "altr,tse-msgdma-1.0", .data = &altera_dtype_msgdma, },
1595 { .compatible = "altr,tse-1.0", .data = &altera_dtype_sgdma, },
1596 { .compatible = "ALTR,tse-1.0", .data = &altera_dtype_sgdma, },
1597 {},
1598};
1599MODULE_DEVICE_TABLE(of, altera_tse_ids);
1600
1601static struct platform_driver altera_tse_driver = {
1602 .probe = altera_tse_probe,
1603 .remove = altera_tse_remove,
1604 .suspend = NULL,
1605 .resume = NULL,
1606 .driver = {
1607 .name = ALTERA_TSE_RESOURCE_NAME,
bbd2190c
VB		 1608 .of_match_table = altera_tse_ids,
1609 },
1610};
1611
1612module_platform_driver(altera_tse_driver);
1613
1614MODULE_AUTHOR("Altera Corporation");
1615MODULE_DESCRIPTION("Altera Triple Speed Ethernet MAC driver");
1616MODULE_LICENSE("GPL v2");
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