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net: ena: introduce XDP redirect implementation
[mirror_ubuntu-jammy-kernel.git] / drivers / net / ethernet / amazon / ena / ena_netdev.c
CommitLineData
2246cbc2 1// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
1738cd3e 2/*
2246cbc2 3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
1738cd3e
NB		 4 */
5
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7
8#ifdef CONFIG_RFS_ACCEL
9#include <linux/cpu_rmap.h>
10#endif /* CONFIG_RFS_ACCEL */
11#include <linux/ethtool.h>
1738cd3e
NB		 12#include <linux/kernel.h>
13#include <linux/module.h>
1738cd3e
NB		 14#include <linux/numa.h>
15#include <linux/pci.h>
16#include <linux/utsname.h>
17#include <linux/version.h>
18#include <linux/vmalloc.h>
19#include <net/ip.h>
20
21#include "ena_netdev.h"
838c93dc 22#include <linux/bpf_trace.h>
1738cd3e
NB		 23#include "ena_pci_id_tbl.h"
24
1738cd3e
NB		 25MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
26MODULE_DESCRIPTION(DEVICE_NAME);
27MODULE_LICENSE("GPL");
1738cd3e
NB		 28
29/* Time in jiffies before concluding the transmitter is hung. */
30#define TX_TIMEOUT (5 * HZ)
31
ce74496a
SA		 32#define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus())
33
1738cd3e
NB		 34#define ENA_NAPI_BUDGET 64
35
36#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
37 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
38static int debug = -1;
39module_param(debug, int, 0);
40MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
41
42static struct ena_aenq_handlers aenq_handlers;
43
44static struct workqueue_struct *ena_wq;
45
46MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
47
48static int ena_rss_init_default(struct ena_adapter *adapter);
ee4552aa 49static void check_for_admin_com_state(struct ena_adapter *adapter);
cfa324a5 50static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
ee4552aa 51static int ena_restore_device(struct ena_adapter *adapter);
548c4940
SJ		 52
53static void ena_init_io_rings(struct ena_adapter *adapter,
54 int first_index, int count);
55static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index,
56 int count);
57static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index,
58 int count);
59static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid);
60static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
61 int first_index,
62 int count);
63static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid);
64static void ena_free_tx_resources(struct ena_adapter *adapter, int qid);
65static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget);
66static void ena_destroy_all_tx_queues(struct ena_adapter *adapter);
67static void ena_free_all_io_tx_resources(struct ena_adapter *adapter);
68static void ena_napi_disable_in_range(struct ena_adapter *adapter,
69 int first_index, int count);
70static void ena_napi_enable_in_range(struct ena_adapter *adapter,
71 int first_index, int count);
838c93dc 72static int ena_up(struct ena_adapter *adapter);
548c4940
SJ		 73static void ena_down(struct ena_adapter *adapter);
74static void ena_unmask_interrupt(struct ena_ring *tx_ring,
75 struct ena_ring *rx_ring);
76static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
77 struct ena_ring *rx_ring);
78static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
79 struct ena_tx_buffer *tx_info);
80static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
81 int first_index, int count);
1738cd3e 82
89dd735e
SA		 83/* Increase a stat by cnt while holding syncp seqlock on 32bit machines */
84static void ena_increase_stat(u64 *statp, u64 cnt,
85 struct u64_stats_sync *syncp)
86{
87 u64_stats_update_begin(syncp);
88 (*statp) += cnt;
89 u64_stats_update_end(syncp);
90}
91
0290bd29 92static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue)
1738cd3e
NB		 93{
94 struct ena_adapter *adapter = netdev_priv(dev);
95
3f6159db
NB		 96 /* Change the state of the device to trigger reset
97 * Check that we are not in the middle or a trigger already
98 */
99
100 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
101 return;
102
e2eed0e3 103 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;
89dd735e 104 ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp);
1738cd3e
NB		 105
106 netif_err(adapter, tx_err, dev, "Transmit time out\n");
1738cd3e
NB		 107}
108
109static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
110{
111 int i;
112
faa615f9 113 for (i = 0; i < adapter->num_io_queues; i++)
1738cd3e
NB		 114 adapter->rx_ring[i].mtu = mtu;
115}
116
117static int ena_change_mtu(struct net_device *dev, int new_mtu)
118{
119 struct ena_adapter *adapter = netdev_priv(dev);
120 int ret;
121
1738cd3e
NB		 122 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
123 if (!ret) {
bf2746e8 124 netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu);
1738cd3e
NB		 125 update_rx_ring_mtu(adapter, new_mtu);
126 dev->mtu = new_mtu;
127 } else {
128 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
129 new_mtu);
130 }
131
132 return ret;
133}
134
548c4940
SJ		 135static int ena_xmit_common(struct net_device *dev,
136 struct ena_ring *ring,
137 struct ena_tx_buffer *tx_info,
138 struct ena_com_tx_ctx *ena_tx_ctx,
139 u16 next_to_use,
140 u32 bytes)
141{
142 struct ena_adapter *adapter = netdev_priv(dev);
143 int rc, nb_hw_desc;
144
145 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq,
146 ena_tx_ctx))) {
147 netif_dbg(adapter, tx_queued, dev,
148 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n",
149 ring->qid);
150 ena_com_write_sq_doorbell(ring->ena_com_io_sq);
151 }
152
153 /* prepare the packet's descriptors to dma engine */
154 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx,
155 &nb_hw_desc);
156
157 /* In case there isn't enough space in the queue for the packet,
158 * we simply drop it. All other failure reasons of
159 * ena_com_prepare_tx() are fatal and therefore require a device reset.
160 */
161 if (unlikely(rc)) {
162 netif_err(adapter, tx_queued, dev,
bf2746e8 163 "Failed to prepare tx bufs\n");
89dd735e
SA		 164 ena_increase_stat(&ring->tx_stats.prepare_ctx_err, 1,
165 &ring->syncp);
548c4940
SJ		 166 if (rc != -ENOMEM) {
167 adapter->reset_reason =
168 ENA_REGS_RESET_DRIVER_INVALID_STATE;
169 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
170 }
171 return rc;
172 }
173
174 u64_stats_update_begin(&ring->syncp);
175 ring->tx_stats.cnt++;
176 ring->tx_stats.bytes += bytes;
177 u64_stats_update_end(&ring->syncp);
178
179 tx_info->tx_descs = nb_hw_desc;
180 tx_info->last_jiffies = jiffies;
181 tx_info->print_once = 0;
182
183 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
184 ring->ring_size);
185 return 0;
186}
187
188/* This is the XDP napi callback. XDP queues use a separate napi callback
189 * than Rx/Tx queues.
190 */
191static int ena_xdp_io_poll(struct napi_struct *napi, int budget)
192{
193 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
194 u32 xdp_work_done, xdp_budget;
195 struct ena_ring *xdp_ring;
196 int napi_comp_call = 0;
197 int ret;
198
199 xdp_ring = ena_napi->xdp_ring;
913b0bfd 200 xdp_ring->first_interrupt = ena_napi->first_interrupt;
548c4940
SJ		 201
202 xdp_budget = budget;
203
204 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) ||
205 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) {
206 napi_complete_done(napi, 0);
207 return 0;
208 }
209
210 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget);
211
212 /* If the device is about to reset or down, avoid unmask
213 * the interrupt and return 0 so NAPI won't reschedule
214 */
215 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) {
216 napi_complete_done(napi, 0);
217 ret = 0;
218 } else if (xdp_budget > xdp_work_done) {
219 napi_comp_call = 1;
220 if (napi_complete_done(napi, xdp_work_done))
221 ena_unmask_interrupt(xdp_ring, NULL);
222 ena_update_ring_numa_node(xdp_ring, NULL);
223 ret = xdp_work_done;
224 } else {
225 ret = xdp_budget;
226 }
227
228 u64_stats_update_begin(&xdp_ring->syncp);
229 xdp_ring->tx_stats.napi_comp += napi_comp_call;
230 xdp_ring->tx_stats.tx_poll++;
231 u64_stats_update_end(&xdp_ring->syncp);
232
233 return ret;
234}
235
e8223eef
SA		 236static int ena_xdp_tx_map_frame(struct ena_ring *xdp_ring,
237 struct ena_tx_buffer *tx_info,
238 struct xdp_frame *xdpf,
239 void **push_hdr,
240 u32 *push_len)
548c4940
SJ		 241{
242 struct ena_adapter *adapter = xdp_ring->adapter;
243 struct ena_com_buf *ena_buf;
244 dma_addr_t dma = 0;
245 u32 size;
246
e8223eef 247 tx_info->xdpf = xdpf;
548c4940
SJ		 248 size = tx_info->xdpf->len;
249 ena_buf = tx_info->bufs;
250
251 /* llq push buffer */
252 *push_len = min_t(u32, size, xdp_ring->tx_max_header_size);
253 *push_hdr = tx_info->xdpf->data;
254
255 if (size - *push_len > 0) {
256 dma = dma_map_single(xdp_ring->dev,
257 *push_hdr + *push_len,
258 size - *push_len,
259 DMA_TO_DEVICE);
260 if (unlikely(dma_mapping_error(xdp_ring->dev, dma)))
261 goto error_report_dma_error;
262
263 tx_info->map_linear_data = 1;
264 tx_info->num_of_bufs = 1;
265 }
266
267 ena_buf->paddr = dma;
268 ena_buf->len = size;
269
270 return 0;
271
272error_report_dma_error:
89dd735e
SA		 273 ena_increase_stat(&xdp_ring->tx_stats.dma_mapping_err, 1,
274 &xdp_ring->syncp);
bf2746e8 275 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n");
548c4940
SJ		 276
277 xdp_return_frame_rx_napi(tx_info->xdpf);
278 tx_info->xdpf = NULL;
279 tx_info->num_of_bufs = 0;
280
281 return -EINVAL;
282}
283
e8223eef
SA		 284static int ena_xdp_xmit_frame(struct net_device *dev,
285 struct xdp_frame *xdpf,
286 int qid)
548c4940
SJ		 287{
288 struct ena_adapter *adapter = netdev_priv(dev);
79890d3f 289 struct ena_com_tx_ctx ena_tx_ctx = {};
548c4940
SJ		 290 struct ena_tx_buffer *tx_info;
291 struct ena_ring *xdp_ring;
548c4940
SJ		 292 u16 next_to_use, req_id;
293 int rc;
294 void *push_hdr;
295 u32 push_len;
296
297 xdp_ring = &adapter->tx_ring[qid];
298 next_to_use = xdp_ring->next_to_use;
299 req_id = xdp_ring->free_ids[next_to_use];
300 tx_info = &xdp_ring->tx_buffer_info[req_id];
301 tx_info->num_of_bufs = 0;
a318c70a 302 tx_info->xdp_rx_page = virt_to_page(xdpf->data);
548c4940 303
e8223eef 304 rc = ena_xdp_tx_map_frame(xdp_ring, tx_info, xdpf, &push_hdr, &push_len);
548c4940
SJ		 305 if (unlikely(rc))
306 goto error_drop_packet;
307
308 ena_tx_ctx.ena_bufs = tx_info->bufs;
309 ena_tx_ctx.push_header = push_hdr;
310 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
311 ena_tx_ctx.req_id = req_id;
312 ena_tx_ctx.header_len = push_len;
313
314 rc = ena_xmit_common(dev,
315 xdp_ring,
316 tx_info,
317 &ena_tx_ctx,
318 next_to_use,
e8223eef 319 xdpf->len);
548c4940
SJ		 320 if (rc)
321 goto error_unmap_dma;
322 /* trigger the dma engine. ena_com_write_sq_doorbell()
323 * has a mb
324 */
325 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq);
89dd735e 326 ena_increase_stat(&xdp_ring->tx_stats.doorbells, 1, &xdp_ring->syncp);
548c4940
SJ		 327
328 return NETDEV_TX_OK;
329
330error_unmap_dma:
331 ena_unmap_tx_buff(xdp_ring, tx_info);
332 tx_info->xdpf = NULL;
333error_drop_packet:
a318c70a 334 xdp_return_frame(xdpf);
548c4940
SJ		 335 return NETDEV_TX_OK;
336}
337
e8223eef 338static int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp)
838c93dc
SJ		 339{
340 struct bpf_prog *xdp_prog;
341 u32 verdict = XDP_PASS;
e8223eef 342 struct xdp_frame *xdpf;
4cd28b21 343 u64 *xdp_stat;
838c93dc
SJ		 344
345 rcu_read_lock();
346 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog);
347
348 if (!xdp_prog)
349 goto out;
350
351 verdict = bpf_prog_run_xdp(xdp_prog, xdp);
352
a318c70a
SA		 353 switch (verdict) {
354 case XDP_TX:
e8223eef
SA		 355 xdpf = xdp_convert_buff_to_frame(xdp);
356 if (unlikely(!xdpf)) {
357 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
358 xdp_stat = &rx_ring->rx_stats.xdp_aborted;
a318c70a
SA		 359 break;
360 }
4cd28b21 361
a318c70a
SA		 362 ena_xdp_xmit_frame(rx_ring->netdev, xdpf,
363 rx_ring->qid + rx_ring->adapter->num_io_queues);
364 xdp_stat = &rx_ring->rx_stats.xdp_tx;
365 break;
366 case XDP_REDIRECT:
367 if (likely(!xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))) {
368 xdp_stat = &rx_ring->rx_stats.xdp_redirect;
369 break;
e8223eef 370 }
a318c70a
SA		 371 fallthrough;
372 case XDP_ABORTED:
838c93dc 373 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
4cd28b21 374 xdp_stat = &rx_ring->rx_stats.xdp_aborted;
a318c70a
SA		 375 break;
376 case XDP_DROP:
4cd28b21 377 xdp_stat = &rx_ring->rx_stats.xdp_drop;
a318c70a
SA		 378 break;
379 case XDP_PASS:
4cd28b21 380 xdp_stat = &rx_ring->rx_stats.xdp_pass;
a318c70a
SA		 381 break;
382 default:
838c93dc 383 bpf_warn_invalid_xdp_action(verdict);
4cd28b21
SJ		 384 xdp_stat = &rx_ring->rx_stats.xdp_invalid;
385 }
386
89dd735e 387 ena_increase_stat(xdp_stat, 1, &rx_ring->syncp);
838c93dc
SJ		 388out:
389 rcu_read_unlock();
4cd28b21 390
838c93dc
SJ		 391 return verdict;
392}
393
548c4940
SJ		 394static void ena_init_all_xdp_queues(struct ena_adapter *adapter)
395{
396 adapter->xdp_first_ring = adapter->num_io_queues;
397 adapter->xdp_num_queues = adapter->num_io_queues;
398
399 ena_init_io_rings(adapter,
400 adapter->xdp_first_ring,
401 adapter->xdp_num_queues);
402}
403
404static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter)
405{
406 int rc = 0;
407
408 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring,
409 adapter->xdp_num_queues);
410 if (rc)
411 goto setup_err;
412
413 rc = ena_create_io_tx_queues_in_range(adapter,
414 adapter->xdp_first_ring,
415 adapter->xdp_num_queues);
416 if (rc)
417 goto create_err;
418
419 return 0;
420
421create_err:
422 ena_free_all_io_tx_resources(adapter);
423setup_err:
424 return rc;
425}
426
427/* Provides a way for both kernel and bpf-prog to know
428 * more about the RX-queue a given XDP frame arrived on.
429 */
430static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring)
431{
432 int rc;
433
b02e5a0e 434 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid, 0);
548c4940
SJ		 435
436 if (rc) {
437 netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
438 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n",
439 rx_ring->qid, rc);
440 goto err;
441 }
442
443 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED,
444 NULL);
445
446 if (rc) {
447 netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
448 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n",
449 rx_ring->qid, rc);
450 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
451 }
452
453err:
454 return rc;
455}
456
457static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring)
458{
459 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq);
460 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
461}
462
32109c70
Y		 463static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter,
464 struct bpf_prog *prog,
465 int first, int count)
838c93dc
SJ		 466{
467 struct ena_ring *rx_ring;
468 int i = 0;
469
470 for (i = first; i < count; i++) {
471 rx_ring = &adapter->rx_ring[i];
472 xchg(&rx_ring->xdp_bpf_prog, prog);
548c4940
SJ		 473 if (prog) {
474 ena_xdp_register_rxq_info(rx_ring);
838c93dc 475 rx_ring->rx_headroom = XDP_PACKET_HEADROOM;
548c4940
SJ		 476 } else {
477 ena_xdp_unregister_rxq_info(rx_ring);
838c93dc 478 rx_ring->rx_headroom = 0;
548c4940 479 }
838c93dc
SJ		 480 }
481}
482
32109c70
Y		 483static void ena_xdp_exchange_program(struct ena_adapter *adapter,
484 struct bpf_prog *prog)
838c93dc
SJ		 485{
486 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog);
487
488 ena_xdp_exchange_program_rx_in_range(adapter,
489 prog,
490 0,
491 adapter->num_io_queues);
492
493 if (old_bpf_prog)
494 bpf_prog_put(old_bpf_prog);
495}
496
548c4940
SJ		 497static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter)
498{
499 bool was_up;
500 int rc;
501
502 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
503
504 if (was_up)
505 ena_down(adapter);
506
507 adapter->xdp_first_ring = 0;
508 adapter->xdp_num_queues = 0;
509 ena_xdp_exchange_program(adapter, NULL);
510 if (was_up) {
511 rc = ena_up(adapter);
512 if (rc)
513 return rc;
514 }
515 return 0;
516}
517
838c93dc
SJ		 518static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf)
519{
520 struct ena_adapter *adapter = netdev_priv(netdev);
521 struct bpf_prog *prog = bpf->prog;
548c4940 522 struct bpf_prog *old_bpf_prog;
838c93dc
SJ		 523 int rc, prev_mtu;
524 bool is_up;
525
526 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
548c4940
SJ		 527 rc = ena_xdp_allowed(adapter);
528 if (rc == ENA_XDP_ALLOWED) {
529 old_bpf_prog = adapter->xdp_bpf_prog;
530 if (prog) {
531 if (!is_up) {
532 ena_init_all_xdp_queues(adapter);
533 } else if (!old_bpf_prog) {
534 ena_down(adapter);
535 ena_init_all_xdp_queues(adapter);
536 }
537 ena_xdp_exchange_program(adapter, prog);
838c93dc 538
548c4940
SJ		 539 if (is_up && !old_bpf_prog) {
540 rc = ena_up(adapter);
541 if (rc)
542 return rc;
543 }
544 } else if (old_bpf_prog) {
545 rc = ena_destroy_and_free_all_xdp_queues(adapter);
838c93dc
SJ		 546 if (rc)
547 return rc;
548 }
838c93dc 549
548c4940
SJ		 550 prev_mtu = netdev->max_mtu;
551 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu;
552
553 if (!old_bpf_prog)
554 netif_info(adapter, drv, adapter->netdev,
bf2746e8 555 "XDP program is set, changing the max_mtu from %d to %d",
548c4940
SJ		 556 prev_mtu, netdev->max_mtu);
557
558 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) {
559 netif_err(adapter, drv, adapter->netdev,
560 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on",
838c93dc 561 netdev->mtu, ENA_XDP_MAX_MTU);
548c4940
SJ		 562 NL_SET_ERR_MSG_MOD(bpf->extack,
563 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info");
564 return -EINVAL;
565 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) {
566 netif_err(adapter, drv, adapter->netdev,
567 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n",
568 adapter->num_io_queues, adapter->max_num_io_queues);
569 NL_SET_ERR_MSG_MOD(bpf->extack,
570 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info");
838c93dc
SJ		 571 return -EINVAL;
572 }
573
574 return 0;
575}
576
577/* This is the main xdp callback, it's used by the kernel to set/unset the xdp
578 * program as well as to query the current xdp program id.
579 */
580static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf)
581{
838c93dc
SJ		 582 switch (bpf->command) {
583 case XDP_SETUP_PROG:
584 return ena_xdp_set(netdev, bpf);
838c93dc
SJ		 585 default:
586 return -EINVAL;
587 }
588 return 0;
589}
590
1738cd3e
NB		 591static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
592{
593#ifdef CONFIG_RFS_ACCEL
594 u32 i;
595 int rc;
596
faa615f9 597 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues);
1738cd3e
NB		 598 if (!adapter->netdev->rx_cpu_rmap)
599 return -ENOMEM;
faa615f9 600 for (i = 0; i < adapter->num_io_queues; i++) {
1738cd3e
NB		 601 int irq_idx = ENA_IO_IRQ_IDX(i);
602
603 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
da6f4cf5 604 pci_irq_vector(adapter->pdev, irq_idx));
1738cd3e
NB		 605 if (rc) {
606 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
607 adapter->netdev->rx_cpu_rmap = NULL;
608 return rc;
609 }
610 }
611#endif /* CONFIG_RFS_ACCEL */
612 return 0;
613}
614
615static void ena_init_io_rings_common(struct ena_adapter *adapter,
616 struct ena_ring *ring, u16 qid)
617{
618 ring->qid = qid;
619 ring->pdev = adapter->pdev;
620 ring->dev = &adapter->pdev->dev;
621 ring->netdev = adapter->netdev;
622 ring->napi = &adapter->ena_napi[qid].napi;
623 ring->adapter = adapter;
624 ring->ena_dev = adapter->ena_dev;
625 ring->per_napi_packets = 0;
1738cd3e 626 ring->cpu = 0;
8510e1a3
NB		 627 ring->first_interrupt = false;
628 ring->no_interrupt_event_cnt = 0;
1738cd3e
NB		 629 u64_stats_init(&ring->syncp);
630}
631
548c4940
SJ		 632static void ena_init_io_rings(struct ena_adapter *adapter,
633 int first_index, int count)
1738cd3e
NB		 634{
635 struct ena_com_dev *ena_dev;
636 struct ena_ring *txr, *rxr;
637 int i;
638
639 ena_dev = adapter->ena_dev;
640
548c4940 641 for (i = first_index; i < first_index + count; i++) {
1738cd3e
NB		 642 txr = &adapter->tx_ring[i];
643 rxr = &adapter->rx_ring[i];
644
548c4940 645 /* TX common ring state */
1738cd3e 646 ena_init_io_rings_common(adapter, txr, i);
1738cd3e
NB		 647
648 /* TX specific ring state */
13ca32a6 649 txr->ring_size = adapter->requested_tx_ring_size;
1738cd3e
NB		 650 txr->tx_max_header_size = ena_dev->tx_max_header_size;
651 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
652 txr->sgl_size = adapter->max_tx_sgl_size;
653 txr->smoothed_interval =
654 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
0e3a3f6d 655 txr->disable_meta_caching = adapter->disable_meta_caching;
1738cd3e 656
548c4940
SJ		 657 /* Don't init RX queues for xdp queues */
658 if (!ENA_IS_XDP_INDEX(adapter, i)) {
659 /* RX common ring state */
660 ena_init_io_rings_common(adapter, rxr, i);
661
662 /* RX specific ring state */
663 rxr->ring_size = adapter->requested_rx_ring_size;
664 rxr->rx_copybreak = adapter->rx_copybreak;
665 rxr->sgl_size = adapter->max_rx_sgl_size;
666 rxr->smoothed_interval =
667 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
668 rxr->empty_rx_queue = 0;
669 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
670 }
1738cd3e
NB		 671 }
672}
673
674/* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
675 * @adapter: network interface device structure
676 * @qid: queue index
677 *
678 * Return 0 on success, negative on failure
679 */
680static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
681{
682 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
683 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
684 int size, i, node;
685
686 if (tx_ring->tx_buffer_info) {
687 netif_err(adapter, ifup,
688 adapter->netdev, "tx_buffer_info info is not NULL");
689 return -EEXIST;
690 }
691
692 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
693 node = cpu_to_node(ena_irq->cpu);
694
695 tx_ring->tx_buffer_info = vzalloc_node(size, node);
696 if (!tx_ring->tx_buffer_info) {
697 tx_ring->tx_buffer_info = vzalloc(size);
698 if (!tx_ring->tx_buffer_info)
8ee8ee7f 699 goto err_tx_buffer_info;
1738cd3e
NB		 700 }
701
702 size = sizeof(u16) * tx_ring->ring_size;
f9172498
SJ		 703 tx_ring->free_ids = vzalloc_node(size, node);
704 if (!tx_ring->free_ids) {
705 tx_ring->free_ids = vzalloc(size);
706 if (!tx_ring->free_ids)
707 goto err_tx_free_ids;
1738cd3e
NB		 708 }
709
38005ca8
AK		 710 size = tx_ring->tx_max_header_size;
711 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
712 if (!tx_ring->push_buf_intermediate_buf) {
713 tx_ring->push_buf_intermediate_buf = vzalloc(size);
8ee8ee7f
SJ		 714 if (!tx_ring->push_buf_intermediate_buf)
715 goto err_push_buf_intermediate_buf;
38005ca8
AK		 716 }
717
1738cd3e
NB		 718 /* Req id ring for TX out of order completions */
719 for (i = 0; i < tx_ring->ring_size; i++)
f9172498 720 tx_ring->free_ids[i] = i;
1738cd3e
NB		 721
722 /* Reset tx statistics */
723 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
724
725 tx_ring->next_to_use = 0;
726 tx_ring->next_to_clean = 0;
727 tx_ring->cpu = ena_irq->cpu;
728 return 0;
8ee8ee7f
SJ		 729
730err_push_buf_intermediate_buf:
f9172498
SJ		 731 vfree(tx_ring->free_ids);
732 tx_ring->free_ids = NULL;
733err_tx_free_ids:
8ee8ee7f
SJ		 734 vfree(tx_ring->tx_buffer_info);
735 tx_ring->tx_buffer_info = NULL;
736err_tx_buffer_info:
737 return -ENOMEM;
1738cd3e
NB		 738}
739
740/* ena_free_tx_resources - Free I/O Tx Resources per Queue
741 * @adapter: network interface device structure
742 * @qid: queue index
743 *
744 * Free all transmit software resources
745 */
746static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
747{
748 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
749
750 vfree(tx_ring->tx_buffer_info);
751 tx_ring->tx_buffer_info = NULL;
752
f9172498
SJ		 753 vfree(tx_ring->free_ids);
754 tx_ring->free_ids = NULL;
38005ca8
AK		 755
756 vfree(tx_ring->push_buf_intermediate_buf);
757 tx_ring->push_buf_intermediate_buf = NULL;
1738cd3e
NB		 758}
759
548c4940
SJ		 760static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
761 int first_index,
762 int count)
1738cd3e
NB		 763{
764 int i, rc = 0;
765
548c4940 766 for (i = first_index; i < first_index + count; i++) {
1738cd3e
NB		 767 rc = ena_setup_tx_resources(adapter, i);
768 if (rc)
769 goto err_setup_tx;
770 }
771
772 return 0;
773
774err_setup_tx:
775
776 netif_err(adapter, ifup, adapter->netdev,
777 "Tx queue %d: allocation failed\n", i);
778
779 /* rewind the index freeing the rings as we go */
548c4940 780 while (first_index < i--)
1738cd3e
NB		 781 ena_free_tx_resources(adapter, i);
782 return rc;
783}
784
548c4940
SJ		 785static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter,
786 int first_index, int count)
787{
788 int i;
789
790 for (i = first_index; i < first_index + count; i++)
791 ena_free_tx_resources(adapter, i);
792}
793
1738cd3e
NB		 794/* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
795 * @adapter: board private structure
796 *
797 * Free all transmit software resources
798 */
799static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
800{
548c4940
SJ		 801 ena_free_all_io_tx_resources_in_range(adapter,
802 0,
803 adapter->xdp_num_queues +
804 adapter->num_io_queues);
1738cd3e
NB		 805}
806
807/* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
808 * @adapter: network interface device structure
809 * @qid: queue index
810 *
811 * Returns 0 on success, negative on failure
812 */
813static int ena_setup_rx_resources(struct ena_adapter *adapter,
814 u32 qid)
815{
816 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
817 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
ad974bae 818 int size, node, i;
1738cd3e
NB		 819
820 if (rx_ring->rx_buffer_info) {
821 netif_err(adapter, ifup, adapter->netdev,
822 "rx_buffer_info is not NULL");
823 return -EEXIST;
824 }
825
826 /* alloc extra element so in rx path
827 * we can always prefetch rx_info + 1
828 */
829 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
830 node = cpu_to_node(ena_irq->cpu);
831
832 rx_ring->rx_buffer_info = vzalloc_node(size, node);
833 if (!rx_ring->rx_buffer_info) {
834 rx_ring->rx_buffer_info = vzalloc(size);
835 if (!rx_ring->rx_buffer_info)
836 return -ENOMEM;
837 }
838
ad974bae 839 size = sizeof(u16) * rx_ring->ring_size;
f9172498
SJ		 840 rx_ring->free_ids = vzalloc_node(size, node);
841 if (!rx_ring->free_ids) {
842 rx_ring->free_ids = vzalloc(size);
843 if (!rx_ring->free_ids) {
ad974bae 844 vfree(rx_ring->rx_buffer_info);
8ee8ee7f 845 rx_ring->rx_buffer_info = NULL;
ad974bae
NB		 846 return -ENOMEM;
847 }
848 }
849
850 /* Req id ring for receiving RX pkts out of order */
851 for (i = 0; i < rx_ring->ring_size; i++)
f9172498 852 rx_ring->free_ids[i] = i;
ad974bae 853
1738cd3e
NB		 854 /* Reset rx statistics */
855 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
856
857 rx_ring->next_to_clean = 0;
858 rx_ring->next_to_use = 0;
859 rx_ring->cpu = ena_irq->cpu;
860
861 return 0;
862}
863
864/* ena_free_rx_resources - Free I/O Rx Resources
865 * @adapter: network interface device structure
866 * @qid: queue index
867 *
868 * Free all receive software resources
869 */
870static void ena_free_rx_resources(struct ena_adapter *adapter,
871 u32 qid)
872{
873 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
874
875 vfree(rx_ring->rx_buffer_info);
876 rx_ring->rx_buffer_info = NULL;
ad974bae 877
f9172498
SJ		 878 vfree(rx_ring->free_ids);
879 rx_ring->free_ids = NULL;
1738cd3e
NB		 880}
881
882/* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
883 * @adapter: board private structure
884 *
885 * Return 0 on success, negative on failure
886 */
887static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
888{
889 int i, rc = 0;
890
faa615f9 891 for (i = 0; i < adapter->num_io_queues; i++) {
1738cd3e
NB		 892 rc = ena_setup_rx_resources(adapter, i);
893 if (rc)
894 goto err_setup_rx;
895 }
896
897 return 0;
898
899err_setup_rx:
900
901 netif_err(adapter, ifup, adapter->netdev,
902 "Rx queue %d: allocation failed\n", i);
903
904 /* rewind the index freeing the rings as we go */
905 while (i--)
906 ena_free_rx_resources(adapter, i);
907 return rc;
908}
909
910/* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
911 * @adapter: board private structure
912 *
913 * Free all receive software resources
914 */
915static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
916{
917 int i;
918
faa615f9 919 for (i = 0; i < adapter->num_io_queues; i++)
1738cd3e
NB		 920 ena_free_rx_resources(adapter, i);
921}
922
c2b54204 923static int ena_alloc_rx_page(struct ena_ring *rx_ring,
1738cd3e
NB		 924 struct ena_rx_buffer *rx_info, gfp_t gfp)
925{
1396d314 926 int headroom = rx_ring->rx_headroom;
1738cd3e
NB		 927 struct ena_com_buf *ena_buf;
928 struct page *page;
929 dma_addr_t dma;
930
1396d314
SA		 931 /* restore page offset value in case it has been changed by device */
932 rx_info->page_offset = headroom;
933
1738cd3e
NB		 934 /* if previous allocated page is not used */
935 if (unlikely(rx_info->page))
936 return 0;
937
938 page = alloc_page(gfp);
939 if (unlikely(!page)) {
89dd735e
SA		 940 ena_increase_stat(&rx_ring->rx_stats.page_alloc_fail, 1,
941 &rx_ring->syncp);
1738cd3e
NB		 942 return -ENOMEM;
943 }
944
0f505c60
AK		 945 /* To enable NIC-side port-mirroring, AKA SPAN port,
946 * we make the buffer readable from the nic as well
947 */
ef5b0771 948 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
0f505c60 949 DMA_BIDIRECTIONAL);
1738cd3e 950 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
89dd735e
SA		 951 ena_increase_stat(&rx_ring->rx_stats.dma_mapping_err, 1,
952 &rx_ring->syncp);
1738cd3e
NB		 953
954 __free_page(page);
955 return -EIO;
956 }
957 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
bf2746e8 958 "Allocate page %p, rx_info %p\n", page, rx_info);
1738cd3e
NB		 959
960 rx_info->page = page;
1738cd3e 961 ena_buf = &rx_info->ena_buf;
1396d314
SA		 962 ena_buf->paddr = dma + headroom;
963 ena_buf->len = ENA_PAGE_SIZE - headroom;
1738cd3e
NB		 964
965 return 0;
966}
967
a318c70a
SA		 968static void ena_unmap_rx_buff(struct ena_ring *rx_ring,
969 struct ena_rx_buffer *rx_info)
970{
971 struct ena_com_buf *ena_buf = &rx_info->ena_buf;
972
973 dma_unmap_page(rx_ring->dev, ena_buf->paddr - rx_ring->rx_headroom,
974 ENA_PAGE_SIZE,
975 DMA_BIDIRECTIONAL);
976}
977
1738cd3e
NB		 978static void ena_free_rx_page(struct ena_ring *rx_ring,
979 struct ena_rx_buffer *rx_info)
980{
981 struct page *page = rx_info->page;
1738cd3e
NB		 982
983 if (unlikely(!page)) {
984 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
985 "Trying to free unallocated buffer\n");
986 return;
987 }
988
a318c70a 989 ena_unmap_rx_buff(rx_ring, rx_info);
1738cd3e
NB		 990
991 __free_page(page);
992 rx_info->page = NULL;
993}
994
995static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
996{
ad974bae 997 u16 next_to_use, req_id;
1738cd3e
NB		 998 u32 i;
999 int rc;
1000
1001 next_to_use = rx_ring->next_to_use;
1002
1003 for (i = 0; i < num; i++) {
ad974bae
NB		 1004 struct ena_rx_buffer *rx_info;
1005
f9172498 1006 req_id = rx_ring->free_ids[next_to_use];
ad974bae
NB		 1007
1008 rx_info = &rx_ring->rx_buffer_info[req_id];
1009
1738cd3e 1010 rc = ena_alloc_rx_page(rx_ring, rx_info,
453f85d4 1011 GFP_ATOMIC | __GFP_COMP);
1738cd3e
NB		 1012 if (unlikely(rc < 0)) {
1013 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
bf2746e8 1014 "Failed to allocate buffer for rx queue %d\n",
1738cd3e
NB		 1015 rx_ring->qid);
1016 break;
1017 }
1018 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
1019 &rx_info->ena_buf,
ad974bae 1020 req_id);
1738cd3e
NB		 1021 if (unlikely(rc)) {
1022 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
bf2746e8 1023 "Failed to add buffer for rx queue %d\n",
1738cd3e
NB		 1024 rx_ring->qid);
1025 break;
1026 }
1027 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1028 rx_ring->ring_size);
1029 }
1030
1031 if (unlikely(i < num)) {
89dd735e
SA		 1032 ena_increase_stat(&rx_ring->rx_stats.refil_partial, 1,
1033 &rx_ring->syncp);
f0525298 1034 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
bf2746e8 1035 "Refilled rx qid %d with only %d buffers (from %d)\n",
f0525298 1036 rx_ring->qid, i, num);
1738cd3e
NB		 1037 }
1038
37dff155
NB		 1039 /* ena_com_write_sq_doorbell issues a wmb() */
1040 if (likely(i))
1041 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1738cd3e
NB		 1042
1043 rx_ring->next_to_use = next_to_use;
1044
1045 return i;
1046}
1047
1048static void ena_free_rx_bufs(struct ena_adapter *adapter,
1049 u32 qid)
1050{
1051 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1052 u32 i;
1053
1054 for (i = 0; i < rx_ring->ring_size; i++) {
1055 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1056
1057 if (rx_info->page)
1058 ena_free_rx_page(rx_ring, rx_info);
1059 }
1060}
1061
1062/* ena_refill_all_rx_bufs - allocate all queues Rx buffers
1063 * @adapter: board private structure
1738cd3e
NB		 1064 */
1065static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1066{
1067 struct ena_ring *rx_ring;
1068 int i, rc, bufs_num;
1069
faa615f9 1070 for (i = 0; i < adapter->num_io_queues; i++) {
1738cd3e
NB		 1071 rx_ring = &adapter->rx_ring[i];
1072 bufs_num = rx_ring->ring_size - 1;
1073 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1074
1075 if (unlikely(rc != bufs_num))
1076 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
bf2746e8 1077 "Refilling Queue %d failed. allocated %d buffers from: %d\n",
1738cd3e
NB		 1078 i, rc, bufs_num);
1079 }
1080}
1081
1082static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
1083{
1084 int i;
1085
faa615f9 1086 for (i = 0; i < adapter->num_io_queues; i++)
1738cd3e
NB		 1087 ena_free_rx_bufs(adapter, i);
1088}
1089
548c4940
SJ		 1090static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
1091 struct ena_tx_buffer *tx_info)
38005ca8
AK		 1092{
1093 struct ena_com_buf *ena_buf;
1094 u32 cnt;
1095 int i;
1096
1097 ena_buf = tx_info->bufs;
1098 cnt = tx_info->num_of_bufs;
1099
1100 if (unlikely(!cnt))
1101 return;
1102
1103 if (tx_info->map_linear_data) {
1104 dma_unmap_single(tx_ring->dev,
1105 dma_unmap_addr(ena_buf, paddr),
1106 dma_unmap_len(ena_buf, len),
1107 DMA_TO_DEVICE);
1108 ena_buf++;
1109 cnt--;
1110 }
1111
1112 /* unmap remaining mapped pages */
1113 for (i = 0; i < cnt; i++) {
1114 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
1115 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
1116 ena_buf++;
1117 }
1118}
1119
1738cd3e
NB		 1120/* ena_free_tx_bufs - Free Tx Buffers per Queue
1121 * @tx_ring: TX ring for which buffers be freed
1122 */
1123static void ena_free_tx_bufs(struct ena_ring *tx_ring)
1124{
5add6e4a 1125 bool print_once = true;
1738cd3e
NB		 1126 u32 i;
1127
1128 for (i = 0; i < tx_ring->ring_size; i++) {
1129 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1738cd3e
NB		 1130
1131 if (!tx_info->skb)
1132 continue;
1133
5add6e4a 1134 if (print_once) {
f0525298 1135 netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev,
bf2746e8 1136 "Free uncompleted tx skb qid %d idx 0x%x\n",
f0525298 1137 tx_ring->qid, i);
5add6e4a
NB		 1138 print_once = false;
1139 } else {
f0525298 1140 netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev,
bf2746e8 1141 "Free uncompleted tx skb qid %d idx 0x%x\n",
f0525298 1142 tx_ring->qid, i);
5add6e4a 1143 }
1738cd3e 1144
548c4940 1145 ena_unmap_tx_buff(tx_ring, tx_info);
1738cd3e
NB		 1146
1147 dev_kfree_skb_any(tx_info->skb);
1148 }
1149 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
1150 tx_ring->qid));
1151}
1152
1153static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
1154{
1155 struct ena_ring *tx_ring;
1156 int i;
1157
548c4940 1158 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1738cd3e
NB		 1159 tx_ring = &adapter->tx_ring[i];
1160 ena_free_tx_bufs(tx_ring);
1161 }
1162}
1163
1164static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1165{
1166 u16 ena_qid;
1167 int i;
1168
548c4940 1169 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1738cd3e
NB		 1170 ena_qid = ENA_IO_TXQ_IDX(i);
1171 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1172 }
1173}
1174
1175static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1176{
1177 u16 ena_qid;
1178 int i;
1179
faa615f9 1180 for (i = 0; i < adapter->num_io_queues; i++) {
1738cd3e 1181 ena_qid = ENA_IO_RXQ_IDX(i);
282faf61 1182 cancel_work_sync(&adapter->ena_napi[i].dim.work);
1738cd3e
NB		 1183 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1184 }
1185}
1186
1187static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
1188{
1189 ena_destroy_all_tx_queues(adapter);
1190 ena_destroy_all_rx_queues(adapter);
1191}
1192
548c4940
SJ		 1193static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,
1194 struct ena_tx_buffer *tx_info, bool is_xdp)
1195{
1196 if (tx_info)
1197 netif_err(ring->adapter,
1198 tx_done,
1199 ring->netdev,
1200 "tx_info doesn't have valid %s",
1201 is_xdp ? "xdp frame" : "skb");
1202 else
1203 netif_err(ring->adapter,
1204 tx_done,
1205 ring->netdev,
1206 "Invalid req_id: %hu\n",
1207 req_id);
1208
89dd735e 1209 ena_increase_stat(&ring->tx_stats.bad_req_id, 1, &ring->syncp);
548c4940
SJ		 1210
1211 /* Trigger device reset */
1212 ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
1213 set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags);
1214 return -EFAULT;
1215}
1216
1738cd3e
NB		 1217static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
1218{
1219 struct ena_tx_buffer *tx_info = NULL;
1220
1221 if (likely(req_id < tx_ring->ring_size)) {
1222 tx_info = &tx_ring->tx_buffer_info[req_id];
1223 if (likely(tx_info->skb))
1224 return 0;
1225 }
1226
548c4940
SJ		 1227 return handle_invalid_req_id(tx_ring, req_id, tx_info, false);
1228}
1738cd3e 1229
548c4940
SJ		 1230static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id)
1231{
1232 struct ena_tx_buffer *tx_info = NULL;
1738cd3e 1233
548c4940
SJ		 1234 if (likely(req_id < xdp_ring->ring_size)) {
1235 tx_info = &xdp_ring->tx_buffer_info[req_id];
1236 if (likely(tx_info->xdpf))
1237 return 0;
1238 }
1239
1240 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true);
1738cd3e
NB		 1241}
1242
1243static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
1244{
1245 struct netdev_queue *txq;
1246 bool above_thresh;
1247 u32 tx_bytes = 0;
1248 u32 total_done = 0;
1249 u16 next_to_clean;
1250 u16 req_id;
1251 int tx_pkts = 0;
1252 int rc;
1253
1254 next_to_clean = tx_ring->next_to_clean;
1255 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
1256
1257 while (tx_pkts < budget) {
1258 struct ena_tx_buffer *tx_info;
1259 struct sk_buff *skb;
1738cd3e
NB		 1260
1261 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
1262 &req_id);
1263 if (rc)
1264 break;
1265
1266 rc = validate_tx_req_id(tx_ring, req_id);
1267 if (rc)
1268 break;
1269
1270 tx_info = &tx_ring->tx_buffer_info[req_id];
1271 skb = tx_info->skb;
1272
1273 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
1274 prefetch(&skb->end);
1275
1276 tx_info->skb = NULL;
1277 tx_info->last_jiffies = 0;
1278
548c4940 1279 ena_unmap_tx_buff(tx_ring, tx_info);
1738cd3e
NB		 1280
1281 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1282 "tx_poll: q %d skb %p completed\n", tx_ring->qid,
1283 skb);
1284
1285 tx_bytes += skb->len;
1286 dev_kfree_skb(skb);
1287 tx_pkts++;
1288 total_done += tx_info->tx_descs;
1289
f9172498 1290 tx_ring->free_ids[next_to_clean] = req_id;
1738cd3e
NB		 1291 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1292 tx_ring->ring_size);
1293 }
1294
1295 tx_ring->next_to_clean = next_to_clean;
1296 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
1297 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
1298
1299 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
1300
1301 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1302 "tx_poll: q %d done. total pkts: %d\n",
1303 tx_ring->qid, tx_pkts);
1304
1305 /* need to make the rings circular update visible to
1306 * ena_start_xmit() before checking for netif_queue_stopped().
1307 */
1308 smp_mb();
1309
689b2bda
AK		 1310 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1311 ENA_TX_WAKEUP_THRESH);
1738cd3e
NB		 1312 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
1313 __netif_tx_lock(txq, smp_processor_id());
689b2bda
AK		 1314 above_thresh =
1315 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1316 ENA_TX_WAKEUP_THRESH);
a53651ec
SJ		 1317 if (netif_tx_queue_stopped(txq) && above_thresh &&
1318 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) {
1738cd3e 1319 netif_tx_wake_queue(txq);
89dd735e
SA		 1320 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1,
1321 &tx_ring->syncp);
1738cd3e
NB		 1322 }
1323 __netif_tx_unlock(txq);
1324 }
1325
1738cd3e
NB		 1326 return tx_pkts;
1327}
1328
4265114d
NB		 1329static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags)
1330{
1331 struct sk_buff *skb;
1332
1333 if (frags)
1334 skb = napi_get_frags(rx_ring->napi);
1335 else
1336 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1337 rx_ring->rx_copybreak);
1338
1339 if (unlikely(!skb)) {
89dd735e
SA		 1340 ena_increase_stat(&rx_ring->rx_stats.skb_alloc_fail, 1,
1341 &rx_ring->syncp);
4265114d
NB		 1342 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1343 "Failed to allocate skb. frags: %d\n", frags);
1344 return NULL;
1345 }
1346
1347 return skb;
1348}
1349
1738cd3e
NB		 1350static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
1351 struct ena_com_rx_buf_info *ena_bufs,
1352 u32 descs,
1353 u16 *next_to_clean)
1354{
1355 struct sk_buff *skb;
ad974bae
NB		 1356 struct ena_rx_buffer *rx_info;
1357 u16 len, req_id, buf = 0;
1738cd3e
NB		 1358 void *va;
1359
ad974bae
NB		 1360 len = ena_bufs[buf].len;
1361 req_id = ena_bufs[buf].req_id;
30623e1e 1362
ad974bae
NB		 1363 rx_info = &rx_ring->rx_buffer_info[req_id];
1364
1738cd3e
NB		 1365 if (unlikely(!rx_info->page)) {
1366 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
1367 "Page is NULL\n");
1368 return NULL;
1369 }
1370
1371 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1372 "rx_info %p page %p\n",
1373 rx_info, rx_info->page);
1374
1375 /* save virt address of first buffer */
1376 va = page_address(rx_info->page) + rx_info->page_offset;
1396d314
SA		 1377
1378 prefetch(va);
1738cd3e
NB		 1379
1380 if (len <= rx_ring->rx_copybreak) {
4265114d
NB		 1381 skb = ena_alloc_skb(rx_ring, false);
1382 if (unlikely(!skb))
1738cd3e 1383 return NULL;
1738cd3e
NB		 1384
1385 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
bf2746e8 1386 "RX allocated small packet. len %d. data_len %d\n",
1738cd3e
NB		 1387 skb->len, skb->data_len);
1388
1389 /* sync this buffer for CPU use */
1390 dma_sync_single_for_cpu(rx_ring->dev,
1391 dma_unmap_addr(&rx_info->ena_buf, paddr),
1392 len,
1393 DMA_FROM_DEVICE);
1394 skb_copy_to_linear_data(skb, va, len);
1395 dma_sync_single_for_device(rx_ring->dev,
1396 dma_unmap_addr(&rx_info->ena_buf, paddr),
1397 len,
1398 DMA_FROM_DEVICE);
1399
1400 skb_put(skb, len);
1401 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
f9172498 1402 rx_ring->free_ids[*next_to_clean] = req_id;
1738cd3e
NB		 1403 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
1404 rx_ring->ring_size);
1405 return skb;
1406 }
1407
4265114d
NB		 1408 skb = ena_alloc_skb(rx_ring, true);
1409 if (unlikely(!skb))
1738cd3e 1410 return NULL;
1738cd3e
NB		 1411
1412 do {
a318c70a 1413 ena_unmap_rx_buff(rx_ring, rx_info);
1738cd3e
NB		 1414
1415 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
ef5b0771 1416 rx_info->page_offset, len, ENA_PAGE_SIZE);
1738cd3e
NB		 1417
1418 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
bf2746e8 1419 "RX skb updated. len %d. data_len %d\n",
1738cd3e
NB		 1420 skb->len, skb->data_len);
1421
1422 rx_info->page = NULL;
ad974bae 1423
f9172498 1424 rx_ring->free_ids[*next_to_clean] = req_id;
1738cd3e
NB		 1425 *next_to_clean =
1426 ENA_RX_RING_IDX_NEXT(*next_to_clean,
1427 rx_ring->ring_size);
1428 if (likely(--descs == 0))
1429 break;
ad974bae
NB		 1430
1431 buf++;
1432 len = ena_bufs[buf].len;
1433 req_id = ena_bufs[buf].req_id;
30623e1e 1434
ad974bae 1435 rx_info = &rx_ring->rx_buffer_info[req_id];
1738cd3e
NB		 1436 } while (1);
1437
1438 return skb;
1439}
1440
1441/* ena_rx_checksum - indicate in skb if hw indicated a good cksum
1442 * @adapter: structure containing adapter specific data
1443 * @ena_rx_ctx: received packet context/metadata
1444 * @skb: skb currently being received and modified
1445 */
c2b54204 1446static void ena_rx_checksum(struct ena_ring *rx_ring,
1738cd3e
NB		 1447 struct ena_com_rx_ctx *ena_rx_ctx,
1448 struct sk_buff *skb)
1449{
1450 /* Rx csum disabled */
1451 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
1452 skb->ip_summed = CHECKSUM_NONE;
1453 return;
1454 }
1455
1456 /* For fragmented packets the checksum isn't valid */
1457 if (ena_rx_ctx->frag) {
1458 skb->ip_summed = CHECKSUM_NONE;
1459 return;
1460 }
1461
1462 /* if IP and error */
1463 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
1464 (ena_rx_ctx->l3_csum_err))) {
1465 /* ipv4 checksum error */
1466 skb->ip_summed = CHECKSUM_NONE;
89dd735e
SA		 1467 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1,
1468 &rx_ring->syncp);
cd7aea18 1469 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1738cd3e
NB		 1470 "RX IPv4 header checksum error\n");
1471 return;
1472 }
1473
1474 /* if TCP/UDP */
1475 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1476 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
1477 if (unlikely(ena_rx_ctx->l4_csum_err)) {
1478 /* TCP/UDP checksum error */
89dd735e
SA		 1479 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1,
1480 &rx_ring->syncp);
cd7aea18 1481 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1738cd3e
NB		 1482 "RX L4 checksum error\n");
1483 skb->ip_summed = CHECKSUM_NONE;
1484 return;
1485 }
1486
cb36bb36
AK		 1487 if (likely(ena_rx_ctx->l4_csum_checked)) {
1488 skb->ip_summed = CHECKSUM_UNNECESSARY;
89dd735e
SA		 1489 ena_increase_stat(&rx_ring->rx_stats.csum_good, 1,
1490 &rx_ring->syncp);
cb36bb36 1491 } else {
89dd735e
SA		 1492 ena_increase_stat(&rx_ring->rx_stats.csum_unchecked, 1,
1493 &rx_ring->syncp);
cb36bb36
AK		 1494 skb->ip_summed = CHECKSUM_NONE;
1495 }
1496 } else {
1497 skb->ip_summed = CHECKSUM_NONE;
1498 return;
1738cd3e 1499 }
cb36bb36 1500
1738cd3e
NB		 1501}
1502
1503static void ena_set_rx_hash(struct ena_ring *rx_ring,
1504 struct ena_com_rx_ctx *ena_rx_ctx,
1505 struct sk_buff *skb)
1506{
1507 enum pkt_hash_types hash_type;
1508
1509 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1510 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1511 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1512
1513 hash_type = PKT_HASH_TYPE_L4;
1514 else
1515 hash_type = PKT_HASH_TYPE_NONE;
1516
1517 /* Override hash type if the packet is fragmented */
1518 if (ena_rx_ctx->frag)
1519 hash_type = PKT_HASH_TYPE_NONE;
1520
1521 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1522 }
1523}
1524
32109c70 1525static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp)
838c93dc
SJ		 1526{
1527 struct ena_rx_buffer *rx_info;
1528 int ret;
1529
1530 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1396d314 1531 xdp->data = page_address(rx_info->page) + rx_info->page_offset;
838c93dc
SJ		 1532 xdp_set_data_meta_invalid(xdp);
1533 xdp->data_hard_start = page_address(rx_info->page);
1534 xdp->data_end = xdp->data + rx_ring->ena_bufs[0].len;
1535 /* If for some reason we received a bigger packet than
1536 * we expect, then we simply drop it
1537 */
1538 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU))
1539 return XDP_DROP;
1540
e8223eef 1541 ret = ena_xdp_execute(rx_ring, xdp);
838c93dc
SJ		 1542
1543 /* The xdp program might expand the headers */
1544 if (ret == XDP_PASS) {
1545 rx_info->page_offset = xdp->data - xdp->data_hard_start;
1546 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data;
1547 }
1548
1549 return ret;
1550}
1738cd3e
NB		 1551/* ena_clean_rx_irq - Cleanup RX irq
1552 * @rx_ring: RX ring to clean
1553 * @napi: napi handler
1554 * @budget: how many packets driver is allowed to clean
1555 *
1556 * Returns the number of cleaned buffers.
1557 */
1558static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1559 u32 budget)
1560{
1561 u16 next_to_clean = rx_ring->next_to_clean;
1738cd3e 1562 struct ena_com_rx_ctx ena_rx_ctx;
68f236df 1563 struct ena_rx_buffer *rx_info;
1738cd3e 1564 struct ena_adapter *adapter;
548c4940 1565 u32 res_budget, work_done;
838c93dc
SJ		 1566 int rx_copybreak_pkt = 0;
1567 int refill_threshold;
1738cd3e
NB		 1568 struct sk_buff *skb;
1569 int refill_required;
838c93dc 1570 struct xdp_buff xdp;
a318c70a 1571 int xdp_flags = 0;
1738cd3e 1572 int total_len = 0;
838c93dc
SJ		 1573 int xdp_verdict;
1574 int rc = 0;
ad974bae 1575 int i;
1738cd3e
NB		 1576
1577 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1578 "%s qid %d\n", __func__, rx_ring->qid);
1579 res_budget = budget;
838c93dc 1580 xdp.rxq = &rx_ring->xdp_rxq;
08fc1cfd 1581 xdp.frame_sz = ENA_PAGE_SIZE;
548c4940 1582
1738cd3e 1583 do {
838c93dc
SJ		 1584 xdp_verdict = XDP_PASS;
1585 skb = NULL;
1738cd3e
NB		 1586 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1587 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1588 ena_rx_ctx.descs = 0;
68f236df 1589 ena_rx_ctx.pkt_offset = 0;
1738cd3e
NB		 1590 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1591 rx_ring->ena_com_io_sq,
1592 &ena_rx_ctx);
1593 if (unlikely(rc))
1594 goto error;
1595
1596 if (unlikely(ena_rx_ctx.descs == 0))
1597 break;
1598
1396d314 1599 /* First descriptor might have an offset set by the device */
68f236df 1600 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1396d314 1601 rx_info->page_offset += ena_rx_ctx.pkt_offset;
68f236df 1602
1738cd3e
NB		 1603 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1604 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1605 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1606 ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1607
838c93dc
SJ		 1608 if (ena_xdp_present_ring(rx_ring))
1609 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp);
1610
1738cd3e 1611 /* allocate skb and fill it */
838c93dc
SJ		 1612 if (xdp_verdict == XDP_PASS)
1613 skb = ena_rx_skb(rx_ring,
1614 rx_ring->ena_bufs,
1615 ena_rx_ctx.descs,
1616 &next_to_clean);
1738cd3e 1617
1738cd3e 1618 if (unlikely(!skb)) {
ad974bae 1619 for (i = 0; i < ena_rx_ctx.descs; i++) {
a318c70a
SA		 1620 int req_id = rx_ring->ena_bufs[i].req_id;
1621
1622 rx_ring->free_ids[next_to_clean] = req_id;
ad974bae
NB		 1623 next_to_clean =
1624 ENA_RX_RING_IDX_NEXT(next_to_clean,
1625 rx_ring->ring_size);
a318c70a
SA		 1626
1627 /* Packets was passed for transmission, unmap it
1628 * from RX side.
1629 */
1630 if (xdp_verdict == XDP_TX || xdp_verdict == XDP_REDIRECT) {
1631 ena_unmap_rx_buff(rx_ring,
1632 &rx_ring->rx_buffer_info[req_id]);
1633 rx_ring->rx_buffer_info[req_id].page = NULL;
1634 }
ad974bae 1635 }
3921a81c 1636 if (xdp_verdict != XDP_PASS) {
a318c70a 1637 xdp_flags |= xdp_verdict;
3921a81c 1638 res_budget--;
838c93dc 1639 continue;
3921a81c 1640 }
1738cd3e
NB		 1641 break;
1642 }
1643
1644 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1645
1646 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1647
1648 skb_record_rx_queue(skb, rx_ring->qid);
1649
1650 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1651 total_len += rx_ring->ena_bufs[0].len;
1652 rx_copybreak_pkt++;
1653 napi_gro_receive(napi, skb);
1654 } else {
1655 total_len += skb->len;
1656 napi_gro_frags(napi);
1657 }
1658
1659 res_budget--;
1660 } while (likely(res_budget));
1661
1662 work_done = budget - res_budget;
1738cd3e
NB		 1663 rx_ring->per_napi_packets += work_done;
1664 u64_stats_update_begin(&rx_ring->syncp);
1665 rx_ring->rx_stats.bytes += total_len;
1666 rx_ring->rx_stats.cnt += work_done;
1667 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1668 u64_stats_update_end(&rx_ring->syncp);
1669
1670 rx_ring->next_to_clean = next_to_clean;
1671
7cfe9a55 1672 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);
0574bb80
AK		 1673 refill_threshold =
1674 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1675 ENA_RX_REFILL_THRESH_PACKET);
1738cd3e
NB		 1676
1677 /* Optimization, try to batch new rx buffers */
1678 if (refill_required > refill_threshold) {
1679 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1680 ena_refill_rx_bufs(rx_ring, refill_required);
1681 }
1682
a318c70a
SA		 1683 if (xdp_flags & XDP_REDIRECT)
1684 xdp_do_flush_map();
1685
1738cd3e
NB		 1686 return work_done;
1687
1688error:
1689 adapter = netdev_priv(rx_ring->netdev);
1690
5b7022cf 1691 if (rc == -ENOSPC) {
89dd735e
SA		 1692 ena_increase_stat(&rx_ring->rx_stats.bad_desc_num, 1,
1693 &rx_ring->syncp);
5b7022cf
SA		 1694 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1695 } else {
89dd735e
SA		 1696 ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1,
1697 &rx_ring->syncp);
5b7022cf
SA		 1698 adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
1699 }
1738cd3e 1700
1738cd3e
NB		 1701 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1702
1703 return 0;
1704}
1705
282faf61 1706static void ena_dim_work(struct work_struct *w)
1738cd3e 1707{
282faf61
AK		 1708 struct dim *dim = container_of(w, struct dim, work);
1709 struct dim_cq_moder cur_moder =
1710 net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1711 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim);
1712
1713 ena_napi->rx_ring->smoothed_interval = cur_moder.usec;
1714 dim->state = DIM_START_MEASURE;
1715}
1716
1717static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi)
1718{
1719 struct dim_sample dim_sample;
1720 struct ena_ring *rx_ring = ena_napi->rx_ring;
1721
1722 if (!rx_ring->per_napi_packets)
1723 return;
1724
1725 rx_ring->non_empty_napi_events++;
1726
1727 dim_update_sample(rx_ring->non_empty_napi_events,
1728 rx_ring->rx_stats.cnt,
1729 rx_ring->rx_stats.bytes,
1730 &dim_sample);
1731
1732 net_dim(&ena_napi->dim, dim_sample);
1733
1738cd3e 1734 rx_ring->per_napi_packets = 0;
1738cd3e
NB		 1735}
1736
c2b54204 1737static void ena_unmask_interrupt(struct ena_ring *tx_ring,
418df30f
NB		 1738 struct ena_ring *rx_ring)
1739{
1740 struct ena_eth_io_intr_reg intr_reg;
548c4940
SJ		 1741 u32 rx_interval = 0;
1742 /* Rx ring can be NULL when for XDP tx queues which don't have an
1743 * accompanying rx_ring pair.
1744 */
1745 if (rx_ring)
1746 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ?
1747 rx_ring->smoothed_interval :
1748 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev);
418df30f
NB		 1749
1750 /* Update intr register: rx intr delay,
1751 * tx intr delay and interrupt unmask
1752 */
1753 ena_com_update_intr_reg(&intr_reg,
7b8a2878 1754 rx_interval,
418df30f
NB		 1755 tx_ring->smoothed_interval,
1756 true);
1757
89dd735e
SA		 1758 ena_increase_stat(&tx_ring->tx_stats.unmask_interrupt, 1,
1759 &tx_ring->syncp);
bf2746e8 1760
418df30f
NB		 1761 /* It is a shared MSI-X.
1762 * Tx and Rx CQ have pointer to it.
1763 * So we use one of them to reach the intr reg
548c4940 1764 * The Tx ring is used because the rx_ring is NULL for XDP queues
418df30f 1765 */
548c4940 1766 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg);
418df30f
NB		 1767}
1768
c2b54204 1769static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1738cd3e
NB		 1770 struct ena_ring *rx_ring)
1771{
1772 int cpu = get_cpu();
1773 int numa_node;
1774
1775 /* Check only one ring since the 2 rings are running on the same cpu */
1776 if (likely(tx_ring->cpu == cpu))
1777 goto out;
1778
1779 numa_node = cpu_to_node(cpu);
1780 put_cpu();
1781
1782 if (numa_node != NUMA_NO_NODE) {
1783 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
548c4940
SJ		 1784 if (rx_ring)
1785 ena_com_update_numa_node(rx_ring->ena_com_io_cq,
1786 numa_node);
1738cd3e
NB		 1787 }
1788
1789 tx_ring->cpu = cpu;
548c4940
SJ		 1790 if (rx_ring)
1791 rx_ring->cpu = cpu;
1738cd3e
NB		 1792
1793 return;
1794out:
1795 put_cpu();
1796}
1797
548c4940
SJ		 1798static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget)
1799{
1800 u32 total_done = 0;
1801 u16 next_to_clean;
1802 u32 tx_bytes = 0;
1803 int tx_pkts = 0;
1804 u16 req_id;
1805 int rc;
1806
1807 if (unlikely(!xdp_ring))
1808 return 0;
1809 next_to_clean = xdp_ring->next_to_clean;
1810
1811 while (tx_pkts < budget) {
1812 struct ena_tx_buffer *tx_info;
1813 struct xdp_frame *xdpf;
1814
1815 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq,
1816 &req_id);
1817 if (rc)
1818 break;
1819
1820 rc = validate_xdp_req_id(xdp_ring, req_id);
1821 if (rc)
1822 break;
1823
1824 tx_info = &xdp_ring->tx_buffer_info[req_id];
1825 xdpf = tx_info->xdpf;
1826
1827 tx_info->xdpf = NULL;
1828 tx_info->last_jiffies = 0;
1829 ena_unmap_tx_buff(xdp_ring, tx_info);
1830
1831 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1832 "tx_poll: q %d skb %p completed\n", xdp_ring->qid,
1833 xdpf);
1834
1835 tx_bytes += xdpf->len;
1836 tx_pkts++;
1837 total_done += tx_info->tx_descs;
1838
1839 __free_page(tx_info->xdp_rx_page);
1840 xdp_ring->free_ids[next_to_clean] = req_id;
1841 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1842 xdp_ring->ring_size);
1843 }
1844
1845 xdp_ring->next_to_clean = next_to_clean;
1846 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done);
1847 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq);
1848
1849 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1850 "tx_poll: q %d done. total pkts: %d\n",
1851 xdp_ring->qid, tx_pkts);
1852
1853 return tx_pkts;
1854}
1855
1738cd3e
NB		 1856static int ena_io_poll(struct napi_struct *napi, int budget)
1857{
1858 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1859 struct ena_ring *tx_ring, *rx_ring;
24dee0c7
NB		 1860 int tx_work_done;
1861 int rx_work_done = 0;
1738cd3e
NB		 1862 int tx_budget;
1863 int napi_comp_call = 0;
1864 int ret;
1865
1866 tx_ring = ena_napi->tx_ring;
1867 rx_ring = ena_napi->rx_ring;
1868
913b0bfd
SJ		 1869 tx_ring->first_interrupt = ena_napi->first_interrupt;
1870 rx_ring->first_interrupt = ena_napi->first_interrupt;
1871
1738cd3e
NB		 1872 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1873
3f6159db
NB		 1874 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1875 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1738cd3e
NB		 1876 napi_complete_done(napi, 0);
1877 return 0;
1878 }
1879
1880 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
24dee0c7
NB		 1881 /* On netpoll the budget is zero and the handler should only clean the
1882 * tx completions.
1883 */
1884 if (likely(budget))
1885 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1738cd3e 1886
b1669c9f
NB		 1887 /* If the device is about to reset or down, avoid unmask
1888 * the interrupt and return 0 so NAPI won't reschedule
1889 */
1890 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1891 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1892 napi_complete_done(napi, 0);
1893 ret = 0;
1738cd3e 1894
b1669c9f 1895 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1738cd3e 1896 napi_comp_call = 1;
1738cd3e 1897
b1669c9f
NB		 1898 /* Update numa and unmask the interrupt only when schedule
1899 * from the interrupt context (vs from sk_busy_loop)
1738cd3e 1900 */
1e5ae350
AK		 1901 if (napi_complete_done(napi, rx_work_done) &&
1902 READ_ONCE(ena_napi->interrupts_masked)) {
1903 smp_rmb(); /* make sure interrupts_masked is read */
1904 WRITE_ONCE(ena_napi->interrupts_masked, false);
282faf61
AK		 1905 /* We apply adaptive moderation on Rx path only.
1906 * Tx uses static interrupt moderation.
1907 */
b1669c9f 1908 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
282faf61 1909 ena_adjust_adaptive_rx_intr_moderation(ena_napi);
b1669c9f 1910
418df30f 1911 ena_unmask_interrupt(tx_ring, rx_ring);
b1669c9f 1912 }
1738cd3e 1913
1738cd3e
NB		 1914 ena_update_ring_numa_node(tx_ring, rx_ring);
1915
1916 ret = rx_work_done;
1917 } else {
1918 ret = budget;
1919 }
1920
1921 u64_stats_update_begin(&tx_ring->syncp);
1922 tx_ring->tx_stats.napi_comp += napi_comp_call;
1923 tx_ring->tx_stats.tx_poll++;
1924 u64_stats_update_end(&tx_ring->syncp);
1925
1926 return ret;
1927}
1928
1929static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1930{
1931 struct ena_adapter *adapter = (struct ena_adapter *)data;
1932
1933 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1934
1935 /* Don't call the aenq handler before probe is done */
1936 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1937 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1938
1939 return IRQ_HANDLED;
1940}
1941
1942/* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1943 * @irq: interrupt number
1944 * @data: pointer to a network interface private napi device structure
1945 */
1946static irqreturn_t ena_intr_msix_io(int irq, void *data)
1947{
1948 struct ena_napi *ena_napi = data;
1949
913b0bfd 1950 ena_napi->first_interrupt = true;
8510e1a3 1951
1e5ae350
AK		 1952 WRITE_ONCE(ena_napi->interrupts_masked, true);
1953 smp_wmb(); /* write interrupts_masked before calling napi */
1954
e745dafa 1955 napi_schedule_irqoff(&ena_napi->napi);
1738cd3e
NB		 1956
1957 return IRQ_HANDLED;
1958}
1959
06443684
NB		 1960/* Reserve a single MSI-X vector for management (admin + aenq).
1961 * plus reserve one vector for each potential io queue.
1962 * the number of potential io queues is the minimum of what the device
1963 * supports and the number of vCPUs.
1964 */
4d192660 1965static int ena_enable_msix(struct ena_adapter *adapter)
1738cd3e 1966{
06443684
NB		 1967 int msix_vecs, irq_cnt;
1968
1969 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1970 netif_err(adapter, probe, adapter->netdev,
1971 "Error, MSI-X is already enabled\n");
1972 return -EPERM;
1973 }
1738cd3e
NB		 1974
1975 /* Reserved the max msix vectors we might need */
ce1f3521 1976 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues);
1738cd3e 1977 netif_dbg(adapter, probe, adapter->netdev,
bf2746e8 1978 "Trying to enable MSI-X, vectors %d\n", msix_vecs);
1738cd3e 1979
06443684
NB		 1980 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
1981 msix_vecs, PCI_IRQ_MSIX);
1982
1983 if (irq_cnt < 0) {
1738cd3e 1984 netif_err(adapter, probe, adapter->netdev,
06443684 1985 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
1738cd3e
NB		 1986 return -ENOSPC;
1987 }
1988
06443684
NB		 1989 if (irq_cnt != msix_vecs) {
1990 netif_notice(adapter, probe, adapter->netdev,
bf2746e8 1991 "Enable only %d MSI-X (out of %d), reduce the number of queues\n",
06443684 1992 irq_cnt, msix_vecs);
faa615f9 1993 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
1738cd3e
NB		 1994 }
1995
06443684
NB		 1996 if (ena_init_rx_cpu_rmap(adapter))
1997 netif_warn(adapter, probe, adapter->netdev,
1998 "Failed to map IRQs to CPUs\n");
1999
2000 adapter->msix_vecs = irq_cnt;
2001 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
1738cd3e
NB		 2002
2003 return 0;
2004}
2005
2006static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
2007{
2008 u32 cpu;
2009
2010 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
2011 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
2012 pci_name(adapter->pdev));
2013 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
2014 ena_intr_msix_mgmnt;
2015 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
2016 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
da6f4cf5 2017 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
1738cd3e
NB		 2018 cpu = cpumask_first(cpu_online_mask);
2019 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
2020 cpumask_set_cpu(cpu,
2021 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
2022}
2023
2024static void ena_setup_io_intr(struct ena_adapter *adapter)
2025{
2026 struct net_device *netdev;
2027 int irq_idx, i, cpu;
548c4940 2028 int io_queue_count;
1738cd3e
NB		 2029
2030 netdev = adapter->netdev;
548c4940 2031 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
1738cd3e 2032
548c4940 2033 for (i = 0; i < io_queue_count; i++) {
1738cd3e
NB		 2034 irq_idx = ENA_IO_IRQ_IDX(i);
2035 cpu = i % num_online_cpus();
2036
2037 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
2038 "%s-Tx-Rx-%d", netdev->name, i);
2039 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
2040 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
2041 adapter->irq_tbl[irq_idx].vector =
da6f4cf5 2042 pci_irq_vector(adapter->pdev, irq_idx);
1738cd3e
NB		 2043 adapter->irq_tbl[irq_idx].cpu = cpu;
2044
2045 cpumask_set_cpu(cpu,
2046 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
2047 }
2048}
2049
2050static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
2051{
2052 unsigned long flags = 0;
2053 struct ena_irq *irq;
2054 int rc;
2055
2056 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2057 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2058 irq->data);
2059 if (rc) {
2060 netif_err(adapter, probe, adapter->netdev,
bf2746e8 2061 "Failed to request admin irq\n");
1738cd3e
NB		 2062 return rc;
2063 }
2064
2065 netif_dbg(adapter, probe, adapter->netdev,
bf2746e8 2066 "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
1738cd3e
NB		 2067 irq->affinity_hint_mask.bits[0], irq->vector);
2068
2069 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2070
2071 return rc;
2072}
2073
2074static int ena_request_io_irq(struct ena_adapter *adapter)
2075{
e02ae6ed 2076 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
1738cd3e
NB		 2077 unsigned long flags = 0;
2078 struct ena_irq *irq;
2079 int rc = 0, i, k;
2080
06443684
NB		 2081 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
2082 netif_err(adapter, ifup, adapter->netdev,
2083 "Failed to request I/O IRQ: MSI-X is not enabled\n");
2084 return -EINVAL;
2085 }
2086
e02ae6ed 2087 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
1738cd3e
NB		 2088 irq = &adapter->irq_tbl[i];
2089 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2090 irq->data);
2091 if (rc) {
2092 netif_err(adapter, ifup, adapter->netdev,
2093 "Failed to request I/O IRQ. index %d rc %d\n",
2094 i, rc);
2095 goto err;
2096 }
2097
2098 netif_dbg(adapter, ifup, adapter->netdev,
bf2746e8 2099 "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
1738cd3e
NB		 2100 i, irq->affinity_hint_mask.bits[0], irq->vector);
2101
2102 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2103 }
2104
2105 return rc;
2106
2107err:
2108 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
2109 irq = &adapter->irq_tbl[k];
2110 free_irq(irq->vector, irq->data);
2111 }
2112
2113 return rc;
2114}
2115
2116static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
2117{
2118 struct ena_irq *irq;
2119
2120 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2121 synchronize_irq(irq->vector);
2122 irq_set_affinity_hint(irq->vector, NULL);
2123 free_irq(irq->vector, irq->data);
2124}
2125
2126static void ena_free_io_irq(struct ena_adapter *adapter)
2127{
e02ae6ed 2128 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
1738cd3e
NB		 2129 struct ena_irq *irq;
2130 int i;
2131
2132#ifdef CONFIG_RFS_ACCEL
2133 if (adapter->msix_vecs >= 1) {
2134 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
2135 adapter->netdev->rx_cpu_rmap = NULL;
2136 }
2137#endif /* CONFIG_RFS_ACCEL */
2138
e02ae6ed 2139 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
1738cd3e
NB		 2140 irq = &adapter->irq_tbl[i];
2141 irq_set_affinity_hint(irq->vector, NULL);
2142 free_irq(irq->vector, irq->data);
2143 }
2144}
2145
06443684
NB		 2146static void ena_disable_msix(struct ena_adapter *adapter)
2147{
2148 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
2149 pci_free_irq_vectors(adapter->pdev);
2150}
2151
1738cd3e
NB		 2152static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
2153{
e02ae6ed 2154 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
1738cd3e
NB		 2155 int i;
2156
2157 if (!netif_running(adapter->netdev))
2158 return;
2159
e02ae6ed 2160 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++)
1738cd3e
NB		 2161 synchronize_irq(adapter->irq_tbl[i].vector);
2162}
2163
548c4940
SJ		 2164static void ena_del_napi_in_range(struct ena_adapter *adapter,
2165 int first_index,
2166 int count)
1738cd3e
NB		 2167{
2168 int i;
2169
548c4940 2170 for (i = first_index; i < first_index + count; i++) {
8b147f6f
SA		 2171 netif_napi_del(&adapter->ena_napi[i].napi);
2172
2173 WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) &&
2174 adapter->ena_napi[i].xdp_ring);
548c4940 2175 }
1738cd3e
NB		 2176}
2177
548c4940
SJ		 2178static void ena_init_napi_in_range(struct ena_adapter *adapter,
2179 int first_index, int count)
1738cd3e 2180{
1738cd3e
NB		 2181 int i;
2182
548c4940 2183 for (i = first_index; i < first_index + count; i++) {
d89d8d4d 2184 struct ena_napi *napi = &adapter->ena_napi[i];
1738cd3e
NB		 2185
2186 netif_napi_add(adapter->netdev,
d89d8d4d 2187 &napi->napi,
548c4940 2188 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll,
1738cd3e 2189 ENA_NAPI_BUDGET);
548c4940
SJ		 2190
2191 if (!ENA_IS_XDP_INDEX(adapter, i)) {
2192 napi->rx_ring = &adapter->rx_ring[i];
2193 napi->tx_ring = &adapter->tx_ring[i];
2194 } else {
2195 napi->xdp_ring = &adapter->tx_ring[i];
2196 }
1738cd3e
NB		 2197 napi->qid = i;
2198 }
2199}
2200
548c4940
SJ		 2201static void ena_napi_disable_in_range(struct ena_adapter *adapter,
2202 int first_index,
2203 int count)
1738cd3e
NB		 2204{
2205 int i;
2206
548c4940 2207 for (i = first_index; i < first_index + count; i++)
1738cd3e
NB		 2208 napi_disable(&adapter->ena_napi[i].napi);
2209}
2210
548c4940
SJ		 2211static void ena_napi_enable_in_range(struct ena_adapter *adapter,
2212 int first_index,
2213 int count)
1738cd3e
NB		 2214{
2215 int i;
2216
548c4940 2217 for (i = first_index; i < first_index + count; i++)
1738cd3e
NB		 2218 napi_enable(&adapter->ena_napi[i].napi);
2219}
2220
1738cd3e
NB		 2221/* Configure the Rx forwarding */
2222static int ena_rss_configure(struct ena_adapter *adapter)
2223{
2224 struct ena_com_dev *ena_dev = adapter->ena_dev;
2225 int rc;
2226
2227 /* In case the RSS table wasn't initialized by probe */
2228 if (!ena_dev->rss.tbl_log_size) {
2229 rc = ena_rss_init_default(adapter);
d1497638 2230 if (rc && (rc != -EOPNOTSUPP)) {
1738cd3e 2231 netif_err(adapter, ifup, adapter->netdev,
46143e58 2232 "Failed to init RSS rc: %d\n", rc);
1738cd3e
NB		 2233 return rc;
2234 }
2235 }
2236
2237 /* Set indirect table */
2238 rc = ena_com_indirect_table_set(ena_dev);
d1497638 2239 if (unlikely(rc && rc != -EOPNOTSUPP))
1738cd3e
NB		 2240 return rc;
2241
2242 /* Configure hash function (if supported) */
2243 rc = ena_com_set_hash_function(ena_dev);
d1497638 2244 if (unlikely(rc && (rc != -EOPNOTSUPP)))
1738cd3e
NB		 2245 return rc;
2246
2247 /* Configure hash inputs (if supported) */
2248 rc = ena_com_set_hash_ctrl(ena_dev);
d1497638 2249 if (unlikely(rc && (rc != -EOPNOTSUPP)))
1738cd3e
NB		 2250 return rc;
2251
2252 return 0;
2253}
2254
2255static int ena_up_complete(struct ena_adapter *adapter)
2256{
7853b49c 2257 int rc;
1738cd3e
NB		 2258
2259 rc = ena_rss_configure(adapter);
2260 if (rc)
2261 return rc;
2262
1738cd3e
NB		 2263 ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
2264
2265 ena_refill_all_rx_bufs(adapter);
2266
2267 /* enable transmits */
2268 netif_tx_start_all_queues(adapter->netdev);
2269
548c4940
SJ		 2270 ena_napi_enable_in_range(adapter,
2271 0,
2272 adapter->xdp_num_queues + adapter->num_io_queues);
1738cd3e 2273
1738cd3e
NB		 2274 return 0;
2275}
2276
2277static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
2278{
38005ca8 2279 struct ena_com_create_io_ctx ctx;
1738cd3e
NB		 2280 struct ena_com_dev *ena_dev;
2281 struct ena_ring *tx_ring;
2282 u32 msix_vector;
2283 u16 ena_qid;
2284 int rc;
2285
2286 ena_dev = adapter->ena_dev;
2287
2288 tx_ring = &adapter->tx_ring[qid];
2289 msix_vector = ENA_IO_IRQ_IDX(qid);
2290 ena_qid = ENA_IO_TXQ_IDX(qid);
2291
38005ca8
AK		 2292 memset(&ctx, 0x0, sizeof(ctx));
2293
1738cd3e
NB		 2294 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
2295 ctx.qid = ena_qid;
2296 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
2297 ctx.msix_vector = msix_vector;
13ca32a6 2298 ctx.queue_size = tx_ring->ring_size;
1738cd3e
NB		 2299 ctx.numa_node = cpu_to_node(tx_ring->cpu);
2300
2301 rc = ena_com_create_io_queue(ena_dev, &ctx);
2302 if (rc) {
2303 netif_err(adapter, ifup, adapter->netdev,
2304 "Failed to create I/O TX queue num %d rc: %d\n",
46143e58 2305 qid, rc);
1738cd3e
NB		 2306 return rc;
2307 }
2308
2309 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2310 &tx_ring->ena_com_io_sq,
2311 &tx_ring->ena_com_io_cq);
2312 if (rc) {
2313 netif_err(adapter, ifup, adapter->netdev,
2314 "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
2315 qid, rc);
2316 ena_com_destroy_io_queue(ena_dev, ena_qid);
2d2c600a 2317 return rc;
1738cd3e
NB		 2318 }
2319
2320 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
2321 return rc;
2322}
2323
548c4940
SJ		 2324static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
2325 int first_index, int count)
1738cd3e
NB		 2326{
2327 struct ena_com_dev *ena_dev = adapter->ena_dev;
2328 int rc, i;
2329
548c4940 2330 for (i = first_index; i < first_index + count; i++) {
1738cd3e
NB		 2331 rc = ena_create_io_tx_queue(adapter, i);
2332 if (rc)
2333 goto create_err;
2334 }
2335
2336 return 0;
2337
2338create_err:
548c4940 2339 while (i-- > first_index)
1738cd3e
NB		 2340 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
2341
2342 return rc;
2343}
2344
2345static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
2346{
2347 struct ena_com_dev *ena_dev;
38005ca8 2348 struct ena_com_create_io_ctx ctx;
1738cd3e
NB		 2349 struct ena_ring *rx_ring;
2350 u32 msix_vector;
2351 u16 ena_qid;
2352 int rc;
2353
2354 ena_dev = adapter->ena_dev;
2355
2356 rx_ring = &adapter->rx_ring[qid];
2357 msix_vector = ENA_IO_IRQ_IDX(qid);
2358 ena_qid = ENA_IO_RXQ_IDX(qid);
2359
38005ca8
AK		 2360 memset(&ctx, 0x0, sizeof(ctx));
2361
1738cd3e
NB		 2362 ctx.qid = ena_qid;
2363 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
2364 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2365 ctx.msix_vector = msix_vector;
13ca32a6 2366 ctx.queue_size = rx_ring->ring_size;
1738cd3e
NB		 2367 ctx.numa_node = cpu_to_node(rx_ring->cpu);
2368
2369 rc = ena_com_create_io_queue(ena_dev, &ctx);
2370 if (rc) {
2371 netif_err(adapter, ifup, adapter->netdev,
2372 "Failed to create I/O RX queue num %d rc: %d\n",
2373 qid, rc);
2374 return rc;
2375 }
2376
2377 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2378 &rx_ring->ena_com_io_sq,
2379 &rx_ring->ena_com_io_cq);
2380 if (rc) {
2381 netif_err(adapter, ifup, adapter->netdev,
2382 "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
2383 qid, rc);
838c93dc 2384 goto err;
1738cd3e
NB		 2385 }
2386
2387 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
2388
838c93dc
SJ		 2389 return rc;
2390err:
2391 ena_com_destroy_io_queue(ena_dev, ena_qid);
1738cd3e
NB		 2392 return rc;
2393}
2394
2395static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
2396{
2397 struct ena_com_dev *ena_dev = adapter->ena_dev;
2398 int rc, i;
2399
faa615f9 2400 for (i = 0; i < adapter->num_io_queues; i++) {
1738cd3e
NB		 2401 rc = ena_create_io_rx_queue(adapter, i);
2402 if (rc)
2403 goto create_err;
282faf61 2404 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work);
1738cd3e
NB		 2405 }
2406
2407 return 0;
2408
2409create_err:
282faf61
AK		 2410 while (i--) {
2411 cancel_work_sync(&adapter->ena_napi[i].dim.work);
1738cd3e 2412 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
282faf61 2413 }
1738cd3e
NB		 2414
2415 return rc;
2416}
2417
13ca32a6 2418static void set_io_rings_size(struct ena_adapter *adapter,
548c4940
SJ		 2419 int new_tx_size,
2420 int new_rx_size)
13ca32a6
SJ		 2421{
2422 int i;
2423
faa615f9 2424 for (i = 0; i < adapter->num_io_queues; i++) {
13ca32a6
SJ		 2425 adapter->tx_ring[i].ring_size = new_tx_size;
2426 adapter->rx_ring[i].ring_size = new_rx_size;
2427 }
2428}
2429
2430/* This function allows queue allocation to backoff when the system is
2431 * low on memory. If there is not enough memory to allocate io queues
2432 * the driver will try to allocate smaller queues.
2433 *
2434 * The backoff algorithm is as follows:
2435 * 1. Try to allocate TX and RX and if successful.
2436 * 1.1. return success
2437 *
2438 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same).
2439 *
2440 * 3. If TX or RX is smaller than 256
2441 * 3.1. return failure.
2442 * 4. else
2443 * 4.1. go back to 1.
2444 */
2445static int create_queues_with_size_backoff(struct ena_adapter *adapter)
2446{
2447 int rc, cur_rx_ring_size, cur_tx_ring_size;
2448 int new_rx_ring_size, new_tx_ring_size;
2449
2450 /* current queue sizes might be set to smaller than the requested
2451 * ones due to past queue allocation failures.
2452 */
2453 set_io_rings_size(adapter, adapter->requested_tx_ring_size,
46143e58 2454 adapter->requested_rx_ring_size);
13ca32a6
SJ		 2455
2456 while (1) {
548c4940
SJ		 2457 if (ena_xdp_present(adapter)) {
2458 rc = ena_setup_and_create_all_xdp_queues(adapter);
2459
2460 if (rc)
2461 goto err_setup_tx;
2462 }
2463 rc = ena_setup_tx_resources_in_range(adapter,
2464 0,
2465 adapter->num_io_queues);
13ca32a6
SJ		 2466 if (rc)
2467 goto err_setup_tx;
2468
548c4940
SJ		 2469 rc = ena_create_io_tx_queues_in_range(adapter,
2470 0,
2471 adapter->num_io_queues);
13ca32a6
SJ		 2472 if (rc)
2473 goto err_create_tx_queues;
2474
2475 rc = ena_setup_all_rx_resources(adapter);
2476 if (rc)
2477 goto err_setup_rx;
2478
2479 rc = ena_create_all_io_rx_queues(adapter);
2480 if (rc)
2481 goto err_create_rx_queues;
2482
2483 return 0;
2484
2485err_create_rx_queues:
2486 ena_free_all_io_rx_resources(adapter);
2487err_setup_rx:
2488 ena_destroy_all_tx_queues(adapter);
2489err_create_tx_queues:
2490 ena_free_all_io_tx_resources(adapter);
2491err_setup_tx:
2492 if (rc != -ENOMEM) {
2493 netif_err(adapter, ifup, adapter->netdev,
2494 "Queue creation failed with error code %d\n",
46143e58 2495 rc);
13ca32a6
SJ		 2496 return rc;
2497 }
2498
2499 cur_tx_ring_size = adapter->tx_ring[0].ring_size;
2500 cur_rx_ring_size = adapter->rx_ring[0].ring_size;
2501
2502 netif_err(adapter, ifup, adapter->netdev,
2503 "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
2504 cur_tx_ring_size, cur_rx_ring_size);
2505
2506 new_tx_ring_size = cur_tx_ring_size;
2507 new_rx_ring_size = cur_rx_ring_size;
2508
2509 /* Decrease the size of the larger queue, or
2510 * decrease both if they are the same size.
2511 */
2512 if (cur_rx_ring_size <= cur_tx_ring_size)
2513 new_tx_ring_size = cur_tx_ring_size / 2;
2514 if (cur_rx_ring_size >= cur_tx_ring_size)
2515 new_rx_ring_size = cur_rx_ring_size / 2;
2516
3e5bfb18 2517 if (new_tx_ring_size < ENA_MIN_RING_SIZE ||
46143e58 2518 new_rx_ring_size < ENA_MIN_RING_SIZE) {
13ca32a6
SJ		 2519 netif_err(adapter, ifup, adapter->netdev,
2520 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",
2521 ENA_MIN_RING_SIZE);
2522 return rc;
2523 }
2524
2525 netif_err(adapter, ifup, adapter->netdev,
2526 "Retrying queue creation with sizes TX=%d, RX=%d\n",
2527 new_tx_ring_size,
2528 new_rx_ring_size);
2529
2530 set_io_rings_size(adapter, new_tx_ring_size,
2531 new_rx_ring_size);
2532 }
2533}
2534
1738cd3e
NB		 2535static int ena_up(struct ena_adapter *adapter)
2536{
548c4940 2537 int io_queue_count, rc, i;
1738cd3e 2538
f0525298 2539 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__);
1738cd3e 2540
548c4940 2541 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
1738cd3e
NB		 2542 ena_setup_io_intr(adapter);
2543
78a55d05
AK		 2544 /* napi poll functions should be initialized before running
2545 * request_irq(), to handle a rare condition where there is a pending
2546 * interrupt, causing the ISR to fire immediately while the poll
2547 * function wasn't set yet, causing a null dereference
2548 */
548c4940 2549 ena_init_napi_in_range(adapter, 0, io_queue_count);
78a55d05 2550
1738cd3e
NB		 2551 rc = ena_request_io_irq(adapter);
2552 if (rc)
2553 goto err_req_irq;
2554
13ca32a6 2555 rc = create_queues_with_size_backoff(adapter);
1738cd3e 2556 if (rc)
13ca32a6 2557 goto err_create_queues_with_backoff;
1738cd3e
NB		 2558
2559 rc = ena_up_complete(adapter);
2560 if (rc)
2561 goto err_up;
2562
2563 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2564 netif_carrier_on(adapter->netdev);
2565
89dd735e
SA		 2566 ena_increase_stat(&adapter->dev_stats.interface_up, 1,
2567 &adapter->syncp);
1738cd3e
NB		 2568
2569 set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2570
7853b49c 2571 /* Enable completion queues interrupt */
faa615f9 2572 for (i = 0; i < adapter->num_io_queues; i++)
7853b49c
NB		 2573 ena_unmask_interrupt(&adapter->tx_ring[i],
2574 &adapter->rx_ring[i]);
2575
2576 /* schedule napi in case we had pending packets
2577 * from the last time we disable napi
2578 */
548c4940 2579 for (i = 0; i < io_queue_count; i++)
7853b49c
NB		 2580 napi_schedule(&adapter->ena_napi[i].napi);
2581
1738cd3e
NB		 2582 return rc;
2583
2584err_up:
1738cd3e 2585 ena_destroy_all_tx_queues(adapter);
1738cd3e 2586 ena_free_all_io_tx_resources(adapter);
13ca32a6
SJ		 2587 ena_destroy_all_rx_queues(adapter);
2588 ena_free_all_io_rx_resources(adapter);
2589err_create_queues_with_backoff:
1738cd3e
NB		 2590 ena_free_io_irq(adapter);
2591err_req_irq:
548c4940 2592 ena_del_napi_in_range(adapter, 0, io_queue_count);
1738cd3e
NB		 2593
2594 return rc;
2595}
2596
2597static void ena_down(struct ena_adapter *adapter)
2598{
548c4940
SJ		 2599 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2600
1738cd3e
NB		 2601 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
2602
2603 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2604
89dd735e
SA		 2605 ena_increase_stat(&adapter->dev_stats.interface_down, 1,
2606 &adapter->syncp);
1738cd3e 2607
1738cd3e
NB		 2608 netif_carrier_off(adapter->netdev);
2609 netif_tx_disable(adapter->netdev);
2610
3f6159db 2611 /* After this point the napi handler won't enable the tx queue */
548c4940 2612 ena_napi_disable_in_range(adapter, 0, io_queue_count);
3f6159db 2613
1738cd3e 2614 /* After destroy the queue there won't be any new interrupts */
3f6159db
NB		 2615
2616 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
2617 int rc;
2618
e2eed0e3 2619 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
3f6159db 2620 if (rc)
f0525298
SA		 2621 netif_err(adapter, ifdown, adapter->netdev,
2622 "Device reset failed\n");
58a54b9c
AK		 2623 /* stop submitting admin commands on a device that was reset */
2624 ena_com_set_admin_running_state(adapter->ena_dev, false);
3f6159db
NB		 2625 }
2626
1738cd3e
NB		 2627 ena_destroy_all_io_queues(adapter);
2628
2629 ena_disable_io_intr_sync(adapter);
2630 ena_free_io_irq(adapter);
548c4940 2631 ena_del_napi_in_range(adapter, 0, io_queue_count);
1738cd3e
NB		 2632
2633 ena_free_all_tx_bufs(adapter);
2634 ena_free_all_rx_bufs(adapter);
2635 ena_free_all_io_tx_resources(adapter);
2636 ena_free_all_io_rx_resources(adapter);
2637}
2638
2639/* ena_open - Called when a network interface is made active
2640 * @netdev: network interface device structure
2641 *
2642 * Returns 0 on success, negative value on failure
2643 *
2644 * The open entry point is called when a network interface is made
2645 * active by the system (IFF_UP). At this point all resources needed
2646 * for transmit and receive operations are allocated, the interrupt
2647 * handler is registered with the OS, the watchdog timer is started,
2648 * and the stack is notified that the interface is ready.
2649 */
2650static int ena_open(struct net_device *netdev)
2651{
2652 struct ena_adapter *adapter = netdev_priv(netdev);
2653 int rc;
2654
2655 /* Notify the stack of the actual queue counts. */
faa615f9 2656 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues);
1738cd3e
NB		 2657 if (rc) {
2658 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
2659 return rc;
2660 }
2661
faa615f9 2662 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues);
1738cd3e
NB		 2663 if (rc) {
2664 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
2665 return rc;
2666 }
2667
2668 rc = ena_up(adapter);
2669 if (rc)
2670 return rc;
2671
2672 return rc;
2673}
2674
2675/* ena_close - Disables a network interface
2676 * @netdev: network interface device structure
2677 *
2678 * Returns 0, this is not allowed to fail
2679 *
2680 * The close entry point is called when an interface is de-activated
2681 * by the OS. The hardware is still under the drivers control, but
2682 * needs to be disabled. A global MAC reset is issued to stop the
2683 * hardware, and all transmit and receive resources are freed.
2684 */
2685static int ena_close(struct net_device *netdev)
2686{
2687 struct ena_adapter *adapter = netdev_priv(netdev);
2688
2689 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
2690
58a54b9c
AK		 2691 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2692 return 0;
2693
1738cd3e
NB		 2694 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2695 ena_down(adapter);
2696
ee4552aa
NB		 2697 /* Check for device status and issue reset if needed*/
2698 check_for_admin_com_state(adapter);
2699 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2700 netif_err(adapter, ifdown, adapter->netdev,
2701 "Destroy failure, restarting device\n");
2702 ena_dump_stats_to_dmesg(adapter);
2703 /* rtnl lock already obtained in dev_ioctl() layer */
cfa324a5 2704 ena_destroy_device(adapter, false);
ee4552aa
NB		 2705 ena_restore_device(adapter);
2706 }
2707
1738cd3e
NB		 2708 return 0;
2709}
2710
eece4d2a
SJ		 2711int ena_update_queue_sizes(struct ena_adapter *adapter,
2712 u32 new_tx_size,
2713 u32 new_rx_size)
2714{
2413ea97 2715 bool dev_was_up;
eece4d2a 2716
2413ea97 2717 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
eece4d2a
SJ		 2718 ena_close(adapter->netdev);
2719 adapter->requested_tx_ring_size = new_tx_size;
2720 adapter->requested_rx_ring_size = new_rx_size;
548c4940
SJ		 2721 ena_init_io_rings(adapter,
2722 0,
2723 adapter->xdp_num_queues +
2724 adapter->num_io_queues);
2413ea97
SJ		 2725 return dev_was_up ? ena_up(adapter) : 0;
2726}
2727
2728int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count)
2729{
2730 struct ena_com_dev *ena_dev = adapter->ena_dev;
838c93dc 2731 int prev_channel_count;
2413ea97
SJ		 2732 bool dev_was_up;
2733
2734 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2735 ena_close(adapter->netdev);
838c93dc 2736 prev_channel_count = adapter->num_io_queues;
2413ea97 2737 adapter->num_io_queues = new_channel_count;
548c4940
SJ		 2738 if (ena_xdp_present(adapter) &&
2739 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) {
2740 adapter->xdp_first_ring = new_channel_count;
2741 adapter->xdp_num_queues = new_channel_count;
838c93dc
SJ		 2742 if (prev_channel_count > new_channel_count)
2743 ena_xdp_exchange_program_rx_in_range(adapter,
2744 NULL,
2745 new_channel_count,
2746 prev_channel_count);
2747 else
2748 ena_xdp_exchange_program_rx_in_range(adapter,
2749 adapter->xdp_bpf_prog,
2750 prev_channel_count,
2751 new_channel_count);
2752 }
2753
2413ea97
SJ		 2754 /* We need to destroy the rss table so that the indirection
2755 * table will be reinitialized by ena_up()
2756 */
2757 ena_com_rss_destroy(ena_dev);
548c4940
SJ		 2758 ena_init_io_rings(adapter,
2759 0,
2760 adapter->xdp_num_queues +
2761 adapter->num_io_queues);
2413ea97 2762 return dev_was_up ? ena_open(adapter->netdev) : 0;
eece4d2a
SJ		 2763}
2764
0e3a3f6d
AK		 2765static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx,
2766 struct sk_buff *skb,
2767 bool disable_meta_caching)
1738cd3e
NB		 2768{
2769 u32 mss = skb_shinfo(skb)->gso_size;
2770 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
2771 u8 l4_protocol = 0;
2772
2773 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
2774 ena_tx_ctx->l4_csum_enable = 1;
2775 if (mss) {
2776 ena_tx_ctx->tso_enable = 1;
2777 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
2778 ena_tx_ctx->l4_csum_partial = 0;
2779 } else {
2780 ena_tx_ctx->tso_enable = 0;
2781 ena_meta->l4_hdr_len = 0;
2782 ena_tx_ctx->l4_csum_partial = 1;
2783 }
2784
2785 switch (ip_hdr(skb)->version) {
2786 case IPVERSION:
2787 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2788 if (ip_hdr(skb)->frag_off & htons(IP_DF))
2789 ena_tx_ctx->df = 1;
2790 if (mss)
2791 ena_tx_ctx->l3_csum_enable = 1;
2792 l4_protocol = ip_hdr(skb)->protocol;
2793 break;
2794 case 6:
2795 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2796 l4_protocol = ipv6_hdr(skb)->nexthdr;
2797 break;
2798 default:
2799 break;
2800 }
2801
2802 if (l4_protocol == IPPROTO_TCP)
2803 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2804 else
2805 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2806
2807 ena_meta->mss = mss;
2808 ena_meta->l3_hdr_len = skb_network_header_len(skb);
2809 ena_meta->l3_hdr_offset = skb_network_offset(skb);
2810 ena_tx_ctx->meta_valid = 1;
0e3a3f6d
AK		 2811 } else if (disable_meta_caching) {
2812 memset(ena_meta, 0, sizeof(*ena_meta));
2813 ena_tx_ctx->meta_valid = 1;
1738cd3e
NB		 2814 } else {
2815 ena_tx_ctx->meta_valid = 0;
2816 }
2817}
2818
2819static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
2820 struct sk_buff *skb)
2821{
2822 int num_frags, header_len, rc;
2823
2824 num_frags = skb_shinfo(skb)->nr_frags;
2825 header_len = skb_headlen(skb);
2826
2827 if (num_frags < tx_ring->sgl_size)
2828 return 0;
2829
2830 if ((num_frags == tx_ring->sgl_size) &&
2831 (header_len < tx_ring->tx_max_header_size))
2832 return 0;
2833
89dd735e 2834 ena_increase_stat(&tx_ring->tx_stats.linearize, 1, &tx_ring->syncp);
1738cd3e
NB		 2835
2836 rc = skb_linearize(skb);
2837 if (unlikely(rc)) {
89dd735e
SA		 2838 ena_increase_stat(&tx_ring->tx_stats.linearize_failed, 1,
2839 &tx_ring->syncp);
1738cd3e
NB		 2840 }
2841
2842 return rc;
2843}
2844
38005ca8
AK		 2845static int ena_tx_map_skb(struct ena_ring *tx_ring,
2846 struct ena_tx_buffer *tx_info,
2847 struct sk_buff *skb,
2848 void **push_hdr,
2849 u16 *header_len)
1738cd3e 2850{
38005ca8 2851 struct ena_adapter *adapter = tx_ring->adapter;
1738cd3e 2852 struct ena_com_buf *ena_buf;
1738cd3e 2853 dma_addr_t dma;
38005ca8
AK		 2854 u32 skb_head_len, frag_len, last_frag;
2855 u16 push_len = 0;
2856 u16 delta = 0;
2857 int i = 0;
1738cd3e 2858
38005ca8 2859 skb_head_len = skb_headlen(skb);
1738cd3e 2860 tx_info->skb = skb;
38005ca8 2861 ena_buf = tx_info->bufs;
1738cd3e
NB		 2862
2863 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
38005ca8
AK		 2864 /* When the device is LLQ mode, the driver will copy
2865 * the header into the device memory space.
2866 * the ena_com layer assume the header is in a linear
2867 * memory space.
2868 * This assumption might be wrong since part of the header
2869 * can be in the fragmented buffers.
2870 * Use skb_header_pointer to make sure the header is in a
2871 * linear memory space.
2872 */
2873
2874 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
2875 *push_hdr = skb_header_pointer(skb, 0, push_len,
2876 tx_ring->push_buf_intermediate_buf);
2877 *header_len = push_len;
2878 if (unlikely(skb->data != *push_hdr)) {
89dd735e
SA		 2879 ena_increase_stat(&tx_ring->tx_stats.llq_buffer_copy, 1,
2880 &tx_ring->syncp);
38005ca8
AK		 2881
2882 delta = push_len - skb_head_len;
2883 }
1738cd3e 2884 } else {
38005ca8
AK		 2885 *push_hdr = NULL;
2886 *header_len = min_t(u32, skb_head_len,
2887 tx_ring->tx_max_header_size);
1738cd3e
NB		 2888 }
2889
38005ca8 2890 netif_dbg(adapter, tx_queued, adapter->netdev,
1738cd3e 2891 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
38005ca8 2892 *push_hdr, push_len);
1738cd3e 2893
38005ca8 2894 if (skb_head_len > push_len) {
1738cd3e 2895 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
38005ca8
AK		 2896 skb_head_len - push_len, DMA_TO_DEVICE);
2897 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
1738cd3e
NB		 2898 goto error_report_dma_error;
2899
2900 ena_buf->paddr = dma;
38005ca8 2901 ena_buf->len = skb_head_len - push_len;
1738cd3e
NB		 2902
2903 ena_buf++;
2904 tx_info->num_of_bufs++;
38005ca8
AK		 2905 tx_info->map_linear_data = 1;
2906 } else {
2907 tx_info->map_linear_data = 0;
1738cd3e
NB		 2908 }
2909
2910 last_frag = skb_shinfo(skb)->nr_frags;
2911
2912 for (i = 0; i < last_frag; i++) {
2913 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2914
38005ca8
AK		 2915 frag_len = skb_frag_size(frag);
2916
2917 if (unlikely(delta >= frag_len)) {
2918 delta -= frag_len;
2919 continue;
2920 }
2921
2922 dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
2923 frag_len - delta, DMA_TO_DEVICE);
2924 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
1738cd3e
NB		 2925 goto error_report_dma_error;
2926
2927 ena_buf->paddr = dma;
38005ca8 2928 ena_buf->len = frag_len - delta;
1738cd3e 2929 ena_buf++;
38005ca8
AK		 2930 tx_info->num_of_bufs++;
2931 delta = 0;
1738cd3e
NB		 2932 }
2933
38005ca8
AK		 2934 return 0;
2935
2936error_report_dma_error:
89dd735e
SA		 2937 ena_increase_stat(&tx_ring->tx_stats.dma_mapping_err, 1,
2938 &tx_ring->syncp);
bf2746e8 2939 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n");
38005ca8
AK		 2940
2941 tx_info->skb = NULL;
2942
2943 tx_info->num_of_bufs += i;
548c4940 2944 ena_unmap_tx_buff(tx_ring, tx_info);
38005ca8
AK		 2945
2946 return -EINVAL;
2947}
2948
2949/* Called with netif_tx_lock. */
2950static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
2951{
2952 struct ena_adapter *adapter = netdev_priv(dev);
2953 struct ena_tx_buffer *tx_info;
2954 struct ena_com_tx_ctx ena_tx_ctx;
2955 struct ena_ring *tx_ring;
2956 struct netdev_queue *txq;
2957 void *push_hdr;
2958 u16 next_to_use, req_id, header_len;
548c4940 2959 int qid, rc;
38005ca8
AK		 2960
2961 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
2962 /* Determine which tx ring we will be placed on */
2963 qid = skb_get_queue_mapping(skb);
2964 tx_ring = &adapter->tx_ring[qid];
2965 txq = netdev_get_tx_queue(dev, qid);
2966
2967 rc = ena_check_and_linearize_skb(tx_ring, skb);
2968 if (unlikely(rc))
2969 goto error_drop_packet;
2970
2971 skb_tx_timestamp(skb);
2972
2973 next_to_use = tx_ring->next_to_use;
f9172498 2974 req_id = tx_ring->free_ids[next_to_use];
38005ca8
AK		 2975 tx_info = &tx_ring->tx_buffer_info[req_id];
2976 tx_info->num_of_bufs = 0;
2977
2978 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
2979
2980 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
2981 if (unlikely(rc))
2982 goto error_drop_packet;
1738cd3e
NB		 2983
2984 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2985 ena_tx_ctx.ena_bufs = tx_info->bufs;
2986 ena_tx_ctx.push_header = push_hdr;
2987 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2988 ena_tx_ctx.req_id = req_id;
2989 ena_tx_ctx.header_len = header_len;
2990
2991 /* set flags and meta data */
0e3a3f6d 2992 ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching);
1738cd3e 2993
548c4940
SJ		 2994 rc = ena_xmit_common(dev,
2995 tx_ring,
2996 tx_info,
2997 &ena_tx_ctx,
2998 next_to_use,
2999 skb->len);
3000 if (rc)
1738cd3e 3001 goto error_unmap_dma;
1738cd3e
NB		 3002
3003 netdev_tx_sent_queue(txq, skb->len);
3004
1738cd3e
NB		 3005 /* stop the queue when no more space available, the packet can have up
3006 * to sgl_size + 2. one for the meta descriptor and one for header
3007 * (if the header is larger than tx_max_header_size).
3008 */
689b2bda
AK		 3009 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3010 tx_ring->sgl_size + 2))) {
1738cd3e
NB		 3011 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
3012 __func__, qid);
3013
3014 netif_tx_stop_queue(txq);
89dd735e
SA		 3015 ena_increase_stat(&tx_ring->tx_stats.queue_stop, 1,
3016 &tx_ring->syncp);
1738cd3e
NB		 3017
3018 /* There is a rare condition where this function decide to
3019 * stop the queue but meanwhile clean_tx_irq updates
3020 * next_to_completion and terminates.
3021 * The queue will remain stopped forever.
37dff155
NB		 3022 * To solve this issue add a mb() to make sure that
3023 * netif_tx_stop_queue() write is vissible before checking if
3024 * there is additional space in the queue.
1738cd3e 3025 */
37dff155 3026 smp_mb();
1738cd3e 3027
689b2bda
AK		 3028 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3029 ENA_TX_WAKEUP_THRESH)) {
1738cd3e 3030 netif_tx_wake_queue(txq);
89dd735e
SA		 3031 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1,
3032 &tx_ring->syncp);
1738cd3e
NB		 3033 }
3034 }
3035
6b16f9ee 3036 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) {
37dff155
NB		 3037 /* trigger the dma engine. ena_com_write_sq_doorbell()
3038 * has a mb
3039 */
3040 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
89dd735e
SA		 3041 ena_increase_stat(&tx_ring->tx_stats.doorbells, 1,
3042 &tx_ring->syncp);
1738cd3e
NB		 3043 }
3044
3045 return NETDEV_TX_OK;
3046
1738cd3e 3047error_unmap_dma:
548c4940 3048 ena_unmap_tx_buff(tx_ring, tx_info);
38005ca8 3049 tx_info->skb = NULL;
1738cd3e
NB		 3050
3051error_drop_packet:
1738cd3e
NB		 3052 dev_kfree_skb(skb);
3053 return NETDEV_TX_OK;
3054}
3055
1738cd3e 3056static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
a350ecce 3057 struct net_device *sb_dev)
1738cd3e
NB		 3058{
3059 u16 qid;
3060 /* we suspect that this is good for in--kernel network services that
3061 * want to loop incoming skb rx to tx in normal user generated traffic,
3062 * most probably we will not get to this
3063 */
3064 if (skb_rx_queue_recorded(skb))
3065 qid = skb_get_rx_queue(skb);
3066 else
a350ecce 3067 qid = netdev_pick_tx(dev, skb, NULL);
1738cd3e
NB		 3068
3069 return qid;
3070}
3071
46143e58 3072static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
1738cd3e 3073{
f0525298 3074 struct device *dev = &pdev->dev;
1738cd3e
NB		 3075 struct ena_admin_host_info *host_info;
3076 int rc;
3077
3078 /* Allocate only the host info */
3079 rc = ena_com_allocate_host_info(ena_dev);
3080 if (rc) {
f0525298 3081 dev_err(dev, "Cannot allocate host info\n");
1738cd3e
NB		 3082 return;
3083 }
3084
3085 host_info = ena_dev->host_attr.host_info;
3086
095f2f1f 3087 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
1738cd3e
NB		 3088 host_info->os_type = ENA_ADMIN_OS_LINUX;
3089 host_info->kernel_ver = LINUX_VERSION_CODE;
f9133088 3090 strlcpy(host_info->kernel_ver_str, utsname()->version,
1738cd3e
NB		 3091 sizeof(host_info->kernel_ver_str) - 1);
3092 host_info->os_dist = 0;
3093 strncpy(host_info->os_dist_str, utsname()->release,
3094 sizeof(host_info->os_dist_str) - 1);
92040c6d
AK		 3095 host_info->driver_version =
3096 (DRV_MODULE_GEN_MAJOR) |
3097 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
3098 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
3099 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
095f2f1f 3100 host_info->num_cpus = num_online_cpus();
1738cd3e 3101
bd21b0cc 3102 host_info->driver_supported_features =
68f236df 3103 ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK |
0f505c60 3104 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK |
0ee60edf
AK		 3105 ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK |
3106 ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK;
bd21b0cc 3107
1738cd3e
NB		 3108 rc = ena_com_set_host_attributes(ena_dev);
3109 if (rc) {
d1497638 3110 if (rc == -EOPNOTSUPP)
f0525298 3111 dev_warn(dev, "Cannot set host attributes\n");
1738cd3e 3112 else
f0525298 3113 dev_err(dev, "Cannot set host attributes\n");
1738cd3e
NB		 3114
3115 goto err;
3116 }
3117
3118 return;
3119
3120err:
3121 ena_com_delete_host_info(ena_dev);
3122}
3123
3124static void ena_config_debug_area(struct ena_adapter *adapter)
3125{
3126 u32 debug_area_size;
3127 int rc, ss_count;
3128
3129 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
3130 if (ss_count <= 0) {
3131 netif_err(adapter, drv, adapter->netdev,
3132 "SS count is negative\n");
3133 return;
3134 }
3135
3136 /* allocate 32 bytes for each string and 64bit for the value */
3137 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
3138
3139 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
3140 if (rc) {
f0525298
SA		 3141 netif_err(adapter, drv, adapter->netdev,
3142 "Cannot allocate debug area\n");
1738cd3e
NB		 3143 return;
3144 }
3145
3146 rc = ena_com_set_host_attributes(adapter->ena_dev);
3147 if (rc) {
d1497638 3148 if (rc == -EOPNOTSUPP)
1738cd3e
NB		 3149 netif_warn(adapter, drv, adapter->netdev,
3150 "Cannot set host attributes\n");
3151 else
3152 netif_err(adapter, drv, adapter->netdev,
3153 "Cannot set host attributes\n");
3154 goto err;
3155 }
3156
3157 return;
3158err:
3159 ena_com_delete_debug_area(adapter->ena_dev);
3160}
3161
713865da
SJ		 3162int ena_update_hw_stats(struct ena_adapter *adapter)
3163{
3164 int rc = 0;
3165
3166 rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats);
3167 if (rc) {
3168 dev_info_once(&adapter->pdev->dev, "Failed to get ENI stats\n");
3169 return rc;
3170 }
3171
3172 return 0;
3173}
3174
bc1f4470 3175static void ena_get_stats64(struct net_device *netdev,
3176 struct rtnl_link_stats64 *stats)
1738cd3e
NB		 3177{
3178 struct ena_adapter *adapter = netdev_priv(netdev);
d81db240
NB		 3179 struct ena_ring *rx_ring, *tx_ring;
3180 unsigned int start;
3181 u64 rx_drops;
5c665f8c 3182 u64 tx_drops;
d81db240 3183 int i;
1738cd3e
NB		 3184
3185 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
bc1f4470 3186 return;
1738cd3e 3187
faa615f9 3188 for (i = 0; i < adapter->num_io_queues; i++) {
d81db240
NB		 3189 u64 bytes, packets;
3190
3191 tx_ring = &adapter->tx_ring[i];
1738cd3e 3192
d81db240
NB		 3193 do {
3194 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
3195 packets = tx_ring->tx_stats.cnt;
3196 bytes = tx_ring->tx_stats.bytes;
3197 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
1738cd3e 3198
d81db240
NB		 3199 stats->tx_packets += packets;
3200 stats->tx_bytes += bytes;
3201
3202 rx_ring = &adapter->rx_ring[i];
3203
3204 do {
3205 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
3206 packets = rx_ring->rx_stats.cnt;
3207 bytes = rx_ring->rx_stats.bytes;
3208 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
3209
3210 stats->rx_packets += packets;
3211 stats->rx_bytes += bytes;
3212 }
3213
3214 do {
3215 start = u64_stats_fetch_begin_irq(&adapter->syncp);
3216 rx_drops = adapter->dev_stats.rx_drops;
5c665f8c 3217 tx_drops = adapter->dev_stats.tx_drops;
d81db240 3218 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
1738cd3e 3219
d81db240 3220 stats->rx_dropped = rx_drops;
5c665f8c 3221 stats->tx_dropped = tx_drops;
1738cd3e
NB		 3222
3223 stats->multicast = 0;
3224 stats->collisions = 0;
3225
3226 stats->rx_length_errors = 0;
3227 stats->rx_crc_errors = 0;
3228 stats->rx_frame_errors = 0;
3229 stats->rx_fifo_errors = 0;
3230 stats->rx_missed_errors = 0;
3231 stats->tx_window_errors = 0;
3232
3233 stats->rx_errors = 0;
3234 stats->tx_errors = 0;
1738cd3e
NB		 3235}
3236
3237static const struct net_device_ops ena_netdev_ops = {
3238 .ndo_open = ena_open,
3239 .ndo_stop = ena_close,
3240 .ndo_start_xmit = ena_start_xmit,
3241 .ndo_select_queue = ena_select_queue,
3242 .ndo_get_stats64 = ena_get_stats64,
3243 .ndo_tx_timeout = ena_tx_timeout,
3244 .ndo_change_mtu = ena_change_mtu,
3245 .ndo_set_mac_address = NULL,
3246 .ndo_validate_addr = eth_validate_addr,
838c93dc 3247 .ndo_bpf = ena_xdp,
1738cd3e
NB		 3248};
3249
1738cd3e
NB		 3250static int ena_device_validate_params(struct ena_adapter *adapter,
3251 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3252{
3253 struct net_device *netdev = adapter->netdev;
3254 int rc;
3255
3256 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
3257 adapter->mac_addr);
3258 if (!rc) {
3259 netif_err(adapter, drv, netdev,
3260 "Error, mac address are different\n");
3261 return -EINVAL;
3262 }
3263
1738cd3e
NB		 3264 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
3265 netif_err(adapter, drv, netdev,
3266 "Error, device max mtu is smaller than netdev MTU\n");
3267 return -EINVAL;
3268 }
3269
3270 return 0;
3271}
3272
c29efeae
AK		 3273static void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
3274{
3275 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
3276 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
3277 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
3278 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
3279 llq_config->llq_ring_entry_size_value = 128;
3280}
3281
3282static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3283 struct ena_com_dev *ena_dev,
3284 struct ena_admin_feature_llq_desc *llq,
3285 struct ena_llq_configurations *llq_default_configurations)
3286{
3287 int rc;
3288 u32 llq_feature_mask;
3289
3290 llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3291 if (!(ena_dev->supported_features & llq_feature_mask)) {
3292 dev_err(&pdev->dev,
3293 "LLQ is not supported Fallback to host mode policy.\n");
3294 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3295 return 0;
3296 }
3297
3298 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3299 if (unlikely(rc)) {
3300 dev_err(&pdev->dev,
3301 "Failed to configure the device mode. Fallback to host mode policy.\n");
3302 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3303 }
3304
3305 return 0;
3306}
3307
3308static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev,
3309 int bars)
3310{
3311 bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR));
3312
3313 if (!has_mem_bar) {
3314 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
3315 dev_err(&pdev->dev,
3316 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n");
3317 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3318 }
3319
3320 return 0;
3321 }
3322
3323 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3324 pci_resource_start(pdev, ENA_MEM_BAR),
3325 pci_resource_len(pdev, ENA_MEM_BAR));
3326
3327 if (!ena_dev->mem_bar)
3328 return -EFAULT;
3329
3330 return 0;
3331}
3332
1738cd3e
NB		 3333static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
3334 struct ena_com_dev_get_features_ctx *get_feat_ctx,
3335 bool *wd_state)
3336{
c29efeae 3337 struct ena_llq_configurations llq_config;
1738cd3e
NB		 3338 struct device *dev = &pdev->dev;
3339 bool readless_supported;
3340 u32 aenq_groups;
3341 int dma_width;
3342 int rc;
3343
3344 rc = ena_com_mmio_reg_read_request_init(ena_dev);
3345 if (rc) {
bf2746e8 3346 dev_err(dev, "Failed to init mmio read less\n");
1738cd3e
NB		 3347 return rc;
3348 }
3349
3350 /* The PCIe configuration space revision id indicate if mmio reg
3351 * read is disabled
3352 */
3353 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
3354 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3355
e2eed0e3 3356 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
1738cd3e
NB		 3357 if (rc) {
3358 dev_err(dev, "Can not reset device\n");
3359 goto err_mmio_read_less;
3360 }
3361
3362 rc = ena_com_validate_version(ena_dev);
3363 if (rc) {
bf2746e8 3364 dev_err(dev, "Device version is too low\n");
1738cd3e
NB		 3365 goto err_mmio_read_less;
3366 }
3367
3368 dma_width = ena_com_get_dma_width(ena_dev);
3369 if (dma_width < 0) {
3370 dev_err(dev, "Invalid dma width value %d", dma_width);
6e22066f 3371 rc = dma_width;
1738cd3e
NB		 3372 goto err_mmio_read_less;
3373 }
3374
09323b3b 3375 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width));
1738cd3e 3376 if (rc) {
09323b3b 3377 dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc);
1738cd3e
NB		 3378 goto err_mmio_read_less;
3379 }
3380
3381 /* ENA admin level init */
f1e90f6e 3382 rc = ena_com_admin_init(ena_dev, &aenq_handlers);
1738cd3e
NB		 3383 if (rc) {
3384 dev_err(dev,
3385 "Can not initialize ena admin queue with device\n");
3386 goto err_mmio_read_less;
3387 }
3388
3389 /* To enable the msix interrupts the driver needs to know the number
3390 * of queues. So the driver uses polling mode to retrieve this
3391 * information
3392 */
3393 ena_com_set_admin_polling_mode(ena_dev, true);
3394
095f2f1f 3395 ena_config_host_info(ena_dev, pdev);
dd8427a7 3396
1738cd3e
NB		 3397 /* Get Device Attributes*/
3398 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3399 if (rc) {
3400 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
3401 goto err_admin_init;
3402 }
3403
3404 /* Try to turn all the available aenq groups */
3405 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
3406 BIT(ENA_ADMIN_FATAL_ERROR) |
3407 BIT(ENA_ADMIN_WARNING) |
3408 BIT(ENA_ADMIN_NOTIFICATION) |
3409 BIT(ENA_ADMIN_KEEP_ALIVE);
3410
3411 aenq_groups &= get_feat_ctx->aenq.supported_groups;
3412
3413 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3414 if (rc) {
3415 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
3416 goto err_admin_init;
3417 }
3418
3419 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
3420
c29efeae
AK		 3421 set_default_llq_configurations(&llq_config);
3422
3423 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq,
3424 &llq_config);
3425 if (rc) {
bf2746e8 3426 dev_err(dev, "ENA device init failed\n");
c29efeae
AK		 3427 goto err_admin_init;
3428 }
3429
1738cd3e
NB		 3430 return 0;
3431
3432err_admin_init:
dd8427a7 3433 ena_com_delete_host_info(ena_dev);
1738cd3e
NB		 3434 ena_com_admin_destroy(ena_dev);
3435err_mmio_read_less:
3436 ena_com_mmio_reg_read_request_destroy(ena_dev);
3437
3438 return rc;
3439}
3440
4d192660 3441static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter)
1738cd3e
NB		 3442{
3443 struct ena_com_dev *ena_dev = adapter->ena_dev;
3444 struct device *dev = &adapter->pdev->dev;
3445 int rc;
3446
4d192660 3447 rc = ena_enable_msix(adapter);
1738cd3e
NB		 3448 if (rc) {
3449 dev_err(dev, "Can not reserve msix vectors\n");
3450 return rc;
3451 }
3452
3453 ena_setup_mgmnt_intr(adapter);
3454
3455 rc = ena_request_mgmnt_irq(adapter);
3456 if (rc) {
3457 dev_err(dev, "Can not setup management interrupts\n");
3458 goto err_disable_msix;
3459 }
3460
3461 ena_com_set_admin_polling_mode(ena_dev, false);
3462
3463 ena_com_admin_aenq_enable(ena_dev);
3464
3465 return 0;
3466
3467err_disable_msix:
06443684
NB		 3468 ena_disable_msix(adapter);
3469
1738cd3e
NB		 3470 return rc;
3471}
3472
cfa324a5 3473static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
1738cd3e 3474{
1738cd3e
NB		 3475 struct net_device *netdev = adapter->netdev;
3476 struct ena_com_dev *ena_dev = adapter->ena_dev;
8c5c7abd 3477 bool dev_up;
3f6159db 3478
fe870c77
NB		 3479 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
3480 return;
3481
3f6159db
NB		 3482 netif_carrier_off(netdev);
3483
1738cd3e
NB		 3484 del_timer_sync(&adapter->timer_service);
3485
1738cd3e 3486 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
8c5c7abd 3487 adapter->dev_up_before_reset = dev_up;
cfa324a5
NB		 3488 if (!graceful)
3489 ena_com_set_admin_running_state(ena_dev, false);
1738cd3e 3490
ee4552aa
NB		 3491 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3492 ena_down(adapter);
1738cd3e 3493
bd791175 3494 /* Stop the device from sending AENQ events (in case reset flag is set
58a54b9c 3495 * and device is up, ena_down() already reset the device.
8c5c7abd
NB		 3496 */
3497 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
3498 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
3499
1738cd3e
NB		 3500 ena_free_mgmnt_irq(adapter);
3501
06443684 3502 ena_disable_msix(adapter);
1738cd3e
NB		 3503
3504 ena_com_abort_admin_commands(ena_dev);
3505
3506 ena_com_wait_for_abort_completion(ena_dev);
3507
3508 ena_com_admin_destroy(ena_dev);
3509
3510 ena_com_mmio_reg_read_request_destroy(ena_dev);
3511
c1c0e40b 3512 /* return reset reason to default value */
e2eed0e3 3513 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
8c5c7abd 3514
3f6159db 3515 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
fe870c77 3516 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
8c5c7abd 3517}
3f6159db 3518
8c5c7abd
NB		 3519static int ena_restore_device(struct ena_adapter *adapter)
3520{
3521 struct ena_com_dev_get_features_ctx get_feat_ctx;
3522 struct ena_com_dev *ena_dev = adapter->ena_dev;
3523 struct pci_dev *pdev = adapter->pdev;
3524 bool wd_state;
3525 int rc;
1738cd3e 3526
d18e4f68 3527 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
1738cd3e
NB		 3528 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
3529 if (rc) {
3530 dev_err(&pdev->dev, "Can not initialize device\n");
3531 goto err;
3532 }
3533 adapter->wd_state = wd_state;
3534
3535 rc = ena_device_validate_params(adapter, &get_feat_ctx);
3536 if (rc) {
3537 dev_err(&pdev->dev, "Validation of device parameters failed\n");
3538 goto err_device_destroy;
3539 }
3540
4d192660 3541 rc = ena_enable_msix_and_set_admin_interrupts(adapter);
1738cd3e
NB		 3542 if (rc) {
3543 dev_err(&pdev->dev, "Enable MSI-X failed\n");
3544 goto err_device_destroy;
3545 }
3546 /* If the interface was up before the reset bring it up */
8c5c7abd 3547 if (adapter->dev_up_before_reset) {
1738cd3e
NB		 3548 rc = ena_up(adapter);
3549 if (rc) {
3550 dev_err(&pdev->dev, "Failed to create I/O queues\n");
3551 goto err_disable_msix;
3552 }
3553 }
3554
fe870c77 3555 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
e1f1bd9b
AK		 3556
3557 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3558 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
3559 netif_carrier_on(adapter->netdev);
3560
1738cd3e 3561 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
dfdde134 3562 adapter->last_keep_alive_jiffies = jiffies;
1738cd3e 3563
f0525298
SA		 3564 dev_err(&pdev->dev, "Device reset completed successfully\n");
3565
8c5c7abd 3566 return rc;
1738cd3e
NB		 3567err_disable_msix:
3568 ena_free_mgmnt_irq(adapter);
06443684 3569 ena_disable_msix(adapter);
1738cd3e 3570err_device_destroy:
d7703ddb
AK		 3571 ena_com_abort_admin_commands(ena_dev);
3572 ena_com_wait_for_abort_completion(ena_dev);
1738cd3e 3573 ena_com_admin_destroy(ena_dev);
d7703ddb 3574 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
e76ad21d 3575 ena_com_mmio_reg_read_request_destroy(ena_dev);
1738cd3e 3576err:
22b331c9 3577 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
d18e4f68 3578 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
1738cd3e
NB		 3579 dev_err(&pdev->dev,
3580 "Reset attempt failed. Can not reset the device\n");
8c5c7abd
NB		 3581
3582 return rc;
3583}
3584
3585static void ena_fw_reset_device(struct work_struct *work)
3586{
3587 struct ena_adapter *adapter =
3588 container_of(work, struct ena_adapter, reset_task);
8c5c7abd 3589
8c5c7abd 3590 rtnl_lock();
63d4a4c1
SA		 3591
3592 if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3593 ena_destroy_device(adapter, false);
3594 ena_restore_device(adapter);
3595 }
3596
8c5c7abd 3597 rtnl_unlock();
1738cd3e
NB		 3598}
3599
8510e1a3
NB		 3600static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
3601 struct ena_ring *rx_ring)
3602{
3603 if (likely(rx_ring->first_interrupt))
3604 return 0;
3605
3606 if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
3607 return 0;
3608
3609 rx_ring->no_interrupt_event_cnt++;
3610
3611 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
3612 netif_err(adapter, rx_err, adapter->netdev,
3613 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
3614 rx_ring->qid);
3615 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3616 smp_mb__before_atomic();
3617 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3618 return -EIO;
3619 }
3620
3621 return 0;
3622}
3623
3624static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
3625 struct ena_ring *tx_ring)
1738cd3e
NB		 3626{
3627 struct ena_tx_buffer *tx_buf;
3628 unsigned long last_jiffies;
800c55cb 3629 u32 missed_tx = 0;
11095fdb 3630 int i, rc = 0;
800c55cb
NB		 3631
3632 for (i = 0; i < tx_ring->ring_size; i++) {
3633 tx_buf = &tx_ring->tx_buffer_info[i];
3634 last_jiffies = tx_buf->last_jiffies;
8510e1a3
NB		 3635
3636 if (last_jiffies == 0)
3637 /* no pending Tx at this location */
3638 continue;
3639
3640 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies +
3641 2 * adapter->missing_tx_completion_to))) {
3642 /* If after graceful period interrupt is still not
3643 * received, we schedule a reset
3644 */
3645 netif_err(adapter, tx_err, adapter->netdev,
3646 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
3647 tx_ring->qid);
3648 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3649 smp_mb__before_atomic();
3650 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3651 return -EIO;
3652 }
3653
3654 if (unlikely(time_is_before_jiffies(last_jiffies +
3655 adapter->missing_tx_completion_to))) {
800c55cb
NB		 3656 if (!tx_buf->print_once)
3657 netif_notice(adapter, tx_err, adapter->netdev,
3658 "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
3659 tx_ring->qid, i);
3660
3661 tx_buf->print_once = 1;
3662 missed_tx++;
800c55cb
NB		 3663 }
3664 }
3665
11095fdb
NB		 3666 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
3667 netif_err(adapter, tx_err, adapter->netdev,
3668 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
3669 missed_tx,
3670 adapter->missing_tx_completion_threshold);
3671 adapter->reset_reason =
3672 ENA_REGS_RESET_MISS_TX_CMPL;
3673 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3674 rc = -EIO;
3675 }
3676
89dd735e
SA		 3677 ena_increase_stat(&tx_ring->tx_stats.missed_tx, missed_tx,
3678 &tx_ring->syncp);
11095fdb
NB		 3679
3680 return rc;
800c55cb
NB		 3681}
3682
8510e1a3 3683static void check_for_missing_completions(struct ena_adapter *adapter)
800c55cb 3684{
1738cd3e 3685 struct ena_ring *tx_ring;
8510e1a3 3686 struct ena_ring *rx_ring;
800c55cb 3687 int i, budget, rc;
548c4940 3688 int io_queue_count;
1738cd3e 3689
548c4940 3690 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues;
1738cd3e
NB		 3691 /* Make sure the driver doesn't turn the device in other process */
3692 smp_rmb();
3693
3694 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3695 return;
3696
3f6159db
NB		 3697 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3698 return;
3699
82ef30f1
NB		 3700 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
3701 return;
3702
1738cd3e
NB		 3703 budget = ENA_MONITORED_TX_QUEUES;
3704
548c4940 3705 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) {
1738cd3e 3706 tx_ring = &adapter->tx_ring[i];
8510e1a3
NB		 3707 rx_ring = &adapter->rx_ring[i];
3708
3709 rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
3710 if (unlikely(rc))
3711 return;
1738cd3e 3712
548c4940
SJ		 3713 rc = !ENA_IS_XDP_INDEX(adapter, i) ?
3714 check_for_rx_interrupt_queue(adapter, rx_ring) : 0;
800c55cb
NB		 3715 if (unlikely(rc))
3716 return;
1738cd3e
NB		 3717
3718 budget--;
3719 if (!budget)
3720 break;
3721 }
3722
548c4940 3723 adapter->last_monitored_tx_qid = i % io_queue_count;
1738cd3e
NB		 3724}
3725
a3af7c18
NB		 3726/* trigger napi schedule after 2 consecutive detections */
3727#define EMPTY_RX_REFILL 2
3728/* For the rare case where the device runs out of Rx descriptors and the
3729 * napi handler failed to refill new Rx descriptors (due to a lack of memory
3730 * for example).
3731 * This case will lead to a deadlock:
3732 * The device won't send interrupts since all the new Rx packets will be dropped
3733 * The napi handler won't allocate new Rx descriptors so the device will be
3734 * able to send new packets.
3735 *
3736 * This scenario can happen when the kernel's vm.min_free_kbytes is too small.
3737 * It is recommended to have at least 512MB, with a minimum of 128MB for
3738 * constrained environment).
3739 *
3740 * When such a situation is detected - Reschedule napi
3741 */
3742static void check_for_empty_rx_ring(struct ena_adapter *adapter)
3743{
3744 struct ena_ring *rx_ring;
3745 int i, refill_required;
3746
3747 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3748 return;
3749
3750 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3751 return;
3752
faa615f9 3753 for (i = 0; i < adapter->num_io_queues; i++) {
a3af7c18
NB		 3754 rx_ring = &adapter->rx_ring[i];
3755
7cfe9a55 3756 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);
a3af7c18
NB		 3757 if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3758 rx_ring->empty_rx_queue++;
3759
3760 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
89dd735e
SA		 3761 ena_increase_stat(&rx_ring->rx_stats.empty_rx_ring, 1,
3762 &rx_ring->syncp);
a3af7c18
NB		 3763
3764 netif_err(adapter, drv, adapter->netdev,
bf2746e8 3765 "Trigger refill for ring %d\n", i);
a3af7c18
NB		 3766
3767 napi_schedule(rx_ring->napi);
3768 rx_ring->empty_rx_queue = 0;
3769 }
3770 } else {
3771 rx_ring->empty_rx_queue = 0;
3772 }
3773 }
3774}
3775
1738cd3e
NB		 3776/* Check for keep alive expiration */
3777static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3778{
3779 unsigned long keep_alive_expired;
3780
3781 if (!adapter->wd_state)
3782 return;
3783
82ef30f1
NB		 3784 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3785 return;
3786
2a6e5fa2
AK		 3787 keep_alive_expired = adapter->last_keep_alive_jiffies +
3788 adapter->keep_alive_timeout;
1738cd3e
NB		 3789 if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
3790 netif_err(adapter, drv, adapter->netdev,
3791 "Keep alive watchdog timeout.\n");
89dd735e
SA		 3792 ena_increase_stat(&adapter->dev_stats.wd_expired, 1,
3793 &adapter->syncp);
e2eed0e3 3794 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
1738cd3e
NB		 3795 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3796 }
3797}
3798
3799static void check_for_admin_com_state(struct ena_adapter *adapter)
3800{
3801 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
3802 netif_err(adapter, drv, adapter->netdev,
3803 "ENA admin queue is not in running state!\n");
89dd735e
SA		 3804 ena_increase_stat(&adapter->dev_stats.admin_q_pause, 1,
3805 &adapter->syncp);
e2eed0e3 3806 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
1738cd3e
NB		 3807 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3808 }
3809}
3810
82ef30f1
NB		 3811static void ena_update_hints(struct ena_adapter *adapter,
3812 struct ena_admin_ena_hw_hints *hints)
3813{
3814 struct net_device *netdev = adapter->netdev;
3815
3816 if (hints->admin_completion_tx_timeout)
3817 adapter->ena_dev->admin_queue.completion_timeout =
3818 hints->admin_completion_tx_timeout * 1000;
3819
3820 if (hints->mmio_read_timeout)
3821 /* convert to usec */
3822 adapter->ena_dev->mmio_read.reg_read_to =
3823 hints->mmio_read_timeout * 1000;
3824
3825 if (hints->missed_tx_completion_count_threshold_to_reset)
3826 adapter->missing_tx_completion_threshold =
3827 hints->missed_tx_completion_count_threshold_to_reset;
3828
3829 if (hints->missing_tx_completion_timeout) {
3830 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3831 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
3832 else
3833 adapter->missing_tx_completion_to =
3834 msecs_to_jiffies(hints->missing_tx_completion_timeout);
3835 }
3836
3837 if (hints->netdev_wd_timeout)
3838 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
3839
3840 if (hints->driver_watchdog_timeout) {
3841 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3842 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3843 else
3844 adapter->keep_alive_timeout =
3845 msecs_to_jiffies(hints->driver_watchdog_timeout);
3846 }
3847}
3848
1738cd3e
NB		 3849static void ena_update_host_info(struct ena_admin_host_info *host_info,
3850 struct net_device *netdev)
3851{
3852 host_info->supported_network_features[0] =
3853 netdev->features & GENMASK_ULL(31, 0);
3854 host_info->supported_network_features[1] =
3855 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
3856}
3857
e99e88a9 3858static void ena_timer_service(struct timer_list *t)
1738cd3e 3859{
e99e88a9 3860 struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
1738cd3e
NB		 3861 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
3862 struct ena_admin_host_info *host_info =
3863 adapter->ena_dev->host_attr.host_info;
3864
3865 check_for_missing_keep_alive(adapter);
3866
3867 check_for_admin_com_state(adapter);
3868
8510e1a3 3869 check_for_missing_completions(adapter);
1738cd3e 3870
a3af7c18
NB		 3871 check_for_empty_rx_ring(adapter);
3872
1738cd3e
NB		 3873 if (debug_area)
3874 ena_dump_stats_to_buf(adapter, debug_area);
3875
3876 if (host_info)
3877 ena_update_host_info(host_info, adapter->netdev);
3878
3f6159db 3879 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
1738cd3e
NB		 3880 netif_err(adapter, drv, adapter->netdev,
3881 "Trigger reset is on\n");
3882 ena_dump_stats_to_dmesg(adapter);
3883 queue_work(ena_wq, &adapter->reset_task);
3884 return;
3885 }
3886
3887 /* Reset the timer */
2a6e5fa2 3888 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
1738cd3e
NB		 3889}
3890
ba6f6b41 3891static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev,
736ce3f4
SJ		 3892 struct ena_com_dev *ena_dev,
3893 struct ena_com_dev_get_features_ctx *get_feat_ctx)
1738cd3e 3894{
ba6f6b41 3895 u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues;
31aa9857
SJ		 3896
3897 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3898 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3899 &get_feat_ctx->max_queue_ext.max_queue_ext;
736ce3f4 3900 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num,
31aa9857 3901 max_queue_ext->max_rx_cq_num);
1738cd3e 3902
31aa9857
SJ		 3903 io_tx_sq_num = max_queue_ext->max_tx_sq_num;
3904 io_tx_cq_num = max_queue_ext->max_tx_cq_num;
3905 } else {
3906 struct ena_admin_queue_feature_desc *max_queues =
3907 &get_feat_ctx->max_queues;
3908 io_tx_sq_num = max_queues->max_sq_num;
3909 io_tx_cq_num = max_queues->max_cq_num;
736ce3f4 3910 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num);
31aa9857
SJ		 3911 }
3912
3913 /* In case of LLQ use the llq fields for the tx SQ/CQ */
9fd25592 3914 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
31aa9857 3915 io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
1738cd3e 3916
736ce3f4
SJ		 3917 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
3918 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num);
3919 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num);
3920 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num);
1738cd3e 3921 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
736ce3f4
SJ		 3922 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1);
3923 if (unlikely(!max_num_io_queues)) {
1738cd3e
NB		 3924 dev_err(&pdev->dev, "The device doesn't have io queues\n");
3925 return -EFAULT;
3926 }
3927
736ce3f4 3928 return max_num_io_queues;
1738cd3e
NB		 3929}
3930
1738cd3e
NB		 3931static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
3932 struct net_device *netdev)
3933{
3934 netdev_features_t dev_features = 0;
3935
3936 /* Set offload features */
3937 if (feat->offload.tx &
3938 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
3939 dev_features |= NETIF_F_IP_CSUM;
3940
3941 if (feat->offload.tx &
3942 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
3943 dev_features |= NETIF_F_IPV6_CSUM;
3944
3945 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
3946 dev_features |= NETIF_F_TSO;
3947
3948 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
3949 dev_features |= NETIF_F_TSO6;
3950
3951 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
3952 dev_features |= NETIF_F_TSO_ECN;
3953
3954 if (feat->offload.rx_supported &
3955 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
3956 dev_features |= NETIF_F_RXCSUM;
3957
3958 if (feat->offload.rx_supported &
3959 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
3960 dev_features |= NETIF_F_RXCSUM;
3961
3962 netdev->features =
3963 dev_features |
3964 NETIF_F_SG |
1738cd3e
NB		 3965 NETIF_F_RXHASH |
3966 NETIF_F_HIGHDMA;
3967
3968 netdev->hw_features |= netdev->features;
3969 netdev->vlan_features |= netdev->features;
3970}
3971
3972static void ena_set_conf_feat_params(struct ena_adapter *adapter,
3973 struct ena_com_dev_get_features_ctx *feat)
3974{
3975 struct net_device *netdev = adapter->netdev;
3976
3977 /* Copy mac address */
3978 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
3979 eth_hw_addr_random(netdev);
3980 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
3981 } else {
3982 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
3983 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
3984 }
3985
3986 /* Set offload features */
3987 ena_set_dev_offloads(feat, netdev);
3988
3989 adapter->max_mtu = feat->dev_attr.max_mtu;
d894be57
JW		 3990 netdev->max_mtu = adapter->max_mtu;
3991 netdev->min_mtu = ENA_MIN_MTU;
1738cd3e
NB		 3992}
3993
3994static int ena_rss_init_default(struct ena_adapter *adapter)
3995{
3996 struct ena_com_dev *ena_dev = adapter->ena_dev;
3997 struct device *dev = &adapter->pdev->dev;
3998 int rc, i;
3999 u32 val;
4000
4001 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
4002 if (unlikely(rc)) {
4003 dev_err(dev, "Cannot init indirect table\n");
4004 goto err_rss_init;
4005 }
4006
4007 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
faa615f9 4008 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues);
1738cd3e
NB		 4009 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
4010 ENA_IO_RXQ_IDX(val));
d1497638 4011 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
1738cd3e
NB		 4012 dev_err(dev, "Cannot fill indirect table\n");
4013 goto err_fill_indir;
4014 }
4015 }
4016
c1bd17e5 4017 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL,
1738cd3e 4018 ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
d1497638 4019 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
1738cd3e
NB		 4020 dev_err(dev, "Cannot fill hash function\n");
4021 goto err_fill_indir;
4022 }
4023
4024 rc = ena_com_set_default_hash_ctrl(ena_dev);
d1497638 4025 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
1738cd3e
NB		 4026 dev_err(dev, "Cannot fill hash control\n");
4027 goto err_fill_indir;
4028 }
4029
4030 return 0;
4031
4032err_fill_indir:
4033 ena_com_rss_destroy(ena_dev);
4034err_rss_init:
4035
4036 return rc;
4037}
4038
4039static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
4040{
d79c3888 4041 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
0857d92f 4042
1738cd3e
NB		 4043 pci_release_selected_regions(pdev, release_bars);
4044}
4045
38005ca8 4046
4d192660 4047static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx)
1738cd3e 4048{
31aa9857
SJ		 4049 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
4050 struct ena_com_dev *ena_dev = ctx->ena_dev;
4051 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
4052 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
4053 u32 max_tx_queue_size;
4054 u32 max_rx_queue_size;
1738cd3e 4055
4d192660 4056 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
31aa9857
SJ		 4057 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
4058 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
4059 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
4060 max_queue_ext->max_rx_sq_depth);
4061 max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
1738cd3e 4062
31aa9857
SJ		 4063 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4064 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4065 llq->max_llq_depth);
4066 else
4067 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4068 max_queue_ext->max_tx_sq_depth);
1738cd3e 4069
31aa9857
SJ		 4070 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4071 max_queue_ext->max_per_packet_tx_descs);
4072 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4073 max_queue_ext->max_per_packet_rx_descs);
4074 } else {
4075 struct ena_admin_queue_feature_desc *max_queues =
4076 &ctx->get_feat_ctx->max_queues;
4077 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
4078 max_queues->max_sq_depth);
4079 max_tx_queue_size = max_queues->max_cq_depth;
4080
4081 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4082 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4083 llq->max_llq_depth);
4084 else
4085 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4086 max_queues->max_sq_depth);
4087
4088 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4089 max_queues->max_packet_tx_descs);
4090 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4091 max_queues->max_packet_rx_descs);
4092 }
4093
4094 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
4095 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
1738cd3e 4096
13ca32a6
SJ		 4097 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
4098 max_tx_queue_size);
4099 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
4100 max_rx_queue_size);
31aa9857
SJ		 4101
4102 tx_queue_size = rounddown_pow_of_two(tx_queue_size);
4103 rx_queue_size = rounddown_pow_of_two(rx_queue_size);
4104
31aa9857
SJ		 4105 ctx->max_tx_queue_size = max_tx_queue_size;
4106 ctx->max_rx_queue_size = max_rx_queue_size;
4107 ctx->tx_queue_size = tx_queue_size;
4108 ctx->rx_queue_size = rx_queue_size;
1738cd3e 4109
31aa9857 4110 return 0;
1738cd3e
NB		 4111}
4112
4113/* ena_probe - Device Initialization Routine
4114 * @pdev: PCI device information struct
4115 * @ent: entry in ena_pci_tbl
4116 *
4117 * Returns 0 on success, negative on failure
4118 *
4119 * ena_probe initializes an adapter identified by a pci_dev structure.
4120 * The OS initialization, configuring of the adapter private structure,
4121 * and a hardware reset occur.
4122 */
4123static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4124{
f49ed500 4125 struct ena_calc_queue_size_ctx calc_queue_ctx = {};
0a39a35f 4126 struct ena_com_dev_get_features_ctx get_feat_ctx;
1738cd3e 4127 struct ena_com_dev *ena_dev = NULL;
83b92404 4128 struct ena_adapter *adapter;
83b92404
SJ		 4129 struct net_device *netdev;
4130 static int adapters_found;
736ce3f4 4131 u32 max_num_io_queues;
1738cd3e 4132 bool wd_state;
736ce3f4 4133 int bars, rc;
1738cd3e
NB		 4134
4135 dev_dbg(&pdev->dev, "%s\n", __func__);
4136
1738cd3e
NB		 4137 rc = pci_enable_device_mem(pdev);
4138 if (rc) {
4139 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
4140 return rc;
4141 }
4142
09323b3b
SA		 4143 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS));
4144 if (rc) {
4145 dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc);
4146 goto err_disable_device;
4147 }
4148
1738cd3e
NB		 4149 pci_set_master(pdev);
4150
4151 ena_dev = vzalloc(sizeof(*ena_dev));
4152 if (!ena_dev) {
4153 rc = -ENOMEM;
4154 goto err_disable_device;
4155 }
4156
4157 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4158 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
4159 if (rc) {
4160 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
4161 rc);
4162 goto err_free_ena_dev;
4163 }
4164
0857d92f
NB		 4165 ena_dev->reg_bar = devm_ioremap(&pdev->dev,
4166 pci_resource_start(pdev, ENA_REG_BAR),
4167 pci_resource_len(pdev, ENA_REG_BAR));
1738cd3e 4168 if (!ena_dev->reg_bar) {
bf2746e8 4169 dev_err(&pdev->dev, "Failed to remap regs bar\n");
1738cd3e
NB		 4170 rc = -EFAULT;
4171 goto err_free_region;
4172 }
4173
4bb7f4cf
AK		 4174 ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US;
4175
1738cd3e
NB		 4176 ena_dev->dmadev = &pdev->dev;
4177
ce74496a
SA		 4178 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS);
4179 if (!netdev) {
4180 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
4181 rc = -ENOMEM;
4182 goto err_free_region;
4183 }
4184
4185 SET_NETDEV_DEV(netdev, &pdev->dev);
4186 adapter = netdev_priv(netdev);
4187 adapter->ena_dev = ena_dev;
4188 adapter->netdev = netdev;
4189 adapter->pdev = pdev;
4190 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
4191
da580ca8
SA		 4192 ena_dev->net_device = netdev;
4193
ce74496a
SA		 4194 pci_set_drvdata(pdev, adapter);
4195
1738cd3e
NB		 4196 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
4197 if (rc) {
bf2746e8 4198 dev_err(&pdev->dev, "ENA device init failed\n");
1738cd3e
NB		 4199 if (rc == -ETIME)
4200 rc = -EPROBE_DEFER;
ce74496a 4201 goto err_netdev_destroy;
1738cd3e
NB		 4202 }
4203
c29efeae 4204 rc = ena_map_llq_mem_bar(pdev, ena_dev, bars);
38005ca8 4205 if (rc) {
bf2746e8 4206 dev_err(&pdev->dev, "ENA llq bar mapping failed\n");
ce74496a 4207 goto err_device_destroy;
1738cd3e
NB		 4208 }
4209
31aa9857
SJ		 4210 calc_queue_ctx.ena_dev = ena_dev;
4211 calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
4212 calc_queue_ctx.pdev = pdev;
4213
13830937 4214 /* Initial TX and RX interrupt delay. Assumes 1 usec granularity.
4d192660
SJ		 4215 * Updated during device initialization with the real granularity
4216 */
1738cd3e 4217 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
15619e72 4218 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;
79226cea 4219 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;
736ce3f4 4220 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx);
4d192660 4221 rc = ena_calc_io_queue_size(&calc_queue_ctx);
736ce3f4 4222 if (rc || !max_num_io_queues) {
1738cd3e
NB		 4223 rc = -EFAULT;
4224 goto err_device_destroy;
4225 }
4226
1738cd3e
NB		 4227 ena_set_conf_feat_params(adapter, &get_feat_ctx);
4228
e2eed0e3 4229 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
1738cd3e 4230
13ca32a6
SJ		 4231 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size;
4232 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size;
9f9ae3f9
SJ		 4233 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size;
4234 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size;
31aa9857
SJ		 4235 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
4236 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
1738cd3e 4237
736ce3f4
SJ		 4238 adapter->num_io_queues = max_num_io_queues;
4239 adapter->max_num_io_queues = max_num_io_queues;
0a39a35f 4240 adapter->last_monitored_tx_qid = 0;
736ce3f4 4241
548c4940
SJ		 4242 adapter->xdp_first_ring = 0;
4243 adapter->xdp_num_queues = 0;
4244
1738cd3e 4245 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
0e3a3f6d
AK		 4246 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4247 adapter->disable_meta_caching =
4248 !!(get_feat_ctx.llq.accel_mode.u.get.supported_flags &
4249 BIT(ENA_ADMIN_DISABLE_META_CACHING));
4250
1738cd3e
NB		 4251 adapter->wd_state = wd_state;
4252
4253 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
4254
4255 rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
4256 if (rc) {
4257 dev_err(&pdev->dev,
4258 "Failed to query interrupt moderation feature\n");
ce74496a 4259 goto err_device_destroy;
1738cd3e 4260 }
548c4940
SJ		 4261 ena_init_io_rings(adapter,
4262 0,
4263 adapter->xdp_num_queues +
4264 adapter->num_io_queues);
1738cd3e
NB		 4265
4266 netdev->netdev_ops = &ena_netdev_ops;
4267 netdev->watchdog_timeo = TX_TIMEOUT;
4268 ena_set_ethtool_ops(netdev);
4269
4270 netdev->priv_flags |= IFF_UNICAST_FLT;
4271
4272 u64_stats_init(&adapter->syncp);
4273
4d192660 4274 rc = ena_enable_msix_and_set_admin_interrupts(adapter);
1738cd3e
NB		 4275 if (rc) {
4276 dev_err(&pdev->dev,
4277 "Failed to enable and set the admin interrupts\n");
4278 goto err_worker_destroy;
4279 }
4280 rc = ena_rss_init_default(adapter);
d1497638 4281 if (rc && (rc != -EOPNOTSUPP)) {
1738cd3e
NB		 4282 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
4283 goto err_free_msix;
4284 }
4285
4286 ena_config_debug_area(adapter);
4287
713865da
SJ		 4288 if (!ena_update_hw_stats(adapter))
4289 adapter->eni_stats_supported = true;
4290 else
4291 adapter->eni_stats_supported = false;
4292
1738cd3e
NB		 4293 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
4294
4295 netif_carrier_off(netdev);
4296
4297 rc = register_netdev(netdev);
4298 if (rc) {
4299 dev_err(&pdev->dev, "Cannot register net device\n");
4300 goto err_rss;
4301 }
4302
1738cd3e
NB		 4303 INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
4304
4305 adapter->last_keep_alive_jiffies = jiffies;
82ef30f1
NB		 4306 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
4307 adapter->missing_tx_completion_to = TX_TIMEOUT;
4308 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
4309
4310 ena_update_hints(adapter, &get_feat_ctx.hw_hints);
1738cd3e 4311
e99e88a9 4312 timer_setup(&adapter->timer_service, ena_timer_service, 0);
f850b4a7 4313 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
1738cd3e 4314
38005ca8 4315 dev_info(&pdev->dev,
a8aea849 4316 "%s found at mem %lx, mac addr %pM\n",
1738cd3e 4317 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
a8aea849 4318 netdev->dev_addr);
1738cd3e
NB		 4319
4320 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
4321
4322 adapters_found++;
4323
4324 return 0;
4325
4326err_rss:
4327 ena_com_delete_debug_area(ena_dev);
4328 ena_com_rss_destroy(ena_dev);
4329err_free_msix:
e2eed0e3 4330 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
58a54b9c
AK		 4331 /* stop submitting admin commands on a device that was reset */
4332 ena_com_set_admin_running_state(ena_dev, false);
1738cd3e 4333 ena_free_mgmnt_irq(adapter);
06443684 4334 ena_disable_msix(adapter);
1738cd3e 4335err_worker_destroy:
1738cd3e 4336 del_timer(&adapter->timer_service);
1738cd3e
NB		 4337err_device_destroy:
4338 ena_com_delete_host_info(ena_dev);
4339 ena_com_admin_destroy(ena_dev);
ce74496a
SA		 4340err_netdev_destroy:
4341 free_netdev(netdev);
1738cd3e
NB		 4342err_free_region:
4343 ena_release_bars(ena_dev, pdev);
4344err_free_ena_dev:
1738cd3e
NB		 4345 vfree(ena_dev);
4346err_disable_device:
4347 pci_disable_device(pdev);
4348 return rc;
4349}
4350
1738cd3e
NB		 4351/*****************************************************************************/
4352
428c4913 4353/* __ena_shutoff - Helper used in both PCI remove/shutdown routines
1738cd3e 4354 * @pdev: PCI device information struct
428c4913 4355 * @shutdown: Is it a shutdown operation? If false, means it is a removal
1738cd3e 4356 *
428c4913
GP		 4357 * __ena_shutoff is a helper routine that does the real work on shutdown and
4358 * removal paths; the difference between those paths is with regards to whether
4359 * dettach or unregister the netdevice.
1738cd3e 4360 */
428c4913 4361static void __ena_shutoff(struct pci_dev *pdev, bool shutdown)
1738cd3e
NB		 4362{
4363 struct ena_adapter *adapter = pci_get_drvdata(pdev);
4364 struct ena_com_dev *ena_dev;
4365 struct net_device *netdev;
4366
1738cd3e
NB		 4367 ena_dev = adapter->ena_dev;
4368 netdev = adapter->netdev;
4369
4370#ifdef CONFIG_RFS_ACCEL
4371 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
4372 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
4373 netdev->rx_cpu_rmap = NULL;
4374 }
4375#endif /* CONFIG_RFS_ACCEL */
1738cd3e 4376
63d4a4c1
SA		 4377 /* Make sure timer and reset routine won't be called after
4378 * freeing device resources.
4379 */
4380 del_timer_sync(&adapter->timer_service);
1738cd3e
NB		 4381 cancel_work_sync(&adapter->reset_task);
4382
428c4913 4383 rtnl_lock(); /* lock released inside the below if-else block */
c1c0e40b 4384 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN;
944b28aa 4385 ena_destroy_device(adapter, true);
428c4913
GP		 4386 if (shutdown) {
4387 netif_device_detach(netdev);
4388 dev_close(netdev);
4389 rtnl_unlock();
4390 } else {
4391 rtnl_unlock();
4392 unregister_netdev(netdev);
4393 free_netdev(netdev);
4394 }
1738cd3e 4395
1738cd3e
NB		 4396 ena_com_rss_destroy(ena_dev);
4397
4398 ena_com_delete_debug_area(ena_dev);
4399
4400 ena_com_delete_host_info(ena_dev);
4401
4402 ena_release_bars(ena_dev, pdev);
4403
1738cd3e
NB		 4404 pci_disable_device(pdev);
4405
1738cd3e
NB		 4406 vfree(ena_dev);
4407}
4408
428c4913
GP		 4409/* ena_remove - Device Removal Routine
4410 * @pdev: PCI device information struct
4411 *
4412 * ena_remove is called by the PCI subsystem to alert the driver
4413 * that it should release a PCI device.
4414 */
4415
4416static void ena_remove(struct pci_dev *pdev)
4417{
4418 __ena_shutoff(pdev, false);
4419}
4420
4421/* ena_shutdown - Device Shutdown Routine
4422 * @pdev: PCI device information struct
4423 *
4424 * ena_shutdown is called by the PCI subsystem to alert the driver that
4425 * a shutdown/reboot (or kexec) is happening and device must be disabled.
4426 */
4427
4428static void ena_shutdown(struct pci_dev *pdev)
4429{
4430 __ena_shutoff(pdev, true);
4431}
4432
8c5c7abd 4433/* ena_suspend - PM suspend callback
817a89ae 4434 * @dev_d: Device information struct
8c5c7abd 4435 */
817a89ae 4436static int __maybe_unused ena_suspend(struct device *dev_d)
8c5c7abd 4437{
817a89ae 4438 struct pci_dev *pdev = to_pci_dev(dev_d);
8c5c7abd
NB		 4439 struct ena_adapter *adapter = pci_get_drvdata(pdev);
4440
89dd735e 4441 ena_increase_stat(&adapter->dev_stats.suspend, 1, &adapter->syncp);
8c5c7abd
NB		 4442
4443 rtnl_lock();
4444 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
4445 dev_err(&pdev->dev,
bf2746e8 4446 "Ignoring device reset request as the device is being suspended\n");
8c5c7abd
NB		 4447 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
4448 }
cfa324a5 4449 ena_destroy_device(adapter, true);
8c5c7abd
NB		 4450 rtnl_unlock();
4451 return 0;
4452}
4453
4454/* ena_resume - PM resume callback
817a89ae 4455 * @dev_d: Device information struct
8c5c7abd 4456 */
817a89ae 4457static int __maybe_unused ena_resume(struct device *dev_d)
8c5c7abd 4458{
817a89ae 4459 struct ena_adapter *adapter = dev_get_drvdata(dev_d);
8c5c7abd
NB		 4460 int rc;
4461
89dd735e 4462 ena_increase_stat(&adapter->dev_stats.resume, 1, &adapter->syncp);
8c5c7abd
NB		 4463
4464 rtnl_lock();
4465 rc = ena_restore_device(adapter);
4466 rtnl_unlock();
4467 return rc;
4468}
817a89ae
VG		 4469
4470static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume);
8c5c7abd 4471
1738cd3e
NB		 4472static struct pci_driver ena_pci_driver = {
4473 .name = DRV_MODULE_NAME,
4474 .id_table = ena_pci_tbl,
4475 .probe = ena_probe,
4476 .remove = ena_remove,
428c4913 4477 .shutdown = ena_shutdown,
817a89ae 4478 .driver.pm = &ena_pm_ops,
115ddc49 4479 .sriov_configure = pci_sriov_configure_simple,
1738cd3e
NB		 4480};
4481
4482static int __init ena_init(void)
4483{
1738cd3e
NB		 4484 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
4485 if (!ena_wq) {
4486 pr_err("Failed to create workqueue\n");
4487 return -ENOMEM;
4488 }
4489
4490 return pci_register_driver(&ena_pci_driver);
4491}
4492
4493static void __exit ena_cleanup(void)
4494{
4495 pci_unregister_driver(&ena_pci_driver);
4496
4497 if (ena_wq) {
4498 destroy_workqueue(ena_wq);
4499 ena_wq = NULL;
4500 }
4501}
4502
4503/******************************************************************************
4504 ******************************** AENQ Handlers *******************************
4505 *****************************************************************************/
4506/* ena_update_on_link_change:
4507 * Notify the network interface about the change in link status
4508 */
4509static void ena_update_on_link_change(void *adapter_data,
4510 struct ena_admin_aenq_entry *aenq_e)
4511{
4512 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4513 struct ena_admin_aenq_link_change_desc *aenq_desc =
4514 (struct ena_admin_aenq_link_change_desc *)aenq_e;
4515 int status = aenq_desc->flags &
4516 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
4517
4518 if (status) {
f0525298 4519 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__);
1738cd3e 4520 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
d18e4f68
NB		 4521 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
4522 netif_carrier_on(adapter->netdev);
1738cd3e
NB		 4523 } else {
4524 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4525 netif_carrier_off(adapter->netdev);
4526 }
4527}
4528
4529static void ena_keep_alive_wd(void *adapter_data,
4530 struct ena_admin_aenq_entry *aenq_e)
4531{
4532 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
11a9a460
NB		 4533 struct ena_admin_aenq_keep_alive_desc *desc;
4534 u64 rx_drops;
5c665f8c 4535 u64 tx_drops;
1738cd3e 4536
11a9a460 4537 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
1738cd3e 4538 adapter->last_keep_alive_jiffies = jiffies;
11a9a460
NB		 4539
4540 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
5c665f8c 4541 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low;
11a9a460
NB		 4542
4543 u64_stats_update_begin(&adapter->syncp);
ccd143e5
SA		 4544 /* These stats are accumulated by the device, so the counters indicate
4545 * all drops since last reset.
4546 */
11a9a460 4547 adapter->dev_stats.rx_drops = rx_drops;
5c665f8c 4548 adapter->dev_stats.tx_drops = tx_drops;
11a9a460 4549 u64_stats_update_end(&adapter->syncp);
1738cd3e
NB		 4550}
4551
4552static void ena_notification(void *adapter_data,
4553 struct ena_admin_aenq_entry *aenq_e)
4554{
4555 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
82ef30f1 4556 struct ena_admin_ena_hw_hints *hints;
1738cd3e
NB		 4557
4558 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
4559 "Invalid group(%x) expected %x\n",
4560 aenq_e->aenq_common_desc.group,
4561 ENA_ADMIN_NOTIFICATION);
4562
bf2746e8 4563 switch (aenq_e->aenq_common_desc.syndrome) {
82ef30f1
NB		 4564 case ENA_ADMIN_UPDATE_HINTS:
4565 hints = (struct ena_admin_ena_hw_hints *)
4566 (&aenq_e->inline_data_w4);
4567 ena_update_hints(adapter, hints);
4568 break;
1738cd3e
NB		 4569 default:
4570 netif_err(adapter, drv, adapter->netdev,
4571 "Invalid aenq notification link state %d\n",
bf2746e8 4572 aenq_e->aenq_common_desc.syndrome);
1738cd3e
NB		 4573 }
4574}
4575
4576/* This handler will called for unknown event group or unimplemented handlers*/
4577static void unimplemented_aenq_handler(void *data,
4578 struct ena_admin_aenq_entry *aenq_e)
4579{
4580 struct ena_adapter *adapter = (struct ena_adapter *)data;
4581
4582 netif_err(adapter, drv, adapter->netdev,
4583 "Unknown event was received or event with unimplemented handler\n");
4584}
4585
4586static struct ena_aenq_handlers aenq_handlers = {
4587 .handlers = {
4588 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
4589 [ENA_ADMIN_NOTIFICATION] = ena_notification,
4590 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
4591 },
4592 .unimplemented_handler = unimplemented_aenq_handler
4593};
4594
4595module_init(ena_init);
4596module_exit(ena_cleanup);
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