]>
Commit | Line | Data |
---|---|---|
6aa20a22 JG |
1 | /* |
2 | * 7990.c -- LANCE ethernet IC generic routines. | |
1da177e4 | 3 | * This is an attempt to separate out the bits of various ethernet |
6aa20a22 | 4 | * drivers that are common because they all use the AMD 7990 LANCE |
1da177e4 LT |
5 | * (Local Area Network Controller for Ethernet) chip. |
6 | * | |
7 | * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk> | |
8 | * | |
9 | * Most of this stuff was obtained by looking at other LANCE drivers, | |
10 | * in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful. | |
11 | * NB: this was made easy by the fact that Jes Sorensen had cleaned up | |
6aa20a22 | 12 | * most of a2025 and sunlance with the aim of merging them, so the |
1da177e4 LT |
13 | * common code was pretty obvious. |
14 | */ | |
15 | #include <linux/crc32.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/errno.h> | |
18 | #include <linux/netdevice.h> | |
19 | #include <linux/etherdevice.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/types.h> | |
24 | #include <linux/fcntl.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/ioport.h> | |
27 | #include <linux/in.h> | |
28 | #include <linux/route.h> | |
1da177e4 LT |
29 | #include <linux/string.h> |
30 | #include <linux/skbuff.h> | |
3c139586 | 31 | #include <asm/irq.h> |
1da177e4 LT |
32 | /* Used for the temporal inet entries and routing */ |
33 | #include <linux/socket.h> | |
34 | #include <linux/bitops.h> | |
35 | ||
1da177e4 LT |
36 | #include <asm/io.h> |
37 | #include <asm/dma.h> | |
38 | #include <asm/pgtable.h> | |
39 | #ifdef CONFIG_HP300 | |
40 | #include <asm/blinken.h> | |
41 | #endif | |
42 | ||
43 | #include "7990.h" | |
44 | ||
45 | #define WRITERAP(lp,x) out_be16(lp->base + LANCE_RAP, (x)) | |
46 | #define WRITERDP(lp,x) out_be16(lp->base + LANCE_RDP, (x)) | |
47 | #define READRDP(lp) in_be16(lp->base + LANCE_RDP) | |
48 | ||
49 | #if defined(CONFIG_HPLANCE) || defined(CONFIG_HPLANCE_MODULE) | |
50 | #include "hplance.h" | |
51 | ||
52 | #undef WRITERAP | |
53 | #undef WRITERDP | |
54 | #undef READRDP | |
55 | ||
56 | #if defined(CONFIG_MVME147_NET) || defined(CONFIG_MVME147_NET_MODULE) | |
57 | ||
58 | /* Lossage Factor Nine, Mr Sulu. */ | |
59 | #define WRITERAP(lp,x) (lp->writerap(lp,x)) | |
60 | #define WRITERDP(lp,x) (lp->writerdp(lp,x)) | |
61 | #define READRDP(lp) (lp->readrdp(lp)) | |
62 | ||
63 | #else | |
64 | ||
65 | /* These inlines can be used if only CONFIG_HPLANCE is defined */ | |
66 | static inline void WRITERAP(struct lance_private *lp, __u16 value) | |
67 | { | |
68 | do { | |
69 | out_be16(lp->base + HPLANCE_REGOFF + LANCE_RAP, value); | |
70 | } while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0); | |
71 | } | |
72 | ||
73 | static inline void WRITERDP(struct lance_private *lp, __u16 value) | |
74 | { | |
75 | do { | |
76 | out_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP, value); | |
77 | } while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0); | |
78 | } | |
79 | ||
80 | static inline __u16 READRDP(struct lance_private *lp) | |
81 | { | |
82 | __u16 value; | |
83 | do { | |
84 | value = in_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP); | |
85 | } while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0); | |
86 | return value; | |
87 | } | |
88 | ||
89 | #endif | |
90 | #endif /* CONFIG_HPLANCE || CONFIG_HPLANCE_MODULE */ | |
91 | ||
92 | /* debugging output macros, various flavours */ | |
93 | /* #define TEST_HITS */ | |
94 | #ifdef UNDEF | |
95 | #define PRINT_RINGS() \ | |
96 | do { \ | |
97 | int t; \ | |
98 | for (t=0; t < RX_RING_SIZE; t++) { \ | |
99 | printk("R%d: @(%02X %04X) len %04X, mblen %04X, bits %02X\n",\ | |
100 | t, ib->brx_ring[t].rmd1_hadr, ib->brx_ring[t].rmd0,\ | |
101 | ib->brx_ring[t].length,\ | |
102 | ib->brx_ring[t].mblength, ib->brx_ring[t].rmd1_bits);\ | |
103 | }\ | |
104 | for (t=0; t < TX_RING_SIZE; t++) { \ | |
105 | printk("T%d: @(%02X %04X) len %04X, misc %04X, bits %02X\n",\ | |
106 | t, ib->btx_ring[t].tmd1_hadr, ib->btx_ring[t].tmd0,\ | |
107 | ib->btx_ring[t].length,\ | |
108 | ib->btx_ring[t].misc, ib->btx_ring[t].tmd1_bits);\ | |
109 | }\ | |
6aa20a22 | 110 | } while (0) |
1da177e4 LT |
111 | #else |
112 | #define PRINT_RINGS() | |
6aa20a22 | 113 | #endif |
1da177e4 LT |
114 | |
115 | /* Load the CSR registers. The LANCE has to be STOPped when we do this! */ | |
116 | static void load_csrs (struct lance_private *lp) | |
117 | { | |
118 | volatile struct lance_init_block *aib = lp->lance_init_block; | |
119 | int leptr; | |
120 | ||
121 | leptr = LANCE_ADDR (aib); | |
122 | ||
123 | WRITERAP(lp, LE_CSR1); /* load address of init block */ | |
124 | WRITERDP(lp, leptr & 0xFFFF); | |
125 | WRITERAP(lp, LE_CSR2); | |
126 | WRITERDP(lp, leptr >> 16); | |
127 | WRITERAP(lp, LE_CSR3); | |
128 | WRITERDP(lp, lp->busmaster_regval); /* set byteswap/ALEctrl/byte ctrl */ | |
129 | ||
130 | /* Point back to csr0 */ | |
131 | WRITERAP(lp, LE_CSR0); | |
132 | } | |
133 | ||
134 | /* #define to 0 or 1 appropriately */ | |
135 | #define DEBUG_IRING 0 | |
136 | /* Set up the Lance Rx and Tx rings and the init block */ | |
137 | static void lance_init_ring (struct net_device *dev) | |
138 | { | |
139 | struct lance_private *lp = netdev_priv(dev); | |
140 | volatile struct lance_init_block *ib = lp->init_block; | |
141 | volatile struct lance_init_block *aib; /* for LANCE_ADDR computations */ | |
142 | int leptr; | |
143 | int i; | |
144 | ||
145 | aib = lp->lance_init_block; | |
146 | ||
147 | lp->rx_new = lp->tx_new = 0; | |
148 | lp->rx_old = lp->tx_old = 0; | |
149 | ||
150 | ib->mode = LE_MO_PROM; /* normal, enable Tx & Rx */ | |
151 | ||
152 | /* Copy the ethernet address to the lance init block | |
153 | * Notice that we do a byteswap if we're big endian. | |
154 | * [I think this is the right criterion; at least, sunlance, | |
155 | * a2065 and atarilance do the byteswap and lance.c (PC) doesn't. | |
156 | * However, the datasheet says that the BSWAP bit doesn't affect | |
157 | * the init block, so surely it should be low byte first for | |
6aa20a22 | 158 | * everybody? Um.] |
1da177e4 LT |
159 | * We could define the ib->physaddr as three 16bit values and |
160 | * use (addr[1] << 8) | addr[0] & co, but this is more efficient. | |
161 | */ | |
162 | #ifdef __BIG_ENDIAN | |
163 | ib->phys_addr [0] = dev->dev_addr [1]; | |
164 | ib->phys_addr [1] = dev->dev_addr [0]; | |
165 | ib->phys_addr [2] = dev->dev_addr [3]; | |
166 | ib->phys_addr [3] = dev->dev_addr [2]; | |
167 | ib->phys_addr [4] = dev->dev_addr [5]; | |
168 | ib->phys_addr [5] = dev->dev_addr [4]; | |
169 | #else | |
170 | for (i=0; i<6; i++) | |
171 | ib->phys_addr[i] = dev->dev_addr[i]; | |
6aa20a22 | 172 | #endif |
1da177e4 LT |
173 | |
174 | if (DEBUG_IRING) | |
175 | printk ("TX rings:\n"); | |
6aa20a22 | 176 | |
1da177e4 LT |
177 | lp->tx_full = 0; |
178 | /* Setup the Tx ring entries */ | |
179 | for (i = 0; i < (1<<lp->lance_log_tx_bufs); i++) { | |
180 | leptr = LANCE_ADDR(&aib->tx_buf[i][0]); | |
181 | ib->btx_ring [i].tmd0 = leptr; | |
182 | ib->btx_ring [i].tmd1_hadr = leptr >> 16; | |
183 | ib->btx_ring [i].tmd1_bits = 0; | |
184 | ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */ | |
185 | ib->btx_ring [i].misc = 0; | |
6aa20a22 | 186 | if (DEBUG_IRING) |
1da177e4 LT |
187 | printk ("%d: 0x%8.8x\n", i, leptr); |
188 | } | |
189 | ||
190 | /* Setup the Rx ring entries */ | |
191 | if (DEBUG_IRING) | |
192 | printk ("RX rings:\n"); | |
193 | for (i = 0; i < (1<<lp->lance_log_rx_bufs); i++) { | |
194 | leptr = LANCE_ADDR(&aib->rx_buf[i][0]); | |
195 | ||
196 | ib->brx_ring [i].rmd0 = leptr; | |
197 | ib->brx_ring [i].rmd1_hadr = leptr >> 16; | |
198 | ib->brx_ring [i].rmd1_bits = LE_R1_OWN; | |
199 | /* 0xf000 == bits that must be one (reserved, presumably) */ | |
200 | ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000; | |
201 | ib->brx_ring [i].mblength = 0; | |
202 | if (DEBUG_IRING) | |
203 | printk ("%d: 0x%8.8x\n", i, leptr); | |
204 | } | |
205 | ||
206 | /* Setup the initialization block */ | |
6aa20a22 | 207 | |
1da177e4 LT |
208 | /* Setup rx descriptor pointer */ |
209 | leptr = LANCE_ADDR(&aib->brx_ring); | |
210 | ib->rx_len = (lp->lance_log_rx_bufs << 13) | (leptr >> 16); | |
211 | ib->rx_ptr = leptr; | |
212 | if (DEBUG_IRING) | |
213 | printk ("RX ptr: %8.8x\n", leptr); | |
6aa20a22 | 214 | |
1da177e4 LT |
215 | /* Setup tx descriptor pointer */ |
216 | leptr = LANCE_ADDR(&aib->btx_ring); | |
217 | ib->tx_len = (lp->lance_log_tx_bufs << 13) | (leptr >> 16); | |
218 | ib->tx_ptr = leptr; | |
219 | if (DEBUG_IRING) | |
220 | printk ("TX ptr: %8.8x\n", leptr); | |
221 | ||
222 | /* Clear the multicast filter */ | |
223 | ib->filter [0] = 0; | |
224 | ib->filter [1] = 0; | |
225 | PRINT_RINGS(); | |
226 | } | |
227 | ||
228 | /* LANCE must be STOPped before we do this, too... */ | |
229 | static int init_restart_lance (struct lance_private *lp) | |
230 | { | |
231 | int i; | |
232 | ||
233 | WRITERAP(lp, LE_CSR0); | |
234 | WRITERDP(lp, LE_C0_INIT); | |
235 | ||
236 | /* Need a hook here for sunlance ledma stuff */ | |
237 | ||
238 | /* Wait for the lance to complete initialization */ | |
239 | for (i = 0; (i < 100) && !(READRDP(lp) & (LE_C0_ERR | LE_C0_IDON)); i++) | |
240 | barrier(); | |
241 | if ((i == 100) || (READRDP(lp) & LE_C0_ERR)) { | |
242 | printk ("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, READRDP(lp)); | |
243 | return -1; | |
244 | } | |
245 | ||
246 | /* Clear IDON by writing a "1", enable interrupts and start lance */ | |
247 | WRITERDP(lp, LE_C0_IDON); | |
248 | WRITERDP(lp, LE_C0_INEA | LE_C0_STRT); | |
249 | ||
250 | return 0; | |
251 | } | |
252 | ||
253 | static int lance_reset (struct net_device *dev) | |
254 | { | |
255 | struct lance_private *lp = netdev_priv(dev); | |
256 | int status; | |
6aa20a22 | 257 | |
1da177e4 LT |
258 | /* Stop the lance */ |
259 | WRITERAP(lp, LE_CSR0); | |
260 | WRITERDP(lp, LE_C0_STOP); | |
261 | ||
262 | load_csrs (lp); | |
263 | lance_init_ring (dev); | |
1ae5dc34 | 264 | dev->trans_start = jiffies; /* prevent tx timeout */ |
1da177e4 LT |
265 | status = init_restart_lance (lp); |
266 | #ifdef DEBUG_DRIVER | |
267 | printk ("Lance restart=%d\n", status); | |
268 | #endif | |
269 | return status; | |
270 | } | |
271 | ||
272 | static int lance_rx (struct net_device *dev) | |
273 | { | |
274 | struct lance_private *lp = netdev_priv(dev); | |
275 | volatile struct lance_init_block *ib = lp->init_block; | |
276 | volatile struct lance_rx_desc *rd; | |
277 | unsigned char bits; | |
1da177e4 LT |
278 | #ifdef TEST_HITS |
279 | int i; | |
280 | #endif | |
281 | ||
282 | #ifdef TEST_HITS | |
283 | printk ("["); | |
284 | for (i = 0; i < RX_RING_SIZE; i++) { | |
285 | if (i == lp->rx_new) | |
286 | printk ("%s", | |
287 | ib->brx_ring [i].rmd1_bits & LE_R1_OWN ? "_" : "X"); | |
288 | else | |
289 | printk ("%s", | |
290 | ib->brx_ring [i].rmd1_bits & LE_R1_OWN ? "." : "1"); | |
291 | } | |
292 | printk ("]"); | |
293 | #endif | |
294 | #ifdef CONFIG_HP300 | |
295 | blinken_leds(0x40, 0); | |
6aa20a22 | 296 | #endif |
1da177e4 LT |
297 | WRITERDP(lp, LE_C0_RINT | LE_C0_INEA); /* ack Rx int, reenable ints */ |
298 | for (rd = &ib->brx_ring [lp->rx_new]; /* For each Rx ring we own... */ | |
299 | !((bits = rd->rmd1_bits) & LE_R1_OWN); | |
300 | rd = &ib->brx_ring [lp->rx_new]) { | |
301 | ||
302 | /* We got an incomplete frame? */ | |
303 | if ((bits & LE_R1_POK) != LE_R1_POK) { | |
09f75cd7 JG |
304 | dev->stats.rx_over_errors++; |
305 | dev->stats.rx_errors++; | |
1da177e4 LT |
306 | continue; |
307 | } else if (bits & LE_R1_ERR) { | |
308 | /* Count only the end frame as a rx error, | |
309 | * not the beginning | |
310 | */ | |
09f75cd7 JG |
311 | if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; |
312 | if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; | |
313 | if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; | |
314 | if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; | |
315 | if (bits & LE_R1_EOP) dev->stats.rx_errors++; | |
1da177e4 | 316 | } else { |
79ea13ce | 317 | int len = (rd->mblength & 0xfff) - 4; |
1d266430 | 318 | struct sk_buff *skb = netdev_alloc_skb(dev, len + 2); |
1da177e4 | 319 | |
79ea13ce | 320 | if (!skb) { |
09f75cd7 | 321 | dev->stats.rx_dropped++; |
1da177e4 LT |
322 | rd->mblength = 0; |
323 | rd->rmd1_bits = LE_R1_OWN; | |
324 | lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask; | |
325 | return 0; | |
326 | } | |
6aa20a22 | 327 | |
1da177e4 LT |
328 | skb_reserve (skb, 2); /* 16 byte align */ |
329 | skb_put (skb, len); /* make room */ | |
8c7b7faa | 330 | skb_copy_to_linear_data(skb, |
1da177e4 | 331 | (unsigned char *)&(ib->rx_buf [lp->rx_new][0]), |
8c7b7faa | 332 | len); |
1da177e4 LT |
333 | skb->protocol = eth_type_trans (skb, dev); |
334 | netif_rx (skb); | |
09f75cd7 JG |
335 | dev->stats.rx_packets++; |
336 | dev->stats.rx_bytes += len; | |
1da177e4 LT |
337 | } |
338 | ||
339 | /* Return the packet to the pool */ | |
340 | rd->mblength = 0; | |
341 | rd->rmd1_bits = LE_R1_OWN; | |
342 | lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask; | |
343 | } | |
344 | return 0; | |
345 | } | |
346 | ||
347 | static int lance_tx (struct net_device *dev) | |
348 | { | |
349 | struct lance_private *lp = netdev_priv(dev); | |
350 | volatile struct lance_init_block *ib = lp->init_block; | |
351 | volatile struct lance_tx_desc *td; | |
352 | int i, j; | |
353 | int status; | |
354 | ||
355 | #ifdef CONFIG_HP300 | |
356 | blinken_leds(0x80, 0); | |
357 | #endif | |
358 | /* csr0 is 2f3 */ | |
359 | WRITERDP(lp, LE_C0_TINT | LE_C0_INEA); | |
360 | /* csr0 is 73 */ | |
361 | ||
362 | j = lp->tx_old; | |
363 | for (i = j; i != lp->tx_new; i = j) { | |
364 | td = &ib->btx_ring [i]; | |
365 | ||
366 | /* If we hit a packet not owned by us, stop */ | |
367 | if (td->tmd1_bits & LE_T1_OWN) | |
368 | break; | |
6aa20a22 | 369 | |
1da177e4 LT |
370 | if (td->tmd1_bits & LE_T1_ERR) { |
371 | status = td->misc; | |
6aa20a22 | 372 | |
09f75cd7 JG |
373 | dev->stats.tx_errors++; |
374 | if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; | |
375 | if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; | |
1da177e4 LT |
376 | |
377 | if (status & LE_T3_CLOS) { | |
09f75cd7 | 378 | dev->stats.tx_carrier_errors++; |
1da177e4 LT |
379 | if (lp->auto_select) { |
380 | lp->tpe = 1 - lp->tpe; | |
381 | printk("%s: Carrier Lost, trying %s\n", | |
382 | dev->name, lp->tpe?"TPE":"AUI"); | |
383 | /* Stop the lance */ | |
384 | WRITERAP(lp, LE_CSR0); | |
385 | WRITERDP(lp, LE_C0_STOP); | |
386 | lance_init_ring (dev); | |
387 | load_csrs (lp); | |
388 | init_restart_lance (lp); | |
389 | return 0; | |
390 | } | |
391 | } | |
392 | ||
393 | /* buffer errors and underflows turn off the transmitter */ | |
394 | /* Restart the adapter */ | |
395 | if (status & (LE_T3_BUF|LE_T3_UFL)) { | |
09f75cd7 | 396 | dev->stats.tx_fifo_errors++; |
1da177e4 LT |
397 | |
398 | printk ("%s: Tx: ERR_BUF|ERR_UFL, restarting\n", | |
399 | dev->name); | |
400 | /* Stop the lance */ | |
401 | WRITERAP(lp, LE_CSR0); | |
402 | WRITERDP(lp, LE_C0_STOP); | |
403 | lance_init_ring (dev); | |
404 | load_csrs (lp); | |
405 | init_restart_lance (lp); | |
406 | return 0; | |
407 | } | |
408 | } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) { | |
409 | /* | |
410 | * So we don't count the packet more than once. | |
411 | */ | |
412 | td->tmd1_bits &= ~(LE_T1_POK); | |
413 | ||
414 | /* One collision before packet was sent. */ | |
415 | if (td->tmd1_bits & LE_T1_EONE) | |
09f75cd7 | 416 | dev->stats.collisions++; |
1da177e4 LT |
417 | |
418 | /* More than one collision, be optimistic. */ | |
419 | if (td->tmd1_bits & LE_T1_EMORE) | |
09f75cd7 | 420 | dev->stats.collisions += 2; |
1da177e4 | 421 | |
09f75cd7 | 422 | dev->stats.tx_packets++; |
1da177e4 | 423 | } |
6aa20a22 | 424 | |
1da177e4 LT |
425 | j = (j + 1) & lp->tx_ring_mod_mask; |
426 | } | |
427 | lp->tx_old = j; | |
428 | WRITERDP(lp, LE_C0_TINT | LE_C0_INEA); | |
429 | return 0; | |
430 | } | |
431 | ||
432 | static irqreturn_t | |
7d12e780 | 433 | lance_interrupt (int irq, void *dev_id) |
1da177e4 LT |
434 | { |
435 | struct net_device *dev = (struct net_device *)dev_id; | |
436 | struct lance_private *lp = netdev_priv(dev); | |
437 | int csr0; | |
438 | ||
439 | spin_lock (&lp->devlock); | |
440 | ||
441 | WRITERAP(lp, LE_CSR0); /* LANCE Controller Status */ | |
442 | csr0 = READRDP(lp); | |
443 | ||
444 | PRINT_RINGS(); | |
6aa20a22 | 445 | |
1da177e4 LT |
446 | if (!(csr0 & LE_C0_INTR)) { /* Check if any interrupt has */ |
447 | spin_unlock (&lp->devlock); | |
448 | return IRQ_NONE; /* been generated by the Lance. */ | |
449 | } | |
450 | ||
451 | /* Acknowledge all the interrupt sources ASAP */ | |
452 | WRITERDP(lp, csr0 & ~(LE_C0_INEA|LE_C0_TDMD|LE_C0_STOP|LE_C0_STRT|LE_C0_INIT)); | |
453 | ||
454 | if ((csr0 & LE_C0_ERR)) { | |
455 | /* Clear the error condition */ | |
456 | WRITERDP(lp, LE_C0_BABL|LE_C0_ERR|LE_C0_MISS|LE_C0_INEA); | |
457 | } | |
458 | ||
459 | if (csr0 & LE_C0_RINT) | |
460 | lance_rx (dev); | |
461 | ||
462 | if (csr0 & LE_C0_TINT) | |
463 | lance_tx (dev); | |
464 | ||
465 | /* Log misc errors. */ | |
466 | if (csr0 & LE_C0_BABL) | |
09f75cd7 | 467 | dev->stats.tx_errors++; /* Tx babble. */ |
1da177e4 | 468 | if (csr0 & LE_C0_MISS) |
09f75cd7 | 469 | dev->stats.rx_errors++; /* Missed a Rx frame. */ |
1da177e4 | 470 | if (csr0 & LE_C0_MERR) { |
6aa20a22 | 471 | printk("%s: Bus master arbitration failure, status %4.4x.\n", |
1da177e4 LT |
472 | dev->name, csr0); |
473 | /* Restart the chip. */ | |
474 | WRITERDP(lp, LE_C0_STRT); | |
475 | } | |
476 | ||
477 | if (lp->tx_full && netif_queue_stopped(dev) && (TX_BUFFS_AVAIL >= 0)) { | |
478 | lp->tx_full = 0; | |
479 | netif_wake_queue (dev); | |
480 | } | |
6aa20a22 | 481 | |
1da177e4 LT |
482 | WRITERAP(lp, LE_CSR0); |
483 | WRITERDP(lp, LE_C0_BABL|LE_C0_CERR|LE_C0_MISS|LE_C0_MERR|LE_C0_IDON|LE_C0_INEA); | |
484 | ||
485 | spin_unlock (&lp->devlock); | |
486 | return IRQ_HANDLED; | |
487 | } | |
488 | ||
489 | int lance_open (struct net_device *dev) | |
490 | { | |
491 | struct lance_private *lp = netdev_priv(dev); | |
492 | int res; | |
6aa20a22 | 493 | |
1da177e4 | 494 | /* Install the Interrupt handler. Or we could shunt this out to specific drivers? */ |
38515e90 | 495 | if (request_irq(lp->irq, lance_interrupt, IRQF_SHARED, lp->name, dev)) |
1da177e4 LT |
496 | return -EAGAIN; |
497 | ||
498 | res = lance_reset(dev); | |
499 | spin_lock_init(&lp->devlock); | |
500 | netif_start_queue (dev); | |
501 | ||
502 | return res; | |
503 | } | |
bf4d5934 | 504 | EXPORT_SYMBOL_GPL(lance_open); |
1da177e4 LT |
505 | |
506 | int lance_close (struct net_device *dev) | |
507 | { | |
508 | struct lance_private *lp = netdev_priv(dev); | |
6aa20a22 | 509 | |
1da177e4 LT |
510 | netif_stop_queue (dev); |
511 | ||
512 | /* Stop the LANCE */ | |
513 | WRITERAP(lp, LE_CSR0); | |
514 | WRITERDP(lp, LE_C0_STOP); | |
515 | ||
516 | free_irq(lp->irq, dev); | |
517 | ||
518 | return 0; | |
519 | } | |
bf4d5934 | 520 | EXPORT_SYMBOL_GPL(lance_close); |
1da177e4 LT |
521 | |
522 | void lance_tx_timeout(struct net_device *dev) | |
523 | { | |
524 | printk("lance_tx_timeout\n"); | |
525 | lance_reset(dev); | |
1ae5dc34 | 526 | dev->trans_start = jiffies; /* prevent tx timeout */ |
1da177e4 LT |
527 | netif_wake_queue (dev); |
528 | } | |
bf4d5934 | 529 | EXPORT_SYMBOL_GPL(lance_tx_timeout); |
1da177e4 LT |
530 | |
531 | int lance_start_xmit (struct sk_buff *skb, struct net_device *dev) | |
532 | { | |
533 | struct lance_private *lp = netdev_priv(dev); | |
534 | volatile struct lance_init_block *ib = lp->init_block; | |
535 | int entry, skblen, len; | |
536 | static int outs; | |
537 | unsigned long flags; | |
538 | ||
539 | if (!TX_BUFFS_AVAIL) | |
5b548140 | 540 | return NETDEV_TX_LOCKED; |
1da177e4 LT |
541 | |
542 | netif_stop_queue (dev); | |
543 | ||
544 | skblen = skb->len; | |
545 | ||
546 | #ifdef DEBUG_DRIVER | |
547 | /* dump the packet */ | |
548 | { | |
549 | int i; | |
6aa20a22 | 550 | |
1da177e4 LT |
551 | for (i = 0; i < 64; i++) { |
552 | if ((i % 16) == 0) | |
553 | printk ("\n"); | |
554 | printk ("%2.2x ", skb->data [i]); | |
555 | } | |
556 | } | |
557 | #endif | |
558 | len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen; | |
559 | entry = lp->tx_new & lp->tx_ring_mod_mask; | |
560 | ib->btx_ring [entry].length = (-len) | 0xf000; | |
561 | ib->btx_ring [entry].misc = 0; | |
6aa20a22 | 562 | |
cfa08bb5 GU |
563 | if (skb->len < ETH_ZLEN) |
564 | memset((void *)&ib->tx_buf[entry][0], 0, ETH_ZLEN); | |
565 | skb_copy_from_linear_data(skb, (void *)&ib->tx_buf[entry][0], skblen); | |
6aa20a22 | 566 | |
1da177e4 LT |
567 | /* Now, give the packet to the lance */ |
568 | ib->btx_ring [entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN); | |
569 | lp->tx_new = (lp->tx_new+1) & lp->tx_ring_mod_mask; | |
570 | ||
571 | outs++; | |
572 | /* Kick the lance: transmit now */ | |
573 | WRITERDP(lp, LE_C0_INEA | LE_C0_TDMD); | |
1da177e4 | 574 | dev_kfree_skb (skb); |
6aa20a22 | 575 | |
1da177e4 LT |
576 | spin_lock_irqsave (&lp->devlock, flags); |
577 | if (TX_BUFFS_AVAIL) | |
578 | netif_start_queue (dev); | |
579 | else | |
580 | lp->tx_full = 1; | |
581 | spin_unlock_irqrestore (&lp->devlock, flags); | |
582 | ||
ec634fe3 | 583 | return NETDEV_TX_OK; |
1da177e4 | 584 | } |
bf4d5934 | 585 | EXPORT_SYMBOL_GPL(lance_start_xmit); |
1da177e4 | 586 | |
1da177e4 LT |
587 | /* taken from the depca driver via a2065.c */ |
588 | static void lance_load_multicast (struct net_device *dev) | |
589 | { | |
590 | struct lance_private *lp = netdev_priv(dev); | |
591 | volatile struct lance_init_block *ib = lp->init_block; | |
592 | volatile u16 *mcast_table = (u16 *)&ib->filter; | |
22bedad3 | 593 | struct netdev_hw_addr *ha; |
1da177e4 | 594 | u32 crc; |
6aa20a22 | 595 | |
1da177e4 | 596 | /* set all multicast bits */ |
6aa20a22 | 597 | if (dev->flags & IFF_ALLMULTI){ |
1da177e4 LT |
598 | ib->filter [0] = 0xffffffff; |
599 | ib->filter [1] = 0xffffffff; | |
600 | return; | |
601 | } | |
602 | /* clear the multicast filter */ | |
603 | ib->filter [0] = 0; | |
604 | ib->filter [1] = 0; | |
605 | ||
606 | /* Add addresses */ | |
22bedad3 | 607 | netdev_for_each_mc_addr(ha, dev) { |
498d8e23 | 608 | crc = ether_crc_le(6, ha->addr); |
1da177e4 LT |
609 | crc = crc >> 26; |
610 | mcast_table [crc >> 4] |= 1 << (crc & 0xf); | |
611 | } | |
1da177e4 LT |
612 | } |
613 | ||
614 | ||
615 | void lance_set_multicast (struct net_device *dev) | |
616 | { | |
617 | struct lance_private *lp = netdev_priv(dev); | |
618 | volatile struct lance_init_block *ib = lp->init_block; | |
619 | int stopped; | |
620 | ||
621 | stopped = netif_queue_stopped(dev); | |
622 | if (!stopped) | |
623 | netif_stop_queue (dev); | |
624 | ||
625 | while (lp->tx_old != lp->tx_new) | |
626 | schedule(); | |
627 | ||
628 | WRITERAP(lp, LE_CSR0); | |
629 | WRITERDP(lp, LE_C0_STOP); | |
630 | lance_init_ring (dev); | |
631 | ||
632 | if (dev->flags & IFF_PROMISC) { | |
633 | ib->mode |= LE_MO_PROM; | |
634 | } else { | |
635 | ib->mode &= ~LE_MO_PROM; | |
636 | lance_load_multicast (dev); | |
637 | } | |
638 | load_csrs (lp); | |
639 | init_restart_lance (lp); | |
640 | ||
641 | if (!stopped) | |
642 | netif_start_queue (dev); | |
643 | } | |
bf4d5934 | 644 | EXPORT_SYMBOL_GPL(lance_set_multicast); |
1da177e4 LT |
645 | |
646 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
647 | void lance_poll(struct net_device *dev) | |
648 | { | |
649 | struct lance_private *lp = netdev_priv(dev); | |
650 | ||
651 | spin_lock (&lp->devlock); | |
652 | WRITERAP(lp, LE_CSR0); | |
653 | WRITERDP(lp, LE_C0_STRT); | |
654 | spin_unlock (&lp->devlock); | |
2850bc27 | 655 | lance_interrupt(dev->irq, dev); |
1da177e4 LT |
656 | } |
657 | #endif | |
658 | ||
659 | MODULE_LICENSE("GPL"); |