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Commit | Line | Data |
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1da177e4 LT |
1 | /* atarilance.c: Ethernet driver for VME Lance cards on the Atari */ |
2 | /* | |
3 | Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de) | |
4 | ||
5 | This software may be used and distributed according to the terms | |
6 | of the GNU General Public License, incorporated herein by reference. | |
7 | ||
8 | This drivers was written with the following sources of reference: | |
9 | - The driver for the Riebl Lance card by the TU Vienna. | |
10 | - The modified TUW driver for PAM's VME cards | |
11 | - The PC-Linux driver for Lance cards (but this is for bus master | |
12 | cards, not the shared memory ones) | |
13 | - The Amiga Ariadne driver | |
14 | ||
15 | v1.0: (in 1.2.13pl4/0.9.13) | |
16 | Initial version | |
17 | v1.1: (in 1.2.13pl5) | |
18 | more comments | |
19 | deleted some debugging stuff | |
20 | optimized register access (keep AREG pointing to CSR0) | |
21 | following AMD, CSR0_STRT should be set only after IDON is detected | |
22 | use memcpy() for data transfers, that also employs long word moves | |
23 | better probe procedure for 24-bit systems | |
24 | non-VME-RieblCards need extra delays in memcpy | |
25 | must also do write test, since 0xfxe00000 may hit ROM | |
26 | use 8/32 tx/rx buffers, which should give better NFS performance; | |
27 | this is made possible by shifting the last packet buffer after the | |
28 | RieblCard reserved area | |
29 | v1.2: (in 1.2.13pl8) | |
30 | again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000 | |
31 | and thus RAM, in case of no Lance found all memory contents have to | |
32 | be restored! | |
33 | Now possible to compile as module. | |
34 | v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3) | |
35 | Several little 1.3 adaptions | |
36 | When the lance is stopped it jumps back into little-endian | |
37 | mode. It is therefore necessary to put it back where it | |
38 | belongs, in big endian mode, in order to make things work. | |
39 | This might be the reason why multicast-mode didn't work | |
40 | before, but I'm not able to test it as I only got an Amiga | |
41 | (we had similar problems with the A2065 driver). | |
42 | ||
43 | */ | |
44 | ||
45 | static char version[] = "atarilance.c: v1.3 04/04/96 " | |
46 | "Roman.Hodek@informatik.uni-erlangen.de\n"; | |
47 | ||
48 | #include <linux/netdevice.h> | |
49 | #include <linux/etherdevice.h> | |
50 | #include <linux/module.h> | |
51 | #include <linux/stddef.h> | |
52 | #include <linux/kernel.h> | |
53 | #include <linux/string.h> | |
54 | #include <linux/errno.h> | |
55 | #include <linux/skbuff.h> | |
1da177e4 LT |
56 | #include <linux/interrupt.h> |
57 | #include <linux/init.h> | |
58 | #include <linux/bitops.h> | |
59 | ||
60 | #include <asm/setup.h> | |
61 | #include <asm/irq.h> | |
62 | #include <asm/atarihw.h> | |
63 | #include <asm/atariints.h> | |
64 | #include <asm/io.h> | |
65 | ||
66 | /* Debug level: | |
67 | * 0 = silent, print only serious errors | |
68 | * 1 = normal, print error messages | |
69 | * 2 = debug, print debug infos | |
70 | * 3 = debug, print even more debug infos (packet data) | |
71 | */ | |
72 | ||
73 | #define LANCE_DEBUG 1 | |
74 | ||
75 | #ifdef LANCE_DEBUG | |
76 | static int lance_debug = LANCE_DEBUG; | |
77 | #else | |
78 | static int lance_debug = 1; | |
79 | #endif | |
8d3b33f6 | 80 | module_param(lance_debug, int, 0); |
1da177e4 LT |
81 | MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)"); |
82 | MODULE_LICENSE("GPL"); | |
83 | ||
84 | /* Print debug messages on probing? */ | |
85 | #undef LANCE_DEBUG_PROBE | |
86 | ||
87 | #define DPRINTK(n,a) \ | |
88 | do { \ | |
89 | if (lance_debug >= n) \ | |
90 | printk a; \ | |
91 | } while( 0 ) | |
92 | ||
93 | #ifdef LANCE_DEBUG_PROBE | |
94 | # define PROBE_PRINT(a) printk a | |
95 | #else | |
96 | # define PROBE_PRINT(a) | |
97 | #endif | |
98 | ||
99 | /* These define the number of Rx and Tx buffers as log2. (Only powers | |
100 | * of two are valid) | |
101 | * Much more rx buffers (32) are reserved than tx buffers (8), since receiving | |
102 | * is more time critical then sending and packets may have to remain in the | |
103 | * board's memory when main memory is low. | |
104 | */ | |
105 | ||
106 | #define TX_LOG_RING_SIZE 3 | |
107 | #define RX_LOG_RING_SIZE 5 | |
108 | ||
109 | /* These are the derived values */ | |
110 | ||
111 | #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE) | |
112 | #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5) | |
113 | #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) | |
114 | ||
115 | #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE) | |
116 | #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5) | |
117 | #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) | |
118 | ||
c63fdf46 | 119 | #define TX_TIMEOUT (HZ/5) |
1da177e4 LT |
120 | |
121 | /* The LANCE Rx and Tx ring descriptors. */ | |
122 | struct lance_rx_head { | |
123 | unsigned short base; /* Low word of base addr */ | |
124 | volatile unsigned char flag; | |
125 | unsigned char base_hi; /* High word of base addr (unused) */ | |
126 | short buf_length; /* This length is 2s complement! */ | |
127 | volatile short msg_length; /* This length is "normal". */ | |
128 | }; | |
129 | ||
130 | struct lance_tx_head { | |
131 | unsigned short base; /* Low word of base addr */ | |
132 | volatile unsigned char flag; | |
133 | unsigned char base_hi; /* High word of base addr (unused) */ | |
134 | short length; /* Length is 2s complement! */ | |
135 | volatile short misc; | |
136 | }; | |
137 | ||
138 | struct ringdesc { | |
139 | unsigned short adr_lo; /* Low 16 bits of address */ | |
140 | unsigned char len; /* Length bits */ | |
141 | unsigned char adr_hi; /* High 8 bits of address (unused) */ | |
142 | }; | |
143 | ||
144 | /* The LANCE initialization block, described in databook. */ | |
145 | struct lance_init_block { | |
146 | unsigned short mode; /* Pre-set mode */ | |
147 | unsigned char hwaddr[6]; /* Physical ethernet address */ | |
148 | unsigned filter[2]; /* Multicast filter (unused). */ | |
149 | /* Receive and transmit ring base, along with length bits. */ | |
150 | struct ringdesc rx_ring; | |
151 | struct ringdesc tx_ring; | |
152 | }; | |
153 | ||
154 | /* The whole layout of the Lance shared memory */ | |
155 | struct lance_memory { | |
156 | struct lance_init_block init; | |
157 | struct lance_tx_head tx_head[TX_RING_SIZE]; | |
158 | struct lance_rx_head rx_head[RX_RING_SIZE]; | |
159 | char packet_area[0]; /* packet data follow after the | |
160 | * init block and the ring | |
161 | * descriptors and are located | |
162 | * at runtime */ | |
163 | }; | |
164 | ||
165 | /* RieblCard specifics: | |
166 | * The original TOS driver for these cards reserves the area from offset | |
167 | * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the | |
168 | * Ethernet address there, and the magic for verifying the data's validity. | |
169 | * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe | |
170 | * is reserved for the interrupt vector number. | |
171 | */ | |
172 | #define RIEBL_RSVD_START 0xee70 | |
173 | #define RIEBL_RSVD_END 0xeec0 | |
174 | #define RIEBL_MAGIC 0x09051990 | |
175 | #define RIEBL_MAGIC_ADDR ((unsigned long *)(((char *)MEM) + 0xee8a)) | |
176 | #define RIEBL_HWADDR_ADDR ((unsigned char *)(((char *)MEM) + 0xee8e)) | |
177 | #define RIEBL_IVEC_ADDR ((unsigned short *)(((char *)MEM) + 0xfffe)) | |
178 | ||
179 | /* This is a default address for the old RieblCards without a battery | |
180 | * that have no ethernet address at boot time. 00:00:36:04 is the | |
181 | * prefix for Riebl cards, the 00:00 at the end is arbitrary. | |
182 | */ | |
183 | ||
184 | static unsigned char OldRieblDefHwaddr[6] = { | |
185 | 0x00, 0x00, 0x36, 0x04, 0x00, 0x00 | |
186 | }; | |
187 | ||
188 | ||
189 | /* I/O registers of the Lance chip */ | |
190 | ||
191 | struct lance_ioreg { | |
192 | /* base+0x0 */ volatile unsigned short data; | |
193 | /* base+0x2 */ volatile unsigned short addr; | |
194 | unsigned char _dummy1[3]; | |
195 | /* base+0x7 */ volatile unsigned char ivec; | |
196 | unsigned char _dummy2[5]; | |
197 | /* base+0xd */ volatile unsigned char eeprom; | |
198 | unsigned char _dummy3; | |
199 | /* base+0xf */ volatile unsigned char mem; | |
200 | }; | |
201 | ||
202 | /* Types of boards this driver supports */ | |
203 | ||
204 | enum lance_type { | |
205 | OLD_RIEBL, /* old Riebl card without battery */ | |
206 | NEW_RIEBL, /* new Riebl card with battery */ | |
207 | PAM_CARD /* PAM card with EEPROM */ | |
208 | }; | |
209 | ||
210 | static char *lance_names[] = { | |
211 | "Riebl-Card (without battery)", | |
212 | "Riebl-Card (with battery)", | |
213 | "PAM intern card" | |
214 | }; | |
215 | ||
216 | /* The driver's private device structure */ | |
217 | ||
218 | struct lance_private { | |
219 | enum lance_type cardtype; | |
220 | struct lance_ioreg *iobase; | |
221 | struct lance_memory *mem; | |
222 | int cur_rx, cur_tx; /* The next free ring entry */ | |
223 | int dirty_tx; /* Ring entries to be freed. */ | |
224 | /* copy function */ | |
225 | void *(*memcpy_f)( void *, const void *, size_t ); | |
1da177e4 LT |
226 | /* This must be long for set_bit() */ |
227 | long tx_full; | |
228 | spinlock_t devlock; | |
229 | }; | |
230 | ||
231 | /* I/O register access macros */ | |
232 | ||
233 | #define MEM lp->mem | |
234 | #define DREG IO->data | |
235 | #define AREG IO->addr | |
e345d5ef | 236 | #define REGA(a) (*( AREG = (a), &DREG )) |
1da177e4 LT |
237 | |
238 | /* Definitions for packet buffer access: */ | |
239 | #define PKT_BUF_SZ 1544 | |
240 | /* Get the address of a packet buffer corresponding to a given buffer head */ | |
241 | #define PKTBUF_ADDR(head) (((unsigned char *)(MEM)) + (head)->base) | |
242 | ||
243 | /* Possible memory/IO addresses for probing */ | |
244 | ||
3cacd2a1 | 245 | static struct lance_addr { |
1da177e4 LT |
246 | unsigned long memaddr; |
247 | unsigned long ioaddr; | |
248 | int slow_flag; | |
249 | } lance_addr_list[] = { | |
250 | { 0xfe010000, 0xfe00fff0, 0 }, /* RieblCard VME in TT */ | |
251 | { 0xffc10000, 0xffc0fff0, 0 }, /* RieblCard VME in MegaSTE | |
252 | (highest byte stripped) */ | |
253 | { 0xffe00000, 0xffff7000, 1 }, /* RieblCard in ST | |
254 | (highest byte stripped) */ | |
255 | { 0xffd00000, 0xffff7000, 1 }, /* RieblCard in ST with hw modif. to | |
256 | avoid conflict with ROM | |
257 | (highest byte stripped) */ | |
258 | { 0xffcf0000, 0xffcffff0, 0 }, /* PAMCard VME in TT and MSTE | |
259 | (highest byte stripped) */ | |
260 | { 0xfecf0000, 0xfecffff0, 0 }, /* Rhotron's PAMCard VME in TT and MSTE | |
261 | (highest byte stripped) */ | |
262 | }; | |
263 | ||
ff8ac609 | 264 | #define N_LANCE_ADDR ARRAY_SIZE(lance_addr_list) |
1da177e4 LT |
265 | |
266 | ||
267 | /* Definitions for the Lance */ | |
268 | ||
269 | /* tx_head flags */ | |
270 | #define TMD1_ENP 0x01 /* end of packet */ | |
271 | #define TMD1_STP 0x02 /* start of packet */ | |
272 | #define TMD1_DEF 0x04 /* deferred */ | |
273 | #define TMD1_ONE 0x08 /* one retry needed */ | |
274 | #define TMD1_MORE 0x10 /* more than one retry needed */ | |
275 | #define TMD1_ERR 0x40 /* error summary */ | |
276 | #define TMD1_OWN 0x80 /* ownership (set: chip owns) */ | |
277 | ||
278 | #define TMD1_OWN_CHIP TMD1_OWN | |
279 | #define TMD1_OWN_HOST 0 | |
280 | ||
281 | /* tx_head misc field */ | |
282 | #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */ | |
283 | #define TMD3_RTRY 0x0400 /* failed after 16 retries */ | |
284 | #define TMD3_LCAR 0x0800 /* carrier lost */ | |
285 | #define TMD3_LCOL 0x1000 /* late collision */ | |
286 | #define TMD3_UFLO 0x4000 /* underflow (late memory) */ | |
287 | #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */ | |
288 | ||
289 | /* rx_head flags */ | |
290 | #define RMD1_ENP 0x01 /* end of packet */ | |
291 | #define RMD1_STP 0x02 /* start of packet */ | |
292 | #define RMD1_BUFF 0x04 /* buffer error */ | |
293 | #define RMD1_CRC 0x08 /* CRC error */ | |
294 | #define RMD1_OFLO 0x10 /* overflow */ | |
295 | #define RMD1_FRAM 0x20 /* framing error */ | |
296 | #define RMD1_ERR 0x40 /* error summary */ | |
297 | #define RMD1_OWN 0x80 /* ownership (set: ship owns) */ | |
298 | ||
299 | #define RMD1_OWN_CHIP RMD1_OWN | |
300 | #define RMD1_OWN_HOST 0 | |
301 | ||
302 | /* register names */ | |
303 | #define CSR0 0 /* mode/status */ | |
304 | #define CSR1 1 /* init block addr (low) */ | |
305 | #define CSR2 2 /* init block addr (high) */ | |
306 | #define CSR3 3 /* misc */ | |
307 | #define CSR8 8 /* address filter */ | |
308 | #define CSR15 15 /* promiscuous mode */ | |
309 | ||
310 | /* CSR0 */ | |
311 | /* (R=readable, W=writeable, S=set on write, C=clear on write) */ | |
312 | #define CSR0_INIT 0x0001 /* initialize (RS) */ | |
313 | #define CSR0_STRT 0x0002 /* start (RS) */ | |
314 | #define CSR0_STOP 0x0004 /* stop (RS) */ | |
315 | #define CSR0_TDMD 0x0008 /* transmit demand (RS) */ | |
316 | #define CSR0_TXON 0x0010 /* transmitter on (R) */ | |
317 | #define CSR0_RXON 0x0020 /* receiver on (R) */ | |
318 | #define CSR0_INEA 0x0040 /* interrupt enable (RW) */ | |
319 | #define CSR0_INTR 0x0080 /* interrupt active (R) */ | |
320 | #define CSR0_IDON 0x0100 /* initialization done (RC) */ | |
321 | #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */ | |
322 | #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */ | |
323 | #define CSR0_MERR 0x0800 /* memory error (RC) */ | |
324 | #define CSR0_MISS 0x1000 /* missed frame (RC) */ | |
325 | #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */ | |
326 | #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */ | |
327 | #define CSR0_ERR 0x8000 /* error (RC) */ | |
328 | ||
329 | /* CSR3 */ | |
330 | #define CSR3_BCON 0x0001 /* byte control */ | |
331 | #define CSR3_ACON 0x0002 /* ALE control */ | |
332 | #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */ | |
333 | ||
334 | ||
335 | ||
336 | /***************************** Prototypes *****************************/ | |
337 | ||
1da177e4 LT |
338 | static unsigned long lance_probe1( struct net_device *dev, struct lance_addr |
339 | *init_rec ); | |
340 | static int lance_open( struct net_device *dev ); | |
341 | static void lance_init_ring( struct net_device *dev ); | |
342 | static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev ); | |
7d12e780 | 343 | static irqreturn_t lance_interrupt( int irq, void *dev_id ); |
1da177e4 LT |
344 | static int lance_rx( struct net_device *dev ); |
345 | static int lance_close( struct net_device *dev ); | |
1da177e4 LT |
346 | static void set_multicast_list( struct net_device *dev ); |
347 | static int lance_set_mac_address( struct net_device *dev, void *addr ); | |
348 | static void lance_tx_timeout (struct net_device *dev); | |
349 | ||
350 | /************************* End of Prototypes **************************/ | |
351 | ||
352 | ||
353 | ||
6aa20a22 | 354 | |
1da177e4 LT |
355 | |
356 | static void *slow_memcpy( void *dst, const void *src, size_t len ) | |
357 | ||
358 | { char *cto = dst; | |
359 | const char *cfrom = src; | |
360 | ||
361 | while( len-- ) { | |
362 | *cto++ = *cfrom++; | |
363 | MFPDELAY(); | |
364 | } | |
807540ba | 365 | return dst; |
1da177e4 LT |
366 | } |
367 | ||
368 | ||
369 | struct net_device * __init atarilance_probe(int unit) | |
370 | { | |
371 | int i; | |
372 | static int found; | |
373 | struct net_device *dev; | |
374 | int err = -ENODEV; | |
375 | ||
376 | if (!MACH_IS_ATARI || found) | |
377 | /* Assume there's only one board possible... That seems true, since | |
378 | * the Riebl/PAM board's address cannot be changed. */ | |
379 | return ERR_PTR(-ENODEV); | |
380 | ||
381 | dev = alloc_etherdev(sizeof(struct lance_private)); | |
382 | if (!dev) | |
383 | return ERR_PTR(-ENOMEM); | |
384 | if (unit >= 0) { | |
385 | sprintf(dev->name, "eth%d", unit); | |
386 | netdev_boot_setup_check(dev); | |
387 | } | |
1da177e4 LT |
388 | |
389 | for( i = 0; i < N_LANCE_ADDR; ++i ) { | |
390 | if (lance_probe1( dev, &lance_addr_list[i] )) { | |
391 | found = 1; | |
392 | err = register_netdev(dev); | |
393 | if (!err) | |
394 | return dev; | |
395 | free_irq(dev->irq, dev); | |
396 | break; | |
397 | } | |
398 | } | |
399 | free_netdev(dev); | |
400 | return ERR_PTR(err); | |
401 | } | |
402 | ||
403 | ||
404 | /* Derived from hwreg_present() in atari/config.c: */ | |
405 | ||
f37c768c AB |
406 | static noinline int __init addr_accessible(volatile void *regp, int wordflag, |
407 | int writeflag) | |
1da177e4 LT |
408 | { |
409 | int ret; | |
d1abc9a9 | 410 | unsigned long flags; |
1da177e4 LT |
411 | long *vbr, save_berr; |
412 | ||
413 | local_irq_save(flags); | |
414 | ||
415 | __asm__ __volatile__ ( "movec %/vbr,%0" : "=r" (vbr) : ); | |
416 | save_berr = vbr[2]; | |
417 | ||
418 | __asm__ __volatile__ | |
419 | ( "movel %/sp,%/d1\n\t" | |
420 | "movel #Lberr,%2@\n\t" | |
421 | "moveq #0,%0\n\t" | |
422 | "tstl %3\n\t" | |
423 | "bne 1f\n\t" | |
424 | "moveb %1@,%/d0\n\t" | |
425 | "nop \n\t" | |
426 | "bra 2f\n" | |
427 | "1: movew %1@,%/d0\n\t" | |
428 | "nop \n" | |
429 | "2: tstl %4\n\t" | |
430 | "beq 2f\n\t" | |
431 | "tstl %3\n\t" | |
432 | "bne 1f\n\t" | |
433 | "clrb %1@\n\t" | |
434 | "nop \n\t" | |
435 | "moveb %/d0,%1@\n\t" | |
436 | "nop \n\t" | |
437 | "bra 2f\n" | |
438 | "1: clrw %1@\n\t" | |
439 | "nop \n\t" | |
440 | "movew %/d0,%1@\n\t" | |
441 | "nop \n" | |
442 | "2: moveq #1,%0\n" | |
443 | "Lberr: movel %/d1,%/sp" | |
444 | : "=&d" (ret) | |
445 | : "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag) | |
446 | : "d0", "d1", "memory" | |
447 | ); | |
448 | ||
449 | vbr[2] = save_berr; | |
450 | local_irq_restore(flags); | |
451 | ||
807540ba | 452 | return ret; |
1da177e4 LT |
453 | } |
454 | ||
8e7678fe AB |
455 | static const struct net_device_ops lance_netdev_ops = { |
456 | .ndo_open = lance_open, | |
457 | .ndo_stop = lance_close, | |
458 | .ndo_start_xmit = lance_start_xmit, | |
afc4b13d | 459 | .ndo_set_rx_mode = set_multicast_list, |
8e7678fe AB |
460 | .ndo_set_mac_address = lance_set_mac_address, |
461 | .ndo_tx_timeout = lance_tx_timeout, | |
462 | .ndo_validate_addr = eth_validate_addr, | |
463 | .ndo_change_mtu = eth_change_mtu, | |
464 | }; | |
1da177e4 LT |
465 | |
466 | static unsigned long __init lance_probe1( struct net_device *dev, | |
467 | struct lance_addr *init_rec ) | |
468 | { | |
469 | volatile unsigned short *memaddr = | |
470 | (volatile unsigned short *)init_rec->memaddr; | |
471 | volatile unsigned short *ioaddr = | |
472 | (volatile unsigned short *)init_rec->ioaddr; | |
473 | struct lance_private *lp; | |
474 | struct lance_ioreg *IO; | |
475 | int i; | |
476 | static int did_version; | |
477 | unsigned short save1, save2; | |
478 | ||
479 | PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n", | |
480 | (long)memaddr, (long)ioaddr )); | |
481 | ||
482 | /* Test whether memory readable and writable */ | |
483 | PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" )); | |
484 | if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail; | |
485 | ||
486 | /* Written values should come back... */ | |
487 | PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" )); | |
488 | save1 = *memaddr; | |
489 | *memaddr = 0x0001; | |
490 | if (*memaddr != 0x0001) goto probe_fail; | |
491 | PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" )); | |
492 | *memaddr = 0x0000; | |
493 | if (*memaddr != 0x0000) goto probe_fail; | |
494 | *memaddr = save1; | |
495 | ||
496 | /* First port should be readable and writable */ | |
497 | PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" )); | |
498 | if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail; | |
499 | ||
500 | /* and written values should be readable */ | |
501 | PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" )); | |
502 | save2 = ioaddr[1]; | |
503 | ioaddr[1] = 0x0001; | |
504 | if (ioaddr[1] != 0x0001) goto probe_fail; | |
505 | ||
506 | /* The CSR0_INIT bit should not be readable */ | |
507 | PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" )); | |
508 | save1 = ioaddr[0]; | |
509 | ioaddr[1] = CSR0; | |
510 | ioaddr[0] = CSR0_INIT | CSR0_STOP; | |
511 | if (ioaddr[0] != CSR0_STOP) { | |
512 | ioaddr[0] = save1; | |
513 | ioaddr[1] = save2; | |
514 | goto probe_fail; | |
515 | } | |
516 | PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" )); | |
517 | ioaddr[0] = CSR0_STOP; | |
518 | if (ioaddr[0] != CSR0_STOP) { | |
519 | ioaddr[0] = save1; | |
520 | ioaddr[1] = save2; | |
521 | goto probe_fail; | |
522 | } | |
523 | ||
524 | /* Now ok... */ | |
525 | PROBE_PRINT(( "lance_probe1: Lance card detected\n" )); | |
526 | goto probe_ok; | |
527 | ||
528 | probe_fail: | |
807540ba | 529 | return 0; |
1da177e4 LT |
530 | |
531 | probe_ok: | |
454d7c9b | 532 | lp = netdev_priv(dev); |
1da177e4 LT |
533 | MEM = (struct lance_memory *)memaddr; |
534 | IO = lp->iobase = (struct lance_ioreg *)ioaddr; | |
535 | dev->base_addr = (unsigned long)ioaddr; /* informational only */ | |
536 | lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy; | |
537 | ||
538 | REGA( CSR0 ) = CSR0_STOP; | |
539 | ||
540 | /* Now test for type: If the eeprom I/O port is readable, it is a | |
541 | * PAM card */ | |
542 | if (addr_accessible( &(IO->eeprom), 0, 0 )) { | |
543 | /* Switch back to Ram */ | |
544 | i = IO->mem; | |
545 | lp->cardtype = PAM_CARD; | |
546 | } | |
547 | else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) { | |
548 | lp->cardtype = NEW_RIEBL; | |
549 | } | |
550 | else | |
551 | lp->cardtype = OLD_RIEBL; | |
552 | ||
553 | if (lp->cardtype == PAM_CARD || | |
554 | memaddr == (unsigned short *)0xffe00000) { | |
555 | /* PAMs card and Riebl on ST use level 5 autovector */ | |
556 | if (request_irq(IRQ_AUTO_5, lance_interrupt, IRQ_TYPE_PRIO, | |
79abeed6 | 557 | "PAM,Riebl-ST Ethernet", dev)) { |
1da177e4 | 558 | printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 ); |
807540ba | 559 | return 0; |
1da177e4 | 560 | } |
44883eb0 | 561 | dev->irq = IRQ_AUTO_5; |
1da177e4 LT |
562 | } |
563 | else { | |
44883eb0 GU |
564 | /* For VME-RieblCards, request a free VME int */ |
565 | unsigned int irq = atari_register_vme_int(); | |
1da177e4 LT |
566 | if (!irq) { |
567 | printk( "Lance: request for VME interrupt failed\n" ); | |
807540ba | 568 | return 0; |
1da177e4 LT |
569 | } |
570 | if (request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO, | |
571 | "Riebl-VME Ethernet", dev)) { | |
44883eb0 | 572 | printk( "Lance: request for irq %u failed\n", irq ); |
807540ba | 573 | return 0; |
1da177e4 LT |
574 | } |
575 | dev->irq = irq; | |
576 | } | |
577 | ||
578 | printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ", | |
579 | dev->name, lance_names[lp->cardtype], | |
580 | (unsigned long)ioaddr, | |
581 | (unsigned long)memaddr, | |
582 | dev->irq, | |
583 | init_rec->slow_flag ? " (slow memcpy)" : "" ); | |
584 | ||
585 | /* Get the ethernet address */ | |
586 | switch( lp->cardtype ) { | |
587 | case OLD_RIEBL: | |
588 | /* No ethernet address! (Set some default address) */ | |
d458cdf7 | 589 | memcpy(dev->dev_addr, OldRieblDefHwaddr, ETH_ALEN); |
1da177e4 LT |
590 | break; |
591 | case NEW_RIEBL: | |
d458cdf7 | 592 | lp->memcpy_f(dev->dev_addr, RIEBL_HWADDR_ADDR, ETH_ALEN); |
1da177e4 LT |
593 | break; |
594 | case PAM_CARD: | |
595 | i = IO->eeprom; | |
596 | for( i = 0; i < 6; ++i ) | |
597 | dev->dev_addr[i] = | |
598 | ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) | | |
599 | ((((unsigned short *)MEM)[i*2+1] & 0x0f)); | |
600 | i = IO->mem; | |
601 | break; | |
602 | } | |
e174961c | 603 | printk("%pM\n", dev->dev_addr); |
1da177e4 LT |
604 | if (lp->cardtype == OLD_RIEBL) { |
605 | printk( "%s: Warning: This is a default ethernet address!\n", | |
606 | dev->name ); | |
607 | printk( " Use \"ifconfig hw ether ...\" to set the address.\n" ); | |
608 | } | |
609 | ||
610 | spin_lock_init(&lp->devlock); | |
611 | ||
612 | MEM->init.mode = 0x0000; /* Disable Rx and Tx. */ | |
613 | for( i = 0; i < 6; i++ ) | |
614 | MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */ | |
615 | MEM->init.filter[0] = 0x00000000; | |
616 | MEM->init.filter[1] = 0x00000000; | |
617 | MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head ); | |
618 | MEM->init.rx_ring.adr_hi = 0; | |
619 | MEM->init.rx_ring.len = RX_RING_LEN_BITS; | |
620 | MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head ); | |
621 | MEM->init.tx_ring.adr_hi = 0; | |
622 | MEM->init.tx_ring.len = TX_RING_LEN_BITS; | |
623 | ||
624 | if (lp->cardtype == PAM_CARD) | |
625 | IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq); | |
626 | else | |
627 | *RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq); | |
628 | ||
629 | if (did_version++ == 0) | |
630 | DPRINTK( 1, ( version )); | |
631 | ||
8e7678fe | 632 | dev->netdev_ops = &lance_netdev_ops; |
1da177e4 LT |
633 | |
634 | /* XXX MSch */ | |
1da177e4 | 635 | dev->watchdog_timeo = TX_TIMEOUT; |
6aa20a22 | 636 | |
807540ba | 637 | return 1; |
1da177e4 LT |
638 | } |
639 | ||
6aa20a22 | 640 | |
1da177e4 | 641 | static int lance_open( struct net_device *dev ) |
454d7c9b WC |
642 | { |
643 | struct lance_private *lp = netdev_priv(dev); | |
1da177e4 LT |
644 | struct lance_ioreg *IO = lp->iobase; |
645 | int i; | |
646 | ||
647 | DPRINTK( 2, ( "%s: lance_open()\n", dev->name )); | |
648 | ||
649 | lance_init_ring(dev); | |
650 | /* Re-initialize the LANCE, and start it when done. */ | |
651 | ||
652 | REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); | |
653 | REGA( CSR2 ) = 0; | |
654 | REGA( CSR1 ) = 0; | |
655 | REGA( CSR0 ) = CSR0_INIT; | |
656 | /* From now on, AREG is kept to point to CSR0 */ | |
657 | ||
658 | i = 1000000; | |
659 | while (--i > 0) | |
660 | if (DREG & CSR0_IDON) | |
661 | break; | |
e145b984 | 662 | if (i <= 0 || (DREG & CSR0_ERR)) { |
1da177e4 LT |
663 | DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n", |
664 | dev->name, i, DREG )); | |
665 | DREG = CSR0_STOP; | |
807540ba | 666 | return -EIO; |
1da177e4 LT |
667 | } |
668 | DREG = CSR0_IDON; | |
669 | DREG = CSR0_STRT; | |
670 | DREG = CSR0_INEA; | |
671 | ||
672 | netif_start_queue (dev); | |
673 | ||
674 | DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG )); | |
675 | ||
807540ba | 676 | return 0; |
1da177e4 LT |
677 | } |
678 | ||
679 | ||
680 | /* Initialize the LANCE Rx and Tx rings. */ | |
681 | ||
682 | static void lance_init_ring( struct net_device *dev ) | |
454d7c9b WC |
683 | { |
684 | struct lance_private *lp = netdev_priv(dev); | |
1da177e4 LT |
685 | int i; |
686 | unsigned offset; | |
687 | ||
688 | lp->tx_full = 0; | |
689 | lp->cur_rx = lp->cur_tx = 0; | |
690 | lp->dirty_tx = 0; | |
691 | ||
692 | offset = offsetof( struct lance_memory, packet_area ); | |
693 | ||
694 | /* If the packet buffer at offset 'o' would conflict with the reserved area | |
695 | * of RieblCards, advance it */ | |
696 | #define CHECK_OFFSET(o) \ | |
697 | do { \ | |
698 | if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) { \ | |
699 | if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \ | |
700 | : (o) < RIEBL_RSVD_END) \ | |
701 | (o) = RIEBL_RSVD_END; \ | |
702 | } \ | |
703 | } while(0) | |
704 | ||
705 | for( i = 0; i < TX_RING_SIZE; i++ ) { | |
706 | CHECK_OFFSET(offset); | |
707 | MEM->tx_head[i].base = offset; | |
708 | MEM->tx_head[i].flag = TMD1_OWN_HOST; | |
709 | MEM->tx_head[i].base_hi = 0; | |
710 | MEM->tx_head[i].length = 0; | |
711 | MEM->tx_head[i].misc = 0; | |
712 | offset += PKT_BUF_SZ; | |
713 | } | |
714 | ||
715 | for( i = 0; i < RX_RING_SIZE; i++ ) { | |
716 | CHECK_OFFSET(offset); | |
717 | MEM->rx_head[i].base = offset; | |
718 | MEM->rx_head[i].flag = TMD1_OWN_CHIP; | |
719 | MEM->rx_head[i].base_hi = 0; | |
720 | MEM->rx_head[i].buf_length = -PKT_BUF_SZ; | |
721 | MEM->rx_head[i].msg_length = 0; | |
722 | offset += PKT_BUF_SZ; | |
723 | } | |
724 | } | |
725 | ||
726 | ||
727 | /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ | |
728 | ||
729 | ||
730 | static void lance_tx_timeout (struct net_device *dev) | |
731 | { | |
454d7c9b | 732 | struct lance_private *lp = netdev_priv(dev); |
1da177e4 | 733 | struct lance_ioreg *IO = lp->iobase; |
6aa20a22 | 734 | |
1da177e4 LT |
735 | AREG = CSR0; |
736 | DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n", | |
737 | dev->name, DREG )); | |
738 | DREG = CSR0_STOP; | |
739 | /* | |
740 | * Always set BSWP after a STOP as STOP puts it back into | |
741 | * little endian mode. | |
742 | */ | |
743 | REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); | |
09f75cd7 | 744 | dev->stats.tx_errors++; |
1da177e4 LT |
745 | #ifndef final_version |
746 | { int i; | |
747 | DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n", | |
748 | lp->dirty_tx, lp->cur_tx, | |
749 | lp->tx_full ? " (full)" : "", | |
750 | lp->cur_rx )); | |
751 | for( i = 0 ; i < RX_RING_SIZE; i++ ) | |
752 | DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n", | |
753 | i, MEM->rx_head[i].base, | |
754 | -MEM->rx_head[i].buf_length, | |
755 | MEM->rx_head[i].msg_length )); | |
756 | for( i = 0 ; i < TX_RING_SIZE; i++ ) | |
757 | DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n", | |
758 | i, MEM->tx_head[i].base, | |
759 | -MEM->tx_head[i].length, | |
760 | MEM->tx_head[i].misc )); | |
761 | } | |
6aa20a22 | 762 | #endif |
1da177e4 LT |
763 | /* XXX MSch: maybe purge/reinit ring here */ |
764 | /* lance_restart, essentially */ | |
765 | lance_init_ring(dev); | |
766 | REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; | |
1ae5dc34 ED |
767 | dev->trans_start = jiffies; /* prevent tx timeout */ |
768 | netif_wake_queue(dev); | |
1da177e4 LT |
769 | } |
770 | ||
771 | /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ | |
772 | ||
773 | static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev ) | |
454d7c9b WC |
774 | { |
775 | struct lance_private *lp = netdev_priv(dev); | |
1da177e4 LT |
776 | struct lance_ioreg *IO = lp->iobase; |
777 | int entry, len; | |
778 | struct lance_tx_head *head; | |
779 | unsigned long flags; | |
780 | ||
781 | DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n", | |
782 | dev->name, DREG )); | |
783 | ||
784 | ||
785 | /* The old LANCE chips doesn't automatically pad buffers to min. size. */ | |
786 | len = skb->len; | |
787 | if (len < ETH_ZLEN) | |
788 | len = ETH_ZLEN; | |
789 | /* PAM-Card has a bug: Can only send packets with even number of bytes! */ | |
790 | else if (lp->cardtype == PAM_CARD && (len & 1)) | |
791 | ++len; | |
6aa20a22 | 792 | |
1da177e4 | 793 | if (len > skb->len) { |
5b057c6b | 794 | if (skb_padto(skb, len)) |
6ed10654 | 795 | return NETDEV_TX_OK; |
1da177e4 | 796 | } |
6aa20a22 | 797 | |
1da177e4 LT |
798 | netif_stop_queue (dev); |
799 | ||
800 | /* Fill in a Tx ring entry */ | |
801 | if (lance_debug >= 3) { | |
e174961c | 802 | printk( "%s: TX pkt type 0x%04x from %pM to %pM" |
0795af57 JP |
803 | " data at 0x%08x len %d\n", |
804 | dev->name, ((u_short *)skb->data)[6], | |
e174961c | 805 | &skb->data[6], skb->data, |
0795af57 | 806 | (int)skb->data, (int)skb->len ); |
1da177e4 LT |
807 | } |
808 | ||
809 | /* We're not prepared for the int until the last flags are set/reset. And | |
810 | * the int may happen already after setting the OWN_CHIP... */ | |
811 | spin_lock_irqsave (&lp->devlock, flags); | |
812 | ||
813 | /* Mask to ring buffer boundary. */ | |
814 | entry = lp->cur_tx & TX_RING_MOD_MASK; | |
815 | head = &(MEM->tx_head[entry]); | |
816 | ||
817 | /* Caution: the write order is important here, set the "ownership" bits | |
818 | * last. | |
819 | */ | |
820 | ||
821 | ||
822 | head->length = -len; | |
823 | head->misc = 0; | |
824 | lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len ); | |
825 | head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP; | |
09f75cd7 | 826 | dev->stats.tx_bytes += skb->len; |
1da177e4 LT |
827 | dev_kfree_skb( skb ); |
828 | lp->cur_tx++; | |
829 | while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) { | |
830 | lp->cur_tx -= TX_RING_SIZE; | |
831 | lp->dirty_tx -= TX_RING_SIZE; | |
832 | } | |
833 | ||
834 | /* Trigger an immediate send poll. */ | |
835 | DREG = CSR0_INEA | CSR0_TDMD; | |
1da177e4 LT |
836 | |
837 | if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) == | |
838 | TMD1_OWN_HOST) | |
839 | netif_start_queue (dev); | |
840 | else | |
841 | lp->tx_full = 1; | |
842 | spin_unlock_irqrestore (&lp->devlock, flags); | |
843 | ||
6ed10654 | 844 | return NETDEV_TX_OK; |
1da177e4 LT |
845 | } |
846 | ||
847 | /* The LANCE interrupt handler. */ | |
848 | ||
7d12e780 | 849 | static irqreturn_t lance_interrupt( int irq, void *dev_id ) |
1da177e4 LT |
850 | { |
851 | struct net_device *dev = dev_id; | |
852 | struct lance_private *lp; | |
853 | struct lance_ioreg *IO; | |
854 | int csr0, boguscnt = 10; | |
855 | int handled = 0; | |
856 | ||
857 | if (dev == NULL) { | |
858 | DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" )); | |
859 | return IRQ_NONE; | |
860 | } | |
861 | ||
454d7c9b | 862 | lp = netdev_priv(dev); |
1da177e4 LT |
863 | IO = lp->iobase; |
864 | spin_lock (&lp->devlock); | |
865 | ||
866 | AREG = CSR0; | |
867 | ||
868 | while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) && | |
869 | --boguscnt >= 0) { | |
870 | handled = 1; | |
871 | /* Acknowledge all of the current interrupt sources ASAP. */ | |
872 | DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP | | |
873 | CSR0_TDMD | CSR0_INEA); | |
874 | ||
875 | DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n", | |
876 | dev->name, csr0, DREG )); | |
877 | ||
878 | if (csr0 & CSR0_RINT) /* Rx interrupt */ | |
879 | lance_rx( dev ); | |
880 | ||
881 | if (csr0 & CSR0_TINT) { /* Tx-done interrupt */ | |
882 | int dirty_tx = lp->dirty_tx; | |
883 | ||
884 | while( dirty_tx < lp->cur_tx) { | |
885 | int entry = dirty_tx & TX_RING_MOD_MASK; | |
886 | int status = MEM->tx_head[entry].flag; | |
887 | ||
888 | if (status & TMD1_OWN_CHIP) | |
889 | break; /* It still hasn't been Txed */ | |
890 | ||
891 | MEM->tx_head[entry].flag = 0; | |
892 | ||
893 | if (status & TMD1_ERR) { | |
894 | /* There was an major error, log it. */ | |
895 | int err_status = MEM->tx_head[entry].misc; | |
09f75cd7 JG |
896 | dev->stats.tx_errors++; |
897 | if (err_status & TMD3_RTRY) dev->stats.tx_aborted_errors++; | |
898 | if (err_status & TMD3_LCAR) dev->stats.tx_carrier_errors++; | |
899 | if (err_status & TMD3_LCOL) dev->stats.tx_window_errors++; | |
1da177e4 LT |
900 | if (err_status & TMD3_UFLO) { |
901 | /* Ackk! On FIFO errors the Tx unit is turned off! */ | |
09f75cd7 | 902 | dev->stats.tx_fifo_errors++; |
1da177e4 LT |
903 | /* Remove this verbosity later! */ |
904 | DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n", | |
905 | dev->name, csr0 )); | |
906 | /* Restart the chip. */ | |
907 | DREG = CSR0_STRT; | |
908 | } | |
909 | } else { | |
910 | if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF)) | |
09f75cd7 JG |
911 | dev->stats.collisions++; |
912 | dev->stats.tx_packets++; | |
1da177e4 LT |
913 | } |
914 | ||
915 | /* XXX MSch: free skb?? */ | |
916 | dirty_tx++; | |
917 | } | |
918 | ||
919 | #ifndef final_version | |
920 | if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) { | |
921 | DPRINTK( 0, ( "out-of-sync dirty pointer," | |
922 | " %d vs. %d, full=%ld.\n", | |
923 | dirty_tx, lp->cur_tx, lp->tx_full )); | |
924 | dirty_tx += TX_RING_SIZE; | |
925 | } | |
926 | #endif | |
927 | ||
8e95a202 JP |
928 | if (lp->tx_full && (netif_queue_stopped(dev)) && |
929 | dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) { | |
1da177e4 LT |
930 | /* The ring is no longer full, clear tbusy. */ |
931 | lp->tx_full = 0; | |
932 | netif_wake_queue (dev); | |
933 | } | |
934 | ||
935 | lp->dirty_tx = dirty_tx; | |
936 | } | |
937 | ||
938 | /* Log misc errors. */ | |
09f75cd7 JG |
939 | if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */ |
940 | if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */ | |
1da177e4 LT |
941 | if (csr0 & CSR0_MERR) { |
942 | DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), " | |
943 | "status %04x.\n", dev->name, csr0 )); | |
944 | /* Restart the chip. */ | |
945 | DREG = CSR0_STRT; | |
946 | } | |
947 | } | |
948 | ||
949 | /* Clear any other interrupt, and set interrupt enable. */ | |
950 | DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR | | |
951 | CSR0_IDON | CSR0_INEA; | |
952 | ||
953 | DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n", | |
954 | dev->name, DREG )); | |
955 | ||
956 | spin_unlock (&lp->devlock); | |
957 | return IRQ_RETVAL(handled); | |
958 | } | |
959 | ||
960 | ||
961 | static int lance_rx( struct net_device *dev ) | |
454d7c9b WC |
962 | { |
963 | struct lance_private *lp = netdev_priv(dev); | |
1da177e4 LT |
964 | int entry = lp->cur_rx & RX_RING_MOD_MASK; |
965 | int i; | |
966 | ||
967 | DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name, | |
968 | MEM->rx_head[entry].flag )); | |
969 | ||
970 | /* If we own the next entry, it's a new packet. Send it up. */ | |
971 | while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) { | |
972 | struct lance_rx_head *head = &(MEM->rx_head[entry]); | |
973 | int status = head->flag; | |
974 | ||
975 | if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */ | |
976 | /* There is a tricky error noted by John Murphy, | |
977 | <murf@perftech.com> to Russ Nelson: Even with full-sized | |
978 | buffers it's possible for a jabber packet to use two | |
979 | buffers, with only the last correctly noting the error. */ | |
980 | if (status & RMD1_ENP) /* Only count a general error at the */ | |
09f75cd7 JG |
981 | dev->stats.rx_errors++; /* end of a packet.*/ |
982 | if (status & RMD1_FRAM) dev->stats.rx_frame_errors++; | |
983 | if (status & RMD1_OFLO) dev->stats.rx_over_errors++; | |
984 | if (status & RMD1_CRC) dev->stats.rx_crc_errors++; | |
985 | if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++; | |
1da177e4 LT |
986 | head->flag &= (RMD1_ENP|RMD1_STP); |
987 | } else { | |
988 | /* Malloc up new buffer, compatible with net-3. */ | |
989 | short pkt_len = head->msg_length & 0xfff; | |
990 | struct sk_buff *skb; | |
991 | ||
992 | if (pkt_len < 60) { | |
993 | printk( "%s: Runt packet!\n", dev->name ); | |
09f75cd7 | 994 | dev->stats.rx_errors++; |
1da177e4 LT |
995 | } |
996 | else { | |
1d266430 | 997 | skb = netdev_alloc_skb(dev, pkt_len + 2); |
1da177e4 | 998 | if (skb == NULL) { |
1da177e4 LT |
999 | for( i = 0; i < RX_RING_SIZE; i++ ) |
1000 | if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag & | |
1001 | RMD1_OWN_CHIP) | |
1002 | break; | |
1003 | ||
1004 | if (i > RX_RING_SIZE - 2) { | |
09f75cd7 | 1005 | dev->stats.rx_dropped++; |
1da177e4 LT |
1006 | head->flag |= RMD1_OWN_CHIP; |
1007 | lp->cur_rx++; | |
1008 | } | |
1009 | break; | |
1010 | } | |
1011 | ||
1012 | if (lance_debug >= 3) { | |
0795af57 | 1013 | u_char *data = PKTBUF_ADDR(head); |
0795af57 | 1014 | |
e174961c | 1015 | printk(KERN_DEBUG "%s: RX pkt type 0x%04x from %pM to %pM " |
0795af57 | 1016 | "data %02x %02x %02x %02x %02x %02x %02x %02x " |
1da177e4 | 1017 | "len %d\n", |
0795af57 | 1018 | dev->name, ((u_short *)data)[6], |
e174961c | 1019 | &data[6], data, |
1da177e4 LT |
1020 | data[15], data[16], data[17], data[18], |
1021 | data[19], data[20], data[21], data[22], | |
0795af57 | 1022 | pkt_len); |
1da177e4 LT |
1023 | } |
1024 | ||
1da177e4 LT |
1025 | skb_reserve( skb, 2 ); /* 16 byte align */ |
1026 | skb_put( skb, pkt_len ); /* Make room */ | |
1027 | lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len ); | |
1028 | skb->protocol = eth_type_trans( skb, dev ); | |
1029 | netif_rx( skb ); | |
09f75cd7 JG |
1030 | dev->stats.rx_packets++; |
1031 | dev->stats.rx_bytes += pkt_len; | |
1da177e4 LT |
1032 | } |
1033 | } | |
1034 | ||
1035 | head->flag |= RMD1_OWN_CHIP; | |
1036 | entry = (++lp->cur_rx) & RX_RING_MOD_MASK; | |
1037 | } | |
1038 | lp->cur_rx &= RX_RING_MOD_MASK; | |
1039 | ||
1040 | /* From lance.c (Donald Becker): */ | |
1041 | /* We should check that at least two ring entries are free. If not, | |
1042 | we should free one and mark stats->rx_dropped++. */ | |
1043 | ||
1044 | return 0; | |
1045 | } | |
1046 | ||
1047 | ||
1048 | static int lance_close( struct net_device *dev ) | |
454d7c9b WC |
1049 | { |
1050 | struct lance_private *lp = netdev_priv(dev); | |
1da177e4 LT |
1051 | struct lance_ioreg *IO = lp->iobase; |
1052 | ||
1053 | netif_stop_queue (dev); | |
1054 | ||
1055 | AREG = CSR0; | |
1056 | ||
1057 | DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n", | |
1058 | dev->name, DREG )); | |
1059 | ||
1060 | /* We stop the LANCE here -- it occasionally polls | |
1061 | memory if we don't. */ | |
1062 | DREG = CSR0_STOP; | |
1063 | ||
1064 | return 0; | |
1065 | } | |
1066 | ||
1067 | ||
1da177e4 LT |
1068 | /* Set or clear the multicast filter for this adaptor. |
1069 | num_addrs == -1 Promiscuous mode, receive all packets | |
1070 | num_addrs == 0 Normal mode, clear multicast list | |
1071 | num_addrs > 0 Multicast mode, receive normal and MC packets, and do | |
1072 | best-effort filtering. | |
1073 | */ | |
1074 | ||
1075 | static void set_multicast_list( struct net_device *dev ) | |
454d7c9b WC |
1076 | { |
1077 | struct lance_private *lp = netdev_priv(dev); | |
1da177e4 LT |
1078 | struct lance_ioreg *IO = lp->iobase; |
1079 | ||
1080 | if (netif_running(dev)) | |
1081 | /* Only possible if board is already started */ | |
1082 | return; | |
1083 | ||
1084 | /* We take the simple way out and always enable promiscuous mode. */ | |
1085 | DREG = CSR0_STOP; /* Temporarily stop the lance. */ | |
1086 | ||
1087 | if (dev->flags & IFF_PROMISC) { | |
1088 | /* Log any net taps. */ | |
d5b20697 | 1089 | DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name )); |
1da177e4 LT |
1090 | REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */ |
1091 | } else { | |
1092 | short multicast_table[4]; | |
4cd24eaf | 1093 | int num_addrs = netdev_mc_count(dev); |
1da177e4 LT |
1094 | int i; |
1095 | /* We don't use the multicast table, but rely on upper-layer | |
1096 | * filtering. */ | |
1097 | memset( multicast_table, (num_addrs == 0) ? 0 : -1, | |
1098 | sizeof(multicast_table) ); | |
1099 | for( i = 0; i < 4; i++ ) | |
1100 | REGA( CSR8+i ) = multicast_table[i]; | |
1101 | REGA( CSR15 ) = 0; /* Unset promiscuous mode */ | |
1102 | } | |
1103 | ||
1104 | /* | |
1105 | * Always set BSWP after a STOP as STOP puts it back into | |
1106 | * little endian mode. | |
1107 | */ | |
1108 | REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); | |
1109 | ||
1110 | /* Resume normal operation and reset AREG to CSR0 */ | |
1111 | REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; | |
1112 | } | |
1113 | ||
1114 | ||
1115 | /* This is needed for old RieblCards and possible for new RieblCards */ | |
1116 | ||
1117 | static int lance_set_mac_address( struct net_device *dev, void *addr ) | |
454d7c9b WC |
1118 | { |
1119 | struct lance_private *lp = netdev_priv(dev); | |
1da177e4 LT |
1120 | struct sockaddr *saddr = addr; |
1121 | int i; | |
1122 | ||
1123 | if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL) | |
807540ba | 1124 | return -EOPNOTSUPP; |
1da177e4 LT |
1125 | |
1126 | if (netif_running(dev)) { | |
1127 | /* Only possible while card isn't started */ | |
1128 | DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n", | |
1129 | dev->name )); | |
807540ba | 1130 | return -EIO; |
1da177e4 LT |
1131 | } |
1132 | ||
1133 | memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len ); | |
1134 | for( i = 0; i < 6; i++ ) | |
1135 | MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */ | |
1136 | lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 ); | |
1137 | /* set also the magic for future sessions */ | |
1138 | *RIEBL_MAGIC_ADDR = RIEBL_MAGIC; | |
1139 | ||
807540ba | 1140 | return 0; |
1da177e4 LT |
1141 | } |
1142 | ||
6aa20a22 | 1143 | |
1da177e4 LT |
1144 | #ifdef MODULE |
1145 | static struct net_device *atarilance_dev; | |
1146 | ||
53e7c46b | 1147 | static int __init atarilance_module_init(void) |
1da177e4 LT |
1148 | { |
1149 | atarilance_dev = atarilance_probe(-1); | |
8c6ffba0 | 1150 | return PTR_ERR_OR_ZERO(atarilance_dev); |
1da177e4 LT |
1151 | } |
1152 | ||
53e7c46b | 1153 | static void __exit atarilance_module_exit(void) |
1da177e4 LT |
1154 | { |
1155 | unregister_netdev(atarilance_dev); | |
1156 | free_irq(atarilance_dev->irq, atarilance_dev); | |
1157 | free_netdev(atarilance_dev); | |
1158 | } | |
53e7c46b JS |
1159 | module_init(atarilance_module_init); |
1160 | module_exit(atarilance_module_exit); | |
1da177e4 | 1161 | #endif /* MODULE */ |
6aa20a22 | 1162 | |
1da177e4 LT |
1163 | |
1164 | /* | |
1165 | * Local variables: | |
1166 | * c-indent-level: 4 | |
1167 | * tab-width: 4 | |
1168 | * End: | |
1169 | */ |