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1da177e4 LT |
1 | /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $ |
2 | * lance.c: Linux/Sparc/Lance driver | |
3 | * | |
4 | * Written 1995, 1996 by Miguel de Icaza | |
5 | * Sources: | |
6 | * The Linux depca driver | |
7 | * The Linux lance driver. | |
8 | * The Linux skeleton driver. | |
9 | * The NetBSD Sparc/Lance driver. | |
10 | * Theo de Raadt (deraadt@openbsd.org) | |
11 | * NCR92C990 Lan Controller manual | |
12 | * | |
13 | * 1.4: | |
14 | * Added support to run with a ledma on the Sun4m | |
15 | * | |
16 | * 1.5: | |
17 | * Added multiple card detection. | |
18 | * | |
19 | * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost | |
20 | * (ecd@skynet.be) | |
21 | * | |
22 | * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost | |
23 | * (ecd@skynet.be) | |
24 | * | |
25 | * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller | |
26 | * (davem@caip.rutgers.edu) | |
27 | * | |
28 | * 5/29/96: override option 'tpe-link-test?', if it is 'false', as | |
29 | * this disables auto carrier detection on sun4m. Eddie C. Dost | |
30 | * (ecd@skynet.be) | |
31 | * | |
32 | * 1.7: | |
33 | * 6/26/96: Bug fix for multiple ledmas, miguel. | |
34 | * | |
35 | * 1.8: | |
36 | * Stole multicast code from depca.c, fixed lance_tx. | |
37 | * | |
38 | * 1.9: | |
39 | * 8/21/96: Fixed the multicast code (Pedro Roque) | |
40 | * | |
41 | * 8/28/96: Send fake packet in lance_open() if auto_select is true, | |
42 | * so we can detect the carrier loss condition in time. | |
43 | * Eddie C. Dost (ecd@skynet.be) | |
44 | * | |
45 | * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an | |
46 | * MNA trap during chksum_partial_copy(). (ecd@skynet.be) | |
47 | * | |
48 | * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be) | |
49 | * | |
50 | * 12/22/96: Don't loop forever in lance_rx() on incomplete packets. | |
51 | * This was the sun4c killer. Shit, stupid bug. | |
52 | * (ecd@skynet.be) | |
53 | * | |
54 | * 1.10: | |
55 | * 1/26/97: Modularize driver. (ecd@skynet.be) | |
56 | * | |
57 | * 1.11: | |
58 | * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz) | |
59 | * | |
60 | * 1.12: | |
61 | * 11/3/99: Fixed SMP race in lance_start_xmit found by davem. | |
62 | * Anton Blanchard (anton@progsoc.uts.edu.au) | |
63 | * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces. | |
64 | * David S. Miller (davem@redhat.com) | |
65 | * 2.01: | |
66 | * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com) | |
6aa20a22 | 67 | * |
1da177e4 LT |
68 | */ |
69 | ||
70 | #undef DEBUG_DRIVER | |
71 | ||
1da177e4 LT |
72 | static char lancestr[] = "LANCE"; |
73 | ||
1da177e4 LT |
74 | #include <linux/module.h> |
75 | #include <linux/kernel.h> | |
76 | #include <linux/types.h> | |
77 | #include <linux/fcntl.h> | |
78 | #include <linux/interrupt.h> | |
79 | #include <linux/ioport.h> | |
80 | #include <linux/in.h> | |
1da177e4 LT |
81 | #include <linux/string.h> |
82 | #include <linux/delay.h> | |
83 | #include <linux/init.h> | |
84 | #include <linux/crc32.h> | |
85 | #include <linux/errno.h> | |
86 | #include <linux/socket.h> /* Used for the temporal inet entries and routing */ | |
87 | #include <linux/route.h> | |
88 | #include <linux/netdevice.h> | |
89 | #include <linux/etherdevice.h> | |
90 | #include <linux/skbuff.h> | |
91 | #include <linux/ethtool.h> | |
92 | #include <linux/bitops.h> | |
738f2b7b | 93 | #include <linux/dma-mapping.h> |
af736fed DM |
94 | #include <linux/of.h> |
95 | #include <linux/of_device.h> | |
5a0e3ad6 | 96 | #include <linux/gfp.h> |
1da177e4 | 97 | |
1da177e4 LT |
98 | #include <asm/io.h> |
99 | #include <asm/dma.h> | |
100 | #include <asm/pgtable.h> | |
101 | #include <asm/byteorder.h> /* Used by the checksum routines */ | |
102 | #include <asm/idprom.h> | |
76fcdb30 | 103 | #include <asm/prom.h> |
1da177e4 LT |
104 | #include <asm/auxio.h> /* For tpe-link-test? setting */ |
105 | #include <asm/irq.h> | |
106 | ||
10158286 TC |
107 | #define DRV_NAME "sunlance" |
108 | #define DRV_VERSION "2.02" | |
109 | #define DRV_RELDATE "8/24/03" | |
110 | #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)" | |
111 | ||
112 | static char version[] = | |
113 | DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n"; | |
114 | ||
115 | MODULE_VERSION(DRV_VERSION); | |
116 | MODULE_AUTHOR(DRV_AUTHOR); | |
117 | MODULE_DESCRIPTION("Sun Lance ethernet driver"); | |
118 | MODULE_LICENSE("GPL"); | |
119 | ||
1da177e4 LT |
120 | /* Define: 2^4 Tx buffers and 2^4 Rx buffers */ |
121 | #ifndef LANCE_LOG_TX_BUFFERS | |
122 | #define LANCE_LOG_TX_BUFFERS 4 | |
123 | #define LANCE_LOG_RX_BUFFERS 4 | |
124 | #endif | |
125 | ||
126 | #define LE_CSR0 0 | |
127 | #define LE_CSR1 1 | |
128 | #define LE_CSR2 2 | |
129 | #define LE_CSR3 3 | |
130 | ||
131 | #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ | |
132 | ||
133 | #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ | |
134 | #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ | |
135 | #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ | |
136 | #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ | |
137 | #define LE_C0_MERR 0x0800 /* ME: Memory error */ | |
138 | #define LE_C0_RINT 0x0400 /* Received interrupt */ | |
139 | #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ | |
140 | #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ | |
141 | #define LE_C0_INTR 0x0080 /* Interrupt or error */ | |
142 | #define LE_C0_INEA 0x0040 /* Interrupt enable */ | |
143 | #define LE_C0_RXON 0x0020 /* Receiver on */ | |
144 | #define LE_C0_TXON 0x0010 /* Transmitter on */ | |
145 | #define LE_C0_TDMD 0x0008 /* Transmitter demand */ | |
146 | #define LE_C0_STOP 0x0004 /* Stop the card */ | |
147 | #define LE_C0_STRT 0x0002 /* Start the card */ | |
148 | #define LE_C0_INIT 0x0001 /* Init the card */ | |
149 | ||
150 | #define LE_C3_BSWP 0x4 /* SWAP */ | |
151 | #define LE_C3_ACON 0x2 /* ALE Control */ | |
152 | #define LE_C3_BCON 0x1 /* Byte control */ | |
153 | ||
154 | /* Receive message descriptor 1 */ | |
155 | #define LE_R1_OWN 0x80 /* Who owns the entry */ | |
156 | #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */ | |
157 | #define LE_R1_FRA 0x20 /* FRA: Frame error */ | |
158 | #define LE_R1_OFL 0x10 /* OFL: Frame overflow */ | |
159 | #define LE_R1_CRC 0x08 /* CRC error */ | |
160 | #define LE_R1_BUF 0x04 /* BUF: Buffer error */ | |
161 | #define LE_R1_SOP 0x02 /* Start of packet */ | |
162 | #define LE_R1_EOP 0x01 /* End of packet */ | |
163 | #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */ | |
164 | ||
165 | #define LE_T1_OWN 0x80 /* Lance owns the packet */ | |
166 | #define LE_T1_ERR 0x40 /* Error summary */ | |
167 | #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */ | |
168 | #define LE_T1_EONE 0x08 /* Error: one retry needed */ | |
169 | #define LE_T1_EDEF 0x04 /* Error: deferred */ | |
170 | #define LE_T1_SOP 0x02 /* Start of packet */ | |
171 | #define LE_T1_EOP 0x01 /* End of packet */ | |
172 | #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */ | |
173 | ||
174 | #define LE_T3_BUF 0x8000 /* Buffer error */ | |
175 | #define LE_T3_UFL 0x4000 /* Error underflow */ | |
176 | #define LE_T3_LCOL 0x1000 /* Error late collision */ | |
177 | #define LE_T3_CLOS 0x0800 /* Error carrier loss */ | |
178 | #define LE_T3_RTY 0x0400 /* Error retry */ | |
179 | #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ | |
180 | ||
181 | #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) | |
182 | #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) | |
183 | #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) | |
184 | #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK) | |
185 | ||
186 | #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) | |
187 | #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) | |
188 | #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) | |
189 | #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK) | |
190 | ||
191 | #define PKT_BUF_SZ 1544 | |
192 | #define RX_BUFF_SIZE PKT_BUF_SZ | |
193 | #define TX_BUFF_SIZE PKT_BUF_SZ | |
194 | ||
195 | struct lance_rx_desc { | |
196 | u16 rmd0; /* low address of packet */ | |
197 | u8 rmd1_bits; /* descriptor bits */ | |
198 | u8 rmd1_hadr; /* high address of packet */ | |
199 | s16 length; /* This length is 2s complement (negative)! | |
200 | * Buffer length | |
201 | */ | |
202 | u16 mblength; /* This is the actual number of bytes received */ | |
203 | }; | |
204 | ||
205 | struct lance_tx_desc { | |
206 | u16 tmd0; /* low address of packet */ | |
207 | u8 tmd1_bits; /* descriptor bits */ | |
208 | u8 tmd1_hadr; /* high address of packet */ | |
209 | s16 length; /* Length is 2s complement (negative)! */ | |
210 | u16 misc; | |
211 | }; | |
6aa20a22 | 212 | |
1da177e4 LT |
213 | /* The LANCE initialization block, described in databook. */ |
214 | /* On the Sparc, this block should be on a DMA region */ | |
215 | struct lance_init_block { | |
216 | u16 mode; /* Pre-set mode (reg. 15) */ | |
217 | u8 phys_addr[6]; /* Physical ethernet address */ | |
218 | u32 filter[2]; /* Multicast filter. */ | |
219 | ||
220 | /* Receive and transmit ring base, along with extra bits. */ | |
221 | u16 rx_ptr; /* receive descriptor addr */ | |
222 | u16 rx_len; /* receive len and high addr */ | |
223 | u16 tx_ptr; /* transmit descriptor addr */ | |
224 | u16 tx_len; /* transmit len and high addr */ | |
6aa20a22 | 225 | |
1da177e4 LT |
226 | /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */ |
227 | struct lance_rx_desc brx_ring[RX_RING_SIZE]; | |
228 | struct lance_tx_desc btx_ring[TX_RING_SIZE]; | |
6aa20a22 | 229 | |
1da177e4 LT |
230 | u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE]; |
231 | u8 pad[2]; /* align rx_buf for copy_and_sum(). */ | |
232 | u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE]; | |
233 | }; | |
234 | ||
235 | #define libdesc_offset(rt, elem) \ | |
236 | ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem]))))) | |
237 | ||
238 | #define libbuff_offset(rt, elem) \ | |
239 | ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0]))))) | |
240 | ||
241 | struct lance_private { | |
242 | void __iomem *lregs; /* Lance RAP/RDP regs. */ | |
243 | void __iomem *dregs; /* DMA controller regs. */ | |
244 | struct lance_init_block __iomem *init_block_iomem; | |
245 | struct lance_init_block *init_block_mem; | |
6aa20a22 | 246 | |
1da177e4 LT |
247 | spinlock_t lock; |
248 | ||
249 | int rx_new, tx_new; | |
250 | int rx_old, tx_old; | |
6aa20a22 | 251 | |
2dc11581 | 252 | struct platform_device *ledma; /* If set this points to ledma */ |
1da177e4 LT |
253 | char tpe; /* cable-selection is TPE */ |
254 | char auto_select; /* cable-selection by carrier */ | |
255 | char burst_sizes; /* ledma SBus burst sizes */ | |
256 | char pio_buffer; /* init block in PIO space? */ | |
257 | ||
258 | unsigned short busmaster_regval; | |
259 | ||
260 | void (*init_ring)(struct net_device *); | |
261 | void (*rx)(struct net_device *); | |
262 | void (*tx)(struct net_device *); | |
263 | ||
264 | char *name; | |
265 | dma_addr_t init_block_dvma; | |
266 | struct net_device *dev; /* Backpointer */ | |
2dc11581 GL |
267 | struct platform_device *op; |
268 | struct platform_device *lebuffer; | |
1da177e4 LT |
269 | struct timer_list multicast_timer; |
270 | }; | |
271 | ||
272 | #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ | |
273 | lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ | |
274 | lp->tx_old - lp->tx_new-1) | |
275 | ||
276 | /* Lance registers. */ | |
277 | #define RDP 0x00UL /* register data port */ | |
278 | #define RAP 0x02UL /* register address port */ | |
279 | #define LANCE_REG_SIZE 0x04UL | |
280 | ||
281 | #define STOP_LANCE(__lp) \ | |
282 | do { void __iomem *__base = (__lp)->lregs; \ | |
283 | sbus_writew(LE_CSR0, __base + RAP); \ | |
284 | sbus_writew(LE_C0_STOP, __base + RDP); \ | |
285 | } while (0) | |
286 | ||
287 | int sparc_lance_debug = 2; | |
288 | ||
289 | /* The Lance uses 24 bit addresses */ | |
290 | /* On the Sun4c the DVMA will provide the remaining bytes for us */ | |
291 | /* On the Sun4m we have to instruct the ledma to provide them */ | |
292 | /* Even worse, on scsi/ether SBUS cards, the init block and the | |
293 | * transmit/receive buffers are addresses as offsets from absolute | |
294 | * zero on the lebuffer PIO area. -DaveM | |
295 | */ | |
296 | ||
297 | #define LANCE_ADDR(x) ((long)(x) & ~0xff000000) | |
298 | ||
1da177e4 LT |
299 | /* Load the CSR registers */ |
300 | static void load_csrs(struct lance_private *lp) | |
301 | { | |
302 | u32 leptr; | |
303 | ||
304 | if (lp->pio_buffer) | |
305 | leptr = 0; | |
306 | else | |
307 | leptr = LANCE_ADDR(lp->init_block_dvma); | |
308 | ||
309 | sbus_writew(LE_CSR1, lp->lregs + RAP); | |
310 | sbus_writew(leptr & 0xffff, lp->lregs + RDP); | |
311 | sbus_writew(LE_CSR2, lp->lregs + RAP); | |
312 | sbus_writew(leptr >> 16, lp->lregs + RDP); | |
313 | sbus_writew(LE_CSR3, lp->lregs + RAP); | |
314 | sbus_writew(lp->busmaster_regval, lp->lregs + RDP); | |
315 | ||
316 | /* Point back to csr0 */ | |
317 | sbus_writew(LE_CSR0, lp->lregs + RAP); | |
318 | } | |
319 | ||
320 | /* Setup the Lance Rx and Tx rings */ | |
321 | static void lance_init_ring_dvma(struct net_device *dev) | |
322 | { | |
323 | struct lance_private *lp = netdev_priv(dev); | |
324 | struct lance_init_block *ib = lp->init_block_mem; | |
325 | dma_addr_t aib = lp->init_block_dvma; | |
326 | __u32 leptr; | |
327 | int i; | |
6aa20a22 | 328 | |
1da177e4 LT |
329 | /* Lock out other processes while setting up hardware */ |
330 | netif_stop_queue(dev); | |
331 | lp->rx_new = lp->tx_new = 0; | |
332 | lp->rx_old = lp->tx_old = 0; | |
333 | ||
334 | /* Copy the ethernet address to the lance init block | |
335 | * Note that on the sparc you need to swap the ethernet address. | |
336 | */ | |
337 | ib->phys_addr [0] = dev->dev_addr [1]; | |
338 | ib->phys_addr [1] = dev->dev_addr [0]; | |
339 | ib->phys_addr [2] = dev->dev_addr [3]; | |
340 | ib->phys_addr [3] = dev->dev_addr [2]; | |
341 | ib->phys_addr [4] = dev->dev_addr [5]; | |
342 | ib->phys_addr [5] = dev->dev_addr [4]; | |
343 | ||
344 | /* Setup the Tx ring entries */ | |
b956d411 | 345 | for (i = 0; i < TX_RING_SIZE; i++) { |
1da177e4 LT |
346 | leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i)); |
347 | ib->btx_ring [i].tmd0 = leptr; | |
348 | ib->btx_ring [i].tmd1_hadr = leptr >> 16; | |
349 | ib->btx_ring [i].tmd1_bits = 0; | |
350 | ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */ | |
351 | ib->btx_ring [i].misc = 0; | |
352 | } | |
353 | ||
354 | /* Setup the Rx ring entries */ | |
355 | for (i = 0; i < RX_RING_SIZE; i++) { | |
356 | leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i)); | |
357 | ||
358 | ib->brx_ring [i].rmd0 = leptr; | |
359 | ib->brx_ring [i].rmd1_hadr = leptr >> 16; | |
360 | ib->brx_ring [i].rmd1_bits = LE_R1_OWN; | |
361 | ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000; | |
362 | ib->brx_ring [i].mblength = 0; | |
363 | } | |
364 | ||
365 | /* Setup the initialization block */ | |
6aa20a22 | 366 | |
1da177e4 LT |
367 | /* Setup rx descriptor pointer */ |
368 | leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0)); | |
369 | ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16); | |
370 | ib->rx_ptr = leptr; | |
6aa20a22 | 371 | |
1da177e4 LT |
372 | /* Setup tx descriptor pointer */ |
373 | leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0)); | |
374 | ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16); | |
375 | ib->tx_ptr = leptr; | |
376 | } | |
377 | ||
378 | static void lance_init_ring_pio(struct net_device *dev) | |
379 | { | |
380 | struct lance_private *lp = netdev_priv(dev); | |
381 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
382 | u32 leptr; | |
383 | int i; | |
6aa20a22 | 384 | |
1da177e4 LT |
385 | /* Lock out other processes while setting up hardware */ |
386 | netif_stop_queue(dev); | |
387 | lp->rx_new = lp->tx_new = 0; | |
388 | lp->rx_old = lp->tx_old = 0; | |
389 | ||
390 | /* Copy the ethernet address to the lance init block | |
391 | * Note that on the sparc you need to swap the ethernet address. | |
392 | */ | |
393 | sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]); | |
394 | sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]); | |
395 | sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]); | |
396 | sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]); | |
397 | sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]); | |
398 | sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]); | |
399 | ||
400 | /* Setup the Tx ring entries */ | |
b956d411 | 401 | for (i = 0; i < TX_RING_SIZE; i++) { |
1da177e4 LT |
402 | leptr = libbuff_offset(tx_buf, i); |
403 | sbus_writew(leptr, &ib->btx_ring [i].tmd0); | |
404 | sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr); | |
405 | sbus_writeb(0, &ib->btx_ring [i].tmd1_bits); | |
406 | ||
407 | /* The ones required by tmd2 */ | |
408 | sbus_writew(0xf000, &ib->btx_ring [i].length); | |
409 | sbus_writew(0, &ib->btx_ring [i].misc); | |
410 | } | |
411 | ||
412 | /* Setup the Rx ring entries */ | |
413 | for (i = 0; i < RX_RING_SIZE; i++) { | |
414 | leptr = libbuff_offset(rx_buf, i); | |
415 | ||
416 | sbus_writew(leptr, &ib->brx_ring [i].rmd0); | |
417 | sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr); | |
418 | sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits); | |
419 | sbus_writew(-RX_BUFF_SIZE|0xf000, | |
420 | &ib->brx_ring [i].length); | |
421 | sbus_writew(0, &ib->brx_ring [i].mblength); | |
422 | } | |
423 | ||
424 | /* Setup the initialization block */ | |
6aa20a22 | 425 | |
1da177e4 LT |
426 | /* Setup rx descriptor pointer */ |
427 | leptr = libdesc_offset(brx_ring, 0); | |
428 | sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16), | |
429 | &ib->rx_len); | |
430 | sbus_writew(leptr, &ib->rx_ptr); | |
6aa20a22 | 431 | |
1da177e4 LT |
432 | /* Setup tx descriptor pointer */ |
433 | leptr = libdesc_offset(btx_ring, 0); | |
434 | sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16), | |
435 | &ib->tx_len); | |
436 | sbus_writew(leptr, &ib->tx_ptr); | |
437 | } | |
438 | ||
439 | static void init_restart_ledma(struct lance_private *lp) | |
440 | { | |
441 | u32 csr = sbus_readl(lp->dregs + DMA_CSR); | |
442 | ||
443 | if (!(csr & DMA_HNDL_ERROR)) { | |
444 | /* E-Cache draining */ | |
445 | while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) | |
446 | barrier(); | |
447 | } | |
448 | ||
449 | csr = sbus_readl(lp->dregs + DMA_CSR); | |
450 | csr &= ~DMA_E_BURSTS; | |
451 | if (lp->burst_sizes & DMA_BURST32) | |
452 | csr |= DMA_E_BURST32; | |
453 | else | |
454 | csr |= DMA_E_BURST16; | |
455 | ||
456 | csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV); | |
457 | ||
458 | if (lp->tpe) | |
459 | csr |= DMA_EN_ENETAUI; | |
460 | else | |
461 | csr &= ~DMA_EN_ENETAUI; | |
462 | udelay(20); | |
463 | sbus_writel(csr, lp->dregs + DMA_CSR); | |
464 | udelay(200); | |
465 | } | |
466 | ||
467 | static int init_restart_lance(struct lance_private *lp) | |
468 | { | |
469 | u16 regval = 0; | |
470 | int i; | |
471 | ||
472 | if (lp->dregs) | |
473 | init_restart_ledma(lp); | |
474 | ||
475 | sbus_writew(LE_CSR0, lp->lregs + RAP); | |
476 | sbus_writew(LE_C0_INIT, lp->lregs + RDP); | |
477 | ||
478 | /* Wait for the lance to complete initialization */ | |
479 | for (i = 0; i < 100; i++) { | |
480 | regval = sbus_readw(lp->lregs + RDP); | |
481 | ||
482 | if (regval & (LE_C0_ERR | LE_C0_IDON)) | |
483 | break; | |
484 | barrier(); | |
485 | } | |
486 | if (i == 100 || (regval & LE_C0_ERR)) { | |
487 | printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n", | |
488 | i, regval); | |
489 | if (lp->dregs) | |
490 | printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR)); | |
491 | return -1; | |
492 | } | |
493 | ||
494 | /* Clear IDON by writing a "1", enable interrupts and start lance */ | |
495 | sbus_writew(LE_C0_IDON, lp->lregs + RDP); | |
496 | sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP); | |
497 | ||
498 | if (lp->dregs) { | |
499 | u32 csr = sbus_readl(lp->dregs + DMA_CSR); | |
500 | ||
501 | csr |= DMA_INT_ENAB; | |
502 | sbus_writel(csr, lp->dregs + DMA_CSR); | |
503 | } | |
504 | ||
505 | return 0; | |
506 | } | |
507 | ||
508 | static void lance_rx_dvma(struct net_device *dev) | |
509 | { | |
510 | struct lance_private *lp = netdev_priv(dev); | |
511 | struct lance_init_block *ib = lp->init_block_mem; | |
512 | struct lance_rx_desc *rd; | |
513 | u8 bits; | |
514 | int len, entry = lp->rx_new; | |
515 | struct sk_buff *skb; | |
516 | ||
517 | for (rd = &ib->brx_ring [entry]; | |
518 | !((bits = rd->rmd1_bits) & LE_R1_OWN); | |
519 | rd = &ib->brx_ring [entry]) { | |
520 | ||
521 | /* We got an incomplete frame? */ | |
522 | if ((bits & LE_R1_POK) != LE_R1_POK) { | |
09f75cd7 JG |
523 | dev->stats.rx_over_errors++; |
524 | dev->stats.rx_errors++; | |
1da177e4 LT |
525 | } else if (bits & LE_R1_ERR) { |
526 | /* Count only the end frame as a rx error, | |
527 | * not the beginning | |
528 | */ | |
09f75cd7 JG |
529 | if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; |
530 | if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; | |
531 | if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; | |
532 | if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; | |
533 | if (bits & LE_R1_EOP) dev->stats.rx_errors++; | |
1da177e4 LT |
534 | } else { |
535 | len = (rd->mblength & 0xfff) - 4; | |
1d266430 | 536 | skb = netdev_alloc_skb(dev, len + 2); |
1da177e4 LT |
537 | |
538 | if (skb == NULL) { | |
539 | printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", | |
540 | dev->name); | |
09f75cd7 | 541 | dev->stats.rx_dropped++; |
1da177e4 LT |
542 | rd->mblength = 0; |
543 | rd->rmd1_bits = LE_R1_OWN; | |
544 | lp->rx_new = RX_NEXT(entry); | |
545 | return; | |
546 | } | |
6aa20a22 | 547 | |
09f75cd7 | 548 | dev->stats.rx_bytes += len; |
1da177e4 | 549 | |
1da177e4 LT |
550 | skb_reserve(skb, 2); /* 16 byte align */ |
551 | skb_put(skb, len); /* make room */ | |
8c7b7faa | 552 | skb_copy_to_linear_data(skb, |
1da177e4 | 553 | (unsigned char *)&(ib->rx_buf [entry][0]), |
8c7b7faa | 554 | len); |
1da177e4 LT |
555 | skb->protocol = eth_type_trans(skb, dev); |
556 | netif_rx(skb); | |
09f75cd7 | 557 | dev->stats.rx_packets++; |
1da177e4 LT |
558 | } |
559 | ||
560 | /* Return the packet to the pool */ | |
561 | rd->mblength = 0; | |
562 | rd->rmd1_bits = LE_R1_OWN; | |
563 | entry = RX_NEXT(entry); | |
564 | } | |
565 | ||
566 | lp->rx_new = entry; | |
567 | } | |
568 | ||
569 | static void lance_tx_dvma(struct net_device *dev) | |
570 | { | |
571 | struct lance_private *lp = netdev_priv(dev); | |
572 | struct lance_init_block *ib = lp->init_block_mem; | |
573 | int i, j; | |
574 | ||
575 | spin_lock(&lp->lock); | |
576 | ||
577 | j = lp->tx_old; | |
578 | for (i = j; i != lp->tx_new; i = j) { | |
579 | struct lance_tx_desc *td = &ib->btx_ring [i]; | |
580 | u8 bits = td->tmd1_bits; | |
581 | ||
582 | /* If we hit a packet not owned by us, stop */ | |
583 | if (bits & LE_T1_OWN) | |
584 | break; | |
6aa20a22 | 585 | |
1da177e4 LT |
586 | if (bits & LE_T1_ERR) { |
587 | u16 status = td->misc; | |
6aa20a22 | 588 | |
09f75cd7 JG |
589 | dev->stats.tx_errors++; |
590 | if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; | |
591 | if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; | |
1da177e4 LT |
592 | |
593 | if (status & LE_T3_CLOS) { | |
09f75cd7 | 594 | dev->stats.tx_carrier_errors++; |
1da177e4 LT |
595 | if (lp->auto_select) { |
596 | lp->tpe = 1 - lp->tpe; | |
597 | printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", | |
598 | dev->name, lp->tpe?"TPE":"AUI"); | |
599 | STOP_LANCE(lp); | |
600 | lp->init_ring(dev); | |
601 | load_csrs(lp); | |
602 | init_restart_lance(lp); | |
603 | goto out; | |
604 | } | |
605 | } | |
606 | ||
607 | /* Buffer errors and underflows turn off the | |
608 | * transmitter, restart the adapter. | |
609 | */ | |
610 | if (status & (LE_T3_BUF|LE_T3_UFL)) { | |
09f75cd7 | 611 | dev->stats.tx_fifo_errors++; |
1da177e4 LT |
612 | |
613 | printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", | |
614 | dev->name); | |
615 | STOP_LANCE(lp); | |
616 | lp->init_ring(dev); | |
617 | load_csrs(lp); | |
618 | init_restart_lance(lp); | |
619 | goto out; | |
620 | } | |
621 | } else if ((bits & LE_T1_POK) == LE_T1_POK) { | |
622 | /* | |
623 | * So we don't count the packet more than once. | |
624 | */ | |
625 | td->tmd1_bits = bits & ~(LE_T1_POK); | |
626 | ||
627 | /* One collision before packet was sent. */ | |
628 | if (bits & LE_T1_EONE) | |
09f75cd7 | 629 | dev->stats.collisions++; |
1da177e4 LT |
630 | |
631 | /* More than one collision, be optimistic. */ | |
632 | if (bits & LE_T1_EMORE) | |
09f75cd7 | 633 | dev->stats.collisions += 2; |
1da177e4 | 634 | |
09f75cd7 | 635 | dev->stats.tx_packets++; |
1da177e4 | 636 | } |
6aa20a22 | 637 | |
1da177e4 LT |
638 | j = TX_NEXT(j); |
639 | } | |
640 | lp->tx_old = j; | |
641 | out: | |
642 | if (netif_queue_stopped(dev) && | |
643 | TX_BUFFS_AVAIL > 0) | |
644 | netif_wake_queue(dev); | |
645 | ||
646 | spin_unlock(&lp->lock); | |
647 | } | |
648 | ||
649 | static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len) | |
650 | { | |
651 | u16 *p16 = (u16 *) skb->data; | |
652 | u32 *p32; | |
653 | u8 *p8; | |
654 | void __iomem *pbuf = piobuf; | |
655 | ||
656 | /* We know here that both src and dest are on a 16bit boundary. */ | |
657 | *p16++ = sbus_readw(pbuf); | |
658 | p32 = (u32 *) p16; | |
659 | pbuf += 2; | |
660 | len -= 2; | |
661 | ||
662 | while (len >= 4) { | |
663 | *p32++ = sbus_readl(pbuf); | |
664 | pbuf += 4; | |
665 | len -= 4; | |
666 | } | |
667 | p8 = (u8 *) p32; | |
668 | if (len >= 2) { | |
669 | p16 = (u16 *) p32; | |
670 | *p16++ = sbus_readw(pbuf); | |
671 | pbuf += 2; | |
672 | len -= 2; | |
673 | p8 = (u8 *) p16; | |
674 | } | |
675 | if (len >= 1) | |
676 | *p8 = sbus_readb(pbuf); | |
677 | } | |
678 | ||
679 | static void lance_rx_pio(struct net_device *dev) | |
680 | { | |
681 | struct lance_private *lp = netdev_priv(dev); | |
682 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
683 | struct lance_rx_desc __iomem *rd; | |
684 | unsigned char bits; | |
685 | int len, entry; | |
686 | struct sk_buff *skb; | |
687 | ||
688 | entry = lp->rx_new; | |
689 | for (rd = &ib->brx_ring [entry]; | |
690 | !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN); | |
691 | rd = &ib->brx_ring [entry]) { | |
692 | ||
693 | /* We got an incomplete frame? */ | |
694 | if ((bits & LE_R1_POK) != LE_R1_POK) { | |
09f75cd7 JG |
695 | dev->stats.rx_over_errors++; |
696 | dev->stats.rx_errors++; | |
1da177e4 LT |
697 | } else if (bits & LE_R1_ERR) { |
698 | /* Count only the end frame as a rx error, | |
699 | * not the beginning | |
700 | */ | |
09f75cd7 JG |
701 | if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; |
702 | if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; | |
703 | if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; | |
704 | if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; | |
705 | if (bits & LE_R1_EOP) dev->stats.rx_errors++; | |
1da177e4 LT |
706 | } else { |
707 | len = (sbus_readw(&rd->mblength) & 0xfff) - 4; | |
1d266430 | 708 | skb = netdev_alloc_skb(dev, len + 2); |
1da177e4 LT |
709 | |
710 | if (skb == NULL) { | |
711 | printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", | |
712 | dev->name); | |
09f75cd7 | 713 | dev->stats.rx_dropped++; |
1da177e4 LT |
714 | sbus_writew(0, &rd->mblength); |
715 | sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); | |
716 | lp->rx_new = RX_NEXT(entry); | |
717 | return; | |
718 | } | |
6aa20a22 | 719 | |
09f75cd7 | 720 | dev->stats.rx_bytes += len; |
1da177e4 | 721 | |
1da177e4 LT |
722 | skb_reserve (skb, 2); /* 16 byte align */ |
723 | skb_put(skb, len); /* make room */ | |
724 | lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len); | |
725 | skb->protocol = eth_type_trans(skb, dev); | |
726 | netif_rx(skb); | |
09f75cd7 | 727 | dev->stats.rx_packets++; |
1da177e4 LT |
728 | } |
729 | ||
730 | /* Return the packet to the pool */ | |
731 | sbus_writew(0, &rd->mblength); | |
732 | sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); | |
733 | entry = RX_NEXT(entry); | |
734 | } | |
735 | ||
736 | lp->rx_new = entry; | |
737 | } | |
738 | ||
739 | static void lance_tx_pio(struct net_device *dev) | |
740 | { | |
741 | struct lance_private *lp = netdev_priv(dev); | |
742 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
743 | int i, j; | |
744 | ||
745 | spin_lock(&lp->lock); | |
746 | ||
747 | j = lp->tx_old; | |
748 | for (i = j; i != lp->tx_new; i = j) { | |
749 | struct lance_tx_desc __iomem *td = &ib->btx_ring [i]; | |
750 | u8 bits = sbus_readb(&td->tmd1_bits); | |
751 | ||
752 | /* If we hit a packet not owned by us, stop */ | |
753 | if (bits & LE_T1_OWN) | |
754 | break; | |
6aa20a22 | 755 | |
1da177e4 LT |
756 | if (bits & LE_T1_ERR) { |
757 | u16 status = sbus_readw(&td->misc); | |
6aa20a22 | 758 | |
09f75cd7 JG |
759 | dev->stats.tx_errors++; |
760 | if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; | |
761 | if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; | |
1da177e4 LT |
762 | |
763 | if (status & LE_T3_CLOS) { | |
09f75cd7 | 764 | dev->stats.tx_carrier_errors++; |
1da177e4 LT |
765 | if (lp->auto_select) { |
766 | lp->tpe = 1 - lp->tpe; | |
767 | printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", | |
768 | dev->name, lp->tpe?"TPE":"AUI"); | |
769 | STOP_LANCE(lp); | |
770 | lp->init_ring(dev); | |
771 | load_csrs(lp); | |
772 | init_restart_lance(lp); | |
773 | goto out; | |
774 | } | |
775 | } | |
776 | ||
777 | /* Buffer errors and underflows turn off the | |
778 | * transmitter, restart the adapter. | |
779 | */ | |
780 | if (status & (LE_T3_BUF|LE_T3_UFL)) { | |
09f75cd7 | 781 | dev->stats.tx_fifo_errors++; |
1da177e4 LT |
782 | |
783 | printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", | |
784 | dev->name); | |
785 | STOP_LANCE(lp); | |
786 | lp->init_ring(dev); | |
787 | load_csrs(lp); | |
788 | init_restart_lance(lp); | |
789 | goto out; | |
790 | } | |
791 | } else if ((bits & LE_T1_POK) == LE_T1_POK) { | |
792 | /* | |
793 | * So we don't count the packet more than once. | |
794 | */ | |
795 | sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits); | |
796 | ||
797 | /* One collision before packet was sent. */ | |
798 | if (bits & LE_T1_EONE) | |
09f75cd7 | 799 | dev->stats.collisions++; |
1da177e4 LT |
800 | |
801 | /* More than one collision, be optimistic. */ | |
802 | if (bits & LE_T1_EMORE) | |
09f75cd7 | 803 | dev->stats.collisions += 2; |
1da177e4 | 804 | |
09f75cd7 | 805 | dev->stats.tx_packets++; |
1da177e4 | 806 | } |
6aa20a22 | 807 | |
1da177e4 LT |
808 | j = TX_NEXT(j); |
809 | } | |
810 | lp->tx_old = j; | |
811 | ||
812 | if (netif_queue_stopped(dev) && | |
813 | TX_BUFFS_AVAIL > 0) | |
814 | netif_wake_queue(dev); | |
815 | out: | |
816 | spin_unlock(&lp->lock); | |
817 | } | |
818 | ||
7d12e780 | 819 | static irqreturn_t lance_interrupt(int irq, void *dev_id) |
1da177e4 | 820 | { |
c31f28e7 | 821 | struct net_device *dev = dev_id; |
1da177e4 LT |
822 | struct lance_private *lp = netdev_priv(dev); |
823 | int csr0; | |
6aa20a22 | 824 | |
1da177e4 LT |
825 | sbus_writew(LE_CSR0, lp->lregs + RAP); |
826 | csr0 = sbus_readw(lp->lregs + RDP); | |
827 | ||
828 | /* Acknowledge all the interrupt sources ASAP */ | |
829 | sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT), | |
830 | lp->lregs + RDP); | |
6aa20a22 | 831 | |
1da177e4 LT |
832 | if ((csr0 & LE_C0_ERR) != 0) { |
833 | /* Clear the error condition */ | |
834 | sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | | |
835 | LE_C0_CERR | LE_C0_MERR), | |
836 | lp->lregs + RDP); | |
837 | } | |
6aa20a22 | 838 | |
1da177e4 LT |
839 | if (csr0 & LE_C0_RINT) |
840 | lp->rx(dev); | |
6aa20a22 | 841 | |
1da177e4 LT |
842 | if (csr0 & LE_C0_TINT) |
843 | lp->tx(dev); | |
6aa20a22 | 844 | |
1da177e4 | 845 | if (csr0 & LE_C0_BABL) |
09f75cd7 | 846 | dev->stats.tx_errors++; |
1da177e4 LT |
847 | |
848 | if (csr0 & LE_C0_MISS) | |
09f75cd7 | 849 | dev->stats.rx_errors++; |
1da177e4 LT |
850 | |
851 | if (csr0 & LE_C0_MERR) { | |
852 | if (lp->dregs) { | |
853 | u32 addr = sbus_readl(lp->dregs + DMA_ADDR); | |
854 | ||
855 | printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n", | |
856 | dev->name, csr0, addr & 0xffffff); | |
857 | } else { | |
858 | printk(KERN_ERR "%s: Memory error, status %04x\n", | |
859 | dev->name, csr0); | |
860 | } | |
861 | ||
862 | sbus_writew(LE_C0_STOP, lp->lregs + RDP); | |
863 | ||
864 | if (lp->dregs) { | |
865 | u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR); | |
866 | ||
867 | dma_csr |= DMA_FIFO_INV; | |
868 | sbus_writel(dma_csr, lp->dregs + DMA_CSR); | |
869 | } | |
870 | ||
871 | lp->init_ring(dev); | |
872 | load_csrs(lp); | |
873 | init_restart_lance(lp); | |
874 | netif_wake_queue(dev); | |
875 | } | |
876 | ||
877 | sbus_writew(LE_C0_INEA, lp->lregs + RDP); | |
878 | ||
879 | return IRQ_HANDLED; | |
880 | } | |
881 | ||
882 | /* Build a fake network packet and send it to ourselves. */ | |
883 | static void build_fake_packet(struct lance_private *lp) | |
884 | { | |
885 | struct net_device *dev = lp->dev; | |
886 | int i, entry; | |
887 | ||
888 | entry = lp->tx_new & TX_RING_MOD_MASK; | |
889 | if (lp->pio_buffer) { | |
890 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
891 | u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]); | |
892 | struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet; | |
893 | for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++) | |
894 | sbus_writew(0, &packet[i]); | |
895 | for (i = 0; i < 6; i++) { | |
896 | sbus_writeb(dev->dev_addr[i], ð->h_dest[i]); | |
897 | sbus_writeb(dev->dev_addr[i], ð->h_source[i]); | |
898 | } | |
899 | sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length); | |
900 | sbus_writew(0, &ib->btx_ring[entry].misc); | |
901 | sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); | |
902 | } else { | |
903 | struct lance_init_block *ib = lp->init_block_mem; | |
904 | u16 *packet = (u16 *) &(ib->tx_buf[entry][0]); | |
905 | struct ethhdr *eth = (struct ethhdr *) packet; | |
906 | memset(packet, 0, ETH_ZLEN); | |
907 | for (i = 0; i < 6; i++) { | |
908 | eth->h_dest[i] = dev->dev_addr[i]; | |
909 | eth->h_source[i] = dev->dev_addr[i]; | |
910 | } | |
911 | ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000; | |
912 | ib->btx_ring[entry].misc = 0; | |
913 | ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN); | |
914 | } | |
915 | lp->tx_new = TX_NEXT(entry); | |
916 | } | |
917 | ||
1da177e4 LT |
918 | static int lance_open(struct net_device *dev) |
919 | { | |
920 | struct lance_private *lp = netdev_priv(dev); | |
921 | int status = 0; | |
922 | ||
1da177e4 LT |
923 | STOP_LANCE(lp); |
924 | ||
a0607fd3 | 925 | if (request_irq(dev->irq, lance_interrupt, IRQF_SHARED, |
1da177e4 | 926 | lancestr, (void *) dev)) { |
c6387a48 | 927 | printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq); |
1da177e4 LT |
928 | return -EAGAIN; |
929 | } | |
930 | ||
931 | /* On the 4m, setup the ledma to provide the upper bits for buffers */ | |
932 | if (lp->dregs) { | |
933 | u32 regval = lp->init_block_dvma & 0xff000000; | |
934 | ||
935 | sbus_writel(regval, lp->dregs + DMA_TEST); | |
936 | } | |
937 | ||
938 | /* Set mode and clear multicast filter only at device open, | |
939 | * so that lance_init_ring() called at any error will not | |
940 | * forget multicast filters. | |
941 | * | |
942 | * BTW it is common bug in all lance drivers! --ANK | |
943 | */ | |
944 | if (lp->pio_buffer) { | |
945 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
946 | sbus_writew(0, &ib->mode); | |
947 | sbus_writel(0, &ib->filter[0]); | |
948 | sbus_writel(0, &ib->filter[1]); | |
949 | } else { | |
950 | struct lance_init_block *ib = lp->init_block_mem; | |
951 | ib->mode = 0; | |
952 | ib->filter [0] = 0; | |
953 | ib->filter [1] = 0; | |
954 | } | |
955 | ||
956 | lp->init_ring(dev); | |
957 | load_csrs(lp); | |
958 | ||
959 | netif_start_queue(dev); | |
960 | ||
961 | status = init_restart_lance(lp); | |
962 | if (!status && lp->auto_select) { | |
963 | build_fake_packet(lp); | |
964 | sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); | |
965 | } | |
966 | ||
967 | return status; | |
968 | } | |
969 | ||
970 | static int lance_close(struct net_device *dev) | |
971 | { | |
972 | struct lance_private *lp = netdev_priv(dev); | |
973 | ||
974 | netif_stop_queue(dev); | |
975 | del_timer_sync(&lp->multicast_timer); | |
976 | ||
977 | STOP_LANCE(lp); | |
978 | ||
979 | free_irq(dev->irq, (void *) dev); | |
980 | return 0; | |
981 | } | |
982 | ||
983 | static int lance_reset(struct net_device *dev) | |
984 | { | |
985 | struct lance_private *lp = netdev_priv(dev); | |
986 | int status; | |
6aa20a22 | 987 | |
1da177e4 LT |
988 | STOP_LANCE(lp); |
989 | ||
990 | /* On the 4m, reset the dma too */ | |
991 | if (lp->dregs) { | |
992 | u32 csr, addr; | |
993 | ||
994 | printk(KERN_ERR "resetting ledma\n"); | |
995 | csr = sbus_readl(lp->dregs + DMA_CSR); | |
996 | sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); | |
997 | udelay(200); | |
998 | sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); | |
999 | ||
1000 | addr = lp->init_block_dvma & 0xff000000; | |
1001 | sbus_writel(addr, lp->dregs + DMA_TEST); | |
1002 | } | |
1003 | lp->init_ring(dev); | |
1004 | load_csrs(lp); | |
1ae5dc34 | 1005 | dev->trans_start = jiffies; /* prevent tx timeout */ |
1da177e4 LT |
1006 | status = init_restart_lance(lp); |
1007 | return status; | |
1008 | } | |
1009 | ||
1010 | static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len) | |
1011 | { | |
1012 | void __iomem *piobuf = dest; | |
1013 | u32 *p32; | |
1014 | u16 *p16; | |
1015 | u8 *p8; | |
1016 | ||
1017 | switch ((unsigned long)src & 0x3) { | |
1018 | case 0: | |
1019 | p32 = (u32 *) src; | |
1020 | while (len >= 4) { | |
1021 | sbus_writel(*p32, piobuf); | |
1022 | p32++; | |
1023 | piobuf += 4; | |
1024 | len -= 4; | |
1025 | } | |
1026 | src = (char *) p32; | |
1027 | break; | |
1028 | case 1: | |
1029 | case 3: | |
1030 | p8 = (u8 *) src; | |
1031 | while (len >= 4) { | |
1032 | u32 val; | |
1033 | ||
1034 | val = p8[0] << 24; | |
1035 | val |= p8[1] << 16; | |
1036 | val |= p8[2] << 8; | |
1037 | val |= p8[3]; | |
1038 | sbus_writel(val, piobuf); | |
1039 | p8 += 4; | |
1040 | piobuf += 4; | |
1041 | len -= 4; | |
1042 | } | |
1043 | src = (char *) p8; | |
1044 | break; | |
1045 | case 2: | |
1046 | p16 = (u16 *) src; | |
1047 | while (len >= 4) { | |
1048 | u32 val = p16[0]<<16 | p16[1]; | |
1049 | sbus_writel(val, piobuf); | |
1050 | p16 += 2; | |
1051 | piobuf += 4; | |
1052 | len -= 4; | |
1053 | } | |
1054 | src = (char *) p16; | |
1055 | break; | |
ee289b64 | 1056 | } |
1da177e4 LT |
1057 | if (len >= 2) { |
1058 | u16 val = src[0] << 8 | src[1]; | |
1059 | sbus_writew(val, piobuf); | |
1060 | src += 2; | |
1061 | piobuf += 2; | |
1062 | len -= 2; | |
1063 | } | |
1064 | if (len >= 1) | |
1065 | sbus_writeb(src[0], piobuf); | |
1066 | } | |
1067 | ||
1068 | static void lance_piozero(void __iomem *dest, int len) | |
1069 | { | |
1070 | void __iomem *piobuf = dest; | |
1071 | ||
1072 | if ((unsigned long)piobuf & 1) { | |
1073 | sbus_writeb(0, piobuf); | |
1074 | piobuf += 1; | |
1075 | len -= 1; | |
1076 | if (len == 0) | |
1077 | return; | |
1078 | } | |
1079 | if (len == 1) { | |
1080 | sbus_writeb(0, piobuf); | |
1081 | return; | |
1082 | } | |
1083 | if ((unsigned long)piobuf & 2) { | |
1084 | sbus_writew(0, piobuf); | |
1085 | piobuf += 2; | |
1086 | len -= 2; | |
1087 | if (len == 0) | |
1088 | return; | |
1089 | } | |
1090 | while (len >= 4) { | |
1091 | sbus_writel(0, piobuf); | |
1092 | piobuf += 4; | |
1093 | len -= 4; | |
1094 | } | |
1095 | if (len >= 2) { | |
1096 | sbus_writew(0, piobuf); | |
1097 | piobuf += 2; | |
1098 | len -= 2; | |
1099 | } | |
1100 | if (len >= 1) | |
1101 | sbus_writeb(0, piobuf); | |
1102 | } | |
1103 | ||
1104 | static void lance_tx_timeout(struct net_device *dev) | |
1105 | { | |
1106 | struct lance_private *lp = netdev_priv(dev); | |
1107 | ||
1108 | printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", | |
1109 | dev->name, sbus_readw(lp->lregs + RDP)); | |
1110 | lance_reset(dev); | |
1111 | netif_wake_queue(dev); | |
1112 | } | |
1113 | ||
1114 | static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
1115 | { | |
1116 | struct lance_private *lp = netdev_priv(dev); | |
1117 | int entry, skblen, len; | |
1118 | ||
1119 | skblen = skb->len; | |
1120 | ||
1121 | len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen; | |
1122 | ||
1123 | spin_lock_irq(&lp->lock); | |
1124 | ||
09f75cd7 | 1125 | dev->stats.tx_bytes += len; |
1da177e4 LT |
1126 | |
1127 | entry = lp->tx_new & TX_RING_MOD_MASK; | |
1128 | if (lp->pio_buffer) { | |
1129 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
1130 | sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length); | |
1131 | sbus_writew(0, &ib->btx_ring[entry].misc); | |
1132 | lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen); | |
1133 | if (len != skblen) | |
1134 | lance_piozero(&ib->tx_buf[entry][skblen], len - skblen); | |
1135 | sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); | |
1136 | } else { | |
1137 | struct lance_init_block *ib = lp->init_block_mem; | |
1138 | ib->btx_ring [entry].length = (-len) | 0xf000; | |
1139 | ib->btx_ring [entry].misc = 0; | |
d626f62b | 1140 | skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen); |
1da177e4 LT |
1141 | if (len != skblen) |
1142 | memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen); | |
1143 | ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN); | |
1144 | } | |
1145 | ||
1146 | lp->tx_new = TX_NEXT(entry); | |
1147 | ||
1148 | if (TX_BUFFS_AVAIL <= 0) | |
1149 | netif_stop_queue(dev); | |
1150 | ||
1151 | /* Kick the lance: transmit now */ | |
1152 | sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); | |
1153 | ||
1154 | /* Read back CSR to invalidate the E-Cache. | |
1155 | * This is needed, because DMA_DSBL_WR_INV is set. | |
1156 | */ | |
1157 | if (lp->dregs) | |
1158 | sbus_readw(lp->lregs + RDP); | |
1159 | ||
1160 | spin_unlock_irq(&lp->lock); | |
1161 | ||
1da177e4 | 1162 | dev_kfree_skb(skb); |
6aa20a22 | 1163 | |
6ed10654 | 1164 | return NETDEV_TX_OK; |
1da177e4 LT |
1165 | } |
1166 | ||
1da177e4 LT |
1167 | /* taken from the depca driver */ |
1168 | static void lance_load_multicast(struct net_device *dev) | |
1169 | { | |
1170 | struct lance_private *lp = netdev_priv(dev); | |
22bedad3 | 1171 | struct netdev_hw_addr *ha; |
1da177e4 LT |
1172 | u32 crc; |
1173 | u32 val; | |
6aa20a22 | 1174 | |
1da177e4 LT |
1175 | /* set all multicast bits */ |
1176 | if (dev->flags & IFF_ALLMULTI) | |
1177 | val = ~0; | |
1178 | else | |
1179 | val = 0; | |
1180 | ||
1181 | if (lp->pio_buffer) { | |
1182 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
1183 | sbus_writel(val, &ib->filter[0]); | |
1184 | sbus_writel(val, &ib->filter[1]); | |
1185 | } else { | |
1186 | struct lance_init_block *ib = lp->init_block_mem; | |
1187 | ib->filter [0] = val; | |
1188 | ib->filter [1] = val; | |
1189 | } | |
1190 | ||
1191 | if (dev->flags & IFF_ALLMULTI) | |
1192 | return; | |
6aa20a22 | 1193 | |
1da177e4 | 1194 | /* Add addresses */ |
22bedad3 | 1195 | netdev_for_each_mc_addr(ha, dev) { |
498d8e23 | 1196 | crc = ether_crc_le(6, ha->addr); |
1da177e4 LT |
1197 | crc = crc >> 26; |
1198 | if (lp->pio_buffer) { | |
1199 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
1200 | u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter; | |
1201 | u16 tmp = sbus_readw(&mcast_table[crc>>4]); | |
1202 | tmp |= 1 << (crc & 0xf); | |
1203 | sbus_writew(tmp, &mcast_table[crc>>4]); | |
1204 | } else { | |
1205 | struct lance_init_block *ib = lp->init_block_mem; | |
1206 | u16 *mcast_table = (u16 *) &ib->filter; | |
1207 | mcast_table [crc >> 4] |= 1 << (crc & 0xf); | |
1208 | } | |
1209 | } | |
1210 | } | |
1211 | ||
1212 | static void lance_set_multicast(struct net_device *dev) | |
1213 | { | |
1214 | struct lance_private *lp = netdev_priv(dev); | |
1215 | struct lance_init_block *ib_mem = lp->init_block_mem; | |
1216 | struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem; | |
1217 | u16 mode; | |
1218 | ||
1219 | if (!netif_running(dev)) | |
1220 | return; | |
1221 | ||
1222 | if (lp->tx_old != lp->tx_new) { | |
1223 | mod_timer(&lp->multicast_timer, jiffies + 4); | |
1224 | netif_wake_queue(dev); | |
1225 | return; | |
1226 | } | |
1227 | ||
1228 | netif_stop_queue(dev); | |
1229 | ||
1230 | STOP_LANCE(lp); | |
1231 | lp->init_ring(dev); | |
1232 | ||
1233 | if (lp->pio_buffer) | |
1234 | mode = sbus_readw(&ib_iomem->mode); | |
1235 | else | |
1236 | mode = ib_mem->mode; | |
1237 | if (dev->flags & IFF_PROMISC) { | |
1238 | mode |= LE_MO_PROM; | |
1239 | if (lp->pio_buffer) | |
1240 | sbus_writew(mode, &ib_iomem->mode); | |
1241 | else | |
1242 | ib_mem->mode = mode; | |
1243 | } else { | |
1244 | mode &= ~LE_MO_PROM; | |
1245 | if (lp->pio_buffer) | |
1246 | sbus_writew(mode, &ib_iomem->mode); | |
1247 | else | |
1248 | ib_mem->mode = mode; | |
1249 | lance_load_multicast(dev); | |
1250 | } | |
1251 | load_csrs(lp); | |
1252 | init_restart_lance(lp); | |
1253 | netif_wake_queue(dev); | |
1254 | } | |
1255 | ||
1256 | static void lance_set_multicast_retry(unsigned long _opaque) | |
1257 | { | |
1258 | struct net_device *dev = (struct net_device *) _opaque; | |
1259 | ||
1260 | lance_set_multicast(dev); | |
1261 | } | |
1262 | ||
1263 | static void lance_free_hwresources(struct lance_private *lp) | |
1264 | { | |
1265 | if (lp->lregs) | |
af736fed | 1266 | of_iounmap(&lp->op->resource[0], lp->lregs, LANCE_REG_SIZE); |
334ae614 | 1267 | if (lp->dregs) { |
2dc11581 | 1268 | struct platform_device *ledma = lp->ledma; |
334ae614 DM |
1269 | |
1270 | of_iounmap(&ledma->resource[0], lp->dregs, | |
1271 | resource_size(&ledma->resource[0])); | |
1272 | } | |
1da177e4 | 1273 | if (lp->init_block_iomem) { |
af736fed DM |
1274 | of_iounmap(&lp->lebuffer->resource[0], lp->init_block_iomem, |
1275 | sizeof(struct lance_init_block)); | |
1da177e4 | 1276 | } else if (lp->init_block_mem) { |
af736fed | 1277 | dma_free_coherent(&lp->op->dev, |
738f2b7b DM |
1278 | sizeof(struct lance_init_block), |
1279 | lp->init_block_mem, | |
1280 | lp->init_block_dvma); | |
1da177e4 LT |
1281 | } |
1282 | } | |
1283 | ||
1284 | /* Ethtool support... */ | |
1285 | static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |
1286 | { | |
7826d43f JP |
1287 | strlcpy(info->driver, "sunlance", sizeof(info->driver)); |
1288 | strlcpy(info->version, "2.02", sizeof(info->version)); | |
1da177e4 LT |
1289 | } |
1290 | ||
7282d491 | 1291 | static const struct ethtool_ops sparc_lance_ethtool_ops = { |
1da177e4 | 1292 | .get_drvinfo = sparc_lance_get_drvinfo, |
ed4ba4b5 | 1293 | .get_link = ethtool_op_get_link, |
1da177e4 LT |
1294 | }; |
1295 | ||
c7670718 DM |
1296 | static const struct net_device_ops sparc_lance_ops = { |
1297 | .ndo_open = lance_open, | |
1298 | .ndo_stop = lance_close, | |
1299 | .ndo_start_xmit = lance_start_xmit, | |
afc4b13d | 1300 | .ndo_set_rx_mode = lance_set_multicast, |
c7670718 | 1301 | .ndo_tx_timeout = lance_tx_timeout, |
dac4696a DM |
1302 | .ndo_change_mtu = eth_change_mtu, |
1303 | .ndo_set_mac_address = eth_mac_addr, | |
1304 | .ndo_validate_addr = eth_validate_addr, | |
c7670718 DM |
1305 | }; |
1306 | ||
0cb0568d | 1307 | static int sparc_lance_probe_one(struct platform_device *op, |
1dd06ae8 GKH |
1308 | struct platform_device *ledma, |
1309 | struct platform_device *lebuffer) | |
1da177e4 | 1310 | { |
61c7a080 | 1311 | struct device_node *dp = op->dev.of_node; |
1da177e4 | 1312 | static unsigned version_printed; |
1da177e4 | 1313 | struct lance_private *lp; |
af736fed | 1314 | struct net_device *dev; |
af736fed | 1315 | int i; |
1da177e4 LT |
1316 | |
1317 | dev = alloc_etherdev(sizeof(struct lance_private) + 8); | |
1318 | if (!dev) | |
1319 | return -ENOMEM; | |
1320 | ||
1321 | lp = netdev_priv(dev); | |
1da177e4 LT |
1322 | |
1323 | if (sparc_lance_debug && version_printed++ == 0) | |
1324 | printk (KERN_INFO "%s", version); | |
1325 | ||
1326 | spin_lock_init(&lp->lock); | |
1327 | ||
1328 | /* Copy the IDPROM ethernet address to the device structure, later we | |
1329 | * will copy the address in the device structure to the lance | |
1330 | * initialization block. | |
1331 | */ | |
1332 | for (i = 0; i < 6; i++) | |
1333 | dev->dev_addr[i] = idprom->id_ethaddr[i]; | |
1334 | ||
1335 | /* Get the IO region */ | |
af736fed DM |
1336 | lp->lregs = of_ioremap(&op->resource[0], 0, |
1337 | LANCE_REG_SIZE, lancestr); | |
1da177e4 LT |
1338 | if (!lp->lregs) { |
1339 | printk(KERN_ERR "SunLance: Cannot map registers.\n"); | |
1340 | goto fail; | |
1341 | } | |
1342 | ||
334ae614 DM |
1343 | lp->ledma = ledma; |
1344 | if (lp->ledma) { | |
1345 | lp->dregs = of_ioremap(&ledma->resource[0], 0, | |
1346 | resource_size(&ledma->resource[0]), | |
1347 | "ledma"); | |
1348 | if (!lp->dregs) { | |
1349 | printk(KERN_ERR "SunLance: Cannot map " | |
1350 | "ledma registers.\n"); | |
1351 | goto fail; | |
1352 | } | |
1353 | } | |
1354 | ||
af736fed DM |
1355 | lp->op = op; |
1356 | lp->lebuffer = lebuffer; | |
1da177e4 LT |
1357 | if (lebuffer) { |
1358 | /* sanity check */ | |
1359 | if (lebuffer->resource[0].start & 7) { | |
1360 | printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n"); | |
1361 | goto fail; | |
1362 | } | |
1363 | lp->init_block_iomem = | |
af736fed DM |
1364 | of_ioremap(&lebuffer->resource[0], 0, |
1365 | sizeof(struct lance_init_block), "lebuffer"); | |
1da177e4 LT |
1366 | if (!lp->init_block_iomem) { |
1367 | printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n"); | |
1368 | goto fail; | |
1369 | } | |
1370 | lp->init_block_dvma = 0; | |
1371 | lp->pio_buffer = 1; | |
1372 | lp->init_ring = lance_init_ring_pio; | |
1373 | lp->rx = lance_rx_pio; | |
1374 | lp->tx = lance_tx_pio; | |
1375 | } else { | |
1376 | lp->init_block_mem = | |
af736fed | 1377 | dma_alloc_coherent(&op->dev, |
738f2b7b DM |
1378 | sizeof(struct lance_init_block), |
1379 | &lp->init_block_dvma, GFP_ATOMIC); | |
af736fed | 1380 | if (!lp->init_block_mem) { |
1da177e4 LT |
1381 | printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n"); |
1382 | goto fail; | |
1383 | } | |
1384 | lp->pio_buffer = 0; | |
1385 | lp->init_ring = lance_init_ring_dvma; | |
1386 | lp->rx = lance_rx_dvma; | |
1387 | lp->tx = lance_tx_dvma; | |
1388 | } | |
76fcdb30 DM |
1389 | lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval", |
1390 | (LE_C3_BSWP | | |
1391 | LE_C3_ACON | | |
1392 | LE_C3_BCON)); | |
1da177e4 LT |
1393 | |
1394 | lp->name = lancestr; | |
1da177e4 LT |
1395 | |
1396 | lp->burst_sizes = 0; | |
1397 | if (lp->ledma) { | |
61c7a080 | 1398 | struct device_node *ledma_dp = ledma->dev.of_node; |
af736fed | 1399 | struct device_node *sbus_dp; |
1da177e4 | 1400 | unsigned int sbmask; |
af736fed | 1401 | const char *prop; |
1da177e4 LT |
1402 | u32 csr; |
1403 | ||
1404 | /* Find burst-size property for ledma */ | |
76fcdb30 DM |
1405 | lp->burst_sizes = of_getintprop_default(ledma_dp, |
1406 | "burst-sizes", 0); | |
1da177e4 LT |
1407 | |
1408 | /* ledma may be capable of fast bursts, but sbus may not. */ | |
af736fed DM |
1409 | sbus_dp = ledma_dp->parent; |
1410 | sbmask = of_getintprop_default(sbus_dp, "burst-sizes", | |
76fcdb30 | 1411 | DMA_BURSTBITS); |
1da177e4 LT |
1412 | lp->burst_sizes &= sbmask; |
1413 | ||
1414 | /* Get the cable-selection property */ | |
76fcdb30 DM |
1415 | prop = of_get_property(ledma_dp, "cable-selection", NULL); |
1416 | if (!prop || prop[0] == '\0') { | |
1417 | struct device_node *nd; | |
1da177e4 | 1418 | |
76fcdb30 DM |
1419 | printk(KERN_INFO "SunLance: using " |
1420 | "auto-carrier-detection.\n"); | |
1da177e4 | 1421 | |
76fcdb30 | 1422 | nd = of_find_node_by_path("/options"); |
1da177e4 LT |
1423 | if (!nd) |
1424 | goto no_link_test; | |
1425 | ||
76fcdb30 DM |
1426 | prop = of_get_property(nd, "tpe-link-test?", NULL); |
1427 | if (!prop) | |
1da177e4 LT |
1428 | goto no_link_test; |
1429 | ||
1da177e4 LT |
1430 | if (strcmp(prop, "true")) { |
1431 | printk(KERN_NOTICE "SunLance: warning: overriding option " | |
1432 | "'tpe-link-test?'\n"); | |
1433 | printk(KERN_NOTICE "SunLance: warning: mail any problems " | |
1434 | "to ecd@skynet.be\n"); | |
1435 | auxio_set_lte(AUXIO_LTE_ON); | |
1436 | } | |
1437 | no_link_test: | |
1438 | lp->auto_select = 1; | |
1439 | lp->tpe = 0; | |
1440 | } else if (!strcmp(prop, "aui")) { | |
1441 | lp->auto_select = 0; | |
1442 | lp->tpe = 0; | |
1443 | } else { | |
1444 | lp->auto_select = 0; | |
1445 | lp->tpe = 1; | |
1446 | } | |
1447 | ||
1da177e4 LT |
1448 | /* Reset ledma */ |
1449 | csr = sbus_readl(lp->dregs + DMA_CSR); | |
1450 | sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); | |
1451 | udelay(200); | |
1452 | sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); | |
1453 | } else | |
1454 | lp->dregs = NULL; | |
1455 | ||
1456 | lp->dev = dev; | |
af736fed | 1457 | SET_NETDEV_DEV(dev, &op->dev); |
1da177e4 | 1458 | dev->watchdog_timeo = 5*HZ; |
1da177e4 | 1459 | dev->ethtool_ops = &sparc_lance_ethtool_ops; |
c7670718 | 1460 | dev->netdev_ops = &sparc_lance_ops; |
1da177e4 | 1461 | |
1636f8ac | 1462 | dev->irq = op->archdata.irqs[0]; |
1da177e4 LT |
1463 | |
1464 | /* We cannot sleep if the chip is busy during a | |
1465 | * multicast list update event, because such events | |
1466 | * can occur from interrupts (ex. IPv6). So we | |
1467 | * use a timer to try again later when necessary. -DaveM | |
1468 | */ | |
1469 | init_timer(&lp->multicast_timer); | |
1470 | lp->multicast_timer.data = (unsigned long) dev; | |
c061b18d | 1471 | lp->multicast_timer.function = lance_set_multicast_retry; |
1da177e4 LT |
1472 | |
1473 | if (register_netdev(dev)) { | |
1474 | printk(KERN_ERR "SunLance: Cannot register device.\n"); | |
1475 | goto fail; | |
1476 | } | |
1477 | ||
af736fed | 1478 | dev_set_drvdata(&op->dev, lp); |
1da177e4 | 1479 | |
e174961c JB |
1480 | printk(KERN_INFO "%s: LANCE %pM\n", |
1481 | dev->name, dev->dev_addr); | |
1da177e4 LT |
1482 | |
1483 | return 0; | |
1484 | ||
1485 | fail: | |
1486 | lance_free_hwresources(lp); | |
1487 | free_netdev(dev); | |
1488 | return -ENODEV; | |
1489 | } | |
1490 | ||
0cb0568d | 1491 | static int sunlance_sbus_probe(struct platform_device *op) |
1da177e4 | 1492 | { |
2dc11581 | 1493 | struct platform_device *parent = to_platform_device(op->dev.parent); |
61c7a080 | 1494 | struct device_node *parent_dp = parent->dev.of_node; |
c2d81e63 DM |
1495 | int err; |
1496 | ||
af736fed DM |
1497 | if (!strcmp(parent_dp->name, "ledma")) { |
1498 | err = sparc_lance_probe_one(op, parent, NULL); | |
1499 | } else if (!strcmp(parent_dp->name, "lebuffer")) { | |
1500 | err = sparc_lance_probe_one(op, NULL, parent); | |
404dda85 | 1501 | } else |
af736fed | 1502 | err = sparc_lance_probe_one(op, NULL, NULL); |
c2d81e63 DM |
1503 | |
1504 | return err; | |
1505 | } | |
1506 | ||
0cb0568d | 1507 | static int sunlance_sbus_remove(struct platform_device *op) |
c2d81e63 | 1508 | { |
af736fed | 1509 | struct lance_private *lp = dev_get_drvdata(&op->dev); |
c2d81e63 DM |
1510 | struct net_device *net_dev = lp->dev; |
1511 | ||
9f9b6693 | 1512 | unregister_netdev(net_dev); |
c2d81e63 DM |
1513 | |
1514 | lance_free_hwresources(lp); | |
1515 | ||
1516 | free_netdev(net_dev); | |
1517 | ||
af736fed | 1518 | dev_set_drvdata(&op->dev, NULL); |
c2d81e63 DM |
1519 | |
1520 | return 0; | |
1521 | } | |
1522 | ||
fd098316 | 1523 | static const struct of_device_id sunlance_sbus_match[] = { |
c2d81e63 DM |
1524 | { |
1525 | .name = "le", | |
1526 | }, | |
c2d81e63 DM |
1527 | {}, |
1528 | }; | |
1529 | ||
1530 | MODULE_DEVICE_TABLE(of, sunlance_sbus_match); | |
1531 | ||
74888760 | 1532 | static struct platform_driver sunlance_sbus_driver = { |
4018294b GL |
1533 | .driver = { |
1534 | .name = "sunlance", | |
1535 | .owner = THIS_MODULE, | |
1536 | .of_match_table = sunlance_sbus_match, | |
1537 | }, | |
c2d81e63 | 1538 | .probe = sunlance_sbus_probe, |
0cb0568d | 1539 | .remove = sunlance_sbus_remove, |
c2d81e63 DM |
1540 | }; |
1541 | ||
db62f684 | 1542 | module_platform_driver(sunlance_sbus_driver); |