]>
Commit | Line | Data |
---|---|---|
c5aa9e3b LT |
1 | /* |
2 | * AMD 10Gb Ethernet driver | |
3 | * | |
4 | * This file is available to you under your choice of the following two | |
5 | * licenses: | |
6 | * | |
7 | * License 1: GPLv2 | |
8 | * | |
9 | * Copyright (c) 2014 Advanced Micro Devices, Inc. | |
10 | * | |
11 | * This file is free software; you may copy, redistribute and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation, either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | * | |
16 | * This file is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
23 | * | |
24 | * This file incorporates work covered by the following copyright and | |
25 | * permission notice: | |
26 | * The Synopsys DWC ETHER XGMAC Software Driver and documentation | |
27 | * (hereinafter "Software") is an unsupported proprietary work of Synopsys, | |
28 | * Inc. unless otherwise expressly agreed to in writing between Synopsys | |
29 | * and you. | |
30 | * | |
31 | * The Software IS NOT an item of Licensed Software or Licensed Product | |
32 | * under any End User Software License Agreement or Agreement for Licensed | |
33 | * Product with Synopsys or any supplement thereto. Permission is hereby | |
34 | * granted, free of charge, to any person obtaining a copy of this software | |
35 | * annotated with this license and the Software, to deal in the Software | |
36 | * without restriction, including without limitation the rights to use, | |
37 | * copy, modify, merge, publish, distribute, sublicense, and/or sell copies | |
38 | * of the Software, and to permit persons to whom the Software is furnished | |
39 | * to do so, subject to the following conditions: | |
40 | * | |
41 | * The above copyright notice and this permission notice shall be included | |
42 | * in all copies or substantial portions of the Software. | |
43 | * | |
44 | * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" | |
45 | * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | |
46 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A | |
47 | * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS | |
48 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
49 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
50 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
51 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
52 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
53 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF | |
54 | * THE POSSIBILITY OF SUCH DAMAGE. | |
55 | * | |
56 | * | |
57 | * License 2: Modified BSD | |
58 | * | |
59 | * Copyright (c) 2014 Advanced Micro Devices, Inc. | |
60 | * All rights reserved. | |
61 | * | |
62 | * Redistribution and use in source and binary forms, with or without | |
63 | * modification, are permitted provided that the following conditions are met: | |
64 | * * Redistributions of source code must retain the above copyright | |
65 | * notice, this list of conditions and the following disclaimer. | |
66 | * * Redistributions in binary form must reproduce the above copyright | |
67 | * notice, this list of conditions and the following disclaimer in the | |
68 | * documentation and/or other materials provided with the distribution. | |
69 | * * Neither the name of Advanced Micro Devices, Inc. nor the | |
70 | * names of its contributors may be used to endorse or promote products | |
71 | * derived from this software without specific prior written permission. | |
72 | * | |
73 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
74 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
75 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
76 | * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY | |
77 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | |
78 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
79 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | |
80 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
81 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
82 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
83 | * | |
84 | * This file incorporates work covered by the following copyright and | |
85 | * permission notice: | |
86 | * The Synopsys DWC ETHER XGMAC Software Driver and documentation | |
87 | * (hereinafter "Software") is an unsupported proprietary work of Synopsys, | |
88 | * Inc. unless otherwise expressly agreed to in writing between Synopsys | |
89 | * and you. | |
90 | * | |
91 | * The Software IS NOT an item of Licensed Software or Licensed Product | |
92 | * under any End User Software License Agreement or Agreement for Licensed | |
93 | * Product with Synopsys or any supplement thereto. Permission is hereby | |
94 | * granted, free of charge, to any person obtaining a copy of this software | |
95 | * annotated with this license and the Software, to deal in the Software | |
96 | * without restriction, including without limitation the rights to use, | |
97 | * copy, modify, merge, publish, distribute, sublicense, and/or sell copies | |
98 | * of the Software, and to permit persons to whom the Software is furnished | |
99 | * to do so, subject to the following conditions: | |
100 | * | |
101 | * The above copyright notice and this permission notice shall be included | |
102 | * in all copies or substantial portions of the Software. | |
103 | * | |
104 | * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" | |
105 | * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | |
106 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A | |
107 | * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS | |
108 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
109 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
110 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
111 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
112 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
113 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF | |
114 | * THE POSSIBILITY OF SUCH DAMAGE. | |
115 | */ | |
116 | ||
117 | #include <linux/module.h> | |
118 | #include <linux/device.h> | |
119 | #include <linux/platform_device.h> | |
120 | #include <linux/spinlock.h> | |
121 | #include <linux/netdevice.h> | |
122 | #include <linux/etherdevice.h> | |
123 | #include <linux/io.h> | |
124 | #include <linux/of.h> | |
125 | #include <linux/of_net.h> | |
82a19035 | 126 | #include <linux/of_address.h> |
c5aa9e3b | 127 | #include <linux/clk.h> |
82a19035 LT |
128 | #include <linux/property.h> |
129 | #include <linux/acpi.h> | |
c5aa9e3b LT |
130 | |
131 | #include "xgbe.h" | |
132 | #include "xgbe-common.h" | |
133 | ||
c5aa9e3b LT |
134 | MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>"); |
135 | MODULE_LICENSE("Dual BSD/GPL"); | |
136 | MODULE_VERSION(XGBE_DRV_VERSION); | |
137 | MODULE_DESCRIPTION(XGBE_DRV_DESC); | |
138 | ||
c5aa9e3b LT |
139 | static void xgbe_default_config(struct xgbe_prv_data *pdata) |
140 | { | |
141 | DBGPR("-->xgbe_default_config\n"); | |
142 | ||
143 | pdata->pblx8 = DMA_PBL_X8_ENABLE; | |
144 | pdata->tx_sf_mode = MTL_TSF_ENABLE; | |
145 | pdata->tx_threshold = MTL_TX_THRESHOLD_64; | |
146 | pdata->tx_pbl = DMA_PBL_16; | |
147 | pdata->tx_osp_mode = DMA_OSP_ENABLE; | |
148 | pdata->rx_sf_mode = MTL_RSF_DISABLE; | |
149 | pdata->rx_threshold = MTL_RX_THRESHOLD_64; | |
150 | pdata->rx_pbl = DMA_PBL_16; | |
151 | pdata->pause_autoneg = 1; | |
152 | pdata->tx_pause = 1; | |
153 | pdata->rx_pause = 1; | |
916102c6 | 154 | pdata->phy_speed = SPEED_UNKNOWN; |
c5aa9e3b LT |
155 | pdata->power_down = 0; |
156 | pdata->default_autoneg = AUTONEG_ENABLE; | |
157 | pdata->default_speed = SPEED_10000; | |
158 | ||
159 | DBGPR("<--xgbe_default_config\n"); | |
160 | } | |
161 | ||
162 | static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata) | |
163 | { | |
164 | xgbe_init_function_ptrs_dev(&pdata->hw_if); | |
165 | xgbe_init_function_ptrs_desc(&pdata->desc_if); | |
166 | } | |
167 | ||
82a19035 LT |
168 | #ifdef CONFIG_ACPI |
169 | static int xgbe_acpi_support(struct xgbe_prv_data *pdata) | |
170 | { | |
82a19035 LT |
171 | struct device *dev = pdata->dev; |
172 | u32 property; | |
82a19035 LT |
173 | int ret; |
174 | ||
175 | /* Obtain the system clock setting */ | |
176 | ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &property); | |
177 | if (ret) { | |
178 | dev_err(dev, "unable to obtain %s property\n", | |
179 | XGBE_ACPI_DMA_FREQ); | |
180 | return ret; | |
181 | } | |
182 | pdata->sysclk_rate = property; | |
183 | ||
184 | /* Obtain the PTP clock setting */ | |
185 | ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &property); | |
186 | if (ret) { | |
187 | dev_err(dev, "unable to obtain %s property\n", | |
188 | XGBE_ACPI_PTP_FREQ); | |
189 | return ret; | |
190 | } | |
191 | pdata->ptpclk_rate = property; | |
192 | ||
82a19035 LT |
193 | return 0; |
194 | } | |
195 | #else /* CONFIG_ACPI */ | |
196 | static int xgbe_acpi_support(struct xgbe_prv_data *pdata) | |
197 | { | |
198 | return -EINVAL; | |
199 | } | |
200 | #endif /* CONFIG_ACPI */ | |
201 | ||
202 | #ifdef CONFIG_OF | |
203 | static int xgbe_of_support(struct xgbe_prv_data *pdata) | |
204 | { | |
205 | struct device *dev = pdata->dev; | |
206 | ||
207 | /* Obtain the system clock setting */ | |
208 | pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK); | |
209 | if (IS_ERR(pdata->sysclk)) { | |
210 | dev_err(dev, "dma devm_clk_get failed\n"); | |
211 | return PTR_ERR(pdata->sysclk); | |
212 | } | |
213 | pdata->sysclk_rate = clk_get_rate(pdata->sysclk); | |
214 | ||
215 | /* Obtain the PTP clock setting */ | |
216 | pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK); | |
217 | if (IS_ERR(pdata->ptpclk)) { | |
218 | dev_err(dev, "ptp devm_clk_get failed\n"); | |
219 | return PTR_ERR(pdata->ptpclk); | |
220 | } | |
221 | pdata->ptpclk_rate = clk_get_rate(pdata->ptpclk); | |
222 | ||
82a19035 LT |
223 | return 0; |
224 | } | |
225 | #else /* CONFIG_OF */ | |
226 | static int xgbe_of_support(struct xgbe_prv_data *pdata) | |
227 | { | |
228 | return -EINVAL; | |
229 | } | |
230 | #endif /*CONFIG_OF */ | |
231 | ||
c5aa9e3b LT |
232 | static int xgbe_probe(struct platform_device *pdev) |
233 | { | |
234 | struct xgbe_prv_data *pdata; | |
235 | struct xgbe_hw_if *hw_if; | |
236 | struct xgbe_desc_if *desc_if; | |
237 | struct net_device *netdev; | |
238 | struct device *dev = &pdev->dev; | |
239 | struct resource *res; | |
82a19035 | 240 | const char *phy_mode; |
5b9dfe29 | 241 | unsigned int i; |
c5aa9e3b LT |
242 | int ret; |
243 | ||
244 | DBGPR("--> xgbe_probe\n"); | |
245 | ||
246 | netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data), | |
d5c48582 | 247 | XGBE_MAX_DMA_CHANNELS); |
c5aa9e3b LT |
248 | if (!netdev) { |
249 | dev_err(dev, "alloc_etherdev failed\n"); | |
250 | ret = -ENOMEM; | |
251 | goto err_alloc; | |
252 | } | |
253 | SET_NETDEV_DEV(netdev, dev); | |
254 | pdata = netdev_priv(netdev); | |
255 | pdata->netdev = netdev; | |
256 | pdata->pdev = pdev; | |
82a19035 | 257 | pdata->adev = ACPI_COMPANION(dev); |
c5aa9e3b LT |
258 | pdata->dev = dev; |
259 | platform_set_drvdata(pdev, netdev); | |
260 | ||
261 | spin_lock_init(&pdata->lock); | |
262 | mutex_init(&pdata->xpcs_mutex); | |
5b9dfe29 | 263 | mutex_init(&pdata->rss_mutex); |
23e4eef7 | 264 | spin_lock_init(&pdata->tstamp_lock); |
c5aa9e3b | 265 | |
82a19035 LT |
266 | /* Check if we should use ACPI or DT */ |
267 | pdata->use_acpi = (!pdata->adev || acpi_disabled) ? 0 : 1; | |
268 | ||
c5aa9e3b | 269 | /* Set and validate the number of descriptors for a ring */ |
d0a8ba6c LT |
270 | BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT); |
271 | pdata->tx_desc_count = XGBE_TX_DESC_CNT; | |
c5aa9e3b LT |
272 | if (pdata->tx_desc_count & (pdata->tx_desc_count - 1)) { |
273 | dev_err(dev, "tx descriptor count (%d) is not valid\n", | |
274 | pdata->tx_desc_count); | |
275 | ret = -EINVAL; | |
276 | goto err_io; | |
277 | } | |
d0a8ba6c LT |
278 | BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT); |
279 | pdata->rx_desc_count = XGBE_RX_DESC_CNT; | |
c5aa9e3b LT |
280 | if (pdata->rx_desc_count & (pdata->rx_desc_count - 1)) { |
281 | dev_err(dev, "rx descriptor count (%d) is not valid\n", | |
282 | pdata->rx_desc_count); | |
283 | ret = -EINVAL; | |
284 | goto err_io; | |
285 | } | |
286 | ||
c5aa9e3b LT |
287 | /* Obtain the mmio areas for the device */ |
288 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
289 | pdata->xgmac_regs = devm_ioremap_resource(dev, res); | |
290 | if (IS_ERR(pdata->xgmac_regs)) { | |
291 | dev_err(dev, "xgmac ioremap failed\n"); | |
292 | ret = PTR_ERR(pdata->xgmac_regs); | |
293 | goto err_io; | |
294 | } | |
295 | DBGPR(" xgmac_regs = %p\n", pdata->xgmac_regs); | |
296 | ||
297 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
298 | pdata->xpcs_regs = devm_ioremap_resource(dev, res); | |
299 | if (IS_ERR(pdata->xpcs_regs)) { | |
300 | dev_err(dev, "xpcs ioremap failed\n"); | |
301 | ret = PTR_ERR(pdata->xpcs_regs); | |
302 | goto err_io; | |
303 | } | |
304 | DBGPR(" xpcs_regs = %p\n", pdata->xpcs_regs); | |
305 | ||
82a19035 LT |
306 | /* Retrieve the MAC address */ |
307 | ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY, | |
308 | pdata->mac_addr, | |
309 | sizeof(pdata->mac_addr)); | |
310 | if (ret || !is_valid_ether_addr(pdata->mac_addr)) { | |
311 | dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY); | |
312 | if (!ret) | |
313 | ret = -EINVAL; | |
f3d0e78d LT |
314 | goto err_io; |
315 | } | |
c5aa9e3b | 316 | |
82a19035 LT |
317 | /* Retrieve the PHY mode - it must be "xgmii" */ |
318 | ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY, | |
319 | &phy_mode); | |
320 | if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) { | |
321 | dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY); | |
322 | if (!ret) | |
323 | ret = -EINVAL; | |
324 | goto err_io; | |
325 | } | |
326 | pdata->phy_mode = PHY_INTERFACE_MODE_XGMII; | |
327 | ||
328 | /* Check for per channel interrupt support */ | |
329 | if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY)) | |
330 | pdata->per_channel_irq = 1; | |
331 | ||
332 | /* Obtain device settings unique to ACPI/OF */ | |
333 | if (pdata->use_acpi) | |
334 | ret = xgbe_acpi_support(pdata); | |
335 | else | |
336 | ret = xgbe_of_support(pdata); | |
337 | if (ret) | |
338 | goto err_io; | |
339 | ||
340 | /* Set the DMA coherency values */ | |
c9a49642 | 341 | pdata->coherent = device_dma_is_coherent(pdata->dev); |
82a19035 | 342 | if (pdata->coherent) { |
cfa50c78 LT |
343 | pdata->axdomain = XGBE_DMA_OS_AXDOMAIN; |
344 | pdata->arcache = XGBE_DMA_OS_ARCACHE; | |
345 | pdata->awcache = XGBE_DMA_OS_AWCACHE; | |
346 | } else { | |
347 | pdata->axdomain = XGBE_DMA_SYS_AXDOMAIN; | |
348 | pdata->arcache = XGBE_DMA_SYS_ARCACHE; | |
349 | pdata->awcache = XGBE_DMA_SYS_AWCACHE; | |
350 | } | |
351 | ||
82a19035 | 352 | /* Get the device interrupt */ |
c5aa9e3b LT |
353 | ret = platform_get_irq(pdev, 0); |
354 | if (ret < 0) { | |
9227dc5e | 355 | dev_err(dev, "platform_get_irq 0 failed\n"); |
c5aa9e3b LT |
356 | goto err_io; |
357 | } | |
9227dc5e LT |
358 | pdata->dev_irq = ret; |
359 | ||
360 | netdev->irq = pdata->dev_irq; | |
c5aa9e3b | 361 | netdev->base_addr = (unsigned long)pdata->xgmac_regs; |
82a19035 | 362 | memcpy(netdev->dev_addr, pdata->mac_addr, netdev->addr_len); |
c5aa9e3b LT |
363 | |
364 | /* Set all the function pointers */ | |
365 | xgbe_init_all_fptrs(pdata); | |
366 | hw_if = &pdata->hw_if; | |
367 | desc_if = &pdata->desc_if; | |
368 | ||
369 | /* Issue software reset to device */ | |
370 | hw_if->exit(pdata); | |
371 | ||
372 | /* Populate the hardware features */ | |
373 | xgbe_get_all_hw_features(pdata); | |
374 | ||
c5aa9e3b LT |
375 | /* Set default configuration data */ |
376 | xgbe_default_config(pdata); | |
377 | ||
386d325d LT |
378 | /* Set the DMA mask */ |
379 | if (!dev->dma_mask) | |
380 | dev->dma_mask = &dev->coherent_dma_mask; | |
381 | ret = dma_set_mask_and_coherent(dev, | |
382 | DMA_BIT_MASK(pdata->hw_feat.dma_width)); | |
383 | if (ret) { | |
384 | dev_err(dev, "dma_set_mask_and_coherent failed\n"); | |
385 | goto err_io; | |
386 | } | |
387 | ||
853eb16b LT |
388 | /* Calculate the number of Tx and Rx rings to be created |
389 | * -Tx (DMA) Channels map 1-to-1 to Tx Queues so set | |
390 | * the number of Tx queues to the number of Tx channels | |
391 | * enabled | |
392 | * -Rx (DMA) Channels do not map 1-to-1 so use the actual | |
393 | * number of Rx queues | |
394 | */ | |
c5aa9e3b LT |
395 | pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(), |
396 | pdata->hw_feat.tx_ch_cnt); | |
853eb16b | 397 | pdata->tx_q_count = pdata->tx_ring_count; |
332cfc82 WY |
398 | ret = netif_set_real_num_tx_queues(netdev, pdata->tx_ring_count); |
399 | if (ret) { | |
c5aa9e3b LT |
400 | dev_err(dev, "error setting real tx queue count\n"); |
401 | goto err_io; | |
402 | } | |
403 | ||
404 | pdata->rx_ring_count = min_t(unsigned int, | |
405 | netif_get_num_default_rss_queues(), | |
406 | pdata->hw_feat.rx_ch_cnt); | |
853eb16b | 407 | pdata->rx_q_count = pdata->hw_feat.rx_q_cnt; |
c5aa9e3b LT |
408 | ret = netif_set_real_num_rx_queues(netdev, pdata->rx_ring_count); |
409 | if (ret) { | |
410 | dev_err(dev, "error setting real rx queue count\n"); | |
411 | goto err_io; | |
412 | } | |
413 | ||
5b9dfe29 | 414 | /* Initialize RSS hash key and lookup table */ |
b2306303 | 415 | netdev_rss_key_fill(pdata->rss_key, sizeof(pdata->rss_key)); |
5b9dfe29 LT |
416 | |
417 | for (i = 0; i < XGBE_RSS_MAX_TABLE_SIZE; i++) | |
418 | XGMAC_SET_BITS(pdata->rss_table[i], MAC_RSSDR, DMCH, | |
419 | i % pdata->rx_ring_count); | |
420 | ||
421 | XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, IP2TE, 1); | |
422 | XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, TCP4TE, 1); | |
423 | XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, UDP4TE, 1); | |
424 | ||
c5aa9e3b LT |
425 | /* Prepare to regsiter with MDIO */ |
426 | pdata->mii_bus_id = kasprintf(GFP_KERNEL, "%s", pdev->name); | |
427 | if (!pdata->mii_bus_id) { | |
428 | dev_err(dev, "failed to allocate mii bus id\n"); | |
429 | ret = -ENOMEM; | |
430 | goto err_io; | |
431 | } | |
432 | ret = xgbe_mdio_register(pdata); | |
433 | if (ret) | |
434 | goto err_bus_id; | |
435 | ||
fca2d994 | 436 | /* Set device operations */ |
c5aa9e3b LT |
437 | netdev->netdev_ops = xgbe_get_netdev_ops(); |
438 | netdev->ethtool_ops = xgbe_get_ethtool_ops(); | |
fca2d994 LT |
439 | #ifdef CONFIG_AMD_XGBE_DCB |
440 | netdev->dcbnl_ops = xgbe_get_dcbnl_ops(); | |
441 | #endif | |
c5aa9e3b LT |
442 | |
443 | /* Set device features */ | |
444 | netdev->hw_features = NETIF_F_SG | | |
445 | NETIF_F_IP_CSUM | | |
446 | NETIF_F_IPV6_CSUM | | |
447 | NETIF_F_RXCSUM | | |
448 | NETIF_F_TSO | | |
449 | NETIF_F_TSO6 | | |
450 | NETIF_F_GRO | | |
451 | NETIF_F_HW_VLAN_CTAG_RX | | |
801c62d9 LT |
452 | NETIF_F_HW_VLAN_CTAG_TX | |
453 | NETIF_F_HW_VLAN_CTAG_FILTER; | |
c5aa9e3b | 454 | |
5b9dfe29 LT |
455 | if (pdata->hw_feat.rss) |
456 | netdev->hw_features |= NETIF_F_RXHASH; | |
457 | ||
c5aa9e3b LT |
458 | netdev->vlan_features |= NETIF_F_SG | |
459 | NETIF_F_IP_CSUM | | |
460 | NETIF_F_IPV6_CSUM | | |
461 | NETIF_F_TSO | | |
462 | NETIF_F_TSO6; | |
463 | ||
464 | netdev->features |= netdev->hw_features; | |
465 | pdata->netdev_features = netdev->features; | |
466 | ||
b85e4d89 LT |
467 | netdev->priv_flags |= IFF_UNICAST_FLT; |
468 | ||
a8373f1a LT |
469 | /* Use default watchdog timeout */ |
470 | netdev->watchdog_timeo = 0; | |
471 | ||
c5aa9e3b LT |
472 | xgbe_init_rx_coalesce(pdata); |
473 | xgbe_init_tx_coalesce(pdata); | |
474 | ||
475 | netif_carrier_off(netdev); | |
476 | ret = register_netdev(netdev); | |
477 | if (ret) { | |
478 | dev_err(dev, "net device registration failed\n"); | |
479 | goto err_reg_netdev; | |
480 | } | |
481 | ||
23e4eef7 LT |
482 | xgbe_ptp_register(pdata); |
483 | ||
c5aa9e3b LT |
484 | xgbe_debugfs_init(pdata); |
485 | ||
486 | netdev_notice(netdev, "net device enabled\n"); | |
487 | ||
488 | DBGPR("<-- xgbe_probe\n"); | |
489 | ||
490 | return 0; | |
491 | ||
492 | err_reg_netdev: | |
493 | xgbe_mdio_unregister(pdata); | |
494 | ||
495 | err_bus_id: | |
496 | kfree(pdata->mii_bus_id); | |
497 | ||
498 | err_io: | |
499 | free_netdev(netdev); | |
500 | ||
501 | err_alloc: | |
502 | dev_notice(dev, "net device not enabled\n"); | |
503 | ||
504 | return ret; | |
505 | } | |
506 | ||
507 | static int xgbe_remove(struct platform_device *pdev) | |
508 | { | |
509 | struct net_device *netdev = platform_get_drvdata(pdev); | |
510 | struct xgbe_prv_data *pdata = netdev_priv(netdev); | |
511 | ||
512 | DBGPR("-->xgbe_remove\n"); | |
513 | ||
514 | xgbe_debugfs_exit(pdata); | |
515 | ||
23e4eef7 LT |
516 | xgbe_ptp_unregister(pdata); |
517 | ||
c5aa9e3b LT |
518 | unregister_netdev(netdev); |
519 | ||
520 | xgbe_mdio_unregister(pdata); | |
521 | ||
522 | kfree(pdata->mii_bus_id); | |
523 | ||
524 | free_netdev(netdev); | |
525 | ||
526 | DBGPR("<--xgbe_remove\n"); | |
527 | ||
528 | return 0; | |
529 | } | |
530 | ||
531 | #ifdef CONFIG_PM | |
532 | static int xgbe_suspend(struct device *dev) | |
533 | { | |
534 | struct net_device *netdev = dev_get_drvdata(dev); | |
535 | int ret; | |
536 | ||
537 | DBGPR("-->xgbe_suspend\n"); | |
538 | ||
539 | if (!netif_running(netdev)) { | |
540 | DBGPR("<--xgbe_dev_suspend\n"); | |
541 | return -EINVAL; | |
542 | } | |
543 | ||
544 | ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT); | |
545 | ||
546 | DBGPR("<--xgbe_suspend\n"); | |
547 | ||
548 | return ret; | |
549 | } | |
550 | ||
551 | static int xgbe_resume(struct device *dev) | |
552 | { | |
553 | struct net_device *netdev = dev_get_drvdata(dev); | |
554 | int ret; | |
555 | ||
556 | DBGPR("-->xgbe_resume\n"); | |
557 | ||
558 | if (!netif_running(netdev)) { | |
559 | DBGPR("<--xgbe_dev_resume\n"); | |
560 | return -EINVAL; | |
561 | } | |
562 | ||
563 | ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT); | |
564 | ||
565 | DBGPR("<--xgbe_resume\n"); | |
566 | ||
567 | return ret; | |
568 | } | |
569 | #endif /* CONFIG_PM */ | |
570 | ||
82a19035 LT |
571 | #ifdef CONFIG_ACPI |
572 | static const struct acpi_device_id xgbe_acpi_match[] = { | |
573 | { "AMDI8001", 0 }, | |
574 | {}, | |
575 | }; | |
576 | ||
577 | MODULE_DEVICE_TABLE(acpi, xgbe_acpi_match); | |
578 | #endif | |
579 | ||
580 | #ifdef CONFIG_OF | |
c5aa9e3b LT |
581 | static const struct of_device_id xgbe_of_match[] = { |
582 | { .compatible = "amd,xgbe-seattle-v1a", }, | |
583 | {}, | |
584 | }; | |
585 | ||
586 | MODULE_DEVICE_TABLE(of, xgbe_of_match); | |
82a19035 LT |
587 | #endif |
588 | ||
c5aa9e3b LT |
589 | static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume); |
590 | ||
591 | static struct platform_driver xgbe_driver = { | |
592 | .driver = { | |
593 | .name = "amd-xgbe", | |
82a19035 LT |
594 | #ifdef CONFIG_ACPI |
595 | .acpi_match_table = xgbe_acpi_match, | |
596 | #endif | |
597 | #ifdef CONFIG_OF | |
c5aa9e3b | 598 | .of_match_table = xgbe_of_match, |
82a19035 | 599 | #endif |
c5aa9e3b LT |
600 | .pm = &xgbe_pm_ops, |
601 | }, | |
602 | .probe = xgbe_probe, | |
603 | .remove = xgbe_remove, | |
604 | }; | |
605 | ||
606 | module_platform_driver(xgbe_driver); |